2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
32 #include "ac_binary.h"
33 #include "ac_exp_param.h"
34 #include "ac_shader_util.h"
36 #include "ac_llvm_util.h"
37 #include "si_shader_internal.h"
41 #include "compiler/nir/nir.h"
43 static const char scratch_rsrc_dword0_symbol
[] =
44 "SCRATCH_RSRC_DWORD0";
46 static const char scratch_rsrc_dword1_symbol
[] =
47 "SCRATCH_RSRC_DWORD1";
49 struct si_shader_output_values
51 LLVMValueRef values
[4];
52 unsigned semantic_name
;
53 unsigned semantic_index
;
54 ubyte vertex_stream
[4];
57 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
58 struct si_screen
*sscreen
,
59 struct ac_llvm_compiler
*compiler
);
61 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
62 struct lp_build_tgsi_context
*bld_base
,
63 struct lp_build_emit_data
*emit_data
);
65 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
68 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
69 union si_shader_part_key
*key
);
70 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
71 union si_shader_part_key
*key
);
72 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
73 union si_shader_part_key
*key
);
74 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
75 union si_shader_part_key
*key
);
76 static void si_fix_resource_usage(struct si_screen
*sscreen
,
77 struct si_shader
*shader
);
79 /* Ideally pass the sample mask input to the PS epilog as v14, which
80 * is its usual location, so that the shader doesn't have to add v_mov.
82 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
84 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
87 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
93 static bool is_merged_shader(struct si_shader_context
*ctx
)
95 if (ctx
->screen
->info
.chip_class
<= GFX8
)
98 return ctx
->shader
->key
.as_ls
||
99 ctx
->shader
->key
.as_es
||
100 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
101 ctx
->type
== PIPE_SHADER_GEOMETRY
;
104 void si_init_function_info(struct si_function_info
*fninfo
)
106 fninfo
->num_params
= 0;
107 fninfo
->num_sgpr_params
= 0;
110 unsigned add_arg_assign(struct si_function_info
*fninfo
,
111 enum si_arg_regfile regfile
, LLVMTypeRef type
,
112 LLVMValueRef
*assign
)
114 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
116 unsigned idx
= fninfo
->num_params
++;
117 assert(idx
< ARRAY_SIZE(fninfo
->types
));
119 if (regfile
== ARG_SGPR
)
120 fninfo
->num_sgpr_params
= fninfo
->num_params
;
122 fninfo
->types
[idx
] = type
;
123 fninfo
->assign
[idx
] = assign
;
127 static unsigned add_arg(struct si_function_info
*fninfo
,
128 enum si_arg_regfile regfile
, LLVMTypeRef type
)
130 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
133 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
134 enum si_arg_regfile regfile
, LLVMTypeRef type
,
135 LLVMValueRef
*assign
, unsigned idx
)
137 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
138 assert(actual
== idx
);
141 static void add_arg_checked(struct si_function_info
*fninfo
,
142 enum si_arg_regfile regfile
, LLVMTypeRef type
,
145 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
149 * Returns a unique index for a per-patch semantic name and index. The index
150 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
153 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
155 switch (semantic_name
) {
156 case TGSI_SEMANTIC_TESSOUTER
:
158 case TGSI_SEMANTIC_TESSINNER
:
160 case TGSI_SEMANTIC_PATCH
:
165 assert(!"invalid semantic name");
171 * Returns a unique index for a semantic name and index. The index must be
172 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
175 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
178 switch (semantic_name
) {
179 case TGSI_SEMANTIC_POSITION
:
181 case TGSI_SEMANTIC_GENERIC
:
182 /* Since some shader stages use the the highest used IO index
183 * to determine the size to allocate for inputs/outputs
184 * (in LDS, tess and GS rings). GENERIC should be placed right
185 * after POSITION to make that size as small as possible.
187 if (index
< SI_MAX_IO_GENERIC
)
190 assert(!"invalid generic index");
192 case TGSI_SEMANTIC_PSIZE
:
193 return SI_MAX_IO_GENERIC
+ 1;
194 case TGSI_SEMANTIC_CLIPDIST
:
196 return SI_MAX_IO_GENERIC
+ 2 + index
;
197 case TGSI_SEMANTIC_FOG
:
198 return SI_MAX_IO_GENERIC
+ 4;
199 case TGSI_SEMANTIC_LAYER
:
200 return SI_MAX_IO_GENERIC
+ 5;
201 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
202 return SI_MAX_IO_GENERIC
+ 6;
203 case TGSI_SEMANTIC_PRIMID
:
204 return SI_MAX_IO_GENERIC
+ 7;
205 case TGSI_SEMANTIC_COLOR
:
207 return SI_MAX_IO_GENERIC
+ 8 + index
;
208 case TGSI_SEMANTIC_BCOLOR
:
210 /* If it's a varying, COLOR and BCOLOR alias. */
212 return SI_MAX_IO_GENERIC
+ 8 + index
;
214 return SI_MAX_IO_GENERIC
+ 10 + index
;
215 case TGSI_SEMANTIC_TEXCOORD
:
217 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 12 + 8 <= 63);
218 return SI_MAX_IO_GENERIC
+ 12 + index
;
219 case TGSI_SEMANTIC_CLIPVERTEX
:
222 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
223 assert(!"invalid semantic name");
229 * Get the value of a shader input parameter and extract a bitfield.
231 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
232 LLVMValueRef value
, unsigned rshift
,
235 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
236 value
= ac_to_integer(&ctx
->ac
, value
);
239 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
240 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
242 if (rshift
+ bitwidth
< 32) {
243 unsigned mask
= (1 << bitwidth
) - 1;
244 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
245 LLVMConstInt(ctx
->i32
, mask
, 0), "");
251 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
252 unsigned param
, unsigned rshift
,
255 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
257 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
260 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
263 case PIPE_SHADER_TESS_CTRL
:
264 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
266 case PIPE_SHADER_TESS_EVAL
:
267 return LLVMGetParam(ctx
->main_fn
,
268 ctx
->param_tes_rel_patch_id
);
276 /* Tessellation shaders pass outputs to the next shader using LDS.
278 * LS outputs = TCS inputs
279 * TCS outputs = TES inputs
282 * - TCS inputs for patch 0
283 * - TCS inputs for patch 1
284 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
286 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
287 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
288 * - TCS outputs for patch 1
289 * - Per-patch TCS outputs for patch 1
290 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
291 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
294 * All three shaders VS(LS), TCS, TES share the same LDS space.
298 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
300 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
303 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
305 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
307 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
308 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
310 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
313 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
315 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
317 return LLVMConstInt(ctx
->i32
, stride
, 0);
320 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
322 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
323 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
325 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
326 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
327 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
328 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
329 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
330 num_patch_outputs
* 4;
331 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
335 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
337 return LLVMBuildMul(ctx
->ac
.builder
,
339 ctx
->param_tcs_out_lds_offsets
,
341 LLVMConstInt(ctx
->i32
, 4, 0), "");
345 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
347 return LLVMBuildMul(ctx
->ac
.builder
,
349 ctx
->param_tcs_out_lds_offsets
,
351 LLVMConstInt(ctx
->i32
, 4, 0), "");
355 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
357 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
358 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
360 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
364 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
366 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
367 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
368 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
370 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
374 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
376 LLVMValueRef patch0_patch_data_offset
=
377 get_tcs_out_patch0_patch_data_offset(ctx
);
378 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
379 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
381 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
384 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
386 unsigned tcs_out_vertices
=
387 ctx
->shader
->selector
?
388 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
390 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
391 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
392 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
394 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
397 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
402 case PIPE_SHADER_VERTEX
:
403 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
404 return LLVMConstInt(ctx
->i32
, stride
, 0);
406 case PIPE_SHADER_TESS_CTRL
:
407 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
408 ctx
->shader
->is_monolithic
) {
409 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
410 return LLVMConstInt(ctx
->i32
, stride
, 0);
412 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
420 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
421 LLVMValueRef i32
, unsigned index
)
426 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
427 LLVMConstInt(ctx
->i32
, 16, 0), "");
429 return LLVMBuildSExt(ctx
->ac
.builder
,
430 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
435 void si_llvm_load_input_vs(
436 struct si_shader_context
*ctx
,
437 unsigned input_index
,
440 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
441 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
443 if (vs_blit_property
) {
444 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
445 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
446 LLVMIntULE
, vertex_id
,
448 /* Use LLVMIntNE, because we have 3 vertices and only
449 * the middle one should use y2.
451 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
452 LLVMIntNE
, vertex_id
,
455 if (input_index
== 0) {
457 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
458 ctx
->param_vs_blit_inputs
);
459 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
460 ctx
->param_vs_blit_inputs
+ 1);
462 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
463 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
464 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
465 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
467 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
469 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
472 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
473 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
474 out
[2] = LLVMGetParam(ctx
->main_fn
,
475 ctx
->param_vs_blit_inputs
+ 2);
476 out
[3] = ctx
->ac
.f32_1
;
480 /* Color or texture coordinates: */
481 assert(input_index
== 1);
483 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
484 for (int i
= 0; i
< 4; i
++) {
485 out
[i
] = LLVMGetParam(ctx
->main_fn
,
486 ctx
->param_vs_blit_inputs
+ 3 + i
);
489 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
490 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
491 ctx
->param_vs_blit_inputs
+ 3);
492 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
493 ctx
->param_vs_blit_inputs
+ 4);
494 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
495 ctx
->param_vs_blit_inputs
+ 5);
496 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
497 ctx
->param_vs_blit_inputs
+ 6);
499 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
501 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
503 out
[2] = LLVMGetParam(ctx
->main_fn
,
504 ctx
->param_vs_blit_inputs
+ 7);
505 out
[3] = LLVMGetParam(ctx
->main_fn
,
506 ctx
->param_vs_blit_inputs
+ 8);
511 union si_vs_fix_fetch fix_fetch
;
512 LLVMValueRef t_list_ptr
;
513 LLVMValueRef t_offset
;
515 LLVMValueRef vertex_index
;
518 /* Load the T list */
519 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
521 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
523 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
525 vertex_index
= LLVMGetParam(ctx
->main_fn
,
526 ctx
->param_vertex_index0
+
529 /* Use the open-coded implementation for all loads of doubles and
530 * of dword-sized data that needs fixups. We need to insert conversion
531 * code anyway, and the amd/common code does it for us.
533 * Note: On LLVM <= 8, we can only open-code formats with
534 * channel size >= 4 bytes.
536 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
537 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
539 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
540 (fix_fetch
.u
.log_size
== 2)) {
541 tmp
= ac_build_opencoded_load_format(
542 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
543 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
544 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
,
546 for (unsigned i
= 0; i
< 4; ++i
)
547 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
551 /* Do multiple loads for special formats. */
552 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
553 LLVMValueRef fetches
[4];
554 unsigned num_fetches
;
555 unsigned fetch_stride
;
556 unsigned channels_per_fetch
;
558 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
559 num_fetches
= MIN2(required_channels
, 3);
560 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
561 channels_per_fetch
= 1;
565 channels_per_fetch
= required_channels
;
568 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
569 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
570 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
571 channels_per_fetch
, false, true);
574 if (num_fetches
== 1 && channels_per_fetch
> 1) {
575 LLVMValueRef fetch
= fetches
[0];
576 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
577 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
578 fetches
[i
] = LLVMBuildExtractElement(
579 ctx
->ac
.builder
, fetch
, tmp
, "");
581 num_fetches
= channels_per_fetch
;
582 channels_per_fetch
= 1;
585 for (unsigned i
= num_fetches
; i
< 4; ++i
)
586 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
588 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
589 required_channels
== 4) {
590 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
591 fetches
[3] = ctx
->ac
.i32_1
;
593 fetches
[3] = ctx
->ac
.f32_1
;
594 } else if (fix_fetch
.u
.log_size
== 3 &&
595 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
596 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
597 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
598 required_channels
== 4) {
599 /* For 2_10_10_10, the hardware returns an unsigned value;
600 * convert it to a signed one.
602 LLVMValueRef tmp
= fetches
[3];
603 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
605 /* First, recover the sign-extended signed integer value. */
606 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
607 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
609 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
611 /* For the integer-like cases, do a natural sign extension.
613 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
614 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
617 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
618 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
619 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
620 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
622 /* Convert back to the right type. */
623 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
625 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
626 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
627 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
628 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
629 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
630 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
636 for (unsigned i
= 0; i
< 4; ++i
)
637 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
640 static void declare_input_vs(
641 struct si_shader_context
*ctx
,
642 unsigned input_index
,
643 const struct tgsi_full_declaration
*decl
,
646 si_llvm_load_input_vs(ctx
, input_index
, out
);
649 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
656 case PIPE_SHADER_VERTEX
:
657 return LLVMGetParam(ctx
->main_fn
,
658 ctx
->param_vs_prim_id
);
659 case PIPE_SHADER_TESS_CTRL
:
660 return ctx
->abi
.tcs_patch_id
;
661 case PIPE_SHADER_TESS_EVAL
:
662 return ctx
->abi
.tes_patch_id
;
663 case PIPE_SHADER_GEOMETRY
:
664 return ctx
->abi
.gs_prim_id
;
672 * Return the value of tgsi_ind_register for indexing.
673 * This is the indirect index with the constant offset added to it.
675 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
676 const struct tgsi_ind_register
*ind
,
682 if (ind
->File
== TGSI_FILE_ADDRESS
) {
683 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
684 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
686 struct tgsi_full_src_register src
= {};
688 src
.Register
.File
= ind
->File
;
689 src
.Register
.Index
= ind
->Index
;
691 /* Set the second index to 0 for constants. */
692 if (ind
->File
== TGSI_FILE_CONSTANT
)
693 src
.Register
.Dimension
= 1;
695 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
698 result
= ac_to_integer(&ctx
->ac
, result
);
701 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
702 LLVMConstInt(ctx
->i32
, rel_index
, 0));
706 * Like si_get_indirect_index, but restricts the return value to a (possibly
707 * undefined) value inside [0..num).
709 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
710 const struct tgsi_ind_register
*ind
,
711 int rel_index
, unsigned num
)
713 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
715 return si_llvm_bound_index(ctx
, result
, num
);
718 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
719 LLVMValueRef vertex_dw_stride
,
720 LLVMValueRef base_addr
,
721 LLVMValueRef vertex_index
,
722 LLVMValueRef param_index
,
723 unsigned input_index
,
728 if (vertex_dw_stride
) {
729 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
730 vertex_dw_stride
, base_addr
);
734 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
735 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
738 int param
= is_patch
?
739 si_shader_io_get_unique_index_patch(name
[input_index
],
740 index
[input_index
]) :
741 si_shader_io_get_unique_index(name
[input_index
],
742 index
[input_index
], false);
744 /* Add the base address of the element. */
745 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
746 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
750 * Calculate a dword address given an input or output register and a stride.
752 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
753 const struct tgsi_full_dst_register
*dst
,
754 const struct tgsi_full_src_register
*src
,
755 LLVMValueRef vertex_dw_stride
,
756 LLVMValueRef base_addr
)
758 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
759 ubyte
*name
, *index
, *array_first
;
761 struct tgsi_full_dst_register reg
;
762 LLVMValueRef vertex_index
= NULL
;
763 LLVMValueRef ind_index
= NULL
;
765 /* Set the register description. The address computation is the same
766 * for sources and destinations. */
768 reg
.Register
.File
= src
->Register
.File
;
769 reg
.Register
.Index
= src
->Register
.Index
;
770 reg
.Register
.Indirect
= src
->Register
.Indirect
;
771 reg
.Register
.Dimension
= src
->Register
.Dimension
;
772 reg
.Indirect
= src
->Indirect
;
773 reg
.Dimension
= src
->Dimension
;
774 reg
.DimIndirect
= src
->DimIndirect
;
778 /* If the register is 2-dimensional (e.g. an array of vertices
779 * in a primitive), calculate the base address of the vertex. */
780 if (reg
.Register
.Dimension
) {
781 if (reg
.Dimension
.Indirect
)
782 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
783 1, reg
.Dimension
.Index
);
785 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
788 /* Get information about the register. */
789 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
790 name
= info
->input_semantic_name
;
791 index
= info
->input_semantic_index
;
792 array_first
= info
->input_array_first
;
793 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
794 name
= info
->output_semantic_name
;
795 index
= info
->output_semantic_index
;
796 array_first
= info
->output_array_first
;
802 if (reg
.Register
.Indirect
) {
803 /* Add the relative address of the element. */
804 if (reg
.Indirect
.ArrayID
)
805 input_index
= array_first
[reg
.Indirect
.ArrayID
];
807 input_index
= reg
.Register
.Index
;
809 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
810 1, reg
.Register
.Index
- input_index
);
812 input_index
= reg
.Register
.Index
;
815 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
816 base_addr
, vertex_index
,
817 ind_index
, input_index
,
819 !reg
.Register
.Dimension
);
822 /* The offchip buffer layout for TCS->TES is
824 * - attribute 0 of patch 0 vertex 0
825 * - attribute 0 of patch 0 vertex 1
826 * - attribute 0 of patch 0 vertex 2
828 * - attribute 0 of patch 1 vertex 0
829 * - attribute 0 of patch 1 vertex 1
831 * - attribute 1 of patch 0 vertex 0
832 * - attribute 1 of patch 0 vertex 1
834 * - per patch attribute 0 of patch 0
835 * - per patch attribute 0 of patch 1
838 * Note that every attribute has 4 components.
840 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
841 LLVMValueRef rel_patch_id
,
842 LLVMValueRef vertex_index
,
843 LLVMValueRef param_index
)
845 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
846 LLVMValueRef param_stride
, constant16
;
848 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
849 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
850 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
853 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
855 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
856 vertices_per_patch
, vertex_index
);
857 param_stride
= total_vertices
;
859 base_addr
= rel_patch_id
;
860 param_stride
= num_patches
;
863 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
864 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
867 LLVMValueRef patch_data_offset
=
868 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
870 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
871 patch_data_offset
, "");
876 /* This is a generic helper that can be shared by the NIR and TGSI backends */
877 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
878 struct si_shader_context
*ctx
,
879 LLVMValueRef vertex_index
,
880 LLVMValueRef param_index
,
886 unsigned param_index_base
;
888 param_index_base
= is_patch
?
889 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
890 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
893 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
894 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
897 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
900 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
901 vertex_index
, param_index
);
904 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
905 struct si_shader_context
*ctx
,
906 const struct tgsi_full_dst_register
*dst
,
907 const struct tgsi_full_src_register
*src
)
909 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
910 ubyte
*name
, *index
, *array_first
;
911 struct tgsi_full_src_register reg
;
912 LLVMValueRef vertex_index
= NULL
;
913 LLVMValueRef param_index
= NULL
;
916 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
918 if (reg
.Register
.Dimension
) {
920 if (reg
.Dimension
.Indirect
)
921 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
922 1, reg
.Dimension
.Index
);
924 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
927 /* Get information about the register. */
928 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
929 name
= info
->input_semantic_name
;
930 index
= info
->input_semantic_index
;
931 array_first
= info
->input_array_first
;
932 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
933 name
= info
->output_semantic_name
;
934 index
= info
->output_semantic_index
;
935 array_first
= info
->output_array_first
;
941 if (reg
.Register
.Indirect
) {
942 if (reg
.Indirect
.ArrayID
)
943 param_base
= array_first
[reg
.Indirect
.ArrayID
];
945 param_base
= reg
.Register
.Index
;
947 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
948 1, reg
.Register
.Index
- param_base
);
951 param_base
= reg
.Register
.Index
;
954 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
955 param_index
, param_base
,
956 name
, index
, !reg
.Register
.Dimension
);
959 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
960 LLVMTypeRef type
, unsigned swizzle
,
961 LLVMValueRef buffer
, LLVMValueRef offset
,
962 LLVMValueRef base
, bool can_speculate
)
964 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
965 LLVMValueRef value
, value2
;
966 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
969 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
970 0, 1, 0, can_speculate
, false);
972 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
975 if (!llvm_type_is_64bit(ctx
, type
)) {
976 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
977 0, 1, 0, can_speculate
, false);
979 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
980 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
981 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
984 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
985 swizzle
* 4, 1, 0, can_speculate
, false);
987 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
988 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
990 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
994 * Load from LSHS LDS storage.
996 * \param type output value type
997 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
998 * \param dw_addr address in dwords
1000 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1001 LLVMTypeRef type
, unsigned swizzle
,
1002 LLVMValueRef dw_addr
)
1004 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1007 if (swizzle
== ~0) {
1008 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1010 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1011 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1013 return ac_build_gather_values(&ctx
->ac
, values
,
1017 /* Split 64-bit loads. */
1018 if (llvm_type_is_64bit(ctx
, type
)) {
1019 LLVMValueRef lo
, hi
;
1021 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1022 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1023 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1026 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1027 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1029 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1031 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1035 * Store to LSHS LDS storage.
1037 * \param swizzle offset (typically 0..3)
1038 * \param dw_addr address in dwords
1039 * \param value value to store
1041 static void lshs_lds_store(struct si_shader_context
*ctx
,
1042 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1045 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1046 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1048 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1053 TESS_OFFCHIP_RING_TCS
,
1054 TESS_OFFCHIP_RING_TES
,
1057 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1058 enum si_tess_ring ring
)
1060 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1061 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1062 ctx
->param_tcs_out_lds_layout
;
1063 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1065 /* TCS only receives high 13 bits of the address. */
1066 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1067 addr
= LLVMBuildAnd(builder
, addr
,
1068 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1071 if (ring
== TCS_FACTOR_RING
) {
1072 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1073 addr
= LLVMBuildAdd(builder
, addr
,
1074 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1077 LLVMValueRef desc
[4];
1079 desc
[1] = LLVMConstInt(ctx
->i32
,
1080 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1081 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1082 desc
[3] = LLVMConstInt(ctx
->i32
,
1083 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1084 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1085 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1086 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1087 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1088 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1090 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1093 static LLVMValueRef
fetch_input_tcs(
1094 struct lp_build_tgsi_context
*bld_base
,
1095 const struct tgsi_full_src_register
*reg
,
1096 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1098 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1099 LLVMValueRef dw_addr
, stride
;
1100 unsigned swizzle
= swizzle_in
& 0xffff;
1101 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1102 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1103 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1105 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1108 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1110 LLVMValueRef vertex_index
,
1111 LLVMValueRef param_index
,
1112 unsigned const_index
,
1114 unsigned driver_location
,
1116 unsigned num_components
,
1121 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1122 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1123 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1124 LLVMValueRef dw_addr
, stride
;
1126 driver_location
= driver_location
/ 4;
1129 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1130 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1134 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1136 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1137 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1142 /* Add the constant index to the indirect index */
1143 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1144 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1146 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1152 names
= info
->input_semantic_name
;
1153 indices
= info
->input_semantic_index
;
1155 names
= info
->output_semantic_name
;
1156 indices
= info
->output_semantic_index
;
1159 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1160 vertex_index
, param_index
,
1165 LLVMValueRef value
[4];
1166 for (unsigned i
= 0; i
< num_components
; i
++) {
1167 unsigned offset
= i
;
1168 if (llvm_type_is_64bit(ctx
, type
))
1171 offset
+= component
;
1172 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1175 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1178 static LLVMValueRef
fetch_output_tcs(
1179 struct lp_build_tgsi_context
*bld_base
,
1180 const struct tgsi_full_src_register
*reg
,
1181 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1183 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1184 LLVMValueRef dw_addr
, stride
;
1185 unsigned swizzle
= (swizzle_in
& 0xffff);
1187 if (reg
->Register
.Dimension
) {
1188 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1189 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1190 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1192 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1193 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1196 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1199 static LLVMValueRef
fetch_input_tes(
1200 struct lp_build_tgsi_context
*bld_base
,
1201 const struct tgsi_full_src_register
*reg
,
1202 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1204 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1205 LLVMValueRef base
, addr
;
1206 unsigned swizzle
= (swizzle_in
& 0xffff);
1208 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1209 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1211 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1212 ctx
->tess_offchip_ring
, base
, addr
, true);
1215 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1217 LLVMValueRef vertex_index
,
1218 LLVMValueRef param_index
,
1219 unsigned const_index
,
1221 unsigned driver_location
,
1223 unsigned num_components
,
1228 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1229 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1230 LLVMValueRef base
, addr
;
1232 driver_location
= driver_location
/ 4;
1234 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1237 /* Add the constant index to the indirect index */
1238 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1239 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1241 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1244 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1245 param_index
, driver_location
,
1246 info
->input_semantic_name
,
1247 info
->input_semantic_index
,
1250 /* TODO: This will generate rather ordinary llvm code, although it
1251 * should be easy for the optimiser to fix up. In future we might want
1252 * to refactor buffer_load(), but for now this maximises code sharing
1253 * between the NIR and TGSI backends.
1255 LLVMValueRef value
[4];
1256 for (unsigned i
= 0; i
< num_components
; i
++) {
1257 unsigned offset
= i
;
1258 if (llvm_type_is_64bit(ctx
, type
)) {
1261 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1264 driver_location
+ 1,
1265 info
->input_semantic_name
,
1266 info
->input_semantic_index
,
1270 offset
= offset
% 4;
1273 offset
+= component
;
1274 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1275 ctx
->tess_offchip_ring
, base
, addr
, true);
1278 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1281 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1282 const struct tgsi_full_instruction
*inst
,
1283 const struct tgsi_opcode_info
*info
,
1285 LLVMValueRef dst
[4])
1287 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1288 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1289 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1290 unsigned chan_index
;
1291 LLVMValueRef dw_addr
, stride
;
1292 LLVMValueRef buffer
, base
, buf_addr
;
1293 LLVMValueRef values
[4];
1294 bool skip_lds_store
;
1295 bool is_tess_factor
= false, is_tess_inner
= false;
1297 /* Only handle per-patch and per-vertex outputs here.
1298 * Vectors will be lowered to scalars and this function will be called again.
1300 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1301 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1302 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1306 if (reg
->Register
.Dimension
) {
1307 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1308 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1309 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1310 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1312 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1313 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1314 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1316 if (!reg
->Register
.Indirect
) {
1317 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1319 /* Always write tess factors into LDS for the TCS epilog. */
1320 if (name
== TGSI_SEMANTIC_TESSINNER
||
1321 name
== TGSI_SEMANTIC_TESSOUTER
) {
1322 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1323 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1324 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1325 is_tess_factor
= true;
1326 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1331 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1333 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1334 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1336 uint32_t writemask
= reg
->Register
.WriteMask
;
1338 chan_index
= u_bit_scan(&writemask
);
1339 LLVMValueRef value
= dst
[chan_index
];
1341 if (inst
->Instruction
.Saturate
)
1342 value
= ac_build_clamp(&ctx
->ac
, value
);
1344 /* Skip LDS stores if there is no LDS read of this output. */
1345 if (!skip_lds_store
)
1346 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1348 value
= ac_to_integer(&ctx
->ac
, value
);
1349 values
[chan_index
] = value
;
1351 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1352 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1354 4 * chan_index
, 1, 0, true, false);
1357 /* Write tess factors into VGPRs for the epilog. */
1358 if (is_tess_factor
&&
1359 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1360 if (!is_tess_inner
) {
1361 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1362 ctx
->invoc0_tess_factors
[chan_index
]);
1363 } else if (chan_index
< 2) {
1364 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1365 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1370 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1371 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1373 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1374 base
, 0, 1, 0, true, false);
1378 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1379 const struct nir_variable
*var
,
1380 LLVMValueRef vertex_index
,
1381 LLVMValueRef param_index
,
1382 unsigned const_index
,
1386 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1387 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1388 const unsigned component
= var
->data
.location_frac
;
1389 const bool is_patch
= var
->data
.patch
;
1390 unsigned driver_location
= var
->data
.driver_location
;
1391 LLVMValueRef dw_addr
, stride
;
1392 LLVMValueRef buffer
, base
, addr
;
1393 LLVMValueRef values
[8];
1394 bool skip_lds_store
;
1395 bool is_tess_factor
= false, is_tess_inner
= false;
1397 driver_location
= driver_location
/ 4;
1400 /* Add the constant index to the indirect index */
1401 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1402 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1404 if (const_index
!= 0)
1405 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1409 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1410 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1411 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1412 vertex_index
, param_index
,
1414 info
->output_semantic_name
,
1415 info
->output_semantic_index
,
1418 skip_lds_store
= !info
->reads_pervertex_outputs
;
1420 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1421 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1422 vertex_index
, param_index
,
1424 info
->output_semantic_name
,
1425 info
->output_semantic_index
,
1428 skip_lds_store
= !info
->reads_perpatch_outputs
;
1431 int name
= info
->output_semantic_name
[driver_location
];
1433 /* Always write tess factors into LDS for the TCS epilog. */
1434 if (name
== TGSI_SEMANTIC_TESSINNER
||
1435 name
== TGSI_SEMANTIC_TESSOUTER
) {
1436 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1437 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1438 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1439 is_tess_factor
= true;
1440 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1445 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1447 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1449 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1450 param_index
, driver_location
,
1451 info
->output_semantic_name
,
1452 info
->output_semantic_index
,
1455 for (unsigned chan
= 0; chan
< 8; chan
++) {
1456 if (!(writemask
& (1 << chan
)))
1458 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1460 unsigned buffer_store_offset
= chan
% 4;
1462 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1465 driver_location
+ 1,
1466 info
->output_semantic_name
,
1467 info
->output_semantic_index
,
1471 /* Skip LDS stores if there is no LDS read of this output. */
1472 if (!skip_lds_store
)
1473 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1475 value
= ac_to_integer(&ctx
->ac
, value
);
1476 values
[chan
] = value
;
1478 if (writemask
!= 0xF && !is_tess_factor
) {
1479 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1481 4 * buffer_store_offset
,
1485 /* Write tess factors into VGPRs for the epilog. */
1486 if (is_tess_factor
&&
1487 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1488 if (!is_tess_inner
) {
1489 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1490 ctx
->invoc0_tess_factors
[chan
]);
1491 } else if (chan
< 2) {
1492 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1493 ctx
->invoc0_tess_factors
[4 + chan
]);
1498 if (writemask
== 0xF && !is_tess_factor
) {
1499 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1501 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1502 base
, 0, 1, 0, true, false);
1506 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1507 unsigned input_index
,
1508 unsigned vtx_offset_param
,
1512 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1513 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1514 struct si_shader
*shader
= ctx
->shader
;
1515 LLVMValueRef vtx_offset
, soffset
;
1516 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1517 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1518 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1522 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1524 /* GFX9 has the ESGS ring in LDS. */
1525 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1526 unsigned index
= vtx_offset_param
;
1528 switch (index
/ 2) {
1530 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1531 index
% 2 ? 16 : 0, 16);
1534 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1535 index
% 2 ? 16 : 0, 16);
1538 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1539 index
% 2 ? 16 : 0, 16);
1546 unsigned offset
= param
* 4 + swizzle
;
1547 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1548 LLVMConstInt(ctx
->i32
, offset
, false), "");
1550 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1551 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1552 if (llvm_type_is_64bit(ctx
, type
)) {
1553 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1554 &ctx
->ac
.i32_1
, 1, "");
1555 LLVMValueRef values
[2] = {
1557 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1559 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1561 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1564 /* GFX6: input load from the ESGS ring in memory. */
1565 if (swizzle
== ~0) {
1566 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1568 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1569 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1572 return ac_build_gather_values(&ctx
->ac
, values
,
1576 /* Get the vertex offset parameter on GFX6. */
1577 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1579 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1580 LLVMConstInt(ctx
->i32
, 4, 0), "");
1582 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1584 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1585 vtx_offset
, soffset
, 0, 1, 0, true, false);
1586 if (llvm_type_is_64bit(ctx
, type
)) {
1587 LLVMValueRef value2
;
1588 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1590 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1591 ctx
->i32_0
, vtx_offset
, soffset
,
1592 0, 1, 0, true, false);
1593 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1595 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1598 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1600 unsigned driver_location
,
1602 unsigned num_components
,
1603 unsigned vertex_index
,
1604 unsigned const_index
,
1607 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1609 LLVMValueRef value
[4];
1610 for (unsigned i
= 0; i
< num_components
; i
++) {
1611 unsigned offset
= i
;
1612 if (llvm_type_is_64bit(ctx
, type
))
1615 offset
+= component
;
1616 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1617 vertex_index
, type
, offset
);
1620 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1623 static LLVMValueRef
fetch_input_gs(
1624 struct lp_build_tgsi_context
*bld_base
,
1625 const struct tgsi_full_src_register
*reg
,
1626 enum tgsi_opcode_type type
,
1627 unsigned swizzle_in
)
1629 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1630 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1631 unsigned swizzle
= swizzle_in
& 0xffff;
1633 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1634 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1635 return get_primitive_id(ctx
, swizzle
);
1637 if (!reg
->Register
.Dimension
)
1640 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1641 reg
->Dimension
.Index
,
1642 tgsi2llvmtype(bld_base
, type
),
1646 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1648 switch (interpolate
) {
1649 case TGSI_INTERPOLATE_CONSTANT
:
1652 case TGSI_INTERPOLATE_LINEAR
:
1653 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1654 return SI_PARAM_LINEAR_SAMPLE
;
1655 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1656 return SI_PARAM_LINEAR_CENTROID
;
1658 return SI_PARAM_LINEAR_CENTER
;
1660 case TGSI_INTERPOLATE_COLOR
:
1661 case TGSI_INTERPOLATE_PERSPECTIVE
:
1662 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1663 return SI_PARAM_PERSP_SAMPLE
;
1664 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1665 return SI_PARAM_PERSP_CENTROID
;
1667 return SI_PARAM_PERSP_CENTER
;
1670 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1675 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1676 unsigned attr_index
, unsigned chan
,
1677 LLVMValueRef prim_mask
,
1678 LLVMValueRef i
, LLVMValueRef j
)
1681 return ac_build_fs_interp(&ctx
->ac
,
1682 LLVMConstInt(ctx
->i32
, chan
, 0),
1683 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1686 return ac_build_fs_interp_mov(&ctx
->ac
,
1687 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1688 LLVMConstInt(ctx
->i32
, chan
, 0),
1689 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1694 * Interpolate a fragment shader input.
1696 * @param ctx context
1697 * @param input_index index of the input in hardware
1698 * @param semantic_name TGSI_SEMANTIC_*
1699 * @param semantic_index semantic index
1700 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1701 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1702 * @param interp_param interpolation weights (i,j)
1703 * @param prim_mask SI_PARAM_PRIM_MASK
1704 * @param face SI_PARAM_FRONT_FACE
1705 * @param result the return value (4 components)
1707 static void interp_fs_input(struct si_shader_context
*ctx
,
1708 unsigned input_index
,
1709 unsigned semantic_name
,
1710 unsigned semantic_index
,
1711 unsigned num_interp_inputs
,
1712 unsigned colors_read_mask
,
1713 LLVMValueRef interp_param
,
1714 LLVMValueRef prim_mask
,
1716 LLVMValueRef result
[4])
1718 LLVMValueRef i
= NULL
, j
= NULL
;
1721 /* fs.constant returns the param from the middle vertex, so it's not
1722 * really useful for flat shading. It's meant to be used for custom
1723 * interpolation (but the intrinsic can't fetch from the other two
1726 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1727 * to do the right thing. The only reason we use fs.constant is that
1728 * fs.interp cannot be used on integers, because they can be equal
1731 * When interp is false we will use fs.constant or for newer llvm,
1732 * amdgcn.interp.mov.
1734 bool interp
= interp_param
!= NULL
;
1737 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1738 LLVMVectorType(ctx
->f32
, 2), "");
1740 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1742 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1746 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1747 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1748 LLVMValueRef is_face_positive
;
1750 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1751 * otherwise it's at offset "num_inputs".
1753 unsigned back_attr_offset
= num_interp_inputs
;
1754 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1755 back_attr_offset
+= 1;
1757 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1758 face
, ctx
->i32_0
, "");
1760 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1761 LLVMValueRef front
, back
;
1763 front
= si_build_fs_interp(ctx
,
1766 back
= si_build_fs_interp(ctx
,
1767 back_attr_offset
, chan
,
1770 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1776 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1777 result
[0] = si_build_fs_interp(ctx
, input_index
,
1778 0, prim_mask
, i
, j
);
1780 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1781 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1783 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1784 result
[chan
] = si_build_fs_interp(ctx
,
1791 void si_llvm_load_input_fs(
1792 struct si_shader_context
*ctx
,
1793 unsigned input_index
,
1794 LLVMValueRef out
[4])
1796 struct si_shader
*shader
= ctx
->shader
;
1797 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1798 LLVMValueRef main_fn
= ctx
->main_fn
;
1799 LLVMValueRef interp_param
= NULL
;
1800 int interp_param_idx
;
1801 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1802 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1803 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1804 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1806 /* Get colors from input VGPRs (set by the prolog). */
1807 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1808 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1809 unsigned mask
= colors_read
>> (semantic_index
* 4);
1810 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1811 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1812 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1814 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1815 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1816 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1817 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1821 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1822 if (interp_param_idx
== -1)
1824 else if (interp_param_idx
) {
1825 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1828 interp_fs_input(ctx
, input_index
, semantic_name
,
1829 semantic_index
, 0, /* this param is unused */
1830 shader
->selector
->info
.colors_read
, interp_param
,
1832 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1836 static void declare_input_fs(
1837 struct si_shader_context
*ctx
,
1838 unsigned input_index
,
1839 const struct tgsi_full_declaration
*decl
,
1840 LLVMValueRef out
[4])
1842 si_llvm_load_input_fs(ctx
, input_index
, out
);
1845 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1847 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1850 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1852 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1854 /* For non-indexed draws, the base vertex set by the driver
1855 * (for direct draws) or the CP (for indirect draws) is the
1856 * first vertex ID, but GLSL expects 0 to be returned.
1858 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1859 ctx
->param_vs_state_bits
);
1860 LLVMValueRef indexed
;
1862 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1863 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1865 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1869 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1871 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1873 LLVMValueRef values
[3];
1874 LLVMValueRef result
;
1876 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1878 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1879 unsigned sizes
[3] = {
1880 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1881 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1882 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1885 for (i
= 0; i
< 3; ++i
)
1886 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1888 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1890 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1897 * Load a dword from a constant buffer.
1899 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1900 LLVMValueRef resource
,
1901 LLVMValueRef offset
)
1903 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1904 0, 0, 0, true, true);
1907 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1909 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1910 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1911 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1912 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1914 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1915 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1916 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1918 LLVMValueRef pos
[4] = {
1919 buffer_load_const(ctx
, resource
, offset0
),
1920 buffer_load_const(ctx
, resource
, offset1
),
1921 LLVMConstReal(ctx
->f32
, 0),
1922 LLVMConstReal(ctx
->f32
, 0)
1925 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1928 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1930 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1931 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1934 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1936 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1937 LLVMValueRef coord
[4] = {
1938 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1939 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1944 /* For triangles, the vector should be (u, v, 1-u-v). */
1945 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1946 PIPE_PRIM_TRIANGLES
) {
1947 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1948 LLVMBuildFAdd(ctx
->ac
.builder
,
1949 coord
[0], coord
[1], ""), "");
1951 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1954 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1955 unsigned semantic_name
)
1957 LLVMValueRef base
, addr
;
1959 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1961 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1962 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1963 LLVMConstInt(ctx
->i32
, param
, 0));
1965 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1966 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1970 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1971 unsigned varying_id
)
1973 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1974 unsigned semantic_name
;
1976 switch (varying_id
) {
1977 case VARYING_SLOT_TESS_LEVEL_INNER
:
1978 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1980 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1981 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1984 unreachable("unknown tess level");
1987 return load_tess_level(ctx
, semantic_name
);
1991 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1993 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1994 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1995 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
1996 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1997 return get_num_tcs_out_vertices(ctx
);
1999 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2002 void si_load_system_value(struct si_shader_context
*ctx
,
2004 const struct tgsi_full_declaration
*decl
)
2006 LLVMValueRef value
= 0;
2008 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2010 switch (decl
->Semantic
.Name
) {
2011 case TGSI_SEMANTIC_INSTANCEID
:
2012 value
= ctx
->abi
.instance_id
;
2015 case TGSI_SEMANTIC_VERTEXID
:
2016 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2018 ctx
->abi
.base_vertex
, "");
2021 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2022 /* Unused. Clarify the meaning in indexed vs. non-indexed
2023 * draws if this is ever used again. */
2027 case TGSI_SEMANTIC_BASEVERTEX
:
2028 value
= get_base_vertex(&ctx
->abi
);
2031 case TGSI_SEMANTIC_BASEINSTANCE
:
2032 value
= ctx
->abi
.start_instance
;
2035 case TGSI_SEMANTIC_DRAWID
:
2036 value
= ctx
->abi
.draw_id
;
2039 case TGSI_SEMANTIC_INVOCATIONID
:
2040 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2041 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2042 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2043 value
= ctx
->abi
.gs_invocation_id
;
2045 assert(!"INVOCATIONID not implemented");
2048 case TGSI_SEMANTIC_POSITION
:
2050 LLVMValueRef pos
[4] = {
2051 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2052 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2053 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2054 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2055 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2057 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2061 case TGSI_SEMANTIC_FACE
:
2062 value
= ctx
->abi
.front_face
;
2065 case TGSI_SEMANTIC_SAMPLEID
:
2066 value
= si_get_sample_id(ctx
);
2069 case TGSI_SEMANTIC_SAMPLEPOS
: {
2070 LLVMValueRef pos
[4] = {
2071 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2072 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2073 LLVMConstReal(ctx
->f32
, 0),
2074 LLVMConstReal(ctx
->f32
, 0)
2076 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2077 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2078 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2082 case TGSI_SEMANTIC_SAMPLEMASK
:
2083 /* This can only occur with the OpenGL Core profile, which
2084 * doesn't support smoothing.
2086 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2089 case TGSI_SEMANTIC_TESSCOORD
:
2090 value
= si_load_tess_coord(&ctx
->abi
);
2093 case TGSI_SEMANTIC_VERTICESIN
:
2094 value
= si_load_patch_vertices_in(&ctx
->abi
);
2097 case TGSI_SEMANTIC_TESSINNER
:
2098 case TGSI_SEMANTIC_TESSOUTER
:
2099 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2102 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2103 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2105 LLVMValueRef buf
, slot
, val
[4];
2108 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2109 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2110 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2111 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2113 for (i
= 0; i
< 4; i
++)
2114 val
[i
] = buffer_load_const(ctx
, buf
,
2115 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2116 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2120 case TGSI_SEMANTIC_PRIMID
:
2121 value
= get_primitive_id(ctx
, 0);
2124 case TGSI_SEMANTIC_GRID_SIZE
:
2125 value
= ctx
->abi
.num_work_groups
;
2128 case TGSI_SEMANTIC_BLOCK_SIZE
:
2129 value
= get_block_size(&ctx
->abi
);
2132 case TGSI_SEMANTIC_BLOCK_ID
:
2134 LLVMValueRef values
[3];
2136 for (int i
= 0; i
< 3; i
++) {
2137 values
[i
] = ctx
->i32_0
;
2138 if (ctx
->abi
.workgroup_ids
[i
]) {
2139 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2142 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2146 case TGSI_SEMANTIC_THREAD_ID
:
2147 value
= ctx
->abi
.local_invocation_ids
;
2150 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2151 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2154 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2155 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2158 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2159 value
= ac_get_thread_id(&ctx
->ac
);
2162 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2164 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2165 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2166 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2167 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2171 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2172 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2173 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2174 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2176 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2177 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2178 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2179 /* All bits set except LSB */
2180 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2183 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2185 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2186 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2187 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2188 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2189 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2190 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2194 case TGSI_SEMANTIC_CS_USER_DATA
:
2195 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2199 assert(!"unknown system value");
2203 ctx
->system_values
[index
] = value
;
2206 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2208 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2209 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2211 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2214 assert(!ctx
->ac
.lds
);
2216 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2217 LLVMArrayType(ctx
->i8
, lds_size
),
2220 LLVMSetAlignment(var
, 64 * 1024);
2222 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2225 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2226 const struct tgsi_full_declaration
*decl
)
2228 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2229 assert(decl
->Range
.First
== decl
->Range
.Last
);
2231 si_declare_compute_memory(ctx
);
2234 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2237 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2238 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2240 /* Do the bounds checking with a descriptor, because
2241 * doing computation and manual bounds checking of 64-bit
2242 * addresses generates horrible VALU code with very high
2243 * VGPR usage and very low SIMD occupancy.
2245 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2247 LLVMValueRef desc0
, desc1
;
2249 desc1
= LLVMConstInt(ctx
->i32
,
2250 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2252 LLVMValueRef desc_elems
[] = {
2255 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2256 LLVMConstInt(ctx
->i32
,
2257 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2258 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2259 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2260 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2261 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2262 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2265 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2268 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2270 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2271 ctx
->param_const_and_shader_buffers
);
2273 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2274 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2277 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2279 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2280 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2282 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2284 if (sel
->info
.const_buffers_declared
== 1 &&
2285 sel
->info
.shader_buffers_declared
== 0) {
2286 return load_const_buffer_desc_fast_path(ctx
);
2289 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2290 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2291 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2293 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2297 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2299 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2300 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2301 ctx
->param_const_and_shader_buffers
);
2303 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2304 index
= LLVMBuildSub(ctx
->ac
.builder
,
2305 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2308 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2311 static LLVMValueRef
fetch_constant(
2312 struct lp_build_tgsi_context
*bld_base
,
2313 const struct tgsi_full_src_register
*reg
,
2314 enum tgsi_opcode_type type
,
2315 unsigned swizzle_in
)
2317 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2318 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2319 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2321 unsigned swizzle
= swizzle_in
& 0xffff;
2323 LLVMValueRef addr
, bufp
;
2325 if (swizzle_in
== LP_CHAN_ALL
) {
2327 LLVMValueRef values
[4];
2328 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2329 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2331 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2334 /* Split 64-bit loads. */
2335 if (tgsi_type_is_64bit(type
)) {
2336 LLVMValueRef lo
, hi
;
2338 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2339 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2340 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2344 idx
= reg
->Register
.Index
* 4 + swizzle
;
2345 if (reg
->Register
.Indirect
) {
2346 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2348 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2351 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2352 if (sel
->info
.const_buffers_declared
== 1 &&
2353 sel
->info
.shader_buffers_declared
== 0) {
2354 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2355 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2356 return bitcast(bld_base
, type
, result
);
2359 assert(reg
->Register
.Dimension
);
2360 buf
= reg
->Dimension
.Index
;
2362 if (reg
->Dimension
.Indirect
) {
2363 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2365 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2366 reg
->Dimension
.Index
,
2367 ctx
->num_const_buffers
);
2368 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2369 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2370 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2372 bufp
= load_const_buffer_desc(ctx
, buf
);
2374 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2377 /* Initialize arguments for the shader export intrinsic */
2378 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2379 LLVMValueRef
*values
,
2381 struct ac_export_args
*args
)
2383 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2384 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2386 bool is_int8
, is_int10
;
2388 /* Default is 0xf. Adjusted below depending on the format. */
2389 args
->enabled_channels
= 0xf; /* writemask */
2391 /* Specify whether the EXEC mask represents the valid mask */
2392 args
->valid_mask
= 0;
2394 /* Specify whether this is the last export */
2397 /* Specify the target we are exporting */
2398 args
->target
= target
;
2400 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2401 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2402 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2403 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2405 assert(cbuf
>= 0 && cbuf
< 8);
2406 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2407 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2408 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2411 args
->compr
= false;
2412 args
->out
[0] = f32undef
;
2413 args
->out
[1] = f32undef
;
2414 args
->out
[2] = f32undef
;
2415 args
->out
[3] = f32undef
;
2417 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2418 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2419 unsigned bits
, bool hi
) = NULL
;
2421 switch (spi_shader_col_format
) {
2422 case V_028714_SPI_SHADER_ZERO
:
2423 args
->enabled_channels
= 0; /* writemask */
2424 args
->target
= V_008DFC_SQ_EXP_NULL
;
2427 case V_028714_SPI_SHADER_32_R
:
2428 args
->enabled_channels
= 1; /* writemask */
2429 args
->out
[0] = values
[0];
2432 case V_028714_SPI_SHADER_32_GR
:
2433 args
->enabled_channels
= 0x3; /* writemask */
2434 args
->out
[0] = values
[0];
2435 args
->out
[1] = values
[1];
2438 case V_028714_SPI_SHADER_32_AR
:
2439 args
->enabled_channels
= 0x9; /* writemask */
2440 args
->out
[0] = values
[0];
2441 args
->out
[3] = values
[3];
2444 case V_028714_SPI_SHADER_FP16_ABGR
:
2445 packf
= ac_build_cvt_pkrtz_f16
;
2448 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2449 packf
= ac_build_cvt_pknorm_u16
;
2452 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2453 packf
= ac_build_cvt_pknorm_i16
;
2456 case V_028714_SPI_SHADER_UINT16_ABGR
:
2457 packi
= ac_build_cvt_pk_u16
;
2460 case V_028714_SPI_SHADER_SINT16_ABGR
:
2461 packi
= ac_build_cvt_pk_i16
;
2464 case V_028714_SPI_SHADER_32_ABGR
:
2465 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2469 /* Pack f16 or norm_i16/u16. */
2471 for (chan
= 0; chan
< 2; chan
++) {
2472 LLVMValueRef pack_args
[2] = {
2474 values
[2 * chan
+ 1]
2476 LLVMValueRef packed
;
2478 packed
= packf(&ctx
->ac
, pack_args
);
2479 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2481 args
->compr
= 1; /* COMPR flag */
2485 for (chan
= 0; chan
< 2; chan
++) {
2486 LLVMValueRef pack_args
[2] = {
2487 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2488 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2490 LLVMValueRef packed
;
2492 packed
= packi(&ctx
->ac
, pack_args
,
2493 is_int8
? 8 : is_int10
? 10 : 16,
2495 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2497 args
->compr
= 1; /* COMPR flag */
2501 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2504 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2506 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2507 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2508 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2509 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2510 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2511 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2512 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2513 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2515 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2518 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2519 SI_PARAM_ALPHA_REF
);
2520 LLVMValueRef alpha_pass
=
2521 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2522 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2524 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2528 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2530 unsigned samplemask_param
)
2532 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2533 LLVMValueRef coverage
;
2535 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2536 coverage
= LLVMGetParam(ctx
->main_fn
,
2538 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2540 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2542 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2544 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2547 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2548 LLVMConstReal(ctx
->f32
,
2549 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2551 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2554 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2555 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2559 unsigned const_chan
;
2560 LLVMValueRef base_elt
;
2561 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2562 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2563 SI_VS_CONST_CLIP_PLANES
, 0);
2564 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2566 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2567 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2572 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2574 /* Compute dot products of position and user clip plane vectors */
2575 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2576 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2578 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2579 const_chan
) * 4, 0);
2580 base_elt
= buffer_load_const(ctx
, const_resource
,
2582 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2583 out_elts
[const_chan
], args
->out
[chan
]);
2587 args
->enabled_channels
= 0xf;
2588 args
->valid_mask
= 0;
2590 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2595 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2599 if (so
->num_outputs
)
2600 fprintf(stderr
, "STREAMOUT\n");
2602 for (i
= 0; i
< so
->num_outputs
; i
++) {
2603 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2604 so
->output
[i
].start_component
;
2605 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2606 i
, so
->output
[i
].output_buffer
,
2607 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2608 so
->output
[i
].register_index
,
2609 mask
& 1 ? "x" : "",
2610 mask
& 2 ? "y" : "",
2611 mask
& 4 ? "z" : "",
2612 mask
& 8 ? "w" : "");
2616 static void emit_streamout_output(struct si_shader_context
*ctx
,
2617 LLVMValueRef
const *so_buffers
,
2618 LLVMValueRef
const *so_write_offsets
,
2619 struct pipe_stream_output
*stream_out
,
2620 struct si_shader_output_values
*shader_out
)
2622 unsigned buf_idx
= stream_out
->output_buffer
;
2623 unsigned start
= stream_out
->start_component
;
2624 unsigned num_comps
= stream_out
->num_components
;
2625 LLVMValueRef out
[4];
2627 assert(num_comps
&& num_comps
<= 4);
2628 if (!num_comps
|| num_comps
> 4)
2631 /* Load the output as int. */
2632 for (int j
= 0; j
< num_comps
; j
++) {
2633 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2635 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2638 /* Pack the output. */
2639 LLVMValueRef vdata
= NULL
;
2641 switch (num_comps
) {
2642 case 1: /* as i32 */
2645 case 2: /* as v2i32 */
2646 case 3: /* as v3i32 */
2647 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2648 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2651 /* as v4i32 (aligned to 4) */
2652 out
[3] = LLVMGetUndef(ctx
->i32
);
2654 case 4: /* as v4i32 */
2655 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2659 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2661 so_write_offsets
[buf_idx
],
2663 stream_out
->dst_offset
* 4, 1, 1, true, false);
2667 * Write streamout data to buffers for vertex stream @p stream (different
2668 * vertex streams can occur for GS copy shaders).
2670 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2671 struct si_shader_output_values
*outputs
,
2672 unsigned noutput
, unsigned stream
)
2674 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2675 struct pipe_stream_output_info
*so
= &sel
->so
;
2676 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2678 struct lp_build_if_state if_ctx
;
2680 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2681 LLVMValueRef so_vtx_count
=
2682 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2684 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2686 /* can_emit = tid < so_vtx_count; */
2687 LLVMValueRef can_emit
=
2688 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2690 /* Emit the streamout code conditionally. This actually avoids
2691 * out-of-bounds buffer access. The hw tells us via the SGPR
2692 * (so_vtx_count) which threads are allowed to emit streamout data. */
2693 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2695 /* The buffer offset is computed as follows:
2696 * ByteOffset = streamout_offset[buffer_id]*4 +
2697 * (streamout_write_index + thread_id)*stride[buffer_id] +
2701 LLVMValueRef so_write_index
=
2702 LLVMGetParam(ctx
->main_fn
,
2703 ctx
->param_streamout_write_index
);
2705 /* Compute (streamout_write_index + thread_id). */
2706 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2708 /* Load the descriptor and compute the write offset for each
2709 * enabled buffer. */
2710 LLVMValueRef so_write_offset
[4] = {};
2711 LLVMValueRef so_buffers
[4];
2712 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2713 ctx
->param_rw_buffers
);
2715 for (i
= 0; i
< 4; i
++) {
2719 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2720 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2722 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2724 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2725 ctx
->param_streamout_offset
[i
]);
2726 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2728 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2729 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2733 /* Write streamout data. */
2734 for (i
= 0; i
< so
->num_outputs
; i
++) {
2735 unsigned reg
= so
->output
[i
].register_index
;
2740 if (stream
!= so
->output
[i
].stream
)
2743 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2744 &so
->output
[i
], &outputs
[reg
]);
2747 lp_build_endif(&if_ctx
);
2750 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2751 LLVMValueRef
*values
)
2753 struct ac_export_args args
;
2755 si_llvm_init_export_args(ctx
, values
,
2756 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2757 ac_build_export(&ctx
->ac
, &args
);
2760 static void si_build_param_exports(struct si_shader_context
*ctx
,
2761 struct si_shader_output_values
*outputs
,
2764 struct si_shader
*shader
= ctx
->shader
;
2765 unsigned param_count
= 0;
2767 for (unsigned i
= 0; i
< noutput
; i
++) {
2768 unsigned semantic_name
= outputs
[i
].semantic_name
;
2769 unsigned semantic_index
= outputs
[i
].semantic_index
;
2771 if (outputs
[i
].vertex_stream
[0] != 0 &&
2772 outputs
[i
].vertex_stream
[1] != 0 &&
2773 outputs
[i
].vertex_stream
[2] != 0 &&
2774 outputs
[i
].vertex_stream
[3] != 0)
2777 switch (semantic_name
) {
2778 case TGSI_SEMANTIC_LAYER
:
2779 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2780 case TGSI_SEMANTIC_CLIPDIST
:
2781 case TGSI_SEMANTIC_COLOR
:
2782 case TGSI_SEMANTIC_BCOLOR
:
2783 case TGSI_SEMANTIC_PRIMID
:
2784 case TGSI_SEMANTIC_FOG
:
2785 case TGSI_SEMANTIC_TEXCOORD
:
2786 case TGSI_SEMANTIC_GENERIC
:
2792 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2793 semantic_index
< SI_MAX_IO_GENERIC
) &&
2794 shader
->key
.opt
.kill_outputs
&
2795 (1ull << si_shader_io_get_unique_index(semantic_name
,
2796 semantic_index
, true)))
2799 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2801 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2802 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2805 shader
->info
.nr_param_exports
= param_count
;
2809 * Vertex color clamping.
2811 * This uses a state constant loaded in a user data SGPR and
2812 * an IF statement is added that clamps all colors if the constant
2815 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2816 struct si_shader_output_values
*outputs
,
2819 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2820 bool has_colors
= false;
2822 /* Store original colors to alloca variables. */
2823 for (unsigned i
= 0; i
< noutput
; i
++) {
2824 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2825 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2828 for (unsigned j
= 0; j
< 4; j
++) {
2829 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2830 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2838 /* The state is in the first bit of the user SGPR. */
2839 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2840 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2842 struct lp_build_if_state if_ctx
;
2843 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
2845 /* Store clamped colors to alloca variables within the conditional block. */
2846 for (unsigned i
= 0; i
< noutput
; i
++) {
2847 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2848 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2851 for (unsigned j
= 0; j
< 4; j
++) {
2852 LLVMBuildStore(ctx
->ac
.builder
,
2853 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2857 lp_build_endif(&if_ctx
);
2859 /* Load clamped colors */
2860 for (unsigned i
= 0; i
< noutput
; i
++) {
2861 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2862 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2865 for (unsigned j
= 0; j
< 4; j
++) {
2866 outputs
[i
].values
[j
] =
2867 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2872 /* Generate export instructions for hardware VS shader stage */
2873 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2874 struct si_shader_output_values
*outputs
,
2877 struct si_shader
*shader
= ctx
->shader
;
2878 struct ac_export_args pos_args
[4] = {};
2879 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2883 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2885 /* Build position exports. */
2886 for (i
= 0; i
< noutput
; i
++) {
2887 switch (outputs
[i
].semantic_name
) {
2888 case TGSI_SEMANTIC_POSITION
:
2889 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2890 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2892 case TGSI_SEMANTIC_PSIZE
:
2893 psize_value
= outputs
[i
].values
[0];
2895 case TGSI_SEMANTIC_LAYER
:
2896 layer_value
= outputs
[i
].values
[0];
2898 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2899 viewport_index_value
= outputs
[i
].values
[0];
2901 case TGSI_SEMANTIC_EDGEFLAG
:
2902 edgeflag_value
= outputs
[i
].values
[0];
2904 case TGSI_SEMANTIC_CLIPDIST
:
2905 if (!shader
->key
.opt
.clip_disable
) {
2906 unsigned index
= 2 + outputs
[i
].semantic_index
;
2907 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2908 V_008DFC_SQ_EXP_POS
+ index
,
2912 case TGSI_SEMANTIC_CLIPVERTEX
:
2913 if (!shader
->key
.opt
.clip_disable
) {
2914 si_llvm_emit_clipvertex(ctx
, pos_args
,
2921 /* We need to add the position output manually if it's missing. */
2922 if (!pos_args
[0].out
[0]) {
2923 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2924 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2925 pos_args
[0].done
= 0; /* last export? */
2926 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2927 pos_args
[0].compr
= 0; /* COMPR flag */
2928 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2929 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2930 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2931 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2934 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2935 if (shader
->selector
->info
.writes_psize
||
2936 shader
->selector
->info
.writes_edgeflag
||
2937 shader
->selector
->info
.writes_viewport_index
||
2938 shader
->selector
->info
.writes_layer
) {
2939 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2940 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2941 (shader
->selector
->info
.writes_layer
<< 2);
2943 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2944 pos_args
[1].done
= 0; /* last export? */
2945 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2946 pos_args
[1].compr
= 0; /* COMPR flag */
2947 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2948 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2949 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2950 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2952 if (shader
->selector
->info
.writes_psize
)
2953 pos_args
[1].out
[0] = psize_value
;
2955 if (shader
->selector
->info
.writes_edgeflag
) {
2956 /* The output is a float, but the hw expects an integer
2957 * with the first bit containing the edge flag. */
2958 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2961 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2965 /* The LLVM intrinsic expects a float. */
2966 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2969 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2970 /* GFX9 has the layer in out.z[10:0] and the viewport
2971 * index in out.z[19:16].
2973 if (shader
->selector
->info
.writes_layer
)
2974 pos_args
[1].out
[2] = layer_value
;
2976 if (shader
->selector
->info
.writes_viewport_index
) {
2977 LLVMValueRef v
= viewport_index_value
;
2979 v
= ac_to_integer(&ctx
->ac
, v
);
2980 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2981 LLVMConstInt(ctx
->i32
, 16, 0), "");
2982 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2983 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2984 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2985 pos_args
[1].enabled_channels
|= 1 << 2;
2988 if (shader
->selector
->info
.writes_layer
)
2989 pos_args
[1].out
[2] = layer_value
;
2991 if (shader
->selector
->info
.writes_viewport_index
) {
2992 pos_args
[1].out
[3] = viewport_index_value
;
2993 pos_args
[1].enabled_channels
|= 1 << 3;
2998 for (i
= 0; i
< 4; i
++)
2999 if (pos_args
[i
].out
[0])
3000 shader
->info
.nr_pos_exports
++;
3003 for (i
= 0; i
< 4; i
++) {
3004 if (!pos_args
[i
].out
[0])
3007 /* Specify the target we are exporting */
3008 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3010 if (pos_idx
== shader
->info
.nr_pos_exports
)
3011 /* Specify that this is the last export */
3012 pos_args
[i
].done
= 1;
3014 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3017 /* Build parameter exports. */
3018 si_build_param_exports(ctx
, outputs
, noutput
);
3022 * Forward all outputs from the vertex shader to the TES. This is only used
3023 * for the fixed function TCS.
3025 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3027 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3028 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3029 LLVMValueRef lds_vertex_stride
, lds_base
;
3032 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3033 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3034 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3036 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3037 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3038 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3041 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3043 unsigned i
= u_bit_scan64(&inputs
);
3045 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3046 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3049 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3050 get_rel_patch_id(ctx
),
3052 LLVMConstInt(ctx
->i32
, i
, 0));
3054 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3056 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3057 buffer_offset
, 0, 1, 0, true, false);
3061 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3062 LLVMValueRef rel_patch_id
,
3063 LLVMValueRef invocation_id
,
3064 LLVMValueRef tcs_out_current_patch_data_offset
,
3065 LLVMValueRef invoc0_tf_outer
[4],
3066 LLVMValueRef invoc0_tf_inner
[2])
3068 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3069 struct si_shader
*shader
= ctx
->shader
;
3070 unsigned tess_inner_index
, tess_outer_index
;
3071 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3072 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3073 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3074 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3076 /* Add a barrier before loading tess factors from LDS. */
3077 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3078 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3080 /* Do this only for invocation 0, because the tess levels are per-patch,
3083 * This can't jump, because invocation 0 executes this. It should
3084 * at least mask out the loads and stores for other invocations.
3086 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3087 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3088 invocation_id
, ctx
->i32_0
, ""));
3090 /* Determine the layout of one tess factor element in the buffer. */
3091 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3092 case PIPE_PRIM_LINES
:
3093 stride
= 2; /* 2 dwords, 1 vec2 store */
3097 case PIPE_PRIM_TRIANGLES
:
3098 stride
= 4; /* 4 dwords, 1 vec4 store */
3102 case PIPE_PRIM_QUADS
:
3103 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3112 for (i
= 0; i
< 4; i
++) {
3113 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3114 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3117 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3118 /* Tess factors are in VGPRs. */
3119 for (i
= 0; i
< outer_comps
; i
++)
3120 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3121 for (i
= 0; i
< inner_comps
; i
++)
3122 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3124 /* Load tess_inner and tess_outer from LDS.
3125 * Any invocation can write them, so we can't get them from a temporary.
3127 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3128 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3130 lds_base
= tcs_out_current_patch_data_offset
;
3131 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3132 LLVMConstInt(ctx
->i32
,
3133 tess_inner_index
* 4, 0), "");
3134 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3135 LLVMConstInt(ctx
->i32
,
3136 tess_outer_index
* 4, 0), "");
3138 for (i
= 0; i
< outer_comps
; i
++) {
3140 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3142 for (i
= 0; i
< inner_comps
; i
++) {
3143 inner
[i
] = out
[outer_comps
+i
] =
3144 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3148 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3149 /* For isolines, the hardware expects tess factors in the
3150 * reverse order from what GLSL / TGSI specify.
3152 LLVMValueRef tmp
= out
[0];
3157 /* Convert the outputs to vectors for stores. */
3158 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3162 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3164 /* Get the buffer. */
3165 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3167 /* Get the offset. */
3168 tf_base
= LLVMGetParam(ctx
->main_fn
,
3169 ctx
->param_tcs_factor_offset
);
3170 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3171 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3173 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3174 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3175 rel_patch_id
, ctx
->i32_0
, ""));
3177 /* Store the dynamic HS control word. */
3179 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3180 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3181 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3182 1, ctx
->i32_0
, tf_base
,
3183 offset
, 1, 0, true, false);
3187 lp_build_endif(&inner_if_ctx
);
3189 /* Store the tessellation factors. */
3190 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3191 MIN2(stride
, 4), byteoffset
, tf_base
,
3192 offset
, 1, 0, true, false);
3195 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3196 stride
- 4, byteoffset
, tf_base
,
3197 offset
, 1, 0, true, false);
3199 /* Store the tess factors into the offchip buffer if TES reads them. */
3200 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3201 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3202 LLVMValueRef tf_inner_offset
;
3203 unsigned param_outer
, param_inner
;
3205 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3206 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3208 param_outer
= si_shader_io_get_unique_index_patch(
3209 TGSI_SEMANTIC_TESSOUTER
, 0);
3210 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3211 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3213 unsigned outer_vec_size
=
3214 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3215 outer_comps
: util_next_power_of_two(outer_comps
);
3216 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3218 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3219 outer_comps
, tf_outer_offset
,
3220 base
, 0, 1, 0, true, false);
3222 param_inner
= si_shader_io_get_unique_index_patch(
3223 TGSI_SEMANTIC_TESSINNER
, 0);
3224 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3225 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3227 inner_vec
= inner_comps
== 1 ? inner
[0] :
3228 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3229 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3230 inner_comps
, tf_inner_offset
,
3231 base
, 0, 1, 0, true, false);
3235 lp_build_endif(&if_ctx
);
3239 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3240 unsigned param
, unsigned return_index
)
3242 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3243 LLVMGetParam(ctx
->main_fn
, param
),
3248 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3249 unsigned param
, unsigned return_index
)
3251 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3252 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3254 return LLVMBuildInsertValue(builder
, ret
,
3255 ac_to_float(&ctx
->ac
, p
),
3260 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3261 unsigned param
, unsigned return_index
)
3263 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3264 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3265 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3266 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3269 /* This only writes the tessellation factor levels. */
3270 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3271 unsigned max_outputs
,
3272 LLVMValueRef
*addrs
)
3274 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3275 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3276 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3277 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3279 si_copy_tcs_inputs(bld_base
);
3281 rel_patch_id
= get_rel_patch_id(ctx
);
3282 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3283 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3285 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3286 LLVMBasicBlockRef blocks
[2] = {
3287 LLVMGetInsertBlock(builder
),
3288 ctx
->merged_wrap_if_state
.entry_block
3290 LLVMValueRef values
[2];
3292 lp_build_endif(&ctx
->merged_wrap_if_state
);
3294 values
[0] = rel_patch_id
;
3295 values
[1] = LLVMGetUndef(ctx
->i32
);
3296 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3298 values
[0] = tf_lds_offset
;
3299 values
[1] = LLVMGetUndef(ctx
->i32
);
3300 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3302 values
[0] = invocation_id
;
3303 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3304 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3307 /* Return epilog parameters from this function. */
3308 LLVMValueRef ret
= ctx
->return_value
;
3311 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3312 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3313 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3314 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3315 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3316 /* Tess offchip and tess factor offsets are at the beginning. */
3317 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3318 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3319 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3321 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3322 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3323 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3324 GFX6_SGPR_TCS_OUT_LAYOUT
);
3325 /* Tess offchip and tess factor offsets are after user SGPRs. */
3326 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3327 GFX6_TCS_NUM_USER_SGPR
);
3328 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3329 GFX6_TCS_NUM_USER_SGPR
+ 1);
3330 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3334 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3335 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3336 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3338 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3339 * the invocation_id output does not alias the tcs_rel_ids input,
3340 * which saves a V_MOV on gfx9.
3344 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3345 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3347 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3348 vgpr
++; /* skip the tess factor LDS offset */
3349 for (unsigned i
= 0; i
< 6; i
++) {
3350 LLVMValueRef value
=
3351 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3352 value
= ac_to_float(&ctx
->ac
, value
);
3353 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3356 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3358 ctx
->return_value
= ret
;
3361 /* Pass TCS inputs from LS to TCS on GFX9. */
3362 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3364 LLVMValueRef ret
= ctx
->return_value
;
3366 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3367 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3368 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3370 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3371 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3373 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3374 8 + SI_SGPR_RW_BUFFERS
);
3375 ret
= si_insert_input_ptr(ctx
, ret
,
3376 ctx
->param_bindless_samplers_and_images
,
3377 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3379 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3380 8 + SI_SGPR_VS_STATE_BITS
);
3382 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3383 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3384 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3385 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3386 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3387 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3389 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3390 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3391 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3393 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3394 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3396 ctx
->return_value
= ret
;
3399 /* Pass GS inputs from ES to GS on GFX9. */
3400 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3402 LLVMValueRef ret
= ctx
->return_value
;
3404 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3405 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3406 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3407 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3408 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3410 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3411 8 + SI_SGPR_RW_BUFFERS
);
3412 ret
= si_insert_input_ptr(ctx
, ret
,
3413 ctx
->param_bindless_samplers_and_images
,
3414 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3417 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3418 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3420 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3422 for (unsigned i
= 0; i
< 5; i
++) {
3423 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3424 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3426 ctx
->return_value
= ret
;
3429 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3430 unsigned max_outputs
,
3431 LLVMValueRef
*addrs
)
3433 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3434 struct si_shader
*shader
= ctx
->shader
;
3435 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3437 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3438 ctx
->param_rel_auto_id
);
3439 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3440 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3441 vertex_dw_stride
, "");
3443 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3444 * its inputs from it. */
3445 for (i
= 0; i
< info
->num_outputs
; i
++) {
3446 unsigned name
= info
->output_semantic_name
[i
];
3447 unsigned index
= info
->output_semantic_index
[i
];
3449 /* The ARB_shader_viewport_layer_array spec contains the
3452 * 2) What happens if gl_ViewportIndex or gl_Layer is
3453 * written in the vertex shader and a geometry shader is
3456 * RESOLVED: The value written by the last vertex processing
3457 * stage is used. If the last vertex processing stage
3458 * (vertex, tessellation evaluation or geometry) does not
3459 * statically assign to gl_ViewportIndex or gl_Layer, index
3460 * or layer zero is assumed.
3462 * So writes to those outputs in VS-as-LS are simply ignored.
3464 if (name
== TGSI_SEMANTIC_LAYER
||
3465 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3468 int param
= si_shader_io_get_unique_index(name
, index
, false);
3469 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3470 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3472 for (chan
= 0; chan
< 4; chan
++) {
3473 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3476 lshs_lds_store(ctx
, chan
, dw_addr
,
3477 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3481 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3482 si_set_ls_return_value_for_tcs(ctx
);
3485 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3486 unsigned max_outputs
,
3487 LLVMValueRef
*addrs
)
3489 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3490 struct si_shader
*es
= ctx
->shader
;
3491 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3492 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3493 ctx
->param_es2gs_offset
);
3494 LLVMValueRef lds_base
= NULL
;
3498 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3499 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3500 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3501 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3502 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3503 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3504 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3505 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3506 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3509 for (i
= 0; i
< info
->num_outputs
; i
++) {
3512 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3513 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3516 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3517 info
->output_semantic_index
[i
], false);
3519 for (chan
= 0; chan
< 4; chan
++) {
3520 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3523 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3524 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3526 /* GFX9 has the ESGS ring in LDS. */
3527 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3528 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3529 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3530 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3534 ac_build_buffer_store_dword(&ctx
->ac
,
3536 out_val
, 1, NULL
, soffset
,
3537 (4 * param
+ chan
) * 4,
3542 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3543 si_set_es_return_value_for_gs(ctx
);
3546 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3548 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3549 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3551 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3554 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3556 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3557 si_get_gs_wave_id(ctx
));
3559 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3560 lp_build_endif(&ctx
->merged_wrap_if_state
);
3563 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3564 unsigned max_outputs
,
3565 LLVMValueRef
*addrs
)
3567 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3568 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3570 assert(info
->num_outputs
<= max_outputs
);
3572 emit_gs_epilogue(ctx
);
3575 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3577 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3578 emit_gs_epilogue(ctx
);
3581 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3582 unsigned max_outputs
,
3583 LLVMValueRef
*addrs
)
3585 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3586 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3587 struct si_shader_output_values
*outputs
= NULL
;
3590 assert(!ctx
->shader
->is_gs_copy_shader
);
3591 assert(info
->num_outputs
<= max_outputs
);
3593 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3595 for (i
= 0; i
< info
->num_outputs
; i
++) {
3596 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3597 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3599 for (j
= 0; j
< 4; j
++) {
3600 outputs
[i
].values
[j
] =
3601 LLVMBuildLoad(ctx
->ac
.builder
,
3604 outputs
[i
].vertex_stream
[j
] =
3605 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3609 if (ctx
->shader
->selector
->so
.num_outputs
)
3610 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3612 /* Export PrimitiveID. */
3613 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3614 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3615 outputs
[i
].semantic_index
= 0;
3616 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3617 for (j
= 1; j
< 4; j
++)
3618 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3620 memset(outputs
[i
].vertex_stream
, 0,
3621 sizeof(outputs
[i
].vertex_stream
));
3625 si_llvm_export_vs(ctx
, outputs
, i
);
3629 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3630 unsigned max_outputs
,
3631 LLVMValueRef
*addrs
)
3633 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3634 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3635 LLVMValueRef pos
[4] = {};
3637 assert(info
->num_outputs
<= max_outputs
);
3639 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3640 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3643 for (unsigned chan
= 0; chan
< 4; chan
++)
3644 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3647 assert(pos
[0] != NULL
);
3649 /* Return the position output. */
3650 LLVMValueRef ret
= ctx
->return_value
;
3651 for (unsigned chan
= 0; chan
< 4; chan
++)
3652 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3653 ctx
->return_value
= ret
;
3656 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3658 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3660 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3661 &ctx
->outputs
[0][0]);
3664 struct si_ps_exports
{
3666 struct ac_export_args args
[10];
3669 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3670 LLVMValueRef depth
, LLVMValueRef stencil
,
3671 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3673 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3674 struct ac_export_args args
;
3676 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3678 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3681 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3682 LLVMValueRef
*color
, unsigned index
,
3683 unsigned samplemask_param
,
3684 bool is_last
, struct si_ps_exports
*exp
)
3686 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3690 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3691 for (i
= 0; i
< 4; i
++)
3692 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3695 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3696 color
[3] = ctx
->ac
.f32_1
;
3700 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3701 si_alpha_test(bld_base
, color
[3]);
3703 /* Line & polygon smoothing */
3704 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3705 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3708 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3709 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3710 struct ac_export_args args
[8];
3713 /* Get the export arguments, also find out what the last one is. */
3714 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3715 si_llvm_init_export_args(ctx
, color
,
3716 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3717 if (args
[c
].enabled_channels
)
3721 /* Emit all exports. */
3722 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3723 if (is_last
&& last
== c
) {
3724 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3725 args
[c
].done
= 1; /* DONE bit */
3726 } else if (!args
[c
].enabled_channels
)
3727 continue; /* unnecessary NULL export */
3729 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3732 struct ac_export_args args
;
3735 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3738 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3739 args
.done
= 1; /* DONE bit */
3740 } else if (!args
.enabled_channels
)
3741 return; /* unnecessary NULL export */
3743 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3747 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3748 struct si_ps_exports
*exp
)
3750 for (unsigned i
= 0; i
< exp
->num
; i
++)
3751 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3755 * Return PS outputs in this order:
3757 * v[0:3] = color0.xyzw
3758 * v[4:7] = color1.xyzw
3763 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3765 * The alpha-ref SGPR is returned via its original location.
3767 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3768 unsigned max_outputs
,
3769 LLVMValueRef
*addrs
)
3771 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3772 struct si_shader
*shader
= ctx
->shader
;
3773 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3774 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3775 unsigned i
, j
, first_vgpr
, vgpr
;
3777 LLVMValueRef color
[8][4] = {};
3778 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3781 if (ctx
->postponed_kill
)
3782 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3784 /* Read the output values. */
3785 for (i
= 0; i
< info
->num_outputs
; i
++) {
3786 unsigned semantic_name
= info
->output_semantic_name
[i
];
3787 unsigned semantic_index
= info
->output_semantic_index
[i
];
3789 switch (semantic_name
) {
3790 case TGSI_SEMANTIC_COLOR
:
3791 assert(semantic_index
< 8);
3792 for (j
= 0; j
< 4; j
++) {
3793 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3794 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3795 color
[semantic_index
][j
] = result
;
3798 case TGSI_SEMANTIC_POSITION
:
3799 depth
= LLVMBuildLoad(builder
,
3800 addrs
[4 * i
+ 2], "");
3802 case TGSI_SEMANTIC_STENCIL
:
3803 stencil
= LLVMBuildLoad(builder
,
3804 addrs
[4 * i
+ 1], "");
3806 case TGSI_SEMANTIC_SAMPLEMASK
:
3807 samplemask
= LLVMBuildLoad(builder
,
3808 addrs
[4 * i
+ 0], "");
3811 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3816 /* Fill the return structure. */
3817 ret
= ctx
->return_value
;
3820 ret
= LLVMBuildInsertValue(builder
, ret
,
3821 ac_to_integer(&ctx
->ac
,
3822 LLVMGetParam(ctx
->main_fn
,
3823 SI_PARAM_ALPHA_REF
)),
3824 SI_SGPR_ALPHA_REF
, "");
3827 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3828 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3832 for (j
= 0; j
< 4; j
++)
3833 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3836 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3838 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3840 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3842 /* Add the input sample mask for smoothing at the end. */
3843 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3844 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3845 ret
= LLVMBuildInsertValue(builder
, ret
,
3846 LLVMGetParam(ctx
->main_fn
,
3847 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3849 ctx
->return_value
= ret
;
3852 static void membar_emit(
3853 const struct lp_build_tgsi_action
*action
,
3854 struct lp_build_tgsi_context
*bld_base
,
3855 struct lp_build_emit_data
*emit_data
)
3857 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3858 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3859 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3860 unsigned waitcnt
= NOOP_WAITCNT
;
3862 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3863 waitcnt
&= VM_CNT
& LGKM_CNT
;
3865 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3866 TGSI_MEMBAR_SHADER_BUFFER
|
3867 TGSI_MEMBAR_SHADER_IMAGE
))
3870 if (flags
& TGSI_MEMBAR_SHARED
)
3871 waitcnt
&= LGKM_CNT
;
3873 if (waitcnt
!= NOOP_WAITCNT
)
3874 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3877 static void clock_emit(
3878 const struct lp_build_tgsi_action
*action
,
3879 struct lp_build_tgsi_context
*bld_base
,
3880 struct lp_build_emit_data
*emit_data
)
3882 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3883 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3885 emit_data
->output
[0] =
3886 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3887 emit_data
->output
[1] =
3888 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3891 static void si_llvm_emit_ddxy(
3892 const struct lp_build_tgsi_action
*action
,
3893 struct lp_build_tgsi_context
*bld_base
,
3894 struct lp_build_emit_data
*emit_data
)
3896 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3897 unsigned opcode
= emit_data
->info
->opcode
;
3902 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3903 mask
= AC_TID_MASK_LEFT
;
3904 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3905 mask
= AC_TID_MASK_TOP
;
3907 mask
= AC_TID_MASK_TOP_LEFT
;
3909 /* for DDX we want to next X pixel, DDY next Y pixel. */
3910 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3912 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3913 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3914 emit_data
->output
[emit_data
->chan
] = val
;
3917 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3918 struct lp_build_tgsi_context
*bld_base
,
3919 struct lp_build_emit_data
*emit_data
)
3921 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3922 struct si_shader
*shader
= ctx
->shader
;
3923 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3924 LLVMValueRef interp_param
;
3925 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3926 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3927 int input_base
, input_array_size
;
3930 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3931 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3932 int interp_param_idx
;
3936 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3937 /* offset is in second src, first two channels */
3938 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3940 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3942 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3943 LLVMValueRef sample_position
;
3944 LLVMValueRef sample_id
;
3945 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3947 /* fetch sample ID, then fetch its sample position,
3948 * and place into first two channels.
3950 sample_id
= lp_build_emit_fetch(bld_base
,
3951 emit_data
->inst
, 1, TGSI_CHAN_X
);
3952 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3954 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3955 * Language 4.50 spec says about interpolateAtSample:
3957 * "Returns the value of the input interpolant variable at
3958 * the location of sample number sample. If multisample
3959 * buffers are not available, the input variable will be
3960 * evaluated at the center of the pixel. If sample sample
3961 * does not exist, the position used to interpolate the
3962 * input variable is undefined."
3964 * This means that sample_id values outside of the valid are
3965 * in fact valid input, and the usual mechanism for loading the
3966 * sample position doesn't work.
3968 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3969 LLVMValueRef center
[4] = {
3970 LLVMConstReal(ctx
->f32
, 0.5),
3971 LLVMConstReal(ctx
->f32
, 0.5),
3976 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3978 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
3981 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3984 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
3985 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
3987 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
3990 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
3992 if (input
->Register
.Indirect
) {
3993 unsigned array_id
= input
->Indirect
.ArrayID
;
3996 input_base
= info
->input_array_first
[array_id
];
3997 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
3999 input_base
= inst
->Src
[0].Register
.Index
;
4000 input_array_size
= info
->num_inputs
- input_base
;
4003 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4004 1, input
->Register
.Index
- input_base
);
4006 input_base
= inst
->Src
[0].Register
.Index
;
4007 input_array_size
= 1;
4008 array_idx
= ctx
->i32_0
;
4011 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4013 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4014 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4015 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4017 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4019 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4020 if (interp_param_idx
== -1)
4022 else if (interp_param_idx
)
4023 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4025 interp_param
= NULL
;
4027 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4028 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4029 LLVMValueRef ij_out
[2];
4030 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4033 * take the I then J parameters, and the DDX/Y for it, and
4034 * calculate the IJ inputs for the interpolator.
4035 * temp1 = ddx * offset/sample.x + I;
4036 * interp_param.I = ddy * offset/sample.y + temp1;
4037 * temp1 = ddx * offset/sample.x + J;
4038 * interp_param.J = ddy * offset/sample.y + temp1;
4040 for (i
= 0; i
< 2; i
++) {
4041 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4042 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4043 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4044 ddxy_out
, ix_ll
, "");
4045 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4046 ddxy_out
, iy_ll
, "");
4047 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4048 interp_param
, ix_ll
, "");
4051 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4053 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4054 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4056 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4060 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4062 for (chan
= 0; chan
< 4; chan
++) {
4063 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4064 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4066 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4067 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4070 i
= LLVMBuildExtractElement(
4071 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4072 j
= LLVMBuildExtractElement(
4073 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4075 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4078 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4079 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4082 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4083 ctx
->ac
.builder
, gather
, array_idx
, "");
4087 static void vote_all_emit(
4088 const struct lp_build_tgsi_action
*action
,
4089 struct lp_build_tgsi_context
*bld_base
,
4090 struct lp_build_emit_data
*emit_data
)
4092 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4094 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4095 emit_data
->output
[emit_data
->chan
] =
4096 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4099 static void vote_any_emit(
4100 const struct lp_build_tgsi_action
*action
,
4101 struct lp_build_tgsi_context
*bld_base
,
4102 struct lp_build_emit_data
*emit_data
)
4104 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4106 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4107 emit_data
->output
[emit_data
->chan
] =
4108 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4111 static void vote_eq_emit(
4112 const struct lp_build_tgsi_action
*action
,
4113 struct lp_build_tgsi_context
*bld_base
,
4114 struct lp_build_emit_data
*emit_data
)
4116 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4118 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4119 emit_data
->output
[emit_data
->chan
] =
4120 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4123 static void ballot_emit(
4124 const struct lp_build_tgsi_action
*action
,
4125 struct lp_build_tgsi_context
*bld_base
,
4126 struct lp_build_emit_data
*emit_data
)
4128 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4129 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4132 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4133 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4134 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4136 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4137 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4140 static void read_lane_emit(
4141 const struct lp_build_tgsi_action
*action
,
4142 struct lp_build_tgsi_context
*bld_base
,
4143 struct lp_build_emit_data
*emit_data
)
4145 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4147 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4148 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4149 0, emit_data
->src_chan
);
4151 /* Always read the source invocation (= lane) from the X channel. */
4152 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4154 emit_data
->arg_count
= 2;
4157 /* We currently have no other way to prevent LLVM from lifting the icmp
4158 * calls to a dominating basic block.
4160 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4162 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4163 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4165 emit_data
->output
[emit_data
->chan
] =
4166 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4167 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4168 AC_FUNC_ATTR_READNONE
|
4169 AC_FUNC_ATTR_CONVERGENT
);
4172 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4173 struct lp_build_emit_data
*emit_data
)
4175 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4176 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4180 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4182 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4183 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4187 /* Emit one vertex from the geometry shader */
4188 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4190 LLVMValueRef
*addrs
)
4192 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4193 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4194 struct si_shader
*shader
= ctx
->shader
;
4195 struct lp_build_if_state if_state
;
4196 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4197 ctx
->param_gs2vs_offset
);
4198 LLVMValueRef gs_next_vertex
;
4199 LLVMValueRef can_emit
;
4200 unsigned chan
, offset
;
4203 /* Write vertex attribute values to GSVS ring */
4204 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4205 ctx
->gs_next_vertex
[stream
],
4208 /* If this thread has already emitted the declared maximum number of
4209 * vertices, skip the write: excessive vertex emissions are not
4210 * supposed to have any effect.
4212 * If the shader has no writes to memory, kill it instead. This skips
4213 * further memory loads and may allow LLVM to skip to the end
4216 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4217 LLVMConstInt(ctx
->i32
,
4218 shader
->selector
->gs_max_out_vertices
, 0), "");
4220 bool use_kill
= !info
->writes_memory
;
4222 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4224 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4228 for (i
= 0; i
< info
->num_outputs
; i
++) {
4229 for (chan
= 0; chan
< 4; chan
++) {
4230 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4231 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4234 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4235 LLVMValueRef voffset
=
4236 LLVMConstInt(ctx
->i32
, offset
*
4237 shader
->selector
->gs_max_out_vertices
, 0);
4240 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4241 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4242 LLVMConstInt(ctx
->i32
, 4, 0), "");
4244 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4246 ac_build_buffer_store_dword(&ctx
->ac
,
4247 ctx
->gsvs_ring
[stream
],
4249 voffset
, soffset
, 0,
4254 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4255 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4257 /* Signal vertex emission if vertex data was written. */
4259 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4260 si_get_gs_wave_id(ctx
));
4264 lp_build_endif(&if_state
);
4267 /* Emit one vertex from the geometry shader */
4268 static void si_tgsi_emit_vertex(
4269 const struct lp_build_tgsi_action
*action
,
4270 struct lp_build_tgsi_context
*bld_base
,
4271 struct lp_build_emit_data
*emit_data
)
4273 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4274 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4276 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4279 /* Cut one primitive from the geometry shader */
4280 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4283 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4285 /* Signal primitive cut */
4286 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4287 si_get_gs_wave_id(ctx
));
4290 /* Cut one primitive from the geometry shader */
4291 static void si_tgsi_emit_primitive(
4292 const struct lp_build_tgsi_action
*action
,
4293 struct lp_build_tgsi_context
*bld_base
,
4294 struct lp_build_emit_data
*emit_data
)
4296 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4298 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4301 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4302 struct lp_build_tgsi_context
*bld_base
,
4303 struct lp_build_emit_data
*emit_data
)
4305 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4307 /* GFX6 only (thanks to a hw bug workaround):
4308 * The real barrier instruction isn’t needed, because an entire patch
4309 * always fits into a single wave.
4311 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4312 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4313 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4317 ac_build_s_barrier(&ctx
->ac
);
4320 void si_create_function(struct si_shader_context
*ctx
,
4322 LLVMTypeRef
*returns
, unsigned num_returns
,
4323 struct si_function_info
*fninfo
,
4324 unsigned max_workgroup_size
)
4328 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4329 fninfo
->types
, fninfo
->num_params
);
4330 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4332 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4333 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4335 /* The combination of:
4339 * allows the optimization passes to move loads and reduces
4340 * SGPR spilling significantly.
4342 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4343 AC_FUNC_ATTR_INREG
);
4345 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4346 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4347 AC_FUNC_ATTR_NOALIAS
);
4348 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4352 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4353 if (fninfo
->assign
[i
])
4354 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4357 if (ctx
->screen
->info
.address32_hi
) {
4358 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4359 "amdgpu-32bit-address-high-bits",
4360 ctx
->screen
->info
.address32_hi
);
4363 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4365 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4366 "no-signed-zeros-fp-math",
4369 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4370 /* These were copied from some LLVM test. */
4371 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4372 "less-precise-fpmad",
4374 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4377 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4380 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4386 static void declare_streamout_params(struct si_shader_context
*ctx
,
4387 struct pipe_stream_output_info
*so
,
4388 struct si_function_info
*fninfo
)
4392 /* Streamout SGPRs. */
4393 if (so
->num_outputs
) {
4394 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4395 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4397 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4399 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4401 /* A streamout buffer offset is loaded if the stride is non-zero. */
4402 for (i
= 0; i
< 4; i
++) {
4406 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4410 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4412 switch (shader
->selector
->type
) {
4413 case PIPE_SHADER_TESS_CTRL
:
4414 /* Return this so that LLVM doesn't remove s_barrier
4415 * instructions on chips where we use s_barrier. */
4416 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 64;
4418 case PIPE_SHADER_GEOMETRY
:
4419 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4421 case PIPE_SHADER_COMPUTE
:
4422 break; /* see below */
4428 const unsigned *properties
= shader
->selector
->info
.properties
;
4429 unsigned max_work_group_size
=
4430 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4431 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4432 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4434 if (!max_work_group_size
) {
4435 /* This is a variable group size compute shader,
4436 * compile it for the maximum possible group size.
4438 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4440 return max_work_group_size
;
4443 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4444 struct si_function_info
*fninfo
,
4447 LLVMTypeRef const_shader_buf_type
;
4449 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4450 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4451 const_shader_buf_type
= ctx
->f32
;
4453 const_shader_buf_type
= ctx
->v4i32
;
4455 unsigned const_and_shader_buffers
=
4456 add_arg(fninfo
, ARG_SGPR
,
4457 ac_array_in_const32_addr_space(const_shader_buf_type
));
4460 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4463 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4464 struct si_function_info
*fninfo
,
4467 unsigned samplers_and_images
=
4468 add_arg(fninfo
, ARG_SGPR
,
4469 ac_array_in_const32_addr_space(ctx
->v8i32
));
4472 ctx
->param_samplers_and_images
= samplers_and_images
;
4475 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4476 struct si_function_info
*fninfo
,
4479 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4480 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4483 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4484 struct si_function_info
*fninfo
)
4486 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4487 ac_array_in_const32_addr_space(ctx
->v4i32
));
4488 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4489 ac_array_in_const32_addr_space(ctx
->v8i32
));
4492 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4493 struct si_function_info
*fninfo
)
4495 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4496 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4497 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4498 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4501 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4502 struct si_function_info
*fninfo
,
4503 unsigned *num_prolog_vgprs
)
4505 struct si_shader
*shader
= ctx
->shader
;
4507 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4508 if (shader
->key
.as_ls
) {
4509 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4510 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4512 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4513 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4515 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4517 if (!shader
->is_gs_copy_shader
) {
4518 /* Vertex load indices. */
4519 ctx
->param_vertex_index0
= fninfo
->num_params
;
4520 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4521 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4522 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4526 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4527 struct si_function_info
*fninfo
,
4528 unsigned vs_blit_property
)
4530 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4531 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4532 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4533 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4535 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4536 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4537 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4538 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4539 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4540 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4541 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4542 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4543 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4544 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4545 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4546 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4550 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4551 struct si_function_info
*fninfo
)
4553 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4554 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4555 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4556 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4560 /* Convenient merged shader definitions. */
4561 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4562 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4565 static void create_function(struct si_shader_context
*ctx
)
4567 struct si_shader
*shader
= ctx
->shader
;
4568 struct si_function_info fninfo
;
4569 LLVMTypeRef returns
[16+32*4];
4570 unsigned i
, num_return_sgprs
;
4571 unsigned num_returns
= 0;
4572 unsigned num_prolog_vgprs
= 0;
4573 unsigned type
= ctx
->type
;
4574 unsigned vs_blit_property
=
4575 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4577 si_init_function_info(&fninfo
);
4579 /* Set MERGED shaders. */
4580 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4581 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4582 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4583 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4584 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4587 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4590 case PIPE_SHADER_VERTEX
:
4591 declare_global_desc_pointers(ctx
, &fninfo
);
4593 if (vs_blit_property
) {
4594 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4597 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4601 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4602 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4603 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4604 ac_array_in_const32_addr_space(ctx
->v4i32
));
4606 if (shader
->key
.as_es
) {
4607 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4608 } else if (shader
->key
.as_ls
) {
4609 /* no extra parameters */
4611 if (shader
->is_gs_copy_shader
) {
4612 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4613 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4616 /* The locations of the other parameters are assigned dynamically. */
4617 declare_streamout_params(ctx
, &shader
->selector
->so
,
4622 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4625 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4626 for (i
= 0; i
< 4; i
++)
4627 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4631 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4632 declare_global_desc_pointers(ctx
, &fninfo
);
4633 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4634 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4635 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4636 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4637 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4638 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4639 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4642 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4643 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4645 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4646 * placed after the user SGPRs.
4648 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4649 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4650 for (i
= 0; i
< 11; i
++)
4651 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4654 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4655 /* Merged stages have 8 system SGPRs at the beginning. */
4656 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4657 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4658 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4659 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4660 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4661 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4662 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4663 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4664 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4666 declare_global_desc_pointers(ctx
, &fninfo
);
4667 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4668 ctx
->type
== PIPE_SHADER_VERTEX
);
4669 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4671 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4672 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4673 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4674 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4675 ac_array_in_const32_addr_space(ctx
->v4i32
));
4677 /* VGPRs (first TCS, then VS) */
4678 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4679 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4681 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4682 declare_vs_input_vgprs(ctx
, &fninfo
,
4685 /* LS return values are inputs to the TCS main shader part. */
4686 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4687 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4688 for (i
= 0; i
< 2; i
++)
4689 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4691 /* TCS return values are inputs to the TCS epilog.
4693 * param_tcs_offchip_offset, param_tcs_factor_offset,
4694 * param_tcs_offchip_layout, and param_rw_buffers
4695 * should be passed to the epilog.
4697 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4698 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4699 for (i
= 0; i
< 11; i
++)
4700 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4704 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4705 /* Merged stages have 8 system SGPRs at the beginning. */
4706 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4707 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4708 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4709 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4710 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4711 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4712 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4713 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4714 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4716 declare_global_desc_pointers(ctx
, &fninfo
);
4717 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4718 (ctx
->type
== PIPE_SHADER_VERTEX
||
4719 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4720 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4721 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4723 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4724 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4725 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4726 /* Declare as many input SGPRs as the VS has. */
4729 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4730 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4731 ac_array_in_const32_addr_space(ctx
->v4i32
));
4734 /* VGPRs (first GS, then VS/TES) */
4735 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4736 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4737 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4738 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4739 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4741 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4742 declare_vs_input_vgprs(ctx
, &fninfo
,
4744 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4745 declare_tes_input_vgprs(ctx
, &fninfo
);
4748 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4749 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4750 unsigned num_user_sgprs
;
4752 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4753 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4755 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4757 /* ES return values are inputs to GS. */
4758 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4759 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4760 for (i
= 0; i
< 5; i
++)
4761 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4765 case PIPE_SHADER_TESS_EVAL
:
4766 declare_global_desc_pointers(ctx
, &fninfo
);
4767 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4768 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4769 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4770 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4772 if (shader
->key
.as_es
) {
4773 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4774 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4775 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4777 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4778 declare_streamout_params(ctx
, &shader
->selector
->so
,
4780 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4784 declare_tes_input_vgprs(ctx
, &fninfo
);
4787 case PIPE_SHADER_GEOMETRY
:
4788 declare_global_desc_pointers(ctx
, &fninfo
);
4789 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4790 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4791 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4794 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4795 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4796 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4797 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4798 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4799 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4800 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4801 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4804 case PIPE_SHADER_FRAGMENT
:
4805 declare_global_desc_pointers(ctx
, &fninfo
);
4806 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4807 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4808 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4809 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4811 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4812 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4813 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4814 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4815 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4816 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4817 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4818 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4819 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4820 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4821 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4822 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4823 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4824 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4825 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4826 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4827 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4828 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4829 shader
->info
.face_vgpr_index
= 20;
4830 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4831 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4832 shader
->info
.ancillary_vgpr_index
= 21;
4833 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4834 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4835 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4837 /* Color inputs from the prolog. */
4838 if (shader
->selector
->info
.colors_read
) {
4839 unsigned num_color_elements
=
4840 util_bitcount(shader
->selector
->info
.colors_read
);
4842 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4843 for (i
= 0; i
< num_color_elements
; i
++)
4844 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4846 num_prolog_vgprs
+= num_color_elements
;
4849 /* Outputs for the epilog. */
4850 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4853 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4854 shader
->selector
->info
.writes_z
+
4855 shader
->selector
->info
.writes_stencil
+
4856 shader
->selector
->info
.writes_samplemask
+
4857 1 /* SampleMaskIn */;
4859 num_returns
= MAX2(num_returns
,
4861 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4863 for (i
= 0; i
< num_return_sgprs
; i
++)
4864 returns
[i
] = ctx
->i32
;
4865 for (; i
< num_returns
; i
++)
4866 returns
[i
] = ctx
->f32
;
4869 case PIPE_SHADER_COMPUTE
:
4870 declare_global_desc_pointers(ctx
, &fninfo
);
4871 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4872 if (shader
->selector
->info
.uses_grid_size
)
4873 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4874 if (shader
->selector
->info
.uses_block_size
&&
4875 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4876 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4878 unsigned cs_user_data_dwords
=
4879 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_DWORDS
];
4880 if (cs_user_data_dwords
) {
4881 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4882 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4885 for (i
= 0; i
< 3; i
++) {
4886 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4887 if (shader
->selector
->info
.uses_block_id
[i
])
4888 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4891 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4894 assert(0 && "unimplemented shader");
4898 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4899 si_get_max_workgroup_size(shader
));
4901 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4902 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4903 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4904 "InitialPSInputAddr",
4905 S_0286D0_PERSP_SAMPLE_ENA(1) |
4906 S_0286D0_PERSP_CENTER_ENA(1) |
4907 S_0286D0_PERSP_CENTROID_ENA(1) |
4908 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4909 S_0286D0_LINEAR_CENTER_ENA(1) |
4910 S_0286D0_LINEAR_CENTROID_ENA(1) |
4911 S_0286D0_FRONT_FACE_ENA(1) |
4912 S_0286D0_ANCILLARY_ENA(1) |
4913 S_0286D0_POS_FIXED_PT_ENA(1));
4916 shader
->info
.num_input_sgprs
= 0;
4917 shader
->info
.num_input_vgprs
= 0;
4919 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4920 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4922 for (; i
< fninfo
.num_params
; ++i
)
4923 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4925 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4926 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4928 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4929 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
4930 /* The LSHS size is not known until draw time, so we append it
4931 * at the end of whatever LDS use there may be in the rest of
4932 * the shader (currently none, unless LLVM decides to do its
4933 * own LDS-based lowering).
4935 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4936 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4937 "__lds_end", AC_ADDR_SPACE_LDS
);
4938 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4940 ac_declare_lds_as_pointer(&ctx
->ac
);
4946 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4949 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4951 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4953 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4954 ctx
->param_rw_buffers
);
4956 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4957 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
4959 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4961 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4964 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4966 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
4967 /* Declare the ESGS ring as an explicit LDS symbol.
4968 * For monolithic shaders, we declare the ring only once.
4970 * We declare it with 64KB alignment as a hint that the
4971 * pointer value will always be 0.
4973 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4974 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4977 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4979 ac_declare_lds_as_pointer(&ctx
->ac
);
4980 ctx
->esgs_ring
= ctx
->ac
.lds
;
4985 if (ctx
->shader
->is_gs_copy_shader
) {
4986 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4989 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4990 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4991 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4992 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4993 LLVMValueRef base_ring
;
4995 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
4997 /* The conceptual layout of the GSVS ring is
4998 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4999 * but the real memory layout is swizzled across
5001 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5003 * Override the buffer descriptor accordingly.
5005 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5006 uint64_t stream_offset
= 0;
5008 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5009 unsigned num_components
;
5011 unsigned num_records
;
5012 LLVMValueRef ring
, tmp
;
5014 num_components
= sel
->info
.num_stream_output_components
[stream
];
5015 if (!num_components
)
5018 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5020 /* Limit on the stride field for <= GFX7. */
5021 assert(stride
< (1 << 14));
5025 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5026 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5027 tmp
= LLVMBuildAdd(builder
, tmp
,
5028 LLVMConstInt(ctx
->i64
,
5029 stream_offset
, 0), "");
5030 stream_offset
+= stride
* 64;
5032 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5033 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5034 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5035 tmp
= LLVMBuildOr(builder
, tmp
,
5036 LLVMConstInt(ctx
->i32
,
5037 S_008F04_STRIDE(stride
) |
5038 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5039 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5040 ring
= LLVMBuildInsertElement(builder
, ring
,
5041 LLVMConstInt(ctx
->i32
, num_records
, 0),
5042 LLVMConstInt(ctx
->i32
, 2, 0), "");
5043 ring
= LLVMBuildInsertElement(builder
, ring
,
5044 LLVMConstInt(ctx
->i32
,
5045 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5046 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5047 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5048 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5049 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5050 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5051 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5052 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5053 S_008F0C_ADD_TID_ENABLE(1),
5055 LLVMConstInt(ctx
->i32
, 3, 0), "");
5057 ctx
->gsvs_ring
[stream
] = ring
;
5059 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5060 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5064 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5065 LLVMValueRef param_rw_buffers
,
5066 unsigned param_pos_fixed_pt
)
5068 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5069 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5071 /* Use the fixed-point gl_FragCoord input.
5072 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5073 * per coordinate to get the repeating effect.
5075 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5076 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5078 /* Load the buffer descriptor. */
5079 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5080 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5082 /* The stipple pattern is 32x32, each row has 32 bits. */
5083 offset
= LLVMBuildMul(builder
, address
[1],
5084 LLVMConstInt(ctx
->i32
, 4, 0), "");
5085 row
= buffer_load_const(ctx
, desc
, offset
);
5086 row
= ac_to_integer(&ctx
->ac
, row
);
5087 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5088 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5089 ac_build_kill_if_false(&ctx
->ac
, bit
);
5092 /* For the UMR disassembler. */
5093 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5094 #define DEBUGGER_NUM_MARKERS 5
5096 static bool si_shader_binary_open(struct si_screen
*screen
,
5097 struct si_shader
*shader
,
5098 struct ac_rtld_binary
*rtld
)
5100 const struct si_shader_selector
*sel
= shader
->selector
;
5101 const char *part_elfs
[5];
5102 size_t part_sizes
[5];
5103 unsigned num_parts
= 0;
5105 #define add_part(shader_or_part) \
5106 if (shader_or_part) { \
5107 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5108 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5112 add_part(shader
->prolog
);
5113 add_part(shader
->previous_stage
);
5114 add_part(shader
->prolog2
);
5116 add_part(shader
->epilog
);
5120 struct ac_rtld_symbol lds_symbols
[1];
5121 unsigned num_lds_symbols
= 0;
5123 if (sel
&& screen
->info
.chip_class
>= GFX9
&&
5124 sel
->type
== PIPE_SHADER_GEOMETRY
&& !shader
->is_gs_copy_shader
) {
5125 /* We add this symbol even on LLVM <= 8 to ensure that
5126 * shader->config.lds_size is set correctly below.
5128 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5129 sym
->name
= "esgs_ring";
5130 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5131 sym
->align
= 64 * 1024;
5134 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5135 .info
= &screen
->info
,
5136 .num_parts
= num_parts
,
5137 .elf_ptrs
= part_elfs
,
5138 .elf_sizes
= part_sizes
,
5139 .num_shared_lds_symbols
= num_lds_symbols
,
5140 .shared_lds_symbols
= lds_symbols
});
5142 if (rtld
->lds_size
> 0) {
5143 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5144 shader
->config
.lds_size
=
5145 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5151 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5153 struct ac_rtld_binary rtld
;
5154 si_shader_binary_open(screen
, shader
, &rtld
);
5155 return rtld
.rx_size
;
5159 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5161 uint64_t *scratch_va
= data
;
5163 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5164 *value
= (uint32_t)*scratch_va
;
5167 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5168 /* Enable scratch coalescing. */
5169 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5170 S_008F04_SWIZZLE_ENABLE(1);
5171 if (HAVE_LLVM
< 0x0800) {
5172 /* Old LLVM created an R_ABS32_HI relocation for
5182 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5183 uint64_t scratch_va
)
5185 struct ac_rtld_binary binary
;
5186 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5189 si_resource_reference(&shader
->bo
, NULL
);
5190 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5191 sscreen
->cpdma_prefetch_writes_memory
?
5192 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5193 PIPE_USAGE_IMMUTABLE
,
5194 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5200 struct ac_rtld_upload_info u
= {};
5202 u
.get_external_symbol
= si_get_external_symbol
;
5203 u
.cb_data
= &scratch_va
;
5204 u
.rx_va
= shader
->bo
->gpu_address
;
5205 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5206 PIPE_TRANSFER_READ_WRITE
|
5207 PIPE_TRANSFER_UNSYNCHRONIZED
|
5208 RADEON_TRANSFER_TEMPORARY
);
5212 bool ok
= ac_rtld_upload(&u
);
5214 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5215 ac_rtld_close(&binary
);
5220 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5221 const struct si_shader_binary
*binary
,
5222 struct pipe_debug_callback
*debug
,
5223 const char *name
, FILE *file
)
5225 struct ac_rtld_binary rtld_binary
;
5227 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5228 .info
= &screen
->info
,
5230 .elf_ptrs
= &binary
->elf_buffer
,
5231 .elf_sizes
= &binary
->elf_size
}))
5237 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5240 if (nbytes
> INT_MAX
)
5243 if (debug
&& debug
->debug_message
) {
5244 /* Very long debug messages are cut off, so send the
5245 * disassembly one line at a time. This causes more
5246 * overhead, but on the plus side it simplifies
5247 * parsing of resulting logs.
5249 pipe_debug_message(debug
, SHADER_INFO
,
5250 "Shader Disassembly Begin");
5253 while (line
< nbytes
) {
5254 int count
= nbytes
- line
;
5255 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5257 count
= nl
- (disasm
+ line
);
5260 pipe_debug_message(debug
, SHADER_INFO
,
5261 "%.*s", count
, disasm
+ line
);
5267 pipe_debug_message(debug
, SHADER_INFO
,
5268 "Shader Disassembly End");
5272 fprintf(file
, "Shader %s disassembly:\n", name
);
5273 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5277 ac_rtld_close(&rtld_binary
);
5280 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5282 struct si_screen
*sscreen
= shader
->selector
->screen
;
5283 struct ac_shader_config
*conf
= &shader
->config
;
5284 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5285 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5286 unsigned lds_per_wave
= 0;
5287 unsigned max_simd_waves
;
5289 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5291 /* Compute LDS usage for PS. */
5292 switch (shader
->selector
->type
) {
5293 case PIPE_SHADER_FRAGMENT
:
5294 /* The minimum usage per wave is (num_inputs * 48). The maximum
5295 * usage is (num_inputs * 48 * 16).
5296 * We can get anything in between and it varies between waves.
5298 * The 48 bytes per input for a single primitive is equal to
5299 * 4 bytes/component * 4 components/input * 3 points.
5301 * Other stages don't know the size at compile time or don't
5302 * allocate LDS per wave, but instead they do it per thread group.
5304 lds_per_wave
= conf
->lds_size
* lds_increment
+
5305 align(num_inputs
* 48, lds_increment
);
5307 case PIPE_SHADER_COMPUTE
:
5308 if (shader
->selector
) {
5309 unsigned max_workgroup_size
=
5310 si_get_max_workgroup_size(shader
);
5311 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5312 DIV_ROUND_UP(max_workgroup_size
, 64);
5317 /* Compute the per-SIMD wave counts. */
5318 if (conf
->num_sgprs
) {
5320 MIN2(max_simd_waves
,
5321 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5324 if (conf
->num_vgprs
)
5325 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5327 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5328 * 16KB makes some SIMDs unoccupied). */
5330 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5332 shader
->info
.max_simd_waves
= max_simd_waves
;
5335 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5336 struct si_shader
*shader
,
5337 struct pipe_debug_callback
*debug
)
5339 const struct ac_shader_config
*conf
= &shader
->config
;
5341 if (screen
->options
.debug_disassembly
)
5342 si_shader_dump_disassembly(screen
, &shader
->binary
, debug
, "main", NULL
);
5344 pipe_debug_message(debug
, SHADER_INFO
,
5345 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5346 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5347 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5348 conf
->num_sgprs
, conf
->num_vgprs
,
5349 si_get_shader_binary_size(screen
, shader
),
5350 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5351 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5352 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5355 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5356 struct si_shader
*shader
,
5359 bool check_debug_option
)
5361 const struct ac_shader_config
*conf
= &shader
->config
;
5363 if (!check_debug_option
||
5364 si_can_dump_shader(sscreen
, processor
)) {
5365 if (processor
== PIPE_SHADER_FRAGMENT
) {
5366 fprintf(file
, "*** SHADER CONFIG ***\n"
5367 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5368 "SPI_PS_INPUT_ENA = 0x%04x\n",
5369 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5372 fprintf(file
, "*** SHADER STATS ***\n"
5375 "Spilled SGPRs: %d\n"
5376 "Spilled VGPRs: %d\n"
5377 "Private memory VGPRs: %d\n"
5378 "Code Size: %d bytes\n"
5380 "Scratch: %d bytes per wave\n"
5382 "********************\n\n\n",
5383 conf
->num_sgprs
, conf
->num_vgprs
,
5384 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5385 shader
->info
.private_mem_vgprs
,
5386 si_get_shader_binary_size(sscreen
, shader
),
5387 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5388 shader
->info
.max_simd_waves
);
5392 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5394 switch (processor
) {
5395 case PIPE_SHADER_VERTEX
:
5396 if (shader
->key
.as_es
)
5397 return "Vertex Shader as ES";
5398 else if (shader
->key
.as_ls
)
5399 return "Vertex Shader as LS";
5400 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5401 return "Vertex Shader as Primitive Discard CS";
5403 return "Vertex Shader as VS";
5404 case PIPE_SHADER_TESS_CTRL
:
5405 return "Tessellation Control Shader";
5406 case PIPE_SHADER_TESS_EVAL
:
5407 if (shader
->key
.as_es
)
5408 return "Tessellation Evaluation Shader as ES";
5410 return "Tessellation Evaluation Shader as VS";
5411 case PIPE_SHADER_GEOMETRY
:
5412 if (shader
->is_gs_copy_shader
)
5413 return "GS Copy Shader as VS";
5415 return "Geometry Shader";
5416 case PIPE_SHADER_FRAGMENT
:
5417 return "Pixel Shader";
5418 case PIPE_SHADER_COMPUTE
:
5419 return "Compute Shader";
5421 return "Unknown Shader";
5425 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5426 struct pipe_debug_callback
*debug
, unsigned processor
,
5427 FILE *file
, bool check_debug_option
)
5429 if (!check_debug_option
||
5430 si_can_dump_shader(sscreen
, processor
))
5431 si_dump_shader_key(processor
, shader
, file
);
5433 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5434 if (shader
->previous_stage
&&
5435 shader
->previous_stage
->binary
.llvm_ir_string
) {
5436 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5437 si_get_shader_name(shader
, processor
));
5438 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5441 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5442 si_get_shader_name(shader
, processor
));
5443 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5446 if (!check_debug_option
||
5447 (si_can_dump_shader(sscreen
, processor
) &&
5448 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5449 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5452 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5453 debug
, "prolog", file
);
5454 if (shader
->previous_stage
)
5455 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5456 debug
, "previous stage", file
);
5457 if (shader
->prolog2
)
5458 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5459 debug
, "prolog2", file
);
5461 si_shader_dump_disassembly(sscreen
, &shader
->binary
, debug
, "main", file
);
5464 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5465 debug
, "epilog", file
);
5466 fprintf(file
, "\n");
5469 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5470 check_debug_option
);
5473 static int si_compile_llvm(struct si_screen
*sscreen
,
5474 struct si_shader_binary
*binary
,
5475 struct ac_shader_config
*conf
,
5476 struct ac_llvm_compiler
*compiler
,
5478 struct pipe_debug_callback
*debug
,
5481 bool less_optimized
)
5483 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5485 if (si_can_dump_shader(sscreen
, processor
)) {
5486 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5488 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5489 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5490 ac_dump_module(mod
);
5491 fprintf(stderr
, "\n");
5495 if (sscreen
->record_llvm_ir
) {
5496 char *ir
= LLVMPrintModuleToString(mod
);
5497 binary
->llvm_ir_string
= strdup(ir
);
5498 LLVMDisposeMessage(ir
);
5501 if (!si_replace_shader(count
, binary
)) {
5502 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5508 struct ac_rtld_binary rtld
;
5509 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5510 .info
= &sscreen
->info
,
5512 .elf_ptrs
= &binary
->elf_buffer
,
5513 .elf_sizes
= &binary
->elf_size
}))
5516 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5517 ac_rtld_close(&rtld
);
5521 /* Enable 64-bit and 16-bit denormals, because there is no performance
5524 * If denormals are enabled, all floating-point output modifiers are
5527 * Don't enable denormals for 32-bit floats, because:
5528 * - Floating-point output modifiers would be ignored by the hw.
5529 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5530 * have to stop using those.
5531 * - GFX6 & GFX7 would be very slow.
5533 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5538 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5540 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5541 LLVMBuildRetVoid(ctx
->ac
.builder
);
5543 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5546 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5548 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5549 struct ac_llvm_compiler
*compiler
,
5550 struct si_shader_selector
*gs_selector
,
5551 struct pipe_debug_callback
*debug
)
5553 struct si_shader_context ctx
;
5554 struct si_shader
*shader
;
5555 LLVMBuilderRef builder
;
5556 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5557 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5561 shader
= CALLOC_STRUCT(si_shader
);
5565 /* We can leave the fence as permanently signaled because the GS copy
5566 * shader only becomes visible globally after it has been compiled. */
5567 util_queue_fence_init(&shader
->ready
);
5569 shader
->selector
= gs_selector
;
5570 shader
->is_gs_copy_shader
= true;
5572 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5573 ctx
.shader
= shader
;
5574 ctx
.type
= PIPE_SHADER_VERTEX
;
5576 builder
= ctx
.ac
.builder
;
5578 create_function(&ctx
);
5579 preload_ring_buffers(&ctx
);
5581 LLVMValueRef voffset
=
5582 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5583 LLVMConstInt(ctx
.i32
, 4, 0), "");
5585 /* Fetch the vertex stream ID.*/
5586 LLVMValueRef stream_id
;
5588 if (gs_selector
->so
.num_outputs
)
5589 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5591 stream_id
= ctx
.i32_0
;
5593 /* Fill in output information. */
5594 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5595 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5596 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5598 for (int chan
= 0; chan
< 4; chan
++) {
5599 outputs
[i
].vertex_stream
[chan
] =
5600 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5604 LLVMBasicBlockRef end_bb
;
5605 LLVMValueRef switch_inst
;
5607 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5608 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5610 for (int stream
= 0; stream
< 4; stream
++) {
5611 LLVMBasicBlockRef bb
;
5614 if (!gsinfo
->num_stream_output_components
[stream
])
5617 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5620 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5621 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5622 LLVMPositionBuilderAtEnd(builder
, bb
);
5624 /* Fetch vertex data from GSVS ring */
5626 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5627 for (unsigned chan
= 0; chan
< 4; chan
++) {
5628 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5629 outputs
[i
].vertex_stream
[chan
] != stream
) {
5630 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5634 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5635 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5638 outputs
[i
].values
[chan
] =
5639 ac_build_buffer_load(&ctx
.ac
,
5640 ctx
.gsvs_ring
[0], 1,
5647 /* Streamout and exports. */
5648 if (gs_selector
->so
.num_outputs
) {
5649 si_llvm_emit_streamout(&ctx
, outputs
,
5650 gsinfo
->num_outputs
,
5655 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5657 LLVMBuildBr(builder
, end_bb
);
5660 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5662 LLVMBuildRetVoid(ctx
.ac
.builder
);
5664 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5665 si_llvm_optimize_module(&ctx
);
5668 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5669 &ctx
.shader
->config
, ctx
.compiler
,
5671 debug
, PIPE_SHADER_GEOMETRY
,
5672 "GS Copy Shader", false) == 0) {
5673 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5674 fprintf(stderr
, "GS Copy Shader:\n");
5675 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5676 PIPE_SHADER_GEOMETRY
, stderr
, true);
5678 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5679 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5684 si_llvm_dispose(&ctx
);
5690 si_fix_resource_usage(sscreen
, shader
);
5695 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5696 const struct si_vs_prolog_bits
*prolog
,
5697 const char *prefix
, FILE *f
)
5699 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5700 prefix
, prolog
->instance_divisor_is_one
);
5701 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5702 prefix
, prolog
->instance_divisor_is_fetched
);
5703 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5704 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5705 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5706 prefix
, prolog
->ls_vgpr_fix
);
5708 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5709 fprintf(f
, " mono.vs.fix_fetch = {");
5710 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5711 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5717 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5718 fix
.u
.num_channels_m1
, fix
.u
.format
);
5723 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5726 const struct si_shader_key
*key
= &shader
->key
;
5728 fprintf(f
, "SHADER KEY\n");
5730 switch (processor
) {
5731 case PIPE_SHADER_VERTEX
:
5732 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5733 "part.vs.prolog", f
);
5734 fprintf(f
, " as_es = %u\n", key
->as_es
);
5735 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5736 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5737 key
->mono
.u
.vs_export_prim_id
);
5738 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5739 key
->opt
.vs_as_prim_discard_cs
);
5740 fprintf(f
, " opt.cs_prim_type = %s\n",
5741 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5742 fprintf(f
, " opt.cs_indexed = %u\n",
5743 key
->opt
.cs_indexed
);
5744 fprintf(f
, " opt.cs_instancing = %u\n",
5745 key
->opt
.cs_instancing
);
5746 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5747 key
->opt
.cs_primitive_restart
);
5748 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5749 key
->opt
.cs_provoking_vertex_first
);
5750 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5751 key
->opt
.cs_need_correct_orientation
);
5752 fprintf(f
, " opt.cs_cull_front = %u\n",
5753 key
->opt
.cs_cull_front
);
5754 fprintf(f
, " opt.cs_cull_back = %u\n",
5755 key
->opt
.cs_cull_back
);
5756 fprintf(f
, " opt.cs_cull_z = %u\n",
5757 key
->opt
.cs_cull_z
);
5758 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5759 key
->opt
.cs_halfz_clip_space
);
5762 case PIPE_SHADER_TESS_CTRL
:
5763 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5764 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5765 "part.tcs.ls_prolog", f
);
5767 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5768 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5771 case PIPE_SHADER_TESS_EVAL
:
5772 fprintf(f
, " as_es = %u\n", key
->as_es
);
5773 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5774 key
->mono
.u
.vs_export_prim_id
);
5777 case PIPE_SHADER_GEOMETRY
:
5778 if (shader
->is_gs_copy_shader
)
5781 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5782 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5783 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5784 "part.gs.vs_prolog", f
);
5786 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5789 case PIPE_SHADER_COMPUTE
:
5792 case PIPE_SHADER_FRAGMENT
:
5793 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5794 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5795 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5796 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5797 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5798 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5799 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5800 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5801 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5802 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5803 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5804 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5805 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5806 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5807 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5808 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5809 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5816 if ((processor
== PIPE_SHADER_GEOMETRY
||
5817 processor
== PIPE_SHADER_TESS_EVAL
||
5818 processor
== PIPE_SHADER_VERTEX
) &&
5819 !key
->as_es
&& !key
->as_ls
) {
5820 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5821 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5825 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5826 struct si_screen
*sscreen
,
5827 struct ac_llvm_compiler
*compiler
)
5829 struct lp_build_tgsi_context
*bld_base
;
5831 si_llvm_context_init(ctx
, sscreen
, compiler
);
5833 bld_base
= &ctx
->bld_base
;
5834 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5836 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5837 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5838 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5840 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5842 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5844 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5845 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5846 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5847 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5849 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5850 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5851 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5852 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5853 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5854 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5855 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5856 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5858 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5859 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5860 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5863 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5865 struct si_shader
*shader
= ctx
->shader
;
5866 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5868 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5869 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5870 shader
->key
.as_ls
||
5874 ac_optimize_vs_outputs(&ctx
->ac
,
5876 shader
->info
.vs_output_param_offset
,
5878 &shader
->info
.nr_param_exports
);
5881 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5882 unsigned param
, unsigned bitoffset
)
5884 LLVMValueRef args
[] = {
5885 LLVMGetParam(ctx
->main_fn
, param
),
5886 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5888 ac_build_intrinsic(&ctx
->ac
,
5889 "llvm.amdgcn.init.exec.from.input",
5890 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5893 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5894 const struct si_vs_prolog_bits
*key
)
5896 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5898 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5901 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
5903 struct si_shader
*shader
= ctx
->shader
;
5904 struct si_shader_selector
*sel
= shader
->selector
;
5905 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5907 // TODO clean all this up!
5908 switch (ctx
->type
) {
5909 case PIPE_SHADER_VERTEX
:
5910 ctx
->load_input
= declare_input_vs
;
5911 if (shader
->key
.as_ls
)
5912 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5913 else if (shader
->key
.as_es
)
5914 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5915 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5916 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
5918 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5919 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5920 ctx
->abi
.load_base_vertex
= get_base_vertex
;
5922 case PIPE_SHADER_TESS_CTRL
:
5923 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5924 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5925 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5926 bld_base
->emit_store
= store_output_tcs
;
5927 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
5928 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
5929 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5930 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5932 case PIPE_SHADER_TESS_EVAL
:
5933 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5934 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
5935 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
5936 ctx
->abi
.load_tess_level
= si_load_tess_level
;
5937 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
5938 if (shader
->key
.as_es
)
5939 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5941 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5942 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5944 case PIPE_SHADER_GEOMETRY
:
5945 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5946 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
5947 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
5948 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
5949 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
5950 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
5952 case PIPE_SHADER_FRAGMENT
:
5953 ctx
->load_input
= declare_input_fs
;
5954 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
5955 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5956 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
5957 ctx
->abi
.load_sample_position
= load_sample_position
;
5958 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
5959 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
5961 case PIPE_SHADER_COMPUTE
:
5962 ctx
->abi
.load_local_group_size
= get_block_size
;
5965 assert(!"Unsupported shader type");
5969 ctx
->abi
.load_ubo
= load_ubo
;
5970 ctx
->abi
.load_ssbo
= load_ssbo
;
5972 create_function(ctx
);
5973 preload_ring_buffers(ctx
);
5975 /* For GFX9 merged shaders:
5976 * - Set EXEC for the first shader. If the prolog is present, set
5977 * EXEC there instead.
5978 * - Add a barrier before the second shader.
5979 * - In the second shader, reset EXEC to ~0 and wrap the main part in
5980 * an if-statement. This is required for correctness in geometry
5981 * shaders, to ensure that empty GS waves do not send GS_EMIT and
5984 * For monolithic merged shaders, the first shader is wrapped in an
5985 * if-block together with its prolog in si_build_wrapper_function.
5987 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
5988 if (!shader
->is_monolithic
&&
5989 sel
->info
.num_instructions
> 1 && /* not empty shader */
5990 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5991 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5992 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5993 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
5994 si_init_exec_from_input(ctx
,
5995 ctx
->param_merged_wave_info
, 0);
5996 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5997 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5998 if (!shader
->is_monolithic
)
5999 ac_init_exec_full_mask(&ctx
->ac
);
6001 LLVMValueRef num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6003 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6004 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6005 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6007 /* The barrier must execute for all shaders in a
6010 * Execute the barrier inside the conditional block,
6011 * so that empty waves can jump directly to s_endpgm,
6012 * which will also signal the barrier.
6014 * If the shader is TCS and the TCS epilog is present
6015 * and contains a barrier, it will wait there and then
6018 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6022 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6023 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6024 for (unsigned i
= 0; i
< 6; i
++) {
6025 ctx
->invoc0_tess_factors
[i
] =
6026 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6030 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6032 for (i
= 0; i
< 4; i
++) {
6033 ctx
->gs_next_vertex
[i
] =
6034 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6038 if (sel
->force_correct_derivs_after_kill
) {
6039 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6040 /* true = don't kill. */
6041 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6042 ctx
->postponed_kill
);
6046 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6047 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6051 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6052 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6057 si_llvm_build_ret(ctx
, ctx
->return_value
);
6062 * Compute the VS prolog key, which contains all the information needed to
6063 * build the VS prolog function, and set shader->info bits where needed.
6065 * \param info Shader info of the vertex shader.
6066 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6067 * \param prolog_key Key of the VS prolog
6068 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6069 * \param key Output shader part key.
6071 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6072 unsigned num_input_sgprs
,
6073 const struct si_vs_prolog_bits
*prolog_key
,
6074 struct si_shader
*shader_out
,
6075 union si_shader_part_key
*key
)
6077 memset(key
, 0, sizeof(*key
));
6078 key
->vs_prolog
.states
= *prolog_key
;
6079 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6080 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6081 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6082 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6084 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6085 key
->vs_prolog
.as_ls
= 1;
6086 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6087 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6088 key
->vs_prolog
.as_es
= 1;
6089 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6092 /* Enable loading the InstanceID VGPR. */
6093 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6095 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6096 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6097 shader_out
->info
.uses_instanceid
= true;
6101 * Compute the PS prolog key, which contains all the information needed to
6102 * build the PS prolog function, and set related bits in shader->config.
6104 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6105 union si_shader_part_key
*key
,
6106 bool separate_prolog
)
6108 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6110 memset(key
, 0, sizeof(*key
));
6111 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6112 key
->ps_prolog
.colors_read
= info
->colors_read
;
6113 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6114 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6115 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6116 (key
->ps_prolog
.colors_read
||
6117 key
->ps_prolog
.states
.force_persp_sample_interp
||
6118 key
->ps_prolog
.states
.force_linear_sample_interp
||
6119 key
->ps_prolog
.states
.force_persp_center_interp
||
6120 key
->ps_prolog
.states
.force_linear_center_interp
||
6121 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6122 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6123 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6125 if (info
->colors_read
) {
6126 unsigned *color
= shader
->selector
->color_attr_index
;
6128 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6129 /* BCOLORs are stored after the last input. */
6130 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6131 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6132 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6135 for (unsigned i
= 0; i
< 2; i
++) {
6136 unsigned interp
= info
->input_interpolate
[color
[i
]];
6137 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6139 if (!(info
->colors_read
& (0xf << i
*4)))
6142 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6144 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6145 interp
== TGSI_INTERPOLATE_COLOR
)
6146 interp
= TGSI_INTERPOLATE_CONSTANT
;
6149 case TGSI_INTERPOLATE_CONSTANT
:
6150 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6152 case TGSI_INTERPOLATE_PERSPECTIVE
:
6153 case TGSI_INTERPOLATE_COLOR
:
6154 /* Force the interpolation location for colors here. */
6155 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6156 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6157 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6158 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6161 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6162 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6163 shader
->config
.spi_ps_input_ena
|=
6164 S_0286CC_PERSP_SAMPLE_ENA(1);
6166 case TGSI_INTERPOLATE_LOC_CENTER
:
6167 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6168 shader
->config
.spi_ps_input_ena
|=
6169 S_0286CC_PERSP_CENTER_ENA(1);
6171 case TGSI_INTERPOLATE_LOC_CENTROID
:
6172 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6173 shader
->config
.spi_ps_input_ena
|=
6174 S_0286CC_PERSP_CENTROID_ENA(1);
6180 case TGSI_INTERPOLATE_LINEAR
:
6181 /* Force the interpolation location for colors here. */
6182 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6183 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6184 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6185 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6187 /* The VGPR assignment for non-monolithic shaders
6188 * works because InitialPSInputAddr is set on the
6189 * main shader and PERSP_PULL_MODEL is never used.
6192 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6193 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6194 separate_prolog
? 6 : 9;
6195 shader
->config
.spi_ps_input_ena
|=
6196 S_0286CC_LINEAR_SAMPLE_ENA(1);
6198 case TGSI_INTERPOLATE_LOC_CENTER
:
6199 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6200 separate_prolog
? 8 : 11;
6201 shader
->config
.spi_ps_input_ena
|=
6202 S_0286CC_LINEAR_CENTER_ENA(1);
6204 case TGSI_INTERPOLATE_LOC_CENTROID
:
6205 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6206 separate_prolog
? 10 : 13;
6207 shader
->config
.spi_ps_input_ena
|=
6208 S_0286CC_LINEAR_CENTROID_ENA(1);
6222 * Check whether a PS prolog is required based on the key.
6224 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6226 return key
->ps_prolog
.colors_read
||
6227 key
->ps_prolog
.states
.force_persp_sample_interp
||
6228 key
->ps_prolog
.states
.force_linear_sample_interp
||
6229 key
->ps_prolog
.states
.force_persp_center_interp
||
6230 key
->ps_prolog
.states
.force_linear_center_interp
||
6231 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6232 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6233 key
->ps_prolog
.states
.poly_stipple
||
6234 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6238 * Compute the PS epilog key, which contains all the information needed to
6239 * build the PS epilog function.
6241 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6242 union si_shader_part_key
*key
)
6244 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6245 memset(key
, 0, sizeof(*key
));
6246 key
->ps_epilog
.colors_written
= info
->colors_written
;
6247 key
->ps_epilog
.writes_z
= info
->writes_z
;
6248 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6249 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6250 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6254 * Build the GS prolog function. Rotate the input vertices for triangle strips
6257 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6258 union si_shader_part_key
*key
)
6260 unsigned num_sgprs
, num_vgprs
;
6261 struct si_function_info fninfo
;
6262 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6263 LLVMTypeRef returns
[48];
6264 LLVMValueRef func
, ret
;
6266 si_init_function_info(&fninfo
);
6268 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6269 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6270 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6272 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6273 num_vgprs
= 5; /* ES inputs are not needed by GS */
6275 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6279 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6280 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6281 returns
[i
] = ctx
->i32
;
6284 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6285 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6286 returns
[num_sgprs
+ i
] = ctx
->f32
;
6289 /* Create the function. */
6290 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6292 func
= ctx
->main_fn
;
6294 /* Set the full EXEC mask for the prolog, because we are only fiddling
6295 * with registers here. The main shader part will set the correct EXEC
6298 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6299 ac_init_exec_full_mask(&ctx
->ac
);
6301 /* Copy inputs to outputs. This should be no-op, as the registers match,
6302 * but it will prevent the compiler from overwriting them unintentionally.
6304 ret
= ctx
->return_value
;
6305 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6306 LLVMValueRef p
= LLVMGetParam(func
, i
);
6307 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6309 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6310 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6311 p
= ac_to_float(&ctx
->ac
, p
);
6312 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6315 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6316 /* Remap the input vertices for every other primitive. */
6317 const unsigned gfx6_vtx_params
[6] = {
6325 const unsigned gfx9_vtx_params
[3] = {
6330 LLVMValueRef vtx_in
[6], vtx_out
[6];
6331 LLVMValueRef prim_id
, rotate
;
6333 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6334 for (unsigned i
= 0; i
< 3; i
++) {
6335 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6336 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6339 for (unsigned i
= 0; i
< 6; i
++)
6340 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6343 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6344 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6346 for (unsigned i
= 0; i
< 6; ++i
) {
6347 LLVMValueRef base
, rotated
;
6349 rotated
= vtx_in
[(i
+ 4) % 6];
6350 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6353 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6354 for (unsigned i
= 0; i
< 3; i
++) {
6355 LLVMValueRef hi
, out
;
6357 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6358 LLVMConstInt(ctx
->i32
, 16, 0), "");
6359 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6360 out
= ac_to_float(&ctx
->ac
, out
);
6361 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6362 gfx9_vtx_params
[i
], "");
6365 for (unsigned i
= 0; i
< 6; i
++) {
6368 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6369 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6370 gfx6_vtx_params
[i
], "");
6375 LLVMBuildRet(builder
, ret
);
6379 * Given a list of shader part functions, build a wrapper function that
6380 * runs them in sequence to form a monolithic shader.
6382 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6383 LLVMValueRef
*parts
,
6386 unsigned next_shader_first_part
)
6388 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6389 /* PS epilog has one arg per color component; gfx9 merged shader
6390 * prologs need to forward 32 user SGPRs.
6392 struct si_function_info fninfo
;
6393 LLVMValueRef initial
[64], out
[64];
6394 LLVMTypeRef function_type
;
6395 unsigned num_first_params
;
6396 unsigned num_out
, initial_num_out
;
6397 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6398 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6399 unsigned num_sgprs
, num_vgprs
;
6401 struct lp_build_if_state if_state
;
6403 si_init_function_info(&fninfo
);
6405 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6406 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6407 AC_FUNC_ATTR_ALWAYSINLINE
);
6408 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6411 /* The parameters of the wrapper function correspond to those of the
6412 * first part in terms of SGPRs and VGPRs, but we use the types of the
6413 * main part to get the right types. This is relevant for the
6414 * dereferenceable attribute on descriptor table pointers.
6419 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6420 num_first_params
= LLVMCountParamTypes(function_type
);
6422 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6423 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6425 if (ac_is_sgpr_param(param
)) {
6426 assert(num_vgprs
== 0);
6427 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6429 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6434 while (gprs
< num_sgprs
+ num_vgprs
) {
6435 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6436 LLVMTypeRef type
= LLVMTypeOf(param
);
6437 unsigned size
= ac_get_type_size(type
) / 4;
6439 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6441 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6442 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6443 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6448 /* Prepare the return type. */
6449 unsigned num_returns
= 0;
6450 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6452 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6453 return_type
= LLVMGetReturnType(last_func_type
);
6455 switch (LLVMGetTypeKind(return_type
)) {
6456 case LLVMStructTypeKind
:
6457 num_returns
= LLVMCountStructElementTypes(return_type
);
6458 assert(num_returns
<= ARRAY_SIZE(returns
));
6459 LLVMGetStructElementTypes(return_type
, returns
);
6461 case LLVMVoidTypeKind
:
6464 unreachable("unexpected type");
6467 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6468 si_get_max_workgroup_size(ctx
->shader
));
6470 if (is_merged_shader(ctx
))
6471 ac_init_exec_full_mask(&ctx
->ac
);
6473 /* Record the arguments of the function as if they were an output of
6479 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6480 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6481 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6482 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6483 unsigned size
= ac_get_type_size(param_type
) / 4;
6486 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6487 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6488 param_type
= ctx
->i32
;
6491 if (param_type
!= out_type
)
6492 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6493 out
[num_out
++] = param
;
6495 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6497 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6498 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6499 param_type
= ctx
->i64
;
6502 if (param_type
!= vector_type
)
6503 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6505 for (unsigned j
= 0; j
< size
; ++j
)
6506 out
[num_out
++] = LLVMBuildExtractElement(
6507 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6510 if (i
< fninfo
.num_sgpr_params
)
6511 num_out_sgpr
= num_out
;
6514 memcpy(initial
, out
, sizeof(out
));
6515 initial_num_out
= num_out
;
6516 initial_num_out_sgpr
= num_out_sgpr
;
6518 /* Now chain the parts. */
6520 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6521 LLVMValueRef in
[48];
6522 LLVMTypeRef ret_type
;
6523 unsigned out_idx
= 0;
6524 unsigned num_params
= LLVMCountParams(parts
[part
]);
6526 /* Merged shaders are executed conditionally depending
6527 * on the number of enabled threads passed in the input SGPRs. */
6528 if (is_merged_shader(ctx
) && part
== 0) {
6529 LLVMValueRef ena
, count
= initial
[3];
6531 count
= LLVMBuildAnd(builder
, count
,
6532 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6533 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6534 ac_get_thread_id(&ctx
->ac
), count
, "");
6535 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6538 /* Derive arguments for the next part from outputs of the
6541 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6543 LLVMTypeRef param_type
;
6545 unsigned param_size
;
6546 LLVMValueRef arg
= NULL
;
6548 param
= LLVMGetParam(parts
[part
], param_idx
);
6549 param_type
= LLVMTypeOf(param
);
6550 param_size
= ac_get_type_size(param_type
) / 4;
6551 is_sgpr
= ac_is_sgpr_param(param
);
6554 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6555 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6556 } else if (out_idx
< num_out_sgpr
) {
6557 /* Skip returned SGPRs the current part doesn't
6558 * declare on the input. */
6559 out_idx
= num_out_sgpr
;
6562 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6564 if (param_size
== 1)
6567 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6569 if (LLVMTypeOf(arg
) != param_type
) {
6570 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6571 if (LLVMGetPointerAddressSpace(param_type
) ==
6572 AC_ADDR_SPACE_CONST_32BIT
) {
6573 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6574 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6576 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6577 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6580 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6584 in
[param_idx
] = arg
;
6585 out_idx
+= param_size
;
6588 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6590 if (is_merged_shader(ctx
) &&
6591 part
+ 1 == next_shader_first_part
) {
6592 lp_build_endif(&if_state
);
6594 /* The second half of the merged shader should use
6595 * the inputs from the toplevel (wrapper) function,
6596 * not the return value from the last call.
6598 * That's because the last call was executed condi-
6599 * tionally, so we can't consume it in the main
6602 memcpy(out
, initial
, sizeof(initial
));
6603 num_out
= initial_num_out
;
6604 num_out_sgpr
= initial_num_out_sgpr
;
6608 /* Extract the returned GPRs. */
6609 ret_type
= LLVMTypeOf(ret
);
6613 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6614 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6616 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6618 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6620 LLVMBuildExtractValue(builder
, ret
, i
, "");
6622 assert(num_out
< ARRAY_SIZE(out
));
6623 out
[num_out
++] = val
;
6625 if (LLVMTypeOf(val
) == ctx
->i32
) {
6626 assert(num_out_sgpr
+ 1 == num_out
);
6627 num_out_sgpr
= num_out
;
6633 /* Return the value from the last part. */
6634 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6635 LLVMBuildRetVoid(builder
);
6637 LLVMBuildRet(builder
, ret
);
6640 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6641 struct si_shader_selector
*sel
)
6643 if (!compiler
->low_opt_passes
)
6646 /* Assume a slow CPU. */
6647 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6648 sel
->screen
->info
.chip_class
<= GFX8
);
6650 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6652 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6653 sel
->info
.num_memory_instructions
> 1000;
6656 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6657 struct ac_llvm_compiler
*compiler
,
6658 struct si_shader
*shader
,
6659 struct pipe_debug_callback
*debug
)
6661 struct si_shader_selector
*sel
= shader
->selector
;
6662 struct si_shader_context ctx
;
6665 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6666 * conversion fails. */
6667 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6668 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6670 tgsi_dump(sel
->tokens
, 0);
6672 nir_print_shader(sel
->nir
, stderr
);
6673 si_dump_streamout(&sel
->so
);
6676 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6677 si_llvm_context_set_tgsi(&ctx
, shader
);
6679 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6680 sizeof(shader
->info
.vs_output_param_offset
));
6682 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6684 if (!si_compile_tgsi_main(&ctx
)) {
6685 si_llvm_dispose(&ctx
);
6689 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6690 LLVMValueRef parts
[2];
6691 bool need_prolog
= sel
->vs_needs_prolog
;
6693 parts
[1] = ctx
.main_fn
;
6696 union si_shader_part_key prolog_key
;
6697 si_get_vs_prolog_key(&sel
->info
,
6698 shader
->info
.num_input_sgprs
,
6699 &shader
->key
.part
.vs
.prolog
,
6700 shader
, &prolog_key
);
6701 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6702 parts
[0] = ctx
.main_fn
;
6705 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6706 1 + need_prolog
, need_prolog
, 0);
6708 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6709 si_build_prim_discard_compute_shader(&ctx
);
6710 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6711 if (sscreen
->info
.chip_class
>= GFX9
) {
6712 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6713 LLVMValueRef parts
[4];
6714 bool vs_needs_prolog
=
6715 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6718 parts
[2] = ctx
.main_fn
;
6721 union si_shader_part_key tcs_epilog_key
;
6722 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6723 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6724 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6725 parts
[3] = ctx
.main_fn
;
6727 /* VS as LS main part */
6728 struct si_shader shader_ls
= {};
6729 shader_ls
.selector
= ls
;
6730 shader_ls
.key
.as_ls
= 1;
6731 shader_ls
.key
.mono
= shader
->key
.mono
;
6732 shader_ls
.key
.opt
= shader
->key
.opt
;
6733 shader_ls
.is_monolithic
= true;
6734 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6736 if (!si_compile_tgsi_main(&ctx
)) {
6737 si_llvm_dispose(&ctx
);
6740 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6741 parts
[1] = ctx
.main_fn
;
6744 if (vs_needs_prolog
) {
6745 union si_shader_part_key vs_prolog_key
;
6746 si_get_vs_prolog_key(&ls
->info
,
6747 shader_ls
.info
.num_input_sgprs
,
6748 &shader
->key
.part
.tcs
.ls_prolog
,
6749 shader
, &vs_prolog_key
);
6750 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6751 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6752 parts
[0] = ctx
.main_fn
;
6755 /* Reset the shader context. */
6756 ctx
.shader
= shader
;
6757 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6759 si_build_wrapper_function(&ctx
,
6760 parts
+ !vs_needs_prolog
,
6761 4 - !vs_needs_prolog
, vs_needs_prolog
,
6762 vs_needs_prolog
? 2 : 1);
6764 LLVMValueRef parts
[2];
6765 union si_shader_part_key epilog_key
;
6767 parts
[0] = ctx
.main_fn
;
6769 memset(&epilog_key
, 0, sizeof(epilog_key
));
6770 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6771 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6772 parts
[1] = ctx
.main_fn
;
6774 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6776 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6777 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6778 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6779 LLVMValueRef es_prolog
= NULL
;
6780 LLVMValueRef es_main
= NULL
;
6781 LLVMValueRef gs_prolog
= NULL
;
6782 LLVMValueRef gs_main
= ctx
.main_fn
;
6785 union si_shader_part_key gs_prolog_key
;
6786 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6787 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6788 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6789 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6790 gs_prolog
= ctx
.main_fn
;
6793 struct si_shader shader_es
= {};
6794 shader_es
.selector
= es
;
6795 shader_es
.key
.as_es
= 1;
6796 shader_es
.key
.mono
= shader
->key
.mono
;
6797 shader_es
.key
.opt
= shader
->key
.opt
;
6798 shader_es
.is_monolithic
= true;
6799 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6801 if (!si_compile_tgsi_main(&ctx
)) {
6802 si_llvm_dispose(&ctx
);
6805 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6806 es_main
= ctx
.main_fn
;
6809 if (es
->vs_needs_prolog
) {
6810 union si_shader_part_key vs_prolog_key
;
6811 si_get_vs_prolog_key(&es
->info
,
6812 shader_es
.info
.num_input_sgprs
,
6813 &shader
->key
.part
.gs
.vs_prolog
,
6814 shader
, &vs_prolog_key
);
6815 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6816 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6817 es_prolog
= ctx
.main_fn
;
6820 /* Reset the shader context. */
6821 ctx
.shader
= shader
;
6822 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6824 /* Prepare the array of shader parts. */
6825 LLVMValueRef parts
[4];
6826 unsigned num_parts
= 0, main_part
, next_first_part
;
6829 parts
[num_parts
++] = es_prolog
;
6831 parts
[main_part
= num_parts
++] = es_main
;
6832 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6833 parts
[num_parts
++] = gs_main
;
6835 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6836 main_part
, next_first_part
);
6838 LLVMValueRef parts
[2];
6839 union si_shader_part_key prolog_key
;
6841 parts
[1] = ctx
.main_fn
;
6843 memset(&prolog_key
, 0, sizeof(prolog_key
));
6844 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6845 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6846 parts
[0] = ctx
.main_fn
;
6848 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6850 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6851 LLVMValueRef parts
[3];
6852 union si_shader_part_key prolog_key
;
6853 union si_shader_part_key epilog_key
;
6856 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6857 need_prolog
= si_need_ps_prolog(&prolog_key
);
6859 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6862 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6863 parts
[0] = ctx
.main_fn
;
6866 si_get_ps_epilog_key(shader
, &epilog_key
);
6867 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6868 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6870 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6871 need_prolog
? 1 : 0, 0);
6874 si_llvm_optimize_module(&ctx
);
6876 /* Post-optimization transformations and analysis. */
6877 si_optimize_vs_outputs(&ctx
);
6879 if ((debug
&& debug
->debug_message
) ||
6880 si_can_dump_shader(sscreen
, ctx
.type
)) {
6881 ctx
.shader
->info
.private_mem_vgprs
=
6882 ac_count_scratch_private_memory(ctx
.main_fn
);
6885 /* Make sure the input is a pointer and not integer followed by inttoptr. */
6886 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
6887 LLVMPointerTypeKind
);
6889 /* Compile to bytecode. */
6890 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
6891 ctx
.ac
.module
, debug
, ctx
.type
,
6892 si_get_shader_name(shader
, ctx
.type
),
6893 si_should_optimize_less(compiler
, shader
->selector
));
6894 si_llvm_dispose(&ctx
);
6896 fprintf(stderr
, "LLVM failed to compile shader\n");
6900 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6901 * LLVM 3.9svn has this bug.
6903 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6904 unsigned wave_size
= 64;
6905 unsigned max_vgprs
= 256;
6906 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
6907 unsigned max_sgprs_per_wave
= 128;
6908 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6909 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6910 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6912 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6913 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6915 if (shader
->config
.num_sgprs
> max_sgprs
||
6916 shader
->config
.num_vgprs
> max_vgprs
) {
6917 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6918 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6919 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6920 max_sgprs
, max_vgprs
);
6922 /* Just terminate the process, because dependent
6923 * shaders can hang due to bad input data, but use
6924 * the env var to allow shader-db to work.
6926 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6931 /* Add the scratch offset to input SGPRs. */
6932 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
6933 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6935 /* Calculate the number of fragment input VGPRs. */
6936 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6937 shader
->info
.num_input_vgprs
= 0;
6938 shader
->info
.face_vgpr_index
= -1;
6939 shader
->info
.ancillary_vgpr_index
= -1;
6941 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6942 shader
->info
.num_input_vgprs
+= 2;
6943 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6944 shader
->info
.num_input_vgprs
+= 2;
6945 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6946 shader
->info
.num_input_vgprs
+= 2;
6947 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6948 shader
->info
.num_input_vgprs
+= 3;
6949 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6950 shader
->info
.num_input_vgprs
+= 2;
6951 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6952 shader
->info
.num_input_vgprs
+= 2;
6953 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6954 shader
->info
.num_input_vgprs
+= 2;
6955 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6956 shader
->info
.num_input_vgprs
+= 1;
6957 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6958 shader
->info
.num_input_vgprs
+= 1;
6959 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6960 shader
->info
.num_input_vgprs
+= 1;
6961 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6962 shader
->info
.num_input_vgprs
+= 1;
6963 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6964 shader
->info
.num_input_vgprs
+= 1;
6965 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6966 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6967 shader
->info
.num_input_vgprs
+= 1;
6969 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6970 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6971 shader
->info
.num_input_vgprs
+= 1;
6973 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6974 shader
->info
.num_input_vgprs
+= 1;
6975 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6976 shader
->info
.num_input_vgprs
+= 1;
6979 si_calculate_max_simd_waves(shader
);
6980 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
6985 * Create, compile and return a shader part (prolog or epilog).
6987 * \param sscreen screen
6988 * \param list list of shader parts of the same category
6989 * \param type shader type
6990 * \param key shader part key
6991 * \param prolog whether the part being requested is a prolog
6992 * \param tm LLVM target machine
6993 * \param debug debug callback
6994 * \param build the callback responsible for building the main function
6995 * \return non-NULL on success
6997 static struct si_shader_part
*
6998 si_get_shader_part(struct si_screen
*sscreen
,
6999 struct si_shader_part
**list
,
7000 enum pipe_shader_type type
,
7002 union si_shader_part_key
*key
,
7003 struct ac_llvm_compiler
*compiler
,
7004 struct pipe_debug_callback
*debug
,
7005 void (*build
)(struct si_shader_context
*,
7006 union si_shader_part_key
*),
7009 struct si_shader_part
*result
;
7011 mtx_lock(&sscreen
->shader_parts_mutex
);
7013 /* Find existing. */
7014 for (result
= *list
; result
; result
= result
->next
) {
7015 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7016 mtx_unlock(&sscreen
->shader_parts_mutex
);
7021 /* Compile a new one. */
7022 result
= CALLOC_STRUCT(si_shader_part
);
7025 struct si_shader shader
= {};
7026 struct si_shader_context ctx
;
7028 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
7029 ctx
.shader
= &shader
;
7033 case PIPE_SHADER_VERTEX
:
7034 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7035 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7037 case PIPE_SHADER_TESS_CTRL
:
7039 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7041 case PIPE_SHADER_GEOMETRY
:
7044 case PIPE_SHADER_FRAGMENT
:
7046 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7048 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7051 unreachable("bad shader part");
7057 si_llvm_optimize_module(&ctx
);
7059 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7060 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
7066 result
->next
= *list
;
7070 si_llvm_dispose(&ctx
);
7071 mtx_unlock(&sscreen
->shader_parts_mutex
);
7075 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7077 LLVMValueRef ptr
[2], list
;
7078 bool merged_shader
= is_merged_shader(ctx
);
7080 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7081 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7082 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7087 * Build the vertex shader prolog function.
7089 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7090 * All inputs are returned unmodified. The vertex load indices are
7091 * stored after them, which will be used by the API VS for fetching inputs.
7093 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7098 * (VertexID + BaseVertex),
7099 * (InstanceID + StartInstance),
7100 * (InstanceID / 2 + StartInstance)
7102 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7103 union si_shader_part_key
*key
)
7105 struct si_function_info fninfo
;
7106 LLVMTypeRef
*returns
;
7107 LLVMValueRef ret
, func
;
7109 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7110 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7111 LLVMValueRef input_vgprs
[9];
7112 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7114 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7116 si_init_function_info(&fninfo
);
7118 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7119 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7120 sizeof(LLVMTypeRef
));
7123 /* Declare input and output SGPRs. */
7124 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7125 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7126 returns
[num_returns
++] = ctx
->i32
;
7129 /* Preloaded VGPRs (outputs must be floats) */
7130 for (i
= 0; i
< num_input_vgprs
; i
++) {
7131 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7132 returns
[num_returns
++] = ctx
->f32
;
7135 /* Vertex load indices. */
7136 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7137 returns
[num_returns
++] = ctx
->f32
;
7139 /* Create the function. */
7140 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7141 func
= ctx
->main_fn
;
7143 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7144 if (!key
->vs_prolog
.is_monolithic
)
7145 si_init_exec_from_input(ctx
, 3, 0);
7147 if (key
->vs_prolog
.as_ls
&&
7148 ctx
->screen
->has_ls_vgpr_init_bug
) {
7149 /* If there are no HS threads, SPI loads the LS VGPRs
7150 * starting at VGPR 0. Shift them back to where they
7153 LLVMValueRef has_hs_threads
=
7154 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7155 si_unpack_param(ctx
, 3, 8, 8),
7158 for (i
= 4; i
> 0; --i
) {
7159 input_vgprs
[i
+ 1] =
7160 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7162 input_vgprs
[i
- 1], "");
7167 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7168 unsigned instance_id_vgpr
= first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7170 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7171 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7173 /* InstanceID = VertexID >> 16;
7174 * VertexID = VertexID & 0xffff;
7176 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7177 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7178 LLVMConstInt(ctx
->i32
, 16, 0), "");
7179 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7180 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7183 /* Copy inputs to outputs. This should be no-op, as the registers match,
7184 * but it will prevent the compiler from overwriting them unintentionally.
7186 ret
= ctx
->return_value
;
7187 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7188 LLVMValueRef p
= LLVMGetParam(func
, i
);
7189 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7191 for (i
= 0; i
< num_input_vgprs
; i
++) {
7192 LLVMValueRef p
= input_vgprs
[i
];
7194 if (i
== vertex_id_vgpr
)
7195 p
= ctx
->abi
.vertex_id
;
7196 else if (i
== instance_id_vgpr
)
7197 p
= ctx
->abi
.instance_id
;
7199 p
= ac_to_float(&ctx
->ac
, p
);
7200 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7201 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7204 /* Compute vertex load indices from instance divisors. */
7205 LLVMValueRef instance_divisor_constbuf
= NULL
;
7207 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7208 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7209 LLVMValueRef buf_index
=
7210 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7211 instance_divisor_constbuf
=
7212 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7215 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7216 bool divisor_is_one
=
7217 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7218 bool divisor_is_fetched
=
7219 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7220 LLVMValueRef index
= NULL
;
7222 if (divisor_is_one
) {
7223 index
= ctx
->abi
.instance_id
;
7224 } else if (divisor_is_fetched
) {
7225 LLVMValueRef udiv_factors
[4];
7227 for (unsigned j
= 0; j
< 4; j
++) {
7229 buffer_load_const(ctx
, instance_divisor_constbuf
,
7230 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7231 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7233 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7234 * Such InstanceID might not be achievable in a reasonable time though.
7236 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7237 udiv_factors
[0], udiv_factors
[1],
7238 udiv_factors
[2], udiv_factors
[3]);
7241 if (divisor_is_one
|| divisor_is_fetched
) {
7242 /* Add StartInstance. */
7243 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7244 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7245 SI_SGPR_START_INSTANCE
), "");
7247 /* VertexID + BaseVertex */
7248 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7250 LLVMGetParam(func
, user_sgpr_base
+
7251 SI_SGPR_BASE_VERTEX
), "");
7254 index
= ac_to_float(&ctx
->ac
, index
);
7255 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7256 fninfo
.num_params
+ i
, "");
7259 si_llvm_build_ret(ctx
, ret
);
7262 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7263 struct ac_llvm_compiler
*compiler
,
7264 struct si_shader
*shader
,
7265 struct pipe_debug_callback
*debug
,
7266 struct si_shader
*main_part
,
7267 const struct si_vs_prolog_bits
*key
)
7269 struct si_shader_selector
*vs
= main_part
->selector
;
7271 if (!si_vs_needs_prolog(vs
, key
))
7274 /* Get the prolog. */
7275 union si_shader_part_key prolog_key
;
7276 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7277 key
, shader
, &prolog_key
);
7280 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7281 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7282 debug
, si_build_vs_prolog_function
,
7283 "Vertex Shader Prolog");
7284 return shader
->prolog
!= NULL
;
7288 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7290 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7291 struct ac_llvm_compiler
*compiler
,
7292 struct si_shader
*shader
,
7293 struct pipe_debug_callback
*debug
)
7295 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7296 &shader
->key
.part
.vs
.prolog
);
7300 * Compile the TCS epilog function. This writes tesselation factors to memory
7301 * based on the output primitive type of the tesselator (determined by TES).
7303 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7304 union si_shader_part_key
*key
)
7306 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7307 struct si_function_info fninfo
;
7310 si_init_function_info(&fninfo
);
7312 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7313 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7314 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7315 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7316 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7317 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7318 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7319 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7320 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7321 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7322 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7323 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7324 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7325 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7326 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7327 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7328 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7329 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7330 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7331 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7333 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7334 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7335 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7336 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7337 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7338 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7339 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7340 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7341 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7342 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7345 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7346 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7347 unsigned tess_factors_idx
=
7348 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7349 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7350 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7352 for (unsigned i
= 0; i
< 6; i
++)
7353 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7355 /* Create the function. */
7356 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7357 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 64);
7358 ac_declare_lds_as_pointer(&ctx
->ac
);
7359 func
= ctx
->main_fn
;
7361 LLVMValueRef invoc0_tess_factors
[6];
7362 for (unsigned i
= 0; i
< 6; i
++)
7363 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7365 si_write_tess_factors(bld_base
,
7366 LLVMGetParam(func
, tess_factors_idx
),
7367 LLVMGetParam(func
, tess_factors_idx
+ 1),
7368 LLVMGetParam(func
, tess_factors_idx
+ 2),
7369 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7371 LLVMBuildRetVoid(ctx
->ac
.builder
);
7375 * Select and compile (or reuse) TCS parts (epilog).
7377 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7378 struct ac_llvm_compiler
*compiler
,
7379 struct si_shader
*shader
,
7380 struct pipe_debug_callback
*debug
)
7382 if (sscreen
->info
.chip_class
>= GFX9
) {
7383 struct si_shader
*ls_main_part
=
7384 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7386 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7387 &shader
->key
.part
.tcs
.ls_prolog
))
7390 shader
->previous_stage
= ls_main_part
;
7393 /* Get the epilog. */
7394 union si_shader_part_key epilog_key
;
7395 memset(&epilog_key
, 0, sizeof(epilog_key
));
7396 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7398 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7399 PIPE_SHADER_TESS_CTRL
, false,
7400 &epilog_key
, compiler
, debug
,
7401 si_build_tcs_epilog_function
,
7402 "Tessellation Control Shader Epilog");
7403 return shader
->epilog
!= NULL
;
7407 * Select and compile (or reuse) GS parts (prolog).
7409 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7410 struct ac_llvm_compiler
*compiler
,
7411 struct si_shader
*shader
,
7412 struct pipe_debug_callback
*debug
)
7414 if (sscreen
->info
.chip_class
>= GFX9
) {
7415 struct si_shader
*es_main_part
=
7416 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7418 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7419 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7420 &shader
->key
.part
.gs
.vs_prolog
))
7423 shader
->previous_stage
= es_main_part
;
7426 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7429 union si_shader_part_key prolog_key
;
7430 memset(&prolog_key
, 0, sizeof(prolog_key
));
7431 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7433 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7434 PIPE_SHADER_GEOMETRY
, true,
7435 &prolog_key
, compiler
, debug
,
7436 si_build_gs_prolog_function
,
7437 "Geometry Shader Prolog");
7438 return shader
->prolog2
!= NULL
;
7442 * Build the pixel shader prolog function. This handles:
7443 * - two-side color selection and interpolation
7444 * - overriding interpolation parameters for the API PS
7445 * - polygon stippling
7447 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7448 * overriden by other states. (e.g. per-sample interpolation)
7449 * Interpolated colors are stored after the preloaded VGPRs.
7451 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7452 union si_shader_part_key
*key
)
7454 struct si_function_info fninfo
;
7455 LLVMValueRef ret
, func
;
7456 int num_returns
, i
, num_color_channels
;
7458 assert(si_need_ps_prolog(key
));
7460 si_init_function_info(&fninfo
);
7462 /* Declare inputs. */
7463 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7464 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7466 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7467 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7469 /* Declare outputs (same as inputs + add colors if needed) */
7470 num_returns
= fninfo
.num_params
;
7471 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7472 for (i
= 0; i
< num_color_channels
; i
++)
7473 fninfo
.types
[num_returns
++] = ctx
->f32
;
7475 /* Create the function. */
7476 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7478 func
= ctx
->main_fn
;
7480 /* Copy inputs to outputs. This should be no-op, as the registers match,
7481 * but it will prevent the compiler from overwriting them unintentionally.
7483 ret
= ctx
->return_value
;
7484 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7485 LLVMValueRef p
= LLVMGetParam(func
, i
);
7486 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7489 /* Polygon stippling. */
7490 if (key
->ps_prolog
.states
.poly_stipple
) {
7491 /* POS_FIXED_PT is always last. */
7492 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7493 key
->ps_prolog
.num_input_vgprs
- 1;
7494 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7496 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7499 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7500 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7501 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7502 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7504 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7505 * The hw doesn't compute CENTROID if the whole wave only
7506 * contains fully-covered quads.
7508 * PRIM_MASK is after user SGPRs.
7510 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7511 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7512 LLVMConstInt(ctx
->i32
, 31, 0), "");
7513 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7516 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7517 /* Read PERSP_CENTER. */
7518 for (i
= 0; i
< 2; i
++)
7519 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7520 /* Read PERSP_CENTROID. */
7521 for (i
= 0; i
< 2; i
++)
7522 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7523 /* Select PERSP_CENTROID. */
7524 for (i
= 0; i
< 2; i
++) {
7525 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7526 center
[i
], centroid
[i
], "");
7527 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7528 tmp
, base
+ 4 + i
, "");
7531 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7532 /* Read LINEAR_CENTER. */
7533 for (i
= 0; i
< 2; i
++)
7534 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7535 /* Read LINEAR_CENTROID. */
7536 for (i
= 0; i
< 2; i
++)
7537 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7538 /* Select LINEAR_CENTROID. */
7539 for (i
= 0; i
< 2; i
++) {
7540 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7541 center
[i
], centroid
[i
], "");
7542 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7543 tmp
, base
+ 10 + i
, "");
7548 /* Force per-sample interpolation. */
7549 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7550 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7551 LLVMValueRef persp_sample
[2];
7553 /* Read PERSP_SAMPLE. */
7554 for (i
= 0; i
< 2; i
++)
7555 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7556 /* Overwrite PERSP_CENTER. */
7557 for (i
= 0; i
< 2; i
++)
7558 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7559 persp_sample
[i
], base
+ 2 + i
, "");
7560 /* Overwrite PERSP_CENTROID. */
7561 for (i
= 0; i
< 2; i
++)
7562 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7563 persp_sample
[i
], base
+ 4 + i
, "");
7565 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7566 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7567 LLVMValueRef linear_sample
[2];
7569 /* Read LINEAR_SAMPLE. */
7570 for (i
= 0; i
< 2; i
++)
7571 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7572 /* Overwrite LINEAR_CENTER. */
7573 for (i
= 0; i
< 2; i
++)
7574 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7575 linear_sample
[i
], base
+ 8 + i
, "");
7576 /* Overwrite LINEAR_CENTROID. */
7577 for (i
= 0; i
< 2; i
++)
7578 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7579 linear_sample
[i
], base
+ 10 + i
, "");
7582 /* Force center interpolation. */
7583 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7584 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7585 LLVMValueRef persp_center
[2];
7587 /* Read PERSP_CENTER. */
7588 for (i
= 0; i
< 2; i
++)
7589 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7590 /* Overwrite PERSP_SAMPLE. */
7591 for (i
= 0; i
< 2; i
++)
7592 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7593 persp_center
[i
], base
+ i
, "");
7594 /* Overwrite PERSP_CENTROID. */
7595 for (i
= 0; i
< 2; i
++)
7596 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7597 persp_center
[i
], base
+ 4 + i
, "");
7599 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7600 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7601 LLVMValueRef linear_center
[2];
7603 /* Read LINEAR_CENTER. */
7604 for (i
= 0; i
< 2; i
++)
7605 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7606 /* Overwrite LINEAR_SAMPLE. */
7607 for (i
= 0; i
< 2; i
++)
7608 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7609 linear_center
[i
], base
+ 6 + i
, "");
7610 /* Overwrite LINEAR_CENTROID. */
7611 for (i
= 0; i
< 2; i
++)
7612 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7613 linear_center
[i
], base
+ 10 + i
, "");
7616 /* Interpolate colors. */
7617 unsigned color_out_idx
= 0;
7618 for (i
= 0; i
< 2; i
++) {
7619 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7620 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7621 key
->ps_prolog
.face_vgpr_index
;
7622 LLVMValueRef interp
[2], color
[4];
7623 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7628 /* If the interpolation qualifier is not CONSTANT (-1). */
7629 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7630 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7631 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7633 /* Get the (i,j) updated by bc_optimize handling. */
7634 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7636 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7637 interp_vgpr
+ 1, "");
7638 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7641 /* Use the absolute location of the input. */
7642 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7644 if (key
->ps_prolog
.states
.color_two_side
) {
7645 face
= LLVMGetParam(func
, face_vgpr
);
7646 face
= ac_to_integer(&ctx
->ac
, face
);
7649 interp_fs_input(ctx
,
7650 key
->ps_prolog
.color_attr_index
[i
],
7651 TGSI_SEMANTIC_COLOR
, i
,
7652 key
->ps_prolog
.num_interp_inputs
,
7653 key
->ps_prolog
.colors_read
, interp_ij
,
7654 prim_mask
, face
, color
);
7657 unsigned chan
= u_bit_scan(&writemask
);
7658 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7659 fninfo
.num_params
+ color_out_idx
++, "");
7663 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7666 * "When per-sample shading is active due to the use of a fragment
7667 * input qualified by sample or due to the use of the gl_SampleID
7668 * or gl_SamplePosition variables, only the bit for the current
7669 * sample is set in gl_SampleMaskIn. When state specifies multiple
7670 * fragment shader invocations for a given fragment, the sample
7671 * mask for any single fragment shader invocation may specify a
7672 * subset of the covered samples for the fragment. In this case,
7673 * the bit corresponding to each covered sample will be set in
7674 * exactly one fragment shader invocation."
7676 * The samplemask loaded by hardware is always the coverage of the
7677 * entire pixel/fragment, so mask bits out based on the sample ID.
7679 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7680 /* The bit pattern matches that used by fixed function fragment
7682 static const uint16_t ps_iter_masks
[] = {
7683 0xffff, /* not used */
7689 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7691 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7692 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7693 key
->ps_prolog
.ancillary_vgpr_index
;
7694 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7695 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7697 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7698 samplemask
= LLVMBuildAnd(
7701 LLVMBuildShl(ctx
->ac
.builder
,
7702 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7705 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7707 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7708 ancillary_vgpr
+ 1, "");
7711 /* Tell LLVM to insert WQM instruction sequence when needed. */
7712 if (key
->ps_prolog
.wqm
) {
7713 LLVMAddTargetDependentFunctionAttr(func
,
7714 "amdgpu-ps-wqm-outputs", "");
7717 si_llvm_build_ret(ctx
, ret
);
7721 * Build the pixel shader epilog function. This handles everything that must be
7722 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7724 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7725 union si_shader_part_key
*key
)
7727 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7728 struct si_function_info fninfo
;
7729 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7731 struct si_ps_exports exp
= {};
7733 si_init_function_info(&fninfo
);
7735 /* Declare input SGPRs. */
7736 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7737 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7738 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7739 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7740 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7742 /* Declare input VGPRs. */
7743 unsigned required_num_params
=
7744 fninfo
.num_sgpr_params
+
7745 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7746 key
->ps_epilog
.writes_z
+
7747 key
->ps_epilog
.writes_stencil
+
7748 key
->ps_epilog
.writes_samplemask
;
7750 required_num_params
= MAX2(required_num_params
,
7751 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7753 while (fninfo
.num_params
< required_num_params
)
7754 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7756 /* Create the function. */
7757 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7758 /* Disable elimination of unused inputs. */
7759 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7760 "InitialPSInputAddr", 0xffffff);
7762 /* Process colors. */
7763 unsigned vgpr
= fninfo
.num_sgpr_params
;
7764 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7765 int last_color_export
= -1;
7767 /* Find the last color export. */
7768 if (!key
->ps_epilog
.writes_z
&&
7769 !key
->ps_epilog
.writes_stencil
&&
7770 !key
->ps_epilog
.writes_samplemask
) {
7771 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7773 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7774 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7775 /* Just set this if any of the colorbuffers are enabled. */
7777 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7778 last_color_export
= 0;
7780 for (i
= 0; i
< 8; i
++)
7781 if (colors_written
& (1 << i
) &&
7782 (spi_format
>> (i
* 4)) & 0xf)
7783 last_color_export
= i
;
7787 while (colors_written
) {
7788 LLVMValueRef color
[4];
7789 int mrt
= u_bit_scan(&colors_written
);
7791 for (i
= 0; i
< 4; i
++)
7792 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7794 si_export_mrt_color(bld_base
, color
, mrt
,
7795 fninfo
.num_params
- 1,
7796 mrt
== last_color_export
, &exp
);
7799 /* Process depth, stencil, samplemask. */
7800 if (key
->ps_epilog
.writes_z
)
7801 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7802 if (key
->ps_epilog
.writes_stencil
)
7803 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7804 if (key
->ps_epilog
.writes_samplemask
)
7805 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7807 if (depth
|| stencil
|| samplemask
)
7808 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7809 else if (last_color_export
== -1)
7810 ac_build_export_null(&ctx
->ac
);
7813 si_emit_ps_exports(ctx
, &exp
);
7816 LLVMBuildRetVoid(ctx
->ac
.builder
);
7820 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7822 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7823 struct ac_llvm_compiler
*compiler
,
7824 struct si_shader
*shader
,
7825 struct pipe_debug_callback
*debug
)
7827 union si_shader_part_key prolog_key
;
7828 union si_shader_part_key epilog_key
;
7830 /* Get the prolog. */
7831 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7833 /* The prolog is a no-op if these aren't set. */
7834 if (si_need_ps_prolog(&prolog_key
)) {
7836 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7837 PIPE_SHADER_FRAGMENT
, true,
7838 &prolog_key
, compiler
, debug
,
7839 si_build_ps_prolog_function
,
7840 "Fragment Shader Prolog");
7841 if (!shader
->prolog
)
7845 /* Get the epilog. */
7846 si_get_ps_epilog_key(shader
, &epilog_key
);
7849 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7850 PIPE_SHADER_FRAGMENT
, false,
7851 &epilog_key
, compiler
, debug
,
7852 si_build_ps_epilog_function
,
7853 "Fragment Shader Epilog");
7854 if (!shader
->epilog
)
7857 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7858 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7859 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7860 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7863 /* Set up the enable bits for per-sample shading if needed. */
7864 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7865 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7866 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7867 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7868 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7869 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7871 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7872 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7873 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7874 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7875 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7876 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7878 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7879 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7880 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7881 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7882 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7883 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7885 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7886 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7887 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7888 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7889 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7890 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7893 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7894 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7895 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7896 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7897 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7900 /* At least one pair of interpolation weights must be enabled. */
7901 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7902 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7903 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7906 /* Samplemask fixup requires the sample ID. */
7907 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7908 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7909 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7912 /* The sample mask input is always enabled, because the API shader always
7913 * passes it through to the epilog. Disable it here if it's unused.
7915 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7916 !shader
->selector
->info
.reads_samplemask
)
7917 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7922 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7925 /* If tessellation is all offchip and on-chip GS isn't used, this
7926 * workaround is not needed.
7930 /* SPI barrier management bug:
7931 * Make sure we have at least 4k of LDS in use to avoid the bug.
7932 * It applies to workgroup sizes of more than one wavefront.
7934 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7935 sscreen
->info
.family
== CHIP_KABINI
)
7936 *lds_size
= MAX2(*lds_size
, 8);
7939 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7940 struct si_shader
*shader
)
7942 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7944 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7946 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7947 si_get_max_workgroup_size(shader
) > 64) {
7948 si_multiwave_lds_size_workaround(sscreen
,
7949 &shader
->config
.lds_size
);
7953 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
7954 struct si_shader
*shader
,
7955 struct pipe_debug_callback
*debug
)
7957 struct si_shader_selector
*sel
= shader
->selector
;
7958 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7961 /* LS, ES, VS are compiled on demand if the main part hasn't been
7962 * compiled for that stage.
7964 * Vertex shaders are compiled on demand when a vertex fetch
7965 * workaround must be applied.
7967 if (shader
->is_monolithic
) {
7968 /* Monolithic shader (compiled as a whole, has many variants,
7969 * may take a long time to compile).
7971 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
7975 /* The shader consists of several parts:
7977 * - the middle part is the user shader, it has 1 variant only
7978 * and it was compiled during the creation of the shader
7980 * - the prolog part is inserted at the beginning
7981 * - the epilog part is inserted at the end
7983 * The prolog and epilog have many (but simple) variants.
7985 * Starting with gfx9, geometry and tessellation control
7986 * shaders also contain the prolog and user shader parts of
7987 * the previous shader stage.
7993 /* Copy the compiled TGSI shader data over. */
7994 shader
->is_binary_shared
= true;
7995 shader
->binary
= mainp
->binary
;
7996 shader
->config
= mainp
->config
;
7997 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7998 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7999 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8000 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8001 memcpy(shader
->info
.vs_output_param_offset
,
8002 mainp
->info
.vs_output_param_offset
,
8003 sizeof(mainp
->info
.vs_output_param_offset
));
8004 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8005 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8006 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8008 /* Select prologs and/or epilogs. */
8009 switch (sel
->type
) {
8010 case PIPE_SHADER_VERTEX
:
8011 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8014 case PIPE_SHADER_TESS_CTRL
:
8015 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8018 case PIPE_SHADER_TESS_EVAL
:
8020 case PIPE_SHADER_GEOMETRY
:
8021 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8024 case PIPE_SHADER_FRAGMENT
:
8025 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8028 /* Make sure we have at least as many VGPRs as there
8029 * are allocated inputs.
8031 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8032 shader
->info
.num_input_vgprs
);
8036 /* Update SGPR and VGPR counts. */
8037 if (shader
->prolog
) {
8038 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8039 shader
->prolog
->config
.num_sgprs
);
8040 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8041 shader
->prolog
->config
.num_vgprs
);
8043 if (shader
->previous_stage
) {
8044 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8045 shader
->previous_stage
->config
.num_sgprs
);
8046 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8047 shader
->previous_stage
->config
.num_vgprs
);
8048 shader
->config
.spilled_sgprs
=
8049 MAX2(shader
->config
.spilled_sgprs
,
8050 shader
->previous_stage
->config
.spilled_sgprs
);
8051 shader
->config
.spilled_vgprs
=
8052 MAX2(shader
->config
.spilled_vgprs
,
8053 shader
->previous_stage
->config
.spilled_vgprs
);
8054 shader
->info
.private_mem_vgprs
=
8055 MAX2(shader
->info
.private_mem_vgprs
,
8056 shader
->previous_stage
->info
.private_mem_vgprs
);
8057 shader
->config
.scratch_bytes_per_wave
=
8058 MAX2(shader
->config
.scratch_bytes_per_wave
,
8059 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8060 shader
->info
.uses_instanceid
|=
8061 shader
->previous_stage
->info
.uses_instanceid
;
8063 if (shader
->prolog2
) {
8064 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8065 shader
->prolog2
->config
.num_sgprs
);
8066 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8067 shader
->prolog2
->config
.num_vgprs
);
8069 if (shader
->epilog
) {
8070 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8071 shader
->epilog
->config
.num_sgprs
);
8072 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8073 shader
->epilog
->config
.num_vgprs
);
8075 si_calculate_max_simd_waves(shader
);
8078 if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
)
8079 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8081 si_fix_resource_usage(sscreen
, shader
);
8082 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8086 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8087 fprintf(stderr
, "LLVM failed to upload shader\n");
8094 void si_shader_destroy(struct si_shader
*shader
)
8096 if (shader
->scratch_bo
)
8097 si_resource_reference(&shader
->scratch_bo
, NULL
);
8099 si_resource_reference(&shader
->bo
, NULL
);
8101 if (!shader
->is_binary_shared
)
8102 si_shader_binary_clean(&shader
->binary
);
8104 free(shader
->shader_log
);