2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "ac_shader_util.h"
41 #include "si_shader_internal.h"
45 #include "compiler/nir/nir.h"
47 static const char *scratch_rsrc_dword0_symbol
=
48 "SCRATCH_RSRC_DWORD0";
50 static const char *scratch_rsrc_dword1_symbol
=
51 "SCRATCH_RSRC_DWORD1";
53 struct si_shader_output_values
55 LLVMValueRef values
[4];
56 unsigned semantic_name
;
57 unsigned semantic_index
;
58 ubyte vertex_stream
[4];
62 * Used to collect types and other info about arguments of the LLVM function
63 * before the function is created.
65 struct si_function_info
{
66 LLVMTypeRef types
[100];
67 LLVMValueRef
*assign
[100];
68 unsigned num_sgpr_params
;
77 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
78 struct si_screen
*sscreen
,
79 LLVMTargetMachineRef tm
);
81 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
82 struct lp_build_tgsi_context
*bld_base
,
83 struct lp_build_emit_data
*emit_data
);
85 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
88 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
89 union si_shader_part_key
*key
);
90 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
91 union si_shader_part_key
*key
);
92 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
97 /* Ideally pass the sample mask input to the PS epilog as v14, which
98 * is its usual location, so that the shader doesn't have to add v_mov.
100 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
102 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
105 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
111 static bool is_merged_shader(struct si_shader
*shader
)
113 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
116 return shader
->key
.as_ls
||
118 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
119 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
122 static void si_init_function_info(struct si_function_info
*fninfo
)
124 fninfo
->num_params
= 0;
125 fninfo
->num_sgpr_params
= 0;
128 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
,
130 LLVMValueRef
*assign
)
132 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
134 unsigned idx
= fninfo
->num_params
++;
135 assert(idx
< ARRAY_SIZE(fninfo
->types
));
137 if (regfile
== ARG_SGPR
)
138 fninfo
->num_sgpr_params
= fninfo
->num_params
;
140 fninfo
->types
[idx
] = type
;
141 fninfo
->assign
[idx
] = assign
;
145 static unsigned add_arg(struct si_function_info
*fninfo
,
146 enum si_arg_regfile regfile
, LLVMTypeRef type
)
148 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
151 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
152 enum si_arg_regfile regfile
, LLVMTypeRef type
,
153 LLVMValueRef
*assign
, unsigned idx
)
155 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
156 assert(actual
== idx
);
159 static void add_arg_checked(struct si_function_info
*fninfo
,
160 enum si_arg_regfile regfile
, LLVMTypeRef type
,
163 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
167 * Returns a unique index for a per-patch semantic name and index. The index
168 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
171 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
173 switch (semantic_name
) {
174 case TGSI_SEMANTIC_TESSOUTER
:
176 case TGSI_SEMANTIC_TESSINNER
:
178 case TGSI_SEMANTIC_PATCH
:
183 assert(!"invalid semantic name");
189 * Returns a unique index for a semantic name and index. The index must be
190 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
193 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
195 switch (semantic_name
) {
196 case TGSI_SEMANTIC_POSITION
:
198 case TGSI_SEMANTIC_GENERIC
:
199 /* Since some shader stages use the the highest used IO index
200 * to determine the size to allocate for inputs/outputs
201 * (in LDS, tess and GS rings). GENERIC should be placed right
202 * after POSITION to make that size as small as possible.
204 if (index
< SI_MAX_IO_GENERIC
)
207 assert(!"invalid generic index");
209 case TGSI_SEMANTIC_PSIZE
:
210 return SI_MAX_IO_GENERIC
+ 1;
211 case TGSI_SEMANTIC_CLIPDIST
:
213 return SI_MAX_IO_GENERIC
+ 2 + index
;
214 case TGSI_SEMANTIC_FOG
:
215 return SI_MAX_IO_GENERIC
+ 4;
216 case TGSI_SEMANTIC_LAYER
:
217 return SI_MAX_IO_GENERIC
+ 5;
218 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
219 return SI_MAX_IO_GENERIC
+ 6;
220 case TGSI_SEMANTIC_PRIMID
:
221 return SI_MAX_IO_GENERIC
+ 7;
222 case TGSI_SEMANTIC_COLOR
: /* these alias */
223 case TGSI_SEMANTIC_BCOLOR
:
225 return SI_MAX_IO_GENERIC
+ 8 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
229 return SI_MAX_IO_GENERIC
+ 10 + index
;
231 assert(!"invalid semantic name");
237 * Get the value of a shader input parameter and extract a bitfield.
239 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
240 LLVMValueRef value
, unsigned rshift
,
243 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
244 value
= ac_to_integer(&ctx
->ac
, value
);
247 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
248 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
250 if (rshift
+ bitwidth
< 32) {
251 unsigned mask
= (1 << bitwidth
) - 1;
252 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
253 LLVMConstInt(ctx
->i32
, mask
, 0), "");
259 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
260 unsigned param
, unsigned rshift
,
263 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
265 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
268 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
271 case PIPE_SHADER_TESS_CTRL
:
272 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
274 case PIPE_SHADER_TESS_EVAL
:
275 return LLVMGetParam(ctx
->main_fn
,
276 ctx
->param_tes_rel_patch_id
);
284 /* Tessellation shaders pass outputs to the next shader using LDS.
286 * LS outputs = TCS inputs
287 * TCS outputs = TES inputs
290 * - TCS inputs for patch 0
291 * - TCS inputs for patch 1
292 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
294 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
295 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
296 * - TCS outputs for patch 1
297 * - Per-patch TCS outputs for patch 1
298 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
299 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
302 * All three shaders VS(LS), TCS, TES share the same LDS space.
306 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
308 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
311 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
313 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
315 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
316 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
318 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
321 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
323 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
325 return LLVMConstInt(ctx
->i32
, stride
, 0);
328 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
330 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
331 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
333 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
334 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
335 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
336 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
337 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
338 num_patch_outputs
* 4;
339 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
343 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
345 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
347 ctx
->param_tcs_out_lds_offsets
,
353 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
355 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
357 ctx
->param_tcs_out_lds_offsets
,
363 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
365 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
366 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
368 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
372 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
374 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
375 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
376 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
378 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
379 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
385 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
387 LLVMValueRef patch0_patch_data_offset
=
388 get_tcs_out_patch0_patch_data_offset(ctx
);
389 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
390 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
392 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
393 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
398 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
400 unsigned tcs_out_vertices
=
401 ctx
->shader
->selector
?
402 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
404 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
405 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
406 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
408 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
411 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
416 case PIPE_SHADER_VERTEX
:
417 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
418 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
420 case PIPE_SHADER_TESS_CTRL
:
421 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
422 ctx
->shader
->is_monolithic
) {
423 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
424 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
426 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
434 static LLVMValueRef
get_instance_index_for_fetch(
435 struct si_shader_context
*ctx
,
436 unsigned param_start_instance
, LLVMValueRef divisor
)
438 LLVMValueRef result
= ctx
->abi
.instance_id
;
440 /* The division must be done before START_INSTANCE is added. */
441 if (divisor
!= ctx
->i32_1
)
442 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
444 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
445 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
448 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
450 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
452 unsigned double_index
)
454 LLVMBuilderRef builder
= ctx
->ac
.builder
;
455 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
456 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
457 LLVMVectorType(f64
, 2), "");
458 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
459 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
460 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
463 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
464 LLVMValueRef i32
, unsigned index
)
469 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
470 LLVMConstInt(ctx
->i32
, 16, 0), "");
472 return LLVMBuildSExt(ctx
->ac
.builder
,
473 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
478 void si_llvm_load_input_vs(
479 struct si_shader_context
*ctx
,
480 unsigned input_index
,
483 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
484 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
486 if (vs_blit_property
) {
487 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
488 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
489 LLVMIntULE
, vertex_id
,
491 /* Use LLVMIntNE, because we have 3 vertices and only
492 * the middle one should use y2.
494 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
495 LLVMIntNE
, vertex_id
,
498 if (input_index
== 0) {
500 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
);
502 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
503 ctx
->param_vs_blit_inputs
+ 1);
505 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
506 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
507 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
508 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
510 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
512 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
515 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
516 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
517 out
[2] = LLVMGetParam(ctx
->main_fn
,
518 ctx
->param_vs_blit_inputs
+ 2);
519 out
[3] = ctx
->ac
.f32_1
;
523 /* Color or texture coordinates: */
524 assert(input_index
== 1);
526 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
527 for (int i
= 0; i
< 4; i
++) {
528 out
[i
] = LLVMGetParam(ctx
->main_fn
,
529 ctx
->param_vs_blit_inputs
+ 3 + i
);
532 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
533 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 3);
535 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
536 ctx
->param_vs_blit_inputs
+ 4);
537 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
538 ctx
->param_vs_blit_inputs
+ 5);
539 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
540 ctx
->param_vs_blit_inputs
+ 6);
542 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
544 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
546 out
[2] = LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_blit_inputs
+ 7);
548 out
[3] = LLVMGetParam(ctx
->main_fn
,
549 ctx
->param_vs_blit_inputs
+ 8);
556 unsigned num_fetches
;
557 unsigned fetch_stride
;
558 unsigned num_channels
;
560 LLVMValueRef t_list_ptr
;
561 LLVMValueRef t_offset
;
563 LLVMValueRef vertex_index
;
564 LLVMValueRef input
[3];
566 /* Load the T list */
567 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
569 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
571 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
573 vertex_index
= LLVMGetParam(ctx
->main_fn
,
574 ctx
->param_vertex_index0
+
577 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
579 /* Do multiple loads for special formats. */
581 case SI_FIX_FETCH_RGB_64_FLOAT
:
582 num_fetches
= 3; /* 3 2-dword loads */
586 case SI_FIX_FETCH_RGBA_64_FLOAT
:
587 num_fetches
= 2; /* 2 4-dword loads */
591 case SI_FIX_FETCH_RGB_8
:
592 case SI_FIX_FETCH_RGB_8_INT
:
597 case SI_FIX_FETCH_RGB_16
:
598 case SI_FIX_FETCH_RGB_16_INT
:
606 num_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
609 for (unsigned i
= 0; i
< num_fetches
; i
++) {
610 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
612 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
613 vertex_index
, voffset
,
614 num_channels
, false, true);
615 input
[i
] = ac_build_expand_to_vec4(&ctx
->ac
, input
[i
], num_channels
);
618 /* Break up the vec4 into individual components */
619 for (chan
= 0; chan
< 4; chan
++) {
620 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
621 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
622 input
[0], llvm_chan
, "");
626 case SI_FIX_FETCH_A2_SNORM
:
627 case SI_FIX_FETCH_A2_SSCALED
:
628 case SI_FIX_FETCH_A2_SINT
: {
629 /* The hardware returns an unsigned value; convert it to a
632 LLVMValueRef tmp
= out
[3];
633 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
635 /* First, recover the sign-extended signed integer value. */
636 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
637 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
639 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
641 /* For the integer-like cases, do a natural sign extension.
643 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
644 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
647 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
648 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
649 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
650 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
652 /* Convert back to the right type. */
653 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
655 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
656 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
657 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
658 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
659 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
660 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
666 case SI_FIX_FETCH_RGBA_32_UNORM
:
667 case SI_FIX_FETCH_RGBX_32_UNORM
:
668 for (chan
= 0; chan
< 4; chan
++) {
669 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
670 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
671 out
[chan
], ctx
->f32
, "");
672 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
673 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
675 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
676 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
677 out
[3] = LLVMConstReal(ctx
->f32
, 1);
679 case SI_FIX_FETCH_RGBA_32_SNORM
:
680 case SI_FIX_FETCH_RGBX_32_SNORM
:
681 case SI_FIX_FETCH_RGBA_32_FIXED
:
682 case SI_FIX_FETCH_RGBX_32_FIXED
: {
684 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
685 scale
= 1.0 / 0x10000;
687 scale
= 1.0 / INT_MAX
;
689 for (chan
= 0; chan
< 4; chan
++) {
690 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
691 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
692 out
[chan
], ctx
->f32
, "");
693 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
694 LLVMConstReal(ctx
->f32
, scale
), "");
696 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
697 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
698 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
699 out
[3] = LLVMConstReal(ctx
->f32
, 1);
702 case SI_FIX_FETCH_RGBA_32_USCALED
:
703 for (chan
= 0; chan
< 4; chan
++) {
704 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
705 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
706 out
[chan
], ctx
->f32
, "");
709 case SI_FIX_FETCH_RGBA_32_SSCALED
:
710 for (chan
= 0; chan
< 4; chan
++) {
711 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
712 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
713 out
[chan
], ctx
->f32
, "");
716 case SI_FIX_FETCH_RG_64_FLOAT
:
717 for (chan
= 0; chan
< 2; chan
++)
718 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
720 out
[2] = LLVMConstReal(ctx
->f32
, 0);
721 out
[3] = LLVMConstReal(ctx
->f32
, 1);
723 case SI_FIX_FETCH_RGB_64_FLOAT
:
724 for (chan
= 0; chan
< 3; chan
++)
725 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
727 out
[3] = LLVMConstReal(ctx
->f32
, 1);
729 case SI_FIX_FETCH_RGBA_64_FLOAT
:
730 for (chan
= 0; chan
< 4; chan
++) {
731 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
735 case SI_FIX_FETCH_RGB_8
:
736 case SI_FIX_FETCH_RGB_8_INT
:
737 case SI_FIX_FETCH_RGB_16
:
738 case SI_FIX_FETCH_RGB_16_INT
:
739 for (chan
= 0; chan
< 3; chan
++) {
740 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
744 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
745 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
746 out
[3] = LLVMConstReal(ctx
->f32
, 1);
748 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
754 static void declare_input_vs(
755 struct si_shader_context
*ctx
,
756 unsigned input_index
,
757 const struct tgsi_full_declaration
*decl
,
760 si_llvm_load_input_vs(ctx
, input_index
, out
);
763 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
770 case PIPE_SHADER_VERTEX
:
771 return LLVMGetParam(ctx
->main_fn
,
772 ctx
->param_vs_prim_id
);
773 case PIPE_SHADER_TESS_CTRL
:
774 return ctx
->abi
.tcs_patch_id
;
775 case PIPE_SHADER_TESS_EVAL
:
776 return ctx
->abi
.tes_patch_id
;
777 case PIPE_SHADER_GEOMETRY
:
778 return ctx
->abi
.gs_prim_id
;
786 * Return the value of tgsi_ind_register for indexing.
787 * This is the indirect index with the constant offset added to it.
789 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
790 const struct tgsi_ind_register
*ind
,
796 if (ind
->File
== TGSI_FILE_ADDRESS
) {
797 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
798 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
800 struct tgsi_full_src_register src
= {};
802 src
.Register
.File
= ind
->File
;
803 src
.Register
.Index
= ind
->Index
;
805 /* Set the second index to 0 for constants. */
806 if (ind
->File
== TGSI_FILE_CONSTANT
)
807 src
.Register
.Dimension
= 1;
809 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
812 result
= ac_to_integer(&ctx
->ac
, result
);
816 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
817 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
818 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
819 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
824 * Like si_get_indirect_index, but restricts the return value to a (possibly
825 * undefined) value inside [0..num).
827 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
828 const struct tgsi_ind_register
*ind
,
829 int rel_index
, unsigned num
)
831 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
833 return si_llvm_bound_index(ctx
, result
, num
);
836 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
837 LLVMValueRef vertex_dw_stride
,
838 LLVMValueRef base_addr
,
839 LLVMValueRef vertex_index
,
840 LLVMValueRef param_index
,
841 unsigned input_index
,
846 if (vertex_dw_stride
) {
847 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
848 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
849 vertex_dw_stride
, ""), "");
853 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
854 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
855 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
858 int param
= is_patch
?
859 si_shader_io_get_unique_index_patch(name
[input_index
],
860 index
[input_index
]) :
861 si_shader_io_get_unique_index(name
[input_index
],
864 /* Add the base address of the element. */
865 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
866 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
870 * Calculate a dword address given an input or output register and a stride.
872 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
873 const struct tgsi_full_dst_register
*dst
,
874 const struct tgsi_full_src_register
*src
,
875 LLVMValueRef vertex_dw_stride
,
876 LLVMValueRef base_addr
)
878 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
879 ubyte
*name
, *index
, *array_first
;
881 struct tgsi_full_dst_register reg
;
882 LLVMValueRef vertex_index
= NULL
;
883 LLVMValueRef ind_index
= NULL
;
885 /* Set the register description. The address computation is the same
886 * for sources and destinations. */
888 reg
.Register
.File
= src
->Register
.File
;
889 reg
.Register
.Index
= src
->Register
.Index
;
890 reg
.Register
.Indirect
= src
->Register
.Indirect
;
891 reg
.Register
.Dimension
= src
->Register
.Dimension
;
892 reg
.Indirect
= src
->Indirect
;
893 reg
.Dimension
= src
->Dimension
;
894 reg
.DimIndirect
= src
->DimIndirect
;
898 /* If the register is 2-dimensional (e.g. an array of vertices
899 * in a primitive), calculate the base address of the vertex. */
900 if (reg
.Register
.Dimension
) {
901 if (reg
.Dimension
.Indirect
)
902 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
903 1, reg
.Dimension
.Index
);
905 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
908 /* Get information about the register. */
909 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
910 name
= info
->input_semantic_name
;
911 index
= info
->input_semantic_index
;
912 array_first
= info
->input_array_first
;
913 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
914 name
= info
->output_semantic_name
;
915 index
= info
->output_semantic_index
;
916 array_first
= info
->output_array_first
;
922 if (reg
.Register
.Indirect
) {
923 /* Add the relative address of the element. */
924 if (reg
.Indirect
.ArrayID
)
925 input_index
= array_first
[reg
.Indirect
.ArrayID
];
927 input_index
= reg
.Register
.Index
;
929 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
930 1, reg
.Register
.Index
- input_index
);
932 input_index
= reg
.Register
.Index
;
935 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
936 base_addr
, vertex_index
,
937 ind_index
, input_index
,
939 !reg
.Register
.Dimension
);
942 /* The offchip buffer layout for TCS->TES is
944 * - attribute 0 of patch 0 vertex 0
945 * - attribute 0 of patch 0 vertex 1
946 * - attribute 0 of patch 0 vertex 2
948 * - attribute 0 of patch 1 vertex 0
949 * - attribute 0 of patch 1 vertex 1
951 * - attribute 1 of patch 0 vertex 0
952 * - attribute 1 of patch 0 vertex 1
954 * - per patch attribute 0 of patch 0
955 * - per patch attribute 0 of patch 1
958 * Note that every attribute has 4 components.
960 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
961 LLVMValueRef rel_patch_id
,
962 LLVMValueRef vertex_index
,
963 LLVMValueRef param_index
)
965 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
966 LLVMValueRef param_stride
, constant16
;
968 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
969 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
970 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
973 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
975 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
976 vertices_per_patch
, "");
978 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
981 param_stride
= total_vertices
;
983 base_addr
= rel_patch_id
;
984 param_stride
= num_patches
;
987 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
988 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
989 param_stride
, ""), "");
991 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
994 LLVMValueRef patch_data_offset
=
995 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
997 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
998 patch_data_offset
, "");
1003 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1004 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1005 struct si_shader_context
*ctx
,
1006 LLVMValueRef vertex_index
,
1007 LLVMValueRef param_index
,
1008 unsigned param_base
,
1013 unsigned param_index_base
;
1015 param_index_base
= is_patch
?
1016 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1017 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1020 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1021 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1024 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1027 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1028 vertex_index
, param_index
);
1031 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1032 struct si_shader_context
*ctx
,
1033 const struct tgsi_full_dst_register
*dst
,
1034 const struct tgsi_full_src_register
*src
)
1036 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1037 ubyte
*name
, *index
, *array_first
;
1038 struct tgsi_full_src_register reg
;
1039 LLVMValueRef vertex_index
= NULL
;
1040 LLVMValueRef param_index
= NULL
;
1041 unsigned param_base
;
1043 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1045 if (reg
.Register
.Dimension
) {
1047 if (reg
.Dimension
.Indirect
)
1048 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1049 1, reg
.Dimension
.Index
);
1051 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1054 /* Get information about the register. */
1055 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1056 name
= info
->input_semantic_name
;
1057 index
= info
->input_semantic_index
;
1058 array_first
= info
->input_array_first
;
1059 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1060 name
= info
->output_semantic_name
;
1061 index
= info
->output_semantic_index
;
1062 array_first
= info
->output_array_first
;
1068 if (reg
.Register
.Indirect
) {
1069 if (reg
.Indirect
.ArrayID
)
1070 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1072 param_base
= reg
.Register
.Index
;
1074 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1075 1, reg
.Register
.Index
- param_base
);
1078 param_base
= reg
.Register
.Index
;
1081 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1082 param_index
, param_base
,
1083 name
, index
, !reg
.Register
.Dimension
);
1086 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1087 LLVMTypeRef type
, unsigned swizzle
,
1088 LLVMValueRef buffer
, LLVMValueRef offset
,
1089 LLVMValueRef base
, bool can_speculate
)
1091 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1092 LLVMValueRef value
, value2
;
1093 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1095 if (swizzle
== ~0) {
1096 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1097 0, 1, 0, can_speculate
, false);
1099 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1102 if (!llvm_type_is_64bit(ctx
, type
)) {
1103 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1104 0, 1, 0, can_speculate
, false);
1106 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1107 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1108 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1111 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1112 swizzle
* 4, 1, 0, can_speculate
, false);
1114 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1115 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1117 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1123 * \param type output value type
1124 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1125 * \param dw_addr address in dwords
1127 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1128 LLVMTypeRef type
, unsigned swizzle
,
1129 LLVMValueRef dw_addr
)
1131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1134 if (swizzle
== ~0) {
1135 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1137 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1138 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1140 return lp_build_gather_values(&ctx
->gallivm
, values
,
1144 /* Split 64-bit loads. */
1145 if (llvm_type_is_64bit(ctx
, type
)) {
1146 LLVMValueRef lo
, hi
;
1148 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1149 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1150 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1153 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1154 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1156 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1158 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1164 * \param swizzle offset (typically 0..3)
1165 * \param dw_addr address in dwords
1166 * \param value value to store
1168 static void lds_store(struct si_shader_context
*ctx
,
1169 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1172 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1173 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1175 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1180 TESS_OFFCHIP_RING_TCS
,
1181 TESS_OFFCHIP_RING_TES
,
1184 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1185 enum si_tess_ring ring
)
1187 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1188 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1189 ctx
->param_tcs_out_lds_layout
;
1190 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1192 /* TCS only receives high 13 bits of the address. */
1193 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1194 addr
= LLVMBuildAnd(builder
, addr
,
1195 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1198 if (ring
== TCS_FACTOR_RING
) {
1199 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1200 addr
= LLVMBuildAdd(builder
, addr
,
1201 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1204 LLVMValueRef desc
[4];
1206 desc
[1] = LLVMConstInt(ctx
->i32
,
1207 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1208 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1209 desc
[3] = LLVMConstInt(ctx
->i32
,
1210 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1211 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1212 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1213 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1214 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1215 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1217 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1220 static LLVMValueRef
fetch_input_tcs(
1221 struct lp_build_tgsi_context
*bld_base
,
1222 const struct tgsi_full_src_register
*reg
,
1223 enum tgsi_opcode_type type
, unsigned swizzle
)
1225 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1226 LLVMValueRef dw_addr
, stride
;
1228 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1229 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1230 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1232 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1235 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1237 LLVMValueRef vertex_index
,
1238 LLVMValueRef param_index
,
1239 unsigned const_index
,
1241 unsigned driver_location
,
1243 unsigned num_components
,
1248 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1249 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1250 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1251 LLVMValueRef dw_addr
, stride
;
1253 driver_location
= driver_location
/ 4;
1256 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1257 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1261 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1263 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1264 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1269 /* Add the constant index to the indirect index */
1270 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1271 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1273 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1279 names
= info
->input_semantic_name
;
1280 indices
= info
->input_semantic_index
;
1282 names
= info
->output_semantic_name
;
1283 indices
= info
->output_semantic_index
;
1286 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1287 vertex_index
, param_index
,
1292 LLVMValueRef value
[4];
1293 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
1294 unsigned offset
= i
;
1295 if (llvm_type_is_64bit(ctx
, type
))
1298 value
[i
] = lds_load(bld_base
, type
, offset
, dw_addr
);
1301 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1304 static LLVMValueRef
fetch_output_tcs(
1305 struct lp_build_tgsi_context
*bld_base
,
1306 const struct tgsi_full_src_register
*reg
,
1307 enum tgsi_opcode_type type
, unsigned swizzle
)
1309 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1310 LLVMValueRef dw_addr
, stride
;
1312 if (reg
->Register
.Dimension
) {
1313 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1314 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1315 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1317 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1318 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1321 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1324 static LLVMValueRef
fetch_input_tes(
1325 struct lp_build_tgsi_context
*bld_base
,
1326 const struct tgsi_full_src_register
*reg
,
1327 enum tgsi_opcode_type type
, unsigned swizzle
)
1329 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1330 LLVMValueRef base
, addr
;
1332 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1333 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1335 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1336 ctx
->tess_offchip_ring
, base
, addr
, true);
1339 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1341 LLVMValueRef vertex_index
,
1342 LLVMValueRef param_index
,
1343 unsigned const_index
,
1345 unsigned driver_location
,
1347 unsigned num_components
,
1352 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1353 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1354 LLVMValueRef base
, addr
;
1356 driver_location
= driver_location
/ 4;
1358 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1361 /* Add the constant index to the indirect index */
1362 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1363 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1365 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1368 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1369 param_index
, driver_location
,
1370 info
->input_semantic_name
,
1371 info
->input_semantic_index
,
1374 /* TODO: This will generate rather ordinary llvm code, although it
1375 * should be easy for the optimiser to fix up. In future we might want
1376 * to refactor buffer_load(), but for now this maximises code sharing
1377 * between the NIR and TGSI backends.
1379 LLVMValueRef value
[4];
1380 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1381 unsigned offset
= i
;
1382 if (llvm_type_is_64bit(ctx
, type
))
1385 value
[i
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1386 ctx
->tess_offchip_ring
, base
, addr
, true);
1389 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1392 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1393 const struct tgsi_full_instruction
*inst
,
1394 const struct tgsi_opcode_info
*info
,
1396 LLVMValueRef dst
[4])
1398 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1399 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1400 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1401 unsigned chan_index
;
1402 LLVMValueRef dw_addr
, stride
;
1403 LLVMValueRef buffer
, base
, buf_addr
;
1404 LLVMValueRef values
[4];
1405 bool skip_lds_store
;
1406 bool is_tess_factor
= false, is_tess_inner
= false;
1408 /* Only handle per-patch and per-vertex outputs here.
1409 * Vectors will be lowered to scalars and this function will be called again.
1411 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1412 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1413 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1417 if (reg
->Register
.Dimension
) {
1418 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1419 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1420 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1421 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1423 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1424 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1425 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1427 if (!reg
->Register
.Indirect
) {
1428 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1430 /* Always write tess factors into LDS for the TCS epilog. */
1431 if (name
== TGSI_SEMANTIC_TESSINNER
||
1432 name
== TGSI_SEMANTIC_TESSOUTER
) {
1433 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1434 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1435 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1436 is_tess_factor
= true;
1437 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1442 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1444 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1445 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1447 uint32_t writemask
= reg
->Register
.WriteMask
;
1449 chan_index
= u_bit_scan(&writemask
);
1450 LLVMValueRef value
= dst
[chan_index
];
1452 if (inst
->Instruction
.Saturate
)
1453 value
= ac_build_clamp(&ctx
->ac
, value
);
1455 /* Skip LDS stores if there is no LDS read of this output. */
1456 if (!skip_lds_store
)
1457 lds_store(ctx
, chan_index
, dw_addr
, value
);
1459 value
= ac_to_integer(&ctx
->ac
, value
);
1460 values
[chan_index
] = value
;
1462 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1463 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1465 4 * chan_index
, 1, 0, true, false);
1468 /* Write tess factors into VGPRs for the epilog. */
1469 if (is_tess_factor
&&
1470 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1471 if (!is_tess_inner
) {
1472 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1473 ctx
->invoc0_tess_factors
[chan_index
]);
1474 } else if (chan_index
< 2) {
1475 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1476 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1481 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1482 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1484 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1485 base
, 0, 1, 0, true, false);
1489 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1490 LLVMValueRef vertex_index
,
1491 LLVMValueRef param_index
,
1492 unsigned const_index
,
1494 unsigned driver_location
,
1501 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1502 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1503 LLVMValueRef dw_addr
, stride
;
1504 LLVMValueRef buffer
, base
, addr
;
1505 LLVMValueRef values
[4];
1506 bool skip_lds_store
;
1507 bool is_tess_factor
= false, is_tess_inner
= false;
1509 driver_location
= driver_location
/ 4;
1512 /* Add the constant index to the indirect index */
1513 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1514 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1516 if (const_index
!= 0)
1517 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1521 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1522 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1523 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1524 vertex_index
, param_index
,
1526 info
->output_semantic_name
,
1527 info
->output_semantic_index
,
1530 skip_lds_store
= !info
->reads_pervertex_outputs
;
1532 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1533 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1534 vertex_index
, param_index
,
1536 info
->output_semantic_name
,
1537 info
->output_semantic_index
,
1540 skip_lds_store
= !info
->reads_perpatch_outputs
;
1543 int name
= info
->output_semantic_name
[driver_location
];
1545 /* Always write tess factors into LDS for the TCS epilog. */
1546 if (name
== TGSI_SEMANTIC_TESSINNER
||
1547 name
== TGSI_SEMANTIC_TESSOUTER
) {
1548 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1549 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1550 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1551 is_tess_factor
= true;
1552 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1557 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1559 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1561 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1562 param_index
, driver_location
,
1563 info
->output_semantic_name
,
1564 info
->output_semantic_index
,
1567 for (unsigned chan
= 0; chan
< 4; chan
++) {
1568 if (!(writemask
& (1 << chan
)))
1570 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1572 /* Skip LDS stores if there is no LDS read of this output. */
1573 if (!skip_lds_store
)
1574 lds_store(ctx
, chan
, dw_addr
, value
);
1576 value
= ac_to_integer(&ctx
->ac
, value
);
1577 values
[chan
] = value
;
1579 if (writemask
!= 0xF && !is_tess_factor
) {
1580 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1582 4 * chan
, 1, 0, true, false);
1585 /* Write tess factors into VGPRs for the epilog. */
1586 if (is_tess_factor
&&
1587 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1588 if (!is_tess_inner
) {
1589 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1590 ctx
->invoc0_tess_factors
[chan
]);
1591 } else if (chan
< 2) {
1592 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1593 ctx
->invoc0_tess_factors
[4 + chan
]);
1598 if (writemask
== 0xF && !is_tess_factor
) {
1599 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1601 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1602 base
, 0, 1, 0, true, false);
1606 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1607 unsigned input_index
,
1608 unsigned vtx_offset_param
,
1612 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1613 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1614 struct si_shader
*shader
= ctx
->shader
;
1615 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1616 LLVMValueRef vtx_offset
, soffset
;
1617 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1618 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1619 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1623 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1625 /* GFX9 has the ESGS ring in LDS. */
1626 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1627 unsigned index
= vtx_offset_param
;
1629 switch (index
/ 2) {
1631 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1632 index
% 2 ? 16 : 0, 16);
1635 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1636 index
% 2 ? 16 : 0, 16);
1639 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1640 index
% 2 ? 16 : 0, 16);
1647 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1648 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1649 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1652 /* GFX6: input load from the ESGS ring in memory. */
1653 if (swizzle
== ~0) {
1654 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1656 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1657 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1660 return lp_build_gather_values(&ctx
->gallivm
, values
,
1664 /* Get the vertex offset parameter on GFX6. */
1665 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1667 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1669 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1671 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1672 vtx_offset
, soffset
, 0, 1, 0, true, false);
1673 if (llvm_type_is_64bit(ctx
, type
)) {
1674 LLVMValueRef value2
;
1675 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1677 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1678 ctx
->i32_0
, vtx_offset
, soffset
,
1679 0, 1, 0, true, false);
1680 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1682 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1685 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1687 unsigned driver_location
,
1689 unsigned num_components
,
1690 unsigned vertex_index
,
1691 unsigned const_index
,
1694 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1696 LLVMValueRef value
[4];
1697 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1698 unsigned offset
= i
;
1699 if (llvm_type_is_64bit(ctx
, type
))
1702 value
[i
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1703 vertex_index
, type
, offset
);
1706 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1709 static LLVMValueRef
fetch_input_gs(
1710 struct lp_build_tgsi_context
*bld_base
,
1711 const struct tgsi_full_src_register
*reg
,
1712 enum tgsi_opcode_type type
,
1715 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1716 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1718 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1719 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1720 return get_primitive_id(ctx
, swizzle
);
1722 if (!reg
->Register
.Dimension
)
1725 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1726 reg
->Dimension
.Index
,
1727 tgsi2llvmtype(bld_base
, type
),
1731 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1733 switch (interpolate
) {
1734 case TGSI_INTERPOLATE_CONSTANT
:
1737 case TGSI_INTERPOLATE_LINEAR
:
1738 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1739 return SI_PARAM_LINEAR_SAMPLE
;
1740 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1741 return SI_PARAM_LINEAR_CENTROID
;
1743 return SI_PARAM_LINEAR_CENTER
;
1745 case TGSI_INTERPOLATE_COLOR
:
1746 case TGSI_INTERPOLATE_PERSPECTIVE
:
1747 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1748 return SI_PARAM_PERSP_SAMPLE
;
1749 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1750 return SI_PARAM_PERSP_CENTROID
;
1752 return SI_PARAM_PERSP_CENTER
;
1755 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1760 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1761 unsigned attr_index
, unsigned chan
,
1762 LLVMValueRef prim_mask
,
1763 LLVMValueRef i
, LLVMValueRef j
)
1766 return ac_build_fs_interp(&ctx
->ac
,
1767 LLVMConstInt(ctx
->i32
, chan
, 0),
1768 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1771 return ac_build_fs_interp_mov(&ctx
->ac
,
1772 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1773 LLVMConstInt(ctx
->i32
, chan
, 0),
1774 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1779 * Interpolate a fragment shader input.
1781 * @param ctx context
1782 * @param input_index index of the input in hardware
1783 * @param semantic_name TGSI_SEMANTIC_*
1784 * @param semantic_index semantic index
1785 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1786 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1787 * @param interp_param interpolation weights (i,j)
1788 * @param prim_mask SI_PARAM_PRIM_MASK
1789 * @param face SI_PARAM_FRONT_FACE
1790 * @param result the return value (4 components)
1792 static void interp_fs_input(struct si_shader_context
*ctx
,
1793 unsigned input_index
,
1794 unsigned semantic_name
,
1795 unsigned semantic_index
,
1796 unsigned num_interp_inputs
,
1797 unsigned colors_read_mask
,
1798 LLVMValueRef interp_param
,
1799 LLVMValueRef prim_mask
,
1801 LLVMValueRef result
[4])
1803 LLVMValueRef i
= NULL
, j
= NULL
;
1806 /* fs.constant returns the param from the middle vertex, so it's not
1807 * really useful for flat shading. It's meant to be used for custom
1808 * interpolation (but the intrinsic can't fetch from the other two
1811 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1812 * to do the right thing. The only reason we use fs.constant is that
1813 * fs.interp cannot be used on integers, because they can be equal
1816 * When interp is false we will use fs.constant or for newer llvm,
1817 * amdgcn.interp.mov.
1819 bool interp
= interp_param
!= NULL
;
1822 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1823 LLVMVectorType(ctx
->f32
, 2), "");
1825 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1827 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1831 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1832 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1833 LLVMValueRef is_face_positive
;
1835 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1836 * otherwise it's at offset "num_inputs".
1838 unsigned back_attr_offset
= num_interp_inputs
;
1839 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1840 back_attr_offset
+= 1;
1842 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1843 face
, ctx
->i32_0
, "");
1845 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1846 LLVMValueRef front
, back
;
1848 front
= si_build_fs_interp(ctx
,
1851 back
= si_build_fs_interp(ctx
,
1852 back_attr_offset
, chan
,
1855 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1861 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1862 result
[0] = si_build_fs_interp(ctx
, input_index
,
1863 0, prim_mask
, i
, j
);
1865 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1866 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1868 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1869 result
[chan
] = si_build_fs_interp(ctx
,
1876 void si_llvm_load_input_fs(
1877 struct si_shader_context
*ctx
,
1878 unsigned input_index
,
1879 LLVMValueRef out
[4])
1881 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1882 struct si_shader
*shader
= ctx
->shader
;
1883 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1884 LLVMValueRef main_fn
= ctx
->main_fn
;
1885 LLVMValueRef interp_param
= NULL
;
1886 int interp_param_idx
;
1887 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1888 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1889 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1890 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1892 /* Get colors from input VGPRs (set by the prolog). */
1893 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1894 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1895 unsigned mask
= colors_read
>> (semantic_index
* 4);
1896 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1897 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1899 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1900 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1901 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1902 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1906 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1907 if (interp_param_idx
== -1)
1909 else if (interp_param_idx
) {
1910 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1913 interp_fs_input(ctx
, input_index
, semantic_name
,
1914 semantic_index
, 0, /* this param is unused */
1915 shader
->selector
->info
.colors_read
, interp_param
,
1917 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1921 static void declare_input_fs(
1922 struct si_shader_context
*ctx
,
1923 unsigned input_index
,
1924 const struct tgsi_full_declaration
*decl
,
1925 LLVMValueRef out
[4])
1927 si_llvm_load_input_fs(ctx
, input_index
, out
);
1930 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1932 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1935 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1937 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1939 /* For non-indexed draws, the base vertex set by the driver
1940 * (for direct draws) or the CP (for indirect draws) is the
1941 * first vertex ID, but GLSL expects 0 to be returned.
1943 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1944 ctx
->param_vs_state_bits
);
1945 LLVMValueRef indexed
;
1947 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1948 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1950 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1954 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1956 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1958 LLVMValueRef values
[3];
1959 LLVMValueRef result
;
1961 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1963 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1964 unsigned sizes
[3] = {
1965 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1966 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1967 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1970 for (i
= 0; i
< 3; ++i
)
1971 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1973 result
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1975 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1982 * Load a dword from a constant buffer.
1984 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1985 LLVMValueRef resource
,
1986 LLVMValueRef offset
)
1988 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1989 0, 0, 0, true, true);
1992 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1994 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1995 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1996 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1997 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1998 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
2000 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2001 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
2002 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2004 LLVMValueRef pos
[4] = {
2005 buffer_load_const(ctx
, resource
, offset0
),
2006 buffer_load_const(ctx
, resource
, offset1
),
2007 LLVMConstReal(ctx
->f32
, 0),
2008 LLVMConstReal(ctx
->f32
, 0)
2011 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2014 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
2016 return abi
->sample_coverage
;
2019 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
2021 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2022 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
2024 LLVMValueRef coord
[4] = {
2025 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
2026 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
2031 /* For triangles, the vector should be (u, v, 1-u-v). */
2032 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
2033 PIPE_PRIM_TRIANGLES
)
2034 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
2035 lp_build_add(bld
, coord
[0], coord
[1]));
2037 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
2040 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
2041 unsigned semantic_name
)
2043 LLVMValueRef base
, addr
;
2045 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
2047 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2048 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
2049 LLVMConstInt(ctx
->i32
, param
, 0));
2051 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
2052 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
2056 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
2057 unsigned varying_id
)
2059 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2060 unsigned semantic_name
;
2062 switch (varying_id
) {
2063 case VARYING_SLOT_TESS_LEVEL_INNER
:
2064 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2066 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2067 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2070 unreachable("unknown tess level");
2073 return load_tess_level(ctx
, semantic_name
);
2077 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2079 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2080 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2081 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2082 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2083 return get_num_tcs_out_vertices(ctx
);
2085 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2088 void si_load_system_value(struct si_shader_context
*ctx
,
2090 const struct tgsi_full_declaration
*decl
)
2092 LLVMValueRef value
= 0;
2094 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2096 switch (decl
->Semantic
.Name
) {
2097 case TGSI_SEMANTIC_INSTANCEID
:
2098 value
= ctx
->abi
.instance_id
;
2101 case TGSI_SEMANTIC_VERTEXID
:
2102 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2104 ctx
->abi
.base_vertex
, "");
2107 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2108 /* Unused. Clarify the meaning in indexed vs. non-indexed
2109 * draws if this is ever used again. */
2113 case TGSI_SEMANTIC_BASEVERTEX
:
2114 value
= get_base_vertex(&ctx
->abi
);
2117 case TGSI_SEMANTIC_BASEINSTANCE
:
2118 value
= ctx
->abi
.start_instance
;
2121 case TGSI_SEMANTIC_DRAWID
:
2122 value
= ctx
->abi
.draw_id
;
2125 case TGSI_SEMANTIC_INVOCATIONID
:
2126 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2127 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2128 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2129 value
= ctx
->abi
.gs_invocation_id
;
2131 assert(!"INVOCATIONID not implemented");
2134 case TGSI_SEMANTIC_POSITION
:
2136 LLVMValueRef pos
[4] = {
2137 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2138 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2139 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2140 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2141 LLVMGetParam(ctx
->main_fn
,
2142 SI_PARAM_POS_W_FLOAT
)),
2144 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2148 case TGSI_SEMANTIC_FACE
:
2149 value
= ctx
->abi
.front_face
;
2152 case TGSI_SEMANTIC_SAMPLEID
:
2153 value
= get_sample_id(ctx
);
2156 case TGSI_SEMANTIC_SAMPLEPOS
: {
2157 LLVMValueRef pos
[4] = {
2158 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2159 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2160 LLVMConstReal(ctx
->f32
, 0),
2161 LLVMConstReal(ctx
->f32
, 0)
2163 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2164 TGSI_OPCODE_FRC
, pos
[0]);
2165 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2166 TGSI_OPCODE_FRC
, pos
[1]);
2167 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2171 case TGSI_SEMANTIC_SAMPLEMASK
:
2172 /* This can only occur with the OpenGL Core profile, which
2173 * doesn't support smoothing.
2175 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2178 case TGSI_SEMANTIC_TESSCOORD
:
2179 value
= si_load_tess_coord(&ctx
->abi
);
2182 case TGSI_SEMANTIC_VERTICESIN
:
2183 value
= si_load_patch_vertices_in(&ctx
->abi
);
2186 case TGSI_SEMANTIC_TESSINNER
:
2187 case TGSI_SEMANTIC_TESSOUTER
:
2188 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2191 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2192 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2194 LLVMValueRef buf
, slot
, val
[4];
2197 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2198 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2199 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2200 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2202 for (i
= 0; i
< 4; i
++)
2203 val
[i
] = buffer_load_const(ctx
, buf
,
2204 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2205 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2209 case TGSI_SEMANTIC_PRIMID
:
2210 value
= get_primitive_id(ctx
, 0);
2213 case TGSI_SEMANTIC_GRID_SIZE
:
2214 value
= ctx
->abi
.num_work_groups
;
2217 case TGSI_SEMANTIC_BLOCK_SIZE
:
2218 value
= get_block_size(&ctx
->abi
);
2221 case TGSI_SEMANTIC_BLOCK_ID
:
2223 LLVMValueRef values
[3];
2225 for (int i
= 0; i
< 3; i
++) {
2226 values
[i
] = ctx
->i32_0
;
2227 if (ctx
->abi
.workgroup_ids
[i
]) {
2228 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2231 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2235 case TGSI_SEMANTIC_THREAD_ID
:
2236 value
= ctx
->abi
.local_invocation_ids
;
2239 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2240 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2241 "llvm.amdgcn.ps.live",
2243 LP_FUNC_ATTR_READNONE
);
2244 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2245 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2248 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2249 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2252 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2253 value
= ac_get_thread_id(&ctx
->ac
);
2256 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2258 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2259 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2260 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2261 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2265 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2266 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2267 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2268 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2270 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2271 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2272 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2273 /* All bits set except LSB */
2274 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2277 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2279 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2280 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2281 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2282 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2283 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2284 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2289 assert(!"unknown system value");
2293 ctx
->system_values
[index
] = value
;
2296 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2298 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2300 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2303 assert(!ctx
->ac
.lds
);
2305 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2306 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2308 AC_LOCAL_ADDR_SPACE
);
2309 LLVMSetAlignment(var
, 4);
2311 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2314 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2315 const struct tgsi_full_declaration
*decl
)
2317 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2318 assert(decl
->Range
.First
== decl
->Range
.Last
);
2320 si_declare_compute_memory(ctx
);
2323 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2325 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2326 ctx
->param_const_and_shader_buffers
);
2328 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2329 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2332 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2334 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2335 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2337 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2338 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2339 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2341 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2345 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2347 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2348 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2349 ctx
->param_const_and_shader_buffers
);
2351 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2352 index
= LLVMBuildSub(ctx
->ac
.builder
,
2353 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2356 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2359 static LLVMValueRef
fetch_constant(
2360 struct lp_build_tgsi_context
*bld_base
,
2361 const struct tgsi_full_src_register
*reg
,
2362 enum tgsi_opcode_type type
,
2365 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2366 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2367 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2370 LLVMValueRef addr
, bufp
;
2372 if (swizzle
== LP_CHAN_ALL
) {
2374 LLVMValueRef values
[4];
2375 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2376 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2378 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2381 /* Split 64-bit loads. */
2382 if (tgsi_type_is_64bit(type
)) {
2383 LLVMValueRef lo
, hi
;
2385 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2386 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2387 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2391 idx
= reg
->Register
.Index
* 4 + swizzle
;
2392 if (reg
->Register
.Indirect
) {
2393 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2395 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2398 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2399 if (sel
->info
.const_buffers_declared
== 1 &&
2400 sel
->info
.shader_buffers_declared
== 0) {
2402 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2404 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2405 * loads, and up to x4 load opcode merging. However, it leads to horrible
2406 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2408 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2410 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2411 * a descriptor and s_buffer_load_dword using it, so we can't expand
2412 * the pointer into a full descriptor like below. We have to use
2413 * s_load_dword instead. The only case when LLVM 5.0 would select
2414 * s_buffer_load_dword (that we have to prevent) is when we use use
2415 * a literal offset where we don't need bounds checking.
2417 if (ctx
->screen
->info
.chip_class
== SI
&&
2418 HAVE_LLVM
< 0x0600 &&
2419 !reg
->Register
.Indirect
) {
2420 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2421 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2422 return bitcast(bld_base
, type
, result
);
2425 /* Do the bounds checking with a descriptor, because
2426 * doing computation and manual bounds checking of 64-bit
2427 * addresses generates horrible VALU code with very high
2428 * VGPR usage and very low SIMD occupancy.
2430 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2432 LLVMValueRef desc0
, desc1
;
2433 if (HAVE_32BIT_POINTERS
) {
2435 desc1
= LLVMConstInt(ctx
->i32
,
2436 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2438 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2439 desc0
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, "");
2440 desc1
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, "");
2441 /* Mask out all bits except BASE_ADDRESS_HI. */
2442 desc1
= LLVMBuildAnd(ctx
->ac
.builder
, desc1
,
2443 LLVMConstInt(ctx
->i32
, ~C_008F04_BASE_ADDRESS_HI
, 0), "");
2446 LLVMValueRef desc_elems
[] = {
2449 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2450 LLVMConstInt(ctx
->i32
,
2451 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2452 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2453 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2454 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2455 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2456 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2458 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2459 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2460 return bitcast(bld_base
, type
, result
);
2463 assert(reg
->Register
.Dimension
);
2464 buf
= reg
->Dimension
.Index
;
2466 if (reg
->Dimension
.Indirect
) {
2467 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2469 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2470 reg
->Dimension
.Index
,
2471 ctx
->num_const_buffers
);
2472 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2473 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2474 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2476 bufp
= load_const_buffer_desc(ctx
, buf
);
2478 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2481 /* Initialize arguments for the shader export intrinsic */
2482 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2483 LLVMValueRef
*values
,
2485 struct ac_export_args
*args
)
2487 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2488 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2490 bool is_int8
, is_int10
;
2492 /* Default is 0xf. Adjusted below depending on the format. */
2493 args
->enabled_channels
= 0xf; /* writemask */
2495 /* Specify whether the EXEC mask represents the valid mask */
2496 args
->valid_mask
= 0;
2498 /* Specify whether this is the last export */
2501 /* Specify the target we are exporting */
2502 args
->target
= target
;
2504 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2505 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2506 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2507 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2509 assert(cbuf
>= 0 && cbuf
< 8);
2510 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2511 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2512 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2515 args
->compr
= false;
2516 args
->out
[0] = f32undef
;
2517 args
->out
[1] = f32undef
;
2518 args
->out
[2] = f32undef
;
2519 args
->out
[3] = f32undef
;
2521 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2522 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2523 unsigned bits
, bool hi
) = NULL
;
2525 switch (spi_shader_col_format
) {
2526 case V_028714_SPI_SHADER_ZERO
:
2527 args
->enabled_channels
= 0; /* writemask */
2528 args
->target
= V_008DFC_SQ_EXP_NULL
;
2531 case V_028714_SPI_SHADER_32_R
:
2532 args
->enabled_channels
= 1; /* writemask */
2533 args
->out
[0] = values
[0];
2536 case V_028714_SPI_SHADER_32_GR
:
2537 args
->enabled_channels
= 0x3; /* writemask */
2538 args
->out
[0] = values
[0];
2539 args
->out
[1] = values
[1];
2542 case V_028714_SPI_SHADER_32_AR
:
2543 args
->enabled_channels
= 0x9; /* writemask */
2544 args
->out
[0] = values
[0];
2545 args
->out
[3] = values
[3];
2548 case V_028714_SPI_SHADER_FP16_ABGR
:
2549 packf
= ac_build_cvt_pkrtz_f16
;
2552 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2553 packf
= ac_build_cvt_pknorm_u16
;
2556 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2557 packf
= ac_build_cvt_pknorm_i16
;
2560 case V_028714_SPI_SHADER_UINT16_ABGR
:
2561 packi
= ac_build_cvt_pk_u16
;
2564 case V_028714_SPI_SHADER_SINT16_ABGR
:
2565 packi
= ac_build_cvt_pk_i16
;
2568 case V_028714_SPI_SHADER_32_ABGR
:
2569 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2573 /* Pack f16 or norm_i16/u16. */
2575 for (chan
= 0; chan
< 2; chan
++) {
2576 LLVMValueRef pack_args
[2] = {
2578 values
[2 * chan
+ 1]
2580 LLVMValueRef packed
;
2582 packed
= packf(&ctx
->ac
, pack_args
);
2583 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2585 args
->compr
= 1; /* COMPR flag */
2589 for (chan
= 0; chan
< 2; chan
++) {
2590 LLVMValueRef pack_args
[2] = {
2591 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2592 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2594 LLVMValueRef packed
;
2596 packed
= packi(&ctx
->ac
, pack_args
,
2597 is_int8
? 8 : is_int10
? 10 : 16,
2599 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2601 args
->compr
= 1; /* COMPR flag */
2605 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2608 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2610 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2611 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2612 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2613 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2614 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2615 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2616 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2617 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2619 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2622 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2623 SI_PARAM_ALPHA_REF
);
2624 LLVMValueRef alpha_pass
=
2625 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2626 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2628 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2632 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2634 unsigned samplemask_param
)
2636 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2637 LLVMValueRef coverage
;
2639 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2640 coverage
= LLVMGetParam(ctx
->main_fn
,
2642 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2644 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2646 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2648 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2651 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2652 LLVMConstReal(ctx
->f32
,
2653 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2655 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2658 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2659 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2663 unsigned const_chan
;
2664 LLVMValueRef base_elt
;
2665 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2666 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2667 SI_VS_CONST_CLIP_PLANES
, 0);
2668 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2670 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2671 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2676 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2678 /* Compute dot products of position and user clip plane vectors */
2679 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2680 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2682 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2683 const_chan
) * 4, 0);
2684 base_elt
= buffer_load_const(ctx
, const_resource
,
2687 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2688 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2689 out_elts
[const_chan
]));
2693 args
->enabled_channels
= 0xf;
2694 args
->valid_mask
= 0;
2696 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2701 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2705 if (so
->num_outputs
)
2706 fprintf(stderr
, "STREAMOUT\n");
2708 for (i
= 0; i
< so
->num_outputs
; i
++) {
2709 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2710 so
->output
[i
].start_component
;
2711 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2712 i
, so
->output
[i
].output_buffer
,
2713 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2714 so
->output
[i
].register_index
,
2715 mask
& 1 ? "x" : "",
2716 mask
& 2 ? "y" : "",
2717 mask
& 4 ? "z" : "",
2718 mask
& 8 ? "w" : "");
2722 static void emit_streamout_output(struct si_shader_context
*ctx
,
2723 LLVMValueRef
const *so_buffers
,
2724 LLVMValueRef
const *so_write_offsets
,
2725 struct pipe_stream_output
*stream_out
,
2726 struct si_shader_output_values
*shader_out
)
2728 unsigned buf_idx
= stream_out
->output_buffer
;
2729 unsigned start
= stream_out
->start_component
;
2730 unsigned num_comps
= stream_out
->num_components
;
2731 LLVMValueRef out
[4];
2733 assert(num_comps
&& num_comps
<= 4);
2734 if (!num_comps
|| num_comps
> 4)
2737 /* Load the output as int. */
2738 for (int j
= 0; j
< num_comps
; j
++) {
2739 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2741 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2744 /* Pack the output. */
2745 LLVMValueRef vdata
= NULL
;
2747 switch (num_comps
) {
2748 case 1: /* as i32 */
2751 case 2: /* as v2i32 */
2752 case 3: /* as v4i32 (aligned to 4) */
2753 case 4: /* as v4i32 */
2754 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2755 for (int j
= 0; j
< num_comps
; j
++) {
2756 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2757 LLVMConstInt(ctx
->i32
, j
, 0), "");
2762 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2764 so_write_offsets
[buf_idx
],
2766 stream_out
->dst_offset
* 4, 1, 1, true, false);
2770 * Write streamout data to buffers for vertex stream @p stream (different
2771 * vertex streams can occur for GS copy shaders).
2773 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2774 struct si_shader_output_values
*outputs
,
2775 unsigned noutput
, unsigned stream
)
2777 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2778 struct pipe_stream_output_info
*so
= &sel
->so
;
2779 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2781 struct lp_build_if_state if_ctx
;
2783 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2784 LLVMValueRef so_vtx_count
=
2785 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2787 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2789 /* can_emit = tid < so_vtx_count; */
2790 LLVMValueRef can_emit
=
2791 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2793 /* Emit the streamout code conditionally. This actually avoids
2794 * out-of-bounds buffer access. The hw tells us via the SGPR
2795 * (so_vtx_count) which threads are allowed to emit streamout data. */
2796 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2798 /* The buffer offset is computed as follows:
2799 * ByteOffset = streamout_offset[buffer_id]*4 +
2800 * (streamout_write_index + thread_id)*stride[buffer_id] +
2804 LLVMValueRef so_write_index
=
2805 LLVMGetParam(ctx
->main_fn
,
2806 ctx
->param_streamout_write_index
);
2808 /* Compute (streamout_write_index + thread_id). */
2809 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2811 /* Load the descriptor and compute the write offset for each
2812 * enabled buffer. */
2813 LLVMValueRef so_write_offset
[4] = {};
2814 LLVMValueRef so_buffers
[4];
2815 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2816 ctx
->param_rw_buffers
);
2818 for (i
= 0; i
< 4; i
++) {
2822 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2823 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2825 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2827 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2828 ctx
->param_streamout_offset
[i
]);
2829 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2831 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2832 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2833 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2836 /* Write streamout data. */
2837 for (i
= 0; i
< so
->num_outputs
; i
++) {
2838 unsigned reg
= so
->output
[i
].register_index
;
2843 if (stream
!= so
->output
[i
].stream
)
2846 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2847 &so
->output
[i
], &outputs
[reg
]);
2850 lp_build_endif(&if_ctx
);
2853 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2854 LLVMValueRef
*values
)
2856 struct ac_export_args args
;
2858 si_llvm_init_export_args(ctx
, values
,
2859 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2860 ac_build_export(&ctx
->ac
, &args
);
2863 static void si_build_param_exports(struct si_shader_context
*ctx
,
2864 struct si_shader_output_values
*outputs
,
2867 struct si_shader
*shader
= ctx
->shader
;
2868 unsigned param_count
= 0;
2870 for (unsigned i
= 0; i
< noutput
; i
++) {
2871 unsigned semantic_name
= outputs
[i
].semantic_name
;
2872 unsigned semantic_index
= outputs
[i
].semantic_index
;
2874 if (outputs
[i
].vertex_stream
[0] != 0 &&
2875 outputs
[i
].vertex_stream
[1] != 0 &&
2876 outputs
[i
].vertex_stream
[2] != 0 &&
2877 outputs
[i
].vertex_stream
[3] != 0)
2880 switch (semantic_name
) {
2881 case TGSI_SEMANTIC_LAYER
:
2882 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2883 case TGSI_SEMANTIC_CLIPDIST
:
2884 case TGSI_SEMANTIC_COLOR
:
2885 case TGSI_SEMANTIC_BCOLOR
:
2886 case TGSI_SEMANTIC_PRIMID
:
2887 case TGSI_SEMANTIC_FOG
:
2888 case TGSI_SEMANTIC_TEXCOORD
:
2889 case TGSI_SEMANTIC_GENERIC
:
2895 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2896 semantic_index
< SI_MAX_IO_GENERIC
) &&
2897 shader
->key
.opt
.kill_outputs
&
2898 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2901 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2903 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2904 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2907 shader
->info
.nr_param_exports
= param_count
;
2910 /* Generate export instructions for hardware VS shader stage */
2911 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2912 struct si_shader_output_values
*outputs
,
2915 struct si_shader
*shader
= ctx
->shader
;
2916 struct ac_export_args pos_args
[4] = {};
2917 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2921 /* Build position exports. */
2922 for (i
= 0; i
< noutput
; i
++) {
2923 switch (outputs
[i
].semantic_name
) {
2924 case TGSI_SEMANTIC_POSITION
:
2925 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2926 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2928 case TGSI_SEMANTIC_PSIZE
:
2929 psize_value
= outputs
[i
].values
[0];
2931 case TGSI_SEMANTIC_LAYER
:
2932 layer_value
= outputs
[i
].values
[0];
2934 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2935 viewport_index_value
= outputs
[i
].values
[0];
2937 case TGSI_SEMANTIC_EDGEFLAG
:
2938 edgeflag_value
= outputs
[i
].values
[0];
2940 case TGSI_SEMANTIC_CLIPDIST
:
2941 if (!shader
->key
.opt
.clip_disable
) {
2942 unsigned index
= 2 + outputs
[i
].semantic_index
;
2943 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2944 V_008DFC_SQ_EXP_POS
+ index
,
2948 case TGSI_SEMANTIC_CLIPVERTEX
:
2949 if (!shader
->key
.opt
.clip_disable
) {
2950 si_llvm_emit_clipvertex(ctx
, pos_args
,
2957 /* We need to add the position output manually if it's missing. */
2958 if (!pos_args
[0].out
[0]) {
2959 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2960 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2961 pos_args
[0].done
= 0; /* last export? */
2962 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2963 pos_args
[0].compr
= 0; /* COMPR flag */
2964 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2965 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2966 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2967 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2970 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2971 if (shader
->selector
->info
.writes_psize
||
2972 shader
->selector
->info
.writes_edgeflag
||
2973 shader
->selector
->info
.writes_viewport_index
||
2974 shader
->selector
->info
.writes_layer
) {
2975 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2976 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2977 (shader
->selector
->info
.writes_layer
<< 2);
2979 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2980 pos_args
[1].done
= 0; /* last export? */
2981 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2982 pos_args
[1].compr
= 0; /* COMPR flag */
2983 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2984 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2985 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2986 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2988 if (shader
->selector
->info
.writes_psize
)
2989 pos_args
[1].out
[0] = psize_value
;
2991 if (shader
->selector
->info
.writes_edgeflag
) {
2992 /* The output is a float, but the hw expects an integer
2993 * with the first bit containing the edge flag. */
2994 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2997 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3001 /* The LLVM intrinsic expects a float. */
3002 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3005 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3006 /* GFX9 has the layer in out.z[10:0] and the viewport
3007 * index in out.z[19:16].
3009 if (shader
->selector
->info
.writes_layer
)
3010 pos_args
[1].out
[2] = layer_value
;
3012 if (shader
->selector
->info
.writes_viewport_index
) {
3013 LLVMValueRef v
= viewport_index_value
;
3015 v
= ac_to_integer(&ctx
->ac
, v
);
3016 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3017 LLVMConstInt(ctx
->i32
, 16, 0), "");
3018 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3019 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3020 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3021 pos_args
[1].enabled_channels
|= 1 << 2;
3024 if (shader
->selector
->info
.writes_layer
)
3025 pos_args
[1].out
[2] = layer_value
;
3027 if (shader
->selector
->info
.writes_viewport_index
) {
3028 pos_args
[1].out
[3] = viewport_index_value
;
3029 pos_args
[1].enabled_channels
|= 1 << 3;
3034 for (i
= 0; i
< 4; i
++)
3035 if (pos_args
[i
].out
[0])
3036 shader
->info
.nr_pos_exports
++;
3039 for (i
= 0; i
< 4; i
++) {
3040 if (!pos_args
[i
].out
[0])
3043 /* Specify the target we are exporting */
3044 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3046 if (pos_idx
== shader
->info
.nr_pos_exports
)
3047 /* Specify that this is the last export */
3048 pos_args
[i
].done
= 1;
3050 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3053 /* Build parameter exports. */
3054 si_build_param_exports(ctx
, outputs
, noutput
);
3058 * Forward all outputs from the vertex shader to the TES. This is only used
3059 * for the fixed function TCS.
3061 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3063 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3064 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3065 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3068 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3069 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3070 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3072 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3073 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3074 lds_vertex_stride
, "");
3075 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3076 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3078 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3080 unsigned i
= u_bit_scan64(&inputs
);
3082 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3083 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3086 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3087 get_rel_patch_id(ctx
),
3089 LLVMConstInt(ctx
->i32
, i
, 0));
3091 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3094 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3095 buffer_offset
, 0, 1, 0, true, false);
3099 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3100 LLVMValueRef rel_patch_id
,
3101 LLVMValueRef invocation_id
,
3102 LLVMValueRef tcs_out_current_patch_data_offset
,
3103 LLVMValueRef invoc0_tf_outer
[4],
3104 LLVMValueRef invoc0_tf_inner
[2])
3106 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3107 struct si_shader
*shader
= ctx
->shader
;
3108 unsigned tess_inner_index
, tess_outer_index
;
3109 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3110 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3111 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3112 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3114 /* Add a barrier before loading tess factors from LDS. */
3115 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3116 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3118 /* Do this only for invocation 0, because the tess levels are per-patch,
3121 * This can't jump, because invocation 0 executes this. It should
3122 * at least mask out the loads and stores for other invocations.
3124 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3125 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3126 invocation_id
, ctx
->i32_0
, ""));
3128 /* Determine the layout of one tess factor element in the buffer. */
3129 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3130 case PIPE_PRIM_LINES
:
3131 stride
= 2; /* 2 dwords, 1 vec2 store */
3135 case PIPE_PRIM_TRIANGLES
:
3136 stride
= 4; /* 4 dwords, 1 vec4 store */
3140 case PIPE_PRIM_QUADS
:
3141 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3150 for (i
= 0; i
< 4; i
++) {
3151 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3152 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3155 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3156 /* Tess factors are in VGPRs. */
3157 for (i
= 0; i
< outer_comps
; i
++)
3158 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3159 for (i
= 0; i
< inner_comps
; i
++)
3160 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3162 /* Load tess_inner and tess_outer from LDS.
3163 * Any invocation can write them, so we can't get them from a temporary.
3165 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3166 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3168 lds_base
= tcs_out_current_patch_data_offset
;
3169 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3170 LLVMConstInt(ctx
->i32
,
3171 tess_inner_index
* 4, 0), "");
3172 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3173 LLVMConstInt(ctx
->i32
,
3174 tess_outer_index
* 4, 0), "");
3176 for (i
= 0; i
< outer_comps
; i
++) {
3178 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3180 for (i
= 0; i
< inner_comps
; i
++) {
3181 inner
[i
] = out
[outer_comps
+i
] =
3182 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3186 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3187 /* For isolines, the hardware expects tess factors in the
3188 * reverse order from what GLSL / TGSI specify.
3190 LLVMValueRef tmp
= out
[0];
3195 /* Convert the outputs to vectors for stores. */
3196 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3200 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3202 /* Get the buffer. */
3203 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3205 /* Get the offset. */
3206 tf_base
= LLVMGetParam(ctx
->main_fn
,
3207 ctx
->param_tcs_factor_offset
);
3208 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3209 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3211 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3212 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3213 rel_patch_id
, ctx
->i32_0
, ""));
3215 /* Store the dynamic HS control word. */
3217 if (ctx
->screen
->info
.chip_class
<= VI
) {
3218 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3219 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3220 1, ctx
->i32_0
, tf_base
,
3221 offset
, 1, 0, true, false);
3225 lp_build_endif(&inner_if_ctx
);
3227 /* Store the tessellation factors. */
3228 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3229 MIN2(stride
, 4), byteoffset
, tf_base
,
3230 offset
, 1, 0, true, false);
3233 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3234 stride
- 4, byteoffset
, tf_base
,
3235 offset
, 1, 0, true, false);
3237 /* Store the tess factors into the offchip buffer if TES reads them. */
3238 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3239 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3240 LLVMValueRef tf_inner_offset
;
3241 unsigned param_outer
, param_inner
;
3243 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3244 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3246 param_outer
= si_shader_io_get_unique_index_patch(
3247 TGSI_SEMANTIC_TESSOUTER
, 0);
3248 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3249 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3251 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3252 util_next_power_of_two(outer_comps
));
3254 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3255 outer_comps
, tf_outer_offset
,
3256 base
, 0, 1, 0, true, false);
3258 param_inner
= si_shader_io_get_unique_index_patch(
3259 TGSI_SEMANTIC_TESSINNER
, 0);
3260 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3261 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3263 inner_vec
= inner_comps
== 1 ? inner
[0] :
3264 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3265 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3266 inner_comps
, tf_inner_offset
,
3267 base
, 0, 1, 0, true, false);
3271 lp_build_endif(&if_ctx
);
3275 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3276 unsigned param
, unsigned return_index
)
3278 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3279 LLVMGetParam(ctx
->main_fn
, param
),
3284 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3285 unsigned param
, unsigned return_index
)
3287 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3288 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3290 return LLVMBuildInsertValue(builder
, ret
,
3291 ac_to_float(&ctx
->ac
, p
),
3296 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3297 unsigned param
, unsigned return_index
)
3299 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3300 LLVMValueRef ptr
, lo
, hi
;
3302 if (HAVE_32BIT_POINTERS
) {
3303 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3304 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3305 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3308 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3309 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3310 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3311 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3312 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3313 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3314 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3317 /* This only writes the tessellation factor levels. */
3318 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3319 unsigned max_outputs
,
3320 LLVMValueRef
*addrs
)
3322 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3323 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3324 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3325 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3327 si_copy_tcs_inputs(bld_base
);
3329 rel_patch_id
= get_rel_patch_id(ctx
);
3330 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3331 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3333 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3334 LLVMBasicBlockRef blocks
[2] = {
3335 LLVMGetInsertBlock(builder
),
3336 ctx
->merged_wrap_if_state
.entry_block
3338 LLVMValueRef values
[2];
3340 lp_build_endif(&ctx
->merged_wrap_if_state
);
3342 values
[0] = rel_patch_id
;
3343 values
[1] = LLVMGetUndef(ctx
->i32
);
3344 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3346 values
[0] = tf_lds_offset
;
3347 values
[1] = LLVMGetUndef(ctx
->i32
);
3348 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3350 values
[0] = invocation_id
;
3351 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3352 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3355 /* Return epilog parameters from this function. */
3356 LLVMValueRef ret
= ctx
->return_value
;
3359 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3360 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3361 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3362 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3363 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3364 /* Tess offchip and tess factor offsets are at the beginning. */
3365 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3366 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3367 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3370 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3371 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3372 GFX6_SGPR_TCS_OUT_LAYOUT
);
3373 /* Tess offchip and tess factor offsets are after user SGPRs. */
3374 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3375 GFX6_TCS_NUM_USER_SGPR
);
3376 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3377 GFX6_TCS_NUM_USER_SGPR
+ 1);
3378 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3382 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3383 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3384 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3386 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3387 * the invocation_id output does not alias the tcs_rel_ids input,
3388 * which saves a V_MOV on gfx9.
3392 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3393 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3395 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3396 vgpr
++; /* skip the tess factor LDS offset */
3397 for (unsigned i
= 0; i
< 6; i
++) {
3398 LLVMValueRef value
=
3399 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3400 value
= ac_to_float(&ctx
->ac
, value
);
3401 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3404 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3406 ctx
->return_value
= ret
;
3409 /* Pass TCS inputs from LS to TCS on GFX9. */
3410 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3412 LLVMValueRef ret
= ctx
->return_value
;
3414 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3415 if (HAVE_32BIT_POINTERS
)
3416 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3417 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3418 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3419 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3420 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3422 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3423 8 + SI_SGPR_RW_BUFFERS
);
3424 ret
= si_insert_input_ptr(ctx
, ret
,
3425 ctx
->param_bindless_samplers_and_images
,
3426 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3428 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3429 8 + SI_SGPR_VS_STATE_BITS
);
3431 #if !HAVE_32BIT_POINTERS
3432 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3433 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3436 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3437 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3438 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3439 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3440 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3441 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3443 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3444 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3445 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3447 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3448 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3450 ctx
->return_value
= ret
;
3453 /* Pass GS inputs from ES to GS on GFX9. */
3454 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3456 LLVMValueRef ret
= ctx
->return_value
;
3458 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3459 if (HAVE_32BIT_POINTERS
)
3460 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3461 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3462 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3463 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3465 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3466 8 + SI_SGPR_RW_BUFFERS
);
3467 ret
= si_insert_input_ptr(ctx
, ret
,
3468 ctx
->param_bindless_samplers_and_images
,
3469 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3471 #if !HAVE_32BIT_POINTERS
3472 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3473 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3477 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3478 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3480 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3482 for (unsigned i
= 0; i
< 5; i
++) {
3483 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3484 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3486 ctx
->return_value
= ret
;
3489 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3490 unsigned max_outputs
,
3491 LLVMValueRef
*addrs
)
3493 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3494 struct si_shader
*shader
= ctx
->shader
;
3495 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3497 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3498 ctx
->param_rel_auto_id
);
3499 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3500 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3501 vertex_dw_stride
, "");
3503 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3504 * its inputs from it. */
3505 for (i
= 0; i
< info
->num_outputs
; i
++) {
3506 unsigned name
= info
->output_semantic_name
[i
];
3507 unsigned index
= info
->output_semantic_index
[i
];
3509 /* The ARB_shader_viewport_layer_array spec contains the
3512 * 2) What happens if gl_ViewportIndex or gl_Layer is
3513 * written in the vertex shader and a geometry shader is
3516 * RESOLVED: The value written by the last vertex processing
3517 * stage is used. If the last vertex processing stage
3518 * (vertex, tessellation evaluation or geometry) does not
3519 * statically assign to gl_ViewportIndex or gl_Layer, index
3520 * or layer zero is assumed.
3522 * So writes to those outputs in VS-as-LS are simply ignored.
3524 if (name
== TGSI_SEMANTIC_LAYER
||
3525 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3528 int param
= si_shader_io_get_unique_index(name
, index
);
3529 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3530 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3532 for (chan
= 0; chan
< 4; chan
++) {
3533 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3536 lds_store(ctx
, chan
, dw_addr
,
3537 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3541 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3542 si_set_ls_return_value_for_tcs(ctx
);
3545 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3546 unsigned max_outputs
,
3547 LLVMValueRef
*addrs
)
3549 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3550 struct si_shader
*es
= ctx
->shader
;
3551 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3552 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3553 ctx
->param_es2gs_offset
);
3554 LLVMValueRef lds_base
= NULL
;
3558 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3559 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3560 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3561 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3562 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3563 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3564 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3565 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3566 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3569 for (i
= 0; i
< info
->num_outputs
; i
++) {
3572 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3573 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3576 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3577 info
->output_semantic_index
[i
]);
3579 for (chan
= 0; chan
< 4; chan
++) {
3580 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3581 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3583 /* GFX9 has the ESGS ring in LDS. */
3584 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3585 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3589 ac_build_buffer_store_dword(&ctx
->ac
,
3591 out_val
, 1, NULL
, soffset
,
3592 (4 * param
+ chan
) * 4,
3597 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3598 si_set_es_return_value_for_gs(ctx
);
3601 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3603 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3604 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3606 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3609 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3611 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3612 si_get_gs_wave_id(ctx
));
3614 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3615 lp_build_endif(&ctx
->merged_wrap_if_state
);
3618 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3619 unsigned max_outputs
,
3620 LLVMValueRef
*addrs
)
3622 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3623 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3625 assert(info
->num_outputs
<= max_outputs
);
3627 emit_gs_epilogue(ctx
);
3630 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3632 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3633 emit_gs_epilogue(ctx
);
3636 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3637 unsigned max_outputs
,
3638 LLVMValueRef
*addrs
)
3640 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3641 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3642 struct si_shader_output_values
*outputs
= NULL
;
3645 assert(!ctx
->shader
->is_gs_copy_shader
);
3646 assert(info
->num_outputs
<= max_outputs
);
3648 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3650 /* Vertex color clamping.
3652 * This uses a state constant loaded in a user data SGPR and
3653 * an IF statement is added that clamps all colors if the constant
3656 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3657 struct lp_build_if_state if_ctx
;
3658 LLVMValueRef cond
= NULL
;
3659 LLVMValueRef addr
, val
;
3661 for (i
= 0; i
< info
->num_outputs
; i
++) {
3662 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3663 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3666 /* We've found a color. */
3668 /* The state is in the first bit of the user SGPR. */
3669 cond
= LLVMGetParam(ctx
->main_fn
,
3670 ctx
->param_vs_state_bits
);
3671 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3673 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3676 for (j
= 0; j
< 4; j
++) {
3677 addr
= addrs
[4 * i
+ j
];
3678 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3679 val
= ac_build_clamp(&ctx
->ac
, val
);
3680 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3685 lp_build_endif(&if_ctx
);
3688 for (i
= 0; i
< info
->num_outputs
; i
++) {
3689 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3690 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3692 for (j
= 0; j
< 4; j
++) {
3693 outputs
[i
].values
[j
] =
3694 LLVMBuildLoad(ctx
->ac
.builder
,
3697 outputs
[i
].vertex_stream
[j
] =
3698 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3702 if (ctx
->shader
->selector
->so
.num_outputs
)
3703 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3705 /* Export PrimitiveID. */
3706 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3707 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3708 outputs
[i
].semantic_index
= 0;
3709 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3710 for (j
= 1; j
< 4; j
++)
3711 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3713 memset(outputs
[i
].vertex_stream
, 0,
3714 sizeof(outputs
[i
].vertex_stream
));
3718 si_llvm_export_vs(ctx
, outputs
, i
);
3722 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3724 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3726 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3727 &ctx
->outputs
[0][0]);
3730 struct si_ps_exports
{
3732 struct ac_export_args args
[10];
3735 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3736 LLVMValueRef depth
, LLVMValueRef stencil
,
3737 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3739 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3740 struct ac_export_args args
;
3742 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3744 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3747 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3748 LLVMValueRef
*color
, unsigned index
,
3749 unsigned samplemask_param
,
3750 bool is_last
, struct si_ps_exports
*exp
)
3752 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3756 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3757 for (i
= 0; i
< 4; i
++)
3758 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3761 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3762 color
[3] = ctx
->ac
.f32_1
;
3766 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3767 si_alpha_test(bld_base
, color
[3]);
3769 /* Line & polygon smoothing */
3770 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3771 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3774 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3775 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3776 struct ac_export_args args
[8];
3779 /* Get the export arguments, also find out what the last one is. */
3780 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3781 si_llvm_init_export_args(ctx
, color
,
3782 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3783 if (args
[c
].enabled_channels
)
3787 /* Emit all exports. */
3788 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3789 if (is_last
&& last
== c
) {
3790 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3791 args
[c
].done
= 1; /* DONE bit */
3792 } else if (!args
[c
].enabled_channels
)
3793 continue; /* unnecessary NULL export */
3795 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3798 struct ac_export_args args
;
3801 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3804 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3805 args
.done
= 1; /* DONE bit */
3806 } else if (!args
.enabled_channels
)
3807 return; /* unnecessary NULL export */
3809 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3813 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3814 struct si_ps_exports
*exp
)
3816 for (unsigned i
= 0; i
< exp
->num
; i
++)
3817 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3821 * Return PS outputs in this order:
3823 * v[0:3] = color0.xyzw
3824 * v[4:7] = color1.xyzw
3829 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3831 * The alpha-ref SGPR is returned via its original location.
3833 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3834 unsigned max_outputs
,
3835 LLVMValueRef
*addrs
)
3837 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3838 struct si_shader
*shader
= ctx
->shader
;
3839 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3840 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3841 unsigned i
, j
, first_vgpr
, vgpr
;
3843 LLVMValueRef color
[8][4] = {};
3844 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3847 if (ctx
->postponed_kill
)
3848 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3850 /* Read the output values. */
3851 for (i
= 0; i
< info
->num_outputs
; i
++) {
3852 unsigned semantic_name
= info
->output_semantic_name
[i
];
3853 unsigned semantic_index
= info
->output_semantic_index
[i
];
3855 switch (semantic_name
) {
3856 case TGSI_SEMANTIC_COLOR
:
3857 assert(semantic_index
< 8);
3858 for (j
= 0; j
< 4; j
++) {
3859 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3860 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3861 color
[semantic_index
][j
] = result
;
3864 case TGSI_SEMANTIC_POSITION
:
3865 depth
= LLVMBuildLoad(builder
,
3866 addrs
[4 * i
+ 2], "");
3868 case TGSI_SEMANTIC_STENCIL
:
3869 stencil
= LLVMBuildLoad(builder
,
3870 addrs
[4 * i
+ 1], "");
3872 case TGSI_SEMANTIC_SAMPLEMASK
:
3873 samplemask
= LLVMBuildLoad(builder
,
3874 addrs
[4 * i
+ 0], "");
3877 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3882 /* Fill the return structure. */
3883 ret
= ctx
->return_value
;
3886 ret
= LLVMBuildInsertValue(builder
, ret
,
3887 ac_to_integer(&ctx
->ac
,
3888 LLVMGetParam(ctx
->main_fn
,
3889 SI_PARAM_ALPHA_REF
)),
3890 SI_SGPR_ALPHA_REF
, "");
3893 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3894 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3898 for (j
= 0; j
< 4; j
++)
3899 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3902 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3904 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3906 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3908 /* Add the input sample mask for smoothing at the end. */
3909 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3910 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3911 ret
= LLVMBuildInsertValue(builder
, ret
,
3912 LLVMGetParam(ctx
->main_fn
,
3913 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3915 ctx
->return_value
= ret
;
3918 static void membar_emit(
3919 const struct lp_build_tgsi_action
*action
,
3920 struct lp_build_tgsi_context
*bld_base
,
3921 struct lp_build_emit_data
*emit_data
)
3923 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3924 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3925 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3926 unsigned waitcnt
= NOOP_WAITCNT
;
3928 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3929 waitcnt
&= VM_CNT
& LGKM_CNT
;
3931 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3932 TGSI_MEMBAR_SHADER_BUFFER
|
3933 TGSI_MEMBAR_SHADER_IMAGE
))
3936 if (flags
& TGSI_MEMBAR_SHARED
)
3937 waitcnt
&= LGKM_CNT
;
3939 if (waitcnt
!= NOOP_WAITCNT
)
3940 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3943 static void clock_emit(
3944 const struct lp_build_tgsi_action
*action
,
3945 struct lp_build_tgsi_context
*bld_base
,
3946 struct lp_build_emit_data
*emit_data
)
3948 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3949 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3951 emit_data
->output
[0] =
3952 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3953 emit_data
->output
[1] =
3954 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3957 static void si_llvm_emit_ddxy(
3958 const struct lp_build_tgsi_action
*action
,
3959 struct lp_build_tgsi_context
*bld_base
,
3960 struct lp_build_emit_data
*emit_data
)
3962 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3963 unsigned opcode
= emit_data
->info
->opcode
;
3968 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3969 mask
= AC_TID_MASK_LEFT
;
3970 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3971 mask
= AC_TID_MASK_TOP
;
3973 mask
= AC_TID_MASK_TOP_LEFT
;
3975 /* for DDX we want to next X pixel, DDY next Y pixel. */
3976 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3978 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3979 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3980 emit_data
->output
[emit_data
->chan
] = val
;
3984 * this takes an I,J coordinate pair,
3985 * and works out the X and Y derivatives.
3986 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3988 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3989 struct lp_build_tgsi_context
*bld_base
,
3990 LLVMValueRef interp_ij
)
3992 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3993 LLVMValueRef result
[4], a
;
3996 for (i
= 0; i
< 2; i
++) {
3997 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3998 LLVMConstInt(ctx
->i32
, i
, 0), "");
3999 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
4000 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
4003 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
4006 static void interp_fetch_args(
4007 struct lp_build_tgsi_context
*bld_base
,
4008 struct lp_build_emit_data
*emit_data
)
4010 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4011 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4013 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4014 /* offset is in second src, first two channels */
4015 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4018 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4021 emit_data
->arg_count
= 2;
4022 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4023 LLVMValueRef sample_position
;
4024 LLVMValueRef sample_id
;
4025 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4027 /* fetch sample ID, then fetch its sample position,
4028 * and place into first two channels.
4030 sample_id
= lp_build_emit_fetch(bld_base
,
4031 emit_data
->inst
, 1, TGSI_CHAN_X
);
4032 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4034 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4035 * Language 4.50 spec says about interpolateAtSample:
4037 * "Returns the value of the input interpolant variable at
4038 * the location of sample number sample. If multisample
4039 * buffers are not available, the input variable will be
4040 * evaluated at the center of the pixel. If sample sample
4041 * does not exist, the position used to interpolate the
4042 * input variable is undefined."
4044 * This means that sample_id values outside of the valid are
4045 * in fact valid input, and the usual mechanism for loading the
4046 * sample position doesn't work.
4048 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4049 LLVMValueRef center
[4] = {
4050 LLVMConstReal(ctx
->f32
, 0.5),
4051 LLVMConstReal(ctx
->f32
, 0.5),
4056 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
4058 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4061 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4065 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4066 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4069 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4070 emit_data
->arg_count
= 2;
4074 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4075 struct lp_build_tgsi_context
*bld_base
,
4076 struct lp_build_emit_data
*emit_data
)
4078 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4079 struct si_shader
*shader
= ctx
->shader
;
4080 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4081 LLVMValueRef interp_param
;
4082 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4083 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4084 int input_base
, input_array_size
;
4087 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4088 LLVMValueRef array_idx
;
4089 int interp_param_idx
;
4093 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4095 if (input
->Register
.Indirect
) {
4096 unsigned array_id
= input
->Indirect
.ArrayID
;
4099 input_base
= info
->input_array_first
[array_id
];
4100 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4102 input_base
= inst
->Src
[0].Register
.Index
;
4103 input_array_size
= info
->num_inputs
- input_base
;
4106 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4107 1, input
->Register
.Index
- input_base
);
4109 input_base
= inst
->Src
[0].Register
.Index
;
4110 input_array_size
= 1;
4111 array_idx
= ctx
->i32_0
;
4114 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4116 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4117 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4118 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4120 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4122 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4123 if (interp_param_idx
== -1)
4125 else if (interp_param_idx
)
4126 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4128 interp_param
= NULL
;
4130 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4131 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4132 LLVMValueRef ij_out
[2];
4133 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4136 * take the I then J parameters, and the DDX/Y for it, and
4137 * calculate the IJ inputs for the interpolator.
4138 * temp1 = ddx * offset/sample.x + I;
4139 * interp_param.I = ddy * offset/sample.y + temp1;
4140 * temp1 = ddx * offset/sample.x + J;
4141 * interp_param.J = ddy * offset/sample.y + temp1;
4143 for (i
= 0; i
< 2; i
++) {
4144 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4145 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4146 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4147 ddxy_out
, ix_ll
, "");
4148 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4149 ddxy_out
, iy_ll
, "");
4150 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4151 interp_param
, ix_ll
, "");
4152 LLVMValueRef temp1
, temp2
;
4154 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4156 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4158 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4160 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4162 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4164 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4168 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4170 for (chan
= 0; chan
< 4; chan
++) {
4171 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4172 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4174 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4175 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4178 i
= LLVMBuildExtractElement(
4179 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4180 j
= LLVMBuildExtractElement(
4181 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4183 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4186 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4187 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4190 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4191 ctx
->ac
.builder
, gather
, array_idx
, "");
4195 static void vote_all_emit(
4196 const struct lp_build_tgsi_action
*action
,
4197 struct lp_build_tgsi_context
*bld_base
,
4198 struct lp_build_emit_data
*emit_data
)
4200 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4202 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4203 emit_data
->output
[emit_data
->chan
] =
4204 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4207 static void vote_any_emit(
4208 const struct lp_build_tgsi_action
*action
,
4209 struct lp_build_tgsi_context
*bld_base
,
4210 struct lp_build_emit_data
*emit_data
)
4212 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4214 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4215 emit_data
->output
[emit_data
->chan
] =
4216 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4219 static void vote_eq_emit(
4220 const struct lp_build_tgsi_action
*action
,
4221 struct lp_build_tgsi_context
*bld_base
,
4222 struct lp_build_emit_data
*emit_data
)
4224 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4226 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4227 emit_data
->output
[emit_data
->chan
] =
4228 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4231 static void ballot_emit(
4232 const struct lp_build_tgsi_action
*action
,
4233 struct lp_build_tgsi_context
*bld_base
,
4234 struct lp_build_emit_data
*emit_data
)
4236 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4237 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4240 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4241 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4242 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4244 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4245 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4248 static void read_invoc_fetch_args(
4249 struct lp_build_tgsi_context
*bld_base
,
4250 struct lp_build_emit_data
*emit_data
)
4252 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4253 0, emit_data
->src_chan
);
4255 /* Always read the source invocation (= lane) from the X channel. */
4256 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4258 emit_data
->arg_count
= 2;
4261 static void read_lane_emit(
4262 const struct lp_build_tgsi_action
*action
,
4263 struct lp_build_tgsi_context
*bld_base
,
4264 struct lp_build_emit_data
*emit_data
)
4266 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4268 /* We currently have no other way to prevent LLVM from lifting the icmp
4269 * calls to a dominating basic block.
4271 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4273 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4274 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4276 emit_data
->output
[emit_data
->chan
] =
4277 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4278 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4279 AC_FUNC_ATTR_READNONE
|
4280 AC_FUNC_ATTR_CONVERGENT
);
4283 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4284 struct lp_build_emit_data
*emit_data
)
4286 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4287 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4291 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4293 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4294 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4298 /* Emit one vertex from the geometry shader */
4299 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4301 LLVMValueRef
*addrs
)
4303 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4304 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4305 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4306 struct si_shader
*shader
= ctx
->shader
;
4307 struct lp_build_if_state if_state
;
4308 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4309 ctx
->param_gs2vs_offset
);
4310 LLVMValueRef gs_next_vertex
;
4311 LLVMValueRef can_emit
;
4312 unsigned chan
, offset
;
4315 /* Write vertex attribute values to GSVS ring */
4316 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4317 ctx
->gs_next_vertex
[stream
],
4320 /* If this thread has already emitted the declared maximum number of
4321 * vertices, skip the write: excessive vertex emissions are not
4322 * supposed to have any effect.
4324 * If the shader has no writes to memory, kill it instead. This skips
4325 * further memory loads and may allow LLVM to skip to the end
4328 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4329 LLVMConstInt(ctx
->i32
,
4330 shader
->selector
->gs_max_out_vertices
, 0), "");
4332 bool use_kill
= !info
->writes_memory
;
4334 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4336 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4340 for (i
= 0; i
< info
->num_outputs
; i
++) {
4341 for (chan
= 0; chan
< 4; chan
++) {
4342 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4343 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4346 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4347 LLVMValueRef voffset
=
4348 LLVMConstInt(ctx
->i32
, offset
*
4349 shader
->selector
->gs_max_out_vertices
, 0);
4352 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4353 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4355 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4357 ac_build_buffer_store_dword(&ctx
->ac
,
4358 ctx
->gsvs_ring
[stream
],
4360 voffset
, soffset
, 0,
4365 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4368 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4370 /* Signal vertex emission */
4371 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4372 si_get_gs_wave_id(ctx
));
4374 lp_build_endif(&if_state
);
4377 /* Emit one vertex from the geometry shader */
4378 static void si_tgsi_emit_vertex(
4379 const struct lp_build_tgsi_action
*action
,
4380 struct lp_build_tgsi_context
*bld_base
,
4381 struct lp_build_emit_data
*emit_data
)
4383 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4384 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4386 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4389 /* Cut one primitive from the geometry shader */
4390 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4393 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4395 /* Signal primitive cut */
4396 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4397 si_get_gs_wave_id(ctx
));
4400 /* Cut one primitive from the geometry shader */
4401 static void si_tgsi_emit_primitive(
4402 const struct lp_build_tgsi_action
*action
,
4403 struct lp_build_tgsi_context
*bld_base
,
4404 struct lp_build_emit_data
*emit_data
)
4406 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4408 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4411 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4412 struct lp_build_tgsi_context
*bld_base
,
4413 struct lp_build_emit_data
*emit_data
)
4415 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4417 /* SI only (thanks to a hw bug workaround):
4418 * The real barrier instruction isn’t needed, because an entire patch
4419 * always fits into a single wave.
4421 if (ctx
->screen
->info
.chip_class
== SI
&&
4422 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4423 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4427 lp_build_intrinsic(ctx
->ac
.builder
,
4428 "llvm.amdgcn.s.barrier",
4429 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4432 static const struct lp_build_tgsi_action interp_action
= {
4433 .fetch_args
= interp_fetch_args
,
4434 .emit
= build_interp_intrinsic
,
4437 static void si_create_function(struct si_shader_context
*ctx
,
4439 LLVMTypeRef
*returns
, unsigned num_returns
,
4440 struct si_function_info
*fninfo
,
4441 unsigned max_workgroup_size
)
4445 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4446 fninfo
->types
, fninfo
->num_params
);
4447 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4449 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4450 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4452 /* The combination of:
4456 * allows the optimization passes to move loads and reduces
4457 * SGPR spilling significantly.
4459 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4461 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4462 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4463 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4467 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4468 if (fninfo
->assign
[i
])
4469 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4472 if (ctx
->screen
->info
.address32_hi
) {
4473 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4474 "amdgpu-32bit-address-high-bits",
4475 ctx
->screen
->info
.address32_hi
);
4478 if (max_workgroup_size
) {
4479 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4480 "amdgpu-max-work-group-size",
4481 max_workgroup_size
);
4483 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4484 "no-signed-zeros-fp-math",
4487 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4488 /* These were copied from some LLVM test. */
4489 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4490 "less-precise-fpmad",
4492 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4495 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4498 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4504 static void declare_streamout_params(struct si_shader_context
*ctx
,
4505 struct pipe_stream_output_info
*so
,
4506 struct si_function_info
*fninfo
)
4510 /* Streamout SGPRs. */
4511 if (so
->num_outputs
) {
4512 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4513 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4515 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4517 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4519 /* A streamout buffer offset is loaded if the stride is non-zero. */
4520 for (i
= 0; i
< 4; i
++) {
4524 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4528 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4530 switch (shader
->selector
->type
) {
4531 case PIPE_SHADER_TESS_CTRL
:
4532 /* Return this so that LLVM doesn't remove s_barrier
4533 * instructions on chips where we use s_barrier. */
4534 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4536 case PIPE_SHADER_GEOMETRY
:
4537 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4539 case PIPE_SHADER_COMPUTE
:
4540 break; /* see below */
4546 const unsigned *properties
= shader
->selector
->info
.properties
;
4547 unsigned max_work_group_size
=
4548 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4549 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4550 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4552 if (!max_work_group_size
) {
4553 /* This is a variable group size compute shader,
4554 * compile it for the maximum possible group size.
4556 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4558 return max_work_group_size
;
4561 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4562 struct si_function_info
*fninfo
,
4565 LLVMTypeRef const_shader_buf_type
;
4567 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4568 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4569 const_shader_buf_type
= ctx
->f32
;
4571 const_shader_buf_type
= ctx
->v4i32
;
4573 unsigned const_and_shader_buffers
=
4574 add_arg(fninfo
, ARG_SGPR
,
4575 ac_array_in_const32_addr_space(const_shader_buf_type
));
4578 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4581 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4582 struct si_function_info
*fninfo
,
4585 unsigned samplers_and_images
=
4586 add_arg(fninfo
, ARG_SGPR
,
4587 ac_array_in_const32_addr_space(ctx
->v8i32
));
4590 ctx
->param_samplers_and_images
= samplers_and_images
;
4593 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4594 struct si_function_info
*fninfo
,
4597 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4598 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4601 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4602 struct si_function_info
*fninfo
)
4604 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4605 ac_array_in_const32_addr_space(ctx
->v4i32
));
4606 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4607 ac_array_in_const32_addr_space(ctx
->v8i32
));
4610 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4611 struct si_function_info
*fninfo
)
4613 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4614 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4615 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4616 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4619 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4620 struct si_function_info
*fninfo
,
4621 unsigned *num_prolog_vgprs
)
4623 struct si_shader
*shader
= ctx
->shader
;
4625 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4626 if (shader
->key
.as_ls
) {
4627 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4628 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4630 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4631 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4633 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4635 if (!shader
->is_gs_copy_shader
) {
4636 /* Vertex load indices. */
4637 ctx
->param_vertex_index0
= fninfo
->num_params
;
4638 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4639 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4640 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4644 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4645 struct si_function_info
*fninfo
)
4647 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4648 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4649 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4650 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4654 /* Convenient merged shader definitions. */
4655 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4656 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4659 static void create_function(struct si_shader_context
*ctx
)
4661 struct si_shader
*shader
= ctx
->shader
;
4662 struct si_function_info fninfo
;
4663 LLVMTypeRef returns
[16+32*4];
4664 unsigned i
, num_return_sgprs
;
4665 unsigned num_returns
= 0;
4666 unsigned num_prolog_vgprs
= 0;
4667 unsigned type
= ctx
->type
;
4668 unsigned vs_blit_property
=
4669 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4671 si_init_function_info(&fninfo
);
4673 /* Set MERGED shaders. */
4674 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4675 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4676 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4677 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4678 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4681 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4684 case PIPE_SHADER_VERTEX
:
4685 declare_global_desc_pointers(ctx
, &fninfo
);
4687 if (vs_blit_property
) {
4688 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4689 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4690 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4691 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4693 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4694 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4695 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4696 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4697 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4698 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4699 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4700 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4701 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4702 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4703 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4704 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4708 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4712 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4713 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4714 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4715 ac_array_in_const32_addr_space(ctx
->v4i32
));
4717 if (shader
->key
.as_es
) {
4718 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4719 } else if (shader
->key
.as_ls
) {
4720 /* no extra parameters */
4722 if (shader
->is_gs_copy_shader
) {
4723 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4724 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4727 /* The locations of the other parameters are assigned dynamically. */
4728 declare_streamout_params(ctx
, &shader
->selector
->so
,
4733 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4736 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4737 declare_global_desc_pointers(ctx
, &fninfo
);
4738 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4739 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4740 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4741 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4742 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4743 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4744 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4747 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4748 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4750 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4751 * placed after the user SGPRs.
4753 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4754 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4755 for (i
= 0; i
< 11; i
++)
4756 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4759 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4760 /* Merged stages have 8 system SGPRs at the beginning. */
4761 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4762 if (HAVE_32BIT_POINTERS
) {
4763 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4764 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4766 declare_const_and_shader_buffers(ctx
, &fninfo
,
4767 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4769 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4770 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4771 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4772 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4773 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4774 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4776 declare_global_desc_pointers(ctx
, &fninfo
);
4777 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4778 ctx
->type
== PIPE_SHADER_VERTEX
);
4779 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4781 if (!HAVE_32BIT_POINTERS
) {
4782 declare_samplers_and_images(ctx
, &fninfo
,
4783 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4785 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4786 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4787 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4788 if (!HAVE_32BIT_POINTERS
) /* Align to 2 dwords. */
4789 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4790 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4791 ac_array_in_const32_addr_space(ctx
->v4i32
));
4793 /* VGPRs (first TCS, then VS) */
4794 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4795 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4797 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4798 declare_vs_input_vgprs(ctx
, &fninfo
,
4801 /* LS return values are inputs to the TCS main shader part. */
4802 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4803 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4804 for (i
= 0; i
< 2; i
++)
4805 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4807 /* TCS return values are inputs to the TCS epilog.
4809 * param_tcs_offchip_offset, param_tcs_factor_offset,
4810 * param_tcs_offchip_layout, and param_rw_buffers
4811 * should be passed to the epilog.
4813 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4814 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4815 for (i
= 0; i
< 11; i
++)
4816 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4820 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4821 /* Merged stages have 8 system SGPRs at the beginning. */
4822 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4823 if (HAVE_32BIT_POINTERS
) {
4824 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4825 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4827 declare_const_and_shader_buffers(ctx
, &fninfo
,
4828 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4830 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4832 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4833 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4834 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4835 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4837 declare_global_desc_pointers(ctx
, &fninfo
);
4838 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4839 (ctx
->type
== PIPE_SHADER_VERTEX
||
4840 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4841 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4842 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4844 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4845 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4846 if (!HAVE_32BIT_POINTERS
) {
4847 /* Declare as many input SGPRs as the VS has. */
4848 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4849 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4853 if (!HAVE_32BIT_POINTERS
) {
4854 declare_samplers_and_images(ctx
, &fninfo
,
4855 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4857 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4858 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4859 ac_array_in_const32_addr_space(ctx
->v4i32
));
4862 /* VGPRs (first GS, then VS/TES) */
4863 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4864 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4865 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4866 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4867 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4869 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4870 declare_vs_input_vgprs(ctx
, &fninfo
,
4872 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4873 declare_tes_input_vgprs(ctx
, &fninfo
);
4876 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4877 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4878 unsigned num_user_sgprs
;
4880 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4881 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4883 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4885 /* ES return values are inputs to GS. */
4886 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4887 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4888 for (i
= 0; i
< 5; i
++)
4889 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4893 case PIPE_SHADER_TESS_EVAL
:
4894 declare_global_desc_pointers(ctx
, &fninfo
);
4895 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4896 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4897 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4899 if (shader
->key
.as_es
) {
4900 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4901 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4902 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4904 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4905 declare_streamout_params(ctx
, &shader
->selector
->so
,
4907 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4911 declare_tes_input_vgprs(ctx
, &fninfo
);
4914 case PIPE_SHADER_GEOMETRY
:
4915 declare_global_desc_pointers(ctx
, &fninfo
);
4916 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4917 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4918 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4921 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4922 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4923 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4924 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4925 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4926 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4927 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4928 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4931 case PIPE_SHADER_FRAGMENT
:
4932 declare_global_desc_pointers(ctx
, &fninfo
);
4933 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4934 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4935 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4936 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4938 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4939 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4940 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4941 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4942 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4943 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4944 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4945 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4946 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4947 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4948 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4949 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4950 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4951 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4952 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4953 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4954 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4955 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4956 shader
->info
.face_vgpr_index
= 20;
4957 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4958 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4959 shader
->info
.ancillary_vgpr_index
= 21;
4960 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4961 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4962 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4964 /* Color inputs from the prolog. */
4965 if (shader
->selector
->info
.colors_read
) {
4966 unsigned num_color_elements
=
4967 util_bitcount(shader
->selector
->info
.colors_read
);
4969 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4970 for (i
= 0; i
< num_color_elements
; i
++)
4971 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4973 num_prolog_vgprs
+= num_color_elements
;
4976 /* Outputs for the epilog. */
4977 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4980 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4981 shader
->selector
->info
.writes_z
+
4982 shader
->selector
->info
.writes_stencil
+
4983 shader
->selector
->info
.writes_samplemask
+
4984 1 /* SampleMaskIn */;
4986 num_returns
= MAX2(num_returns
,
4988 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4990 for (i
= 0; i
< num_return_sgprs
; i
++)
4991 returns
[i
] = ctx
->i32
;
4992 for (; i
< num_returns
; i
++)
4993 returns
[i
] = ctx
->f32
;
4996 case PIPE_SHADER_COMPUTE
:
4997 declare_global_desc_pointers(ctx
, &fninfo
);
4998 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4999 if (shader
->selector
->info
.uses_grid_size
)
5000 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
5001 if (shader
->selector
->info
.uses_block_size
)
5002 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
5004 for (i
= 0; i
< 3; i
++) {
5005 ctx
->abi
.workgroup_ids
[i
] = NULL
;
5006 if (shader
->selector
->info
.uses_block_id
[i
])
5007 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
5010 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5013 assert(0 && "unimplemented shader");
5017 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5018 si_get_max_workgroup_size(shader
));
5020 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5021 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5022 ctx
->separate_prolog
) {
5023 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5024 "InitialPSInputAddr",
5025 S_0286D0_PERSP_SAMPLE_ENA(1) |
5026 S_0286D0_PERSP_CENTER_ENA(1) |
5027 S_0286D0_PERSP_CENTROID_ENA(1) |
5028 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5029 S_0286D0_LINEAR_CENTER_ENA(1) |
5030 S_0286D0_LINEAR_CENTROID_ENA(1) |
5031 S_0286D0_FRONT_FACE_ENA(1) |
5032 S_0286D0_ANCILLARY_ENA(1) |
5033 S_0286D0_POS_FIXED_PT_ENA(1));
5036 shader
->info
.num_input_sgprs
= 0;
5037 shader
->info
.num_input_vgprs
= 0;
5039 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5040 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5042 for (; i
< fninfo
.num_params
; ++i
)
5043 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5045 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5046 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5048 if (shader
->key
.as_ls
||
5049 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5050 /* GFX9 has the ESGS ring buffer in LDS. */
5051 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
5052 ac_declare_lds_as_pointer(&ctx
->ac
);
5056 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5059 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5061 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5063 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5064 ctx
->param_rw_buffers
);
5066 if (ctx
->screen
->info
.chip_class
<= VI
&&
5067 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
5069 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5071 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5074 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5077 if (ctx
->shader
->is_gs_copy_shader
) {
5078 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5081 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5082 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5083 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5084 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5085 LLVMValueRef base_ring
;
5087 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5089 /* The conceptual layout of the GSVS ring is
5090 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5091 * but the real memory layout is swizzled across
5093 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5095 * Override the buffer descriptor accordingly.
5097 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5098 uint64_t stream_offset
= 0;
5100 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5101 unsigned num_components
;
5103 unsigned num_records
;
5104 LLVMValueRef ring
, tmp
;
5106 num_components
= sel
->info
.num_stream_output_components
[stream
];
5107 if (!num_components
)
5110 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5112 /* Limit on the stride field for <= CIK. */
5113 assert(stride
< (1 << 14));
5117 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5118 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5119 tmp
= LLVMBuildAdd(builder
, tmp
,
5120 LLVMConstInt(ctx
->i64
,
5121 stream_offset
, 0), "");
5122 stream_offset
+= stride
* 64;
5124 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5125 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5126 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5127 tmp
= LLVMBuildOr(builder
, tmp
,
5128 LLVMConstInt(ctx
->i32
,
5129 S_008F04_STRIDE(stride
) |
5130 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5131 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5132 ring
= LLVMBuildInsertElement(builder
, ring
,
5133 LLVMConstInt(ctx
->i32
, num_records
, 0),
5134 LLVMConstInt(ctx
->i32
, 2, 0), "");
5135 ring
= LLVMBuildInsertElement(builder
, ring
,
5136 LLVMConstInt(ctx
->i32
,
5137 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5138 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5139 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5140 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5141 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5142 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5143 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5144 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5145 S_008F0C_ADD_TID_ENABLE(1),
5147 LLVMConstInt(ctx
->i32
, 3, 0), "");
5149 ctx
->gsvs_ring
[stream
] = ring
;
5151 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5152 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5156 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5157 LLVMValueRef param_rw_buffers
,
5158 unsigned param_pos_fixed_pt
)
5160 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5161 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5163 /* Use the fixed-point gl_FragCoord input.
5164 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5165 * per coordinate to get the repeating effect.
5167 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5168 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5170 /* Load the buffer descriptor. */
5171 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5172 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5174 /* The stipple pattern is 32x32, each row has 32 bits. */
5175 offset
= LLVMBuildMul(builder
, address
[1],
5176 LLVMConstInt(ctx
->i32
, 4, 0), "");
5177 row
= buffer_load_const(ctx
, desc
, offset
);
5178 row
= ac_to_integer(&ctx
->ac
, row
);
5179 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5180 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5181 ac_build_kill_if_false(&ctx
->ac
, bit
);
5184 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5185 struct si_shader_config
*conf
,
5186 unsigned symbol_offset
)
5189 const unsigned char *config
=
5190 ac_shader_binary_config_start(binary
, symbol_offset
);
5191 bool really_needs_scratch
= false;
5193 /* LLVM adds SGPR spills to the scratch size.
5194 * Find out if we really need the scratch buffer.
5196 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5197 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5199 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5200 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5201 really_needs_scratch
= true;
5206 /* XXX: We may be able to emit some of these values directly rather than
5207 * extracting fields to be emitted later.
5210 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5211 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5212 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5214 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5215 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5216 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5217 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5218 case R_00B848_COMPUTE_PGM_RSRC1
:
5219 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5220 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5221 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5222 conf
->rsrc1
= value
;
5224 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5225 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5227 case R_00B84C_COMPUTE_PGM_RSRC2
:
5228 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5229 conf
->rsrc2
= value
;
5231 case R_0286CC_SPI_PS_INPUT_ENA
:
5232 conf
->spi_ps_input_ena
= value
;
5234 case R_0286D0_SPI_PS_INPUT_ADDR
:
5235 conf
->spi_ps_input_addr
= value
;
5237 case R_0286E8_SPI_TMPRING_SIZE
:
5238 case R_00B860_COMPUTE_TMPRING_SIZE
:
5239 /* WAVESIZE is in units of 256 dwords. */
5240 if (really_needs_scratch
)
5241 conf
->scratch_bytes_per_wave
=
5242 G_00B860_WAVESIZE(value
) * 256 * 4;
5244 case 0x4: /* SPILLED_SGPRS */
5245 conf
->spilled_sgprs
= value
;
5247 case 0x8: /* SPILLED_VGPRS */
5248 conf
->spilled_vgprs
= value
;
5252 static bool printed
;
5255 fprintf(stderr
, "Warning: LLVM emitted unknown "
5256 "config register: 0x%x\n", reg
);
5264 if (!conf
->spi_ps_input_addr
)
5265 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5268 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5269 uint64_t scratch_va
)
5272 uint32_t scratch_rsrc_dword0
= scratch_va
;
5273 uint32_t scratch_rsrc_dword1
=
5274 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5276 /* Enable scratch coalescing. */
5277 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5279 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5280 const struct ac_shader_reloc
*reloc
=
5281 &shader
->binary
.relocs
[i
];
5282 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5283 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5284 &scratch_rsrc_dword0
, 4);
5285 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5286 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5287 &scratch_rsrc_dword1
, 4);
5292 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5294 unsigned size
= shader
->binary
.code_size
;
5297 size
+= shader
->prolog
->binary
.code_size
;
5298 if (shader
->previous_stage
)
5299 size
+= shader
->previous_stage
->binary
.code_size
;
5300 if (shader
->prolog2
)
5301 size
+= shader
->prolog2
->binary
.code_size
;
5303 size
+= shader
->epilog
->binary
.code_size
;
5307 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5309 const struct ac_shader_binary
*prolog
=
5310 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5311 const struct ac_shader_binary
*previous_stage
=
5312 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5313 const struct ac_shader_binary
*prolog2
=
5314 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5315 const struct ac_shader_binary
*epilog
=
5316 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5317 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5318 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5319 (!epilog
? mainb
->rodata_size
: 0);
5322 assert(!prolog
|| !prolog
->rodata_size
);
5323 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5324 assert(!prolog2
|| !prolog2
->rodata_size
);
5325 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5326 !mainb
->rodata_size
);
5327 assert(!epilog
|| !epilog
->rodata_size
);
5329 r600_resource_reference(&shader
->bo
, NULL
);
5330 shader
->bo
= (struct r600_resource
*)
5331 si_aligned_buffer_create(&sscreen
->b
,
5332 sscreen
->cpdma_prefetch_writes_memory
?
5333 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5334 PIPE_USAGE_IMMUTABLE
,
5335 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5341 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5342 PIPE_TRANSFER_READ_WRITE
|
5343 PIPE_TRANSFER_UNSYNCHRONIZED
);
5345 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5346 * endian-independent. */
5348 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5349 ptr
+= prolog
->code_size
;
5351 if (previous_stage
) {
5352 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5353 ptr
+= previous_stage
->code_size
;
5356 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5357 ptr
+= prolog2
->code_size
;
5360 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5361 ptr
+= mainb
->code_size
;
5364 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5365 else if (mainb
->rodata_size
> 0)
5366 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5368 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5372 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5373 struct pipe_debug_callback
*debug
,
5374 const char *name
, FILE *file
)
5379 if (binary
->disasm_string
) {
5380 fprintf(file
, "Shader %s disassembly:\n", name
);
5381 fprintf(file
, "%s", binary
->disasm_string
);
5383 if (debug
&& debug
->debug_message
) {
5384 /* Very long debug messages are cut off, so send the
5385 * disassembly one line at a time. This causes more
5386 * overhead, but on the plus side it simplifies
5387 * parsing of resulting logs.
5389 pipe_debug_message(debug
, SHADER_INFO
,
5390 "Shader Disassembly Begin");
5392 line
= binary
->disasm_string
;
5394 p
= util_strchrnul(line
, '\n');
5398 pipe_debug_message(debug
, SHADER_INFO
,
5399 "%.*s", count
, line
);
5407 pipe_debug_message(debug
, SHADER_INFO
,
5408 "Shader Disassembly End");
5411 fprintf(file
, "Shader %s binary:\n", name
);
5412 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5413 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5414 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5415 binary
->code
[i
+ 1], binary
->code
[i
]);
5420 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5422 struct si_screen
*sscreen
= shader
->selector
->screen
;
5423 struct si_shader_config
*conf
= &shader
->config
;
5424 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5425 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5426 unsigned lds_per_wave
= 0;
5427 unsigned max_simd_waves
;
5429 switch (sscreen
->info
.family
) {
5430 /* These always have 8 waves: */
5431 case CHIP_POLARIS10
:
5432 case CHIP_POLARIS11
:
5433 case CHIP_POLARIS12
:
5437 max_simd_waves
= 10;
5440 /* Compute LDS usage for PS. */
5441 switch (shader
->selector
->type
) {
5442 case PIPE_SHADER_FRAGMENT
:
5443 /* The minimum usage per wave is (num_inputs * 48). The maximum
5444 * usage is (num_inputs * 48 * 16).
5445 * We can get anything in between and it varies between waves.
5447 * The 48 bytes per input for a single primitive is equal to
5448 * 4 bytes/component * 4 components/input * 3 points.
5450 * Other stages don't know the size at compile time or don't
5451 * allocate LDS per wave, but instead they do it per thread group.
5453 lds_per_wave
= conf
->lds_size
* lds_increment
+
5454 align(num_inputs
* 48, lds_increment
);
5456 case PIPE_SHADER_COMPUTE
:
5457 if (shader
->selector
) {
5458 unsigned max_workgroup_size
=
5459 si_get_max_workgroup_size(shader
);
5460 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5461 DIV_ROUND_UP(max_workgroup_size
, 64);
5466 /* Compute the per-SIMD wave counts. */
5467 if (conf
->num_sgprs
) {
5468 if (sscreen
->info
.chip_class
>= VI
)
5469 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5471 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5474 if (conf
->num_vgprs
)
5475 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5477 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5478 * 16KB makes some SIMDs unoccupied). */
5480 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5482 conf
->max_simd_waves
= max_simd_waves
;
5485 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5486 struct pipe_debug_callback
*debug
)
5488 const struct si_shader_config
*conf
= &shader
->config
;
5490 pipe_debug_message(debug
, SHADER_INFO
,
5491 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5492 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5493 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5494 conf
->num_sgprs
, conf
->num_vgprs
,
5495 si_get_shader_binary_size(shader
),
5496 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5497 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5498 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5501 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5502 const struct si_shader
*shader
,
5505 bool check_debug_option
)
5507 const struct si_shader_config
*conf
= &shader
->config
;
5509 if (!check_debug_option
||
5510 si_can_dump_shader(sscreen
, processor
)) {
5511 if (processor
== PIPE_SHADER_FRAGMENT
) {
5512 fprintf(file
, "*** SHADER CONFIG ***\n"
5513 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5514 "SPI_PS_INPUT_ENA = 0x%04x\n",
5515 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5518 fprintf(file
, "*** SHADER STATS ***\n"
5521 "Spilled SGPRs: %d\n"
5522 "Spilled VGPRs: %d\n"
5523 "Private memory VGPRs: %d\n"
5524 "Code Size: %d bytes\n"
5526 "Scratch: %d bytes per wave\n"
5528 "********************\n\n\n",
5529 conf
->num_sgprs
, conf
->num_vgprs
,
5530 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5531 conf
->private_mem_vgprs
,
5532 si_get_shader_binary_size(shader
),
5533 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5534 conf
->max_simd_waves
);
5538 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5540 switch (processor
) {
5541 case PIPE_SHADER_VERTEX
:
5542 if (shader
->key
.as_es
)
5543 return "Vertex Shader as ES";
5544 else if (shader
->key
.as_ls
)
5545 return "Vertex Shader as LS";
5547 return "Vertex Shader as VS";
5548 case PIPE_SHADER_TESS_CTRL
:
5549 return "Tessellation Control Shader";
5550 case PIPE_SHADER_TESS_EVAL
:
5551 if (shader
->key
.as_es
)
5552 return "Tessellation Evaluation Shader as ES";
5554 return "Tessellation Evaluation Shader as VS";
5555 case PIPE_SHADER_GEOMETRY
:
5556 if (shader
->is_gs_copy_shader
)
5557 return "GS Copy Shader as VS";
5559 return "Geometry Shader";
5560 case PIPE_SHADER_FRAGMENT
:
5561 return "Pixel Shader";
5562 case PIPE_SHADER_COMPUTE
:
5563 return "Compute Shader";
5565 return "Unknown Shader";
5569 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5570 struct pipe_debug_callback
*debug
, unsigned processor
,
5571 FILE *file
, bool check_debug_option
)
5573 if (!check_debug_option
||
5574 si_can_dump_shader(sscreen
, processor
))
5575 si_dump_shader_key(processor
, shader
, file
);
5577 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5578 if (shader
->previous_stage
&&
5579 shader
->previous_stage
->binary
.llvm_ir_string
) {
5580 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5581 si_get_shader_name(shader
, processor
));
5582 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5585 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5586 si_get_shader_name(shader
, processor
));
5587 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5590 if (!check_debug_option
||
5591 (si_can_dump_shader(sscreen
, processor
) &&
5592 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5593 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5596 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5597 debug
, "prolog", file
);
5598 if (shader
->previous_stage
)
5599 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5600 debug
, "previous stage", file
);
5601 if (shader
->prolog2
)
5602 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5603 debug
, "prolog2", file
);
5605 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5608 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5609 debug
, "epilog", file
);
5610 fprintf(file
, "\n");
5613 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5614 check_debug_option
);
5617 static int si_compile_llvm(struct si_screen
*sscreen
,
5618 struct ac_shader_binary
*binary
,
5619 struct si_shader_config
*conf
,
5620 LLVMTargetMachineRef tm
,
5622 struct pipe_debug_callback
*debug
,
5627 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5629 if (si_can_dump_shader(sscreen
, processor
)) {
5630 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5632 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5633 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5634 ac_dump_module(mod
);
5635 fprintf(stderr
, "\n");
5639 if (sscreen
->record_llvm_ir
) {
5640 char *ir
= LLVMPrintModuleToString(mod
);
5641 binary
->llvm_ir_string
= strdup(ir
);
5642 LLVMDisposeMessage(ir
);
5645 if (!si_replace_shader(count
, binary
)) {
5646 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5651 si_shader_binary_read_config(binary
, conf
, 0);
5653 /* Enable 64-bit and 16-bit denormals, because there is no performance
5656 * If denormals are enabled, all floating-point output modifiers are
5659 * Don't enable denormals for 32-bit floats, because:
5660 * - Floating-point output modifiers would be ignored by the hw.
5661 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5662 * have to stop using those.
5663 * - SI & CI would be very slow.
5665 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5667 FREE(binary
->config
);
5668 FREE(binary
->global_symbol_offsets
);
5669 binary
->config
= NULL
;
5670 binary
->global_symbol_offsets
= NULL
;
5672 /* Some shaders can't have rodata because their binaries can be
5675 if (binary
->rodata_size
&&
5676 (processor
== PIPE_SHADER_VERTEX
||
5677 processor
== PIPE_SHADER_TESS_CTRL
||
5678 processor
== PIPE_SHADER_TESS_EVAL
||
5679 processor
== PIPE_SHADER_FRAGMENT
)) {
5680 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5687 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5689 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5690 LLVMBuildRetVoid(ctx
->ac
.builder
);
5692 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5695 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5697 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5698 LLVMTargetMachineRef tm
,
5699 struct si_shader_selector
*gs_selector
,
5700 struct pipe_debug_callback
*debug
)
5702 struct si_shader_context ctx
;
5703 struct si_shader
*shader
;
5704 LLVMBuilderRef builder
;
5705 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5706 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5707 struct si_shader_output_values
*outputs
;
5708 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5711 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5716 shader
= CALLOC_STRUCT(si_shader
);
5722 /* We can leave the fence as permanently signaled because the GS copy
5723 * shader only becomes visible globally after it has been compiled. */
5724 util_queue_fence_init(&shader
->ready
);
5726 shader
->selector
= gs_selector
;
5727 shader
->is_gs_copy_shader
= true;
5729 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5730 ctx
.shader
= shader
;
5731 ctx
.type
= PIPE_SHADER_VERTEX
;
5733 builder
= ctx
.ac
.builder
;
5735 create_function(&ctx
);
5736 preload_ring_buffers(&ctx
);
5738 LLVMValueRef voffset
=
5739 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5741 /* Fetch the vertex stream ID.*/
5742 LLVMValueRef stream_id
;
5744 if (gs_selector
->so
.num_outputs
)
5745 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5747 stream_id
= ctx
.i32_0
;
5749 /* Fill in output information. */
5750 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5751 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5752 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5754 for (int chan
= 0; chan
< 4; chan
++) {
5755 outputs
[i
].vertex_stream
[chan
] =
5756 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5760 LLVMBasicBlockRef end_bb
;
5761 LLVMValueRef switch_inst
;
5763 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5764 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5766 for (int stream
= 0; stream
< 4; stream
++) {
5767 LLVMBasicBlockRef bb
;
5770 if (!gsinfo
->num_stream_output_components
[stream
])
5773 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5776 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5777 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5778 LLVMPositionBuilderAtEnd(builder
, bb
);
5780 /* Fetch vertex data from GSVS ring */
5782 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5783 for (unsigned chan
= 0; chan
< 4; chan
++) {
5784 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5785 outputs
[i
].vertex_stream
[chan
] != stream
) {
5786 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5790 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5791 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5794 outputs
[i
].values
[chan
] =
5795 ac_build_buffer_load(&ctx
.ac
,
5796 ctx
.gsvs_ring
[0], 1,
5803 /* Streamout and exports. */
5804 if (gs_selector
->so
.num_outputs
) {
5805 si_llvm_emit_streamout(&ctx
, outputs
,
5806 gsinfo
->num_outputs
,
5811 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5813 LLVMBuildBr(builder
, end_bb
);
5816 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5818 LLVMBuildRetVoid(ctx
.ac
.builder
);
5820 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5821 si_llvm_optimize_module(&ctx
);
5823 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5824 &ctx
.shader
->config
, ctx
.tm
,
5826 debug
, PIPE_SHADER_GEOMETRY
,
5829 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5830 fprintf(stderr
, "GS Copy Shader:\n");
5831 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5832 PIPE_SHADER_GEOMETRY
, stderr
, true);
5833 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5836 si_llvm_dispose(&ctx
);
5847 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5848 const struct si_vs_prolog_bits
*prolog
,
5849 const char *prefix
, FILE *f
)
5851 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5852 prefix
, prolog
->instance_divisor_is_one
);
5853 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5854 prefix
, prolog
->instance_divisor_is_fetched
);
5855 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5856 prefix
, prolog
->ls_vgpr_fix
);
5858 fprintf(f
, " mono.vs.fix_fetch = {");
5859 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5860 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5864 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5867 const struct si_shader_key
*key
= &shader
->key
;
5869 fprintf(f
, "SHADER KEY\n");
5871 switch (processor
) {
5872 case PIPE_SHADER_VERTEX
:
5873 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5874 "part.vs.prolog", f
);
5875 fprintf(f
, " as_es = %u\n", key
->as_es
);
5876 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5877 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5878 key
->mono
.u
.vs_export_prim_id
);
5881 case PIPE_SHADER_TESS_CTRL
:
5882 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5883 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5884 "part.tcs.ls_prolog", f
);
5886 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5887 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5890 case PIPE_SHADER_TESS_EVAL
:
5891 fprintf(f
, " as_es = %u\n", key
->as_es
);
5892 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5893 key
->mono
.u
.vs_export_prim_id
);
5896 case PIPE_SHADER_GEOMETRY
:
5897 if (shader
->is_gs_copy_shader
)
5900 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5901 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5902 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5903 "part.gs.vs_prolog", f
);
5905 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5908 case PIPE_SHADER_COMPUTE
:
5911 case PIPE_SHADER_FRAGMENT
:
5912 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5913 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5914 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5915 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5916 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5917 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5918 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5919 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5920 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5921 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5922 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5923 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5924 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5925 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5926 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5927 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5928 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5935 if ((processor
== PIPE_SHADER_GEOMETRY
||
5936 processor
== PIPE_SHADER_TESS_EVAL
||
5937 processor
== PIPE_SHADER_VERTEX
) &&
5938 !key
->as_es
&& !key
->as_ls
) {
5939 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5940 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5944 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5945 struct si_screen
*sscreen
,
5946 LLVMTargetMachineRef tm
)
5948 struct lp_build_tgsi_context
*bld_base
;
5950 si_llvm_context_init(ctx
, sscreen
, tm
);
5952 bld_base
= &ctx
->bld_base
;
5953 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5955 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5956 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5957 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5959 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5961 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5963 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5964 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5965 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5966 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5968 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5969 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5970 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5971 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5972 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5973 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5974 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5975 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5976 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5978 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5979 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5980 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5983 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5985 struct si_shader
*shader
= ctx
->shader
;
5986 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5988 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5989 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5990 shader
->key
.as_ls
||
5994 ac_optimize_vs_outputs(&ctx
->ac
,
5996 shader
->info
.vs_output_param_offset
,
5998 &shader
->info
.nr_param_exports
);
6001 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6002 unsigned param
, unsigned bitoffset
)
6004 LLVMValueRef args
[] = {
6005 LLVMGetParam(ctx
->main_fn
, param
),
6006 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6008 lp_build_intrinsic(ctx
->ac
.builder
,
6009 "llvm.amdgcn.init.exec.from.input",
6010 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
6013 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6014 const struct si_vs_prolog_bits
*key
)
6016 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6018 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6021 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6024 struct si_shader
*shader
= ctx
->shader
;
6025 struct si_shader_selector
*sel
= shader
->selector
;
6026 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6028 // TODO clean all this up!
6029 switch (ctx
->type
) {
6030 case PIPE_SHADER_VERTEX
:
6031 ctx
->load_input
= declare_input_vs
;
6032 if (shader
->key
.as_ls
)
6033 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6034 else if (shader
->key
.as_es
)
6035 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6037 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6038 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6039 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6041 case PIPE_SHADER_TESS_CTRL
:
6042 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6043 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6044 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6045 bld_base
->emit_store
= store_output_tcs
;
6046 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6047 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6048 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6049 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6051 case PIPE_SHADER_TESS_EVAL
:
6052 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6053 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6054 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6055 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6056 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6057 if (shader
->key
.as_es
)
6058 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6060 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6061 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6063 case PIPE_SHADER_GEOMETRY
:
6064 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6065 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6066 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6067 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6068 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6069 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6071 case PIPE_SHADER_FRAGMENT
:
6072 ctx
->load_input
= declare_input_fs
;
6073 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6074 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6075 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6076 ctx
->abi
.load_sample_position
= load_sample_position
;
6077 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6078 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6080 case PIPE_SHADER_COMPUTE
:
6081 ctx
->abi
.load_local_group_size
= get_block_size
;
6084 assert(!"Unsupported shader type");
6088 ctx
->abi
.load_ubo
= load_ubo
;
6089 ctx
->abi
.load_ssbo
= load_ssbo
;
6091 create_function(ctx
);
6092 preload_ring_buffers(ctx
);
6094 /* For GFX9 merged shaders:
6095 * - Set EXEC for the first shader. If the prolog is present, set
6096 * EXEC there instead.
6097 * - Add a barrier before the second shader.
6098 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6099 * an if-statement. This is required for correctness in geometry
6100 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6103 * For monolithic merged shaders, the first shader is wrapped in an
6104 * if-block together with its prolog in si_build_wrapper_function.
6106 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6107 if (!is_monolithic
&&
6108 sel
->info
.num_instructions
> 1 && /* not empty shader */
6109 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6110 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6111 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6112 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6113 si_init_exec_from_input(ctx
,
6114 ctx
->param_merged_wave_info
, 0);
6115 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6116 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6118 ac_init_exec_full_mask(&ctx
->ac
);
6120 /* The barrier must execute for all shaders in a
6123 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6125 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6127 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6128 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6129 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6133 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6134 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6135 for (unsigned i
= 0; i
< 6; i
++) {
6136 ctx
->invoc0_tess_factors
[i
] =
6137 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6141 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6143 for (i
= 0; i
< 4; i
++) {
6144 ctx
->gs_next_vertex
[i
] =
6145 lp_build_alloca(&ctx
->gallivm
,
6150 if (sel
->force_correct_derivs_after_kill
) {
6151 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6152 /* true = don't kill. */
6153 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6154 ctx
->postponed_kill
);
6158 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6159 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6163 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6164 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6169 si_llvm_build_ret(ctx
, ctx
->return_value
);
6174 * Compute the VS prolog key, which contains all the information needed to
6175 * build the VS prolog function, and set shader->info bits where needed.
6177 * \param info Shader info of the vertex shader.
6178 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6179 * \param prolog_key Key of the VS prolog
6180 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6181 * \param key Output shader part key.
6183 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6184 unsigned num_input_sgprs
,
6185 const struct si_vs_prolog_bits
*prolog_key
,
6186 struct si_shader
*shader_out
,
6187 union si_shader_part_key
*key
)
6189 memset(key
, 0, sizeof(*key
));
6190 key
->vs_prolog
.states
= *prolog_key
;
6191 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6192 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6193 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6194 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6196 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6197 key
->vs_prolog
.as_ls
= 1;
6198 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6199 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6200 key
->vs_prolog
.as_es
= 1;
6201 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6204 /* Enable loading the InstanceID VGPR. */
6205 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6207 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6208 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6209 shader_out
->info
.uses_instanceid
= true;
6213 * Compute the PS prolog key, which contains all the information needed to
6214 * build the PS prolog function, and set related bits in shader->config.
6216 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6217 union si_shader_part_key
*key
,
6218 bool separate_prolog
)
6220 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6222 memset(key
, 0, sizeof(*key
));
6223 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6224 key
->ps_prolog
.colors_read
= info
->colors_read
;
6225 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6226 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6227 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6228 (key
->ps_prolog
.colors_read
||
6229 key
->ps_prolog
.states
.force_persp_sample_interp
||
6230 key
->ps_prolog
.states
.force_linear_sample_interp
||
6231 key
->ps_prolog
.states
.force_persp_center_interp
||
6232 key
->ps_prolog
.states
.force_linear_center_interp
||
6233 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6234 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6235 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6237 if (info
->colors_read
) {
6238 unsigned *color
= shader
->selector
->color_attr_index
;
6240 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6241 /* BCOLORs are stored after the last input. */
6242 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6243 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6244 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6247 for (unsigned i
= 0; i
< 2; i
++) {
6248 unsigned interp
= info
->input_interpolate
[color
[i
]];
6249 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6251 if (!(info
->colors_read
& (0xf << i
*4)))
6254 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6256 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6257 interp
== TGSI_INTERPOLATE_COLOR
)
6258 interp
= TGSI_INTERPOLATE_CONSTANT
;
6261 case TGSI_INTERPOLATE_CONSTANT
:
6262 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6264 case TGSI_INTERPOLATE_PERSPECTIVE
:
6265 case TGSI_INTERPOLATE_COLOR
:
6266 /* Force the interpolation location for colors here. */
6267 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6268 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6269 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6270 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6273 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6274 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6275 shader
->config
.spi_ps_input_ena
|=
6276 S_0286CC_PERSP_SAMPLE_ENA(1);
6278 case TGSI_INTERPOLATE_LOC_CENTER
:
6279 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6280 shader
->config
.spi_ps_input_ena
|=
6281 S_0286CC_PERSP_CENTER_ENA(1);
6283 case TGSI_INTERPOLATE_LOC_CENTROID
:
6284 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6285 shader
->config
.spi_ps_input_ena
|=
6286 S_0286CC_PERSP_CENTROID_ENA(1);
6292 case TGSI_INTERPOLATE_LINEAR
:
6293 /* Force the interpolation location for colors here. */
6294 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6295 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6296 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6297 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6299 /* The VGPR assignment for non-monolithic shaders
6300 * works because InitialPSInputAddr is set on the
6301 * main shader and PERSP_PULL_MODEL is never used.
6304 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6305 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6306 separate_prolog
? 6 : 9;
6307 shader
->config
.spi_ps_input_ena
|=
6308 S_0286CC_LINEAR_SAMPLE_ENA(1);
6310 case TGSI_INTERPOLATE_LOC_CENTER
:
6311 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6312 separate_prolog
? 8 : 11;
6313 shader
->config
.spi_ps_input_ena
|=
6314 S_0286CC_LINEAR_CENTER_ENA(1);
6316 case TGSI_INTERPOLATE_LOC_CENTROID
:
6317 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6318 separate_prolog
? 10 : 13;
6319 shader
->config
.spi_ps_input_ena
|=
6320 S_0286CC_LINEAR_CENTROID_ENA(1);
6334 * Check whether a PS prolog is required based on the key.
6336 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6338 return key
->ps_prolog
.colors_read
||
6339 key
->ps_prolog
.states
.force_persp_sample_interp
||
6340 key
->ps_prolog
.states
.force_linear_sample_interp
||
6341 key
->ps_prolog
.states
.force_persp_center_interp
||
6342 key
->ps_prolog
.states
.force_linear_center_interp
||
6343 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6344 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6345 key
->ps_prolog
.states
.poly_stipple
||
6346 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6350 * Compute the PS epilog key, which contains all the information needed to
6351 * build the PS epilog function.
6353 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6354 union si_shader_part_key
*key
)
6356 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6357 memset(key
, 0, sizeof(*key
));
6358 key
->ps_epilog
.colors_written
= info
->colors_written
;
6359 key
->ps_epilog
.writes_z
= info
->writes_z
;
6360 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6361 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6362 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6366 * Build the GS prolog function. Rotate the input vertices for triangle strips
6369 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6370 union si_shader_part_key
*key
)
6372 unsigned num_sgprs
, num_vgprs
;
6373 struct si_function_info fninfo
;
6374 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6375 LLVMTypeRef returns
[48];
6376 LLVMValueRef func
, ret
;
6378 si_init_function_info(&fninfo
);
6380 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6381 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6382 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6384 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6385 num_vgprs
= 5; /* ES inputs are not needed by GS */
6387 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6391 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6392 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6393 returns
[i
] = ctx
->i32
;
6396 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6397 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6398 returns
[num_sgprs
+ i
] = ctx
->f32
;
6401 /* Create the function. */
6402 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6404 func
= ctx
->main_fn
;
6406 /* Set the full EXEC mask for the prolog, because we are only fiddling
6407 * with registers here. The main shader part will set the correct EXEC
6410 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6411 ac_init_exec_full_mask(&ctx
->ac
);
6413 /* Copy inputs to outputs. This should be no-op, as the registers match,
6414 * but it will prevent the compiler from overwriting them unintentionally.
6416 ret
= ctx
->return_value
;
6417 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6418 LLVMValueRef p
= LLVMGetParam(func
, i
);
6419 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6421 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6422 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6423 p
= ac_to_float(&ctx
->ac
, p
);
6424 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6427 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6428 /* Remap the input vertices for every other primitive. */
6429 const unsigned gfx6_vtx_params
[6] = {
6437 const unsigned gfx9_vtx_params
[3] = {
6442 LLVMValueRef vtx_in
[6], vtx_out
[6];
6443 LLVMValueRef prim_id
, rotate
;
6445 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6446 for (unsigned i
= 0; i
< 3; i
++) {
6447 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6448 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6451 for (unsigned i
= 0; i
< 6; i
++)
6452 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6455 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6456 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6458 for (unsigned i
= 0; i
< 6; ++i
) {
6459 LLVMValueRef base
, rotated
;
6461 rotated
= vtx_in
[(i
+ 4) % 6];
6462 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6465 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6466 for (unsigned i
= 0; i
< 3; i
++) {
6467 LLVMValueRef hi
, out
;
6469 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6470 LLVMConstInt(ctx
->i32
, 16, 0), "");
6471 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6472 out
= ac_to_float(&ctx
->ac
, out
);
6473 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6474 gfx9_vtx_params
[i
], "");
6477 for (unsigned i
= 0; i
< 6; i
++) {
6480 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6481 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6482 gfx6_vtx_params
[i
], "");
6487 LLVMBuildRet(builder
, ret
);
6491 * Given a list of shader part functions, build a wrapper function that
6492 * runs them in sequence to form a monolithic shader.
6494 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6495 LLVMValueRef
*parts
,
6498 unsigned next_shader_first_part
)
6500 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6501 /* PS epilog has one arg per color component; gfx9 merged shader
6502 * prologs need to forward 32 user SGPRs.
6504 struct si_function_info fninfo
;
6505 LLVMValueRef initial
[64], out
[64];
6506 LLVMTypeRef function_type
;
6507 unsigned num_first_params
;
6508 unsigned num_out
, initial_num_out
;
6509 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6510 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6511 unsigned num_sgprs
, num_vgprs
;
6513 struct lp_build_if_state if_state
;
6515 si_init_function_info(&fninfo
);
6517 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6518 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6519 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6522 /* The parameters of the wrapper function correspond to those of the
6523 * first part in terms of SGPRs and VGPRs, but we use the types of the
6524 * main part to get the right types. This is relevant for the
6525 * dereferenceable attribute on descriptor table pointers.
6530 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6531 num_first_params
= LLVMCountParamTypes(function_type
);
6533 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6534 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6536 if (ac_is_sgpr_param(param
)) {
6537 assert(num_vgprs
== 0);
6538 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6540 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6545 while (gprs
< num_sgprs
+ num_vgprs
) {
6546 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6547 LLVMTypeRef type
= LLVMTypeOf(param
);
6548 unsigned size
= ac_get_type_size(type
) / 4;
6550 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6552 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6553 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6554 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6559 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6560 si_get_max_workgroup_size(ctx
->shader
));
6562 if (is_merged_shader(ctx
->shader
))
6563 ac_init_exec_full_mask(&ctx
->ac
);
6565 /* Record the arguments of the function as if they were an output of
6571 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6572 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6573 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6574 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6575 unsigned size
= ac_get_type_size(param_type
) / 4;
6578 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6579 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6580 param_type
= ctx
->i32
;
6583 if (param_type
!= out_type
)
6584 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6585 out
[num_out
++] = param
;
6587 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6589 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6590 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6591 param_type
= ctx
->i64
;
6594 if (param_type
!= vector_type
)
6595 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6597 for (unsigned j
= 0; j
< size
; ++j
)
6598 out
[num_out
++] = LLVMBuildExtractElement(
6599 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6602 if (i
< fninfo
.num_sgpr_params
)
6603 num_out_sgpr
= num_out
;
6606 memcpy(initial
, out
, sizeof(out
));
6607 initial_num_out
= num_out
;
6608 initial_num_out_sgpr
= num_out_sgpr
;
6610 /* Now chain the parts. */
6611 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6612 LLVMValueRef in
[48];
6614 LLVMTypeRef ret_type
;
6615 unsigned out_idx
= 0;
6616 unsigned num_params
= LLVMCountParams(parts
[part
]);
6618 /* Merged shaders are executed conditionally depending
6619 * on the number of enabled threads passed in the input SGPRs. */
6620 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6621 LLVMValueRef ena
, count
= initial
[3];
6623 count
= LLVMBuildAnd(builder
, count
,
6624 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6625 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6626 ac_get_thread_id(&ctx
->ac
), count
, "");
6627 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6630 /* Derive arguments for the next part from outputs of the
6633 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6635 LLVMTypeRef param_type
;
6637 unsigned param_size
;
6638 LLVMValueRef arg
= NULL
;
6640 param
= LLVMGetParam(parts
[part
], param_idx
);
6641 param_type
= LLVMTypeOf(param
);
6642 param_size
= ac_get_type_size(param_type
) / 4;
6643 is_sgpr
= ac_is_sgpr_param(param
);
6646 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6647 else if (out_idx
< num_out_sgpr
) {
6648 /* Skip returned SGPRs the current part doesn't
6649 * declare on the input. */
6650 out_idx
= num_out_sgpr
;
6653 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6655 if (param_size
== 1)
6658 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6660 if (LLVMTypeOf(arg
) != param_type
) {
6661 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6662 if (LLVMGetPointerAddressSpace(param_type
) ==
6663 AC_CONST_32BIT_ADDR_SPACE
) {
6664 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6665 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6667 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6668 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6671 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6675 in
[param_idx
] = arg
;
6676 out_idx
+= param_size
;
6679 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6681 if (is_merged_shader(ctx
->shader
) &&
6682 part
+ 1 == next_shader_first_part
) {
6683 lp_build_endif(&if_state
);
6685 /* The second half of the merged shader should use
6686 * the inputs from the toplevel (wrapper) function,
6687 * not the return value from the last call.
6689 * That's because the last call was executed condi-
6690 * tionally, so we can't consume it in the main
6693 memcpy(out
, initial
, sizeof(initial
));
6694 num_out
= initial_num_out
;
6695 num_out_sgpr
= initial_num_out_sgpr
;
6699 /* Extract the returned GPRs. */
6700 ret_type
= LLVMTypeOf(ret
);
6704 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6705 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6707 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6709 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6711 LLVMBuildExtractValue(builder
, ret
, i
, "");
6713 assert(num_out
< ARRAY_SIZE(out
));
6714 out
[num_out
++] = val
;
6716 if (LLVMTypeOf(val
) == ctx
->i32
) {
6717 assert(num_out_sgpr
+ 1 == num_out
);
6718 num_out_sgpr
= num_out
;
6724 LLVMBuildRetVoid(builder
);
6727 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6728 LLVMTargetMachineRef tm
,
6729 struct si_shader
*shader
,
6731 struct pipe_debug_callback
*debug
)
6733 struct si_shader_selector
*sel
= shader
->selector
;
6734 struct si_shader_context ctx
;
6737 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6738 * conversion fails. */
6739 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6740 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6742 tgsi_dump(sel
->tokens
, 0);
6744 nir_print_shader(sel
->nir
, stderr
);
6745 si_dump_streamout(&sel
->so
);
6748 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6749 si_llvm_context_set_tgsi(&ctx
, shader
);
6750 ctx
.separate_prolog
= !is_monolithic
;
6752 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6753 sizeof(shader
->info
.vs_output_param_offset
));
6755 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6757 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6758 si_llvm_dispose(&ctx
);
6762 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6763 LLVMValueRef parts
[2];
6764 bool need_prolog
= sel
->vs_needs_prolog
;
6766 parts
[1] = ctx
.main_fn
;
6769 union si_shader_part_key prolog_key
;
6770 si_get_vs_prolog_key(&sel
->info
,
6771 shader
->info
.num_input_sgprs
,
6772 &shader
->key
.part
.vs
.prolog
,
6773 shader
, &prolog_key
);
6774 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6775 parts
[0] = ctx
.main_fn
;
6778 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6779 1 + need_prolog
, need_prolog
, 0);
6780 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6781 if (sscreen
->info
.chip_class
>= GFX9
) {
6782 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6783 LLVMValueRef parts
[4];
6784 bool vs_needs_prolog
=
6785 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6788 parts
[2] = ctx
.main_fn
;
6791 union si_shader_part_key tcs_epilog_key
;
6792 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6793 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6794 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6795 parts
[3] = ctx
.main_fn
;
6797 /* VS as LS main part */
6798 struct si_shader shader_ls
= {};
6799 shader_ls
.selector
= ls
;
6800 shader_ls
.key
.as_ls
= 1;
6801 shader_ls
.key
.mono
= shader
->key
.mono
;
6802 shader_ls
.key
.opt
= shader
->key
.opt
;
6803 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6805 if (!si_compile_tgsi_main(&ctx
, true)) {
6806 si_llvm_dispose(&ctx
);
6809 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6810 parts
[1] = ctx
.main_fn
;
6813 if (vs_needs_prolog
) {
6814 union si_shader_part_key vs_prolog_key
;
6815 si_get_vs_prolog_key(&ls
->info
,
6816 shader_ls
.info
.num_input_sgprs
,
6817 &shader
->key
.part
.tcs
.ls_prolog
,
6818 shader
, &vs_prolog_key
);
6819 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6820 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6821 parts
[0] = ctx
.main_fn
;
6824 /* Reset the shader context. */
6825 ctx
.shader
= shader
;
6826 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6828 si_build_wrapper_function(&ctx
,
6829 parts
+ !vs_needs_prolog
,
6830 4 - !vs_needs_prolog
, 0,
6831 vs_needs_prolog
? 2 : 1);
6833 LLVMValueRef parts
[2];
6834 union si_shader_part_key epilog_key
;
6836 parts
[0] = ctx
.main_fn
;
6838 memset(&epilog_key
, 0, sizeof(epilog_key
));
6839 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6840 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6841 parts
[1] = ctx
.main_fn
;
6843 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6845 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6846 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6847 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6848 LLVMValueRef es_prolog
= NULL
;
6849 LLVMValueRef es_main
= NULL
;
6850 LLVMValueRef gs_prolog
= NULL
;
6851 LLVMValueRef gs_main
= ctx
.main_fn
;
6854 union si_shader_part_key gs_prolog_key
;
6855 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6856 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6857 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6858 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6859 gs_prolog
= ctx
.main_fn
;
6862 struct si_shader shader_es
= {};
6863 shader_es
.selector
= es
;
6864 shader_es
.key
.as_es
= 1;
6865 shader_es
.key
.mono
= shader
->key
.mono
;
6866 shader_es
.key
.opt
= shader
->key
.opt
;
6867 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6869 if (!si_compile_tgsi_main(&ctx
, true)) {
6870 si_llvm_dispose(&ctx
);
6873 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6874 es_main
= ctx
.main_fn
;
6877 if (es
->vs_needs_prolog
) {
6878 union si_shader_part_key vs_prolog_key
;
6879 si_get_vs_prolog_key(&es
->info
,
6880 shader_es
.info
.num_input_sgprs
,
6881 &shader
->key
.part
.gs
.vs_prolog
,
6882 shader
, &vs_prolog_key
);
6883 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6884 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6885 es_prolog
= ctx
.main_fn
;
6888 /* Reset the shader context. */
6889 ctx
.shader
= shader
;
6890 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6892 /* Prepare the array of shader parts. */
6893 LLVMValueRef parts
[4];
6894 unsigned num_parts
= 0, main_part
, next_first_part
;
6897 parts
[num_parts
++] = es_prolog
;
6899 parts
[main_part
= num_parts
++] = es_main
;
6900 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6901 parts
[num_parts
++] = gs_main
;
6903 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6904 main_part
, next_first_part
);
6906 LLVMValueRef parts
[2];
6907 union si_shader_part_key prolog_key
;
6909 parts
[1] = ctx
.main_fn
;
6911 memset(&prolog_key
, 0, sizeof(prolog_key
));
6912 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6913 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6914 parts
[0] = ctx
.main_fn
;
6916 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6918 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6919 LLVMValueRef parts
[3];
6920 union si_shader_part_key prolog_key
;
6921 union si_shader_part_key epilog_key
;
6924 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6925 need_prolog
= si_need_ps_prolog(&prolog_key
);
6927 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6930 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6931 parts
[0] = ctx
.main_fn
;
6934 si_get_ps_epilog_key(shader
, &epilog_key
);
6935 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6936 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6938 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6939 need_prolog
? 1 : 0, 0);
6942 si_llvm_optimize_module(&ctx
);
6944 /* Post-optimization transformations and analysis. */
6945 si_optimize_vs_outputs(&ctx
);
6947 if ((debug
&& debug
->debug_message
) ||
6948 si_can_dump_shader(sscreen
, ctx
.type
)) {
6949 ctx
.shader
->config
.private_mem_vgprs
=
6950 ac_count_scratch_private_memory(ctx
.main_fn
);
6953 /* Compile to bytecode. */
6954 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6955 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6956 si_llvm_dispose(&ctx
);
6958 fprintf(stderr
, "LLVM failed to compile shader\n");
6962 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6963 * LLVM 3.9svn has this bug.
6965 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6966 unsigned wave_size
= 64;
6967 unsigned max_vgprs
= 256;
6968 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6969 unsigned max_sgprs_per_wave
= 128;
6970 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6971 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6972 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6974 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6975 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6977 if (shader
->config
.num_sgprs
> max_sgprs
||
6978 shader
->config
.num_vgprs
> max_vgprs
) {
6979 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6980 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6981 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6982 max_sgprs
, max_vgprs
);
6984 /* Just terminate the process, because dependent
6985 * shaders can hang due to bad input data, but use
6986 * the env var to allow shader-db to work.
6988 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6993 /* Add the scratch offset to input SGPRs. */
6994 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6995 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6997 /* Calculate the number of fragment input VGPRs. */
6998 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6999 shader
->info
.num_input_vgprs
= 0;
7000 shader
->info
.face_vgpr_index
= -1;
7001 shader
->info
.ancillary_vgpr_index
= -1;
7003 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7004 shader
->info
.num_input_vgprs
+= 2;
7005 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7006 shader
->info
.num_input_vgprs
+= 2;
7007 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7008 shader
->info
.num_input_vgprs
+= 2;
7009 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7010 shader
->info
.num_input_vgprs
+= 3;
7011 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7012 shader
->info
.num_input_vgprs
+= 2;
7013 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7014 shader
->info
.num_input_vgprs
+= 2;
7015 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7016 shader
->info
.num_input_vgprs
+= 2;
7017 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7018 shader
->info
.num_input_vgprs
+= 1;
7019 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7020 shader
->info
.num_input_vgprs
+= 1;
7021 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7022 shader
->info
.num_input_vgprs
+= 1;
7023 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7024 shader
->info
.num_input_vgprs
+= 1;
7025 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7026 shader
->info
.num_input_vgprs
+= 1;
7027 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7028 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7029 shader
->info
.num_input_vgprs
+= 1;
7031 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7032 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7033 shader
->info
.num_input_vgprs
+= 1;
7035 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7036 shader
->info
.num_input_vgprs
+= 1;
7037 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7038 shader
->info
.num_input_vgprs
+= 1;
7041 si_calculate_max_simd_waves(shader
);
7042 si_shader_dump_stats_for_shader_db(shader
, debug
);
7047 * Create, compile and return a shader part (prolog or epilog).
7049 * \param sscreen screen
7050 * \param list list of shader parts of the same category
7051 * \param type shader type
7052 * \param key shader part key
7053 * \param prolog whether the part being requested is a prolog
7054 * \param tm LLVM target machine
7055 * \param debug debug callback
7056 * \param build the callback responsible for building the main function
7057 * \return non-NULL on success
7059 static struct si_shader_part
*
7060 si_get_shader_part(struct si_screen
*sscreen
,
7061 struct si_shader_part
**list
,
7062 enum pipe_shader_type type
,
7064 union si_shader_part_key
*key
,
7065 LLVMTargetMachineRef tm
,
7066 struct pipe_debug_callback
*debug
,
7067 void (*build
)(struct si_shader_context
*,
7068 union si_shader_part_key
*),
7071 struct si_shader_part
*result
;
7073 mtx_lock(&sscreen
->shader_parts_mutex
);
7075 /* Find existing. */
7076 for (result
= *list
; result
; result
= result
->next
) {
7077 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7078 mtx_unlock(&sscreen
->shader_parts_mutex
);
7083 /* Compile a new one. */
7084 result
= CALLOC_STRUCT(si_shader_part
);
7087 struct si_shader shader
= {};
7088 struct si_shader_context ctx
;
7090 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7091 ctx
.shader
= &shader
;
7095 case PIPE_SHADER_VERTEX
:
7096 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7097 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7099 case PIPE_SHADER_TESS_CTRL
:
7101 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7103 case PIPE_SHADER_GEOMETRY
:
7106 case PIPE_SHADER_FRAGMENT
:
7108 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7110 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7113 unreachable("bad shader part");
7119 si_llvm_optimize_module(&ctx
);
7121 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7122 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7128 result
->next
= *list
;
7132 si_llvm_dispose(&ctx
);
7133 mtx_unlock(&sscreen
->shader_parts_mutex
);
7137 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7139 LLVMValueRef ptr
[2], list
;
7140 bool is_merged_shader
=
7141 ctx
->screen
->info
.chip_class
>= GFX9
&&
7142 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7143 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7144 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7146 if (HAVE_32BIT_POINTERS
) {
7147 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7148 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7149 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7153 /* Get the pointer to rw buffers. */
7154 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7155 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
+ 1);
7156 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7157 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7158 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7159 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7164 * Build the vertex shader prolog function.
7166 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7167 * All inputs are returned unmodified. The vertex load indices are
7168 * stored after them, which will be used by the API VS for fetching inputs.
7170 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7175 * (VertexID + BaseVertex),
7176 * (InstanceID + StartInstance),
7177 * (InstanceID / 2 + StartInstance)
7179 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7180 union si_shader_part_key
*key
)
7182 struct si_function_info fninfo
;
7183 LLVMTypeRef
*returns
;
7184 LLVMValueRef ret
, func
;
7186 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7187 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7188 LLVMValueRef input_vgprs
[9];
7189 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7191 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7193 si_init_function_info(&fninfo
);
7195 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7196 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7197 sizeof(LLVMTypeRef
));
7200 /* Declare input and output SGPRs. */
7201 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7202 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7203 returns
[num_returns
++] = ctx
->i32
;
7206 /* Preloaded VGPRs (outputs must be floats) */
7207 for (i
= 0; i
< num_input_vgprs
; i
++) {
7208 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7209 returns
[num_returns
++] = ctx
->f32
;
7212 /* Vertex load indices. */
7213 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7214 returns
[num_returns
++] = ctx
->f32
;
7216 /* Create the function. */
7217 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7218 func
= ctx
->main_fn
;
7220 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7221 if (!key
->vs_prolog
.is_monolithic
)
7222 si_init_exec_from_input(ctx
, 3, 0);
7224 if (key
->vs_prolog
.as_ls
&&
7225 ctx
->screen
->has_ls_vgpr_init_bug
) {
7226 /* If there are no HS threads, SPI loads the LS VGPRs
7227 * starting at VGPR 0. Shift them back to where they
7230 LLVMValueRef has_hs_threads
=
7231 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7232 unpack_param(ctx
, 3, 8, 8),
7235 for (i
= 4; i
> 0; --i
) {
7236 input_vgprs
[i
+ 1] =
7237 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7239 input_vgprs
[i
- 1], "");
7244 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7245 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7247 /* Copy inputs to outputs. This should be no-op, as the registers match,
7248 * but it will prevent the compiler from overwriting them unintentionally.
7250 ret
= ctx
->return_value
;
7251 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7252 LLVMValueRef p
= LLVMGetParam(func
, i
);
7253 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7255 for (i
= 0; i
< num_input_vgprs
; i
++) {
7256 LLVMValueRef p
= input_vgprs
[i
];
7257 p
= ac_to_float(&ctx
->ac
, p
);
7258 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7259 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7262 /* Compute vertex load indices from instance divisors. */
7263 LLVMValueRef instance_divisor_constbuf
= NULL
;
7265 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7266 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7267 LLVMValueRef buf_index
=
7268 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7269 instance_divisor_constbuf
=
7270 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7273 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7274 bool divisor_is_one
=
7275 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7276 bool divisor_is_fetched
=
7277 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7280 if (divisor_is_one
|| divisor_is_fetched
) {
7281 LLVMValueRef divisor
= ctx
->i32_1
;
7283 if (divisor_is_fetched
) {
7284 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7285 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7286 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7289 /* InstanceID / Divisor + StartInstance */
7290 index
= get_instance_index_for_fetch(ctx
,
7292 SI_SGPR_START_INSTANCE
,
7295 /* VertexID + BaseVertex */
7296 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7298 LLVMGetParam(func
, user_sgpr_base
+
7299 SI_SGPR_BASE_VERTEX
), "");
7302 index
= ac_to_float(&ctx
->ac
, index
);
7303 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7304 fninfo
.num_params
+ i
, "");
7307 si_llvm_build_ret(ctx
, ret
);
7310 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7311 LLVMTargetMachineRef tm
,
7312 struct si_shader
*shader
,
7313 struct pipe_debug_callback
*debug
,
7314 struct si_shader
*main_part
,
7315 const struct si_vs_prolog_bits
*key
)
7317 struct si_shader_selector
*vs
= main_part
->selector
;
7319 if (!si_vs_needs_prolog(vs
, key
))
7322 /* Get the prolog. */
7323 union si_shader_part_key prolog_key
;
7324 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7325 key
, shader
, &prolog_key
);
7328 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7329 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7330 debug
, si_build_vs_prolog_function
,
7331 "Vertex Shader Prolog");
7332 return shader
->prolog
!= NULL
;
7336 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7338 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7339 LLVMTargetMachineRef tm
,
7340 struct si_shader
*shader
,
7341 struct pipe_debug_callback
*debug
)
7343 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7344 &shader
->key
.part
.vs
.prolog
);
7348 * Compile the TCS epilog function. This writes tesselation factors to memory
7349 * based on the output primitive type of the tesselator (determined by TES).
7351 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7352 union si_shader_part_key
*key
)
7354 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7355 struct si_function_info fninfo
;
7358 si_init_function_info(&fninfo
);
7360 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7361 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7362 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7363 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7364 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7365 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7366 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7367 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7368 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7369 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7370 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7371 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7372 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7373 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7374 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7375 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7376 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7377 if (!HAVE_32BIT_POINTERS
)
7378 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7379 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7380 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7381 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7383 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7384 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7385 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7386 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7387 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7388 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7389 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7390 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7391 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7392 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7395 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7396 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7397 unsigned tess_factors_idx
=
7398 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7399 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7400 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7402 for (unsigned i
= 0; i
< 6; i
++)
7403 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7405 /* Create the function. */
7406 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7407 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7408 ac_declare_lds_as_pointer(&ctx
->ac
);
7409 func
= ctx
->main_fn
;
7411 LLVMValueRef invoc0_tess_factors
[6];
7412 for (unsigned i
= 0; i
< 6; i
++)
7413 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7415 si_write_tess_factors(bld_base
,
7416 LLVMGetParam(func
, tess_factors_idx
),
7417 LLVMGetParam(func
, tess_factors_idx
+ 1),
7418 LLVMGetParam(func
, tess_factors_idx
+ 2),
7419 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7421 LLVMBuildRetVoid(ctx
->ac
.builder
);
7425 * Select and compile (or reuse) TCS parts (epilog).
7427 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7428 LLVMTargetMachineRef tm
,
7429 struct si_shader
*shader
,
7430 struct pipe_debug_callback
*debug
)
7432 if (sscreen
->info
.chip_class
>= GFX9
) {
7433 struct si_shader
*ls_main_part
=
7434 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7436 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7437 &shader
->key
.part
.tcs
.ls_prolog
))
7440 shader
->previous_stage
= ls_main_part
;
7443 /* Get the epilog. */
7444 union si_shader_part_key epilog_key
;
7445 memset(&epilog_key
, 0, sizeof(epilog_key
));
7446 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7448 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7449 PIPE_SHADER_TESS_CTRL
, false,
7450 &epilog_key
, tm
, debug
,
7451 si_build_tcs_epilog_function
,
7452 "Tessellation Control Shader Epilog");
7453 return shader
->epilog
!= NULL
;
7457 * Select and compile (or reuse) GS parts (prolog).
7459 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7460 LLVMTargetMachineRef tm
,
7461 struct si_shader
*shader
,
7462 struct pipe_debug_callback
*debug
)
7464 if (sscreen
->info
.chip_class
>= GFX9
) {
7465 struct si_shader
*es_main_part
=
7466 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7468 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7469 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7470 &shader
->key
.part
.gs
.vs_prolog
))
7473 shader
->previous_stage
= es_main_part
;
7476 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7479 union si_shader_part_key prolog_key
;
7480 memset(&prolog_key
, 0, sizeof(prolog_key
));
7481 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7483 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7484 PIPE_SHADER_GEOMETRY
, true,
7485 &prolog_key
, tm
, debug
,
7486 si_build_gs_prolog_function
,
7487 "Geometry Shader Prolog");
7488 return shader
->prolog2
!= NULL
;
7492 * Build the pixel shader prolog function. This handles:
7493 * - two-side color selection and interpolation
7494 * - overriding interpolation parameters for the API PS
7495 * - polygon stippling
7497 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7498 * overriden by other states. (e.g. per-sample interpolation)
7499 * Interpolated colors are stored after the preloaded VGPRs.
7501 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7502 union si_shader_part_key
*key
)
7504 struct si_function_info fninfo
;
7505 LLVMValueRef ret
, func
;
7506 int num_returns
, i
, num_color_channels
;
7508 assert(si_need_ps_prolog(key
));
7510 si_init_function_info(&fninfo
);
7512 /* Declare inputs. */
7513 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7514 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7516 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7517 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7519 /* Declare outputs (same as inputs + add colors if needed) */
7520 num_returns
= fninfo
.num_params
;
7521 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7522 for (i
= 0; i
< num_color_channels
; i
++)
7523 fninfo
.types
[num_returns
++] = ctx
->f32
;
7525 /* Create the function. */
7526 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7528 func
= ctx
->main_fn
;
7530 /* Copy inputs to outputs. This should be no-op, as the registers match,
7531 * but it will prevent the compiler from overwriting them unintentionally.
7533 ret
= ctx
->return_value
;
7534 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7535 LLVMValueRef p
= LLVMGetParam(func
, i
);
7536 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7539 /* Polygon stippling. */
7540 if (key
->ps_prolog
.states
.poly_stipple
) {
7541 /* POS_FIXED_PT is always last. */
7542 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7543 key
->ps_prolog
.num_input_vgprs
- 1;
7544 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7546 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7549 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7550 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7551 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7552 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7554 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7555 * The hw doesn't compute CENTROID if the whole wave only
7556 * contains fully-covered quads.
7558 * PRIM_MASK is after user SGPRs.
7560 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7561 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7562 LLVMConstInt(ctx
->i32
, 31, 0), "");
7563 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7566 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7567 /* Read PERSP_CENTER. */
7568 for (i
= 0; i
< 2; i
++)
7569 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7570 /* Read PERSP_CENTROID. */
7571 for (i
= 0; i
< 2; i
++)
7572 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7573 /* Select PERSP_CENTROID. */
7574 for (i
= 0; i
< 2; i
++) {
7575 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7576 center
[i
], centroid
[i
], "");
7577 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7578 tmp
, base
+ 4 + i
, "");
7581 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7582 /* Read LINEAR_CENTER. */
7583 for (i
= 0; i
< 2; i
++)
7584 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7585 /* Read LINEAR_CENTROID. */
7586 for (i
= 0; i
< 2; i
++)
7587 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7588 /* Select LINEAR_CENTROID. */
7589 for (i
= 0; i
< 2; i
++) {
7590 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7591 center
[i
], centroid
[i
], "");
7592 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7593 tmp
, base
+ 10 + i
, "");
7598 /* Force per-sample interpolation. */
7599 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7600 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7601 LLVMValueRef persp_sample
[2];
7603 /* Read PERSP_SAMPLE. */
7604 for (i
= 0; i
< 2; i
++)
7605 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7606 /* Overwrite PERSP_CENTER. */
7607 for (i
= 0; i
< 2; i
++)
7608 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7609 persp_sample
[i
], base
+ 2 + i
, "");
7610 /* Overwrite PERSP_CENTROID. */
7611 for (i
= 0; i
< 2; i
++)
7612 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7613 persp_sample
[i
], base
+ 4 + i
, "");
7615 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7616 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7617 LLVMValueRef linear_sample
[2];
7619 /* Read LINEAR_SAMPLE. */
7620 for (i
= 0; i
< 2; i
++)
7621 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7622 /* Overwrite LINEAR_CENTER. */
7623 for (i
= 0; i
< 2; i
++)
7624 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7625 linear_sample
[i
], base
+ 8 + i
, "");
7626 /* Overwrite LINEAR_CENTROID. */
7627 for (i
= 0; i
< 2; i
++)
7628 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7629 linear_sample
[i
], base
+ 10 + i
, "");
7632 /* Force center interpolation. */
7633 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7634 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7635 LLVMValueRef persp_center
[2];
7637 /* Read PERSP_CENTER. */
7638 for (i
= 0; i
< 2; i
++)
7639 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7640 /* Overwrite PERSP_SAMPLE. */
7641 for (i
= 0; i
< 2; i
++)
7642 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7643 persp_center
[i
], base
+ i
, "");
7644 /* Overwrite PERSP_CENTROID. */
7645 for (i
= 0; i
< 2; i
++)
7646 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7647 persp_center
[i
], base
+ 4 + i
, "");
7649 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7650 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7651 LLVMValueRef linear_center
[2];
7653 /* Read LINEAR_CENTER. */
7654 for (i
= 0; i
< 2; i
++)
7655 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7656 /* Overwrite LINEAR_SAMPLE. */
7657 for (i
= 0; i
< 2; i
++)
7658 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7659 linear_center
[i
], base
+ 6 + i
, "");
7660 /* Overwrite LINEAR_CENTROID. */
7661 for (i
= 0; i
< 2; i
++)
7662 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7663 linear_center
[i
], base
+ 10 + i
, "");
7666 /* Interpolate colors. */
7667 unsigned color_out_idx
= 0;
7668 for (i
= 0; i
< 2; i
++) {
7669 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7670 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7671 key
->ps_prolog
.face_vgpr_index
;
7672 LLVMValueRef interp
[2], color
[4];
7673 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7678 /* If the interpolation qualifier is not CONSTANT (-1). */
7679 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7680 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7681 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7683 /* Get the (i,j) updated by bc_optimize handling. */
7684 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7686 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7687 interp_vgpr
+ 1, "");
7688 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7691 /* Use the absolute location of the input. */
7692 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7694 if (key
->ps_prolog
.states
.color_two_side
) {
7695 face
= LLVMGetParam(func
, face_vgpr
);
7696 face
= ac_to_integer(&ctx
->ac
, face
);
7699 interp_fs_input(ctx
,
7700 key
->ps_prolog
.color_attr_index
[i
],
7701 TGSI_SEMANTIC_COLOR
, i
,
7702 key
->ps_prolog
.num_interp_inputs
,
7703 key
->ps_prolog
.colors_read
, interp_ij
,
7704 prim_mask
, face
, color
);
7707 unsigned chan
= u_bit_scan(&writemask
);
7708 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7709 fninfo
.num_params
+ color_out_idx
++, "");
7713 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7716 * "When per-sample shading is active due to the use of a fragment
7717 * input qualified by sample or due to the use of the gl_SampleID
7718 * or gl_SamplePosition variables, only the bit for the current
7719 * sample is set in gl_SampleMaskIn. When state specifies multiple
7720 * fragment shader invocations for a given fragment, the sample
7721 * mask for any single fragment shader invocation may specify a
7722 * subset of the covered samples for the fragment. In this case,
7723 * the bit corresponding to each covered sample will be set in
7724 * exactly one fragment shader invocation."
7726 * The samplemask loaded by hardware is always the coverage of the
7727 * entire pixel/fragment, so mask bits out based on the sample ID.
7729 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7730 /* The bit pattern matches that used by fixed function fragment
7732 static const uint16_t ps_iter_masks
[] = {
7733 0xffff, /* not used */
7739 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7741 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7742 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7743 key
->ps_prolog
.ancillary_vgpr_index
;
7744 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7745 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7747 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7748 samplemask
= LLVMBuildAnd(
7751 LLVMBuildShl(ctx
->ac
.builder
,
7752 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7755 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7757 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7758 ancillary_vgpr
+ 1, "");
7761 /* Tell LLVM to insert WQM instruction sequence when needed. */
7762 if (key
->ps_prolog
.wqm
) {
7763 LLVMAddTargetDependentFunctionAttr(func
,
7764 "amdgpu-ps-wqm-outputs", "");
7767 si_llvm_build_ret(ctx
, ret
);
7771 * Build the pixel shader epilog function. This handles everything that must be
7772 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7774 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7775 union si_shader_part_key
*key
)
7777 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7778 struct si_function_info fninfo
;
7779 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7781 struct si_ps_exports exp
= {};
7783 si_init_function_info(&fninfo
);
7785 /* Declare input SGPRs. */
7786 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7787 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7788 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7789 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7790 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7792 /* Declare input VGPRs. */
7793 unsigned required_num_params
=
7794 fninfo
.num_sgpr_params
+
7795 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7796 key
->ps_epilog
.writes_z
+
7797 key
->ps_epilog
.writes_stencil
+
7798 key
->ps_epilog
.writes_samplemask
;
7800 required_num_params
= MAX2(required_num_params
,
7801 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7803 while (fninfo
.num_params
< required_num_params
)
7804 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7806 /* Create the function. */
7807 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7808 /* Disable elimination of unused inputs. */
7809 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7810 "InitialPSInputAddr", 0xffffff);
7812 /* Process colors. */
7813 unsigned vgpr
= fninfo
.num_sgpr_params
;
7814 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7815 int last_color_export
= -1;
7817 /* Find the last color export. */
7818 if (!key
->ps_epilog
.writes_z
&&
7819 !key
->ps_epilog
.writes_stencil
&&
7820 !key
->ps_epilog
.writes_samplemask
) {
7821 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7823 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7824 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7825 /* Just set this if any of the colorbuffers are enabled. */
7827 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7828 last_color_export
= 0;
7830 for (i
= 0; i
< 8; i
++)
7831 if (colors_written
& (1 << i
) &&
7832 (spi_format
>> (i
* 4)) & 0xf)
7833 last_color_export
= i
;
7837 while (colors_written
) {
7838 LLVMValueRef color
[4];
7839 int mrt
= u_bit_scan(&colors_written
);
7841 for (i
= 0; i
< 4; i
++)
7842 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7844 si_export_mrt_color(bld_base
, color
, mrt
,
7845 fninfo
.num_params
- 1,
7846 mrt
== last_color_export
, &exp
);
7849 /* Process depth, stencil, samplemask. */
7850 if (key
->ps_epilog
.writes_z
)
7851 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7852 if (key
->ps_epilog
.writes_stencil
)
7853 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7854 if (key
->ps_epilog
.writes_samplemask
)
7855 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7857 if (depth
|| stencil
|| samplemask
)
7858 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7859 else if (last_color_export
== -1)
7860 ac_build_export_null(&ctx
->ac
);
7863 si_emit_ps_exports(ctx
, &exp
);
7866 LLVMBuildRetVoid(ctx
->ac
.builder
);
7870 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7872 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7873 LLVMTargetMachineRef tm
,
7874 struct si_shader
*shader
,
7875 struct pipe_debug_callback
*debug
)
7877 union si_shader_part_key prolog_key
;
7878 union si_shader_part_key epilog_key
;
7880 /* Get the prolog. */
7881 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7883 /* The prolog is a no-op if these aren't set. */
7884 if (si_need_ps_prolog(&prolog_key
)) {
7886 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7887 PIPE_SHADER_FRAGMENT
, true,
7888 &prolog_key
, tm
, debug
,
7889 si_build_ps_prolog_function
,
7890 "Fragment Shader Prolog");
7891 if (!shader
->prolog
)
7895 /* Get the epilog. */
7896 si_get_ps_epilog_key(shader
, &epilog_key
);
7899 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7900 PIPE_SHADER_FRAGMENT
, false,
7901 &epilog_key
, tm
, debug
,
7902 si_build_ps_epilog_function
,
7903 "Fragment Shader Epilog");
7904 if (!shader
->epilog
)
7907 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7908 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7909 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7910 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7913 /* Set up the enable bits for per-sample shading if needed. */
7914 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7915 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7916 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7917 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7918 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7919 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7921 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7922 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7923 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7924 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7925 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7926 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7928 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7929 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7930 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7931 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7932 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7933 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7935 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7936 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7937 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7938 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7939 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7940 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7943 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7944 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7945 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7946 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7947 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7950 /* At least one pair of interpolation weights must be enabled. */
7951 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7952 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7953 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7956 /* Samplemask fixup requires the sample ID. */
7957 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7958 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7959 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7962 /* The sample mask input is always enabled, because the API shader always
7963 * passes it through to the epilog. Disable it here if it's unused.
7965 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7966 !shader
->selector
->info
.reads_samplemask
)
7967 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7972 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7975 /* SPI barrier management bug:
7976 * Make sure we have at least 4k of LDS in use to avoid the bug.
7977 * It applies to workgroup sizes of more than one wavefront.
7979 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7980 sscreen
->info
.family
== CHIP_KABINI
||
7981 sscreen
->info
.family
== CHIP_MULLINS
)
7982 *lds_size
= MAX2(*lds_size
, 8);
7985 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7986 struct si_shader
*shader
)
7988 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7990 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7992 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7993 si_get_max_workgroup_size(shader
) > 64) {
7994 si_multiwave_lds_size_workaround(sscreen
,
7995 &shader
->config
.lds_size
);
7999 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8000 struct si_shader
*shader
,
8001 struct pipe_debug_callback
*debug
)
8003 struct si_shader_selector
*sel
= shader
->selector
;
8004 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8007 /* LS, ES, VS are compiled on demand if the main part hasn't been
8008 * compiled for that stage.
8010 * Vertex shaders are compiled on demand when a vertex fetch
8011 * workaround must be applied.
8013 if (shader
->is_monolithic
) {
8014 /* Monolithic shader (compiled as a whole, has many variants,
8015 * may take a long time to compile).
8017 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8021 /* The shader consists of several parts:
8023 * - the middle part is the user shader, it has 1 variant only
8024 * and it was compiled during the creation of the shader
8026 * - the prolog part is inserted at the beginning
8027 * - the epilog part is inserted at the end
8029 * The prolog and epilog have many (but simple) variants.
8031 * Starting with gfx9, geometry and tessellation control
8032 * shaders also contain the prolog and user shader parts of
8033 * the previous shader stage.
8039 /* Copy the compiled TGSI shader data over. */
8040 shader
->is_binary_shared
= true;
8041 shader
->binary
= mainp
->binary
;
8042 shader
->config
= mainp
->config
;
8043 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8044 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8045 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8046 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8047 memcpy(shader
->info
.vs_output_param_offset
,
8048 mainp
->info
.vs_output_param_offset
,
8049 sizeof(mainp
->info
.vs_output_param_offset
));
8050 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8051 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8052 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8054 /* Select prologs and/or epilogs. */
8055 switch (sel
->type
) {
8056 case PIPE_SHADER_VERTEX
:
8057 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8060 case PIPE_SHADER_TESS_CTRL
:
8061 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8064 case PIPE_SHADER_TESS_EVAL
:
8066 case PIPE_SHADER_GEOMETRY
:
8067 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8070 case PIPE_SHADER_FRAGMENT
:
8071 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8074 /* Make sure we have at least as many VGPRs as there
8075 * are allocated inputs.
8077 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8078 shader
->info
.num_input_vgprs
);
8082 /* Update SGPR and VGPR counts. */
8083 if (shader
->prolog
) {
8084 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8085 shader
->prolog
->config
.num_sgprs
);
8086 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8087 shader
->prolog
->config
.num_vgprs
);
8089 if (shader
->previous_stage
) {
8090 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8091 shader
->previous_stage
->config
.num_sgprs
);
8092 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8093 shader
->previous_stage
->config
.num_vgprs
);
8094 shader
->config
.spilled_sgprs
=
8095 MAX2(shader
->config
.spilled_sgprs
,
8096 shader
->previous_stage
->config
.spilled_sgprs
);
8097 shader
->config
.spilled_vgprs
=
8098 MAX2(shader
->config
.spilled_vgprs
,
8099 shader
->previous_stage
->config
.spilled_vgprs
);
8100 shader
->config
.private_mem_vgprs
=
8101 MAX2(shader
->config
.private_mem_vgprs
,
8102 shader
->previous_stage
->config
.private_mem_vgprs
);
8103 shader
->config
.scratch_bytes_per_wave
=
8104 MAX2(shader
->config
.scratch_bytes_per_wave
,
8105 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8106 shader
->info
.uses_instanceid
|=
8107 shader
->previous_stage
->info
.uses_instanceid
;
8109 if (shader
->prolog2
) {
8110 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8111 shader
->prolog2
->config
.num_sgprs
);
8112 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8113 shader
->prolog2
->config
.num_vgprs
);
8115 if (shader
->epilog
) {
8116 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8117 shader
->epilog
->config
.num_sgprs
);
8118 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8119 shader
->epilog
->config
.num_vgprs
);
8121 si_calculate_max_simd_waves(shader
);
8124 si_fix_resource_usage(sscreen
, shader
);
8125 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8129 r
= si_shader_binary_upload(sscreen
, shader
);
8131 fprintf(stderr
, "LLVM failed to upload shader\n");
8138 void si_shader_destroy(struct si_shader
*shader
)
8140 if (shader
->scratch_bo
)
8141 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8143 r600_resource_reference(&shader
->bo
, NULL
);
8145 if (!shader
->is_binary_shared
)
8146 ac_shader_binary_clean(&shader
->binary
);
8148 free(shader
->shader_log
);