2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "ac_shader_util.h"
41 #include "si_shader_internal.h"
45 #include "compiler/nir/nir.h"
47 static const char *scratch_rsrc_dword0_symbol
=
48 "SCRATCH_RSRC_DWORD0";
50 static const char *scratch_rsrc_dword1_symbol
=
51 "SCRATCH_RSRC_DWORD1";
53 struct si_shader_output_values
55 LLVMValueRef values
[4];
56 unsigned semantic_name
;
57 unsigned semantic_index
;
58 ubyte vertex_stream
[4];
62 * Used to collect types and other info about arguments of the LLVM function
63 * before the function is created.
65 struct si_function_info
{
66 LLVMTypeRef types
[100];
67 LLVMValueRef
*assign
[100];
68 unsigned num_sgpr_params
;
77 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
78 struct si_screen
*sscreen
,
79 LLVMTargetMachineRef tm
);
81 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
82 struct lp_build_tgsi_context
*bld_base
,
83 struct lp_build_emit_data
*emit_data
);
85 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
88 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
89 union si_shader_part_key
*key
);
90 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
91 union si_shader_part_key
*key
);
92 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
97 /* Ideally pass the sample mask input to the PS epilog as v14, which
98 * is its usual location, so that the shader doesn't have to add v_mov.
100 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
103 CONST_ADDR_SPACE
= 2,
104 LOCAL_ADDR_SPACE
= 3,
107 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
110 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
116 static bool is_merged_shader(struct si_shader
*shader
)
118 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
121 return shader
->key
.as_ls
||
123 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
124 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
127 static void si_init_function_info(struct si_function_info
*fninfo
)
129 fninfo
->num_params
= 0;
130 fninfo
->num_sgpr_params
= 0;
133 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
134 enum si_arg_regfile regfile
, LLVMTypeRef type
,
135 LLVMValueRef
*assign
)
137 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
139 unsigned idx
= fninfo
->num_params
++;
140 assert(idx
< ARRAY_SIZE(fninfo
->types
));
142 if (regfile
== ARG_SGPR
)
143 fninfo
->num_sgpr_params
= fninfo
->num_params
;
145 fninfo
->types
[idx
] = type
;
146 fninfo
->assign
[idx
] = assign
;
150 static unsigned add_arg(struct si_function_info
*fninfo
,
151 enum si_arg_regfile regfile
, LLVMTypeRef type
)
153 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
156 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
157 enum si_arg_regfile regfile
, LLVMTypeRef type
,
158 LLVMValueRef
*assign
, unsigned idx
)
160 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
161 assert(actual
== idx
);
164 static void add_arg_checked(struct si_function_info
*fninfo
,
165 enum si_arg_regfile regfile
, LLVMTypeRef type
,
168 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
172 * Returns a unique index for a per-patch semantic name and index. The index
173 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
176 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
178 switch (semantic_name
) {
179 case TGSI_SEMANTIC_TESSOUTER
:
181 case TGSI_SEMANTIC_TESSINNER
:
183 case TGSI_SEMANTIC_PATCH
:
188 assert(!"invalid semantic name");
194 * Returns a unique index for a semantic name and index. The index must be
195 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
198 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
200 switch (semantic_name
) {
201 case TGSI_SEMANTIC_POSITION
:
203 case TGSI_SEMANTIC_GENERIC
:
204 /* Since some shader stages use the the highest used IO index
205 * to determine the size to allocate for inputs/outputs
206 * (in LDS, tess and GS rings). GENERIC should be placed right
207 * after POSITION to make that size as small as possible.
209 if (index
< SI_MAX_IO_GENERIC
)
212 assert(!"invalid generic index");
214 case TGSI_SEMANTIC_PSIZE
:
215 return SI_MAX_IO_GENERIC
+ 1;
216 case TGSI_SEMANTIC_CLIPDIST
:
218 return SI_MAX_IO_GENERIC
+ 2 + index
;
219 case TGSI_SEMANTIC_FOG
:
220 return SI_MAX_IO_GENERIC
+ 4;
221 case TGSI_SEMANTIC_LAYER
:
222 return SI_MAX_IO_GENERIC
+ 5;
223 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
224 return SI_MAX_IO_GENERIC
+ 6;
225 case TGSI_SEMANTIC_PRIMID
:
226 return SI_MAX_IO_GENERIC
+ 7;
227 case TGSI_SEMANTIC_COLOR
: /* these alias */
228 case TGSI_SEMANTIC_BCOLOR
:
230 return SI_MAX_IO_GENERIC
+ 8 + index
;
231 case TGSI_SEMANTIC_TEXCOORD
:
233 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
234 return SI_MAX_IO_GENERIC
+ 10 + index
;
236 assert(!"invalid semantic name");
242 * Get the value of a shader input parameter and extract a bitfield.
244 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
245 LLVMValueRef value
, unsigned rshift
,
248 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
249 value
= ac_to_integer(&ctx
->ac
, value
);
252 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
253 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
255 if (rshift
+ bitwidth
< 32) {
256 unsigned mask
= (1 << bitwidth
) - 1;
257 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
258 LLVMConstInt(ctx
->i32
, mask
, 0), "");
264 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
265 unsigned param
, unsigned rshift
,
268 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
270 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
273 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
276 case PIPE_SHADER_TESS_CTRL
:
277 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
279 case PIPE_SHADER_TESS_EVAL
:
280 return LLVMGetParam(ctx
->main_fn
,
281 ctx
->param_tes_rel_patch_id
);
289 /* Tessellation shaders pass outputs to the next shader using LDS.
291 * LS outputs = TCS inputs
292 * TCS outputs = TES inputs
295 * - TCS inputs for patch 0
296 * - TCS inputs for patch 1
297 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
299 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
300 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
301 * - TCS outputs for patch 1
302 * - Per-patch TCS outputs for patch 1
303 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
304 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
307 * All three shaders VS(LS), TCS, TES share the same LDS space.
311 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
313 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
316 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
318 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
320 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
321 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
323 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
326 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
328 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
330 return LLVMConstInt(ctx
->i32
, stride
, 0);
333 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
335 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
336 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
338 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
339 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
340 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
341 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
342 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
343 num_patch_outputs
* 4;
344 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
348 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
350 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
352 ctx
->param_tcs_out_lds_offsets
,
358 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
360 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
362 ctx
->param_tcs_out_lds_offsets
,
368 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
370 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
371 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
373 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
377 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
379 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
380 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
381 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
383 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
384 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
390 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
392 LLVMValueRef patch0_patch_data_offset
=
393 get_tcs_out_patch0_patch_data_offset(ctx
);
394 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
395 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
397 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
398 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
403 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
405 unsigned tcs_out_vertices
=
406 ctx
->shader
->selector
?
407 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
409 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
410 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
411 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
413 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
416 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
421 case PIPE_SHADER_VERTEX
:
422 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
423 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
425 case PIPE_SHADER_TESS_CTRL
:
426 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
427 ctx
->shader
->is_monolithic
) {
428 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
429 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
431 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
439 static LLVMValueRef
get_instance_index_for_fetch(
440 struct si_shader_context
*ctx
,
441 unsigned param_start_instance
, LLVMValueRef divisor
)
443 LLVMValueRef result
= ctx
->abi
.instance_id
;
445 /* The division must be done before START_INSTANCE is added. */
446 if (divisor
!= ctx
->i32_1
)
447 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
449 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
450 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
453 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
455 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
457 unsigned double_index
)
459 LLVMBuilderRef builder
= ctx
->ac
.builder
;
460 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
461 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
462 LLVMVectorType(f64
, 2), "");
463 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
464 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
465 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
468 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
469 LLVMValueRef i32
, unsigned index
)
474 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
475 LLVMConstInt(ctx
->i32
, 16, 0), "");
477 return LLVMBuildSExt(ctx
->ac
.builder
,
478 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
483 void si_llvm_load_input_vs(
484 struct si_shader_context
*ctx
,
485 unsigned input_index
,
488 unsigned vs_blit_property
=
489 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
491 if (vs_blit_property
) {
492 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
493 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
494 LLVMIntULE
, vertex_id
,
496 /* Use LLVMIntNE, because we have 3 vertices and only
497 * the middle one should use y2.
499 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
500 LLVMIntNE
, vertex_id
,
503 if (input_index
== 0) {
505 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
506 ctx
->param_vs_blit_inputs
);
507 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
508 ctx
->param_vs_blit_inputs
+ 1);
510 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
511 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
512 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
513 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
515 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
517 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
520 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
521 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
522 out
[2] = LLVMGetParam(ctx
->main_fn
,
523 ctx
->param_vs_blit_inputs
+ 2);
524 out
[3] = ctx
->ac
.f32_1
;
528 /* Color or texture coordinates: */
529 assert(input_index
== 1);
531 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
532 for (int i
= 0; i
< 4; i
++) {
533 out
[i
] = LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 3 + i
);
537 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
538 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
539 ctx
->param_vs_blit_inputs
+ 3);
540 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
541 ctx
->param_vs_blit_inputs
+ 4);
542 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
543 ctx
->param_vs_blit_inputs
+ 5);
544 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
545 ctx
->param_vs_blit_inputs
+ 6);
547 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
549 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
551 out
[2] = LLVMGetParam(ctx
->main_fn
,
552 ctx
->param_vs_blit_inputs
+ 7);
553 out
[3] = LLVMGetParam(ctx
->main_fn
,
554 ctx
->param_vs_blit_inputs
+ 8);
561 unsigned num_fetches
;
562 unsigned fetch_stride
;
564 LLVMValueRef t_list_ptr
;
565 LLVMValueRef t_offset
;
567 LLVMValueRef vertex_index
;
568 LLVMValueRef input
[3];
570 /* Load the T list */
571 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
573 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
575 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
577 vertex_index
= LLVMGetParam(ctx
->main_fn
,
578 ctx
->param_vertex_index0
+
581 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
583 /* Do multiple loads for special formats. */
585 case SI_FIX_FETCH_RGB_64_FLOAT
:
586 num_fetches
= 3; /* 3 2-dword loads */
589 case SI_FIX_FETCH_RGBA_64_FLOAT
:
590 num_fetches
= 2; /* 2 4-dword loads */
593 case SI_FIX_FETCH_RGB_8
:
594 case SI_FIX_FETCH_RGB_8_INT
:
598 case SI_FIX_FETCH_RGB_16
:
599 case SI_FIX_FETCH_RGB_16_INT
:
608 for (unsigned i
= 0; i
< num_fetches
; i
++) {
609 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
611 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
612 vertex_index
, voffset
,
616 /* Break up the vec4 into individual components */
617 for (chan
= 0; chan
< 4; chan
++) {
618 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
619 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
620 input
[0], llvm_chan
, "");
624 case SI_FIX_FETCH_A2_SNORM
:
625 case SI_FIX_FETCH_A2_SSCALED
:
626 case SI_FIX_FETCH_A2_SINT
: {
627 /* The hardware returns an unsigned value; convert it to a
630 LLVMValueRef tmp
= out
[3];
631 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
633 /* First, recover the sign-extended signed integer value. */
634 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
635 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
637 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
639 /* For the integer-like cases, do a natural sign extension.
641 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
642 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
645 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
646 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
647 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
648 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
650 /* Convert back to the right type. */
651 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
653 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
654 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
655 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
656 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
657 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
658 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
664 case SI_FIX_FETCH_RGBA_32_UNORM
:
665 case SI_FIX_FETCH_RGBX_32_UNORM
:
666 for (chan
= 0; chan
< 4; chan
++) {
667 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
668 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
669 out
[chan
], ctx
->f32
, "");
670 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
671 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
673 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
674 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
675 out
[3] = LLVMConstReal(ctx
->f32
, 1);
677 case SI_FIX_FETCH_RGBA_32_SNORM
:
678 case SI_FIX_FETCH_RGBX_32_SNORM
:
679 case SI_FIX_FETCH_RGBA_32_FIXED
:
680 case SI_FIX_FETCH_RGBX_32_FIXED
: {
682 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
683 scale
= 1.0 / 0x10000;
685 scale
= 1.0 / INT_MAX
;
687 for (chan
= 0; chan
< 4; chan
++) {
688 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
689 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
690 out
[chan
], ctx
->f32
, "");
691 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
692 LLVMConstReal(ctx
->f32
, scale
), "");
694 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
695 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
696 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
697 out
[3] = LLVMConstReal(ctx
->f32
, 1);
700 case SI_FIX_FETCH_RGBA_32_USCALED
:
701 for (chan
= 0; chan
< 4; chan
++) {
702 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
703 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
704 out
[chan
], ctx
->f32
, "");
707 case SI_FIX_FETCH_RGBA_32_SSCALED
:
708 for (chan
= 0; chan
< 4; chan
++) {
709 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
710 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
711 out
[chan
], ctx
->f32
, "");
714 case SI_FIX_FETCH_RG_64_FLOAT
:
715 for (chan
= 0; chan
< 2; chan
++)
716 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
718 out
[2] = LLVMConstReal(ctx
->f32
, 0);
719 out
[3] = LLVMConstReal(ctx
->f32
, 1);
721 case SI_FIX_FETCH_RGB_64_FLOAT
:
722 for (chan
= 0; chan
< 3; chan
++)
723 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
725 out
[3] = LLVMConstReal(ctx
->f32
, 1);
727 case SI_FIX_FETCH_RGBA_64_FLOAT
:
728 for (chan
= 0; chan
< 4; chan
++) {
729 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
733 case SI_FIX_FETCH_RGB_8
:
734 case SI_FIX_FETCH_RGB_8_INT
:
735 case SI_FIX_FETCH_RGB_16
:
736 case SI_FIX_FETCH_RGB_16_INT
:
737 for (chan
= 0; chan
< 3; chan
++) {
738 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
742 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
743 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
744 out
[3] = LLVMConstReal(ctx
->f32
, 1);
746 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
752 static void declare_input_vs(
753 struct si_shader_context
*ctx
,
754 unsigned input_index
,
755 const struct tgsi_full_declaration
*decl
,
758 si_llvm_load_input_vs(ctx
, input_index
, out
);
761 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
768 case PIPE_SHADER_VERTEX
:
769 return LLVMGetParam(ctx
->main_fn
,
770 ctx
->param_vs_prim_id
);
771 case PIPE_SHADER_TESS_CTRL
:
772 return ctx
->abi
.tcs_patch_id
;
773 case PIPE_SHADER_TESS_EVAL
:
774 return ctx
->abi
.tes_patch_id
;
775 case PIPE_SHADER_GEOMETRY
:
776 return ctx
->abi
.gs_prim_id
;
784 * Return the value of tgsi_ind_register for indexing.
785 * This is the indirect index with the constant offset added to it.
787 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
788 const struct tgsi_ind_register
*ind
,
794 if (ind
->File
== TGSI_FILE_ADDRESS
) {
795 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
796 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
798 struct tgsi_full_src_register src
= {};
800 src
.Register
.File
= ind
->File
;
801 src
.Register
.Index
= ind
->Index
;
803 /* Set the second index to 0 for constants. */
804 if (ind
->File
== TGSI_FILE_CONSTANT
)
805 src
.Register
.Dimension
= 1;
807 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
810 result
= ac_to_integer(&ctx
->ac
, result
);
814 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
815 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
816 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
817 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
822 * Like si_get_indirect_index, but restricts the return value to a (possibly
823 * undefined) value inside [0..num).
825 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
826 const struct tgsi_ind_register
*ind
,
827 int rel_index
, unsigned num
)
829 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
831 return si_llvm_bound_index(ctx
, result
, num
);
834 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
835 LLVMValueRef vertex_dw_stride
,
836 LLVMValueRef base_addr
,
837 LLVMValueRef vertex_index
,
838 LLVMValueRef param_index
,
839 unsigned input_index
,
844 if (vertex_dw_stride
) {
845 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
846 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
847 vertex_dw_stride
, ""), "");
851 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
852 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
853 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
856 int param
= is_patch
?
857 si_shader_io_get_unique_index_patch(name
[input_index
],
858 index
[input_index
]) :
859 si_shader_io_get_unique_index(name
[input_index
],
862 /* Add the base address of the element. */
863 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
864 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
868 * Calculate a dword address given an input or output register and a stride.
870 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
871 const struct tgsi_full_dst_register
*dst
,
872 const struct tgsi_full_src_register
*src
,
873 LLVMValueRef vertex_dw_stride
,
874 LLVMValueRef base_addr
)
876 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
877 ubyte
*name
, *index
, *array_first
;
879 struct tgsi_full_dst_register reg
;
880 LLVMValueRef vertex_index
= NULL
;
881 LLVMValueRef ind_index
= NULL
;
883 /* Set the register description. The address computation is the same
884 * for sources and destinations. */
886 reg
.Register
.File
= src
->Register
.File
;
887 reg
.Register
.Index
= src
->Register
.Index
;
888 reg
.Register
.Indirect
= src
->Register
.Indirect
;
889 reg
.Register
.Dimension
= src
->Register
.Dimension
;
890 reg
.Indirect
= src
->Indirect
;
891 reg
.Dimension
= src
->Dimension
;
892 reg
.DimIndirect
= src
->DimIndirect
;
896 /* If the register is 2-dimensional (e.g. an array of vertices
897 * in a primitive), calculate the base address of the vertex. */
898 if (reg
.Register
.Dimension
) {
899 if (reg
.Dimension
.Indirect
)
900 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
901 1, reg
.Dimension
.Index
);
903 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
906 /* Get information about the register. */
907 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
908 name
= info
->input_semantic_name
;
909 index
= info
->input_semantic_index
;
910 array_first
= info
->input_array_first
;
911 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
912 name
= info
->output_semantic_name
;
913 index
= info
->output_semantic_index
;
914 array_first
= info
->output_array_first
;
920 if (reg
.Register
.Indirect
) {
921 /* Add the relative address of the element. */
922 if (reg
.Indirect
.ArrayID
)
923 input_index
= array_first
[reg
.Indirect
.ArrayID
];
925 input_index
= reg
.Register
.Index
;
927 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
928 1, reg
.Register
.Index
- input_index
);
930 input_index
= reg
.Register
.Index
;
933 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
934 base_addr
, vertex_index
,
935 ind_index
, input_index
,
937 !reg
.Register
.Dimension
);
940 /* The offchip buffer layout for TCS->TES is
942 * - attribute 0 of patch 0 vertex 0
943 * - attribute 0 of patch 0 vertex 1
944 * - attribute 0 of patch 0 vertex 2
946 * - attribute 0 of patch 1 vertex 0
947 * - attribute 0 of patch 1 vertex 1
949 * - attribute 1 of patch 0 vertex 0
950 * - attribute 1 of patch 0 vertex 1
952 * - per patch attribute 0 of patch 0
953 * - per patch attribute 0 of patch 1
956 * Note that every attribute has 4 components.
958 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
959 LLVMValueRef rel_patch_id
,
960 LLVMValueRef vertex_index
,
961 LLVMValueRef param_index
)
963 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
964 LLVMValueRef param_stride
, constant16
;
966 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
967 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
968 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
971 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
973 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
974 vertices_per_patch
, "");
976 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
979 param_stride
= total_vertices
;
981 base_addr
= rel_patch_id
;
982 param_stride
= num_patches
;
985 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
986 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
987 param_stride
, ""), "");
989 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
992 LLVMValueRef patch_data_offset
=
993 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
995 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
996 patch_data_offset
, "");
1001 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1002 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1003 struct si_shader_context
*ctx
,
1004 LLVMValueRef vertex_index
,
1005 LLVMValueRef param_index
,
1006 unsigned param_base
,
1011 unsigned param_index_base
;
1013 param_index_base
= is_patch
?
1014 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1015 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1018 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1019 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1022 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1025 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1026 vertex_index
, param_index
);
1029 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1030 struct si_shader_context
*ctx
,
1031 const struct tgsi_full_dst_register
*dst
,
1032 const struct tgsi_full_src_register
*src
)
1034 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1035 ubyte
*name
, *index
, *array_first
;
1036 struct tgsi_full_src_register reg
;
1037 LLVMValueRef vertex_index
= NULL
;
1038 LLVMValueRef param_index
= NULL
;
1039 unsigned param_base
;
1041 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1043 if (reg
.Register
.Dimension
) {
1045 if (reg
.Dimension
.Indirect
)
1046 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1047 1, reg
.Dimension
.Index
);
1049 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1052 /* Get information about the register. */
1053 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1054 name
= info
->input_semantic_name
;
1055 index
= info
->input_semantic_index
;
1056 array_first
= info
->input_array_first
;
1057 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1058 name
= info
->output_semantic_name
;
1059 index
= info
->output_semantic_index
;
1060 array_first
= info
->output_array_first
;
1066 if (reg
.Register
.Indirect
) {
1067 if (reg
.Indirect
.ArrayID
)
1068 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1070 param_base
= reg
.Register
.Index
;
1072 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1073 1, reg
.Register
.Index
- param_base
);
1076 param_base
= reg
.Register
.Index
;
1079 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1080 param_index
, param_base
,
1081 name
, index
, !reg
.Register
.Dimension
);
1084 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1085 LLVMTypeRef type
, unsigned swizzle
,
1086 LLVMValueRef buffer
, LLVMValueRef offset
,
1087 LLVMValueRef base
, bool can_speculate
)
1089 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1090 LLVMValueRef value
, value2
;
1091 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1093 if (swizzle
== ~0) {
1094 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1095 0, 1, 0, can_speculate
, false);
1097 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1100 if (!llvm_type_is_64bit(ctx
, type
)) {
1101 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1102 0, 1, 0, can_speculate
, false);
1104 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1105 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1106 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1109 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1110 swizzle
* 4, 1, 0, can_speculate
, false);
1112 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1113 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1115 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1121 * \param type output value type
1122 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1123 * \param dw_addr address in dwords
1125 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1126 LLVMTypeRef type
, unsigned swizzle
,
1127 LLVMValueRef dw_addr
)
1129 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1132 if (swizzle
== ~0) {
1133 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1135 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1136 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1138 return lp_build_gather_values(&ctx
->gallivm
, values
,
1142 /* Split 64-bit loads. */
1143 if (llvm_type_is_64bit(ctx
, type
)) {
1144 LLVMValueRef lo
, hi
;
1146 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1147 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1148 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1151 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1152 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1154 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1156 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1162 * \param swizzle offset (typically 0..3)
1163 * \param dw_addr address in dwords
1164 * \param value value to store
1166 static void lds_store(struct si_shader_context
*ctx
,
1167 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1170 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1171 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1173 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1176 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
1179 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1181 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1182 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
1183 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
1185 uint64_t desc2
= 0xffffffff;
1186 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1187 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1188 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1189 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1190 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1191 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1192 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
1194 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
1195 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
1196 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
1197 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
1200 static LLVMValueRef
fetch_input_tcs(
1201 struct lp_build_tgsi_context
*bld_base
,
1202 const struct tgsi_full_src_register
*reg
,
1203 enum tgsi_opcode_type type
, unsigned swizzle
)
1205 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1206 LLVMValueRef dw_addr
, stride
;
1208 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1209 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1210 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1212 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1215 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1216 LLVMValueRef vertex_index
,
1217 LLVMValueRef param_index
,
1218 unsigned const_index
,
1220 unsigned driver_location
,
1222 unsigned num_components
,
1227 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1228 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1229 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1230 LLVMValueRef dw_addr
, stride
;
1232 driver_location
= driver_location
/ 4;
1235 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1236 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1240 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1242 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1243 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1248 /* Add the constant index to the indirect index */
1249 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1250 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1252 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1255 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1256 vertex_index
, param_index
,
1258 info
->input_semantic_name
,
1259 info
->input_semantic_index
,
1262 LLVMValueRef value
[4];
1263 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
1264 value
[i
] = lds_load(bld_base
, ctx
->i32
, i
, dw_addr
);
1267 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1270 static LLVMValueRef
fetch_output_tcs(
1271 struct lp_build_tgsi_context
*bld_base
,
1272 const struct tgsi_full_src_register
*reg
,
1273 enum tgsi_opcode_type type
, unsigned swizzle
)
1275 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1276 LLVMValueRef dw_addr
, stride
;
1278 if (reg
->Register
.Dimension
) {
1279 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1280 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1281 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1283 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1284 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1287 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1290 static LLVMValueRef
fetch_input_tes(
1291 struct lp_build_tgsi_context
*bld_base
,
1292 const struct tgsi_full_src_register
*reg
,
1293 enum tgsi_opcode_type type
, unsigned swizzle
)
1295 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1296 LLVMValueRef buffer
, base
, addr
;
1298 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1300 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1301 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1303 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1304 buffer
, base
, addr
, true);
1307 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1308 LLVMValueRef vertex_index
,
1309 LLVMValueRef param_index
,
1310 unsigned const_index
,
1312 unsigned driver_location
,
1314 unsigned num_components
,
1319 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1320 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1321 LLVMValueRef buffer
, base
, addr
;
1323 driver_location
= driver_location
/ 4;
1325 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1327 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1330 /* Add the constant index to the indirect index */
1331 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1332 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1334 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1337 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1338 param_index
, driver_location
,
1339 info
->input_semantic_name
,
1340 info
->input_semantic_index
,
1343 /* TODO: This will generate rather ordinary llvm code, although it
1344 * should be easy for the optimiser to fix up. In future we might want
1345 * to refactor buffer_load(), but for now this maximises code sharing
1346 * between the NIR and TGSI backends.
1348 LLVMValueRef value
[4];
1349 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1350 value
[i
] = buffer_load(&ctx
->bld_base
, ctx
->i32
, i
, buffer
, base
, addr
, true);
1353 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1356 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1357 const struct tgsi_full_instruction
*inst
,
1358 const struct tgsi_opcode_info
*info
,
1360 LLVMValueRef dst
[4])
1362 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1363 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1364 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1365 unsigned chan_index
;
1366 LLVMValueRef dw_addr
, stride
;
1367 LLVMValueRef buffer
, base
, buf_addr
;
1368 LLVMValueRef values
[4];
1369 bool skip_lds_store
;
1370 bool is_tess_factor
= false, is_tess_inner
= false;
1372 /* Only handle per-patch and per-vertex outputs here.
1373 * Vectors will be lowered to scalars and this function will be called again.
1375 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1376 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1377 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1381 if (reg
->Register
.Dimension
) {
1382 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1383 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1384 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1385 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1387 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1388 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1389 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1391 if (!reg
->Register
.Indirect
) {
1392 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1394 /* Always write tess factors into LDS for the TCS epilog. */
1395 if (name
== TGSI_SEMANTIC_TESSINNER
||
1396 name
== TGSI_SEMANTIC_TESSOUTER
) {
1397 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1398 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1399 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1400 is_tess_factor
= true;
1401 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1406 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1408 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1409 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1411 uint32_t writemask
= reg
->Register
.WriteMask
;
1413 chan_index
= u_bit_scan(&writemask
);
1414 LLVMValueRef value
= dst
[chan_index
];
1416 if (inst
->Instruction
.Saturate
)
1417 value
= ac_build_clamp(&ctx
->ac
, value
);
1419 /* Skip LDS stores if there is no LDS read of this output. */
1420 if (!skip_lds_store
)
1421 lds_store(ctx
, chan_index
, dw_addr
, value
);
1423 value
= ac_to_integer(&ctx
->ac
, value
);
1424 values
[chan_index
] = value
;
1426 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1427 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1429 4 * chan_index
, 1, 0, true, false);
1432 /* Write tess factors into VGPRs for the epilog. */
1433 if (is_tess_factor
&&
1434 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1435 if (!is_tess_inner
) {
1436 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1437 ctx
->invoc0_tess_factors
[chan_index
]);
1438 } else if (chan_index
< 2) {
1439 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1440 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1445 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1446 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1448 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1449 base
, 0, 1, 0, true, false);
1453 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1454 LLVMValueRef vertex_index
,
1455 LLVMValueRef param_index
,
1456 unsigned const_index
,
1458 unsigned driver_location
,
1465 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1466 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1467 LLVMValueRef dw_addr
, stride
;
1468 LLVMValueRef buffer
, base
, addr
;
1469 LLVMValueRef values
[4];
1470 bool skip_lds_store
;
1471 bool is_tess_factor
= false, is_tess_inner
= false;
1473 driver_location
= driver_location
/ 4;
1476 /* Add the constant index to the indirect index */
1477 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1478 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1480 if (const_index
!= 0)
1481 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1485 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1486 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1487 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1488 vertex_index
, param_index
,
1490 info
->output_semantic_name
,
1491 info
->output_semantic_index
,
1494 skip_lds_store
= !info
->reads_pervertex_outputs
;
1496 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1497 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1498 vertex_index
, param_index
,
1500 info
->output_semantic_name
,
1501 info
->output_semantic_index
,
1504 skip_lds_store
= !info
->reads_perpatch_outputs
;
1507 int name
= info
->output_semantic_name
[driver_location
];
1509 /* Always write tess factors into LDS for the TCS epilog. */
1510 if (name
== TGSI_SEMANTIC_TESSINNER
||
1511 name
== TGSI_SEMANTIC_TESSOUTER
) {
1512 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1513 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1514 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1515 is_tess_factor
= true;
1516 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1521 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1523 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1525 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1526 param_index
, driver_location
,
1527 info
->output_semantic_name
,
1528 info
->output_semantic_index
,
1531 for (unsigned chan
= 0; chan
< 4; chan
++) {
1532 if (!(writemask
& (1 << chan
)))
1534 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1536 /* Skip LDS stores if there is no LDS read of this output. */
1537 if (!skip_lds_store
)
1538 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1540 value
= ac_to_integer(&ctx
->ac
, value
);
1541 values
[chan
] = value
;
1543 if (writemask
!= 0xF && !is_tess_factor
) {
1544 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1546 4 * chan
, 1, 0, true, false);
1549 /* Write tess factors into VGPRs for the epilog. */
1550 if (is_tess_factor
&&
1551 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1552 if (!is_tess_inner
) {
1553 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1554 ctx
->invoc0_tess_factors
[chan
]);
1555 } else if (chan
< 2) {
1556 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1557 ctx
->invoc0_tess_factors
[4 + chan
]);
1562 if (writemask
== 0xF && !is_tess_factor
) {
1563 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1565 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1566 base
, 0, 1, 0, true, false);
1570 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1571 unsigned input_index
,
1572 unsigned vtx_offset_param
,
1576 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1577 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1578 struct si_shader
*shader
= ctx
->shader
;
1579 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1580 LLVMValueRef vtx_offset
, soffset
;
1581 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1582 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1583 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1587 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1589 /* GFX9 has the ESGS ring in LDS. */
1590 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1591 unsigned index
= vtx_offset_param
;
1593 switch (index
/ 2) {
1595 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1596 index
% 2 ? 16 : 0, 16);
1599 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1600 index
% 2 ? 16 : 0, 16);
1603 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1604 index
% 2 ? 16 : 0, 16);
1611 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1612 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1613 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1616 /* GFX6: input load from the ESGS ring in memory. */
1617 if (swizzle
== ~0) {
1618 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1620 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1621 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1624 return lp_build_gather_values(&ctx
->gallivm
, values
,
1628 /* Get the vertex offset parameter on GFX6. */
1629 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1631 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1633 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1635 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1636 vtx_offset
, soffset
, 0, 1, 0, true, false);
1637 if (llvm_type_is_64bit(ctx
, type
)) {
1638 LLVMValueRef value2
;
1639 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1641 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1642 ctx
->i32_0
, vtx_offset
, soffset
,
1643 0, 1, 0, true, false);
1644 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1646 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1649 static LLVMValueRef
fetch_input_gs(
1650 struct lp_build_tgsi_context
*bld_base
,
1651 const struct tgsi_full_src_register
*reg
,
1652 enum tgsi_opcode_type type
,
1655 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1656 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1658 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1659 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1660 return get_primitive_id(ctx
, swizzle
);
1662 if (!reg
->Register
.Dimension
)
1665 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1666 reg
->Dimension
.Index
,
1667 tgsi2llvmtype(bld_base
, type
),
1671 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1673 switch (interpolate
) {
1674 case TGSI_INTERPOLATE_CONSTANT
:
1677 case TGSI_INTERPOLATE_LINEAR
:
1678 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1679 return SI_PARAM_LINEAR_SAMPLE
;
1680 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1681 return SI_PARAM_LINEAR_CENTROID
;
1683 return SI_PARAM_LINEAR_CENTER
;
1685 case TGSI_INTERPOLATE_COLOR
:
1686 case TGSI_INTERPOLATE_PERSPECTIVE
:
1687 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1688 return SI_PARAM_PERSP_SAMPLE
;
1689 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1690 return SI_PARAM_PERSP_CENTROID
;
1692 return SI_PARAM_PERSP_CENTER
;
1695 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1700 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1701 unsigned attr_index
, unsigned chan
,
1702 LLVMValueRef prim_mask
,
1703 LLVMValueRef i
, LLVMValueRef j
)
1706 return ac_build_fs_interp(&ctx
->ac
,
1707 LLVMConstInt(ctx
->i32
, chan
, 0),
1708 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1711 return ac_build_fs_interp_mov(&ctx
->ac
,
1712 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1713 LLVMConstInt(ctx
->i32
, chan
, 0),
1714 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1719 * Interpolate a fragment shader input.
1721 * @param ctx context
1722 * @param input_index index of the input in hardware
1723 * @param semantic_name TGSI_SEMANTIC_*
1724 * @param semantic_index semantic index
1725 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1726 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1727 * @param interp_param interpolation weights (i,j)
1728 * @param prim_mask SI_PARAM_PRIM_MASK
1729 * @param face SI_PARAM_FRONT_FACE
1730 * @param result the return value (4 components)
1732 static void interp_fs_input(struct si_shader_context
*ctx
,
1733 unsigned input_index
,
1734 unsigned semantic_name
,
1735 unsigned semantic_index
,
1736 unsigned num_interp_inputs
,
1737 unsigned colors_read_mask
,
1738 LLVMValueRef interp_param
,
1739 LLVMValueRef prim_mask
,
1741 LLVMValueRef result
[4])
1743 LLVMValueRef i
= NULL
, j
= NULL
;
1746 /* fs.constant returns the param from the middle vertex, so it's not
1747 * really useful for flat shading. It's meant to be used for custom
1748 * interpolation (but the intrinsic can't fetch from the other two
1751 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1752 * to do the right thing. The only reason we use fs.constant is that
1753 * fs.interp cannot be used on integers, because they can be equal
1756 * When interp is false we will use fs.constant or for newer llvm,
1757 * amdgcn.interp.mov.
1759 bool interp
= interp_param
!= NULL
;
1762 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1763 LLVMVectorType(ctx
->f32
, 2), "");
1765 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1767 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1771 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1772 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1773 LLVMValueRef is_face_positive
;
1775 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1776 * otherwise it's at offset "num_inputs".
1778 unsigned back_attr_offset
= num_interp_inputs
;
1779 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1780 back_attr_offset
+= 1;
1782 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1783 face
, ctx
->i32_0
, "");
1785 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1786 LLVMValueRef front
, back
;
1788 front
= si_build_fs_interp(ctx
,
1791 back
= si_build_fs_interp(ctx
,
1792 back_attr_offset
, chan
,
1795 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1801 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1802 result
[0] = si_build_fs_interp(ctx
, input_index
,
1803 0, prim_mask
, i
, j
);
1805 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1806 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1808 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1809 result
[chan
] = si_build_fs_interp(ctx
,
1816 void si_llvm_load_input_fs(
1817 struct si_shader_context
*ctx
,
1818 unsigned input_index
,
1819 LLVMValueRef out
[4])
1821 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1822 struct si_shader
*shader
= ctx
->shader
;
1823 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1824 LLVMValueRef main_fn
= ctx
->main_fn
;
1825 LLVMValueRef interp_param
= NULL
;
1826 int interp_param_idx
;
1827 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1828 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1829 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1830 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1832 /* Get colors from input VGPRs (set by the prolog). */
1833 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1834 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1835 unsigned mask
= colors_read
>> (semantic_index
* 4);
1836 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1837 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1839 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1840 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1841 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1842 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1846 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1847 if (interp_param_idx
== -1)
1849 else if (interp_param_idx
) {
1850 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1853 interp_fs_input(ctx
, input_index
, semantic_name
,
1854 semantic_index
, 0, /* this param is unused */
1855 shader
->selector
->info
.colors_read
, interp_param
,
1856 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1857 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1861 static void declare_input_fs(
1862 struct si_shader_context
*ctx
,
1863 unsigned input_index
,
1864 const struct tgsi_full_declaration
*decl
,
1865 LLVMValueRef out
[4])
1867 si_llvm_load_input_fs(ctx
, input_index
, out
);
1870 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1872 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1877 * Load a dword from a constant buffer.
1879 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1880 LLVMValueRef resource
,
1881 LLVMValueRef offset
)
1883 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1884 0, 0, 0, true, true);
1887 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1889 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1890 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1891 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1892 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1894 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1895 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1896 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1898 LLVMValueRef pos
[4] = {
1899 buffer_load_const(ctx
, resource
, offset0
),
1900 buffer_load_const(ctx
, resource
, offset1
),
1901 LLVMConstReal(ctx
->f32
, 0),
1902 LLVMConstReal(ctx
->f32
, 0)
1905 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1908 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
,
1910 unsigned num_components
)
1912 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1913 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1915 LLVMValueRef coord
[4] = {
1916 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1917 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1922 /* For triangles, the vector should be (u, v, 1-u-v). */
1923 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1924 PIPE_PRIM_TRIANGLES
)
1925 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
1926 lp_build_add(bld
, coord
[0], coord
[1]));
1928 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
1931 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1932 unsigned semantic_name
)
1934 LLVMValueRef buffer
, base
, addr
;
1936 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1938 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1940 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1941 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1942 LLVMConstInt(ctx
->i32
, param
, 0));
1944 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1945 ~0, buffer
, base
, addr
, true);
1949 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1950 unsigned varying_id
)
1952 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1953 unsigned semantic_name
;
1955 switch (varying_id
) {
1956 case VARYING_SLOT_TESS_LEVEL_INNER
:
1957 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1959 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1960 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1963 unreachable("unknown tess level");
1966 return load_tess_level(ctx
, semantic_name
);
1970 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1972 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1973 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1974 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1975 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1976 return get_num_tcs_out_vertices(ctx
);
1978 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1981 void si_load_system_value(struct si_shader_context
*ctx
,
1983 const struct tgsi_full_declaration
*decl
)
1985 LLVMValueRef value
= 0;
1987 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1989 switch (decl
->Semantic
.Name
) {
1990 case TGSI_SEMANTIC_INSTANCEID
:
1991 value
= ctx
->abi
.instance_id
;
1994 case TGSI_SEMANTIC_VERTEXID
:
1995 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1997 ctx
->abi
.base_vertex
, "");
2000 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2001 /* Unused. Clarify the meaning in indexed vs. non-indexed
2002 * draws if this is ever used again. */
2006 case TGSI_SEMANTIC_BASEVERTEX
:
2008 /* For non-indexed draws, the base vertex set by the driver
2009 * (for direct draws) or the CP (for indirect draws) is the
2010 * first vertex ID, but GLSL expects 0 to be returned.
2012 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2013 LLVMValueRef indexed
;
2015 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
2016 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
2018 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
2019 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
2023 case TGSI_SEMANTIC_BASEINSTANCE
:
2024 value
= ctx
->abi
.start_instance
;
2027 case TGSI_SEMANTIC_DRAWID
:
2028 value
= ctx
->abi
.draw_id
;
2031 case TGSI_SEMANTIC_INVOCATIONID
:
2032 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2033 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2034 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2035 value
= ctx
->abi
.gs_invocation_id
;
2037 assert(!"INVOCATIONID not implemented");
2040 case TGSI_SEMANTIC_POSITION
:
2042 LLVMValueRef pos
[4] = {
2043 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2044 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2045 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2046 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2047 LLVMGetParam(ctx
->main_fn
,
2048 SI_PARAM_POS_W_FLOAT
)),
2050 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2054 case TGSI_SEMANTIC_FACE
:
2055 value
= ctx
->abi
.front_face
;
2058 case TGSI_SEMANTIC_SAMPLEID
:
2059 value
= get_sample_id(ctx
);
2062 case TGSI_SEMANTIC_SAMPLEPOS
: {
2063 LLVMValueRef pos
[4] = {
2064 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2065 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2066 LLVMConstReal(ctx
->f32
, 0),
2067 LLVMConstReal(ctx
->f32
, 0)
2069 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2070 TGSI_OPCODE_FRC
, pos
[0]);
2071 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2072 TGSI_OPCODE_FRC
, pos
[1]);
2073 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2077 case TGSI_SEMANTIC_SAMPLEMASK
:
2078 /* This can only occur with the OpenGL Core profile, which
2079 * doesn't support smoothing.
2081 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2084 case TGSI_SEMANTIC_TESSCOORD
:
2085 value
= si_load_tess_coord(&ctx
->abi
, NULL
, 4);
2088 case TGSI_SEMANTIC_VERTICESIN
:
2089 value
= si_load_patch_vertices_in(&ctx
->abi
);
2092 case TGSI_SEMANTIC_TESSINNER
:
2093 case TGSI_SEMANTIC_TESSOUTER
:
2094 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2097 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2098 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2100 LLVMValueRef buf
, slot
, val
[4];
2103 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2104 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2105 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2106 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2108 for (i
= 0; i
< 4; i
++)
2109 val
[i
] = buffer_load_const(ctx
, buf
,
2110 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2111 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2115 case TGSI_SEMANTIC_PRIMID
:
2116 value
= get_primitive_id(ctx
, 0);
2119 case TGSI_SEMANTIC_GRID_SIZE
:
2120 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_grid_size
);
2123 case TGSI_SEMANTIC_BLOCK_SIZE
:
2125 LLVMValueRef values
[3];
2127 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
2129 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
2130 unsigned sizes
[3] = {
2131 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
2132 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
2133 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
2136 for (i
= 0; i
< 3; ++i
)
2137 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
2139 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2141 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
2146 case TGSI_SEMANTIC_BLOCK_ID
:
2148 LLVMValueRef values
[3];
2150 for (int i
= 0; i
< 3; i
++) {
2151 values
[i
] = ctx
->i32_0
;
2152 if (ctx
->param_block_id
[i
] >= 0) {
2153 values
[i
] = LLVMGetParam(ctx
->main_fn
,
2154 ctx
->param_block_id
[i
]);
2157 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2161 case TGSI_SEMANTIC_THREAD_ID
:
2162 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_thread_id
);
2165 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2166 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2167 "llvm.amdgcn.ps.live",
2169 LP_FUNC_ATTR_READNONE
);
2170 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2171 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2174 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2175 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2178 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2179 value
= ac_get_thread_id(&ctx
->ac
);
2182 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2184 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2185 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2186 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2187 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2191 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2192 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2193 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2194 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2196 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2197 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2198 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2199 /* All bits set except LSB */
2200 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2203 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2205 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2206 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2207 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2208 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2209 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2210 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2215 assert(!"unknown system value");
2219 ctx
->system_values
[index
] = value
;
2222 void si_declare_compute_memory(struct si_shader_context
*ctx
,
2223 const struct tgsi_full_declaration
*decl
)
2225 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2227 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
2230 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2231 assert(decl
->Range
.First
== decl
->Range
.Last
);
2232 assert(!ctx
->ac
.lds
);
2234 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2235 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2238 LLVMSetAlignment(var
, 4);
2240 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2243 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2245 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2246 ctx
->param_const_and_shader_buffers
);
2248 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2249 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2252 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2254 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2255 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2257 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2258 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2259 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2261 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2265 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2267 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2268 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2269 ctx
->param_const_and_shader_buffers
);
2271 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2272 index
= LLVMBuildSub(ctx
->ac
.builder
,
2273 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2276 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2279 static LLVMValueRef
fetch_constant(
2280 struct lp_build_tgsi_context
*bld_base
,
2281 const struct tgsi_full_src_register
*reg
,
2282 enum tgsi_opcode_type type
,
2285 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2286 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2287 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2290 LLVMValueRef addr
, bufp
;
2292 if (swizzle
== LP_CHAN_ALL
) {
2294 LLVMValueRef values
[4];
2295 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2296 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2298 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2301 /* Split 64-bit loads. */
2302 if (tgsi_type_is_64bit(type
)) {
2303 LLVMValueRef lo
, hi
;
2305 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2306 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2307 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2311 idx
= reg
->Register
.Index
* 4 + swizzle
;
2312 if (reg
->Register
.Indirect
) {
2313 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2315 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2318 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2319 if (sel
->info
.const_buffers_declared
== 1 &&
2320 sel
->info
.shader_buffers_declared
== 0) {
2322 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2324 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2325 * loads, and up to x4 load opcode merging. However, it leads to horrible
2326 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2328 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2330 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2331 * a descriptor and s_buffer_load_dword using it, so we can't expand
2332 * the pointer into a full descriptor like below. We have to use
2333 * s_load_dword instead. The only case when LLVM 5.0 would select
2334 * s_buffer_load_dword (that we have to prevent) is when we use use
2335 * a literal offset where we don't need bounds checking.
2337 if (ctx
->screen
->info
.chip_class
== SI
&&
2338 HAVE_LLVM
< 0x0600 &&
2339 !reg
->Register
.Indirect
) {
2340 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2341 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2342 return bitcast(bld_base
, type
, result
);
2345 /* Do the bounds checking with a descriptor, because
2346 * doing computation and manual bounds checking of 64-bit
2347 * addresses generates horrible VALU code with very high
2348 * VGPR usage and very low SIMD occupancy.
2350 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->i64
, "");
2351 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2353 LLVMValueRef desc_elems
[] = {
2354 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, ""),
2355 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, ""),
2356 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2357 LLVMConstInt(ctx
->i32
,
2358 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2359 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2360 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2361 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2362 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2363 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2365 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2366 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2367 return bitcast(bld_base
, type
, result
);
2370 assert(reg
->Register
.Dimension
);
2371 buf
= reg
->Dimension
.Index
;
2373 if (reg
->Dimension
.Indirect
) {
2374 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2376 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2377 reg
->Dimension
.Index
,
2378 ctx
->num_const_buffers
);
2379 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2380 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2381 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2383 bufp
= load_const_buffer_desc(ctx
, buf
);
2385 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2388 /* Upper 16 bits must be zero. */
2389 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
2390 LLVMValueRef val
[2])
2392 return LLVMBuildOr(ctx
->ac
.builder
, val
[0],
2393 LLVMBuildShl(ctx
->ac
.builder
, val
[1],
2394 LLVMConstInt(ctx
->i32
, 16, 0),
2398 /* Upper 16 bits are ignored and will be dropped. */
2399 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
2400 LLVMValueRef val
[2])
2402 LLVMValueRef v
[2] = {
2403 LLVMBuildAnd(ctx
->ac
.builder
, val
[0],
2404 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
2407 return si_llvm_pack_two_int16(ctx
, v
);
2410 /* Initialize arguments for the shader export intrinsic */
2411 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2412 LLVMValueRef
*values
,
2414 struct ac_export_args
*args
)
2416 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2417 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2418 LLVMValueRef val
[4];
2419 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2421 bool is_int8
, is_int10
;
2423 /* Default is 0xf. Adjusted below depending on the format. */
2424 args
->enabled_channels
= 0xf; /* writemask */
2426 /* Specify whether the EXEC mask represents the valid mask */
2427 args
->valid_mask
= 0;
2429 /* Specify whether this is the last export */
2432 /* Specify the target we are exporting */
2433 args
->target
= target
;
2435 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2436 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2437 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2438 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2440 assert(cbuf
>= 0 && cbuf
< 8);
2441 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2442 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2443 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2446 args
->compr
= false;
2447 args
->out
[0] = f32undef
;
2448 args
->out
[1] = f32undef
;
2449 args
->out
[2] = f32undef
;
2450 args
->out
[3] = f32undef
;
2452 switch (spi_shader_col_format
) {
2453 case V_028714_SPI_SHADER_ZERO
:
2454 args
->enabled_channels
= 0; /* writemask */
2455 args
->target
= V_008DFC_SQ_EXP_NULL
;
2458 case V_028714_SPI_SHADER_32_R
:
2459 args
->enabled_channels
= 1; /* writemask */
2460 args
->out
[0] = values
[0];
2463 case V_028714_SPI_SHADER_32_GR
:
2464 args
->enabled_channels
= 0x3; /* writemask */
2465 args
->out
[0] = values
[0];
2466 args
->out
[1] = values
[1];
2469 case V_028714_SPI_SHADER_32_AR
:
2470 args
->enabled_channels
= 0x9; /* writemask */
2471 args
->out
[0] = values
[0];
2472 args
->out
[3] = values
[3];
2475 case V_028714_SPI_SHADER_FP16_ABGR
:
2476 args
->compr
= 1; /* COMPR flag */
2478 for (chan
= 0; chan
< 2; chan
++) {
2479 LLVMValueRef pack_args
[2] = {
2481 values
[2 * chan
+ 1]
2483 LLVMValueRef packed
;
2485 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
2486 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2490 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2491 for (chan
= 0; chan
< 4; chan
++) {
2492 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
2493 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2494 LLVMConstReal(ctx
->f32
, 65535), "");
2495 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2496 LLVMConstReal(ctx
->f32
, 0.5), "");
2497 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2501 args
->compr
= 1; /* COMPR flag */
2502 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2503 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2506 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2507 for (chan
= 0; chan
< 4; chan
++) {
2508 /* Clamp between [-1, 1]. */
2509 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MIN
,
2511 LLVMConstReal(ctx
->f32
, 1));
2512 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MAX
,
2514 LLVMConstReal(ctx
->f32
, -1));
2515 /* Convert to a signed integer in [-32767, 32767]. */
2516 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2517 LLVMConstReal(ctx
->f32
, 32767), "");
2518 /* If positive, add 0.5, else add -0.5. */
2519 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2520 LLVMBuildSelect(builder
,
2521 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2522 val
[chan
], ctx
->ac
.f32_0
, ""),
2523 LLVMConstReal(ctx
->f32
, 0.5),
2524 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
2525 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2528 args
->compr
= 1; /* COMPR flag */
2529 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2530 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2533 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2534 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2535 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
2536 LLVMValueRef max_alpha
=
2537 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
2540 for (chan
= 0; chan
< 4; chan
++) {
2541 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2542 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_UMIN
,
2544 chan
== 3 ? max_alpha
: max_rgb
);
2547 args
->compr
= 1; /* COMPR flag */
2548 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2549 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2553 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2554 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2555 is_int8
? 127 : is_int10
? 511 : 32767, 0);
2556 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
2557 is_int8
? -128 : is_int10
? -512 : -32768, 0);
2558 LLVMValueRef max_alpha
=
2559 !is_int10
? max_rgb
: ctx
->i32_1
;
2560 LLVMValueRef min_alpha
=
2561 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
2564 for (chan
= 0; chan
< 4; chan
++) {
2565 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2566 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2568 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
2569 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2571 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
2574 args
->compr
= 1; /* COMPR flag */
2575 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2576 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2580 case V_028714_SPI_SHADER_32_ABGR
:
2581 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2586 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2589 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2591 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2592 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2593 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2594 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2595 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2596 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2597 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2598 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2600 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2603 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2604 SI_PARAM_ALPHA_REF
);
2605 LLVMValueRef alpha_pass
=
2606 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2607 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2609 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2613 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2615 unsigned samplemask_param
)
2617 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2618 LLVMValueRef coverage
;
2620 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2621 coverage
= LLVMGetParam(ctx
->main_fn
,
2623 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2625 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2627 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2629 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2632 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2633 LLVMConstReal(ctx
->f32
,
2634 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2636 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2639 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2640 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2644 unsigned const_chan
;
2645 LLVMValueRef base_elt
;
2646 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2647 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2648 SI_VS_CONST_CLIP_PLANES
, 0);
2649 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2651 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2652 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2657 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2659 /* Compute dot products of position and user clip plane vectors */
2660 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2661 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2663 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2664 const_chan
) * 4, 0);
2665 base_elt
= buffer_load_const(ctx
, const_resource
,
2668 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2669 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2670 out_elts
[const_chan
]));
2674 args
->enabled_channels
= 0xf;
2675 args
->valid_mask
= 0;
2677 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2682 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2686 if (so
->num_outputs
)
2687 fprintf(stderr
, "STREAMOUT\n");
2689 for (i
= 0; i
< so
->num_outputs
; i
++) {
2690 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2691 so
->output
[i
].start_component
;
2692 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2693 i
, so
->output
[i
].output_buffer
,
2694 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2695 so
->output
[i
].register_index
,
2696 mask
& 1 ? "x" : "",
2697 mask
& 2 ? "y" : "",
2698 mask
& 4 ? "z" : "",
2699 mask
& 8 ? "w" : "");
2703 static void emit_streamout_output(struct si_shader_context
*ctx
,
2704 LLVMValueRef
const *so_buffers
,
2705 LLVMValueRef
const *so_write_offsets
,
2706 struct pipe_stream_output
*stream_out
,
2707 struct si_shader_output_values
*shader_out
)
2709 unsigned buf_idx
= stream_out
->output_buffer
;
2710 unsigned start
= stream_out
->start_component
;
2711 unsigned num_comps
= stream_out
->num_components
;
2712 LLVMValueRef out
[4];
2714 assert(num_comps
&& num_comps
<= 4);
2715 if (!num_comps
|| num_comps
> 4)
2718 /* Load the output as int. */
2719 for (int j
= 0; j
< num_comps
; j
++) {
2720 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2722 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2725 /* Pack the output. */
2726 LLVMValueRef vdata
= NULL
;
2728 switch (num_comps
) {
2729 case 1: /* as i32 */
2732 case 2: /* as v2i32 */
2733 case 3: /* as v4i32 (aligned to 4) */
2734 case 4: /* as v4i32 */
2735 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2736 for (int j
= 0; j
< num_comps
; j
++) {
2737 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2738 LLVMConstInt(ctx
->i32
, j
, 0), "");
2743 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2745 so_write_offsets
[buf_idx
],
2747 stream_out
->dst_offset
* 4, 1, 1, true, false);
2751 * Write streamout data to buffers for vertex stream @p stream (different
2752 * vertex streams can occur for GS copy shaders).
2754 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2755 struct si_shader_output_values
*outputs
,
2756 unsigned noutput
, unsigned stream
)
2758 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2759 struct pipe_stream_output_info
*so
= &sel
->so
;
2760 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2762 struct lp_build_if_state if_ctx
;
2764 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2765 LLVMValueRef so_vtx_count
=
2766 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2768 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2770 /* can_emit = tid < so_vtx_count; */
2771 LLVMValueRef can_emit
=
2772 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2774 /* Emit the streamout code conditionally. This actually avoids
2775 * out-of-bounds buffer access. The hw tells us via the SGPR
2776 * (so_vtx_count) which threads are allowed to emit streamout data. */
2777 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2779 /* The buffer offset is computed as follows:
2780 * ByteOffset = streamout_offset[buffer_id]*4 +
2781 * (streamout_write_index + thread_id)*stride[buffer_id] +
2785 LLVMValueRef so_write_index
=
2786 LLVMGetParam(ctx
->main_fn
,
2787 ctx
->param_streamout_write_index
);
2789 /* Compute (streamout_write_index + thread_id). */
2790 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2792 /* Load the descriptor and compute the write offset for each
2793 * enabled buffer. */
2794 LLVMValueRef so_write_offset
[4] = {};
2795 LLVMValueRef so_buffers
[4];
2796 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2797 ctx
->param_rw_buffers
);
2799 for (i
= 0; i
< 4; i
++) {
2803 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2804 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2806 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2808 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2809 ctx
->param_streamout_offset
[i
]);
2810 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2812 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2813 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2814 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2817 /* Write streamout data. */
2818 for (i
= 0; i
< so
->num_outputs
; i
++) {
2819 unsigned reg
= so
->output
[i
].register_index
;
2824 if (stream
!= so
->output
[i
].stream
)
2827 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2828 &so
->output
[i
], &outputs
[reg
]);
2831 lp_build_endif(&if_ctx
);
2834 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2835 LLVMValueRef
*values
)
2837 struct ac_export_args args
;
2839 si_llvm_init_export_args(ctx
, values
,
2840 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2841 ac_build_export(&ctx
->ac
, &args
);
2844 static void si_build_param_exports(struct si_shader_context
*ctx
,
2845 struct si_shader_output_values
*outputs
,
2848 struct si_shader
*shader
= ctx
->shader
;
2849 unsigned param_count
= 0;
2851 for (unsigned i
= 0; i
< noutput
; i
++) {
2852 unsigned semantic_name
= outputs
[i
].semantic_name
;
2853 unsigned semantic_index
= outputs
[i
].semantic_index
;
2855 if (outputs
[i
].vertex_stream
[0] != 0 &&
2856 outputs
[i
].vertex_stream
[1] != 0 &&
2857 outputs
[i
].vertex_stream
[2] != 0 &&
2858 outputs
[i
].vertex_stream
[3] != 0)
2861 switch (semantic_name
) {
2862 case TGSI_SEMANTIC_LAYER
:
2863 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2864 case TGSI_SEMANTIC_CLIPDIST
:
2865 case TGSI_SEMANTIC_COLOR
:
2866 case TGSI_SEMANTIC_BCOLOR
:
2867 case TGSI_SEMANTIC_PRIMID
:
2868 case TGSI_SEMANTIC_FOG
:
2869 case TGSI_SEMANTIC_TEXCOORD
:
2870 case TGSI_SEMANTIC_GENERIC
:
2876 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2877 semantic_index
< SI_MAX_IO_GENERIC
) &&
2878 shader
->key
.opt
.kill_outputs
&
2879 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2882 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2884 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2885 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2888 shader
->info
.nr_param_exports
= param_count
;
2891 /* Generate export instructions for hardware VS shader stage */
2892 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2893 struct si_shader_output_values
*outputs
,
2896 struct si_shader
*shader
= ctx
->shader
;
2897 struct ac_export_args pos_args
[4] = {};
2898 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2902 /* Build position exports. */
2903 for (i
= 0; i
< noutput
; i
++) {
2904 switch (outputs
[i
].semantic_name
) {
2905 case TGSI_SEMANTIC_POSITION
:
2906 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2907 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2909 case TGSI_SEMANTIC_PSIZE
:
2910 psize_value
= outputs
[i
].values
[0];
2912 case TGSI_SEMANTIC_LAYER
:
2913 layer_value
= outputs
[i
].values
[0];
2915 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2916 viewport_index_value
= outputs
[i
].values
[0];
2918 case TGSI_SEMANTIC_EDGEFLAG
:
2919 edgeflag_value
= outputs
[i
].values
[0];
2921 case TGSI_SEMANTIC_CLIPDIST
:
2922 if (!shader
->key
.opt
.clip_disable
) {
2923 unsigned index
= 2 + outputs
[i
].semantic_index
;
2924 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2925 V_008DFC_SQ_EXP_POS
+ index
,
2929 case TGSI_SEMANTIC_CLIPVERTEX
:
2930 if (!shader
->key
.opt
.clip_disable
) {
2931 si_llvm_emit_clipvertex(ctx
, pos_args
,
2938 /* We need to add the position output manually if it's missing. */
2939 if (!pos_args
[0].out
[0]) {
2940 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2941 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2942 pos_args
[0].done
= 0; /* last export? */
2943 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2944 pos_args
[0].compr
= 0; /* COMPR flag */
2945 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2946 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2947 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2948 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2951 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2952 if (shader
->selector
->info
.writes_psize
||
2953 shader
->selector
->info
.writes_edgeflag
||
2954 shader
->selector
->info
.writes_viewport_index
||
2955 shader
->selector
->info
.writes_layer
) {
2956 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2957 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2958 (shader
->selector
->info
.writes_layer
<< 2);
2960 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2961 pos_args
[1].done
= 0; /* last export? */
2962 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2963 pos_args
[1].compr
= 0; /* COMPR flag */
2964 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2965 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2966 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2967 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2969 if (shader
->selector
->info
.writes_psize
)
2970 pos_args
[1].out
[0] = psize_value
;
2972 if (shader
->selector
->info
.writes_edgeflag
) {
2973 /* The output is a float, but the hw expects an integer
2974 * with the first bit containing the edge flag. */
2975 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2978 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2982 /* The LLVM intrinsic expects a float. */
2983 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2986 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2987 /* GFX9 has the layer in out.z[10:0] and the viewport
2988 * index in out.z[19:16].
2990 if (shader
->selector
->info
.writes_layer
)
2991 pos_args
[1].out
[2] = layer_value
;
2993 if (shader
->selector
->info
.writes_viewport_index
) {
2994 LLVMValueRef v
= viewport_index_value
;
2996 v
= ac_to_integer(&ctx
->ac
, v
);
2997 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2998 LLVMConstInt(ctx
->i32
, 16, 0), "");
2999 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3000 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3001 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3002 pos_args
[1].enabled_channels
|= 1 << 2;
3005 if (shader
->selector
->info
.writes_layer
)
3006 pos_args
[1].out
[2] = layer_value
;
3008 if (shader
->selector
->info
.writes_viewport_index
) {
3009 pos_args
[1].out
[3] = viewport_index_value
;
3010 pos_args
[1].enabled_channels
|= 1 << 3;
3015 for (i
= 0; i
< 4; i
++)
3016 if (pos_args
[i
].out
[0])
3017 shader
->info
.nr_pos_exports
++;
3020 for (i
= 0; i
< 4; i
++) {
3021 if (!pos_args
[i
].out
[0])
3024 /* Specify the target we are exporting */
3025 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3027 if (pos_idx
== shader
->info
.nr_pos_exports
)
3028 /* Specify that this is the last export */
3029 pos_args
[i
].done
= 1;
3031 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3034 /* Build parameter exports. */
3035 si_build_param_exports(ctx
, outputs
, noutput
);
3039 * Forward all outputs from the vertex shader to the TES. This is only used
3040 * for the fixed function TCS.
3042 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3044 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3045 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3046 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3049 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3050 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3051 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3053 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3054 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3055 lds_vertex_stride
, "");
3056 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3057 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3059 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3061 unsigned i
= u_bit_scan64(&inputs
);
3063 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3064 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3067 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3068 get_rel_patch_id(ctx
),
3070 LLVMConstInt(ctx
->i32
, i
, 0));
3072 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3075 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3076 buffer_offset
, 0, 1, 0, true, false);
3080 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3081 LLVMValueRef rel_patch_id
,
3082 LLVMValueRef invocation_id
,
3083 LLVMValueRef tcs_out_current_patch_data_offset
,
3084 LLVMValueRef invoc0_tf_outer
[4],
3085 LLVMValueRef invoc0_tf_inner
[2])
3087 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3088 struct si_shader
*shader
= ctx
->shader
;
3089 unsigned tess_inner_index
, tess_outer_index
;
3090 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3091 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3092 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3093 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3095 /* Add a barrier before loading tess factors from LDS. */
3096 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3097 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3099 /* Do this only for invocation 0, because the tess levels are per-patch,
3102 * This can't jump, because invocation 0 executes this. It should
3103 * at least mask out the loads and stores for other invocations.
3105 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3106 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3107 invocation_id
, ctx
->i32_0
, ""));
3109 /* Determine the layout of one tess factor element in the buffer. */
3110 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3111 case PIPE_PRIM_LINES
:
3112 stride
= 2; /* 2 dwords, 1 vec2 store */
3116 case PIPE_PRIM_TRIANGLES
:
3117 stride
= 4; /* 4 dwords, 1 vec4 store */
3121 case PIPE_PRIM_QUADS
:
3122 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3131 for (i
= 0; i
< 4; i
++) {
3132 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3133 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3136 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3137 /* Tess factors are in VGPRs. */
3138 for (i
= 0; i
< outer_comps
; i
++)
3139 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3140 for (i
= 0; i
< inner_comps
; i
++)
3141 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3143 /* Load tess_inner and tess_outer from LDS.
3144 * Any invocation can write them, so we can't get them from a temporary.
3146 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3147 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3149 lds_base
= tcs_out_current_patch_data_offset
;
3150 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3151 LLVMConstInt(ctx
->i32
,
3152 tess_inner_index
* 4, 0), "");
3153 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3154 LLVMConstInt(ctx
->i32
,
3155 tess_outer_index
* 4, 0), "");
3157 for (i
= 0; i
< outer_comps
; i
++) {
3159 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3161 for (i
= 0; i
< inner_comps
; i
++) {
3162 inner
[i
] = out
[outer_comps
+i
] =
3163 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3167 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3168 /* For isolines, the hardware expects tess factors in the
3169 * reverse order from what GLSL / TGSI specify.
3171 LLVMValueRef tmp
= out
[0];
3176 /* Convert the outputs to vectors for stores. */
3177 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3181 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3183 /* Get the buffer. */
3184 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
3186 /* Get the offset. */
3187 tf_base
= LLVMGetParam(ctx
->main_fn
,
3188 ctx
->param_tcs_factor_offset
);
3189 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3190 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3192 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3193 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3194 rel_patch_id
, ctx
->i32_0
, ""));
3196 /* Store the dynamic HS control word. */
3198 if (ctx
->screen
->info
.chip_class
<= VI
) {
3199 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3200 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3201 1, ctx
->i32_0
, tf_base
,
3202 offset
, 1, 0, true, false);
3206 lp_build_endif(&inner_if_ctx
);
3208 /* Store the tessellation factors. */
3209 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3210 MIN2(stride
, 4), byteoffset
, tf_base
,
3211 offset
, 1, 0, true, false);
3214 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3215 stride
- 4, byteoffset
, tf_base
,
3216 offset
, 1, 0, true, false);
3218 /* Store the tess factors into the offchip buffer if TES reads them. */
3219 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3220 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3221 LLVMValueRef tf_inner_offset
;
3222 unsigned param_outer
, param_inner
;
3224 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3225 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3227 param_outer
= si_shader_io_get_unique_index_patch(
3228 TGSI_SEMANTIC_TESSOUTER
, 0);
3229 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3230 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3232 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3233 util_next_power_of_two(outer_comps
));
3235 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3236 outer_comps
, tf_outer_offset
,
3237 base
, 0, 1, 0, true, false);
3239 param_inner
= si_shader_io_get_unique_index_patch(
3240 TGSI_SEMANTIC_TESSINNER
, 0);
3241 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3242 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3244 inner_vec
= inner_comps
== 1 ? inner
[0] :
3245 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3246 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3247 inner_comps
, tf_inner_offset
,
3248 base
, 0, 1, 0, true, false);
3252 lp_build_endif(&if_ctx
);
3256 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3257 unsigned param
, unsigned return_index
)
3259 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3260 LLVMGetParam(ctx
->main_fn
, param
),
3265 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3266 unsigned param
, unsigned return_index
)
3268 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3269 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3271 return LLVMBuildInsertValue(builder
, ret
,
3272 ac_to_float(&ctx
->ac
, p
),
3277 si_insert_input_ptr_as_2xi32(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3278 unsigned param
, unsigned return_index
)
3280 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3281 LLVMValueRef ptr
, lo
, hi
;
3283 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3284 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3285 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3286 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3287 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3288 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3289 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3292 /* This only writes the tessellation factor levels. */
3293 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3294 unsigned max_outputs
,
3295 LLVMValueRef
*addrs
)
3297 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3298 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3299 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3300 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3302 si_copy_tcs_inputs(bld_base
);
3304 rel_patch_id
= get_rel_patch_id(ctx
);
3305 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3306 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3308 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3309 LLVMBasicBlockRef blocks
[2] = {
3310 LLVMGetInsertBlock(builder
),
3311 ctx
->merged_wrap_if_state
.entry_block
3313 LLVMValueRef values
[2];
3315 lp_build_endif(&ctx
->merged_wrap_if_state
);
3317 values
[0] = rel_patch_id
;
3318 values
[1] = LLVMGetUndef(ctx
->i32
);
3319 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3321 values
[0] = tf_lds_offset
;
3322 values
[1] = LLVMGetUndef(ctx
->i32
);
3323 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3325 values
[0] = invocation_id
;
3326 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3327 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3330 /* Return epilog parameters from this function. */
3331 LLVMValueRef ret
= ctx
->return_value
;
3334 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3335 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3336 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3337 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3338 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3339 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3340 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3341 /* Tess offchip and tess factor offsets are at the beginning. */
3342 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3343 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3344 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
3346 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3347 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3348 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3349 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3350 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3351 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3352 /* Tess offchip and tess factor offsets are after user SGPRs. */
3353 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3354 GFX6_TCS_NUM_USER_SGPR
);
3355 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3356 GFX6_TCS_NUM_USER_SGPR
+ 1);
3357 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3361 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3362 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3363 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3365 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3366 * the invocation_id output does not alias the tcs_rel_ids input,
3367 * which saves a V_MOV on gfx9.
3371 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3372 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3374 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3375 vgpr
++; /* skip the tess factor LDS offset */
3376 for (unsigned i
= 0; i
< 6; i
++) {
3377 LLVMValueRef value
=
3378 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3379 value
= ac_to_float(&ctx
->ac
, value
);
3380 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3383 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3385 ctx
->return_value
= ret
;
3388 /* Pass TCS inputs from LS to TCS on GFX9. */
3389 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3391 LLVMValueRef ret
= ctx
->return_value
;
3393 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3394 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3395 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3396 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3398 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3399 8 + SI_SGPR_RW_BUFFERS
);
3400 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3401 ctx
->param_bindless_samplers_and_images
,
3402 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3404 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3405 8 + SI_SGPR_VS_STATE_BITS
);
3406 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3407 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3408 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3409 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3410 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3411 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3412 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3413 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3414 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3415 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3417 unsigned desc_param
= ctx
->param_tcs_factor_addr_base64k
+ 2;
3418 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3419 8 + GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS
);
3420 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3421 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES
);
3423 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3424 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3425 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3427 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3428 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3430 ctx
->return_value
= ret
;
3433 /* Pass GS inputs from ES to GS on GFX9. */
3434 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3436 LLVMValueRef ret
= ctx
->return_value
;
3438 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3439 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3440 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3442 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3443 8 + SI_SGPR_RW_BUFFERS
);
3444 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3445 ctx
->param_bindless_samplers_and_images
,
3446 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3448 unsigned desc_param
= ctx
->param_vs_state_bits
+ 1;
3449 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3450 8 + GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS
);
3451 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3452 8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES
);
3454 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3455 for (unsigned i
= 0; i
< 5; i
++) {
3456 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3457 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3459 ctx
->return_value
= ret
;
3462 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3463 unsigned max_outputs
,
3464 LLVMValueRef
*addrs
)
3466 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3467 struct si_shader
*shader
= ctx
->shader
;
3468 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3470 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3471 ctx
->param_rel_auto_id
);
3472 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3473 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3474 vertex_dw_stride
, "");
3476 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3477 * its inputs from it. */
3478 for (i
= 0; i
< info
->num_outputs
; i
++) {
3479 unsigned name
= info
->output_semantic_name
[i
];
3480 unsigned index
= info
->output_semantic_index
[i
];
3482 /* The ARB_shader_viewport_layer_array spec contains the
3485 * 2) What happens if gl_ViewportIndex or gl_Layer is
3486 * written in the vertex shader and a geometry shader is
3489 * RESOLVED: The value written by the last vertex processing
3490 * stage is used. If the last vertex processing stage
3491 * (vertex, tessellation evaluation or geometry) does not
3492 * statically assign to gl_ViewportIndex or gl_Layer, index
3493 * or layer zero is assumed.
3495 * So writes to those outputs in VS-as-LS are simply ignored.
3497 if (name
== TGSI_SEMANTIC_LAYER
||
3498 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3501 int param
= si_shader_io_get_unique_index(name
, index
);
3502 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3503 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3505 for (chan
= 0; chan
< 4; chan
++) {
3506 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3509 lds_store(ctx
, chan
, dw_addr
,
3510 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3514 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3515 si_set_ls_return_value_for_tcs(ctx
);
3518 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3519 unsigned max_outputs
,
3520 LLVMValueRef
*addrs
)
3522 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3523 struct si_shader
*es
= ctx
->shader
;
3524 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3525 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3526 ctx
->param_es2gs_offset
);
3527 LLVMValueRef lds_base
= NULL
;
3531 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3532 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3533 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3534 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3535 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3536 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3537 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3538 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3539 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3542 for (i
= 0; i
< info
->num_outputs
; i
++) {
3545 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3546 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3549 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3550 info
->output_semantic_index
[i
]);
3552 for (chan
= 0; chan
< 4; chan
++) {
3553 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3554 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3556 /* GFX9 has the ESGS ring in LDS. */
3557 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3558 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3562 ac_build_buffer_store_dword(&ctx
->ac
,
3564 out_val
, 1, NULL
, soffset
,
3565 (4 * param
+ chan
) * 4,
3570 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3571 si_set_es_return_value_for_gs(ctx
);
3574 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3576 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3577 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3579 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3582 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3584 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3585 si_get_gs_wave_id(ctx
));
3587 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3588 lp_build_endif(&ctx
->merged_wrap_if_state
);
3591 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3592 unsigned max_outputs
,
3593 LLVMValueRef
*addrs
)
3595 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3596 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3598 assert(info
->num_outputs
<= max_outputs
);
3600 emit_gs_epilogue(ctx
);
3603 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3605 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3606 emit_gs_epilogue(ctx
);
3609 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3610 unsigned max_outputs
,
3611 LLVMValueRef
*addrs
)
3613 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3614 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3615 struct si_shader_output_values
*outputs
= NULL
;
3618 assert(!ctx
->shader
->is_gs_copy_shader
);
3619 assert(info
->num_outputs
<= max_outputs
);
3621 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3623 /* Vertex color clamping.
3625 * This uses a state constant loaded in a user data SGPR and
3626 * an IF statement is added that clamps all colors if the constant
3629 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3630 struct lp_build_if_state if_ctx
;
3631 LLVMValueRef cond
= NULL
;
3632 LLVMValueRef addr
, val
;
3634 for (i
= 0; i
< info
->num_outputs
; i
++) {
3635 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3636 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3639 /* We've found a color. */
3641 /* The state is in the first bit of the user SGPR. */
3642 cond
= LLVMGetParam(ctx
->main_fn
,
3643 ctx
->param_vs_state_bits
);
3644 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3646 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3649 for (j
= 0; j
< 4; j
++) {
3650 addr
= addrs
[4 * i
+ j
];
3651 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3652 val
= ac_build_clamp(&ctx
->ac
, val
);
3653 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3658 lp_build_endif(&if_ctx
);
3661 for (i
= 0; i
< info
->num_outputs
; i
++) {
3662 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3663 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3665 for (j
= 0; j
< 4; j
++) {
3666 outputs
[i
].values
[j
] =
3667 LLVMBuildLoad(ctx
->ac
.builder
,
3670 outputs
[i
].vertex_stream
[j
] =
3671 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3675 if (ctx
->shader
->selector
->so
.num_outputs
)
3676 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3678 /* Export PrimitiveID. */
3679 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3680 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3681 outputs
[i
].semantic_index
= 0;
3682 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3683 for (j
= 1; j
< 4; j
++)
3684 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3686 memset(outputs
[i
].vertex_stream
, 0,
3687 sizeof(outputs
[i
].vertex_stream
));
3691 si_llvm_export_vs(ctx
, outputs
, i
);
3695 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3697 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3699 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3700 &ctx
->outputs
[0][0]);
3703 struct si_ps_exports
{
3705 struct ac_export_args args
[10];
3708 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3709 LLVMValueRef depth
, LLVMValueRef stencil
,
3710 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3712 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3713 struct ac_export_args args
;
3715 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3717 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3720 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3721 LLVMValueRef
*color
, unsigned index
,
3722 unsigned samplemask_param
,
3723 bool is_last
, struct si_ps_exports
*exp
)
3725 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3729 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3730 for (i
= 0; i
< 4; i
++)
3731 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3734 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3735 color
[3] = ctx
->ac
.f32_1
;
3739 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3740 si_alpha_test(bld_base
, color
[3]);
3742 /* Line & polygon smoothing */
3743 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3744 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3747 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3748 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3749 struct ac_export_args args
[8];
3752 /* Get the export arguments, also find out what the last one is. */
3753 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3754 si_llvm_init_export_args(ctx
, color
,
3755 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3756 if (args
[c
].enabled_channels
)
3760 /* Emit all exports. */
3761 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3762 if (is_last
&& last
== c
) {
3763 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3764 args
[c
].done
= 1; /* DONE bit */
3765 } else if (!args
[c
].enabled_channels
)
3766 continue; /* unnecessary NULL export */
3768 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3771 struct ac_export_args args
;
3774 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3777 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3778 args
.done
= 1; /* DONE bit */
3779 } else if (!args
.enabled_channels
)
3780 return; /* unnecessary NULL export */
3782 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3786 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3787 struct si_ps_exports
*exp
)
3789 for (unsigned i
= 0; i
< exp
->num
; i
++)
3790 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3793 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3795 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3796 struct lp_build_context
*base
= &bld_base
->base
;
3797 struct ac_export_args args
;
3799 args
.enabled_channels
= 0x0; /* enabled channels */
3800 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3801 args
.done
= 1; /* DONE bit */
3802 args
.target
= V_008DFC_SQ_EXP_NULL
;
3803 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3804 args
.out
[0] = base
->undef
; /* R */
3805 args
.out
[1] = base
->undef
; /* G */
3806 args
.out
[2] = base
->undef
; /* B */
3807 args
.out
[3] = base
->undef
; /* A */
3809 ac_build_export(&ctx
->ac
, &args
);
3813 * Return PS outputs in this order:
3815 * v[0:3] = color0.xyzw
3816 * v[4:7] = color1.xyzw
3821 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3823 * The alpha-ref SGPR is returned via its original location.
3825 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3826 unsigned max_outputs
,
3827 LLVMValueRef
*addrs
)
3829 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3830 struct si_shader
*shader
= ctx
->shader
;
3831 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3832 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3833 unsigned i
, j
, first_vgpr
, vgpr
;
3835 LLVMValueRef color
[8][4] = {};
3836 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3839 if (ctx
->postponed_kill
)
3840 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3842 /* Read the output values. */
3843 for (i
= 0; i
< info
->num_outputs
; i
++) {
3844 unsigned semantic_name
= info
->output_semantic_name
[i
];
3845 unsigned semantic_index
= info
->output_semantic_index
[i
];
3847 switch (semantic_name
) {
3848 case TGSI_SEMANTIC_COLOR
:
3849 assert(semantic_index
< 8);
3850 for (j
= 0; j
< 4; j
++) {
3851 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3852 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3853 color
[semantic_index
][j
] = result
;
3856 case TGSI_SEMANTIC_POSITION
:
3857 depth
= LLVMBuildLoad(builder
,
3858 addrs
[4 * i
+ 2], "");
3860 case TGSI_SEMANTIC_STENCIL
:
3861 stencil
= LLVMBuildLoad(builder
,
3862 addrs
[4 * i
+ 1], "");
3864 case TGSI_SEMANTIC_SAMPLEMASK
:
3865 samplemask
= LLVMBuildLoad(builder
,
3866 addrs
[4 * i
+ 0], "");
3869 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3874 /* Fill the return structure. */
3875 ret
= ctx
->return_value
;
3878 ret
= LLVMBuildInsertValue(builder
, ret
,
3879 ac_to_integer(&ctx
->ac
,
3880 LLVMGetParam(ctx
->main_fn
,
3881 SI_PARAM_ALPHA_REF
)),
3882 SI_SGPR_ALPHA_REF
, "");
3885 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3886 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3890 for (j
= 0; j
< 4; j
++)
3891 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3894 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3896 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3898 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3900 /* Add the input sample mask for smoothing at the end. */
3901 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3902 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3903 ret
= LLVMBuildInsertValue(builder
, ret
,
3904 LLVMGetParam(ctx
->main_fn
,
3905 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3907 ctx
->return_value
= ret
;
3910 static void membar_emit(
3911 const struct lp_build_tgsi_action
*action
,
3912 struct lp_build_tgsi_context
*bld_base
,
3913 struct lp_build_emit_data
*emit_data
)
3915 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3916 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3917 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3918 unsigned waitcnt
= NOOP_WAITCNT
;
3920 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3921 waitcnt
&= VM_CNT
& LGKM_CNT
;
3923 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3924 TGSI_MEMBAR_SHADER_BUFFER
|
3925 TGSI_MEMBAR_SHADER_IMAGE
))
3928 if (flags
& TGSI_MEMBAR_SHARED
)
3929 waitcnt
&= LGKM_CNT
;
3931 if (waitcnt
!= NOOP_WAITCNT
)
3932 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3935 static void clock_emit(
3936 const struct lp_build_tgsi_action
*action
,
3937 struct lp_build_tgsi_context
*bld_base
,
3938 struct lp_build_emit_data
*emit_data
)
3940 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3943 tmp
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.readcyclecounter",
3944 ctx
->i64
, NULL
, 0, 0);
3945 tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->v2i32
, "");
3947 emit_data
->output
[0] =
3948 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3949 emit_data
->output
[1] =
3950 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3953 LLVMTypeRef
si_const_array(LLVMTypeRef elem_type
, int num_elements
)
3955 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3959 static void si_llvm_emit_ddxy(
3960 const struct lp_build_tgsi_action
*action
,
3961 struct lp_build_tgsi_context
*bld_base
,
3962 struct lp_build_emit_data
*emit_data
)
3964 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3965 unsigned opcode
= emit_data
->info
->opcode
;
3970 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3971 mask
= AC_TID_MASK_LEFT
;
3972 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3973 mask
= AC_TID_MASK_TOP
;
3975 mask
= AC_TID_MASK_TOP_LEFT
;
3977 /* for DDX we want to next X pixel, DDY next Y pixel. */
3978 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3980 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3981 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3982 emit_data
->output
[emit_data
->chan
] = val
;
3986 * this takes an I,J coordinate pair,
3987 * and works out the X and Y derivatives.
3988 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3990 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3991 struct lp_build_tgsi_context
*bld_base
,
3992 LLVMValueRef interp_ij
)
3994 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3995 LLVMValueRef result
[4], a
;
3998 for (i
= 0; i
< 2; i
++) {
3999 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
4000 LLVMConstInt(ctx
->i32
, i
, 0), "");
4001 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
4002 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
4005 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
4008 static void interp_fetch_args(
4009 struct lp_build_tgsi_context
*bld_base
,
4010 struct lp_build_emit_data
*emit_data
)
4012 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4013 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4015 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4016 /* offset is in second src, first two channels */
4017 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4020 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4023 emit_data
->arg_count
= 2;
4024 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4025 LLVMValueRef sample_position
;
4026 LLVMValueRef sample_id
;
4027 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4029 /* fetch sample ID, then fetch its sample position,
4030 * and place into first two channels.
4032 sample_id
= lp_build_emit_fetch(bld_base
,
4033 emit_data
->inst
, 1, TGSI_CHAN_X
);
4034 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4036 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4037 * Language 4.50 spec says about interpolateAtSample:
4039 * "Returns the value of the input interpolant variable at
4040 * the location of sample number sample. If multisample
4041 * buffers are not available, the input variable will be
4042 * evaluated at the center of the pixel. If sample sample
4043 * does not exist, the position used to interpolate the
4044 * input variable is undefined."
4046 * This means that sample_id values outside of the valid are
4047 * in fact valid input, and the usual mechanism for loading the
4048 * sample position doesn't work.
4050 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4051 LLVMValueRef center
[4] = {
4052 LLVMConstReal(ctx
->f32
, 0.5),
4053 LLVMConstReal(ctx
->f32
, 0.5),
4058 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
4060 sample_position
= load_sample_position(ctx
, sample_id
);
4063 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4067 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4068 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4071 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4072 emit_data
->arg_count
= 2;
4076 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4077 struct lp_build_tgsi_context
*bld_base
,
4078 struct lp_build_emit_data
*emit_data
)
4080 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4081 struct si_shader
*shader
= ctx
->shader
;
4082 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4083 LLVMValueRef interp_param
;
4084 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4085 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4086 int input_base
, input_array_size
;
4089 LLVMValueRef prim_mask
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
4090 LLVMValueRef array_idx
;
4091 int interp_param_idx
;
4095 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4097 if (input
->Register
.Indirect
) {
4098 unsigned array_id
= input
->Indirect
.ArrayID
;
4101 input_base
= info
->input_array_first
[array_id
];
4102 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4104 input_base
= inst
->Src
[0].Register
.Index
;
4105 input_array_size
= info
->num_inputs
- input_base
;
4108 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4109 1, input
->Register
.Index
- input_base
);
4111 input_base
= inst
->Src
[0].Register
.Index
;
4112 input_array_size
= 1;
4113 array_idx
= ctx
->i32_0
;
4116 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4118 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4119 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4120 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4122 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4124 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4125 if (interp_param_idx
== -1)
4127 else if (interp_param_idx
)
4128 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4130 interp_param
= NULL
;
4132 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4133 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4134 LLVMValueRef ij_out
[2];
4135 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4138 * take the I then J parameters, and the DDX/Y for it, and
4139 * calculate the IJ inputs for the interpolator.
4140 * temp1 = ddx * offset/sample.x + I;
4141 * interp_param.I = ddy * offset/sample.y + temp1;
4142 * temp1 = ddx * offset/sample.x + J;
4143 * interp_param.J = ddy * offset/sample.y + temp1;
4145 for (i
= 0; i
< 2; i
++) {
4146 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4147 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4148 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4149 ddxy_out
, ix_ll
, "");
4150 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4151 ddxy_out
, iy_ll
, "");
4152 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4153 interp_param
, ix_ll
, "");
4154 LLVMValueRef temp1
, temp2
;
4156 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4158 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4160 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4162 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4164 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4166 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4170 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4172 for (chan
= 0; chan
< 4; chan
++) {
4173 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4174 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4176 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4177 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4180 i
= LLVMBuildExtractElement(
4181 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4182 j
= LLVMBuildExtractElement(
4183 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4185 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4188 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4189 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4192 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4193 ctx
->ac
.builder
, gather
, array_idx
, "");
4197 static void vote_all_emit(
4198 const struct lp_build_tgsi_action
*action
,
4199 struct lp_build_tgsi_context
*bld_base
,
4200 struct lp_build_emit_data
*emit_data
)
4202 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4204 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4205 emit_data
->output
[emit_data
->chan
] =
4206 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4209 static void vote_any_emit(
4210 const struct lp_build_tgsi_action
*action
,
4211 struct lp_build_tgsi_context
*bld_base
,
4212 struct lp_build_emit_data
*emit_data
)
4214 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4216 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4217 emit_data
->output
[emit_data
->chan
] =
4218 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4221 static void vote_eq_emit(
4222 const struct lp_build_tgsi_action
*action
,
4223 struct lp_build_tgsi_context
*bld_base
,
4224 struct lp_build_emit_data
*emit_data
)
4226 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4228 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4229 emit_data
->output
[emit_data
->chan
] =
4230 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4233 static void ballot_emit(
4234 const struct lp_build_tgsi_action
*action
,
4235 struct lp_build_tgsi_context
*bld_base
,
4236 struct lp_build_emit_data
*emit_data
)
4238 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4239 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4242 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4243 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4244 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4246 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4247 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4250 static void read_invoc_fetch_args(
4251 struct lp_build_tgsi_context
*bld_base
,
4252 struct lp_build_emit_data
*emit_data
)
4254 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4255 0, emit_data
->src_chan
);
4257 /* Always read the source invocation (= lane) from the X channel. */
4258 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4260 emit_data
->arg_count
= 2;
4263 static void read_lane_emit(
4264 const struct lp_build_tgsi_action
*action
,
4265 struct lp_build_tgsi_context
*bld_base
,
4266 struct lp_build_emit_data
*emit_data
)
4268 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4270 /* We currently have no other way to prevent LLVM from lifting the icmp
4271 * calls to a dominating basic block.
4273 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4275 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4276 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4278 emit_data
->output
[emit_data
->chan
] =
4279 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4280 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4281 AC_FUNC_ATTR_READNONE
|
4282 AC_FUNC_ATTR_CONVERGENT
);
4285 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4286 struct lp_build_emit_data
*emit_data
)
4288 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4289 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4293 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4295 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4296 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4300 /* Emit one vertex from the geometry shader */
4301 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4303 LLVMValueRef
*addrs
)
4305 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4306 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4307 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4308 struct si_shader
*shader
= ctx
->shader
;
4309 struct lp_build_if_state if_state
;
4310 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4311 ctx
->param_gs2vs_offset
);
4312 LLVMValueRef gs_next_vertex
;
4313 LLVMValueRef can_emit
;
4314 unsigned chan
, offset
;
4317 /* Write vertex attribute values to GSVS ring */
4318 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4319 ctx
->gs_next_vertex
[stream
],
4322 /* If this thread has already emitted the declared maximum number of
4323 * vertices, skip the write: excessive vertex emissions are not
4324 * supposed to have any effect.
4326 * If the shader has no writes to memory, kill it instead. This skips
4327 * further memory loads and may allow LLVM to skip to the end
4330 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4331 LLVMConstInt(ctx
->i32
,
4332 shader
->selector
->gs_max_out_vertices
, 0), "");
4334 bool use_kill
= !info
->writes_memory
;
4336 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4338 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4342 for (i
= 0; i
< info
->num_outputs
; i
++) {
4343 for (chan
= 0; chan
< 4; chan
++) {
4344 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4345 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4348 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4349 LLVMValueRef voffset
=
4350 LLVMConstInt(ctx
->i32
, offset
*
4351 shader
->selector
->gs_max_out_vertices
, 0);
4354 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4355 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4357 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4359 ac_build_buffer_store_dword(&ctx
->ac
,
4360 ctx
->gsvs_ring
[stream
],
4362 voffset
, soffset
, 0,
4367 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4370 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4372 /* Signal vertex emission */
4373 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4374 si_get_gs_wave_id(ctx
));
4376 lp_build_endif(&if_state
);
4379 /* Emit one vertex from the geometry shader */
4380 static void si_tgsi_emit_vertex(
4381 const struct lp_build_tgsi_action
*action
,
4382 struct lp_build_tgsi_context
*bld_base
,
4383 struct lp_build_emit_data
*emit_data
)
4385 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4386 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4388 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4391 /* Cut one primitive from the geometry shader */
4392 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4395 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4397 /* Signal primitive cut */
4398 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4399 si_get_gs_wave_id(ctx
));
4402 /* Cut one primitive from the geometry shader */
4403 static void si_tgsi_emit_primitive(
4404 const struct lp_build_tgsi_action
*action
,
4405 struct lp_build_tgsi_context
*bld_base
,
4406 struct lp_build_emit_data
*emit_data
)
4408 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4410 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4413 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4414 struct lp_build_tgsi_context
*bld_base
,
4415 struct lp_build_emit_data
*emit_data
)
4417 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4419 /* SI only (thanks to a hw bug workaround):
4420 * The real barrier instruction isn’t needed, because an entire patch
4421 * always fits into a single wave.
4423 if (ctx
->screen
->info
.chip_class
== SI
&&
4424 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4425 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4429 lp_build_intrinsic(ctx
->ac
.builder
,
4430 "llvm.amdgcn.s.barrier",
4431 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4434 static const struct lp_build_tgsi_action interp_action
= {
4435 .fetch_args
= interp_fetch_args
,
4436 .emit
= build_interp_intrinsic
,
4439 static void si_create_function(struct si_shader_context
*ctx
,
4441 LLVMTypeRef
*returns
, unsigned num_returns
,
4442 struct si_function_info
*fninfo
,
4443 unsigned max_workgroup_size
)
4447 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4448 fninfo
->types
, fninfo
->num_params
);
4449 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4451 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4452 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4454 /* The combination of:
4458 * allows the optimization passes to move loads and reduces
4459 * SGPR spilling significantly.
4461 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4462 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
4463 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4464 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4466 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4469 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4470 if (fninfo
->assign
[i
])
4471 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4474 if (max_workgroup_size
) {
4475 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4476 max_workgroup_size
);
4478 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4479 "no-signed-zeros-fp-math",
4482 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4483 /* These were copied from some LLVM test. */
4484 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4485 "less-precise-fpmad",
4487 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4490 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4493 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4499 static void declare_streamout_params(struct si_shader_context
*ctx
,
4500 struct pipe_stream_output_info
*so
,
4501 struct si_function_info
*fninfo
)
4505 /* Streamout SGPRs. */
4506 if (so
->num_outputs
) {
4507 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4508 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4510 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4512 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4514 /* A streamout buffer offset is loaded if the stride is non-zero. */
4515 for (i
= 0; i
< 4; i
++) {
4519 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4523 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4525 switch (shader
->selector
->type
) {
4526 case PIPE_SHADER_TESS_CTRL
:
4527 /* Return this so that LLVM doesn't remove s_barrier
4528 * instructions on chips where we use s_barrier. */
4529 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4531 case PIPE_SHADER_GEOMETRY
:
4532 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4534 case PIPE_SHADER_COMPUTE
:
4535 break; /* see below */
4541 const unsigned *properties
= shader
->selector
->info
.properties
;
4542 unsigned max_work_group_size
=
4543 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4544 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4545 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4547 if (!max_work_group_size
) {
4548 /* This is a variable group size compute shader,
4549 * compile it for the maximum possible group size.
4551 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4553 return max_work_group_size
;
4556 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4557 struct si_function_info
*fninfo
,
4560 LLVMTypeRef const_shader_buf_type
;
4562 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4563 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4564 const_shader_buf_type
= ctx
->f32
;
4566 const_shader_buf_type
= ctx
->v4i32
;
4568 unsigned const_and_shader_buffers
=
4569 add_arg(fninfo
, ARG_SGPR
,
4570 si_const_array(const_shader_buf_type
, 0));
4572 unsigned samplers_and_images
=
4573 add_arg(fninfo
, ARG_SGPR
,
4574 si_const_array(ctx
->v8i32
,
4575 SI_NUM_IMAGES
+ SI_NUM_SAMPLERS
* 2));
4577 if (assign_params
) {
4578 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4579 ctx
->param_samplers_and_images
= samplers_and_images
;
4583 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4584 struct si_function_info
*fninfo
)
4586 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4587 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
));
4588 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4589 si_const_array(ctx
->v8i32
, 0));
4592 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4593 struct si_function_info
*fninfo
)
4595 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4596 si_const_array(ctx
->v4i32
, SI_NUM_VERTEX_BUFFERS
));
4597 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4598 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4599 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4600 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4603 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4604 struct si_function_info
*fninfo
,
4605 unsigned *num_prolog_vgprs
)
4607 struct si_shader
*shader
= ctx
->shader
;
4609 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4610 if (shader
->key
.as_ls
) {
4611 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4612 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4614 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4615 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4617 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4619 if (!shader
->is_gs_copy_shader
) {
4620 /* Vertex load indices. */
4621 ctx
->param_vertex_index0
= fninfo
->num_params
;
4622 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4623 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4624 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4628 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4629 struct si_function_info
*fninfo
)
4631 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4632 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4633 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4634 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4638 /* Convenient merged shader definitions. */
4639 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4640 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4643 static void create_function(struct si_shader_context
*ctx
)
4645 struct si_shader
*shader
= ctx
->shader
;
4646 struct si_function_info fninfo
;
4647 LLVMTypeRef returns
[16+32*4];
4648 unsigned i
, num_return_sgprs
;
4649 unsigned num_returns
= 0;
4650 unsigned num_prolog_vgprs
= 0;
4651 unsigned type
= ctx
->type
;
4652 unsigned vs_blit_property
=
4653 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4655 si_init_function_info(&fninfo
);
4657 /* Set MERGED shaders. */
4658 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4659 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4660 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4661 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4662 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4665 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4668 case PIPE_SHADER_VERTEX
:
4669 declare_global_desc_pointers(ctx
, &fninfo
);
4671 if (vs_blit_property
) {
4672 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4673 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4674 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4675 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4677 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4678 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4679 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4680 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4681 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4682 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4683 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4684 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4685 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4686 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4687 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4688 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4692 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4696 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4697 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4699 if (shader
->key
.as_es
) {
4700 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4701 } else if (shader
->key
.as_ls
) {
4702 /* no extra parameters */
4704 if (shader
->is_gs_copy_shader
) {
4705 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4706 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4709 /* The locations of the other parameters are assigned dynamically. */
4710 declare_streamout_params(ctx
, &shader
->selector
->so
,
4715 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4718 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4719 declare_global_desc_pointers(ctx
, &fninfo
);
4720 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4721 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4722 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4723 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4724 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4725 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4726 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4727 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4728 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4731 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4732 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4734 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4735 * placed after the user SGPRs.
4737 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4738 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4739 for (i
= 0; i
< 11; i
++)
4740 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4743 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4744 /* Merged stages have 8 system SGPRs at the beginning. */
4745 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_LO_HS */
4746 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_HI_HS */
4747 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4748 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4749 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4750 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4751 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4752 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4754 declare_global_desc_pointers(ctx
, &fninfo
);
4755 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4756 ctx
->type
== PIPE_SHADER_VERTEX
);
4757 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4759 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4760 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4761 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4762 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4763 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4764 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4766 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4767 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4769 /* VGPRs (first TCS, then VS) */
4770 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4771 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4773 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4774 declare_vs_input_vgprs(ctx
, &fninfo
,
4777 /* LS return values are inputs to the TCS main shader part. */
4778 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4779 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4780 for (i
= 0; i
< 2; i
++)
4781 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4783 /* TCS return values are inputs to the TCS epilog.
4785 * param_tcs_offchip_offset, param_tcs_factor_offset,
4786 * param_tcs_offchip_layout, and param_rw_buffers
4787 * should be passed to the epilog.
4789 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4790 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4791 for (i
= 0; i
< 11; i
++)
4792 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4796 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4797 /* Merged stages have 8 system SGPRs at the beginning. */
4798 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_LO_GS) */
4799 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_HI_GS) */
4800 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4801 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4802 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4803 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4804 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4805 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4807 declare_global_desc_pointers(ctx
, &fninfo
);
4808 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4809 (ctx
->type
== PIPE_SHADER_VERTEX
||
4810 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4811 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4812 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4814 /* TESS_EVAL (and also GEOMETRY):
4815 * Declare as many input SGPRs as the VS has. */
4816 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4817 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4818 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4819 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4820 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4821 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4824 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4825 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4827 /* VGPRs (first GS, then VS/TES) */
4828 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4829 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4830 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4831 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4832 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4834 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4835 declare_vs_input_vgprs(ctx
, &fninfo
,
4837 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4838 declare_tes_input_vgprs(ctx
, &fninfo
);
4841 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4842 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4843 /* ES return values are inputs to GS. */
4844 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4845 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4846 for (i
= 0; i
< 5; i
++)
4847 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4851 case PIPE_SHADER_TESS_EVAL
:
4852 declare_global_desc_pointers(ctx
, &fninfo
);
4853 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4854 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4855 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4857 if (shader
->key
.as_es
) {
4858 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4859 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4860 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4862 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4863 declare_streamout_params(ctx
, &shader
->selector
->so
,
4865 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4869 declare_tes_input_vgprs(ctx
, &fninfo
);
4872 case PIPE_SHADER_GEOMETRY
:
4873 declare_global_desc_pointers(ctx
, &fninfo
);
4874 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4875 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4876 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4879 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4880 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4881 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4882 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4883 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4884 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4885 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4886 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4889 case PIPE_SHADER_FRAGMENT
:
4890 declare_global_desc_pointers(ctx
, &fninfo
);
4891 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4892 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4893 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->i32
, SI_PARAM_PRIM_MASK
);
4895 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4896 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4897 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4898 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4899 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4900 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4901 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4902 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4903 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4904 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4905 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4906 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4907 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4908 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4909 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4910 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4911 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4912 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4913 shader
->info
.face_vgpr_index
= 20;
4914 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4915 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4916 shader
->info
.ancillary_vgpr_index
= 21;
4917 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4918 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4919 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4921 /* Color inputs from the prolog. */
4922 if (shader
->selector
->info
.colors_read
) {
4923 unsigned num_color_elements
=
4924 util_bitcount(shader
->selector
->info
.colors_read
);
4926 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4927 for (i
= 0; i
< num_color_elements
; i
++)
4928 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4930 num_prolog_vgprs
+= num_color_elements
;
4933 /* Outputs for the epilog. */
4934 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4937 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4938 shader
->selector
->info
.writes_z
+
4939 shader
->selector
->info
.writes_stencil
+
4940 shader
->selector
->info
.writes_samplemask
+
4941 1 /* SampleMaskIn */;
4943 num_returns
= MAX2(num_returns
,
4945 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4947 for (i
= 0; i
< num_return_sgprs
; i
++)
4948 returns
[i
] = ctx
->i32
;
4949 for (; i
< num_returns
; i
++)
4950 returns
[i
] = ctx
->f32
;
4953 case PIPE_SHADER_COMPUTE
:
4954 declare_global_desc_pointers(ctx
, &fninfo
);
4955 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4956 if (shader
->selector
->info
.uses_grid_size
)
4957 ctx
->param_grid_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4958 if (shader
->selector
->info
.uses_block_size
)
4959 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4961 for (i
= 0; i
< 3; i
++) {
4962 ctx
->param_block_id
[i
] = -1;
4963 if (shader
->selector
->info
.uses_block_id
[i
])
4964 ctx
->param_block_id
[i
] = add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4967 ctx
->param_thread_id
= add_arg(&fninfo
, ARG_VGPR
, v3i32
);
4970 assert(0 && "unimplemented shader");
4974 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4975 si_get_max_workgroup_size(shader
));
4977 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4978 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4979 ctx
->separate_prolog
) {
4980 si_llvm_add_attribute(ctx
->main_fn
,
4981 "InitialPSInputAddr",
4982 S_0286D0_PERSP_SAMPLE_ENA(1) |
4983 S_0286D0_PERSP_CENTER_ENA(1) |
4984 S_0286D0_PERSP_CENTROID_ENA(1) |
4985 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4986 S_0286D0_LINEAR_CENTER_ENA(1) |
4987 S_0286D0_LINEAR_CENTROID_ENA(1) |
4988 S_0286D0_FRONT_FACE_ENA(1) |
4989 S_0286D0_ANCILLARY_ENA(1) |
4990 S_0286D0_POS_FIXED_PT_ENA(1));
4993 shader
->info
.num_input_sgprs
= 0;
4994 shader
->info
.num_input_vgprs
= 0;
4996 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4997 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4999 for (; i
< fninfo
.num_params
; ++i
)
5000 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5002 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5003 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5005 if (shader
->key
.as_ls
||
5006 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5007 /* GFX9 has the ESGS ring buffer in LDS. */
5008 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
5009 ac_declare_lds_as_pointer(&ctx
->ac
);
5013 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5016 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5018 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5020 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5021 ctx
->param_rw_buffers
);
5023 if (ctx
->screen
->info
.chip_class
<= VI
&&
5024 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
5026 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5028 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5031 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5034 if (ctx
->shader
->is_gs_copy_shader
) {
5035 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5038 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5039 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5040 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5041 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5042 LLVMValueRef base_ring
;
5044 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5046 /* The conceptual layout of the GSVS ring is
5047 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5048 * but the real memory layout is swizzled across
5050 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5052 * Override the buffer descriptor accordingly.
5054 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5055 uint64_t stream_offset
= 0;
5057 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5058 unsigned num_components
;
5060 unsigned num_records
;
5061 LLVMValueRef ring
, tmp
;
5063 num_components
= sel
->info
.num_stream_output_components
[stream
];
5064 if (!num_components
)
5067 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5069 /* Limit on the stride field for <= CIK. */
5070 assert(stride
< (1 << 14));
5074 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5075 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5076 tmp
= LLVMBuildAdd(builder
, tmp
,
5077 LLVMConstInt(ctx
->i64
,
5078 stream_offset
, 0), "");
5079 stream_offset
+= stride
* 64;
5081 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5082 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5083 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5084 tmp
= LLVMBuildOr(builder
, tmp
,
5085 LLVMConstInt(ctx
->i32
,
5086 S_008F04_STRIDE(stride
) |
5087 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5088 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5089 ring
= LLVMBuildInsertElement(builder
, ring
,
5090 LLVMConstInt(ctx
->i32
, num_records
, 0),
5091 LLVMConstInt(ctx
->i32
, 2, 0), "");
5092 ring
= LLVMBuildInsertElement(builder
, ring
,
5093 LLVMConstInt(ctx
->i32
,
5094 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5095 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5096 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5097 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5098 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5099 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5100 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5101 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5102 S_008F0C_ADD_TID_ENABLE(1),
5104 LLVMConstInt(ctx
->i32
, 3, 0), "");
5106 ctx
->gsvs_ring
[stream
] = ring
;
5111 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5112 LLVMValueRef param_rw_buffers
,
5113 unsigned param_pos_fixed_pt
)
5115 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5116 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5118 /* Use the fixed-point gl_FragCoord input.
5119 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5120 * per coordinate to get the repeating effect.
5122 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5123 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5125 /* Load the buffer descriptor. */
5126 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5127 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5129 /* The stipple pattern is 32x32, each row has 32 bits. */
5130 offset
= LLVMBuildMul(builder
, address
[1],
5131 LLVMConstInt(ctx
->i32
, 4, 0), "");
5132 row
= buffer_load_const(ctx
, desc
, offset
);
5133 row
= ac_to_integer(&ctx
->ac
, row
);
5134 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5135 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5136 ac_build_kill_if_false(&ctx
->ac
, bit
);
5139 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5140 struct si_shader_config
*conf
,
5141 unsigned symbol_offset
)
5144 const unsigned char *config
=
5145 ac_shader_binary_config_start(binary
, symbol_offset
);
5146 bool really_needs_scratch
= false;
5148 /* LLVM adds SGPR spills to the scratch size.
5149 * Find out if we really need the scratch buffer.
5151 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5152 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5154 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5155 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5156 really_needs_scratch
= true;
5161 /* XXX: We may be able to emit some of these values directly rather than
5162 * extracting fields to be emitted later.
5165 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5166 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5167 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5169 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5170 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5171 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5172 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5173 case R_00B848_COMPUTE_PGM_RSRC1
:
5174 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5175 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5176 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5177 conf
->rsrc1
= value
;
5179 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5180 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5182 case R_00B84C_COMPUTE_PGM_RSRC2
:
5183 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5184 conf
->rsrc2
= value
;
5186 case R_0286CC_SPI_PS_INPUT_ENA
:
5187 conf
->spi_ps_input_ena
= value
;
5189 case R_0286D0_SPI_PS_INPUT_ADDR
:
5190 conf
->spi_ps_input_addr
= value
;
5192 case R_0286E8_SPI_TMPRING_SIZE
:
5193 case R_00B860_COMPUTE_TMPRING_SIZE
:
5194 /* WAVESIZE is in units of 256 dwords. */
5195 if (really_needs_scratch
)
5196 conf
->scratch_bytes_per_wave
=
5197 G_00B860_WAVESIZE(value
) * 256 * 4;
5199 case 0x4: /* SPILLED_SGPRS */
5200 conf
->spilled_sgprs
= value
;
5202 case 0x8: /* SPILLED_VGPRS */
5203 conf
->spilled_vgprs
= value
;
5207 static bool printed
;
5210 fprintf(stderr
, "Warning: LLVM emitted unknown "
5211 "config register: 0x%x\n", reg
);
5219 if (!conf
->spi_ps_input_addr
)
5220 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5223 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5224 uint64_t scratch_va
)
5227 uint32_t scratch_rsrc_dword0
= scratch_va
;
5228 uint32_t scratch_rsrc_dword1
=
5229 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5231 /* Enable scratch coalescing. */
5232 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5234 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5235 const struct ac_shader_reloc
*reloc
=
5236 &shader
->binary
.relocs
[i
];
5237 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5238 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5239 &scratch_rsrc_dword0
, 4);
5240 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5241 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5242 &scratch_rsrc_dword1
, 4);
5247 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5249 unsigned size
= shader
->binary
.code_size
;
5252 size
+= shader
->prolog
->binary
.code_size
;
5253 if (shader
->previous_stage
)
5254 size
+= shader
->previous_stage
->binary
.code_size
;
5255 if (shader
->prolog2
)
5256 size
+= shader
->prolog2
->binary
.code_size
;
5258 size
+= shader
->epilog
->binary
.code_size
;
5262 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5264 const struct ac_shader_binary
*prolog
=
5265 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5266 const struct ac_shader_binary
*previous_stage
=
5267 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5268 const struct ac_shader_binary
*prolog2
=
5269 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5270 const struct ac_shader_binary
*epilog
=
5271 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5272 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5273 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5274 (!epilog
? mainb
->rodata_size
: 0);
5277 assert(!prolog
|| !prolog
->rodata_size
);
5278 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5279 assert(!prolog2
|| !prolog2
->rodata_size
);
5280 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5281 !mainb
->rodata_size
);
5282 assert(!epilog
|| !epilog
->rodata_size
);
5284 r600_resource_reference(&shader
->bo
, NULL
);
5285 shader
->bo
= (struct r600_resource
*)
5286 si_aligned_buffer_create(&sscreen
->b
,
5287 sscreen
->cpdma_prefetch_writes_memory
?
5288 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5289 PIPE_USAGE_IMMUTABLE
,
5290 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5296 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5297 PIPE_TRANSFER_READ_WRITE
|
5298 PIPE_TRANSFER_UNSYNCHRONIZED
);
5300 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5301 * endian-independent. */
5303 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5304 ptr
+= prolog
->code_size
;
5306 if (previous_stage
) {
5307 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5308 ptr
+= previous_stage
->code_size
;
5311 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5312 ptr
+= prolog2
->code_size
;
5315 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5316 ptr
+= mainb
->code_size
;
5319 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5320 else if (mainb
->rodata_size
> 0)
5321 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5323 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5327 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5328 struct pipe_debug_callback
*debug
,
5329 const char *name
, FILE *file
)
5334 if (binary
->disasm_string
) {
5335 fprintf(file
, "Shader %s disassembly:\n", name
);
5336 fprintf(file
, "%s", binary
->disasm_string
);
5338 if (debug
&& debug
->debug_message
) {
5339 /* Very long debug messages are cut off, so send the
5340 * disassembly one line at a time. This causes more
5341 * overhead, but on the plus side it simplifies
5342 * parsing of resulting logs.
5344 pipe_debug_message(debug
, SHADER_INFO
,
5345 "Shader Disassembly Begin");
5347 line
= binary
->disasm_string
;
5349 p
= util_strchrnul(line
, '\n');
5353 pipe_debug_message(debug
, SHADER_INFO
,
5354 "%.*s", count
, line
);
5362 pipe_debug_message(debug
, SHADER_INFO
,
5363 "Shader Disassembly End");
5366 fprintf(file
, "Shader %s binary:\n", name
);
5367 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5368 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5369 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5370 binary
->code
[i
+ 1], binary
->code
[i
]);
5375 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5376 const struct si_shader
*shader
,
5377 struct pipe_debug_callback
*debug
,
5380 bool check_debug_option
)
5382 const struct si_shader_config
*conf
= &shader
->config
;
5383 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
5384 unsigned code_size
= si_get_shader_binary_size(shader
);
5385 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5386 unsigned lds_per_wave
= 0;
5387 unsigned max_simd_waves
;
5389 switch (sscreen
->info
.family
) {
5390 /* These always have 8 waves: */
5391 case CHIP_POLARIS10
:
5392 case CHIP_POLARIS11
:
5393 case CHIP_POLARIS12
:
5397 max_simd_waves
= 10;
5400 /* Compute LDS usage for PS. */
5401 switch (processor
) {
5402 case PIPE_SHADER_FRAGMENT
:
5403 /* The minimum usage per wave is (num_inputs * 48). The maximum
5404 * usage is (num_inputs * 48 * 16).
5405 * We can get anything in between and it varies between waves.
5407 * The 48 bytes per input for a single primitive is equal to
5408 * 4 bytes/component * 4 components/input * 3 points.
5410 * Other stages don't know the size at compile time or don't
5411 * allocate LDS per wave, but instead they do it per thread group.
5413 lds_per_wave
= conf
->lds_size
* lds_increment
+
5414 align(num_inputs
* 48, lds_increment
);
5416 case PIPE_SHADER_COMPUTE
:
5417 if (shader
->selector
) {
5418 unsigned max_workgroup_size
=
5419 si_get_max_workgroup_size(shader
);
5420 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5421 DIV_ROUND_UP(max_workgroup_size
, 64);
5426 /* Compute the per-SIMD wave counts. */
5427 if (conf
->num_sgprs
) {
5428 if (sscreen
->info
.chip_class
>= VI
)
5429 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5431 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5434 if (conf
->num_vgprs
)
5435 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5437 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5438 * 16KB makes some SIMDs unoccupied). */
5440 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5442 if (!check_debug_option
||
5443 si_can_dump_shader(sscreen
, processor
)) {
5444 if (processor
== PIPE_SHADER_FRAGMENT
) {
5445 fprintf(file
, "*** SHADER CONFIG ***\n"
5446 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5447 "SPI_PS_INPUT_ENA = 0x%04x\n",
5448 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5451 fprintf(file
, "*** SHADER STATS ***\n"
5454 "Spilled SGPRs: %d\n"
5455 "Spilled VGPRs: %d\n"
5456 "Private memory VGPRs: %d\n"
5457 "Code Size: %d bytes\n"
5459 "Scratch: %d bytes per wave\n"
5461 "********************\n\n\n",
5462 conf
->num_sgprs
, conf
->num_vgprs
,
5463 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5464 conf
->private_mem_vgprs
, code_size
,
5465 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5469 pipe_debug_message(debug
, SHADER_INFO
,
5470 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5471 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5472 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5473 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
5474 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5475 max_simd_waves
, conf
->spilled_sgprs
,
5476 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5479 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5481 switch (processor
) {
5482 case PIPE_SHADER_VERTEX
:
5483 if (shader
->key
.as_es
)
5484 return "Vertex Shader as ES";
5485 else if (shader
->key
.as_ls
)
5486 return "Vertex Shader as LS";
5488 return "Vertex Shader as VS";
5489 case PIPE_SHADER_TESS_CTRL
:
5490 return "Tessellation Control Shader";
5491 case PIPE_SHADER_TESS_EVAL
:
5492 if (shader
->key
.as_es
)
5493 return "Tessellation Evaluation Shader as ES";
5495 return "Tessellation Evaluation Shader as VS";
5496 case PIPE_SHADER_GEOMETRY
:
5497 if (shader
->is_gs_copy_shader
)
5498 return "GS Copy Shader as VS";
5500 return "Geometry Shader";
5501 case PIPE_SHADER_FRAGMENT
:
5502 return "Pixel Shader";
5503 case PIPE_SHADER_COMPUTE
:
5504 return "Compute Shader";
5506 return "Unknown Shader";
5510 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5511 struct pipe_debug_callback
*debug
, unsigned processor
,
5512 FILE *file
, bool check_debug_option
)
5514 if (!check_debug_option
||
5515 si_can_dump_shader(sscreen
, processor
))
5516 si_dump_shader_key(processor
, shader
, file
);
5518 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5519 if (shader
->previous_stage
&&
5520 shader
->previous_stage
->binary
.llvm_ir_string
) {
5521 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5522 si_get_shader_name(shader
, processor
));
5523 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5526 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5527 si_get_shader_name(shader
, processor
));
5528 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5531 if (!check_debug_option
||
5532 (si_can_dump_shader(sscreen
, processor
) &&
5533 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5534 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5537 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5538 debug
, "prolog", file
);
5539 if (shader
->previous_stage
)
5540 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5541 debug
, "previous stage", file
);
5542 if (shader
->prolog2
)
5543 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5544 debug
, "prolog2", file
);
5546 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5549 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5550 debug
, "epilog", file
);
5551 fprintf(file
, "\n");
5554 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
5555 check_debug_option
);
5558 static int si_compile_llvm(struct si_screen
*sscreen
,
5559 struct ac_shader_binary
*binary
,
5560 struct si_shader_config
*conf
,
5561 LLVMTargetMachineRef tm
,
5563 struct pipe_debug_callback
*debug
,
5568 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5570 if (si_can_dump_shader(sscreen
, processor
)) {
5571 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5573 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5574 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5575 ac_dump_module(mod
);
5576 fprintf(stderr
, "\n");
5580 if (sscreen
->record_llvm_ir
) {
5581 char *ir
= LLVMPrintModuleToString(mod
);
5582 binary
->llvm_ir_string
= strdup(ir
);
5583 LLVMDisposeMessage(ir
);
5586 if (!si_replace_shader(count
, binary
)) {
5587 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5592 si_shader_binary_read_config(binary
, conf
, 0);
5594 /* Enable 64-bit and 16-bit denormals, because there is no performance
5597 * If denormals are enabled, all floating-point output modifiers are
5600 * Don't enable denormals for 32-bit floats, because:
5601 * - Floating-point output modifiers would be ignored by the hw.
5602 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5603 * have to stop using those.
5604 * - SI & CI would be very slow.
5606 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5608 FREE(binary
->config
);
5609 FREE(binary
->global_symbol_offsets
);
5610 binary
->config
= NULL
;
5611 binary
->global_symbol_offsets
= NULL
;
5613 /* Some shaders can't have rodata because their binaries can be
5616 if (binary
->rodata_size
&&
5617 (processor
== PIPE_SHADER_VERTEX
||
5618 processor
== PIPE_SHADER_TESS_CTRL
||
5619 processor
== PIPE_SHADER_TESS_EVAL
||
5620 processor
== PIPE_SHADER_FRAGMENT
)) {
5621 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5628 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5630 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5631 LLVMBuildRetVoid(ctx
->ac
.builder
);
5633 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5636 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5638 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5639 LLVMTargetMachineRef tm
,
5640 struct si_shader_selector
*gs_selector
,
5641 struct pipe_debug_callback
*debug
)
5643 struct si_shader_context ctx
;
5644 struct si_shader
*shader
;
5645 LLVMBuilderRef builder
;
5646 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5647 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5648 struct si_shader_output_values
*outputs
;
5649 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5652 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5657 shader
= CALLOC_STRUCT(si_shader
);
5663 /* We can leave the fence as permanently signaled because the GS copy
5664 * shader only becomes visible globally after it has been compiled. */
5665 util_queue_fence_init(&shader
->ready
);
5667 shader
->selector
= gs_selector
;
5668 shader
->is_gs_copy_shader
= true;
5670 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5671 ctx
.shader
= shader
;
5672 ctx
.type
= PIPE_SHADER_VERTEX
;
5674 builder
= ctx
.ac
.builder
;
5676 create_function(&ctx
);
5677 preload_ring_buffers(&ctx
);
5679 LLVMValueRef voffset
=
5680 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5682 /* Fetch the vertex stream ID.*/
5683 LLVMValueRef stream_id
;
5685 if (gs_selector
->so
.num_outputs
)
5686 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5688 stream_id
= ctx
.i32_0
;
5690 /* Fill in output information. */
5691 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5692 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5693 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5695 for (int chan
= 0; chan
< 4; chan
++) {
5696 outputs
[i
].vertex_stream
[chan
] =
5697 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5701 LLVMBasicBlockRef end_bb
;
5702 LLVMValueRef switch_inst
;
5704 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5705 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5707 for (int stream
= 0; stream
< 4; stream
++) {
5708 LLVMBasicBlockRef bb
;
5711 if (!gsinfo
->num_stream_output_components
[stream
])
5714 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5717 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5718 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5719 LLVMPositionBuilderAtEnd(builder
, bb
);
5721 /* Fetch vertex data from GSVS ring */
5723 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5724 for (unsigned chan
= 0; chan
< 4; chan
++) {
5725 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5726 outputs
[i
].vertex_stream
[chan
] != stream
) {
5727 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5731 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5732 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5735 outputs
[i
].values
[chan
] =
5736 ac_build_buffer_load(&ctx
.ac
,
5737 ctx
.gsvs_ring
[0], 1,
5744 /* Streamout and exports. */
5745 if (gs_selector
->so
.num_outputs
) {
5746 si_llvm_emit_streamout(&ctx
, outputs
,
5747 gsinfo
->num_outputs
,
5752 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5754 LLVMBuildBr(builder
, end_bb
);
5757 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5759 LLVMBuildRetVoid(ctx
.ac
.builder
);
5761 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5762 si_llvm_optimize_module(&ctx
);
5764 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5765 &ctx
.shader
->config
, ctx
.tm
,
5767 debug
, PIPE_SHADER_GEOMETRY
,
5770 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5771 fprintf(stderr
, "GS Copy Shader:\n");
5772 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5773 PIPE_SHADER_GEOMETRY
, stderr
, true);
5774 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5777 si_llvm_dispose(&ctx
);
5788 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5789 const struct si_vs_prolog_bits
*prolog
,
5790 const char *prefix
, FILE *f
)
5792 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5793 prefix
, prolog
->instance_divisor_is_one
);
5794 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5795 prefix
, prolog
->instance_divisor_is_fetched
);
5796 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5797 prefix
, prolog
->ls_vgpr_fix
);
5799 fprintf(f
, " mono.vs.fix_fetch = {");
5800 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5801 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5805 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5808 const struct si_shader_key
*key
= &shader
->key
;
5810 fprintf(f
, "SHADER KEY\n");
5812 switch (processor
) {
5813 case PIPE_SHADER_VERTEX
:
5814 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5815 "part.vs.prolog", f
);
5816 fprintf(f
, " as_es = %u\n", key
->as_es
);
5817 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5818 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5819 key
->mono
.u
.vs_export_prim_id
);
5822 case PIPE_SHADER_TESS_CTRL
:
5823 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5824 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5825 "part.tcs.ls_prolog", f
);
5827 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5828 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5831 case PIPE_SHADER_TESS_EVAL
:
5832 fprintf(f
, " as_es = %u\n", key
->as_es
);
5833 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5834 key
->mono
.u
.vs_export_prim_id
);
5837 case PIPE_SHADER_GEOMETRY
:
5838 if (shader
->is_gs_copy_shader
)
5841 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5842 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5843 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5844 "part.gs.vs_prolog", f
);
5846 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5849 case PIPE_SHADER_COMPUTE
:
5852 case PIPE_SHADER_FRAGMENT
:
5853 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5854 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5855 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5856 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5857 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5858 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5859 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5860 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5861 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5862 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5863 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5864 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5865 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5866 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5867 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5868 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5869 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5876 if ((processor
== PIPE_SHADER_GEOMETRY
||
5877 processor
== PIPE_SHADER_TESS_EVAL
||
5878 processor
== PIPE_SHADER_VERTEX
) &&
5879 !key
->as_es
&& !key
->as_ls
) {
5880 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5881 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5885 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5886 struct si_screen
*sscreen
,
5887 LLVMTargetMachineRef tm
)
5889 struct lp_build_tgsi_context
*bld_base
;
5891 si_llvm_context_init(ctx
, sscreen
, tm
);
5893 bld_base
= &ctx
->bld_base
;
5894 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5896 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5897 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5898 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5900 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5902 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5904 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5905 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5906 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5907 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5909 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5910 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5911 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5912 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5913 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5914 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5915 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5916 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5917 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5919 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5920 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5921 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5924 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5926 struct si_shader
*shader
= ctx
->shader
;
5927 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5929 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5930 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5931 shader
->key
.as_ls
||
5935 ac_optimize_vs_outputs(&ctx
->ac
,
5937 shader
->info
.vs_output_param_offset
,
5939 &shader
->info
.nr_param_exports
);
5942 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5944 ctx
->shader
->config
.private_mem_vgprs
= 0;
5946 /* Process all LLVM instructions. */
5947 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5949 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5952 LLVMValueRef inst
= next
;
5953 next
= LLVMGetNextInstruction(next
);
5955 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5958 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5959 /* No idea why LLVM aligns allocas to 4 elements. */
5960 unsigned alignment
= LLVMGetAlignment(inst
);
5961 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5962 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5964 bb
= LLVMGetNextBasicBlock(bb
);
5968 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5969 unsigned param
, unsigned bitoffset
)
5971 LLVMValueRef args
[] = {
5972 LLVMGetParam(ctx
->main_fn
, param
),
5973 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5975 lp_build_intrinsic(ctx
->ac
.builder
,
5976 "llvm.amdgcn.init.exec.from.input",
5977 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5980 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5981 const struct si_vs_prolog_bits
*key
)
5983 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5985 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5988 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5991 struct si_shader
*shader
= ctx
->shader
;
5992 struct si_shader_selector
*sel
= shader
->selector
;
5993 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5995 // TODO clean all this up!
5996 switch (ctx
->type
) {
5997 case PIPE_SHADER_VERTEX
:
5998 ctx
->load_input
= declare_input_vs
;
5999 if (shader
->key
.as_ls
)
6000 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6001 else if (shader
->key
.as_es
)
6002 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6004 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6005 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6007 case PIPE_SHADER_TESS_CTRL
:
6008 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6009 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6010 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6011 bld_base
->emit_store
= store_output_tcs
;
6012 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6013 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6014 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6015 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6017 case PIPE_SHADER_TESS_EVAL
:
6018 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6019 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6020 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6021 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6022 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6023 if (shader
->key
.as_es
)
6024 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6026 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6027 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6029 case PIPE_SHADER_GEOMETRY
:
6030 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6031 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6032 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6033 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6034 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6035 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6037 case PIPE_SHADER_FRAGMENT
:
6038 ctx
->load_input
= declare_input_fs
;
6039 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6040 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6042 case PIPE_SHADER_COMPUTE
:
6045 assert(!"Unsupported shader type");
6049 ctx
->abi
.load_ubo
= load_ubo
;
6050 ctx
->abi
.load_ssbo
= load_ssbo
;
6052 create_function(ctx
);
6053 preload_ring_buffers(ctx
);
6055 /* For GFX9 merged shaders:
6056 * - Set EXEC for the first shader. If the prolog is present, set
6057 * EXEC there instead.
6058 * - Add a barrier before the second shader.
6059 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6060 * an if-statement. This is required for correctness in geometry
6061 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6064 * For monolithic merged shaders, the first shader is wrapped in an
6065 * if-block together with its prolog in si_build_wrapper_function.
6067 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6068 if (!is_monolithic
&&
6069 sel
->info
.num_instructions
> 1 && /* not empty shader */
6070 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6071 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6072 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6073 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6074 si_init_exec_from_input(ctx
,
6075 ctx
->param_merged_wave_info
, 0);
6076 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6077 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6079 ac_init_exec_full_mask(&ctx
->ac
);
6081 /* The barrier must execute for all shaders in a
6084 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6086 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6088 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6089 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6090 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6094 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6095 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6096 for (unsigned i
= 0; i
< 6; i
++) {
6097 ctx
->invoc0_tess_factors
[i
] =
6098 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6102 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6104 for (i
= 0; i
< 4; i
++) {
6105 ctx
->gs_next_vertex
[i
] =
6106 lp_build_alloca(&ctx
->gallivm
,
6111 if (sel
->force_correct_derivs_after_kill
) {
6112 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6113 /* true = don't kill. */
6114 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6115 ctx
->postponed_kill
);
6119 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6120 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6124 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6125 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6130 si_llvm_build_ret(ctx
, ctx
->return_value
);
6135 * Compute the VS prolog key, which contains all the information needed to
6136 * build the VS prolog function, and set shader->info bits where needed.
6138 * \param info Shader info of the vertex shader.
6139 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6140 * \param prolog_key Key of the VS prolog
6141 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6142 * \param key Output shader part key.
6144 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6145 unsigned num_input_sgprs
,
6146 const struct si_vs_prolog_bits
*prolog_key
,
6147 struct si_shader
*shader_out
,
6148 union si_shader_part_key
*key
)
6150 memset(key
, 0, sizeof(*key
));
6151 key
->vs_prolog
.states
= *prolog_key
;
6152 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6153 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6154 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6155 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6157 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6158 key
->vs_prolog
.as_ls
= 1;
6159 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6160 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6161 key
->vs_prolog
.as_es
= 1;
6162 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6165 /* Enable loading the InstanceID VGPR. */
6166 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6168 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6169 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6170 shader_out
->info
.uses_instanceid
= true;
6174 * Compute the PS prolog key, which contains all the information needed to
6175 * build the PS prolog function, and set related bits in shader->config.
6177 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6178 union si_shader_part_key
*key
,
6179 bool separate_prolog
)
6181 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6183 memset(key
, 0, sizeof(*key
));
6184 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6185 key
->ps_prolog
.colors_read
= info
->colors_read
;
6186 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6187 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6188 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6189 (key
->ps_prolog
.colors_read
||
6190 key
->ps_prolog
.states
.force_persp_sample_interp
||
6191 key
->ps_prolog
.states
.force_linear_sample_interp
||
6192 key
->ps_prolog
.states
.force_persp_center_interp
||
6193 key
->ps_prolog
.states
.force_linear_center_interp
||
6194 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6195 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6196 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6198 if (info
->colors_read
) {
6199 unsigned *color
= shader
->selector
->color_attr_index
;
6201 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6202 /* BCOLORs are stored after the last input. */
6203 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6204 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6205 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6208 for (unsigned i
= 0; i
< 2; i
++) {
6209 unsigned interp
= info
->input_interpolate
[color
[i
]];
6210 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6212 if (!(info
->colors_read
& (0xf << i
*4)))
6215 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6217 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6218 interp
== TGSI_INTERPOLATE_COLOR
)
6219 interp
= TGSI_INTERPOLATE_CONSTANT
;
6222 case TGSI_INTERPOLATE_CONSTANT
:
6223 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6225 case TGSI_INTERPOLATE_PERSPECTIVE
:
6226 case TGSI_INTERPOLATE_COLOR
:
6227 /* Force the interpolation location for colors here. */
6228 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6229 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6230 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6231 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6234 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6235 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6236 shader
->config
.spi_ps_input_ena
|=
6237 S_0286CC_PERSP_SAMPLE_ENA(1);
6239 case TGSI_INTERPOLATE_LOC_CENTER
:
6240 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6241 shader
->config
.spi_ps_input_ena
|=
6242 S_0286CC_PERSP_CENTER_ENA(1);
6244 case TGSI_INTERPOLATE_LOC_CENTROID
:
6245 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6246 shader
->config
.spi_ps_input_ena
|=
6247 S_0286CC_PERSP_CENTROID_ENA(1);
6253 case TGSI_INTERPOLATE_LINEAR
:
6254 /* Force the interpolation location for colors here. */
6255 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6256 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6257 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6258 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6260 /* The VGPR assignment for non-monolithic shaders
6261 * works because InitialPSInputAddr is set on the
6262 * main shader and PERSP_PULL_MODEL is never used.
6265 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6266 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6267 separate_prolog
? 6 : 9;
6268 shader
->config
.spi_ps_input_ena
|=
6269 S_0286CC_LINEAR_SAMPLE_ENA(1);
6271 case TGSI_INTERPOLATE_LOC_CENTER
:
6272 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6273 separate_prolog
? 8 : 11;
6274 shader
->config
.spi_ps_input_ena
|=
6275 S_0286CC_LINEAR_CENTER_ENA(1);
6277 case TGSI_INTERPOLATE_LOC_CENTROID
:
6278 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6279 separate_prolog
? 10 : 13;
6280 shader
->config
.spi_ps_input_ena
|=
6281 S_0286CC_LINEAR_CENTROID_ENA(1);
6295 * Check whether a PS prolog is required based on the key.
6297 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6299 return key
->ps_prolog
.colors_read
||
6300 key
->ps_prolog
.states
.force_persp_sample_interp
||
6301 key
->ps_prolog
.states
.force_linear_sample_interp
||
6302 key
->ps_prolog
.states
.force_persp_center_interp
||
6303 key
->ps_prolog
.states
.force_linear_center_interp
||
6304 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6305 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6306 key
->ps_prolog
.states
.poly_stipple
||
6307 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6311 * Compute the PS epilog key, which contains all the information needed to
6312 * build the PS epilog function.
6314 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6315 union si_shader_part_key
*key
)
6317 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6318 memset(key
, 0, sizeof(*key
));
6319 key
->ps_epilog
.colors_written
= info
->colors_written
;
6320 key
->ps_epilog
.writes_z
= info
->writes_z
;
6321 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6322 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6323 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6327 * Build the GS prolog function. Rotate the input vertices for triangle strips
6330 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6331 union si_shader_part_key
*key
)
6333 unsigned num_sgprs
, num_vgprs
;
6334 struct si_function_info fninfo
;
6335 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6336 LLVMTypeRef returns
[48];
6337 LLVMValueRef func
, ret
;
6339 si_init_function_info(&fninfo
);
6341 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6342 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
6343 num_vgprs
= 5; /* ES inputs are not needed by GS */
6345 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6349 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6350 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6351 returns
[i
] = ctx
->i32
;
6354 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6355 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6356 returns
[num_sgprs
+ i
] = ctx
->f32
;
6359 /* Create the function. */
6360 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6362 func
= ctx
->main_fn
;
6364 /* Set the full EXEC mask for the prolog, because we are only fiddling
6365 * with registers here. The main shader part will set the correct EXEC
6368 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6369 ac_init_exec_full_mask(&ctx
->ac
);
6371 /* Copy inputs to outputs. This should be no-op, as the registers match,
6372 * but it will prevent the compiler from overwriting them unintentionally.
6374 ret
= ctx
->return_value
;
6375 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6376 LLVMValueRef p
= LLVMGetParam(func
, i
);
6377 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6379 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6380 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6381 p
= ac_to_float(&ctx
->ac
, p
);
6382 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6385 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6386 /* Remap the input vertices for every other primitive. */
6387 const unsigned gfx6_vtx_params
[6] = {
6395 const unsigned gfx9_vtx_params
[3] = {
6400 LLVMValueRef vtx_in
[6], vtx_out
[6];
6401 LLVMValueRef prim_id
, rotate
;
6403 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6404 for (unsigned i
= 0; i
< 3; i
++) {
6405 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6406 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6409 for (unsigned i
= 0; i
< 6; i
++)
6410 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6413 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6414 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6416 for (unsigned i
= 0; i
< 6; ++i
) {
6417 LLVMValueRef base
, rotated
;
6419 rotated
= vtx_in
[(i
+ 4) % 6];
6420 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6423 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6424 for (unsigned i
= 0; i
< 3; i
++) {
6425 LLVMValueRef hi
, out
;
6427 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6428 LLVMConstInt(ctx
->i32
, 16, 0), "");
6429 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6430 out
= ac_to_float(&ctx
->ac
, out
);
6431 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6432 gfx9_vtx_params
[i
], "");
6435 for (unsigned i
= 0; i
< 6; i
++) {
6438 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6439 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6440 gfx6_vtx_params
[i
], "");
6445 LLVMBuildRet(builder
, ret
);
6449 * Given a list of shader part functions, build a wrapper function that
6450 * runs them in sequence to form a monolithic shader.
6452 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6453 LLVMValueRef
*parts
,
6456 unsigned next_shader_first_part
)
6458 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6459 /* PS epilog has one arg per color component; gfx9 merged shader
6460 * prologs need to forward 32 user SGPRs.
6462 struct si_function_info fninfo
;
6463 LLVMValueRef initial
[64], out
[64];
6464 LLVMTypeRef function_type
;
6465 unsigned num_first_params
;
6466 unsigned num_out
, initial_num_out
;
6467 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6468 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6469 unsigned num_sgprs
, num_vgprs
;
6471 struct lp_build_if_state if_state
;
6473 si_init_function_info(&fninfo
);
6475 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6476 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6477 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6480 /* The parameters of the wrapper function correspond to those of the
6481 * first part in terms of SGPRs and VGPRs, but we use the types of the
6482 * main part to get the right types. This is relevant for the
6483 * dereferenceable attribute on descriptor table pointers.
6488 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6489 num_first_params
= LLVMCountParamTypes(function_type
);
6491 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6492 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6494 if (ac_is_sgpr_param(param
)) {
6495 assert(num_vgprs
== 0);
6496 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6498 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6503 while (gprs
< num_sgprs
+ num_vgprs
) {
6504 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6505 LLVMTypeRef type
= LLVMTypeOf(param
);
6506 unsigned size
= ac_get_type_size(type
) / 4;
6508 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6510 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6511 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6512 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6517 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6518 si_get_max_workgroup_size(ctx
->shader
));
6520 if (is_merged_shader(ctx
->shader
))
6521 ac_init_exec_full_mask(&ctx
->ac
);
6523 /* Record the arguments of the function as if they were an output of
6529 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6530 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6531 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6532 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6533 unsigned size
= ac_get_type_size(param_type
) / 4;
6536 if (param_type
!= out_type
)
6537 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6538 out
[num_out
++] = param
;
6540 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6542 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6543 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6544 param_type
= ctx
->i64
;
6547 if (param_type
!= vector_type
)
6548 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6550 for (unsigned j
= 0; j
< size
; ++j
)
6551 out
[num_out
++] = LLVMBuildExtractElement(
6552 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6555 if (i
< fninfo
.num_sgpr_params
)
6556 num_out_sgpr
= num_out
;
6559 memcpy(initial
, out
, sizeof(out
));
6560 initial_num_out
= num_out
;
6561 initial_num_out_sgpr
= num_out_sgpr
;
6563 /* Now chain the parts. */
6564 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6565 LLVMValueRef in
[48];
6567 LLVMTypeRef ret_type
;
6568 unsigned out_idx
= 0;
6569 unsigned num_params
= LLVMCountParams(parts
[part
]);
6571 /* Merged shaders are executed conditionally depending
6572 * on the number of enabled threads passed in the input SGPRs. */
6573 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6574 LLVMValueRef ena
, count
= initial
[3];
6576 count
= LLVMBuildAnd(builder
, count
,
6577 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6578 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6579 ac_get_thread_id(&ctx
->ac
), count
, "");
6580 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6583 /* Derive arguments for the next part from outputs of the
6586 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6588 LLVMTypeRef param_type
;
6590 unsigned param_size
;
6591 LLVMValueRef arg
= NULL
;
6593 param
= LLVMGetParam(parts
[part
], param_idx
);
6594 param_type
= LLVMTypeOf(param
);
6595 param_size
= ac_get_type_size(param_type
) / 4;
6596 is_sgpr
= ac_is_sgpr_param(param
);
6599 #if HAVE_LLVM < 0x0400
6600 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
6602 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
6603 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
6605 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6608 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6609 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6611 if (param_size
== 1)
6614 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6616 if (LLVMTypeOf(arg
) != param_type
) {
6617 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6618 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6619 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6621 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6625 in
[param_idx
] = arg
;
6626 out_idx
+= param_size
;
6629 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6631 if (is_merged_shader(ctx
->shader
) &&
6632 part
+ 1 == next_shader_first_part
) {
6633 lp_build_endif(&if_state
);
6635 /* The second half of the merged shader should use
6636 * the inputs from the toplevel (wrapper) function,
6637 * not the return value from the last call.
6639 * That's because the last call was executed condi-
6640 * tionally, so we can't consume it in the main
6643 memcpy(out
, initial
, sizeof(initial
));
6644 num_out
= initial_num_out
;
6645 num_out_sgpr
= initial_num_out_sgpr
;
6649 /* Extract the returned GPRs. */
6650 ret_type
= LLVMTypeOf(ret
);
6654 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6655 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6657 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6659 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6661 LLVMBuildExtractValue(builder
, ret
, i
, "");
6663 assert(num_out
< ARRAY_SIZE(out
));
6664 out
[num_out
++] = val
;
6666 if (LLVMTypeOf(val
) == ctx
->i32
) {
6667 assert(num_out_sgpr
+ 1 == num_out
);
6668 num_out_sgpr
= num_out
;
6674 LLVMBuildRetVoid(builder
);
6677 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6678 LLVMTargetMachineRef tm
,
6679 struct si_shader
*shader
,
6681 struct pipe_debug_callback
*debug
)
6683 struct si_shader_selector
*sel
= shader
->selector
;
6684 struct si_shader_context ctx
;
6687 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6688 * conversion fails. */
6689 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6690 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6692 tgsi_dump(sel
->tokens
, 0);
6694 nir_print_shader(sel
->nir
, stderr
);
6695 si_dump_streamout(&sel
->so
);
6698 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6699 si_llvm_context_set_tgsi(&ctx
, shader
);
6700 ctx
.separate_prolog
= !is_monolithic
;
6702 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6703 sizeof(shader
->info
.vs_output_param_offset
));
6705 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6707 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6708 si_llvm_dispose(&ctx
);
6712 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6713 LLVMValueRef parts
[2];
6714 bool need_prolog
= sel
->vs_needs_prolog
;
6716 parts
[1] = ctx
.main_fn
;
6719 union si_shader_part_key prolog_key
;
6720 si_get_vs_prolog_key(&sel
->info
,
6721 shader
->info
.num_input_sgprs
,
6722 &shader
->key
.part
.vs
.prolog
,
6723 shader
, &prolog_key
);
6724 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6725 parts
[0] = ctx
.main_fn
;
6728 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6729 1 + need_prolog
, need_prolog
, 0);
6730 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6731 if (sscreen
->info
.chip_class
>= GFX9
) {
6732 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6733 LLVMValueRef parts
[4];
6734 bool vs_needs_prolog
=
6735 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6738 parts
[2] = ctx
.main_fn
;
6741 union si_shader_part_key tcs_epilog_key
;
6742 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6743 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6744 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6745 parts
[3] = ctx
.main_fn
;
6748 if (vs_needs_prolog
) {
6749 union si_shader_part_key vs_prolog_key
;
6750 si_get_vs_prolog_key(&ls
->info
,
6751 shader
->info
.num_input_sgprs
,
6752 &shader
->key
.part
.tcs
.ls_prolog
,
6753 shader
, &vs_prolog_key
);
6754 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6755 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6756 parts
[0] = ctx
.main_fn
;
6759 /* VS as LS main part */
6760 struct si_shader shader_ls
= {};
6761 shader_ls
.selector
= ls
;
6762 shader_ls
.key
.as_ls
= 1;
6763 shader_ls
.key
.mono
= shader
->key
.mono
;
6764 shader_ls
.key
.opt
= shader
->key
.opt
;
6765 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6767 if (!si_compile_tgsi_main(&ctx
, true)) {
6768 si_llvm_dispose(&ctx
);
6771 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6772 parts
[1] = ctx
.main_fn
;
6774 /* Reset the shader context. */
6775 ctx
.shader
= shader
;
6776 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6778 si_build_wrapper_function(&ctx
,
6779 parts
+ !vs_needs_prolog
,
6780 4 - !vs_needs_prolog
, 0,
6781 vs_needs_prolog
? 2 : 1);
6783 LLVMValueRef parts
[2];
6784 union si_shader_part_key epilog_key
;
6786 parts
[0] = ctx
.main_fn
;
6788 memset(&epilog_key
, 0, sizeof(epilog_key
));
6789 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6790 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6791 parts
[1] = ctx
.main_fn
;
6793 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6795 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6796 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6797 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6798 LLVMValueRef es_prolog
= NULL
;
6799 LLVMValueRef es_main
= NULL
;
6800 LLVMValueRef gs_prolog
= NULL
;
6801 LLVMValueRef gs_main
= ctx
.main_fn
;
6804 union si_shader_part_key gs_prolog_key
;
6805 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6806 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6807 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6808 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6809 gs_prolog
= ctx
.main_fn
;
6812 if (es
->vs_needs_prolog
) {
6813 union si_shader_part_key vs_prolog_key
;
6814 si_get_vs_prolog_key(&es
->info
,
6815 shader
->info
.num_input_sgprs
,
6816 &shader
->key
.part
.gs
.vs_prolog
,
6817 shader
, &vs_prolog_key
);
6818 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6819 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6820 es_prolog
= ctx
.main_fn
;
6824 struct si_shader shader_es
= {};
6825 shader_es
.selector
= es
;
6826 shader_es
.key
.as_es
= 1;
6827 shader_es
.key
.mono
= shader
->key
.mono
;
6828 shader_es
.key
.opt
= shader
->key
.opt
;
6829 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6831 if (!si_compile_tgsi_main(&ctx
, true)) {
6832 si_llvm_dispose(&ctx
);
6835 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6836 es_main
= ctx
.main_fn
;
6838 /* Reset the shader context. */
6839 ctx
.shader
= shader
;
6840 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6842 /* Prepare the array of shader parts. */
6843 LLVMValueRef parts
[4];
6844 unsigned num_parts
= 0, main_part
, next_first_part
;
6847 parts
[num_parts
++] = es_prolog
;
6849 parts
[main_part
= num_parts
++] = es_main
;
6850 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6851 parts
[num_parts
++] = gs_main
;
6853 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6854 main_part
, next_first_part
);
6856 LLVMValueRef parts
[2];
6857 union si_shader_part_key prolog_key
;
6859 parts
[1] = ctx
.main_fn
;
6861 memset(&prolog_key
, 0, sizeof(prolog_key
));
6862 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6863 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6864 parts
[0] = ctx
.main_fn
;
6866 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6868 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6869 LLVMValueRef parts
[3];
6870 union si_shader_part_key prolog_key
;
6871 union si_shader_part_key epilog_key
;
6874 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6875 need_prolog
= si_need_ps_prolog(&prolog_key
);
6877 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6880 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6881 parts
[0] = ctx
.main_fn
;
6884 si_get_ps_epilog_key(shader
, &epilog_key
);
6885 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6886 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6888 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6889 need_prolog
? 1 : 0, 0);
6892 si_llvm_optimize_module(&ctx
);
6894 /* Post-optimization transformations and analysis. */
6895 si_optimize_vs_outputs(&ctx
);
6897 if ((debug
&& debug
->debug_message
) ||
6898 si_can_dump_shader(sscreen
, ctx
.type
))
6899 si_count_scratch_private_memory(&ctx
);
6901 /* Compile to bytecode. */
6902 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6903 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6904 si_llvm_dispose(&ctx
);
6906 fprintf(stderr
, "LLVM failed to compile shader\n");
6910 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6911 * LLVM 3.9svn has this bug.
6913 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6914 unsigned wave_size
= 64;
6915 unsigned max_vgprs
= 256;
6916 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6917 unsigned max_sgprs_per_wave
= 128;
6918 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6919 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6920 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6922 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6923 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6925 if (shader
->config
.num_sgprs
> max_sgprs
||
6926 shader
->config
.num_vgprs
> max_vgprs
) {
6927 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6928 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6929 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6930 max_sgprs
, max_vgprs
);
6932 /* Just terminate the process, because dependent
6933 * shaders can hang due to bad input data, but use
6934 * the env var to allow shader-db to work.
6936 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6941 /* Add the scratch offset to input SGPRs. */
6942 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6943 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6945 /* Calculate the number of fragment input VGPRs. */
6946 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6947 shader
->info
.num_input_vgprs
= 0;
6948 shader
->info
.face_vgpr_index
= -1;
6949 shader
->info
.ancillary_vgpr_index
= -1;
6951 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6952 shader
->info
.num_input_vgprs
+= 2;
6953 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6954 shader
->info
.num_input_vgprs
+= 2;
6955 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6956 shader
->info
.num_input_vgprs
+= 2;
6957 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6958 shader
->info
.num_input_vgprs
+= 3;
6959 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6960 shader
->info
.num_input_vgprs
+= 2;
6961 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6962 shader
->info
.num_input_vgprs
+= 2;
6963 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6964 shader
->info
.num_input_vgprs
+= 2;
6965 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6966 shader
->info
.num_input_vgprs
+= 1;
6967 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6968 shader
->info
.num_input_vgprs
+= 1;
6969 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6970 shader
->info
.num_input_vgprs
+= 1;
6971 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6972 shader
->info
.num_input_vgprs
+= 1;
6973 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6974 shader
->info
.num_input_vgprs
+= 1;
6975 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6976 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6977 shader
->info
.num_input_vgprs
+= 1;
6979 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6980 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6981 shader
->info
.num_input_vgprs
+= 1;
6983 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6984 shader
->info
.num_input_vgprs
+= 1;
6985 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6986 shader
->info
.num_input_vgprs
+= 1;
6993 * Create, compile and return a shader part (prolog or epilog).
6995 * \param sscreen screen
6996 * \param list list of shader parts of the same category
6997 * \param type shader type
6998 * \param key shader part key
6999 * \param prolog whether the part being requested is a prolog
7000 * \param tm LLVM target machine
7001 * \param debug debug callback
7002 * \param build the callback responsible for building the main function
7003 * \return non-NULL on success
7005 static struct si_shader_part
*
7006 si_get_shader_part(struct si_screen
*sscreen
,
7007 struct si_shader_part
**list
,
7008 enum pipe_shader_type type
,
7010 union si_shader_part_key
*key
,
7011 LLVMTargetMachineRef tm
,
7012 struct pipe_debug_callback
*debug
,
7013 void (*build
)(struct si_shader_context
*,
7014 union si_shader_part_key
*),
7017 struct si_shader_part
*result
;
7019 mtx_lock(&sscreen
->shader_parts_mutex
);
7021 /* Find existing. */
7022 for (result
= *list
; result
; result
= result
->next
) {
7023 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7024 mtx_unlock(&sscreen
->shader_parts_mutex
);
7029 /* Compile a new one. */
7030 result
= CALLOC_STRUCT(si_shader_part
);
7033 struct si_shader shader
= {};
7034 struct si_shader_context ctx
;
7036 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7037 ctx
.shader
= &shader
;
7041 case PIPE_SHADER_VERTEX
:
7042 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7043 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7045 case PIPE_SHADER_TESS_CTRL
:
7047 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7049 case PIPE_SHADER_GEOMETRY
:
7052 case PIPE_SHADER_FRAGMENT
:
7054 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7056 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7059 unreachable("bad shader part");
7065 si_llvm_optimize_module(&ctx
);
7067 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7068 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7074 result
->next
= *list
;
7078 si_llvm_dispose(&ctx
);
7079 mtx_unlock(&sscreen
->shader_parts_mutex
);
7083 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7085 LLVMValueRef ptr
[2], list
;
7086 bool is_merged_shader
=
7087 ctx
->screen
->info
.chip_class
>= GFX9
&&
7088 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7089 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7090 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7092 /* Get the pointer to rw buffers. */
7093 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7094 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS_HI
);
7095 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7096 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7097 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7098 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
), "");
7103 * Build the vertex shader prolog function.
7105 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7106 * All inputs are returned unmodified. The vertex load indices are
7107 * stored after them, which will be used by the API VS for fetching inputs.
7109 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7114 * (VertexID + BaseVertex),
7115 * (InstanceID + StartInstance),
7116 * (InstanceID / 2 + StartInstance)
7118 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7119 union si_shader_part_key
*key
)
7121 struct si_function_info fninfo
;
7122 LLVMTypeRef
*returns
;
7123 LLVMValueRef ret
, func
;
7125 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7126 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7127 LLVMValueRef input_vgprs
[9];
7128 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7130 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7132 si_init_function_info(&fninfo
);
7134 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7135 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7136 sizeof(LLVMTypeRef
));
7139 /* Declare input and output SGPRs. */
7140 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7141 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7142 returns
[num_returns
++] = ctx
->i32
;
7145 /* Preloaded VGPRs (outputs must be floats) */
7146 for (i
= 0; i
< num_input_vgprs
; i
++) {
7147 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7148 returns
[num_returns
++] = ctx
->f32
;
7151 /* Vertex load indices. */
7152 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7153 returns
[num_returns
++] = ctx
->f32
;
7155 /* Create the function. */
7156 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7157 func
= ctx
->main_fn
;
7159 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7160 if (!key
->vs_prolog
.is_monolithic
)
7161 si_init_exec_from_input(ctx
, 3, 0);
7163 if (key
->vs_prolog
.as_ls
&&
7164 ctx
->screen
->has_ls_vgpr_init_bug
) {
7165 /* If there are no HS threads, SPI loads the LS VGPRs
7166 * starting at VGPR 0. Shift them back to where they
7169 LLVMValueRef has_hs_threads
=
7170 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7171 unpack_param(ctx
, 3, 8, 8),
7174 for (i
= 4; i
> 0; --i
) {
7175 input_vgprs
[i
+ 1] =
7176 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7178 input_vgprs
[i
- 1], "");
7183 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7184 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7186 /* Copy inputs to outputs. This should be no-op, as the registers match,
7187 * but it will prevent the compiler from overwriting them unintentionally.
7189 ret
= ctx
->return_value
;
7190 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7191 LLVMValueRef p
= LLVMGetParam(func
, i
);
7192 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7194 for (i
= 0; i
< num_input_vgprs
; i
++) {
7195 LLVMValueRef p
= input_vgprs
[i
];
7196 p
= ac_to_float(&ctx
->ac
, p
);
7197 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7198 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7201 /* Compute vertex load indices from instance divisors. */
7202 LLVMValueRef instance_divisor_constbuf
= NULL
;
7204 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7205 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7206 LLVMValueRef buf_index
=
7207 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7208 instance_divisor_constbuf
=
7209 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7212 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7213 bool divisor_is_one
=
7214 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7215 bool divisor_is_fetched
=
7216 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7219 if (divisor_is_one
|| divisor_is_fetched
) {
7220 LLVMValueRef divisor
= ctx
->i32_1
;
7222 if (divisor_is_fetched
) {
7223 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7224 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7225 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7228 /* InstanceID / Divisor + StartInstance */
7229 index
= get_instance_index_for_fetch(ctx
,
7231 SI_SGPR_START_INSTANCE
,
7234 /* VertexID + BaseVertex */
7235 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7237 LLVMGetParam(func
, user_sgpr_base
+
7238 SI_SGPR_BASE_VERTEX
), "");
7241 index
= ac_to_float(&ctx
->ac
, index
);
7242 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7243 fninfo
.num_params
+ i
, "");
7246 si_llvm_build_ret(ctx
, ret
);
7249 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7250 LLVMTargetMachineRef tm
,
7251 struct si_shader
*shader
,
7252 struct pipe_debug_callback
*debug
,
7253 struct si_shader
*main_part
,
7254 const struct si_vs_prolog_bits
*key
)
7256 struct si_shader_selector
*vs
= main_part
->selector
;
7258 if (!si_vs_needs_prolog(vs
, key
))
7261 /* Get the prolog. */
7262 union si_shader_part_key prolog_key
;
7263 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7264 key
, shader
, &prolog_key
);
7267 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7268 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7269 debug
, si_build_vs_prolog_function
,
7270 "Vertex Shader Prolog");
7271 return shader
->prolog
!= NULL
;
7275 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7277 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7278 LLVMTargetMachineRef tm
,
7279 struct si_shader
*shader
,
7280 struct pipe_debug_callback
*debug
)
7282 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7283 &shader
->key
.part
.vs
.prolog
);
7287 * Compile the TCS epilog function. This writes tesselation factors to memory
7288 * based on the output primitive type of the tesselator (determined by TES).
7290 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7291 union si_shader_part_key
*key
)
7293 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7294 struct si_function_info fninfo
;
7297 si_init_function_info(&fninfo
);
7299 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7300 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7301 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7302 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7303 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7304 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7305 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7306 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7307 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7308 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7309 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7310 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7311 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7312 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7313 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7314 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7315 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7316 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7317 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7318 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7319 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7320 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7322 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7323 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7324 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7325 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7326 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7327 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7328 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7329 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7330 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7331 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7332 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7333 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7336 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7337 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7338 unsigned tess_factors_idx
=
7339 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7340 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7341 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7343 for (unsigned i
= 0; i
< 6; i
++)
7344 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7346 /* Create the function. */
7347 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7348 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7349 ac_declare_lds_as_pointer(&ctx
->ac
);
7350 func
= ctx
->main_fn
;
7352 LLVMValueRef invoc0_tess_factors
[6];
7353 for (unsigned i
= 0; i
< 6; i
++)
7354 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7356 si_write_tess_factors(bld_base
,
7357 LLVMGetParam(func
, tess_factors_idx
),
7358 LLVMGetParam(func
, tess_factors_idx
+ 1),
7359 LLVMGetParam(func
, tess_factors_idx
+ 2),
7360 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7362 LLVMBuildRetVoid(ctx
->ac
.builder
);
7366 * Select and compile (or reuse) TCS parts (epilog).
7368 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7369 LLVMTargetMachineRef tm
,
7370 struct si_shader
*shader
,
7371 struct pipe_debug_callback
*debug
)
7373 if (sscreen
->info
.chip_class
>= GFX9
) {
7374 struct si_shader
*ls_main_part
=
7375 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7377 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7378 &shader
->key
.part
.tcs
.ls_prolog
))
7381 shader
->previous_stage
= ls_main_part
;
7384 /* Get the epilog. */
7385 union si_shader_part_key epilog_key
;
7386 memset(&epilog_key
, 0, sizeof(epilog_key
));
7387 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7389 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7390 PIPE_SHADER_TESS_CTRL
, false,
7391 &epilog_key
, tm
, debug
,
7392 si_build_tcs_epilog_function
,
7393 "Tessellation Control Shader Epilog");
7394 return shader
->epilog
!= NULL
;
7398 * Select and compile (or reuse) GS parts (prolog).
7400 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7401 LLVMTargetMachineRef tm
,
7402 struct si_shader
*shader
,
7403 struct pipe_debug_callback
*debug
)
7405 if (sscreen
->info
.chip_class
>= GFX9
) {
7406 struct si_shader
*es_main_part
=
7407 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7409 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7410 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7411 &shader
->key
.part
.gs
.vs_prolog
))
7414 shader
->previous_stage
= es_main_part
;
7417 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7420 union si_shader_part_key prolog_key
;
7421 memset(&prolog_key
, 0, sizeof(prolog_key
));
7422 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7424 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7425 PIPE_SHADER_GEOMETRY
, true,
7426 &prolog_key
, tm
, debug
,
7427 si_build_gs_prolog_function
,
7428 "Geometry Shader Prolog");
7429 return shader
->prolog2
!= NULL
;
7433 * Build the pixel shader prolog function. This handles:
7434 * - two-side color selection and interpolation
7435 * - overriding interpolation parameters for the API PS
7436 * - polygon stippling
7438 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7439 * overriden by other states. (e.g. per-sample interpolation)
7440 * Interpolated colors are stored after the preloaded VGPRs.
7442 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7443 union si_shader_part_key
*key
)
7445 struct si_function_info fninfo
;
7446 LLVMValueRef ret
, func
;
7447 int num_returns
, i
, num_color_channels
;
7449 assert(si_need_ps_prolog(key
));
7451 si_init_function_info(&fninfo
);
7453 /* Declare inputs. */
7454 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7455 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7457 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7458 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7460 /* Declare outputs (same as inputs + add colors if needed) */
7461 num_returns
= fninfo
.num_params
;
7462 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7463 for (i
= 0; i
< num_color_channels
; i
++)
7464 fninfo
.types
[num_returns
++] = ctx
->f32
;
7466 /* Create the function. */
7467 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7469 func
= ctx
->main_fn
;
7471 /* Copy inputs to outputs. This should be no-op, as the registers match,
7472 * but it will prevent the compiler from overwriting them unintentionally.
7474 ret
= ctx
->return_value
;
7475 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7476 LLVMValueRef p
= LLVMGetParam(func
, i
);
7477 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7480 /* Polygon stippling. */
7481 if (key
->ps_prolog
.states
.poly_stipple
) {
7482 /* POS_FIXED_PT is always last. */
7483 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7484 key
->ps_prolog
.num_input_vgprs
- 1;
7485 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7487 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7490 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7491 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7492 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7493 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7495 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7496 * The hw doesn't compute CENTROID if the whole wave only
7497 * contains fully-covered quads.
7499 * PRIM_MASK is after user SGPRs.
7501 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7502 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7503 LLVMConstInt(ctx
->i32
, 31, 0), "");
7504 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7507 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7508 /* Read PERSP_CENTER. */
7509 for (i
= 0; i
< 2; i
++)
7510 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7511 /* Read PERSP_CENTROID. */
7512 for (i
= 0; i
< 2; i
++)
7513 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7514 /* Select PERSP_CENTROID. */
7515 for (i
= 0; i
< 2; i
++) {
7516 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7517 center
[i
], centroid
[i
], "");
7518 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7519 tmp
, base
+ 4 + i
, "");
7522 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7523 /* Read LINEAR_CENTER. */
7524 for (i
= 0; i
< 2; i
++)
7525 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7526 /* Read LINEAR_CENTROID. */
7527 for (i
= 0; i
< 2; i
++)
7528 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7529 /* Select LINEAR_CENTROID. */
7530 for (i
= 0; i
< 2; i
++) {
7531 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7532 center
[i
], centroid
[i
], "");
7533 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7534 tmp
, base
+ 10 + i
, "");
7539 /* Force per-sample interpolation. */
7540 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7541 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7542 LLVMValueRef persp_sample
[2];
7544 /* Read PERSP_SAMPLE. */
7545 for (i
= 0; i
< 2; i
++)
7546 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7547 /* Overwrite PERSP_CENTER. */
7548 for (i
= 0; i
< 2; i
++)
7549 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7550 persp_sample
[i
], base
+ 2 + i
, "");
7551 /* Overwrite PERSP_CENTROID. */
7552 for (i
= 0; i
< 2; i
++)
7553 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7554 persp_sample
[i
], base
+ 4 + i
, "");
7556 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7557 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7558 LLVMValueRef linear_sample
[2];
7560 /* Read LINEAR_SAMPLE. */
7561 for (i
= 0; i
< 2; i
++)
7562 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7563 /* Overwrite LINEAR_CENTER. */
7564 for (i
= 0; i
< 2; i
++)
7565 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7566 linear_sample
[i
], base
+ 8 + i
, "");
7567 /* Overwrite LINEAR_CENTROID. */
7568 for (i
= 0; i
< 2; i
++)
7569 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7570 linear_sample
[i
], base
+ 10 + i
, "");
7573 /* Force center interpolation. */
7574 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7575 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7576 LLVMValueRef persp_center
[2];
7578 /* Read PERSP_CENTER. */
7579 for (i
= 0; i
< 2; i
++)
7580 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7581 /* Overwrite PERSP_SAMPLE. */
7582 for (i
= 0; i
< 2; i
++)
7583 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7584 persp_center
[i
], base
+ i
, "");
7585 /* Overwrite PERSP_CENTROID. */
7586 for (i
= 0; i
< 2; i
++)
7587 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7588 persp_center
[i
], base
+ 4 + i
, "");
7590 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7591 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7592 LLVMValueRef linear_center
[2];
7594 /* Read LINEAR_CENTER. */
7595 for (i
= 0; i
< 2; i
++)
7596 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7597 /* Overwrite LINEAR_SAMPLE. */
7598 for (i
= 0; i
< 2; i
++)
7599 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7600 linear_center
[i
], base
+ 6 + i
, "");
7601 /* Overwrite LINEAR_CENTROID. */
7602 for (i
= 0; i
< 2; i
++)
7603 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7604 linear_center
[i
], base
+ 10 + i
, "");
7607 /* Interpolate colors. */
7608 unsigned color_out_idx
= 0;
7609 for (i
= 0; i
< 2; i
++) {
7610 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7611 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7612 key
->ps_prolog
.face_vgpr_index
;
7613 LLVMValueRef interp
[2], color
[4];
7614 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7619 /* If the interpolation qualifier is not CONSTANT (-1). */
7620 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7621 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7622 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7624 /* Get the (i,j) updated by bc_optimize handling. */
7625 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7627 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7628 interp_vgpr
+ 1, "");
7629 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7632 /* Use the absolute location of the input. */
7633 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7635 if (key
->ps_prolog
.states
.color_two_side
) {
7636 face
= LLVMGetParam(func
, face_vgpr
);
7637 face
= ac_to_integer(&ctx
->ac
, face
);
7640 interp_fs_input(ctx
,
7641 key
->ps_prolog
.color_attr_index
[i
],
7642 TGSI_SEMANTIC_COLOR
, i
,
7643 key
->ps_prolog
.num_interp_inputs
,
7644 key
->ps_prolog
.colors_read
, interp_ij
,
7645 prim_mask
, face
, color
);
7648 unsigned chan
= u_bit_scan(&writemask
);
7649 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7650 fninfo
.num_params
+ color_out_idx
++, "");
7654 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7657 * "When per-sample shading is active due to the use of a fragment
7658 * input qualified by sample or due to the use of the gl_SampleID
7659 * or gl_SamplePosition variables, only the bit for the current
7660 * sample is set in gl_SampleMaskIn. When state specifies multiple
7661 * fragment shader invocations for a given fragment, the sample
7662 * mask for any single fragment shader invocation may specify a
7663 * subset of the covered samples for the fragment. In this case,
7664 * the bit corresponding to each covered sample will be set in
7665 * exactly one fragment shader invocation."
7667 * The samplemask loaded by hardware is always the coverage of the
7668 * entire pixel/fragment, so mask bits out based on the sample ID.
7670 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7671 /* The bit pattern matches that used by fixed function fragment
7673 static const uint16_t ps_iter_masks
[] = {
7674 0xffff, /* not used */
7680 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7682 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7683 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7684 key
->ps_prolog
.ancillary_vgpr_index
;
7685 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7686 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7688 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7689 samplemask
= LLVMBuildAnd(
7692 LLVMBuildShl(ctx
->ac
.builder
,
7693 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7696 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7698 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7699 ancillary_vgpr
+ 1, "");
7702 /* Tell LLVM to insert WQM instruction sequence when needed. */
7703 if (key
->ps_prolog
.wqm
) {
7704 LLVMAddTargetDependentFunctionAttr(func
,
7705 "amdgpu-ps-wqm-outputs", "");
7708 si_llvm_build_ret(ctx
, ret
);
7712 * Build the pixel shader epilog function. This handles everything that must be
7713 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7715 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7716 union si_shader_part_key
*key
)
7718 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7719 struct si_function_info fninfo
;
7720 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7722 struct si_ps_exports exp
= {};
7724 si_init_function_info(&fninfo
);
7726 /* Declare input SGPRs. */
7727 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7728 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7729 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7730 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7731 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7733 /* Declare input VGPRs. */
7734 unsigned required_num_params
=
7735 fninfo
.num_sgpr_params
+
7736 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7737 key
->ps_epilog
.writes_z
+
7738 key
->ps_epilog
.writes_stencil
+
7739 key
->ps_epilog
.writes_samplemask
;
7741 required_num_params
= MAX2(required_num_params
,
7742 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7744 while (fninfo
.num_params
< required_num_params
)
7745 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7747 /* Create the function. */
7748 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7749 /* Disable elimination of unused inputs. */
7750 si_llvm_add_attribute(ctx
->main_fn
,
7751 "InitialPSInputAddr", 0xffffff);
7753 /* Process colors. */
7754 unsigned vgpr
= fninfo
.num_sgpr_params
;
7755 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7756 int last_color_export
= -1;
7758 /* Find the last color export. */
7759 if (!key
->ps_epilog
.writes_z
&&
7760 !key
->ps_epilog
.writes_stencil
&&
7761 !key
->ps_epilog
.writes_samplemask
) {
7762 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7764 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7765 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7766 /* Just set this if any of the colorbuffers are enabled. */
7768 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7769 last_color_export
= 0;
7771 for (i
= 0; i
< 8; i
++)
7772 if (colors_written
& (1 << i
) &&
7773 (spi_format
>> (i
* 4)) & 0xf)
7774 last_color_export
= i
;
7778 while (colors_written
) {
7779 LLVMValueRef color
[4];
7780 int mrt
= u_bit_scan(&colors_written
);
7782 for (i
= 0; i
< 4; i
++)
7783 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7785 si_export_mrt_color(bld_base
, color
, mrt
,
7786 fninfo
.num_params
- 1,
7787 mrt
== last_color_export
, &exp
);
7790 /* Process depth, stencil, samplemask. */
7791 if (key
->ps_epilog
.writes_z
)
7792 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7793 if (key
->ps_epilog
.writes_stencil
)
7794 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7795 if (key
->ps_epilog
.writes_samplemask
)
7796 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7798 if (depth
|| stencil
|| samplemask
)
7799 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7800 else if (last_color_export
== -1)
7801 si_export_null(bld_base
);
7804 si_emit_ps_exports(ctx
, &exp
);
7807 LLVMBuildRetVoid(ctx
->ac
.builder
);
7811 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7813 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7814 LLVMTargetMachineRef tm
,
7815 struct si_shader
*shader
,
7816 struct pipe_debug_callback
*debug
)
7818 union si_shader_part_key prolog_key
;
7819 union si_shader_part_key epilog_key
;
7821 /* Get the prolog. */
7822 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7824 /* The prolog is a no-op if these aren't set. */
7825 if (si_need_ps_prolog(&prolog_key
)) {
7827 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7828 PIPE_SHADER_FRAGMENT
, true,
7829 &prolog_key
, tm
, debug
,
7830 si_build_ps_prolog_function
,
7831 "Fragment Shader Prolog");
7832 if (!shader
->prolog
)
7836 /* Get the epilog. */
7837 si_get_ps_epilog_key(shader
, &epilog_key
);
7840 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7841 PIPE_SHADER_FRAGMENT
, false,
7842 &epilog_key
, tm
, debug
,
7843 si_build_ps_epilog_function
,
7844 "Fragment Shader Epilog");
7845 if (!shader
->epilog
)
7848 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7849 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7850 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7851 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7854 /* Set up the enable bits for per-sample shading if needed. */
7855 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7856 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7857 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7858 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7859 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7860 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7862 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7863 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7864 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7865 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7866 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7867 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7869 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7870 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7871 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7872 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7873 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7874 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7876 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7877 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7878 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7879 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7880 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7881 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7884 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7885 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7886 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7887 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7888 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7891 /* At least one pair of interpolation weights must be enabled. */
7892 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7893 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7894 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7897 /* Samplemask fixup requires the sample ID. */
7898 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7899 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7900 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7903 /* The sample mask input is always enabled, because the API shader always
7904 * passes it through to the epilog. Disable it here if it's unused.
7906 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7907 !shader
->selector
->info
.reads_samplemask
)
7908 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7913 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7916 /* SPI barrier management bug:
7917 * Make sure we have at least 4k of LDS in use to avoid the bug.
7918 * It applies to workgroup sizes of more than one wavefront.
7920 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7921 sscreen
->info
.family
== CHIP_KABINI
||
7922 sscreen
->info
.family
== CHIP_MULLINS
)
7923 *lds_size
= MAX2(*lds_size
, 8);
7926 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7927 struct si_shader
*shader
)
7929 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7931 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7933 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7934 si_get_max_workgroup_size(shader
) > 64) {
7935 si_multiwave_lds_size_workaround(sscreen
,
7936 &shader
->config
.lds_size
);
7940 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7941 struct si_shader
*shader
,
7942 struct pipe_debug_callback
*debug
)
7944 struct si_shader_selector
*sel
= shader
->selector
;
7945 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7948 /* LS, ES, VS are compiled on demand if the main part hasn't been
7949 * compiled for that stage.
7951 * Vertex shaders are compiled on demand when a vertex fetch
7952 * workaround must be applied.
7954 if (shader
->is_monolithic
) {
7955 /* Monolithic shader (compiled as a whole, has many variants,
7956 * may take a long time to compile).
7958 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7962 /* The shader consists of several parts:
7964 * - the middle part is the user shader, it has 1 variant only
7965 * and it was compiled during the creation of the shader
7967 * - the prolog part is inserted at the beginning
7968 * - the epilog part is inserted at the end
7970 * The prolog and epilog have many (but simple) variants.
7972 * Starting with gfx9, geometry and tessellation control
7973 * shaders also contain the prolog and user shader parts of
7974 * the previous shader stage.
7980 /* Copy the compiled TGSI shader data over. */
7981 shader
->is_binary_shared
= true;
7982 shader
->binary
= mainp
->binary
;
7983 shader
->config
= mainp
->config
;
7984 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7985 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7986 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7987 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7988 memcpy(shader
->info
.vs_output_param_offset
,
7989 mainp
->info
.vs_output_param_offset
,
7990 sizeof(mainp
->info
.vs_output_param_offset
));
7991 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7992 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7993 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7995 /* Select prologs and/or epilogs. */
7996 switch (sel
->type
) {
7997 case PIPE_SHADER_VERTEX
:
7998 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8001 case PIPE_SHADER_TESS_CTRL
:
8002 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8005 case PIPE_SHADER_TESS_EVAL
:
8007 case PIPE_SHADER_GEOMETRY
:
8008 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8011 case PIPE_SHADER_FRAGMENT
:
8012 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8015 /* Make sure we have at least as many VGPRs as there
8016 * are allocated inputs.
8018 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8019 shader
->info
.num_input_vgprs
);
8023 /* Update SGPR and VGPR counts. */
8024 if (shader
->prolog
) {
8025 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8026 shader
->prolog
->config
.num_sgprs
);
8027 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8028 shader
->prolog
->config
.num_vgprs
);
8030 if (shader
->previous_stage
) {
8031 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8032 shader
->previous_stage
->config
.num_sgprs
);
8033 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8034 shader
->previous_stage
->config
.num_vgprs
);
8035 shader
->config
.spilled_sgprs
=
8036 MAX2(shader
->config
.spilled_sgprs
,
8037 shader
->previous_stage
->config
.spilled_sgprs
);
8038 shader
->config
.spilled_vgprs
=
8039 MAX2(shader
->config
.spilled_vgprs
,
8040 shader
->previous_stage
->config
.spilled_vgprs
);
8041 shader
->config
.private_mem_vgprs
=
8042 MAX2(shader
->config
.private_mem_vgprs
,
8043 shader
->previous_stage
->config
.private_mem_vgprs
);
8044 shader
->config
.scratch_bytes_per_wave
=
8045 MAX2(shader
->config
.scratch_bytes_per_wave
,
8046 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8047 shader
->info
.uses_instanceid
|=
8048 shader
->previous_stage
->info
.uses_instanceid
;
8050 if (shader
->prolog2
) {
8051 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8052 shader
->prolog2
->config
.num_sgprs
);
8053 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8054 shader
->prolog2
->config
.num_vgprs
);
8056 if (shader
->epilog
) {
8057 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8058 shader
->epilog
->config
.num_sgprs
);
8059 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8060 shader
->epilog
->config
.num_vgprs
);
8064 si_fix_resource_usage(sscreen
, shader
);
8065 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8069 r
= si_shader_binary_upload(sscreen
, shader
);
8071 fprintf(stderr
, "LLVM failed to upload shader\n");
8078 void si_shader_destroy(struct si_shader
*shader
)
8080 if (shader
->scratch_bo
)
8081 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8083 r600_resource_reference(&shader
->bo
, NULL
);
8085 if (!shader
->is_binary_shared
)
8086 ac_shader_binary_clean(&shader
->binary
);
8088 free(shader
->shader_log
);