2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "ac_shader_util.h"
41 #include "si_shader_internal.h"
45 #include "compiler/nir/nir.h"
47 static const char *scratch_rsrc_dword0_symbol
=
48 "SCRATCH_RSRC_DWORD0";
50 static const char *scratch_rsrc_dword1_symbol
=
51 "SCRATCH_RSRC_DWORD1";
53 struct si_shader_output_values
55 LLVMValueRef values
[4];
56 unsigned semantic_name
;
57 unsigned semantic_index
;
58 ubyte vertex_stream
[4];
62 * Used to collect types and other info about arguments of the LLVM function
63 * before the function is created.
65 struct si_function_info
{
66 LLVMTypeRef types
[100];
67 LLVMValueRef
*assign
[100];
68 unsigned num_sgpr_params
;
77 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
78 struct si_screen
*sscreen
,
79 LLVMTargetMachineRef tm
);
81 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
82 struct lp_build_tgsi_context
*bld_base
,
83 struct lp_build_emit_data
*emit_data
);
85 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
88 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
89 union si_shader_part_key
*key
);
90 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
91 union si_shader_part_key
*key
);
92 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
97 /* Ideally pass the sample mask input to the PS epilog as v14, which
98 * is its usual location, so that the shader doesn't have to add v_mov.
100 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
102 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
105 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
111 static bool is_merged_shader(struct si_shader
*shader
)
113 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
116 return shader
->key
.as_ls
||
118 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
119 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
122 static void si_init_function_info(struct si_function_info
*fninfo
)
124 fninfo
->num_params
= 0;
125 fninfo
->num_sgpr_params
= 0;
128 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
,
130 LLVMValueRef
*assign
)
132 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
134 unsigned idx
= fninfo
->num_params
++;
135 assert(idx
< ARRAY_SIZE(fninfo
->types
));
137 if (regfile
== ARG_SGPR
)
138 fninfo
->num_sgpr_params
= fninfo
->num_params
;
140 fninfo
->types
[idx
] = type
;
141 fninfo
->assign
[idx
] = assign
;
145 static unsigned add_arg(struct si_function_info
*fninfo
,
146 enum si_arg_regfile regfile
, LLVMTypeRef type
)
148 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
151 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
152 enum si_arg_regfile regfile
, LLVMTypeRef type
,
153 LLVMValueRef
*assign
, unsigned idx
)
155 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
156 assert(actual
== idx
);
159 static void add_arg_checked(struct si_function_info
*fninfo
,
160 enum si_arg_regfile regfile
, LLVMTypeRef type
,
163 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
167 * Returns a unique index for a per-patch semantic name and index. The index
168 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
171 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
173 switch (semantic_name
) {
174 case TGSI_SEMANTIC_TESSOUTER
:
176 case TGSI_SEMANTIC_TESSINNER
:
178 case TGSI_SEMANTIC_PATCH
:
183 assert(!"invalid semantic name");
189 * Returns a unique index for a semantic name and index. The index must be
190 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
193 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
195 switch (semantic_name
) {
196 case TGSI_SEMANTIC_POSITION
:
198 case TGSI_SEMANTIC_GENERIC
:
199 /* Since some shader stages use the the highest used IO index
200 * to determine the size to allocate for inputs/outputs
201 * (in LDS, tess and GS rings). GENERIC should be placed right
202 * after POSITION to make that size as small as possible.
204 if (index
< SI_MAX_IO_GENERIC
)
207 assert(!"invalid generic index");
209 case TGSI_SEMANTIC_PSIZE
:
210 return SI_MAX_IO_GENERIC
+ 1;
211 case TGSI_SEMANTIC_CLIPDIST
:
213 return SI_MAX_IO_GENERIC
+ 2 + index
;
214 case TGSI_SEMANTIC_FOG
:
215 return SI_MAX_IO_GENERIC
+ 4;
216 case TGSI_SEMANTIC_LAYER
:
217 return SI_MAX_IO_GENERIC
+ 5;
218 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
219 return SI_MAX_IO_GENERIC
+ 6;
220 case TGSI_SEMANTIC_PRIMID
:
221 return SI_MAX_IO_GENERIC
+ 7;
222 case TGSI_SEMANTIC_COLOR
: /* these alias */
223 case TGSI_SEMANTIC_BCOLOR
:
225 return SI_MAX_IO_GENERIC
+ 8 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
229 return SI_MAX_IO_GENERIC
+ 10 + index
;
231 assert(!"invalid semantic name");
237 * Get the value of a shader input parameter and extract a bitfield.
239 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
240 LLVMValueRef value
, unsigned rshift
,
243 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
244 value
= ac_to_integer(&ctx
->ac
, value
);
247 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
248 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
250 if (rshift
+ bitwidth
< 32) {
251 unsigned mask
= (1 << bitwidth
) - 1;
252 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
253 LLVMConstInt(ctx
->i32
, mask
, 0), "");
259 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
260 unsigned param
, unsigned rshift
,
263 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
265 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
268 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
271 case PIPE_SHADER_TESS_CTRL
:
272 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
274 case PIPE_SHADER_TESS_EVAL
:
275 return LLVMGetParam(ctx
->main_fn
,
276 ctx
->param_tes_rel_patch_id
);
284 /* Tessellation shaders pass outputs to the next shader using LDS.
286 * LS outputs = TCS inputs
287 * TCS outputs = TES inputs
290 * - TCS inputs for patch 0
291 * - TCS inputs for patch 1
292 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
294 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
295 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
296 * - TCS outputs for patch 1
297 * - Per-patch TCS outputs for patch 1
298 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
299 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
302 * All three shaders VS(LS), TCS, TES share the same LDS space.
306 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
308 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
311 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
313 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
315 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
316 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
318 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
321 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
323 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
325 return LLVMConstInt(ctx
->i32
, stride
, 0);
328 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
330 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
331 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
333 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
334 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
335 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
336 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
337 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
338 num_patch_outputs
* 4;
339 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
343 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
345 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
347 ctx
->param_tcs_out_lds_offsets
,
353 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
355 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
357 ctx
->param_tcs_out_lds_offsets
,
363 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
365 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
366 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
368 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
372 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
374 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
375 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
376 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
378 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
379 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
385 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
387 LLVMValueRef patch0_patch_data_offset
=
388 get_tcs_out_patch0_patch_data_offset(ctx
);
389 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
390 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
392 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
393 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
398 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
400 unsigned tcs_out_vertices
=
401 ctx
->shader
->selector
?
402 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
404 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
405 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
406 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
408 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
411 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
416 case PIPE_SHADER_VERTEX
:
417 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
418 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
420 case PIPE_SHADER_TESS_CTRL
:
421 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
422 ctx
->shader
->is_monolithic
) {
423 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
424 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
426 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
434 static LLVMValueRef
get_instance_index_for_fetch(
435 struct si_shader_context
*ctx
,
436 unsigned param_start_instance
, LLVMValueRef divisor
)
438 LLVMValueRef result
= ctx
->abi
.instance_id
;
440 /* The division must be done before START_INSTANCE is added. */
441 if (divisor
!= ctx
->i32_1
)
442 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
444 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
445 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
448 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
450 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
452 unsigned double_index
)
454 LLVMBuilderRef builder
= ctx
->ac
.builder
;
455 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
456 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
457 LLVMVectorType(f64
, 2), "");
458 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
459 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
460 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
463 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
464 LLVMValueRef i32
, unsigned index
)
469 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
470 LLVMConstInt(ctx
->i32
, 16, 0), "");
472 return LLVMBuildSExt(ctx
->ac
.builder
,
473 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
478 void si_llvm_load_input_vs(
479 struct si_shader_context
*ctx
,
480 unsigned input_index
,
483 unsigned vs_blit_property
=
484 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
486 if (vs_blit_property
) {
487 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
488 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
489 LLVMIntULE
, vertex_id
,
491 /* Use LLVMIntNE, because we have 3 vertices and only
492 * the middle one should use y2.
494 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
495 LLVMIntNE
, vertex_id
,
498 if (input_index
== 0) {
500 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
);
502 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
503 ctx
->param_vs_blit_inputs
+ 1);
505 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
506 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
507 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
508 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
510 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
512 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
515 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
516 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
517 out
[2] = LLVMGetParam(ctx
->main_fn
,
518 ctx
->param_vs_blit_inputs
+ 2);
519 out
[3] = ctx
->ac
.f32_1
;
523 /* Color or texture coordinates: */
524 assert(input_index
== 1);
526 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
527 for (int i
= 0; i
< 4; i
++) {
528 out
[i
] = LLVMGetParam(ctx
->main_fn
,
529 ctx
->param_vs_blit_inputs
+ 3 + i
);
532 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
533 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 3);
535 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
536 ctx
->param_vs_blit_inputs
+ 4);
537 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
538 ctx
->param_vs_blit_inputs
+ 5);
539 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
540 ctx
->param_vs_blit_inputs
+ 6);
542 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
544 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
546 out
[2] = LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_blit_inputs
+ 7);
548 out
[3] = LLVMGetParam(ctx
->main_fn
,
549 ctx
->param_vs_blit_inputs
+ 8);
556 unsigned num_fetches
;
557 unsigned fetch_stride
;
559 LLVMValueRef t_list_ptr
;
560 LLVMValueRef t_offset
;
562 LLVMValueRef vertex_index
;
563 LLVMValueRef input
[3];
565 /* Load the T list */
566 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
568 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
570 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
572 vertex_index
= LLVMGetParam(ctx
->main_fn
,
573 ctx
->param_vertex_index0
+
576 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
578 /* Do multiple loads for special formats. */
580 case SI_FIX_FETCH_RGB_64_FLOAT
:
581 num_fetches
= 3; /* 3 2-dword loads */
584 case SI_FIX_FETCH_RGBA_64_FLOAT
:
585 num_fetches
= 2; /* 2 4-dword loads */
588 case SI_FIX_FETCH_RGB_8
:
589 case SI_FIX_FETCH_RGB_8_INT
:
593 case SI_FIX_FETCH_RGB_16
:
594 case SI_FIX_FETCH_RGB_16_INT
:
603 for (unsigned i
= 0; i
< num_fetches
; i
++) {
604 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
606 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
607 vertex_index
, voffset
,
611 /* Break up the vec4 into individual components */
612 for (chan
= 0; chan
< 4; chan
++) {
613 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
614 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
615 input
[0], llvm_chan
, "");
619 case SI_FIX_FETCH_A2_SNORM
:
620 case SI_FIX_FETCH_A2_SSCALED
:
621 case SI_FIX_FETCH_A2_SINT
: {
622 /* The hardware returns an unsigned value; convert it to a
625 LLVMValueRef tmp
= out
[3];
626 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
628 /* First, recover the sign-extended signed integer value. */
629 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
630 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
632 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
634 /* For the integer-like cases, do a natural sign extension.
636 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
637 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
640 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
641 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
642 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
643 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
645 /* Convert back to the right type. */
646 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
648 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
649 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
650 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
651 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
652 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
653 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
659 case SI_FIX_FETCH_RGBA_32_UNORM
:
660 case SI_FIX_FETCH_RGBX_32_UNORM
:
661 for (chan
= 0; chan
< 4; chan
++) {
662 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
663 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
664 out
[chan
], ctx
->f32
, "");
665 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
666 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
668 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
669 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
670 out
[3] = LLVMConstReal(ctx
->f32
, 1);
672 case SI_FIX_FETCH_RGBA_32_SNORM
:
673 case SI_FIX_FETCH_RGBX_32_SNORM
:
674 case SI_FIX_FETCH_RGBA_32_FIXED
:
675 case SI_FIX_FETCH_RGBX_32_FIXED
: {
677 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
678 scale
= 1.0 / 0x10000;
680 scale
= 1.0 / INT_MAX
;
682 for (chan
= 0; chan
< 4; chan
++) {
683 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
684 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
685 out
[chan
], ctx
->f32
, "");
686 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
687 LLVMConstReal(ctx
->f32
, scale
), "");
689 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
690 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
691 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
692 out
[3] = LLVMConstReal(ctx
->f32
, 1);
695 case SI_FIX_FETCH_RGBA_32_USCALED
:
696 for (chan
= 0; chan
< 4; chan
++) {
697 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
698 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
699 out
[chan
], ctx
->f32
, "");
702 case SI_FIX_FETCH_RGBA_32_SSCALED
:
703 for (chan
= 0; chan
< 4; chan
++) {
704 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
705 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
706 out
[chan
], ctx
->f32
, "");
709 case SI_FIX_FETCH_RG_64_FLOAT
:
710 for (chan
= 0; chan
< 2; chan
++)
711 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
713 out
[2] = LLVMConstReal(ctx
->f32
, 0);
714 out
[3] = LLVMConstReal(ctx
->f32
, 1);
716 case SI_FIX_FETCH_RGB_64_FLOAT
:
717 for (chan
= 0; chan
< 3; chan
++)
718 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
720 out
[3] = LLVMConstReal(ctx
->f32
, 1);
722 case SI_FIX_FETCH_RGBA_64_FLOAT
:
723 for (chan
= 0; chan
< 4; chan
++) {
724 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
728 case SI_FIX_FETCH_RGB_8
:
729 case SI_FIX_FETCH_RGB_8_INT
:
730 case SI_FIX_FETCH_RGB_16
:
731 case SI_FIX_FETCH_RGB_16_INT
:
732 for (chan
= 0; chan
< 3; chan
++) {
733 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
737 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
738 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
739 out
[3] = LLVMConstReal(ctx
->f32
, 1);
741 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
747 static void declare_input_vs(
748 struct si_shader_context
*ctx
,
749 unsigned input_index
,
750 const struct tgsi_full_declaration
*decl
,
753 si_llvm_load_input_vs(ctx
, input_index
, out
);
756 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
763 case PIPE_SHADER_VERTEX
:
764 return LLVMGetParam(ctx
->main_fn
,
765 ctx
->param_vs_prim_id
);
766 case PIPE_SHADER_TESS_CTRL
:
767 return ctx
->abi
.tcs_patch_id
;
768 case PIPE_SHADER_TESS_EVAL
:
769 return ctx
->abi
.tes_patch_id
;
770 case PIPE_SHADER_GEOMETRY
:
771 return ctx
->abi
.gs_prim_id
;
779 * Return the value of tgsi_ind_register for indexing.
780 * This is the indirect index with the constant offset added to it.
782 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
783 const struct tgsi_ind_register
*ind
,
789 if (ind
->File
== TGSI_FILE_ADDRESS
) {
790 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
791 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
793 struct tgsi_full_src_register src
= {};
795 src
.Register
.File
= ind
->File
;
796 src
.Register
.Index
= ind
->Index
;
798 /* Set the second index to 0 for constants. */
799 if (ind
->File
== TGSI_FILE_CONSTANT
)
800 src
.Register
.Dimension
= 1;
802 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
805 result
= ac_to_integer(&ctx
->ac
, result
);
809 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
810 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
811 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
812 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
817 * Like si_get_indirect_index, but restricts the return value to a (possibly
818 * undefined) value inside [0..num).
820 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
821 const struct tgsi_ind_register
*ind
,
822 int rel_index
, unsigned num
)
824 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
826 return si_llvm_bound_index(ctx
, result
, num
);
829 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
830 LLVMValueRef vertex_dw_stride
,
831 LLVMValueRef base_addr
,
832 LLVMValueRef vertex_index
,
833 LLVMValueRef param_index
,
834 unsigned input_index
,
839 if (vertex_dw_stride
) {
840 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
841 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
842 vertex_dw_stride
, ""), "");
846 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
847 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
848 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
851 int param
= is_patch
?
852 si_shader_io_get_unique_index_patch(name
[input_index
],
853 index
[input_index
]) :
854 si_shader_io_get_unique_index(name
[input_index
],
857 /* Add the base address of the element. */
858 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
859 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
863 * Calculate a dword address given an input or output register and a stride.
865 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
866 const struct tgsi_full_dst_register
*dst
,
867 const struct tgsi_full_src_register
*src
,
868 LLVMValueRef vertex_dw_stride
,
869 LLVMValueRef base_addr
)
871 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
872 ubyte
*name
, *index
, *array_first
;
874 struct tgsi_full_dst_register reg
;
875 LLVMValueRef vertex_index
= NULL
;
876 LLVMValueRef ind_index
= NULL
;
878 /* Set the register description. The address computation is the same
879 * for sources and destinations. */
881 reg
.Register
.File
= src
->Register
.File
;
882 reg
.Register
.Index
= src
->Register
.Index
;
883 reg
.Register
.Indirect
= src
->Register
.Indirect
;
884 reg
.Register
.Dimension
= src
->Register
.Dimension
;
885 reg
.Indirect
= src
->Indirect
;
886 reg
.Dimension
= src
->Dimension
;
887 reg
.DimIndirect
= src
->DimIndirect
;
891 /* If the register is 2-dimensional (e.g. an array of vertices
892 * in a primitive), calculate the base address of the vertex. */
893 if (reg
.Register
.Dimension
) {
894 if (reg
.Dimension
.Indirect
)
895 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
896 1, reg
.Dimension
.Index
);
898 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
901 /* Get information about the register. */
902 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
903 name
= info
->input_semantic_name
;
904 index
= info
->input_semantic_index
;
905 array_first
= info
->input_array_first
;
906 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
907 name
= info
->output_semantic_name
;
908 index
= info
->output_semantic_index
;
909 array_first
= info
->output_array_first
;
915 if (reg
.Register
.Indirect
) {
916 /* Add the relative address of the element. */
917 if (reg
.Indirect
.ArrayID
)
918 input_index
= array_first
[reg
.Indirect
.ArrayID
];
920 input_index
= reg
.Register
.Index
;
922 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
923 1, reg
.Register
.Index
- input_index
);
925 input_index
= reg
.Register
.Index
;
928 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
929 base_addr
, vertex_index
,
930 ind_index
, input_index
,
932 !reg
.Register
.Dimension
);
935 /* The offchip buffer layout for TCS->TES is
937 * - attribute 0 of patch 0 vertex 0
938 * - attribute 0 of patch 0 vertex 1
939 * - attribute 0 of patch 0 vertex 2
941 * - attribute 0 of patch 1 vertex 0
942 * - attribute 0 of patch 1 vertex 1
944 * - attribute 1 of patch 0 vertex 0
945 * - attribute 1 of patch 0 vertex 1
947 * - per patch attribute 0 of patch 0
948 * - per patch attribute 0 of patch 1
951 * Note that every attribute has 4 components.
953 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
954 LLVMValueRef rel_patch_id
,
955 LLVMValueRef vertex_index
,
956 LLVMValueRef param_index
)
958 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
959 LLVMValueRef param_stride
, constant16
;
961 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
962 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
963 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
966 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
968 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
969 vertices_per_patch
, "");
971 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
974 param_stride
= total_vertices
;
976 base_addr
= rel_patch_id
;
977 param_stride
= num_patches
;
980 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
981 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
982 param_stride
, ""), "");
984 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
987 LLVMValueRef patch_data_offset
=
988 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
990 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
991 patch_data_offset
, "");
996 /* This is a generic helper that can be shared by the NIR and TGSI backends */
997 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
998 struct si_shader_context
*ctx
,
999 LLVMValueRef vertex_index
,
1000 LLVMValueRef param_index
,
1001 unsigned param_base
,
1006 unsigned param_index_base
;
1008 param_index_base
= is_patch
?
1009 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1010 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1013 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1014 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1017 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1020 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1021 vertex_index
, param_index
);
1024 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1025 struct si_shader_context
*ctx
,
1026 const struct tgsi_full_dst_register
*dst
,
1027 const struct tgsi_full_src_register
*src
)
1029 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1030 ubyte
*name
, *index
, *array_first
;
1031 struct tgsi_full_src_register reg
;
1032 LLVMValueRef vertex_index
= NULL
;
1033 LLVMValueRef param_index
= NULL
;
1034 unsigned param_base
;
1036 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1038 if (reg
.Register
.Dimension
) {
1040 if (reg
.Dimension
.Indirect
)
1041 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1042 1, reg
.Dimension
.Index
);
1044 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1047 /* Get information about the register. */
1048 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1049 name
= info
->input_semantic_name
;
1050 index
= info
->input_semantic_index
;
1051 array_first
= info
->input_array_first
;
1052 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1053 name
= info
->output_semantic_name
;
1054 index
= info
->output_semantic_index
;
1055 array_first
= info
->output_array_first
;
1061 if (reg
.Register
.Indirect
) {
1062 if (reg
.Indirect
.ArrayID
)
1063 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1065 param_base
= reg
.Register
.Index
;
1067 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1068 1, reg
.Register
.Index
- param_base
);
1071 param_base
= reg
.Register
.Index
;
1074 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1075 param_index
, param_base
,
1076 name
, index
, !reg
.Register
.Dimension
);
1079 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1080 LLVMTypeRef type
, unsigned swizzle
,
1081 LLVMValueRef buffer
, LLVMValueRef offset
,
1082 LLVMValueRef base
, bool can_speculate
)
1084 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1085 LLVMValueRef value
, value2
;
1086 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1088 if (swizzle
== ~0) {
1089 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1090 0, 1, 0, can_speculate
, false);
1092 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1095 if (!llvm_type_is_64bit(ctx
, type
)) {
1096 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1097 0, 1, 0, can_speculate
, false);
1099 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1100 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1101 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1104 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1105 swizzle
* 4, 1, 0, can_speculate
, false);
1107 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1108 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1110 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1116 * \param type output value type
1117 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1118 * \param dw_addr address in dwords
1120 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1121 LLVMTypeRef type
, unsigned swizzle
,
1122 LLVMValueRef dw_addr
)
1124 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1127 if (swizzle
== ~0) {
1128 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1130 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1131 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1133 return lp_build_gather_values(&ctx
->gallivm
, values
,
1137 /* Split 64-bit loads. */
1138 if (llvm_type_is_64bit(ctx
, type
)) {
1139 LLVMValueRef lo
, hi
;
1141 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1142 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1143 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1146 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1147 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1149 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1151 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1157 * \param swizzle offset (typically 0..3)
1158 * \param dw_addr address in dwords
1159 * \param value value to store
1161 static void lds_store(struct si_shader_context
*ctx
,
1162 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1165 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1166 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1168 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1171 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
1174 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1176 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1177 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
1178 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
1180 uint64_t desc2
= 0xffffffff;
1181 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1182 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1183 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1184 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1185 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1186 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1187 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
1189 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
1190 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
1191 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
1192 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
1195 static LLVMValueRef
fetch_input_tcs(
1196 struct lp_build_tgsi_context
*bld_base
,
1197 const struct tgsi_full_src_register
*reg
,
1198 enum tgsi_opcode_type type
, unsigned swizzle
)
1200 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1201 LLVMValueRef dw_addr
, stride
;
1203 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1204 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1205 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1207 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1210 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1211 LLVMValueRef vertex_index
,
1212 LLVMValueRef param_index
,
1213 unsigned const_index
,
1215 unsigned driver_location
,
1217 unsigned num_components
,
1222 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1223 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1224 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1225 LLVMValueRef dw_addr
, stride
;
1227 driver_location
= driver_location
/ 4;
1230 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1231 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1235 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1237 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1238 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1243 /* Add the constant index to the indirect index */
1244 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1245 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1247 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1250 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1251 vertex_index
, param_index
,
1253 info
->input_semantic_name
,
1254 info
->input_semantic_index
,
1257 LLVMValueRef value
[4];
1258 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
1259 value
[i
] = lds_load(bld_base
, ctx
->i32
, i
, dw_addr
);
1262 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1265 static LLVMValueRef
fetch_output_tcs(
1266 struct lp_build_tgsi_context
*bld_base
,
1267 const struct tgsi_full_src_register
*reg
,
1268 enum tgsi_opcode_type type
, unsigned swizzle
)
1270 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1271 LLVMValueRef dw_addr
, stride
;
1273 if (reg
->Register
.Dimension
) {
1274 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1275 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1276 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1278 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1279 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1282 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1285 static LLVMValueRef
fetch_input_tes(
1286 struct lp_build_tgsi_context
*bld_base
,
1287 const struct tgsi_full_src_register
*reg
,
1288 enum tgsi_opcode_type type
, unsigned swizzle
)
1290 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1291 LLVMValueRef buffer
, base
, addr
;
1293 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1295 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1296 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1298 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1299 buffer
, base
, addr
, true);
1302 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1303 LLVMValueRef vertex_index
,
1304 LLVMValueRef param_index
,
1305 unsigned const_index
,
1307 unsigned driver_location
,
1309 unsigned num_components
,
1314 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1315 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1316 LLVMValueRef buffer
, base
, addr
;
1318 driver_location
= driver_location
/ 4;
1320 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1322 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1325 /* Add the constant index to the indirect index */
1326 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1327 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1329 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1332 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1333 param_index
, driver_location
,
1334 info
->input_semantic_name
,
1335 info
->input_semantic_index
,
1338 /* TODO: This will generate rather ordinary llvm code, although it
1339 * should be easy for the optimiser to fix up. In future we might want
1340 * to refactor buffer_load(), but for now this maximises code sharing
1341 * between the NIR and TGSI backends.
1343 LLVMValueRef value
[4];
1344 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1345 value
[i
] = buffer_load(&ctx
->bld_base
, ctx
->i32
, i
, buffer
, base
, addr
, true);
1348 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1351 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1352 const struct tgsi_full_instruction
*inst
,
1353 const struct tgsi_opcode_info
*info
,
1355 LLVMValueRef dst
[4])
1357 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1358 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1359 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1360 unsigned chan_index
;
1361 LLVMValueRef dw_addr
, stride
;
1362 LLVMValueRef buffer
, base
, buf_addr
;
1363 LLVMValueRef values
[4];
1364 bool skip_lds_store
;
1365 bool is_tess_factor
= false, is_tess_inner
= false;
1367 /* Only handle per-patch and per-vertex outputs here.
1368 * Vectors will be lowered to scalars and this function will be called again.
1370 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1371 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1372 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1376 if (reg
->Register
.Dimension
) {
1377 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1378 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1379 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1380 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1382 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1383 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1384 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1386 if (!reg
->Register
.Indirect
) {
1387 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1389 /* Always write tess factors into LDS for the TCS epilog. */
1390 if (name
== TGSI_SEMANTIC_TESSINNER
||
1391 name
== TGSI_SEMANTIC_TESSOUTER
) {
1392 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1393 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1394 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1395 is_tess_factor
= true;
1396 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1401 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1403 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1404 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1406 uint32_t writemask
= reg
->Register
.WriteMask
;
1408 chan_index
= u_bit_scan(&writemask
);
1409 LLVMValueRef value
= dst
[chan_index
];
1411 if (inst
->Instruction
.Saturate
)
1412 value
= ac_build_clamp(&ctx
->ac
, value
);
1414 /* Skip LDS stores if there is no LDS read of this output. */
1415 if (!skip_lds_store
)
1416 lds_store(ctx
, chan_index
, dw_addr
, value
);
1418 value
= ac_to_integer(&ctx
->ac
, value
);
1419 values
[chan_index
] = value
;
1421 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1422 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1424 4 * chan_index
, 1, 0, true, false);
1427 /* Write tess factors into VGPRs for the epilog. */
1428 if (is_tess_factor
&&
1429 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1430 if (!is_tess_inner
) {
1431 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1432 ctx
->invoc0_tess_factors
[chan_index
]);
1433 } else if (chan_index
< 2) {
1434 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1435 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1440 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1441 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1443 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1444 base
, 0, 1, 0, true, false);
1448 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1449 LLVMValueRef vertex_index
,
1450 LLVMValueRef param_index
,
1451 unsigned const_index
,
1453 unsigned driver_location
,
1460 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1461 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1462 LLVMValueRef dw_addr
, stride
;
1463 LLVMValueRef buffer
, base
, addr
;
1464 LLVMValueRef values
[4];
1465 bool skip_lds_store
;
1466 bool is_tess_factor
= false, is_tess_inner
= false;
1468 driver_location
= driver_location
/ 4;
1471 /* Add the constant index to the indirect index */
1472 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1473 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1475 if (const_index
!= 0)
1476 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1480 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1481 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1482 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1483 vertex_index
, param_index
,
1485 info
->output_semantic_name
,
1486 info
->output_semantic_index
,
1489 skip_lds_store
= !info
->reads_pervertex_outputs
;
1491 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1492 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1493 vertex_index
, param_index
,
1495 info
->output_semantic_name
,
1496 info
->output_semantic_index
,
1499 skip_lds_store
= !info
->reads_perpatch_outputs
;
1502 int name
= info
->output_semantic_name
[driver_location
];
1504 /* Always write tess factors into LDS for the TCS epilog. */
1505 if (name
== TGSI_SEMANTIC_TESSINNER
||
1506 name
== TGSI_SEMANTIC_TESSOUTER
) {
1507 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1508 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1509 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1510 is_tess_factor
= true;
1511 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1516 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1518 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1520 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1521 param_index
, driver_location
,
1522 info
->output_semantic_name
,
1523 info
->output_semantic_index
,
1526 for (unsigned chan
= 0; chan
< 4; chan
++) {
1527 if (!(writemask
& (1 << chan
)))
1529 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1531 /* Skip LDS stores if there is no LDS read of this output. */
1532 if (!skip_lds_store
)
1533 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1535 value
= ac_to_integer(&ctx
->ac
, value
);
1536 values
[chan
] = value
;
1538 if (writemask
!= 0xF && !is_tess_factor
) {
1539 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1541 4 * chan
, 1, 0, true, false);
1544 /* Write tess factors into VGPRs for the epilog. */
1545 if (is_tess_factor
&&
1546 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1547 if (!is_tess_inner
) {
1548 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1549 ctx
->invoc0_tess_factors
[chan
]);
1550 } else if (chan
< 2) {
1551 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1552 ctx
->invoc0_tess_factors
[4 + chan
]);
1557 if (writemask
== 0xF && !is_tess_factor
) {
1558 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1560 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1561 base
, 0, 1, 0, true, false);
1565 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1566 unsigned input_index
,
1567 unsigned vtx_offset_param
,
1571 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1572 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1573 struct si_shader
*shader
= ctx
->shader
;
1574 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1575 LLVMValueRef vtx_offset
, soffset
;
1576 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1577 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1578 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1582 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1584 /* GFX9 has the ESGS ring in LDS. */
1585 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1586 unsigned index
= vtx_offset_param
;
1588 switch (index
/ 2) {
1590 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1591 index
% 2 ? 16 : 0, 16);
1594 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1595 index
% 2 ? 16 : 0, 16);
1598 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1599 index
% 2 ? 16 : 0, 16);
1606 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1607 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1608 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1611 /* GFX6: input load from the ESGS ring in memory. */
1612 if (swizzle
== ~0) {
1613 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1615 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1616 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1619 return lp_build_gather_values(&ctx
->gallivm
, values
,
1623 /* Get the vertex offset parameter on GFX6. */
1624 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1626 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1628 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1630 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1631 vtx_offset
, soffset
, 0, 1, 0, true, false);
1632 if (llvm_type_is_64bit(ctx
, type
)) {
1633 LLVMValueRef value2
;
1634 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1636 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1637 ctx
->i32_0
, vtx_offset
, soffset
,
1638 0, 1, 0, true, false);
1639 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1641 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1644 static LLVMValueRef
fetch_input_gs(
1645 struct lp_build_tgsi_context
*bld_base
,
1646 const struct tgsi_full_src_register
*reg
,
1647 enum tgsi_opcode_type type
,
1650 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1651 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1653 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1654 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1655 return get_primitive_id(ctx
, swizzle
);
1657 if (!reg
->Register
.Dimension
)
1660 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1661 reg
->Dimension
.Index
,
1662 tgsi2llvmtype(bld_base
, type
),
1666 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1668 switch (interpolate
) {
1669 case TGSI_INTERPOLATE_CONSTANT
:
1672 case TGSI_INTERPOLATE_LINEAR
:
1673 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1674 return SI_PARAM_LINEAR_SAMPLE
;
1675 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1676 return SI_PARAM_LINEAR_CENTROID
;
1678 return SI_PARAM_LINEAR_CENTER
;
1680 case TGSI_INTERPOLATE_COLOR
:
1681 case TGSI_INTERPOLATE_PERSPECTIVE
:
1682 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1683 return SI_PARAM_PERSP_SAMPLE
;
1684 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1685 return SI_PARAM_PERSP_CENTROID
;
1687 return SI_PARAM_PERSP_CENTER
;
1690 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1695 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1696 unsigned attr_index
, unsigned chan
,
1697 LLVMValueRef prim_mask
,
1698 LLVMValueRef i
, LLVMValueRef j
)
1701 return ac_build_fs_interp(&ctx
->ac
,
1702 LLVMConstInt(ctx
->i32
, chan
, 0),
1703 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1706 return ac_build_fs_interp_mov(&ctx
->ac
,
1707 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1708 LLVMConstInt(ctx
->i32
, chan
, 0),
1709 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1714 * Interpolate a fragment shader input.
1716 * @param ctx context
1717 * @param input_index index of the input in hardware
1718 * @param semantic_name TGSI_SEMANTIC_*
1719 * @param semantic_index semantic index
1720 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1721 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1722 * @param interp_param interpolation weights (i,j)
1723 * @param prim_mask SI_PARAM_PRIM_MASK
1724 * @param face SI_PARAM_FRONT_FACE
1725 * @param result the return value (4 components)
1727 static void interp_fs_input(struct si_shader_context
*ctx
,
1728 unsigned input_index
,
1729 unsigned semantic_name
,
1730 unsigned semantic_index
,
1731 unsigned num_interp_inputs
,
1732 unsigned colors_read_mask
,
1733 LLVMValueRef interp_param
,
1734 LLVMValueRef prim_mask
,
1736 LLVMValueRef result
[4])
1738 LLVMValueRef i
= NULL
, j
= NULL
;
1741 /* fs.constant returns the param from the middle vertex, so it's not
1742 * really useful for flat shading. It's meant to be used for custom
1743 * interpolation (but the intrinsic can't fetch from the other two
1746 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1747 * to do the right thing. The only reason we use fs.constant is that
1748 * fs.interp cannot be used on integers, because they can be equal
1751 * When interp is false we will use fs.constant or for newer llvm,
1752 * amdgcn.interp.mov.
1754 bool interp
= interp_param
!= NULL
;
1757 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1758 LLVMVectorType(ctx
->f32
, 2), "");
1760 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1762 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1766 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1767 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1768 LLVMValueRef is_face_positive
;
1770 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1771 * otherwise it's at offset "num_inputs".
1773 unsigned back_attr_offset
= num_interp_inputs
;
1774 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1775 back_attr_offset
+= 1;
1777 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1778 face
, ctx
->i32_0
, "");
1780 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1781 LLVMValueRef front
, back
;
1783 front
= si_build_fs_interp(ctx
,
1786 back
= si_build_fs_interp(ctx
,
1787 back_attr_offset
, chan
,
1790 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1796 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1797 result
[0] = si_build_fs_interp(ctx
, input_index
,
1798 0, prim_mask
, i
, j
);
1800 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1801 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1803 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1804 result
[chan
] = si_build_fs_interp(ctx
,
1811 void si_llvm_load_input_fs(
1812 struct si_shader_context
*ctx
,
1813 unsigned input_index
,
1814 LLVMValueRef out
[4])
1816 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1817 struct si_shader
*shader
= ctx
->shader
;
1818 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1819 LLVMValueRef main_fn
= ctx
->main_fn
;
1820 LLVMValueRef interp_param
= NULL
;
1821 int interp_param_idx
;
1822 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1823 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1824 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1825 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1827 /* Get colors from input VGPRs (set by the prolog). */
1828 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1829 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1830 unsigned mask
= colors_read
>> (semantic_index
* 4);
1831 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1832 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1834 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1835 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1836 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1837 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1841 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1842 if (interp_param_idx
== -1)
1844 else if (interp_param_idx
) {
1845 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1848 interp_fs_input(ctx
, input_index
, semantic_name
,
1849 semantic_index
, 0, /* this param is unused */
1850 shader
->selector
->info
.colors_read
, interp_param
,
1851 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1852 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1856 static void declare_input_fs(
1857 struct si_shader_context
*ctx
,
1858 unsigned input_index
,
1859 const struct tgsi_full_declaration
*decl
,
1860 LLVMValueRef out
[4])
1862 si_llvm_load_input_fs(ctx
, input_index
, out
);
1865 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1867 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1872 * Load a dword from a constant buffer.
1874 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1875 LLVMValueRef resource
,
1876 LLVMValueRef offset
)
1878 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1879 0, 0, 0, true, true);
1882 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1884 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1885 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1886 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1887 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1888 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1890 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1891 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1892 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1894 LLVMValueRef pos
[4] = {
1895 buffer_load_const(ctx
, resource
, offset0
),
1896 buffer_load_const(ctx
, resource
, offset1
),
1897 LLVMConstReal(ctx
->f32
, 0),
1898 LLVMConstReal(ctx
->f32
, 0)
1901 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1904 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
,
1906 unsigned num_components
)
1908 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1909 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1911 LLVMValueRef coord
[4] = {
1912 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1913 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1918 /* For triangles, the vector should be (u, v, 1-u-v). */
1919 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1920 PIPE_PRIM_TRIANGLES
)
1921 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
1922 lp_build_add(bld
, coord
[0], coord
[1]));
1924 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
1927 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1928 unsigned semantic_name
)
1930 LLVMValueRef buffer
, base
, addr
;
1932 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1934 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1936 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1937 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1938 LLVMConstInt(ctx
->i32
, param
, 0));
1940 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1941 ~0, buffer
, base
, addr
, true);
1945 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1946 unsigned varying_id
)
1948 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1949 unsigned semantic_name
;
1951 switch (varying_id
) {
1952 case VARYING_SLOT_TESS_LEVEL_INNER
:
1953 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1955 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1956 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1959 unreachable("unknown tess level");
1962 return load_tess_level(ctx
, semantic_name
);
1966 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1968 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1969 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1970 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1971 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1972 return get_num_tcs_out_vertices(ctx
);
1974 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1977 void si_load_system_value(struct si_shader_context
*ctx
,
1979 const struct tgsi_full_declaration
*decl
)
1981 LLVMValueRef value
= 0;
1983 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1985 switch (decl
->Semantic
.Name
) {
1986 case TGSI_SEMANTIC_INSTANCEID
:
1987 value
= ctx
->abi
.instance_id
;
1990 case TGSI_SEMANTIC_VERTEXID
:
1991 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1993 ctx
->abi
.base_vertex
, "");
1996 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1997 /* Unused. Clarify the meaning in indexed vs. non-indexed
1998 * draws if this is ever used again. */
2002 case TGSI_SEMANTIC_BASEVERTEX
:
2004 /* For non-indexed draws, the base vertex set by the driver
2005 * (for direct draws) or the CP (for indirect draws) is the
2006 * first vertex ID, but GLSL expects 0 to be returned.
2008 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2009 LLVMValueRef indexed
;
2011 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
2012 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
2014 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
2015 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
2019 case TGSI_SEMANTIC_BASEINSTANCE
:
2020 value
= ctx
->abi
.start_instance
;
2023 case TGSI_SEMANTIC_DRAWID
:
2024 value
= ctx
->abi
.draw_id
;
2027 case TGSI_SEMANTIC_INVOCATIONID
:
2028 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2029 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2030 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2031 value
= ctx
->abi
.gs_invocation_id
;
2033 assert(!"INVOCATIONID not implemented");
2036 case TGSI_SEMANTIC_POSITION
:
2038 LLVMValueRef pos
[4] = {
2039 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2040 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2041 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2042 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2043 LLVMGetParam(ctx
->main_fn
,
2044 SI_PARAM_POS_W_FLOAT
)),
2046 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2050 case TGSI_SEMANTIC_FACE
:
2051 value
= ctx
->abi
.front_face
;
2054 case TGSI_SEMANTIC_SAMPLEID
:
2055 value
= get_sample_id(ctx
);
2058 case TGSI_SEMANTIC_SAMPLEPOS
: {
2059 LLVMValueRef pos
[4] = {
2060 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2061 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2062 LLVMConstReal(ctx
->f32
, 0),
2063 LLVMConstReal(ctx
->f32
, 0)
2065 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2066 TGSI_OPCODE_FRC
, pos
[0]);
2067 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2068 TGSI_OPCODE_FRC
, pos
[1]);
2069 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2073 case TGSI_SEMANTIC_SAMPLEMASK
:
2074 /* This can only occur with the OpenGL Core profile, which
2075 * doesn't support smoothing.
2077 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2080 case TGSI_SEMANTIC_TESSCOORD
:
2081 value
= si_load_tess_coord(&ctx
->abi
, NULL
, 4);
2084 case TGSI_SEMANTIC_VERTICESIN
:
2085 value
= si_load_patch_vertices_in(&ctx
->abi
);
2088 case TGSI_SEMANTIC_TESSINNER
:
2089 case TGSI_SEMANTIC_TESSOUTER
:
2090 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2093 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2094 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2096 LLVMValueRef buf
, slot
, val
[4];
2099 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2100 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2101 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2102 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2104 for (i
= 0; i
< 4; i
++)
2105 val
[i
] = buffer_load_const(ctx
, buf
,
2106 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2107 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2111 case TGSI_SEMANTIC_PRIMID
:
2112 value
= get_primitive_id(ctx
, 0);
2115 case TGSI_SEMANTIC_GRID_SIZE
:
2116 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_grid_size
);
2119 case TGSI_SEMANTIC_BLOCK_SIZE
:
2121 LLVMValueRef values
[3];
2123 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
2125 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
2126 unsigned sizes
[3] = {
2127 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
2128 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
2129 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
2132 for (i
= 0; i
< 3; ++i
)
2133 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
2135 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2137 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
2142 case TGSI_SEMANTIC_BLOCK_ID
:
2144 LLVMValueRef values
[3];
2146 for (int i
= 0; i
< 3; i
++) {
2147 values
[i
] = ctx
->i32_0
;
2148 if (ctx
->param_block_id
[i
] >= 0) {
2149 values
[i
] = LLVMGetParam(ctx
->main_fn
,
2150 ctx
->param_block_id
[i
]);
2153 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2157 case TGSI_SEMANTIC_THREAD_ID
:
2158 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_thread_id
);
2161 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2162 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2163 "llvm.amdgcn.ps.live",
2165 LP_FUNC_ATTR_READNONE
);
2166 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2167 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2170 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2171 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2174 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2175 value
= ac_get_thread_id(&ctx
->ac
);
2178 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2180 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2181 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2182 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2183 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2187 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2188 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2189 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2190 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2192 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2193 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2194 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2195 /* All bits set except LSB */
2196 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2199 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2201 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2202 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2203 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2204 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2205 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2206 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2211 assert(!"unknown system value");
2215 ctx
->system_values
[index
] = value
;
2218 void si_declare_compute_memory(struct si_shader_context
*ctx
,
2219 const struct tgsi_full_declaration
*decl
)
2221 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2223 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2226 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2227 assert(decl
->Range
.First
== decl
->Range
.Last
);
2228 assert(!ctx
->ac
.lds
);
2230 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2231 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2233 AC_LOCAL_ADDR_SPACE
);
2234 LLVMSetAlignment(var
, 4);
2236 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2239 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2241 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2242 ctx
->param_const_and_shader_buffers
);
2244 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2245 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2248 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2250 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2251 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2253 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2254 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2255 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2257 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2261 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2263 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2264 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2265 ctx
->param_const_and_shader_buffers
);
2267 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2268 index
= LLVMBuildSub(ctx
->ac
.builder
,
2269 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2272 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2275 static LLVMValueRef
fetch_constant(
2276 struct lp_build_tgsi_context
*bld_base
,
2277 const struct tgsi_full_src_register
*reg
,
2278 enum tgsi_opcode_type type
,
2281 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2282 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2283 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2286 LLVMValueRef addr
, bufp
;
2288 if (swizzle
== LP_CHAN_ALL
) {
2290 LLVMValueRef values
[4];
2291 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2292 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2294 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2297 /* Split 64-bit loads. */
2298 if (tgsi_type_is_64bit(type
)) {
2299 LLVMValueRef lo
, hi
;
2301 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2302 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2303 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2307 idx
= reg
->Register
.Index
* 4 + swizzle
;
2308 if (reg
->Register
.Indirect
) {
2309 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2311 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2314 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2315 if (sel
->info
.const_buffers_declared
== 1 &&
2316 sel
->info
.shader_buffers_declared
== 0) {
2318 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2320 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2321 * loads, and up to x4 load opcode merging. However, it leads to horrible
2322 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2324 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2326 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2327 * a descriptor and s_buffer_load_dword using it, so we can't expand
2328 * the pointer into a full descriptor like below. We have to use
2329 * s_load_dword instead. The only case when LLVM 5.0 would select
2330 * s_buffer_load_dword (that we have to prevent) is when we use use
2331 * a literal offset where we don't need bounds checking.
2333 if (ctx
->screen
->info
.chip_class
== SI
&&
2334 HAVE_LLVM
< 0x0600 &&
2335 !reg
->Register
.Indirect
) {
2336 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2337 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2338 return bitcast(bld_base
, type
, result
);
2341 /* Do the bounds checking with a descriptor, because
2342 * doing computation and manual bounds checking of 64-bit
2343 * addresses generates horrible VALU code with very high
2344 * VGPR usage and very low SIMD occupancy.
2346 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->i64
, "");
2347 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2349 LLVMValueRef desc_elems
[] = {
2350 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, ""),
2351 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, ""),
2352 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2353 LLVMConstInt(ctx
->i32
,
2354 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2355 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2356 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2357 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2358 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2359 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2361 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2362 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2363 return bitcast(bld_base
, type
, result
);
2366 assert(reg
->Register
.Dimension
);
2367 buf
= reg
->Dimension
.Index
;
2369 if (reg
->Dimension
.Indirect
) {
2370 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2372 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2373 reg
->Dimension
.Index
,
2374 ctx
->num_const_buffers
);
2375 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2376 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2377 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2379 bufp
= load_const_buffer_desc(ctx
, buf
);
2381 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2384 /* Upper 16 bits must be zero. */
2385 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
2386 LLVMValueRef val
[2])
2388 return LLVMBuildOr(ctx
->ac
.builder
, val
[0],
2389 LLVMBuildShl(ctx
->ac
.builder
, val
[1],
2390 LLVMConstInt(ctx
->i32
, 16, 0),
2394 /* Upper 16 bits are ignored and will be dropped. */
2395 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
2396 LLVMValueRef val
[2])
2398 LLVMValueRef v
[2] = {
2399 LLVMBuildAnd(ctx
->ac
.builder
, val
[0],
2400 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
2403 return si_llvm_pack_two_int16(ctx
, v
);
2406 /* Initialize arguments for the shader export intrinsic */
2407 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2408 LLVMValueRef
*values
,
2410 struct ac_export_args
*args
)
2412 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2413 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2414 LLVMValueRef val
[4];
2415 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2417 bool is_int8
, is_int10
;
2419 /* Default is 0xf. Adjusted below depending on the format. */
2420 args
->enabled_channels
= 0xf; /* writemask */
2422 /* Specify whether the EXEC mask represents the valid mask */
2423 args
->valid_mask
= 0;
2425 /* Specify whether this is the last export */
2428 /* Specify the target we are exporting */
2429 args
->target
= target
;
2431 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2432 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2433 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2434 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2436 assert(cbuf
>= 0 && cbuf
< 8);
2437 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2438 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2439 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2442 args
->compr
= false;
2443 args
->out
[0] = f32undef
;
2444 args
->out
[1] = f32undef
;
2445 args
->out
[2] = f32undef
;
2446 args
->out
[3] = f32undef
;
2448 switch (spi_shader_col_format
) {
2449 case V_028714_SPI_SHADER_ZERO
:
2450 args
->enabled_channels
= 0; /* writemask */
2451 args
->target
= V_008DFC_SQ_EXP_NULL
;
2454 case V_028714_SPI_SHADER_32_R
:
2455 args
->enabled_channels
= 1; /* writemask */
2456 args
->out
[0] = values
[0];
2459 case V_028714_SPI_SHADER_32_GR
:
2460 args
->enabled_channels
= 0x3; /* writemask */
2461 args
->out
[0] = values
[0];
2462 args
->out
[1] = values
[1];
2465 case V_028714_SPI_SHADER_32_AR
:
2466 args
->enabled_channels
= 0x9; /* writemask */
2467 args
->out
[0] = values
[0];
2468 args
->out
[3] = values
[3];
2471 case V_028714_SPI_SHADER_FP16_ABGR
:
2472 args
->compr
= 1; /* COMPR flag */
2474 for (chan
= 0; chan
< 2; chan
++) {
2475 LLVMValueRef pack_args
[2] = {
2477 values
[2 * chan
+ 1]
2479 LLVMValueRef packed
;
2481 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
2482 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2486 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2487 for (chan
= 0; chan
< 4; chan
++) {
2488 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
2489 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2490 LLVMConstReal(ctx
->f32
, 65535), "");
2491 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2492 LLVMConstReal(ctx
->f32
, 0.5), "");
2493 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2497 args
->compr
= 1; /* COMPR flag */
2498 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2499 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2502 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2503 for (chan
= 0; chan
< 4; chan
++) {
2504 /* Clamp between [-1, 1]. */
2505 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MIN
,
2507 LLVMConstReal(ctx
->f32
, 1));
2508 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_MAX
,
2510 LLVMConstReal(ctx
->f32
, -1));
2511 /* Convert to a signed integer in [-32767, 32767]. */
2512 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2513 LLVMConstReal(ctx
->f32
, 32767), "");
2514 /* If positive, add 0.5, else add -0.5. */
2515 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2516 LLVMBuildSelect(builder
,
2517 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2518 val
[chan
], ctx
->ac
.f32_0
, ""),
2519 LLVMConstReal(ctx
->f32
, 0.5),
2520 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
2521 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2524 args
->compr
= 1; /* COMPR flag */
2525 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2526 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2529 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2530 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2531 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
2532 LLVMValueRef max_alpha
=
2533 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
2536 for (chan
= 0; chan
< 4; chan
++) {
2537 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2538 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
, TGSI_OPCODE_UMIN
,
2540 chan
== 3 ? max_alpha
: max_rgb
);
2543 args
->compr
= 1; /* COMPR flag */
2544 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2545 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2549 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2550 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2551 is_int8
? 127 : is_int10
? 511 : 32767, 0);
2552 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
2553 is_int8
? -128 : is_int10
? -512 : -32768, 0);
2554 LLVMValueRef max_alpha
=
2555 !is_int10
? max_rgb
: ctx
->i32_1
;
2556 LLVMValueRef min_alpha
=
2557 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
2560 for (chan
= 0; chan
< 4; chan
++) {
2561 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2562 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2564 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
2565 val
[chan
] = lp_build_emit_llvm_binary(&ctx
->bld_base
,
2567 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
2570 args
->compr
= 1; /* COMPR flag */
2571 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2572 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2576 case V_028714_SPI_SHADER_32_ABGR
:
2577 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2582 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2585 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2587 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2588 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2589 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2590 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2591 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2592 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2593 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2594 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2596 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2599 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2600 SI_PARAM_ALPHA_REF
);
2601 LLVMValueRef alpha_pass
=
2602 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2603 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2605 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2609 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2611 unsigned samplemask_param
)
2613 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2614 LLVMValueRef coverage
;
2616 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2617 coverage
= LLVMGetParam(ctx
->main_fn
,
2619 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2621 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2623 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2625 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2628 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2629 LLVMConstReal(ctx
->f32
,
2630 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2632 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2635 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2636 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2640 unsigned const_chan
;
2641 LLVMValueRef base_elt
;
2642 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2643 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2644 SI_VS_CONST_CLIP_PLANES
, 0);
2645 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2647 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2648 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2653 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2655 /* Compute dot products of position and user clip plane vectors */
2656 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2657 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2659 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2660 const_chan
) * 4, 0);
2661 base_elt
= buffer_load_const(ctx
, const_resource
,
2664 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2665 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2666 out_elts
[const_chan
]));
2670 args
->enabled_channels
= 0xf;
2671 args
->valid_mask
= 0;
2673 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2678 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2682 if (so
->num_outputs
)
2683 fprintf(stderr
, "STREAMOUT\n");
2685 for (i
= 0; i
< so
->num_outputs
; i
++) {
2686 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2687 so
->output
[i
].start_component
;
2688 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2689 i
, so
->output
[i
].output_buffer
,
2690 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2691 so
->output
[i
].register_index
,
2692 mask
& 1 ? "x" : "",
2693 mask
& 2 ? "y" : "",
2694 mask
& 4 ? "z" : "",
2695 mask
& 8 ? "w" : "");
2699 static void emit_streamout_output(struct si_shader_context
*ctx
,
2700 LLVMValueRef
const *so_buffers
,
2701 LLVMValueRef
const *so_write_offsets
,
2702 struct pipe_stream_output
*stream_out
,
2703 struct si_shader_output_values
*shader_out
)
2705 unsigned buf_idx
= stream_out
->output_buffer
;
2706 unsigned start
= stream_out
->start_component
;
2707 unsigned num_comps
= stream_out
->num_components
;
2708 LLVMValueRef out
[4];
2710 assert(num_comps
&& num_comps
<= 4);
2711 if (!num_comps
|| num_comps
> 4)
2714 /* Load the output as int. */
2715 for (int j
= 0; j
< num_comps
; j
++) {
2716 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2718 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2721 /* Pack the output. */
2722 LLVMValueRef vdata
= NULL
;
2724 switch (num_comps
) {
2725 case 1: /* as i32 */
2728 case 2: /* as v2i32 */
2729 case 3: /* as v4i32 (aligned to 4) */
2730 case 4: /* as v4i32 */
2731 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2732 for (int j
= 0; j
< num_comps
; j
++) {
2733 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2734 LLVMConstInt(ctx
->i32
, j
, 0), "");
2739 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2741 so_write_offsets
[buf_idx
],
2743 stream_out
->dst_offset
* 4, 1, 1, true, false);
2747 * Write streamout data to buffers for vertex stream @p stream (different
2748 * vertex streams can occur for GS copy shaders).
2750 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2751 struct si_shader_output_values
*outputs
,
2752 unsigned noutput
, unsigned stream
)
2754 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2755 struct pipe_stream_output_info
*so
= &sel
->so
;
2756 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2758 struct lp_build_if_state if_ctx
;
2760 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2761 LLVMValueRef so_vtx_count
=
2762 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2764 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2766 /* can_emit = tid < so_vtx_count; */
2767 LLVMValueRef can_emit
=
2768 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2770 /* Emit the streamout code conditionally. This actually avoids
2771 * out-of-bounds buffer access. The hw tells us via the SGPR
2772 * (so_vtx_count) which threads are allowed to emit streamout data. */
2773 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2775 /* The buffer offset is computed as follows:
2776 * ByteOffset = streamout_offset[buffer_id]*4 +
2777 * (streamout_write_index + thread_id)*stride[buffer_id] +
2781 LLVMValueRef so_write_index
=
2782 LLVMGetParam(ctx
->main_fn
,
2783 ctx
->param_streamout_write_index
);
2785 /* Compute (streamout_write_index + thread_id). */
2786 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2788 /* Load the descriptor and compute the write offset for each
2789 * enabled buffer. */
2790 LLVMValueRef so_write_offset
[4] = {};
2791 LLVMValueRef so_buffers
[4];
2792 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2793 ctx
->param_rw_buffers
);
2795 for (i
= 0; i
< 4; i
++) {
2799 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2800 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2802 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2804 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2805 ctx
->param_streamout_offset
[i
]);
2806 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2808 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2809 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2810 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2813 /* Write streamout data. */
2814 for (i
= 0; i
< so
->num_outputs
; i
++) {
2815 unsigned reg
= so
->output
[i
].register_index
;
2820 if (stream
!= so
->output
[i
].stream
)
2823 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2824 &so
->output
[i
], &outputs
[reg
]);
2827 lp_build_endif(&if_ctx
);
2830 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2831 LLVMValueRef
*values
)
2833 struct ac_export_args args
;
2835 si_llvm_init_export_args(ctx
, values
,
2836 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2837 ac_build_export(&ctx
->ac
, &args
);
2840 static void si_build_param_exports(struct si_shader_context
*ctx
,
2841 struct si_shader_output_values
*outputs
,
2844 struct si_shader
*shader
= ctx
->shader
;
2845 unsigned param_count
= 0;
2847 for (unsigned i
= 0; i
< noutput
; i
++) {
2848 unsigned semantic_name
= outputs
[i
].semantic_name
;
2849 unsigned semantic_index
= outputs
[i
].semantic_index
;
2851 if (outputs
[i
].vertex_stream
[0] != 0 &&
2852 outputs
[i
].vertex_stream
[1] != 0 &&
2853 outputs
[i
].vertex_stream
[2] != 0 &&
2854 outputs
[i
].vertex_stream
[3] != 0)
2857 switch (semantic_name
) {
2858 case TGSI_SEMANTIC_LAYER
:
2859 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2860 case TGSI_SEMANTIC_CLIPDIST
:
2861 case TGSI_SEMANTIC_COLOR
:
2862 case TGSI_SEMANTIC_BCOLOR
:
2863 case TGSI_SEMANTIC_PRIMID
:
2864 case TGSI_SEMANTIC_FOG
:
2865 case TGSI_SEMANTIC_TEXCOORD
:
2866 case TGSI_SEMANTIC_GENERIC
:
2872 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2873 semantic_index
< SI_MAX_IO_GENERIC
) &&
2874 shader
->key
.opt
.kill_outputs
&
2875 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2878 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2880 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2881 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2884 shader
->info
.nr_param_exports
= param_count
;
2887 /* Generate export instructions for hardware VS shader stage */
2888 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2889 struct si_shader_output_values
*outputs
,
2892 struct si_shader
*shader
= ctx
->shader
;
2893 struct ac_export_args pos_args
[4] = {};
2894 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2898 /* Build position exports. */
2899 for (i
= 0; i
< noutput
; i
++) {
2900 switch (outputs
[i
].semantic_name
) {
2901 case TGSI_SEMANTIC_POSITION
:
2902 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2903 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2905 case TGSI_SEMANTIC_PSIZE
:
2906 psize_value
= outputs
[i
].values
[0];
2908 case TGSI_SEMANTIC_LAYER
:
2909 layer_value
= outputs
[i
].values
[0];
2911 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2912 viewport_index_value
= outputs
[i
].values
[0];
2914 case TGSI_SEMANTIC_EDGEFLAG
:
2915 edgeflag_value
= outputs
[i
].values
[0];
2917 case TGSI_SEMANTIC_CLIPDIST
:
2918 if (!shader
->key
.opt
.clip_disable
) {
2919 unsigned index
= 2 + outputs
[i
].semantic_index
;
2920 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2921 V_008DFC_SQ_EXP_POS
+ index
,
2925 case TGSI_SEMANTIC_CLIPVERTEX
:
2926 if (!shader
->key
.opt
.clip_disable
) {
2927 si_llvm_emit_clipvertex(ctx
, pos_args
,
2934 /* We need to add the position output manually if it's missing. */
2935 if (!pos_args
[0].out
[0]) {
2936 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2937 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2938 pos_args
[0].done
= 0; /* last export? */
2939 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2940 pos_args
[0].compr
= 0; /* COMPR flag */
2941 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2942 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2943 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2944 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2947 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2948 if (shader
->selector
->info
.writes_psize
||
2949 shader
->selector
->info
.writes_edgeflag
||
2950 shader
->selector
->info
.writes_viewport_index
||
2951 shader
->selector
->info
.writes_layer
) {
2952 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2953 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2954 (shader
->selector
->info
.writes_layer
<< 2);
2956 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2957 pos_args
[1].done
= 0; /* last export? */
2958 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2959 pos_args
[1].compr
= 0; /* COMPR flag */
2960 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2961 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2962 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2963 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2965 if (shader
->selector
->info
.writes_psize
)
2966 pos_args
[1].out
[0] = psize_value
;
2968 if (shader
->selector
->info
.writes_edgeflag
) {
2969 /* The output is a float, but the hw expects an integer
2970 * with the first bit containing the edge flag. */
2971 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2974 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2978 /* The LLVM intrinsic expects a float. */
2979 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2982 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2983 /* GFX9 has the layer in out.z[10:0] and the viewport
2984 * index in out.z[19:16].
2986 if (shader
->selector
->info
.writes_layer
)
2987 pos_args
[1].out
[2] = layer_value
;
2989 if (shader
->selector
->info
.writes_viewport_index
) {
2990 LLVMValueRef v
= viewport_index_value
;
2992 v
= ac_to_integer(&ctx
->ac
, v
);
2993 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2994 LLVMConstInt(ctx
->i32
, 16, 0), "");
2995 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2996 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2997 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2998 pos_args
[1].enabled_channels
|= 1 << 2;
3001 if (shader
->selector
->info
.writes_layer
)
3002 pos_args
[1].out
[2] = layer_value
;
3004 if (shader
->selector
->info
.writes_viewport_index
) {
3005 pos_args
[1].out
[3] = viewport_index_value
;
3006 pos_args
[1].enabled_channels
|= 1 << 3;
3011 for (i
= 0; i
< 4; i
++)
3012 if (pos_args
[i
].out
[0])
3013 shader
->info
.nr_pos_exports
++;
3016 for (i
= 0; i
< 4; i
++) {
3017 if (!pos_args
[i
].out
[0])
3020 /* Specify the target we are exporting */
3021 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3023 if (pos_idx
== shader
->info
.nr_pos_exports
)
3024 /* Specify that this is the last export */
3025 pos_args
[i
].done
= 1;
3027 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3030 /* Build parameter exports. */
3031 si_build_param_exports(ctx
, outputs
, noutput
);
3035 * Forward all outputs from the vertex shader to the TES. This is only used
3036 * for the fixed function TCS.
3038 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3040 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3041 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3042 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3045 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3046 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3047 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3049 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3050 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3051 lds_vertex_stride
, "");
3052 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3053 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3055 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3057 unsigned i
= u_bit_scan64(&inputs
);
3059 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3060 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3063 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3064 get_rel_patch_id(ctx
),
3066 LLVMConstInt(ctx
->i32
, i
, 0));
3068 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3071 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3072 buffer_offset
, 0, 1, 0, true, false);
3076 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3077 LLVMValueRef rel_patch_id
,
3078 LLVMValueRef invocation_id
,
3079 LLVMValueRef tcs_out_current_patch_data_offset
,
3080 LLVMValueRef invoc0_tf_outer
[4],
3081 LLVMValueRef invoc0_tf_inner
[2])
3083 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3084 struct si_shader
*shader
= ctx
->shader
;
3085 unsigned tess_inner_index
, tess_outer_index
;
3086 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3087 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3088 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3089 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3091 /* Add a barrier before loading tess factors from LDS. */
3092 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3093 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3095 /* Do this only for invocation 0, because the tess levels are per-patch,
3098 * This can't jump, because invocation 0 executes this. It should
3099 * at least mask out the loads and stores for other invocations.
3101 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3102 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3103 invocation_id
, ctx
->i32_0
, ""));
3105 /* Determine the layout of one tess factor element in the buffer. */
3106 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3107 case PIPE_PRIM_LINES
:
3108 stride
= 2; /* 2 dwords, 1 vec2 store */
3112 case PIPE_PRIM_TRIANGLES
:
3113 stride
= 4; /* 4 dwords, 1 vec4 store */
3117 case PIPE_PRIM_QUADS
:
3118 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3127 for (i
= 0; i
< 4; i
++) {
3128 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3129 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3132 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3133 /* Tess factors are in VGPRs. */
3134 for (i
= 0; i
< outer_comps
; i
++)
3135 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3136 for (i
= 0; i
< inner_comps
; i
++)
3137 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3139 /* Load tess_inner and tess_outer from LDS.
3140 * Any invocation can write them, so we can't get them from a temporary.
3142 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3143 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3145 lds_base
= tcs_out_current_patch_data_offset
;
3146 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3147 LLVMConstInt(ctx
->i32
,
3148 tess_inner_index
* 4, 0), "");
3149 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3150 LLVMConstInt(ctx
->i32
,
3151 tess_outer_index
* 4, 0), "");
3153 for (i
= 0; i
< outer_comps
; i
++) {
3155 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3157 for (i
= 0; i
< inner_comps
; i
++) {
3158 inner
[i
] = out
[outer_comps
+i
] =
3159 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3163 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3164 /* For isolines, the hardware expects tess factors in the
3165 * reverse order from what GLSL / TGSI specify.
3167 LLVMValueRef tmp
= out
[0];
3172 /* Convert the outputs to vectors for stores. */
3173 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3177 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3179 /* Get the buffer. */
3180 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
3182 /* Get the offset. */
3183 tf_base
= LLVMGetParam(ctx
->main_fn
,
3184 ctx
->param_tcs_factor_offset
);
3185 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3186 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3188 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3189 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3190 rel_patch_id
, ctx
->i32_0
, ""));
3192 /* Store the dynamic HS control word. */
3194 if (ctx
->screen
->info
.chip_class
<= VI
) {
3195 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3196 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3197 1, ctx
->i32_0
, tf_base
,
3198 offset
, 1, 0, true, false);
3202 lp_build_endif(&inner_if_ctx
);
3204 /* Store the tessellation factors. */
3205 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3206 MIN2(stride
, 4), byteoffset
, tf_base
,
3207 offset
, 1, 0, true, false);
3210 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3211 stride
- 4, byteoffset
, tf_base
,
3212 offset
, 1, 0, true, false);
3214 /* Store the tess factors into the offchip buffer if TES reads them. */
3215 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3216 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3217 LLVMValueRef tf_inner_offset
;
3218 unsigned param_outer
, param_inner
;
3220 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
3221 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3223 param_outer
= si_shader_io_get_unique_index_patch(
3224 TGSI_SEMANTIC_TESSOUTER
, 0);
3225 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3226 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3228 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3229 util_next_power_of_two(outer_comps
));
3231 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3232 outer_comps
, tf_outer_offset
,
3233 base
, 0, 1, 0, true, false);
3235 param_inner
= si_shader_io_get_unique_index_patch(
3236 TGSI_SEMANTIC_TESSINNER
, 0);
3237 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3238 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3240 inner_vec
= inner_comps
== 1 ? inner
[0] :
3241 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3242 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3243 inner_comps
, tf_inner_offset
,
3244 base
, 0, 1, 0, true, false);
3248 lp_build_endif(&if_ctx
);
3252 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3253 unsigned param
, unsigned return_index
)
3255 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3256 LLVMGetParam(ctx
->main_fn
, param
),
3261 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3262 unsigned param
, unsigned return_index
)
3264 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3265 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3267 return LLVMBuildInsertValue(builder
, ret
,
3268 ac_to_float(&ctx
->ac
, p
),
3273 si_insert_input_ptr_as_2xi32(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3274 unsigned param
, unsigned return_index
)
3276 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3277 LLVMValueRef ptr
, lo
, hi
;
3279 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3280 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3281 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3282 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3283 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3284 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3285 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3288 /* This only writes the tessellation factor levels. */
3289 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3290 unsigned max_outputs
,
3291 LLVMValueRef
*addrs
)
3293 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3294 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3295 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3296 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3298 si_copy_tcs_inputs(bld_base
);
3300 rel_patch_id
= get_rel_patch_id(ctx
);
3301 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3302 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3304 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3305 LLVMBasicBlockRef blocks
[2] = {
3306 LLVMGetInsertBlock(builder
),
3307 ctx
->merged_wrap_if_state
.entry_block
3309 LLVMValueRef values
[2];
3311 lp_build_endif(&ctx
->merged_wrap_if_state
);
3313 values
[0] = rel_patch_id
;
3314 values
[1] = LLVMGetUndef(ctx
->i32
);
3315 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3317 values
[0] = tf_lds_offset
;
3318 values
[1] = LLVMGetUndef(ctx
->i32
);
3319 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3321 values
[0] = invocation_id
;
3322 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3323 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3326 /* Return epilog parameters from this function. */
3327 LLVMValueRef ret
= ctx
->return_value
;
3330 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3331 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3332 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3333 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3334 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3335 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3336 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3337 /* Tess offchip and tess factor offsets are at the beginning. */
3338 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3339 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3340 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
3342 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3343 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3344 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3345 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3346 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3347 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3348 /* Tess offchip and tess factor offsets are after user SGPRs. */
3349 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3350 GFX6_TCS_NUM_USER_SGPR
);
3351 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3352 GFX6_TCS_NUM_USER_SGPR
+ 1);
3353 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3357 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3358 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3359 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3361 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3362 * the invocation_id output does not alias the tcs_rel_ids input,
3363 * which saves a V_MOV on gfx9.
3367 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3368 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3370 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3371 vgpr
++; /* skip the tess factor LDS offset */
3372 for (unsigned i
= 0; i
< 6; i
++) {
3373 LLVMValueRef value
=
3374 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3375 value
= ac_to_float(&ctx
->ac
, value
);
3376 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3379 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3381 ctx
->return_value
= ret
;
3384 /* Pass TCS inputs from LS to TCS on GFX9. */
3385 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3387 LLVMValueRef ret
= ctx
->return_value
;
3389 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3390 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3391 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3392 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3394 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3395 8 + SI_SGPR_RW_BUFFERS
);
3396 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3397 ctx
->param_bindless_samplers_and_images
,
3398 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3400 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3401 8 + SI_SGPR_VS_STATE_BITS
);
3402 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3403 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3404 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3405 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3406 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3407 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3408 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
3409 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
3410 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
3411 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
3413 unsigned desc_param
= ctx
->param_tcs_factor_addr_base64k
+ 2;
3414 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3415 8 + GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS
);
3416 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3417 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES
);
3419 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3420 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3421 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3423 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3424 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3426 ctx
->return_value
= ret
;
3429 /* Pass GS inputs from ES to GS on GFX9. */
3430 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3432 LLVMValueRef ret
= ctx
->return_value
;
3434 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3435 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3436 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3438 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
,
3439 8 + SI_SGPR_RW_BUFFERS
);
3440 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3441 ctx
->param_bindless_samplers_and_images
,
3442 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3444 unsigned desc_param
= ctx
->param_vs_state_bits
+ 1;
3445 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3446 8 + GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS
);
3447 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3448 8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES
);
3450 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3451 for (unsigned i
= 0; i
< 5; i
++) {
3452 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3453 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3455 ctx
->return_value
= ret
;
3458 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3459 unsigned max_outputs
,
3460 LLVMValueRef
*addrs
)
3462 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3463 struct si_shader
*shader
= ctx
->shader
;
3464 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3466 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3467 ctx
->param_rel_auto_id
);
3468 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3469 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3470 vertex_dw_stride
, "");
3472 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3473 * its inputs from it. */
3474 for (i
= 0; i
< info
->num_outputs
; i
++) {
3475 unsigned name
= info
->output_semantic_name
[i
];
3476 unsigned index
= info
->output_semantic_index
[i
];
3478 /* The ARB_shader_viewport_layer_array spec contains the
3481 * 2) What happens if gl_ViewportIndex or gl_Layer is
3482 * written in the vertex shader and a geometry shader is
3485 * RESOLVED: The value written by the last vertex processing
3486 * stage is used. If the last vertex processing stage
3487 * (vertex, tessellation evaluation or geometry) does not
3488 * statically assign to gl_ViewportIndex or gl_Layer, index
3489 * or layer zero is assumed.
3491 * So writes to those outputs in VS-as-LS are simply ignored.
3493 if (name
== TGSI_SEMANTIC_LAYER
||
3494 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3497 int param
= si_shader_io_get_unique_index(name
, index
);
3498 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3499 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3501 for (chan
= 0; chan
< 4; chan
++) {
3502 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3505 lds_store(ctx
, chan
, dw_addr
,
3506 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3510 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3511 si_set_ls_return_value_for_tcs(ctx
);
3514 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3515 unsigned max_outputs
,
3516 LLVMValueRef
*addrs
)
3518 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3519 struct si_shader
*es
= ctx
->shader
;
3520 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3521 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3522 ctx
->param_es2gs_offset
);
3523 LLVMValueRef lds_base
= NULL
;
3527 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3528 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3529 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3530 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3531 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3532 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3533 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3534 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3535 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3538 for (i
= 0; i
< info
->num_outputs
; i
++) {
3541 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3542 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3545 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3546 info
->output_semantic_index
[i
]);
3548 for (chan
= 0; chan
< 4; chan
++) {
3549 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3550 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3552 /* GFX9 has the ESGS ring in LDS. */
3553 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3554 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3558 ac_build_buffer_store_dword(&ctx
->ac
,
3560 out_val
, 1, NULL
, soffset
,
3561 (4 * param
+ chan
) * 4,
3566 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3567 si_set_es_return_value_for_gs(ctx
);
3570 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3572 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3573 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3575 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3578 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3580 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3581 si_get_gs_wave_id(ctx
));
3583 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3584 lp_build_endif(&ctx
->merged_wrap_if_state
);
3587 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3588 unsigned max_outputs
,
3589 LLVMValueRef
*addrs
)
3591 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3592 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3594 assert(info
->num_outputs
<= max_outputs
);
3596 emit_gs_epilogue(ctx
);
3599 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3601 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3602 emit_gs_epilogue(ctx
);
3605 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3606 unsigned max_outputs
,
3607 LLVMValueRef
*addrs
)
3609 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3610 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3611 struct si_shader_output_values
*outputs
= NULL
;
3614 assert(!ctx
->shader
->is_gs_copy_shader
);
3615 assert(info
->num_outputs
<= max_outputs
);
3617 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3619 /* Vertex color clamping.
3621 * This uses a state constant loaded in a user data SGPR and
3622 * an IF statement is added that clamps all colors if the constant
3625 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3626 struct lp_build_if_state if_ctx
;
3627 LLVMValueRef cond
= NULL
;
3628 LLVMValueRef addr
, val
;
3630 for (i
= 0; i
< info
->num_outputs
; i
++) {
3631 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3632 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3635 /* We've found a color. */
3637 /* The state is in the first bit of the user SGPR. */
3638 cond
= LLVMGetParam(ctx
->main_fn
,
3639 ctx
->param_vs_state_bits
);
3640 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3642 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3645 for (j
= 0; j
< 4; j
++) {
3646 addr
= addrs
[4 * i
+ j
];
3647 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3648 val
= ac_build_clamp(&ctx
->ac
, val
);
3649 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3654 lp_build_endif(&if_ctx
);
3657 for (i
= 0; i
< info
->num_outputs
; i
++) {
3658 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3659 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3661 for (j
= 0; j
< 4; j
++) {
3662 outputs
[i
].values
[j
] =
3663 LLVMBuildLoad(ctx
->ac
.builder
,
3666 outputs
[i
].vertex_stream
[j
] =
3667 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3671 if (ctx
->shader
->selector
->so
.num_outputs
)
3672 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3674 /* Export PrimitiveID. */
3675 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3676 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3677 outputs
[i
].semantic_index
= 0;
3678 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3679 for (j
= 1; j
< 4; j
++)
3680 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3682 memset(outputs
[i
].vertex_stream
, 0,
3683 sizeof(outputs
[i
].vertex_stream
));
3687 si_llvm_export_vs(ctx
, outputs
, i
);
3691 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3693 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3695 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3696 &ctx
->outputs
[0][0]);
3699 struct si_ps_exports
{
3701 struct ac_export_args args
[10];
3704 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3705 LLVMValueRef depth
, LLVMValueRef stencil
,
3706 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3708 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3709 struct ac_export_args args
;
3711 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3713 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3716 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3717 LLVMValueRef
*color
, unsigned index
,
3718 unsigned samplemask_param
,
3719 bool is_last
, struct si_ps_exports
*exp
)
3721 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3725 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3726 for (i
= 0; i
< 4; i
++)
3727 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3730 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3731 color
[3] = ctx
->ac
.f32_1
;
3735 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3736 si_alpha_test(bld_base
, color
[3]);
3738 /* Line & polygon smoothing */
3739 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3740 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3743 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3744 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3745 struct ac_export_args args
[8];
3748 /* Get the export arguments, also find out what the last one is. */
3749 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3750 si_llvm_init_export_args(ctx
, color
,
3751 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3752 if (args
[c
].enabled_channels
)
3756 /* Emit all exports. */
3757 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3758 if (is_last
&& last
== c
) {
3759 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3760 args
[c
].done
= 1; /* DONE bit */
3761 } else if (!args
[c
].enabled_channels
)
3762 continue; /* unnecessary NULL export */
3764 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3767 struct ac_export_args args
;
3770 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3773 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3774 args
.done
= 1; /* DONE bit */
3775 } else if (!args
.enabled_channels
)
3776 return; /* unnecessary NULL export */
3778 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3782 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3783 struct si_ps_exports
*exp
)
3785 for (unsigned i
= 0; i
< exp
->num
; i
++)
3786 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3789 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3791 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3792 struct lp_build_context
*base
= &bld_base
->base
;
3793 struct ac_export_args args
;
3795 args
.enabled_channels
= 0x0; /* enabled channels */
3796 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3797 args
.done
= 1; /* DONE bit */
3798 args
.target
= V_008DFC_SQ_EXP_NULL
;
3799 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3800 args
.out
[0] = base
->undef
; /* R */
3801 args
.out
[1] = base
->undef
; /* G */
3802 args
.out
[2] = base
->undef
; /* B */
3803 args
.out
[3] = base
->undef
; /* A */
3805 ac_build_export(&ctx
->ac
, &args
);
3809 * Return PS outputs in this order:
3811 * v[0:3] = color0.xyzw
3812 * v[4:7] = color1.xyzw
3817 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3819 * The alpha-ref SGPR is returned via its original location.
3821 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3822 unsigned max_outputs
,
3823 LLVMValueRef
*addrs
)
3825 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3826 struct si_shader
*shader
= ctx
->shader
;
3827 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3828 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3829 unsigned i
, j
, first_vgpr
, vgpr
;
3831 LLVMValueRef color
[8][4] = {};
3832 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3835 if (ctx
->postponed_kill
)
3836 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3838 /* Read the output values. */
3839 for (i
= 0; i
< info
->num_outputs
; i
++) {
3840 unsigned semantic_name
= info
->output_semantic_name
[i
];
3841 unsigned semantic_index
= info
->output_semantic_index
[i
];
3843 switch (semantic_name
) {
3844 case TGSI_SEMANTIC_COLOR
:
3845 assert(semantic_index
< 8);
3846 for (j
= 0; j
< 4; j
++) {
3847 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3848 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3849 color
[semantic_index
][j
] = result
;
3852 case TGSI_SEMANTIC_POSITION
:
3853 depth
= LLVMBuildLoad(builder
,
3854 addrs
[4 * i
+ 2], "");
3856 case TGSI_SEMANTIC_STENCIL
:
3857 stencil
= LLVMBuildLoad(builder
,
3858 addrs
[4 * i
+ 1], "");
3860 case TGSI_SEMANTIC_SAMPLEMASK
:
3861 samplemask
= LLVMBuildLoad(builder
,
3862 addrs
[4 * i
+ 0], "");
3865 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3870 /* Fill the return structure. */
3871 ret
= ctx
->return_value
;
3874 ret
= LLVMBuildInsertValue(builder
, ret
,
3875 ac_to_integer(&ctx
->ac
,
3876 LLVMGetParam(ctx
->main_fn
,
3877 SI_PARAM_ALPHA_REF
)),
3878 SI_SGPR_ALPHA_REF
, "");
3881 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3882 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3886 for (j
= 0; j
< 4; j
++)
3887 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3890 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3892 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3894 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3896 /* Add the input sample mask for smoothing at the end. */
3897 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3898 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3899 ret
= LLVMBuildInsertValue(builder
, ret
,
3900 LLVMGetParam(ctx
->main_fn
,
3901 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3903 ctx
->return_value
= ret
;
3906 static void membar_emit(
3907 const struct lp_build_tgsi_action
*action
,
3908 struct lp_build_tgsi_context
*bld_base
,
3909 struct lp_build_emit_data
*emit_data
)
3911 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3912 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3913 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3914 unsigned waitcnt
= NOOP_WAITCNT
;
3916 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3917 waitcnt
&= VM_CNT
& LGKM_CNT
;
3919 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3920 TGSI_MEMBAR_SHADER_BUFFER
|
3921 TGSI_MEMBAR_SHADER_IMAGE
))
3924 if (flags
& TGSI_MEMBAR_SHARED
)
3925 waitcnt
&= LGKM_CNT
;
3927 if (waitcnt
!= NOOP_WAITCNT
)
3928 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3931 static void clock_emit(
3932 const struct lp_build_tgsi_action
*action
,
3933 struct lp_build_tgsi_context
*bld_base
,
3934 struct lp_build_emit_data
*emit_data
)
3936 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3939 tmp
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.readcyclecounter",
3940 ctx
->i64
, NULL
, 0, 0);
3941 tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->v2i32
, "");
3943 emit_data
->output
[0] =
3944 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3945 emit_data
->output
[1] =
3946 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3949 static void si_llvm_emit_ddxy(
3950 const struct lp_build_tgsi_action
*action
,
3951 struct lp_build_tgsi_context
*bld_base
,
3952 struct lp_build_emit_data
*emit_data
)
3954 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3955 unsigned opcode
= emit_data
->info
->opcode
;
3960 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3961 mask
= AC_TID_MASK_LEFT
;
3962 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3963 mask
= AC_TID_MASK_TOP
;
3965 mask
= AC_TID_MASK_TOP_LEFT
;
3967 /* for DDX we want to next X pixel, DDY next Y pixel. */
3968 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3970 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3971 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3972 emit_data
->output
[emit_data
->chan
] = val
;
3976 * this takes an I,J coordinate pair,
3977 * and works out the X and Y derivatives.
3978 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3980 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3981 struct lp_build_tgsi_context
*bld_base
,
3982 LLVMValueRef interp_ij
)
3984 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3985 LLVMValueRef result
[4], a
;
3988 for (i
= 0; i
< 2; i
++) {
3989 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3990 LLVMConstInt(ctx
->i32
, i
, 0), "");
3991 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3992 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3995 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
3998 static void interp_fetch_args(
3999 struct lp_build_tgsi_context
*bld_base
,
4000 struct lp_build_emit_data
*emit_data
)
4002 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4003 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4005 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4006 /* offset is in second src, first two channels */
4007 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4010 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4013 emit_data
->arg_count
= 2;
4014 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4015 LLVMValueRef sample_position
;
4016 LLVMValueRef sample_id
;
4017 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4019 /* fetch sample ID, then fetch its sample position,
4020 * and place into first two channels.
4022 sample_id
= lp_build_emit_fetch(bld_base
,
4023 emit_data
->inst
, 1, TGSI_CHAN_X
);
4024 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4026 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4027 * Language 4.50 spec says about interpolateAtSample:
4029 * "Returns the value of the input interpolant variable at
4030 * the location of sample number sample. If multisample
4031 * buffers are not available, the input variable will be
4032 * evaluated at the center of the pixel. If sample sample
4033 * does not exist, the position used to interpolate the
4034 * input variable is undefined."
4036 * This means that sample_id values outside of the valid are
4037 * in fact valid input, and the usual mechanism for loading the
4038 * sample position doesn't work.
4040 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4041 LLVMValueRef center
[4] = {
4042 LLVMConstReal(ctx
->f32
, 0.5),
4043 LLVMConstReal(ctx
->f32
, 0.5),
4048 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
4050 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4053 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4057 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4058 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4061 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4062 emit_data
->arg_count
= 2;
4066 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4067 struct lp_build_tgsi_context
*bld_base
,
4068 struct lp_build_emit_data
*emit_data
)
4070 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4071 struct si_shader
*shader
= ctx
->shader
;
4072 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4073 LLVMValueRef interp_param
;
4074 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4075 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4076 int input_base
, input_array_size
;
4079 LLVMValueRef prim_mask
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
4080 LLVMValueRef array_idx
;
4081 int interp_param_idx
;
4085 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4087 if (input
->Register
.Indirect
) {
4088 unsigned array_id
= input
->Indirect
.ArrayID
;
4091 input_base
= info
->input_array_first
[array_id
];
4092 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4094 input_base
= inst
->Src
[0].Register
.Index
;
4095 input_array_size
= info
->num_inputs
- input_base
;
4098 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4099 1, input
->Register
.Index
- input_base
);
4101 input_base
= inst
->Src
[0].Register
.Index
;
4102 input_array_size
= 1;
4103 array_idx
= ctx
->i32_0
;
4106 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4108 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4109 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4110 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4112 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4114 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4115 if (interp_param_idx
== -1)
4117 else if (interp_param_idx
)
4118 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4120 interp_param
= NULL
;
4122 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4123 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4124 LLVMValueRef ij_out
[2];
4125 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4128 * take the I then J parameters, and the DDX/Y for it, and
4129 * calculate the IJ inputs for the interpolator.
4130 * temp1 = ddx * offset/sample.x + I;
4131 * interp_param.I = ddy * offset/sample.y + temp1;
4132 * temp1 = ddx * offset/sample.x + J;
4133 * interp_param.J = ddy * offset/sample.y + temp1;
4135 for (i
= 0; i
< 2; i
++) {
4136 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4137 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4138 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4139 ddxy_out
, ix_ll
, "");
4140 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4141 ddxy_out
, iy_ll
, "");
4142 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4143 interp_param
, ix_ll
, "");
4144 LLVMValueRef temp1
, temp2
;
4146 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4148 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4150 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4152 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4154 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4156 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4160 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4162 for (chan
= 0; chan
< 4; chan
++) {
4163 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4164 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4166 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4167 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4170 i
= LLVMBuildExtractElement(
4171 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4172 j
= LLVMBuildExtractElement(
4173 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4175 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4178 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4179 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4182 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4183 ctx
->ac
.builder
, gather
, array_idx
, "");
4187 static void vote_all_emit(
4188 const struct lp_build_tgsi_action
*action
,
4189 struct lp_build_tgsi_context
*bld_base
,
4190 struct lp_build_emit_data
*emit_data
)
4192 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4194 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4195 emit_data
->output
[emit_data
->chan
] =
4196 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4199 static void vote_any_emit(
4200 const struct lp_build_tgsi_action
*action
,
4201 struct lp_build_tgsi_context
*bld_base
,
4202 struct lp_build_emit_data
*emit_data
)
4204 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4206 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4207 emit_data
->output
[emit_data
->chan
] =
4208 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4211 static void vote_eq_emit(
4212 const struct lp_build_tgsi_action
*action
,
4213 struct lp_build_tgsi_context
*bld_base
,
4214 struct lp_build_emit_data
*emit_data
)
4216 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4218 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4219 emit_data
->output
[emit_data
->chan
] =
4220 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4223 static void ballot_emit(
4224 const struct lp_build_tgsi_action
*action
,
4225 struct lp_build_tgsi_context
*bld_base
,
4226 struct lp_build_emit_data
*emit_data
)
4228 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4229 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4232 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4233 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4234 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4236 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4237 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4240 static void read_invoc_fetch_args(
4241 struct lp_build_tgsi_context
*bld_base
,
4242 struct lp_build_emit_data
*emit_data
)
4244 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4245 0, emit_data
->src_chan
);
4247 /* Always read the source invocation (= lane) from the X channel. */
4248 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4250 emit_data
->arg_count
= 2;
4253 static void read_lane_emit(
4254 const struct lp_build_tgsi_action
*action
,
4255 struct lp_build_tgsi_context
*bld_base
,
4256 struct lp_build_emit_data
*emit_data
)
4258 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4260 /* We currently have no other way to prevent LLVM from lifting the icmp
4261 * calls to a dominating basic block.
4263 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4265 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4266 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4268 emit_data
->output
[emit_data
->chan
] =
4269 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4270 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4271 AC_FUNC_ATTR_READNONE
|
4272 AC_FUNC_ATTR_CONVERGENT
);
4275 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4276 struct lp_build_emit_data
*emit_data
)
4278 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4279 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4283 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4285 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4286 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4290 /* Emit one vertex from the geometry shader */
4291 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4293 LLVMValueRef
*addrs
)
4295 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4296 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4297 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4298 struct si_shader
*shader
= ctx
->shader
;
4299 struct lp_build_if_state if_state
;
4300 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4301 ctx
->param_gs2vs_offset
);
4302 LLVMValueRef gs_next_vertex
;
4303 LLVMValueRef can_emit
;
4304 unsigned chan
, offset
;
4307 /* Write vertex attribute values to GSVS ring */
4308 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4309 ctx
->gs_next_vertex
[stream
],
4312 /* If this thread has already emitted the declared maximum number of
4313 * vertices, skip the write: excessive vertex emissions are not
4314 * supposed to have any effect.
4316 * If the shader has no writes to memory, kill it instead. This skips
4317 * further memory loads and may allow LLVM to skip to the end
4320 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4321 LLVMConstInt(ctx
->i32
,
4322 shader
->selector
->gs_max_out_vertices
, 0), "");
4324 bool use_kill
= !info
->writes_memory
;
4326 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4328 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4332 for (i
= 0; i
< info
->num_outputs
; i
++) {
4333 for (chan
= 0; chan
< 4; chan
++) {
4334 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4335 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4338 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4339 LLVMValueRef voffset
=
4340 LLVMConstInt(ctx
->i32
, offset
*
4341 shader
->selector
->gs_max_out_vertices
, 0);
4344 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4345 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4347 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4349 ac_build_buffer_store_dword(&ctx
->ac
,
4350 ctx
->gsvs_ring
[stream
],
4352 voffset
, soffset
, 0,
4357 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4360 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4362 /* Signal vertex emission */
4363 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4364 si_get_gs_wave_id(ctx
));
4366 lp_build_endif(&if_state
);
4369 /* Emit one vertex from the geometry shader */
4370 static void si_tgsi_emit_vertex(
4371 const struct lp_build_tgsi_action
*action
,
4372 struct lp_build_tgsi_context
*bld_base
,
4373 struct lp_build_emit_data
*emit_data
)
4375 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4376 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4378 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4381 /* Cut one primitive from the geometry shader */
4382 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4385 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4387 /* Signal primitive cut */
4388 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4389 si_get_gs_wave_id(ctx
));
4392 /* Cut one primitive from the geometry shader */
4393 static void si_tgsi_emit_primitive(
4394 const struct lp_build_tgsi_action
*action
,
4395 struct lp_build_tgsi_context
*bld_base
,
4396 struct lp_build_emit_data
*emit_data
)
4398 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4400 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4403 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4404 struct lp_build_tgsi_context
*bld_base
,
4405 struct lp_build_emit_data
*emit_data
)
4407 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4409 /* SI only (thanks to a hw bug workaround):
4410 * The real barrier instruction isn’t needed, because an entire patch
4411 * always fits into a single wave.
4413 if (ctx
->screen
->info
.chip_class
== SI
&&
4414 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4415 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4419 lp_build_intrinsic(ctx
->ac
.builder
,
4420 "llvm.amdgcn.s.barrier",
4421 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4424 static const struct lp_build_tgsi_action interp_action
= {
4425 .fetch_args
= interp_fetch_args
,
4426 .emit
= build_interp_intrinsic
,
4429 static void si_create_function(struct si_shader_context
*ctx
,
4431 LLVMTypeRef
*returns
, unsigned num_returns
,
4432 struct si_function_info
*fninfo
,
4433 unsigned max_workgroup_size
)
4437 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4438 fninfo
->types
, fninfo
->num_params
);
4439 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4441 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4442 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4444 /* The combination of:
4448 * allows the optimization passes to move loads and reduces
4449 * SGPR spilling significantly.
4451 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4453 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4454 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4455 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4459 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4460 if (fninfo
->assign
[i
])
4461 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4464 if (max_workgroup_size
) {
4465 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4466 max_workgroup_size
);
4468 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4469 "no-signed-zeros-fp-math",
4472 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4473 /* These were copied from some LLVM test. */
4474 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4475 "less-precise-fpmad",
4477 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4480 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4483 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4489 static void declare_streamout_params(struct si_shader_context
*ctx
,
4490 struct pipe_stream_output_info
*so
,
4491 struct si_function_info
*fninfo
)
4495 /* Streamout SGPRs. */
4496 if (so
->num_outputs
) {
4497 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4498 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4500 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4502 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4504 /* A streamout buffer offset is loaded if the stride is non-zero. */
4505 for (i
= 0; i
< 4; i
++) {
4509 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4513 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4515 switch (shader
->selector
->type
) {
4516 case PIPE_SHADER_TESS_CTRL
:
4517 /* Return this so that LLVM doesn't remove s_barrier
4518 * instructions on chips where we use s_barrier. */
4519 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4521 case PIPE_SHADER_GEOMETRY
:
4522 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4524 case PIPE_SHADER_COMPUTE
:
4525 break; /* see below */
4531 const unsigned *properties
= shader
->selector
->info
.properties
;
4532 unsigned max_work_group_size
=
4533 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4534 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4535 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4537 if (!max_work_group_size
) {
4538 /* This is a variable group size compute shader,
4539 * compile it for the maximum possible group size.
4541 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4543 return max_work_group_size
;
4546 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4547 struct si_function_info
*fninfo
,
4550 LLVMTypeRef const_shader_buf_type
;
4552 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4553 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4554 const_shader_buf_type
= ctx
->f32
;
4556 const_shader_buf_type
= ctx
->v4i32
;
4558 unsigned const_and_shader_buffers
=
4559 add_arg(fninfo
, ARG_SGPR
,
4560 ac_array_in_const_addr_space(const_shader_buf_type
));
4562 unsigned samplers_and_images
=
4563 add_arg(fninfo
, ARG_SGPR
,
4564 ac_array_in_const_addr_space(ctx
->v8i32
));
4566 if (assign_params
) {
4567 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4568 ctx
->param_samplers_and_images
= samplers_and_images
;
4572 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4573 struct si_function_info
*fninfo
)
4575 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4576 ac_array_in_const_addr_space(ctx
->v4i32
));
4577 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4578 ac_array_in_const_addr_space(ctx
->v8i32
));
4581 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4582 struct si_function_info
*fninfo
)
4584 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4585 ac_array_in_const_addr_space(ctx
->v4i32
));
4586 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4587 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4588 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4589 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4592 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4593 struct si_function_info
*fninfo
,
4594 unsigned *num_prolog_vgprs
)
4596 struct si_shader
*shader
= ctx
->shader
;
4598 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4599 if (shader
->key
.as_ls
) {
4600 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4601 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4603 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4604 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4606 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4608 if (!shader
->is_gs_copy_shader
) {
4609 /* Vertex load indices. */
4610 ctx
->param_vertex_index0
= fninfo
->num_params
;
4611 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4612 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4613 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4617 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4618 struct si_function_info
*fninfo
)
4620 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4621 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4622 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4623 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4627 /* Convenient merged shader definitions. */
4628 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4629 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4632 static void create_function(struct si_shader_context
*ctx
)
4634 struct si_shader
*shader
= ctx
->shader
;
4635 struct si_function_info fninfo
;
4636 LLVMTypeRef returns
[16+32*4];
4637 unsigned i
, num_return_sgprs
;
4638 unsigned num_returns
= 0;
4639 unsigned num_prolog_vgprs
= 0;
4640 unsigned type
= ctx
->type
;
4641 unsigned vs_blit_property
=
4642 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4644 si_init_function_info(&fninfo
);
4646 /* Set MERGED shaders. */
4647 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4648 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4649 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4650 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4651 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4654 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4657 case PIPE_SHADER_VERTEX
:
4658 declare_global_desc_pointers(ctx
, &fninfo
);
4660 if (vs_blit_property
) {
4661 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4662 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4663 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4664 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4666 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4667 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4668 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4669 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4670 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4671 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4672 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4673 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4674 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4675 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4676 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4677 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4681 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4685 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4686 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4688 if (shader
->key
.as_es
) {
4689 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4690 } else if (shader
->key
.as_ls
) {
4691 /* no extra parameters */
4693 if (shader
->is_gs_copy_shader
) {
4694 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4695 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4698 /* The locations of the other parameters are assigned dynamically. */
4699 declare_streamout_params(ctx
, &shader
->selector
->so
,
4704 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4707 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4708 declare_global_desc_pointers(ctx
, &fninfo
);
4709 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4710 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4711 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4712 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4713 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4714 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4715 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4716 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4717 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4720 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4721 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4723 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4724 * placed after the user SGPRs.
4726 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4727 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4728 for (i
= 0; i
< 11; i
++)
4729 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4732 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4733 /* Merged stages have 8 system SGPRs at the beginning. */
4734 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_LO_HS */
4735 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* SPI_SHADER_USER_DATA_ADDR_HI_HS */
4736 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4737 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4738 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4739 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4740 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4741 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4743 declare_global_desc_pointers(ctx
, &fninfo
);
4744 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4745 ctx
->type
== PIPE_SHADER_VERTEX
);
4746 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4748 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4749 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4750 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4751 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4752 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4753 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4755 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4756 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4758 /* VGPRs (first TCS, then VS) */
4759 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4760 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4762 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4763 declare_vs_input_vgprs(ctx
, &fninfo
,
4766 /* LS return values are inputs to the TCS main shader part. */
4767 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4768 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4769 for (i
= 0; i
< 2; i
++)
4770 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4772 /* TCS return values are inputs to the TCS epilog.
4774 * param_tcs_offchip_offset, param_tcs_factor_offset,
4775 * param_tcs_offchip_layout, and param_rw_buffers
4776 * should be passed to the epilog.
4778 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4779 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4780 for (i
= 0; i
< 11; i
++)
4781 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4785 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4786 /* Merged stages have 8 system SGPRs at the beginning. */
4787 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_LO_GS) */
4788 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_USER_DATA_ADDR_HI_GS) */
4789 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4790 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4791 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4792 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4793 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4794 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4796 declare_global_desc_pointers(ctx
, &fninfo
);
4797 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4798 (ctx
->type
== PIPE_SHADER_VERTEX
||
4799 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4800 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4801 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4803 /* TESS_EVAL (and also GEOMETRY):
4804 * Declare as many input SGPRs as the VS has. */
4805 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4806 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4807 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4808 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4809 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4810 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4813 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4814 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4816 /* VGPRs (first GS, then VS/TES) */
4817 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4818 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4819 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4820 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4821 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4823 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4824 declare_vs_input_vgprs(ctx
, &fninfo
,
4826 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4827 declare_tes_input_vgprs(ctx
, &fninfo
);
4830 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4831 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4832 /* ES return values are inputs to GS. */
4833 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4834 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4835 for (i
= 0; i
< 5; i
++)
4836 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4840 case PIPE_SHADER_TESS_EVAL
:
4841 declare_global_desc_pointers(ctx
, &fninfo
);
4842 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4843 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4844 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4846 if (shader
->key
.as_es
) {
4847 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4848 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4849 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4851 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4852 declare_streamout_params(ctx
, &shader
->selector
->so
,
4854 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4858 declare_tes_input_vgprs(ctx
, &fninfo
);
4861 case PIPE_SHADER_GEOMETRY
:
4862 declare_global_desc_pointers(ctx
, &fninfo
);
4863 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4864 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4865 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4868 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4869 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4870 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4871 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4872 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4873 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4874 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4875 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4878 case PIPE_SHADER_FRAGMENT
:
4879 declare_global_desc_pointers(ctx
, &fninfo
);
4880 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4881 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4882 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->i32
, SI_PARAM_PRIM_MASK
);
4884 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4885 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4886 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4887 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4888 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4889 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4890 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4891 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4892 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4893 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4894 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4895 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4896 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4897 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4898 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4899 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4900 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4901 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4902 shader
->info
.face_vgpr_index
= 20;
4903 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4904 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4905 shader
->info
.ancillary_vgpr_index
= 21;
4906 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4907 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4908 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4910 /* Color inputs from the prolog. */
4911 if (shader
->selector
->info
.colors_read
) {
4912 unsigned num_color_elements
=
4913 util_bitcount(shader
->selector
->info
.colors_read
);
4915 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4916 for (i
= 0; i
< num_color_elements
; i
++)
4917 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4919 num_prolog_vgprs
+= num_color_elements
;
4922 /* Outputs for the epilog. */
4923 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4926 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4927 shader
->selector
->info
.writes_z
+
4928 shader
->selector
->info
.writes_stencil
+
4929 shader
->selector
->info
.writes_samplemask
+
4930 1 /* SampleMaskIn */;
4932 num_returns
= MAX2(num_returns
,
4934 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4936 for (i
= 0; i
< num_return_sgprs
; i
++)
4937 returns
[i
] = ctx
->i32
;
4938 for (; i
< num_returns
; i
++)
4939 returns
[i
] = ctx
->f32
;
4942 case PIPE_SHADER_COMPUTE
:
4943 declare_global_desc_pointers(ctx
, &fninfo
);
4944 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4945 if (shader
->selector
->info
.uses_grid_size
)
4946 ctx
->param_grid_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4947 if (shader
->selector
->info
.uses_block_size
)
4948 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4950 for (i
= 0; i
< 3; i
++) {
4951 ctx
->param_block_id
[i
] = -1;
4952 if (shader
->selector
->info
.uses_block_id
[i
])
4953 ctx
->param_block_id
[i
] = add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4956 ctx
->param_thread_id
= add_arg(&fninfo
, ARG_VGPR
, v3i32
);
4959 assert(0 && "unimplemented shader");
4963 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4964 si_get_max_workgroup_size(shader
));
4966 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4967 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4968 ctx
->separate_prolog
) {
4969 si_llvm_add_attribute(ctx
->main_fn
,
4970 "InitialPSInputAddr",
4971 S_0286D0_PERSP_SAMPLE_ENA(1) |
4972 S_0286D0_PERSP_CENTER_ENA(1) |
4973 S_0286D0_PERSP_CENTROID_ENA(1) |
4974 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4975 S_0286D0_LINEAR_CENTER_ENA(1) |
4976 S_0286D0_LINEAR_CENTROID_ENA(1) |
4977 S_0286D0_FRONT_FACE_ENA(1) |
4978 S_0286D0_ANCILLARY_ENA(1) |
4979 S_0286D0_POS_FIXED_PT_ENA(1));
4982 shader
->info
.num_input_sgprs
= 0;
4983 shader
->info
.num_input_vgprs
= 0;
4985 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4986 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4988 for (; i
< fninfo
.num_params
; ++i
)
4989 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4991 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4992 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4994 if (shader
->key
.as_ls
||
4995 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4996 /* GFX9 has the ESGS ring buffer in LDS. */
4997 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4998 ac_declare_lds_as_pointer(&ctx
->ac
);
5002 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5005 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5007 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5009 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5010 ctx
->param_rw_buffers
);
5012 if (ctx
->screen
->info
.chip_class
<= VI
&&
5013 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
5015 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5017 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5020 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5023 if (ctx
->shader
->is_gs_copy_shader
) {
5024 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5027 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5028 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5029 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5030 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5031 LLVMValueRef base_ring
;
5033 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5035 /* The conceptual layout of the GSVS ring is
5036 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5037 * but the real memory layout is swizzled across
5039 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5041 * Override the buffer descriptor accordingly.
5043 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5044 uint64_t stream_offset
= 0;
5046 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5047 unsigned num_components
;
5049 unsigned num_records
;
5050 LLVMValueRef ring
, tmp
;
5052 num_components
= sel
->info
.num_stream_output_components
[stream
];
5053 if (!num_components
)
5056 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5058 /* Limit on the stride field for <= CIK. */
5059 assert(stride
< (1 << 14));
5063 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5064 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5065 tmp
= LLVMBuildAdd(builder
, tmp
,
5066 LLVMConstInt(ctx
->i64
,
5067 stream_offset
, 0), "");
5068 stream_offset
+= stride
* 64;
5070 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5071 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5072 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5073 tmp
= LLVMBuildOr(builder
, tmp
,
5074 LLVMConstInt(ctx
->i32
,
5075 S_008F04_STRIDE(stride
) |
5076 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5077 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5078 ring
= LLVMBuildInsertElement(builder
, ring
,
5079 LLVMConstInt(ctx
->i32
, num_records
, 0),
5080 LLVMConstInt(ctx
->i32
, 2, 0), "");
5081 ring
= LLVMBuildInsertElement(builder
, ring
,
5082 LLVMConstInt(ctx
->i32
,
5083 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5084 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5085 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5086 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5087 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5088 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5089 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5090 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5091 S_008F0C_ADD_TID_ENABLE(1),
5093 LLVMConstInt(ctx
->i32
, 3, 0), "");
5095 ctx
->gsvs_ring
[stream
] = ring
;
5100 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5101 LLVMValueRef param_rw_buffers
,
5102 unsigned param_pos_fixed_pt
)
5104 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5105 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5107 /* Use the fixed-point gl_FragCoord input.
5108 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5109 * per coordinate to get the repeating effect.
5111 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5112 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5114 /* Load the buffer descriptor. */
5115 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5116 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5118 /* The stipple pattern is 32x32, each row has 32 bits. */
5119 offset
= LLVMBuildMul(builder
, address
[1],
5120 LLVMConstInt(ctx
->i32
, 4, 0), "");
5121 row
= buffer_load_const(ctx
, desc
, offset
);
5122 row
= ac_to_integer(&ctx
->ac
, row
);
5123 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5124 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5125 ac_build_kill_if_false(&ctx
->ac
, bit
);
5128 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5129 struct si_shader_config
*conf
,
5130 unsigned symbol_offset
)
5133 const unsigned char *config
=
5134 ac_shader_binary_config_start(binary
, symbol_offset
);
5135 bool really_needs_scratch
= false;
5137 /* LLVM adds SGPR spills to the scratch size.
5138 * Find out if we really need the scratch buffer.
5140 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5141 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5143 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5144 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5145 really_needs_scratch
= true;
5150 /* XXX: We may be able to emit some of these values directly rather than
5151 * extracting fields to be emitted later.
5154 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5155 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5156 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5158 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5159 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5160 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5161 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5162 case R_00B848_COMPUTE_PGM_RSRC1
:
5163 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5164 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5165 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5166 conf
->rsrc1
= value
;
5168 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5169 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5171 case R_00B84C_COMPUTE_PGM_RSRC2
:
5172 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5173 conf
->rsrc2
= value
;
5175 case R_0286CC_SPI_PS_INPUT_ENA
:
5176 conf
->spi_ps_input_ena
= value
;
5178 case R_0286D0_SPI_PS_INPUT_ADDR
:
5179 conf
->spi_ps_input_addr
= value
;
5181 case R_0286E8_SPI_TMPRING_SIZE
:
5182 case R_00B860_COMPUTE_TMPRING_SIZE
:
5183 /* WAVESIZE is in units of 256 dwords. */
5184 if (really_needs_scratch
)
5185 conf
->scratch_bytes_per_wave
=
5186 G_00B860_WAVESIZE(value
) * 256 * 4;
5188 case 0x4: /* SPILLED_SGPRS */
5189 conf
->spilled_sgprs
= value
;
5191 case 0x8: /* SPILLED_VGPRS */
5192 conf
->spilled_vgprs
= value
;
5196 static bool printed
;
5199 fprintf(stderr
, "Warning: LLVM emitted unknown "
5200 "config register: 0x%x\n", reg
);
5208 if (!conf
->spi_ps_input_addr
)
5209 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5212 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5213 uint64_t scratch_va
)
5216 uint32_t scratch_rsrc_dword0
= scratch_va
;
5217 uint32_t scratch_rsrc_dword1
=
5218 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5220 /* Enable scratch coalescing. */
5221 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5223 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5224 const struct ac_shader_reloc
*reloc
=
5225 &shader
->binary
.relocs
[i
];
5226 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5227 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5228 &scratch_rsrc_dword0
, 4);
5229 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5230 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5231 &scratch_rsrc_dword1
, 4);
5236 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5238 unsigned size
= shader
->binary
.code_size
;
5241 size
+= shader
->prolog
->binary
.code_size
;
5242 if (shader
->previous_stage
)
5243 size
+= shader
->previous_stage
->binary
.code_size
;
5244 if (shader
->prolog2
)
5245 size
+= shader
->prolog2
->binary
.code_size
;
5247 size
+= shader
->epilog
->binary
.code_size
;
5251 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5253 const struct ac_shader_binary
*prolog
=
5254 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5255 const struct ac_shader_binary
*previous_stage
=
5256 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5257 const struct ac_shader_binary
*prolog2
=
5258 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5259 const struct ac_shader_binary
*epilog
=
5260 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5261 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5262 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5263 (!epilog
? mainb
->rodata_size
: 0);
5266 assert(!prolog
|| !prolog
->rodata_size
);
5267 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5268 assert(!prolog2
|| !prolog2
->rodata_size
);
5269 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5270 !mainb
->rodata_size
);
5271 assert(!epilog
|| !epilog
->rodata_size
);
5273 r600_resource_reference(&shader
->bo
, NULL
);
5274 shader
->bo
= (struct r600_resource
*)
5275 si_aligned_buffer_create(&sscreen
->b
,
5276 sscreen
->cpdma_prefetch_writes_memory
?
5277 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5278 PIPE_USAGE_IMMUTABLE
,
5279 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5285 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5286 PIPE_TRANSFER_READ_WRITE
|
5287 PIPE_TRANSFER_UNSYNCHRONIZED
);
5289 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5290 * endian-independent. */
5292 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5293 ptr
+= prolog
->code_size
;
5295 if (previous_stage
) {
5296 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5297 ptr
+= previous_stage
->code_size
;
5300 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5301 ptr
+= prolog2
->code_size
;
5304 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5305 ptr
+= mainb
->code_size
;
5308 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5309 else if (mainb
->rodata_size
> 0)
5310 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5312 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5316 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5317 struct pipe_debug_callback
*debug
,
5318 const char *name
, FILE *file
)
5323 if (binary
->disasm_string
) {
5324 fprintf(file
, "Shader %s disassembly:\n", name
);
5325 fprintf(file
, "%s", binary
->disasm_string
);
5327 if (debug
&& debug
->debug_message
) {
5328 /* Very long debug messages are cut off, so send the
5329 * disassembly one line at a time. This causes more
5330 * overhead, but on the plus side it simplifies
5331 * parsing of resulting logs.
5333 pipe_debug_message(debug
, SHADER_INFO
,
5334 "Shader Disassembly Begin");
5336 line
= binary
->disasm_string
;
5338 p
= util_strchrnul(line
, '\n');
5342 pipe_debug_message(debug
, SHADER_INFO
,
5343 "%.*s", count
, line
);
5351 pipe_debug_message(debug
, SHADER_INFO
,
5352 "Shader Disassembly End");
5355 fprintf(file
, "Shader %s binary:\n", name
);
5356 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5357 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5358 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5359 binary
->code
[i
+ 1], binary
->code
[i
]);
5364 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5365 const struct si_shader
*shader
,
5366 struct pipe_debug_callback
*debug
,
5369 bool check_debug_option
)
5371 const struct si_shader_config
*conf
= &shader
->config
;
5372 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
5373 unsigned code_size
= si_get_shader_binary_size(shader
);
5374 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5375 unsigned lds_per_wave
= 0;
5376 unsigned max_simd_waves
;
5378 switch (sscreen
->info
.family
) {
5379 /* These always have 8 waves: */
5380 case CHIP_POLARIS10
:
5381 case CHIP_POLARIS11
:
5382 case CHIP_POLARIS12
:
5386 max_simd_waves
= 10;
5389 /* Compute LDS usage for PS. */
5390 switch (processor
) {
5391 case PIPE_SHADER_FRAGMENT
:
5392 /* The minimum usage per wave is (num_inputs * 48). The maximum
5393 * usage is (num_inputs * 48 * 16).
5394 * We can get anything in between and it varies between waves.
5396 * The 48 bytes per input for a single primitive is equal to
5397 * 4 bytes/component * 4 components/input * 3 points.
5399 * Other stages don't know the size at compile time or don't
5400 * allocate LDS per wave, but instead they do it per thread group.
5402 lds_per_wave
= conf
->lds_size
* lds_increment
+
5403 align(num_inputs
* 48, lds_increment
);
5405 case PIPE_SHADER_COMPUTE
:
5406 if (shader
->selector
) {
5407 unsigned max_workgroup_size
=
5408 si_get_max_workgroup_size(shader
);
5409 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5410 DIV_ROUND_UP(max_workgroup_size
, 64);
5415 /* Compute the per-SIMD wave counts. */
5416 if (conf
->num_sgprs
) {
5417 if (sscreen
->info
.chip_class
>= VI
)
5418 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5420 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5423 if (conf
->num_vgprs
)
5424 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5426 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5427 * 16KB makes some SIMDs unoccupied). */
5429 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5431 if (!check_debug_option
||
5432 si_can_dump_shader(sscreen
, processor
)) {
5433 if (processor
== PIPE_SHADER_FRAGMENT
) {
5434 fprintf(file
, "*** SHADER CONFIG ***\n"
5435 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5436 "SPI_PS_INPUT_ENA = 0x%04x\n",
5437 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5440 fprintf(file
, "*** SHADER STATS ***\n"
5443 "Spilled SGPRs: %d\n"
5444 "Spilled VGPRs: %d\n"
5445 "Private memory VGPRs: %d\n"
5446 "Code Size: %d bytes\n"
5448 "Scratch: %d bytes per wave\n"
5450 "********************\n\n\n",
5451 conf
->num_sgprs
, conf
->num_vgprs
,
5452 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5453 conf
->private_mem_vgprs
, code_size
,
5454 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5458 pipe_debug_message(debug
, SHADER_INFO
,
5459 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5460 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5461 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5462 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
5463 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5464 max_simd_waves
, conf
->spilled_sgprs
,
5465 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5468 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5470 switch (processor
) {
5471 case PIPE_SHADER_VERTEX
:
5472 if (shader
->key
.as_es
)
5473 return "Vertex Shader as ES";
5474 else if (shader
->key
.as_ls
)
5475 return "Vertex Shader as LS";
5477 return "Vertex Shader as VS";
5478 case PIPE_SHADER_TESS_CTRL
:
5479 return "Tessellation Control Shader";
5480 case PIPE_SHADER_TESS_EVAL
:
5481 if (shader
->key
.as_es
)
5482 return "Tessellation Evaluation Shader as ES";
5484 return "Tessellation Evaluation Shader as VS";
5485 case PIPE_SHADER_GEOMETRY
:
5486 if (shader
->is_gs_copy_shader
)
5487 return "GS Copy Shader as VS";
5489 return "Geometry Shader";
5490 case PIPE_SHADER_FRAGMENT
:
5491 return "Pixel Shader";
5492 case PIPE_SHADER_COMPUTE
:
5493 return "Compute Shader";
5495 return "Unknown Shader";
5499 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5500 struct pipe_debug_callback
*debug
, unsigned processor
,
5501 FILE *file
, bool check_debug_option
)
5503 if (!check_debug_option
||
5504 si_can_dump_shader(sscreen
, processor
))
5505 si_dump_shader_key(processor
, shader
, file
);
5507 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5508 if (shader
->previous_stage
&&
5509 shader
->previous_stage
->binary
.llvm_ir_string
) {
5510 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5511 si_get_shader_name(shader
, processor
));
5512 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5515 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5516 si_get_shader_name(shader
, processor
));
5517 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5520 if (!check_debug_option
||
5521 (si_can_dump_shader(sscreen
, processor
) &&
5522 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5523 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5526 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5527 debug
, "prolog", file
);
5528 if (shader
->previous_stage
)
5529 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5530 debug
, "previous stage", file
);
5531 if (shader
->prolog2
)
5532 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5533 debug
, "prolog2", file
);
5535 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5538 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5539 debug
, "epilog", file
);
5540 fprintf(file
, "\n");
5543 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
5544 check_debug_option
);
5547 static int si_compile_llvm(struct si_screen
*sscreen
,
5548 struct ac_shader_binary
*binary
,
5549 struct si_shader_config
*conf
,
5550 LLVMTargetMachineRef tm
,
5552 struct pipe_debug_callback
*debug
,
5557 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5559 if (si_can_dump_shader(sscreen
, processor
)) {
5560 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5562 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5563 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5564 ac_dump_module(mod
);
5565 fprintf(stderr
, "\n");
5569 if (sscreen
->record_llvm_ir
) {
5570 char *ir
= LLVMPrintModuleToString(mod
);
5571 binary
->llvm_ir_string
= strdup(ir
);
5572 LLVMDisposeMessage(ir
);
5575 if (!si_replace_shader(count
, binary
)) {
5576 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5581 si_shader_binary_read_config(binary
, conf
, 0);
5583 /* Enable 64-bit and 16-bit denormals, because there is no performance
5586 * If denormals are enabled, all floating-point output modifiers are
5589 * Don't enable denormals for 32-bit floats, because:
5590 * - Floating-point output modifiers would be ignored by the hw.
5591 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5592 * have to stop using those.
5593 * - SI & CI would be very slow.
5595 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5597 FREE(binary
->config
);
5598 FREE(binary
->global_symbol_offsets
);
5599 binary
->config
= NULL
;
5600 binary
->global_symbol_offsets
= NULL
;
5602 /* Some shaders can't have rodata because their binaries can be
5605 if (binary
->rodata_size
&&
5606 (processor
== PIPE_SHADER_VERTEX
||
5607 processor
== PIPE_SHADER_TESS_CTRL
||
5608 processor
== PIPE_SHADER_TESS_EVAL
||
5609 processor
== PIPE_SHADER_FRAGMENT
)) {
5610 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5617 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5619 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5620 LLVMBuildRetVoid(ctx
->ac
.builder
);
5622 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5625 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5627 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5628 LLVMTargetMachineRef tm
,
5629 struct si_shader_selector
*gs_selector
,
5630 struct pipe_debug_callback
*debug
)
5632 struct si_shader_context ctx
;
5633 struct si_shader
*shader
;
5634 LLVMBuilderRef builder
;
5635 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5636 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5637 struct si_shader_output_values
*outputs
;
5638 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5641 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5646 shader
= CALLOC_STRUCT(si_shader
);
5652 /* We can leave the fence as permanently signaled because the GS copy
5653 * shader only becomes visible globally after it has been compiled. */
5654 util_queue_fence_init(&shader
->ready
);
5656 shader
->selector
= gs_selector
;
5657 shader
->is_gs_copy_shader
= true;
5659 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5660 ctx
.shader
= shader
;
5661 ctx
.type
= PIPE_SHADER_VERTEX
;
5663 builder
= ctx
.ac
.builder
;
5665 create_function(&ctx
);
5666 preload_ring_buffers(&ctx
);
5668 LLVMValueRef voffset
=
5669 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5671 /* Fetch the vertex stream ID.*/
5672 LLVMValueRef stream_id
;
5674 if (gs_selector
->so
.num_outputs
)
5675 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5677 stream_id
= ctx
.i32_0
;
5679 /* Fill in output information. */
5680 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5681 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5682 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5684 for (int chan
= 0; chan
< 4; chan
++) {
5685 outputs
[i
].vertex_stream
[chan
] =
5686 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5690 LLVMBasicBlockRef end_bb
;
5691 LLVMValueRef switch_inst
;
5693 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5694 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5696 for (int stream
= 0; stream
< 4; stream
++) {
5697 LLVMBasicBlockRef bb
;
5700 if (!gsinfo
->num_stream_output_components
[stream
])
5703 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5706 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5707 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5708 LLVMPositionBuilderAtEnd(builder
, bb
);
5710 /* Fetch vertex data from GSVS ring */
5712 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5713 for (unsigned chan
= 0; chan
< 4; chan
++) {
5714 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5715 outputs
[i
].vertex_stream
[chan
] != stream
) {
5716 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5720 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5721 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5724 outputs
[i
].values
[chan
] =
5725 ac_build_buffer_load(&ctx
.ac
,
5726 ctx
.gsvs_ring
[0], 1,
5733 /* Streamout and exports. */
5734 if (gs_selector
->so
.num_outputs
) {
5735 si_llvm_emit_streamout(&ctx
, outputs
,
5736 gsinfo
->num_outputs
,
5741 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5743 LLVMBuildBr(builder
, end_bb
);
5746 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5748 LLVMBuildRetVoid(ctx
.ac
.builder
);
5750 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5751 si_llvm_optimize_module(&ctx
);
5753 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5754 &ctx
.shader
->config
, ctx
.tm
,
5756 debug
, PIPE_SHADER_GEOMETRY
,
5759 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5760 fprintf(stderr
, "GS Copy Shader:\n");
5761 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5762 PIPE_SHADER_GEOMETRY
, stderr
, true);
5763 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5766 si_llvm_dispose(&ctx
);
5777 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5778 const struct si_vs_prolog_bits
*prolog
,
5779 const char *prefix
, FILE *f
)
5781 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5782 prefix
, prolog
->instance_divisor_is_one
);
5783 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5784 prefix
, prolog
->instance_divisor_is_fetched
);
5785 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5786 prefix
, prolog
->ls_vgpr_fix
);
5788 fprintf(f
, " mono.vs.fix_fetch = {");
5789 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5790 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5794 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5797 const struct si_shader_key
*key
= &shader
->key
;
5799 fprintf(f
, "SHADER KEY\n");
5801 switch (processor
) {
5802 case PIPE_SHADER_VERTEX
:
5803 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5804 "part.vs.prolog", f
);
5805 fprintf(f
, " as_es = %u\n", key
->as_es
);
5806 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5807 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5808 key
->mono
.u
.vs_export_prim_id
);
5811 case PIPE_SHADER_TESS_CTRL
:
5812 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5813 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5814 "part.tcs.ls_prolog", f
);
5816 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5817 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5820 case PIPE_SHADER_TESS_EVAL
:
5821 fprintf(f
, " as_es = %u\n", key
->as_es
);
5822 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5823 key
->mono
.u
.vs_export_prim_id
);
5826 case PIPE_SHADER_GEOMETRY
:
5827 if (shader
->is_gs_copy_shader
)
5830 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5831 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5832 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5833 "part.gs.vs_prolog", f
);
5835 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5838 case PIPE_SHADER_COMPUTE
:
5841 case PIPE_SHADER_FRAGMENT
:
5842 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5843 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5844 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5845 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5846 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5847 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5848 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5849 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5850 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5851 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5852 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5853 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5854 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5855 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5856 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5857 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5858 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5865 if ((processor
== PIPE_SHADER_GEOMETRY
||
5866 processor
== PIPE_SHADER_TESS_EVAL
||
5867 processor
== PIPE_SHADER_VERTEX
) &&
5868 !key
->as_es
&& !key
->as_ls
) {
5869 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5870 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5874 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5875 struct si_screen
*sscreen
,
5876 LLVMTargetMachineRef tm
)
5878 struct lp_build_tgsi_context
*bld_base
;
5880 si_llvm_context_init(ctx
, sscreen
, tm
);
5882 bld_base
= &ctx
->bld_base
;
5883 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5885 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5886 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5887 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5889 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5891 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5893 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5894 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5895 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5896 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5898 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5899 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5900 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5901 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5902 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5903 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5904 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5905 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5906 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5908 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5909 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5910 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5913 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5915 struct si_shader
*shader
= ctx
->shader
;
5916 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5918 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5919 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5920 shader
->key
.as_ls
||
5924 ac_optimize_vs_outputs(&ctx
->ac
,
5926 shader
->info
.vs_output_param_offset
,
5928 &shader
->info
.nr_param_exports
);
5931 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5933 ctx
->shader
->config
.private_mem_vgprs
= 0;
5935 /* Process all LLVM instructions. */
5936 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5938 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5941 LLVMValueRef inst
= next
;
5942 next
= LLVMGetNextInstruction(next
);
5944 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5947 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5948 /* No idea why LLVM aligns allocas to 4 elements. */
5949 unsigned alignment
= LLVMGetAlignment(inst
);
5950 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5951 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5953 bb
= LLVMGetNextBasicBlock(bb
);
5957 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5958 unsigned param
, unsigned bitoffset
)
5960 LLVMValueRef args
[] = {
5961 LLVMGetParam(ctx
->main_fn
, param
),
5962 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5964 lp_build_intrinsic(ctx
->ac
.builder
,
5965 "llvm.amdgcn.init.exec.from.input",
5966 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5969 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5970 const struct si_vs_prolog_bits
*key
)
5972 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5974 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5977 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5980 struct si_shader
*shader
= ctx
->shader
;
5981 struct si_shader_selector
*sel
= shader
->selector
;
5982 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5984 // TODO clean all this up!
5985 switch (ctx
->type
) {
5986 case PIPE_SHADER_VERTEX
:
5987 ctx
->load_input
= declare_input_vs
;
5988 if (shader
->key
.as_ls
)
5989 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5990 else if (shader
->key
.as_es
)
5991 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5993 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5994 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5996 case PIPE_SHADER_TESS_CTRL
:
5997 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5998 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5999 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6000 bld_base
->emit_store
= store_output_tcs
;
6001 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6002 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6003 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6004 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6006 case PIPE_SHADER_TESS_EVAL
:
6007 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6008 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6009 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6010 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6011 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6012 if (shader
->key
.as_es
)
6013 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6015 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6016 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6018 case PIPE_SHADER_GEOMETRY
:
6019 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6020 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6021 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6022 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6023 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6024 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6026 case PIPE_SHADER_FRAGMENT
:
6027 ctx
->load_input
= declare_input_fs
;
6028 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6029 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6031 case PIPE_SHADER_COMPUTE
:
6034 assert(!"Unsupported shader type");
6038 ctx
->abi
.load_ubo
= load_ubo
;
6039 ctx
->abi
.load_ssbo
= load_ssbo
;
6041 create_function(ctx
);
6042 preload_ring_buffers(ctx
);
6044 /* For GFX9 merged shaders:
6045 * - Set EXEC for the first shader. If the prolog is present, set
6046 * EXEC there instead.
6047 * - Add a barrier before the second shader.
6048 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6049 * an if-statement. This is required for correctness in geometry
6050 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6053 * For monolithic merged shaders, the first shader is wrapped in an
6054 * if-block together with its prolog in si_build_wrapper_function.
6056 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6057 if (!is_monolithic
&&
6058 sel
->info
.num_instructions
> 1 && /* not empty shader */
6059 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6060 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6061 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6062 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6063 si_init_exec_from_input(ctx
,
6064 ctx
->param_merged_wave_info
, 0);
6065 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6066 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6068 ac_init_exec_full_mask(&ctx
->ac
);
6070 /* The barrier must execute for all shaders in a
6073 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6075 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6077 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6078 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6079 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6083 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6084 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6085 for (unsigned i
= 0; i
< 6; i
++) {
6086 ctx
->invoc0_tess_factors
[i
] =
6087 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6091 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6093 for (i
= 0; i
< 4; i
++) {
6094 ctx
->gs_next_vertex
[i
] =
6095 lp_build_alloca(&ctx
->gallivm
,
6100 if (sel
->force_correct_derivs_after_kill
) {
6101 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6102 /* true = don't kill. */
6103 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6104 ctx
->postponed_kill
);
6108 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6109 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6113 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6114 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6119 si_llvm_build_ret(ctx
, ctx
->return_value
);
6124 * Compute the VS prolog key, which contains all the information needed to
6125 * build the VS prolog function, and set shader->info bits where needed.
6127 * \param info Shader info of the vertex shader.
6128 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6129 * \param prolog_key Key of the VS prolog
6130 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6131 * \param key Output shader part key.
6133 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6134 unsigned num_input_sgprs
,
6135 const struct si_vs_prolog_bits
*prolog_key
,
6136 struct si_shader
*shader_out
,
6137 union si_shader_part_key
*key
)
6139 memset(key
, 0, sizeof(*key
));
6140 key
->vs_prolog
.states
= *prolog_key
;
6141 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6142 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6143 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6144 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6146 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6147 key
->vs_prolog
.as_ls
= 1;
6148 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6149 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6150 key
->vs_prolog
.as_es
= 1;
6151 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6154 /* Enable loading the InstanceID VGPR. */
6155 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6157 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6158 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6159 shader_out
->info
.uses_instanceid
= true;
6163 * Compute the PS prolog key, which contains all the information needed to
6164 * build the PS prolog function, and set related bits in shader->config.
6166 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6167 union si_shader_part_key
*key
,
6168 bool separate_prolog
)
6170 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6172 memset(key
, 0, sizeof(*key
));
6173 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6174 key
->ps_prolog
.colors_read
= info
->colors_read
;
6175 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6176 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6177 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6178 (key
->ps_prolog
.colors_read
||
6179 key
->ps_prolog
.states
.force_persp_sample_interp
||
6180 key
->ps_prolog
.states
.force_linear_sample_interp
||
6181 key
->ps_prolog
.states
.force_persp_center_interp
||
6182 key
->ps_prolog
.states
.force_linear_center_interp
||
6183 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6184 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6185 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6187 if (info
->colors_read
) {
6188 unsigned *color
= shader
->selector
->color_attr_index
;
6190 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6191 /* BCOLORs are stored after the last input. */
6192 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6193 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6194 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6197 for (unsigned i
= 0; i
< 2; i
++) {
6198 unsigned interp
= info
->input_interpolate
[color
[i
]];
6199 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6201 if (!(info
->colors_read
& (0xf << i
*4)))
6204 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6206 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6207 interp
== TGSI_INTERPOLATE_COLOR
)
6208 interp
= TGSI_INTERPOLATE_CONSTANT
;
6211 case TGSI_INTERPOLATE_CONSTANT
:
6212 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6214 case TGSI_INTERPOLATE_PERSPECTIVE
:
6215 case TGSI_INTERPOLATE_COLOR
:
6216 /* Force the interpolation location for colors here. */
6217 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6218 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6219 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6220 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6223 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6224 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6225 shader
->config
.spi_ps_input_ena
|=
6226 S_0286CC_PERSP_SAMPLE_ENA(1);
6228 case TGSI_INTERPOLATE_LOC_CENTER
:
6229 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6230 shader
->config
.spi_ps_input_ena
|=
6231 S_0286CC_PERSP_CENTER_ENA(1);
6233 case TGSI_INTERPOLATE_LOC_CENTROID
:
6234 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6235 shader
->config
.spi_ps_input_ena
|=
6236 S_0286CC_PERSP_CENTROID_ENA(1);
6242 case TGSI_INTERPOLATE_LINEAR
:
6243 /* Force the interpolation location for colors here. */
6244 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6245 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6246 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6247 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6249 /* The VGPR assignment for non-monolithic shaders
6250 * works because InitialPSInputAddr is set on the
6251 * main shader and PERSP_PULL_MODEL is never used.
6254 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6255 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6256 separate_prolog
? 6 : 9;
6257 shader
->config
.spi_ps_input_ena
|=
6258 S_0286CC_LINEAR_SAMPLE_ENA(1);
6260 case TGSI_INTERPOLATE_LOC_CENTER
:
6261 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6262 separate_prolog
? 8 : 11;
6263 shader
->config
.spi_ps_input_ena
|=
6264 S_0286CC_LINEAR_CENTER_ENA(1);
6266 case TGSI_INTERPOLATE_LOC_CENTROID
:
6267 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6268 separate_prolog
? 10 : 13;
6269 shader
->config
.spi_ps_input_ena
|=
6270 S_0286CC_LINEAR_CENTROID_ENA(1);
6284 * Check whether a PS prolog is required based on the key.
6286 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6288 return key
->ps_prolog
.colors_read
||
6289 key
->ps_prolog
.states
.force_persp_sample_interp
||
6290 key
->ps_prolog
.states
.force_linear_sample_interp
||
6291 key
->ps_prolog
.states
.force_persp_center_interp
||
6292 key
->ps_prolog
.states
.force_linear_center_interp
||
6293 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6294 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6295 key
->ps_prolog
.states
.poly_stipple
||
6296 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6300 * Compute the PS epilog key, which contains all the information needed to
6301 * build the PS epilog function.
6303 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6304 union si_shader_part_key
*key
)
6306 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6307 memset(key
, 0, sizeof(*key
));
6308 key
->ps_epilog
.colors_written
= info
->colors_written
;
6309 key
->ps_epilog
.writes_z
= info
->writes_z
;
6310 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6311 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6312 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6316 * Build the GS prolog function. Rotate the input vertices for triangle strips
6319 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6320 union si_shader_part_key
*key
)
6322 unsigned num_sgprs
, num_vgprs
;
6323 struct si_function_info fninfo
;
6324 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6325 LLVMTypeRef returns
[48];
6326 LLVMValueRef func
, ret
;
6328 si_init_function_info(&fninfo
);
6330 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6331 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
6332 num_vgprs
= 5; /* ES inputs are not needed by GS */
6334 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6338 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6339 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6340 returns
[i
] = ctx
->i32
;
6343 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6344 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6345 returns
[num_sgprs
+ i
] = ctx
->f32
;
6348 /* Create the function. */
6349 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6351 func
= ctx
->main_fn
;
6353 /* Set the full EXEC mask for the prolog, because we are only fiddling
6354 * with registers here. The main shader part will set the correct EXEC
6357 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6358 ac_init_exec_full_mask(&ctx
->ac
);
6360 /* Copy inputs to outputs. This should be no-op, as the registers match,
6361 * but it will prevent the compiler from overwriting them unintentionally.
6363 ret
= ctx
->return_value
;
6364 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6365 LLVMValueRef p
= LLVMGetParam(func
, i
);
6366 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6368 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6369 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6370 p
= ac_to_float(&ctx
->ac
, p
);
6371 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6374 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6375 /* Remap the input vertices for every other primitive. */
6376 const unsigned gfx6_vtx_params
[6] = {
6384 const unsigned gfx9_vtx_params
[3] = {
6389 LLVMValueRef vtx_in
[6], vtx_out
[6];
6390 LLVMValueRef prim_id
, rotate
;
6392 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6393 for (unsigned i
= 0; i
< 3; i
++) {
6394 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6395 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6398 for (unsigned i
= 0; i
< 6; i
++)
6399 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6402 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6403 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6405 for (unsigned i
= 0; i
< 6; ++i
) {
6406 LLVMValueRef base
, rotated
;
6408 rotated
= vtx_in
[(i
+ 4) % 6];
6409 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6412 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6413 for (unsigned i
= 0; i
< 3; i
++) {
6414 LLVMValueRef hi
, out
;
6416 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6417 LLVMConstInt(ctx
->i32
, 16, 0), "");
6418 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6419 out
= ac_to_float(&ctx
->ac
, out
);
6420 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6421 gfx9_vtx_params
[i
], "");
6424 for (unsigned i
= 0; i
< 6; i
++) {
6427 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6428 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6429 gfx6_vtx_params
[i
], "");
6434 LLVMBuildRet(builder
, ret
);
6438 * Given a list of shader part functions, build a wrapper function that
6439 * runs them in sequence to form a monolithic shader.
6441 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6442 LLVMValueRef
*parts
,
6445 unsigned next_shader_first_part
)
6447 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6448 /* PS epilog has one arg per color component; gfx9 merged shader
6449 * prologs need to forward 32 user SGPRs.
6451 struct si_function_info fninfo
;
6452 LLVMValueRef initial
[64], out
[64];
6453 LLVMTypeRef function_type
;
6454 unsigned num_first_params
;
6455 unsigned num_out
, initial_num_out
;
6456 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6457 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6458 unsigned num_sgprs
, num_vgprs
;
6460 struct lp_build_if_state if_state
;
6462 si_init_function_info(&fninfo
);
6464 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6465 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6466 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6469 /* The parameters of the wrapper function correspond to those of the
6470 * first part in terms of SGPRs and VGPRs, but we use the types of the
6471 * main part to get the right types. This is relevant for the
6472 * dereferenceable attribute on descriptor table pointers.
6477 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6478 num_first_params
= LLVMCountParamTypes(function_type
);
6480 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6481 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6483 if (ac_is_sgpr_param(param
)) {
6484 assert(num_vgprs
== 0);
6485 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6487 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6492 while (gprs
< num_sgprs
+ num_vgprs
) {
6493 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6494 LLVMTypeRef type
= LLVMTypeOf(param
);
6495 unsigned size
= ac_get_type_size(type
) / 4;
6497 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6499 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6500 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6501 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6506 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6507 si_get_max_workgroup_size(ctx
->shader
));
6509 if (is_merged_shader(ctx
->shader
))
6510 ac_init_exec_full_mask(&ctx
->ac
);
6512 /* Record the arguments of the function as if they were an output of
6518 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6519 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6520 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6521 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6522 unsigned size
= ac_get_type_size(param_type
) / 4;
6525 if (param_type
!= out_type
)
6526 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6527 out
[num_out
++] = param
;
6529 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6531 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6532 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6533 param_type
= ctx
->i64
;
6536 if (param_type
!= vector_type
)
6537 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6539 for (unsigned j
= 0; j
< size
; ++j
)
6540 out
[num_out
++] = LLVMBuildExtractElement(
6541 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6544 if (i
< fninfo
.num_sgpr_params
)
6545 num_out_sgpr
= num_out
;
6548 memcpy(initial
, out
, sizeof(out
));
6549 initial_num_out
= num_out
;
6550 initial_num_out_sgpr
= num_out_sgpr
;
6552 /* Now chain the parts. */
6553 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6554 LLVMValueRef in
[48];
6556 LLVMTypeRef ret_type
;
6557 unsigned out_idx
= 0;
6558 unsigned num_params
= LLVMCountParams(parts
[part
]);
6560 /* Merged shaders are executed conditionally depending
6561 * on the number of enabled threads passed in the input SGPRs. */
6562 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6563 LLVMValueRef ena
, count
= initial
[3];
6565 count
= LLVMBuildAnd(builder
, count
,
6566 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6567 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6568 ac_get_thread_id(&ctx
->ac
), count
, "");
6569 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6572 /* Derive arguments for the next part from outputs of the
6575 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6577 LLVMTypeRef param_type
;
6579 unsigned param_size
;
6580 LLVMValueRef arg
= NULL
;
6582 param
= LLVMGetParam(parts
[part
], param_idx
);
6583 param_type
= LLVMTypeOf(param
);
6584 param_size
= ac_get_type_size(param_type
) / 4;
6585 is_sgpr
= ac_is_sgpr_param(param
);
6588 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6590 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6591 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6593 if (param_size
== 1)
6596 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6598 if (LLVMTypeOf(arg
) != param_type
) {
6599 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6600 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6601 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6603 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6607 in
[param_idx
] = arg
;
6608 out_idx
+= param_size
;
6611 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6613 if (is_merged_shader(ctx
->shader
) &&
6614 part
+ 1 == next_shader_first_part
) {
6615 lp_build_endif(&if_state
);
6617 /* The second half of the merged shader should use
6618 * the inputs from the toplevel (wrapper) function,
6619 * not the return value from the last call.
6621 * That's because the last call was executed condi-
6622 * tionally, so we can't consume it in the main
6625 memcpy(out
, initial
, sizeof(initial
));
6626 num_out
= initial_num_out
;
6627 num_out_sgpr
= initial_num_out_sgpr
;
6631 /* Extract the returned GPRs. */
6632 ret_type
= LLVMTypeOf(ret
);
6636 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6637 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6639 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6641 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6643 LLVMBuildExtractValue(builder
, ret
, i
, "");
6645 assert(num_out
< ARRAY_SIZE(out
));
6646 out
[num_out
++] = val
;
6648 if (LLVMTypeOf(val
) == ctx
->i32
) {
6649 assert(num_out_sgpr
+ 1 == num_out
);
6650 num_out_sgpr
= num_out
;
6656 LLVMBuildRetVoid(builder
);
6659 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6660 LLVMTargetMachineRef tm
,
6661 struct si_shader
*shader
,
6663 struct pipe_debug_callback
*debug
)
6665 struct si_shader_selector
*sel
= shader
->selector
;
6666 struct si_shader_context ctx
;
6669 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6670 * conversion fails. */
6671 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6672 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6674 tgsi_dump(sel
->tokens
, 0);
6676 nir_print_shader(sel
->nir
, stderr
);
6677 si_dump_streamout(&sel
->so
);
6680 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6681 si_llvm_context_set_tgsi(&ctx
, shader
);
6682 ctx
.separate_prolog
= !is_monolithic
;
6684 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6685 sizeof(shader
->info
.vs_output_param_offset
));
6687 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6689 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6690 si_llvm_dispose(&ctx
);
6694 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6695 LLVMValueRef parts
[2];
6696 bool need_prolog
= sel
->vs_needs_prolog
;
6698 parts
[1] = ctx
.main_fn
;
6701 union si_shader_part_key prolog_key
;
6702 si_get_vs_prolog_key(&sel
->info
,
6703 shader
->info
.num_input_sgprs
,
6704 &shader
->key
.part
.vs
.prolog
,
6705 shader
, &prolog_key
);
6706 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6707 parts
[0] = ctx
.main_fn
;
6710 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6711 1 + need_prolog
, need_prolog
, 0);
6712 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6713 if (sscreen
->info
.chip_class
>= GFX9
) {
6714 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6715 LLVMValueRef parts
[4];
6716 bool vs_needs_prolog
=
6717 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6720 parts
[2] = ctx
.main_fn
;
6723 union si_shader_part_key tcs_epilog_key
;
6724 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6725 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6726 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6727 parts
[3] = ctx
.main_fn
;
6730 if (vs_needs_prolog
) {
6731 union si_shader_part_key vs_prolog_key
;
6732 si_get_vs_prolog_key(&ls
->info
,
6733 shader
->info
.num_input_sgprs
,
6734 &shader
->key
.part
.tcs
.ls_prolog
,
6735 shader
, &vs_prolog_key
);
6736 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6737 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6738 parts
[0] = ctx
.main_fn
;
6741 /* VS as LS main part */
6742 struct si_shader shader_ls
= {};
6743 shader_ls
.selector
= ls
;
6744 shader_ls
.key
.as_ls
= 1;
6745 shader_ls
.key
.mono
= shader
->key
.mono
;
6746 shader_ls
.key
.opt
= shader
->key
.opt
;
6747 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6749 if (!si_compile_tgsi_main(&ctx
, true)) {
6750 si_llvm_dispose(&ctx
);
6753 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6754 parts
[1] = ctx
.main_fn
;
6756 /* Reset the shader context. */
6757 ctx
.shader
= shader
;
6758 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6760 si_build_wrapper_function(&ctx
,
6761 parts
+ !vs_needs_prolog
,
6762 4 - !vs_needs_prolog
, 0,
6763 vs_needs_prolog
? 2 : 1);
6765 LLVMValueRef parts
[2];
6766 union si_shader_part_key epilog_key
;
6768 parts
[0] = ctx
.main_fn
;
6770 memset(&epilog_key
, 0, sizeof(epilog_key
));
6771 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6772 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6773 parts
[1] = ctx
.main_fn
;
6775 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6777 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6778 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6779 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6780 LLVMValueRef es_prolog
= NULL
;
6781 LLVMValueRef es_main
= NULL
;
6782 LLVMValueRef gs_prolog
= NULL
;
6783 LLVMValueRef gs_main
= ctx
.main_fn
;
6786 union si_shader_part_key gs_prolog_key
;
6787 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6788 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6789 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6790 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6791 gs_prolog
= ctx
.main_fn
;
6794 if (es
->vs_needs_prolog
) {
6795 union si_shader_part_key vs_prolog_key
;
6796 si_get_vs_prolog_key(&es
->info
,
6797 shader
->info
.num_input_sgprs
,
6798 &shader
->key
.part
.gs
.vs_prolog
,
6799 shader
, &vs_prolog_key
);
6800 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6801 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6802 es_prolog
= ctx
.main_fn
;
6806 struct si_shader shader_es
= {};
6807 shader_es
.selector
= es
;
6808 shader_es
.key
.as_es
= 1;
6809 shader_es
.key
.mono
= shader
->key
.mono
;
6810 shader_es
.key
.opt
= shader
->key
.opt
;
6811 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6813 if (!si_compile_tgsi_main(&ctx
, true)) {
6814 si_llvm_dispose(&ctx
);
6817 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6818 es_main
= ctx
.main_fn
;
6820 /* Reset the shader context. */
6821 ctx
.shader
= shader
;
6822 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6824 /* Prepare the array of shader parts. */
6825 LLVMValueRef parts
[4];
6826 unsigned num_parts
= 0, main_part
, next_first_part
;
6829 parts
[num_parts
++] = es_prolog
;
6831 parts
[main_part
= num_parts
++] = es_main
;
6832 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6833 parts
[num_parts
++] = gs_main
;
6835 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6836 main_part
, next_first_part
);
6838 LLVMValueRef parts
[2];
6839 union si_shader_part_key prolog_key
;
6841 parts
[1] = ctx
.main_fn
;
6843 memset(&prolog_key
, 0, sizeof(prolog_key
));
6844 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6845 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6846 parts
[0] = ctx
.main_fn
;
6848 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6850 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6851 LLVMValueRef parts
[3];
6852 union si_shader_part_key prolog_key
;
6853 union si_shader_part_key epilog_key
;
6856 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6857 need_prolog
= si_need_ps_prolog(&prolog_key
);
6859 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6862 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6863 parts
[0] = ctx
.main_fn
;
6866 si_get_ps_epilog_key(shader
, &epilog_key
);
6867 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6868 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6870 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6871 need_prolog
? 1 : 0, 0);
6874 si_llvm_optimize_module(&ctx
);
6876 /* Post-optimization transformations and analysis. */
6877 si_optimize_vs_outputs(&ctx
);
6879 if ((debug
&& debug
->debug_message
) ||
6880 si_can_dump_shader(sscreen
, ctx
.type
))
6881 si_count_scratch_private_memory(&ctx
);
6883 /* Compile to bytecode. */
6884 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6885 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6886 si_llvm_dispose(&ctx
);
6888 fprintf(stderr
, "LLVM failed to compile shader\n");
6892 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6893 * LLVM 3.9svn has this bug.
6895 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6896 unsigned wave_size
= 64;
6897 unsigned max_vgprs
= 256;
6898 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6899 unsigned max_sgprs_per_wave
= 128;
6900 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6901 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6902 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6904 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6905 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6907 if (shader
->config
.num_sgprs
> max_sgprs
||
6908 shader
->config
.num_vgprs
> max_vgprs
) {
6909 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6910 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6911 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6912 max_sgprs
, max_vgprs
);
6914 /* Just terminate the process, because dependent
6915 * shaders can hang due to bad input data, but use
6916 * the env var to allow shader-db to work.
6918 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6923 /* Add the scratch offset to input SGPRs. */
6924 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6925 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6927 /* Calculate the number of fragment input VGPRs. */
6928 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6929 shader
->info
.num_input_vgprs
= 0;
6930 shader
->info
.face_vgpr_index
= -1;
6931 shader
->info
.ancillary_vgpr_index
= -1;
6933 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6934 shader
->info
.num_input_vgprs
+= 2;
6935 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6936 shader
->info
.num_input_vgprs
+= 2;
6937 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6938 shader
->info
.num_input_vgprs
+= 2;
6939 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6940 shader
->info
.num_input_vgprs
+= 3;
6941 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6942 shader
->info
.num_input_vgprs
+= 2;
6943 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6944 shader
->info
.num_input_vgprs
+= 2;
6945 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6946 shader
->info
.num_input_vgprs
+= 2;
6947 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6948 shader
->info
.num_input_vgprs
+= 1;
6949 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6950 shader
->info
.num_input_vgprs
+= 1;
6951 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6952 shader
->info
.num_input_vgprs
+= 1;
6953 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6954 shader
->info
.num_input_vgprs
+= 1;
6955 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6956 shader
->info
.num_input_vgprs
+= 1;
6957 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6958 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6959 shader
->info
.num_input_vgprs
+= 1;
6961 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6962 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6963 shader
->info
.num_input_vgprs
+= 1;
6965 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6966 shader
->info
.num_input_vgprs
+= 1;
6967 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6968 shader
->info
.num_input_vgprs
+= 1;
6975 * Create, compile and return a shader part (prolog or epilog).
6977 * \param sscreen screen
6978 * \param list list of shader parts of the same category
6979 * \param type shader type
6980 * \param key shader part key
6981 * \param prolog whether the part being requested is a prolog
6982 * \param tm LLVM target machine
6983 * \param debug debug callback
6984 * \param build the callback responsible for building the main function
6985 * \return non-NULL on success
6987 static struct si_shader_part
*
6988 si_get_shader_part(struct si_screen
*sscreen
,
6989 struct si_shader_part
**list
,
6990 enum pipe_shader_type type
,
6992 union si_shader_part_key
*key
,
6993 LLVMTargetMachineRef tm
,
6994 struct pipe_debug_callback
*debug
,
6995 void (*build
)(struct si_shader_context
*,
6996 union si_shader_part_key
*),
6999 struct si_shader_part
*result
;
7001 mtx_lock(&sscreen
->shader_parts_mutex
);
7003 /* Find existing. */
7004 for (result
= *list
; result
; result
= result
->next
) {
7005 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7006 mtx_unlock(&sscreen
->shader_parts_mutex
);
7011 /* Compile a new one. */
7012 result
= CALLOC_STRUCT(si_shader_part
);
7015 struct si_shader shader
= {};
7016 struct si_shader_context ctx
;
7018 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7019 ctx
.shader
= &shader
;
7023 case PIPE_SHADER_VERTEX
:
7024 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7025 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7027 case PIPE_SHADER_TESS_CTRL
:
7029 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7031 case PIPE_SHADER_GEOMETRY
:
7034 case PIPE_SHADER_FRAGMENT
:
7036 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7038 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7041 unreachable("bad shader part");
7047 si_llvm_optimize_module(&ctx
);
7049 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7050 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7056 result
->next
= *list
;
7060 si_llvm_dispose(&ctx
);
7061 mtx_unlock(&sscreen
->shader_parts_mutex
);
7065 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7067 LLVMValueRef ptr
[2], list
;
7068 bool is_merged_shader
=
7069 ctx
->screen
->info
.chip_class
>= GFX9
&&
7070 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7071 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7072 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7074 /* Get the pointer to rw buffers. */
7075 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7076 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS_HI
);
7077 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7078 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7079 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7080 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7085 * Build the vertex shader prolog function.
7087 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7088 * All inputs are returned unmodified. The vertex load indices are
7089 * stored after them, which will be used by the API VS for fetching inputs.
7091 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7096 * (VertexID + BaseVertex),
7097 * (InstanceID + StartInstance),
7098 * (InstanceID / 2 + StartInstance)
7100 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7101 union si_shader_part_key
*key
)
7103 struct si_function_info fninfo
;
7104 LLVMTypeRef
*returns
;
7105 LLVMValueRef ret
, func
;
7107 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7108 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7109 LLVMValueRef input_vgprs
[9];
7110 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7112 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7114 si_init_function_info(&fninfo
);
7116 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7117 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7118 sizeof(LLVMTypeRef
));
7121 /* Declare input and output SGPRs. */
7122 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7123 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7124 returns
[num_returns
++] = ctx
->i32
;
7127 /* Preloaded VGPRs (outputs must be floats) */
7128 for (i
= 0; i
< num_input_vgprs
; i
++) {
7129 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7130 returns
[num_returns
++] = ctx
->f32
;
7133 /* Vertex load indices. */
7134 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7135 returns
[num_returns
++] = ctx
->f32
;
7137 /* Create the function. */
7138 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7139 func
= ctx
->main_fn
;
7141 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7142 if (!key
->vs_prolog
.is_monolithic
)
7143 si_init_exec_from_input(ctx
, 3, 0);
7145 if (key
->vs_prolog
.as_ls
&&
7146 ctx
->screen
->has_ls_vgpr_init_bug
) {
7147 /* If there are no HS threads, SPI loads the LS VGPRs
7148 * starting at VGPR 0. Shift them back to where they
7151 LLVMValueRef has_hs_threads
=
7152 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7153 unpack_param(ctx
, 3, 8, 8),
7156 for (i
= 4; i
> 0; --i
) {
7157 input_vgprs
[i
+ 1] =
7158 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7160 input_vgprs
[i
- 1], "");
7165 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7166 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7168 /* Copy inputs to outputs. This should be no-op, as the registers match,
7169 * but it will prevent the compiler from overwriting them unintentionally.
7171 ret
= ctx
->return_value
;
7172 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7173 LLVMValueRef p
= LLVMGetParam(func
, i
);
7174 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7176 for (i
= 0; i
< num_input_vgprs
; i
++) {
7177 LLVMValueRef p
= input_vgprs
[i
];
7178 p
= ac_to_float(&ctx
->ac
, p
);
7179 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7180 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7183 /* Compute vertex load indices from instance divisors. */
7184 LLVMValueRef instance_divisor_constbuf
= NULL
;
7186 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7187 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7188 LLVMValueRef buf_index
=
7189 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7190 instance_divisor_constbuf
=
7191 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7194 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7195 bool divisor_is_one
=
7196 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7197 bool divisor_is_fetched
=
7198 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7201 if (divisor_is_one
|| divisor_is_fetched
) {
7202 LLVMValueRef divisor
= ctx
->i32_1
;
7204 if (divisor_is_fetched
) {
7205 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7206 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7207 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7210 /* InstanceID / Divisor + StartInstance */
7211 index
= get_instance_index_for_fetch(ctx
,
7213 SI_SGPR_START_INSTANCE
,
7216 /* VertexID + BaseVertex */
7217 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7219 LLVMGetParam(func
, user_sgpr_base
+
7220 SI_SGPR_BASE_VERTEX
), "");
7223 index
= ac_to_float(&ctx
->ac
, index
);
7224 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7225 fninfo
.num_params
+ i
, "");
7228 si_llvm_build_ret(ctx
, ret
);
7231 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7232 LLVMTargetMachineRef tm
,
7233 struct si_shader
*shader
,
7234 struct pipe_debug_callback
*debug
,
7235 struct si_shader
*main_part
,
7236 const struct si_vs_prolog_bits
*key
)
7238 struct si_shader_selector
*vs
= main_part
->selector
;
7240 if (!si_vs_needs_prolog(vs
, key
))
7243 /* Get the prolog. */
7244 union si_shader_part_key prolog_key
;
7245 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7246 key
, shader
, &prolog_key
);
7249 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7250 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7251 debug
, si_build_vs_prolog_function
,
7252 "Vertex Shader Prolog");
7253 return shader
->prolog
!= NULL
;
7257 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7259 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7260 LLVMTargetMachineRef tm
,
7261 struct si_shader
*shader
,
7262 struct pipe_debug_callback
*debug
)
7264 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7265 &shader
->key
.part
.vs
.prolog
);
7269 * Compile the TCS epilog function. This writes tesselation factors to memory
7270 * based on the output primitive type of the tesselator (determined by TES).
7272 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7273 union si_shader_part_key
*key
)
7275 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7276 struct si_function_info fninfo
;
7279 si_init_function_info(&fninfo
);
7281 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7282 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7283 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7284 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7285 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7286 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7287 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7288 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7289 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7290 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7291 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7292 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7293 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7294 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7295 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7296 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7297 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7298 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7299 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7300 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7301 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7302 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7304 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7305 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7306 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7307 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7308 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7309 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7310 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7311 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7312 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7313 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7314 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7315 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7318 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7319 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7320 unsigned tess_factors_idx
=
7321 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7322 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7323 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7325 for (unsigned i
= 0; i
< 6; i
++)
7326 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7328 /* Create the function. */
7329 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7330 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7331 ac_declare_lds_as_pointer(&ctx
->ac
);
7332 func
= ctx
->main_fn
;
7334 LLVMValueRef invoc0_tess_factors
[6];
7335 for (unsigned i
= 0; i
< 6; i
++)
7336 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7338 si_write_tess_factors(bld_base
,
7339 LLVMGetParam(func
, tess_factors_idx
),
7340 LLVMGetParam(func
, tess_factors_idx
+ 1),
7341 LLVMGetParam(func
, tess_factors_idx
+ 2),
7342 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7344 LLVMBuildRetVoid(ctx
->ac
.builder
);
7348 * Select and compile (or reuse) TCS parts (epilog).
7350 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7351 LLVMTargetMachineRef tm
,
7352 struct si_shader
*shader
,
7353 struct pipe_debug_callback
*debug
)
7355 if (sscreen
->info
.chip_class
>= GFX9
) {
7356 struct si_shader
*ls_main_part
=
7357 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7359 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7360 &shader
->key
.part
.tcs
.ls_prolog
))
7363 shader
->previous_stage
= ls_main_part
;
7366 /* Get the epilog. */
7367 union si_shader_part_key epilog_key
;
7368 memset(&epilog_key
, 0, sizeof(epilog_key
));
7369 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7371 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7372 PIPE_SHADER_TESS_CTRL
, false,
7373 &epilog_key
, tm
, debug
,
7374 si_build_tcs_epilog_function
,
7375 "Tessellation Control Shader Epilog");
7376 return shader
->epilog
!= NULL
;
7380 * Select and compile (or reuse) GS parts (prolog).
7382 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7383 LLVMTargetMachineRef tm
,
7384 struct si_shader
*shader
,
7385 struct pipe_debug_callback
*debug
)
7387 if (sscreen
->info
.chip_class
>= GFX9
) {
7388 struct si_shader
*es_main_part
=
7389 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7391 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7392 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7393 &shader
->key
.part
.gs
.vs_prolog
))
7396 shader
->previous_stage
= es_main_part
;
7399 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7402 union si_shader_part_key prolog_key
;
7403 memset(&prolog_key
, 0, sizeof(prolog_key
));
7404 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7406 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7407 PIPE_SHADER_GEOMETRY
, true,
7408 &prolog_key
, tm
, debug
,
7409 si_build_gs_prolog_function
,
7410 "Geometry Shader Prolog");
7411 return shader
->prolog2
!= NULL
;
7415 * Build the pixel shader prolog function. This handles:
7416 * - two-side color selection and interpolation
7417 * - overriding interpolation parameters for the API PS
7418 * - polygon stippling
7420 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7421 * overriden by other states. (e.g. per-sample interpolation)
7422 * Interpolated colors are stored after the preloaded VGPRs.
7424 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7425 union si_shader_part_key
*key
)
7427 struct si_function_info fninfo
;
7428 LLVMValueRef ret
, func
;
7429 int num_returns
, i
, num_color_channels
;
7431 assert(si_need_ps_prolog(key
));
7433 si_init_function_info(&fninfo
);
7435 /* Declare inputs. */
7436 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7437 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7439 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7440 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7442 /* Declare outputs (same as inputs + add colors if needed) */
7443 num_returns
= fninfo
.num_params
;
7444 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7445 for (i
= 0; i
< num_color_channels
; i
++)
7446 fninfo
.types
[num_returns
++] = ctx
->f32
;
7448 /* Create the function. */
7449 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7451 func
= ctx
->main_fn
;
7453 /* Copy inputs to outputs. This should be no-op, as the registers match,
7454 * but it will prevent the compiler from overwriting them unintentionally.
7456 ret
= ctx
->return_value
;
7457 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7458 LLVMValueRef p
= LLVMGetParam(func
, i
);
7459 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7462 /* Polygon stippling. */
7463 if (key
->ps_prolog
.states
.poly_stipple
) {
7464 /* POS_FIXED_PT is always last. */
7465 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7466 key
->ps_prolog
.num_input_vgprs
- 1;
7467 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7469 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7472 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7473 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7474 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7475 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7477 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7478 * The hw doesn't compute CENTROID if the whole wave only
7479 * contains fully-covered quads.
7481 * PRIM_MASK is after user SGPRs.
7483 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7484 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7485 LLVMConstInt(ctx
->i32
, 31, 0), "");
7486 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7489 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7490 /* Read PERSP_CENTER. */
7491 for (i
= 0; i
< 2; i
++)
7492 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7493 /* Read PERSP_CENTROID. */
7494 for (i
= 0; i
< 2; i
++)
7495 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7496 /* Select PERSP_CENTROID. */
7497 for (i
= 0; i
< 2; i
++) {
7498 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7499 center
[i
], centroid
[i
], "");
7500 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7501 tmp
, base
+ 4 + i
, "");
7504 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7505 /* Read LINEAR_CENTER. */
7506 for (i
= 0; i
< 2; i
++)
7507 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7508 /* Read LINEAR_CENTROID. */
7509 for (i
= 0; i
< 2; i
++)
7510 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7511 /* Select LINEAR_CENTROID. */
7512 for (i
= 0; i
< 2; i
++) {
7513 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7514 center
[i
], centroid
[i
], "");
7515 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7516 tmp
, base
+ 10 + i
, "");
7521 /* Force per-sample interpolation. */
7522 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7523 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7524 LLVMValueRef persp_sample
[2];
7526 /* Read PERSP_SAMPLE. */
7527 for (i
= 0; i
< 2; i
++)
7528 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7529 /* Overwrite PERSP_CENTER. */
7530 for (i
= 0; i
< 2; i
++)
7531 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7532 persp_sample
[i
], base
+ 2 + i
, "");
7533 /* Overwrite PERSP_CENTROID. */
7534 for (i
= 0; i
< 2; i
++)
7535 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7536 persp_sample
[i
], base
+ 4 + i
, "");
7538 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7539 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7540 LLVMValueRef linear_sample
[2];
7542 /* Read LINEAR_SAMPLE. */
7543 for (i
= 0; i
< 2; i
++)
7544 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7545 /* Overwrite LINEAR_CENTER. */
7546 for (i
= 0; i
< 2; i
++)
7547 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7548 linear_sample
[i
], base
+ 8 + i
, "");
7549 /* Overwrite LINEAR_CENTROID. */
7550 for (i
= 0; i
< 2; i
++)
7551 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7552 linear_sample
[i
], base
+ 10 + i
, "");
7555 /* Force center interpolation. */
7556 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7557 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7558 LLVMValueRef persp_center
[2];
7560 /* Read PERSP_CENTER. */
7561 for (i
= 0; i
< 2; i
++)
7562 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7563 /* Overwrite PERSP_SAMPLE. */
7564 for (i
= 0; i
< 2; i
++)
7565 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7566 persp_center
[i
], base
+ i
, "");
7567 /* Overwrite PERSP_CENTROID. */
7568 for (i
= 0; i
< 2; i
++)
7569 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7570 persp_center
[i
], base
+ 4 + i
, "");
7572 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7573 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7574 LLVMValueRef linear_center
[2];
7576 /* Read LINEAR_CENTER. */
7577 for (i
= 0; i
< 2; i
++)
7578 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7579 /* Overwrite LINEAR_SAMPLE. */
7580 for (i
= 0; i
< 2; i
++)
7581 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7582 linear_center
[i
], base
+ 6 + i
, "");
7583 /* Overwrite LINEAR_CENTROID. */
7584 for (i
= 0; i
< 2; i
++)
7585 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7586 linear_center
[i
], base
+ 10 + i
, "");
7589 /* Interpolate colors. */
7590 unsigned color_out_idx
= 0;
7591 for (i
= 0; i
< 2; i
++) {
7592 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7593 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7594 key
->ps_prolog
.face_vgpr_index
;
7595 LLVMValueRef interp
[2], color
[4];
7596 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7601 /* If the interpolation qualifier is not CONSTANT (-1). */
7602 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7603 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7604 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7606 /* Get the (i,j) updated by bc_optimize handling. */
7607 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7609 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7610 interp_vgpr
+ 1, "");
7611 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7614 /* Use the absolute location of the input. */
7615 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7617 if (key
->ps_prolog
.states
.color_two_side
) {
7618 face
= LLVMGetParam(func
, face_vgpr
);
7619 face
= ac_to_integer(&ctx
->ac
, face
);
7622 interp_fs_input(ctx
,
7623 key
->ps_prolog
.color_attr_index
[i
],
7624 TGSI_SEMANTIC_COLOR
, i
,
7625 key
->ps_prolog
.num_interp_inputs
,
7626 key
->ps_prolog
.colors_read
, interp_ij
,
7627 prim_mask
, face
, color
);
7630 unsigned chan
= u_bit_scan(&writemask
);
7631 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7632 fninfo
.num_params
+ color_out_idx
++, "");
7636 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7639 * "When per-sample shading is active due to the use of a fragment
7640 * input qualified by sample or due to the use of the gl_SampleID
7641 * or gl_SamplePosition variables, only the bit for the current
7642 * sample is set in gl_SampleMaskIn. When state specifies multiple
7643 * fragment shader invocations for a given fragment, the sample
7644 * mask for any single fragment shader invocation may specify a
7645 * subset of the covered samples for the fragment. In this case,
7646 * the bit corresponding to each covered sample will be set in
7647 * exactly one fragment shader invocation."
7649 * The samplemask loaded by hardware is always the coverage of the
7650 * entire pixel/fragment, so mask bits out based on the sample ID.
7652 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7653 /* The bit pattern matches that used by fixed function fragment
7655 static const uint16_t ps_iter_masks
[] = {
7656 0xffff, /* not used */
7662 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7664 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7665 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7666 key
->ps_prolog
.ancillary_vgpr_index
;
7667 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7668 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7670 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7671 samplemask
= LLVMBuildAnd(
7674 LLVMBuildShl(ctx
->ac
.builder
,
7675 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7678 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7680 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7681 ancillary_vgpr
+ 1, "");
7684 /* Tell LLVM to insert WQM instruction sequence when needed. */
7685 if (key
->ps_prolog
.wqm
) {
7686 LLVMAddTargetDependentFunctionAttr(func
,
7687 "amdgpu-ps-wqm-outputs", "");
7690 si_llvm_build_ret(ctx
, ret
);
7694 * Build the pixel shader epilog function. This handles everything that must be
7695 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7697 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7698 union si_shader_part_key
*key
)
7700 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7701 struct si_function_info fninfo
;
7702 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7704 struct si_ps_exports exp
= {};
7706 si_init_function_info(&fninfo
);
7708 /* Declare input SGPRs. */
7709 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7710 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7711 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7712 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7713 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7715 /* Declare input VGPRs. */
7716 unsigned required_num_params
=
7717 fninfo
.num_sgpr_params
+
7718 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7719 key
->ps_epilog
.writes_z
+
7720 key
->ps_epilog
.writes_stencil
+
7721 key
->ps_epilog
.writes_samplemask
;
7723 required_num_params
= MAX2(required_num_params
,
7724 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7726 while (fninfo
.num_params
< required_num_params
)
7727 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7729 /* Create the function. */
7730 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7731 /* Disable elimination of unused inputs. */
7732 si_llvm_add_attribute(ctx
->main_fn
,
7733 "InitialPSInputAddr", 0xffffff);
7735 /* Process colors. */
7736 unsigned vgpr
= fninfo
.num_sgpr_params
;
7737 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7738 int last_color_export
= -1;
7740 /* Find the last color export. */
7741 if (!key
->ps_epilog
.writes_z
&&
7742 !key
->ps_epilog
.writes_stencil
&&
7743 !key
->ps_epilog
.writes_samplemask
) {
7744 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7746 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7747 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7748 /* Just set this if any of the colorbuffers are enabled. */
7750 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7751 last_color_export
= 0;
7753 for (i
= 0; i
< 8; i
++)
7754 if (colors_written
& (1 << i
) &&
7755 (spi_format
>> (i
* 4)) & 0xf)
7756 last_color_export
= i
;
7760 while (colors_written
) {
7761 LLVMValueRef color
[4];
7762 int mrt
= u_bit_scan(&colors_written
);
7764 for (i
= 0; i
< 4; i
++)
7765 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7767 si_export_mrt_color(bld_base
, color
, mrt
,
7768 fninfo
.num_params
- 1,
7769 mrt
== last_color_export
, &exp
);
7772 /* Process depth, stencil, samplemask. */
7773 if (key
->ps_epilog
.writes_z
)
7774 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7775 if (key
->ps_epilog
.writes_stencil
)
7776 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7777 if (key
->ps_epilog
.writes_samplemask
)
7778 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7780 if (depth
|| stencil
|| samplemask
)
7781 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7782 else if (last_color_export
== -1)
7783 si_export_null(bld_base
);
7786 si_emit_ps_exports(ctx
, &exp
);
7789 LLVMBuildRetVoid(ctx
->ac
.builder
);
7793 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7795 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7796 LLVMTargetMachineRef tm
,
7797 struct si_shader
*shader
,
7798 struct pipe_debug_callback
*debug
)
7800 union si_shader_part_key prolog_key
;
7801 union si_shader_part_key epilog_key
;
7803 /* Get the prolog. */
7804 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7806 /* The prolog is a no-op if these aren't set. */
7807 if (si_need_ps_prolog(&prolog_key
)) {
7809 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7810 PIPE_SHADER_FRAGMENT
, true,
7811 &prolog_key
, tm
, debug
,
7812 si_build_ps_prolog_function
,
7813 "Fragment Shader Prolog");
7814 if (!shader
->prolog
)
7818 /* Get the epilog. */
7819 si_get_ps_epilog_key(shader
, &epilog_key
);
7822 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7823 PIPE_SHADER_FRAGMENT
, false,
7824 &epilog_key
, tm
, debug
,
7825 si_build_ps_epilog_function
,
7826 "Fragment Shader Epilog");
7827 if (!shader
->epilog
)
7830 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7831 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7832 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7833 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7836 /* Set up the enable bits for per-sample shading if needed. */
7837 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7838 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7839 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7840 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7841 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7842 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7844 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7845 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7846 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7847 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7848 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7849 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7851 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7852 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7853 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7854 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7855 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7856 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7858 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7859 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7860 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7861 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7862 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7863 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7866 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7867 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7868 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7869 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7870 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7873 /* At least one pair of interpolation weights must be enabled. */
7874 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7875 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7876 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7879 /* Samplemask fixup requires the sample ID. */
7880 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7881 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7882 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7885 /* The sample mask input is always enabled, because the API shader always
7886 * passes it through to the epilog. Disable it here if it's unused.
7888 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7889 !shader
->selector
->info
.reads_samplemask
)
7890 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7895 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7898 /* SPI barrier management bug:
7899 * Make sure we have at least 4k of LDS in use to avoid the bug.
7900 * It applies to workgroup sizes of more than one wavefront.
7902 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7903 sscreen
->info
.family
== CHIP_KABINI
||
7904 sscreen
->info
.family
== CHIP_MULLINS
)
7905 *lds_size
= MAX2(*lds_size
, 8);
7908 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7909 struct si_shader
*shader
)
7911 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7913 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7915 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7916 si_get_max_workgroup_size(shader
) > 64) {
7917 si_multiwave_lds_size_workaround(sscreen
,
7918 &shader
->config
.lds_size
);
7922 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7923 struct si_shader
*shader
,
7924 struct pipe_debug_callback
*debug
)
7926 struct si_shader_selector
*sel
= shader
->selector
;
7927 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7930 /* LS, ES, VS are compiled on demand if the main part hasn't been
7931 * compiled for that stage.
7933 * Vertex shaders are compiled on demand when a vertex fetch
7934 * workaround must be applied.
7936 if (shader
->is_monolithic
) {
7937 /* Monolithic shader (compiled as a whole, has many variants,
7938 * may take a long time to compile).
7940 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7944 /* The shader consists of several parts:
7946 * - the middle part is the user shader, it has 1 variant only
7947 * and it was compiled during the creation of the shader
7949 * - the prolog part is inserted at the beginning
7950 * - the epilog part is inserted at the end
7952 * The prolog and epilog have many (but simple) variants.
7954 * Starting with gfx9, geometry and tessellation control
7955 * shaders also contain the prolog and user shader parts of
7956 * the previous shader stage.
7962 /* Copy the compiled TGSI shader data over. */
7963 shader
->is_binary_shared
= true;
7964 shader
->binary
= mainp
->binary
;
7965 shader
->config
= mainp
->config
;
7966 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7967 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7968 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7969 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7970 memcpy(shader
->info
.vs_output_param_offset
,
7971 mainp
->info
.vs_output_param_offset
,
7972 sizeof(mainp
->info
.vs_output_param_offset
));
7973 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7974 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7975 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7977 /* Select prologs and/or epilogs. */
7978 switch (sel
->type
) {
7979 case PIPE_SHADER_VERTEX
:
7980 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
7983 case PIPE_SHADER_TESS_CTRL
:
7984 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
7987 case PIPE_SHADER_TESS_EVAL
:
7989 case PIPE_SHADER_GEOMETRY
:
7990 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
7993 case PIPE_SHADER_FRAGMENT
:
7994 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
7997 /* Make sure we have at least as many VGPRs as there
7998 * are allocated inputs.
8000 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8001 shader
->info
.num_input_vgprs
);
8005 /* Update SGPR and VGPR counts. */
8006 if (shader
->prolog
) {
8007 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8008 shader
->prolog
->config
.num_sgprs
);
8009 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8010 shader
->prolog
->config
.num_vgprs
);
8012 if (shader
->previous_stage
) {
8013 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8014 shader
->previous_stage
->config
.num_sgprs
);
8015 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8016 shader
->previous_stage
->config
.num_vgprs
);
8017 shader
->config
.spilled_sgprs
=
8018 MAX2(shader
->config
.spilled_sgprs
,
8019 shader
->previous_stage
->config
.spilled_sgprs
);
8020 shader
->config
.spilled_vgprs
=
8021 MAX2(shader
->config
.spilled_vgprs
,
8022 shader
->previous_stage
->config
.spilled_vgprs
);
8023 shader
->config
.private_mem_vgprs
=
8024 MAX2(shader
->config
.private_mem_vgprs
,
8025 shader
->previous_stage
->config
.private_mem_vgprs
);
8026 shader
->config
.scratch_bytes_per_wave
=
8027 MAX2(shader
->config
.scratch_bytes_per_wave
,
8028 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8029 shader
->info
.uses_instanceid
|=
8030 shader
->previous_stage
->info
.uses_instanceid
;
8032 if (shader
->prolog2
) {
8033 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8034 shader
->prolog2
->config
.num_sgprs
);
8035 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8036 shader
->prolog2
->config
.num_vgprs
);
8038 if (shader
->epilog
) {
8039 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8040 shader
->epilog
->config
.num_sgprs
);
8041 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8042 shader
->epilog
->config
.num_vgprs
);
8046 si_fix_resource_usage(sscreen
, shader
);
8047 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8051 r
= si_shader_binary_upload(sscreen
, shader
);
8053 fprintf(stderr
, "LLVM failed to upload shader\n");
8060 void si_shader_destroy(struct si_shader
*shader
)
8062 if (shader
->scratch_bo
)
8063 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8065 r600_resource_reference(&shader
->bo
, NULL
);
8067 if (!shader
->is_binary_shared
)
8068 ac_shader_binary_clean(&shader
->binary
);
8070 free(shader
->shader_log
);