2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "radeon/radeon_elf_util.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_build.h"
40 #include "tgsi/tgsi_util.h"
41 #include "tgsi/tgsi_dump.h"
43 #include "ac_llvm_util.h"
44 #include "si_shader_internal.h"
49 static const char *scratch_rsrc_dword0_symbol
=
50 "SCRATCH_RSRC_DWORD0";
52 static const char *scratch_rsrc_dword1_symbol
=
53 "SCRATCH_RSRC_DWORD1";
55 struct si_shader_output_values
57 LLVMValueRef values
[4];
58 unsigned semantic_name
;
59 unsigned semantic_index
;
60 ubyte vertex_stream
[4];
63 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
64 struct si_screen
*sscreen
,
65 struct si_shader
*shader
,
66 LLVMTargetMachineRef tm
);
68 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
69 struct lp_build_tgsi_context
*bld_base
,
70 struct lp_build_emit_data
*emit_data
);
72 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
75 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
76 union si_shader_part_key
*key
);
77 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
78 union si_shader_part_key
*key
);
79 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
80 union si_shader_part_key
*key
);
81 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
86 /* Ideally pass the sample mask input to the PS epilog as v13, which
87 * is its usual location, so that the shader doesn't have to add v_mov.
89 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
91 /* The VS location of the PrimitiveID input is the same in the epilog,
92 * so that the main shader part doesn't have to move it.
94 #define VS_EPILOG_PRIMID_LOC 2
102 #define SENDMSG_GS_DONE 3
104 #define SENDMSG_GS_OP_NOP (0 << 4)
105 #define SENDMSG_GS_OP_CUT (1 << 4)
106 #define SENDMSG_GS_OP_EMIT (2 << 4)
107 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
110 * Returns a unique index for a semantic name and index. The index must be
111 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
114 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
116 switch (semantic_name
) {
117 case TGSI_SEMANTIC_POSITION
:
119 case TGSI_SEMANTIC_PSIZE
:
121 case TGSI_SEMANTIC_CLIPDIST
:
124 case TGSI_SEMANTIC_GENERIC
:
128 assert(!"invalid generic index");
131 /* patch indices are completely separate and thus start from 0 */
132 case TGSI_SEMANTIC_TESSOUTER
:
134 case TGSI_SEMANTIC_TESSINNER
:
136 case TGSI_SEMANTIC_PATCH
:
140 assert(!"invalid semantic name");
145 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
)
148 case TGSI_SEMANTIC_FOG
:
150 case TGSI_SEMANTIC_LAYER
:
152 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
154 case TGSI_SEMANTIC_PRIMID
:
156 case TGSI_SEMANTIC_COLOR
: /* these alias */
157 case TGSI_SEMANTIC_BCOLOR
:
159 case TGSI_SEMANTIC_TEXCOORD
:
162 assert(!"invalid semantic name");
168 * Get the value of a shader input parameter and extract a bitfield.
170 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
171 unsigned param
, unsigned rshift
,
174 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
175 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
178 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
179 value
= bitcast(&ctx
->bld_base
,
180 TGSI_TYPE_UNSIGNED
, value
);
183 value
= LLVMBuildLShr(gallivm
->builder
, value
,
184 lp_build_const_int32(gallivm
, rshift
), "");
186 if (rshift
+ bitwidth
< 32) {
187 unsigned mask
= (1 << bitwidth
) - 1;
188 value
= LLVMBuildAnd(gallivm
->builder
, value
,
189 lp_build_const_int32(gallivm
, mask
), "");
195 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
198 case PIPE_SHADER_TESS_CTRL
:
199 return unpack_param(ctx
, SI_PARAM_REL_IDS
, 0, 8);
201 case PIPE_SHADER_TESS_EVAL
:
202 return LLVMGetParam(ctx
->main_fn
,
203 ctx
->param_tes_rel_patch_id
);
211 /* Tessellation shaders pass outputs to the next shader using LDS.
213 * LS outputs = TCS inputs
214 * TCS outputs = TES inputs
217 * - TCS inputs for patch 0
218 * - TCS inputs for patch 1
219 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
221 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
222 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
223 * - TCS outputs for patch 1
224 * - Per-patch TCS outputs for patch 1
225 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
226 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
229 * All three shaders VS(LS), TCS, TES share the same LDS space.
233 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
235 if (ctx
->type
== PIPE_SHADER_VERTEX
)
236 return unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 0, 13);
237 else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
238 return unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 0, 13);
246 get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
248 return unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 0, 13);
252 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
254 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
256 SI_PARAM_TCS_OUT_OFFSETS
,
262 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
264 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
266 SI_PARAM_TCS_OUT_OFFSETS
,
272 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
274 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
275 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
276 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
278 return LLVMBuildMul(gallivm
->builder
, patch_stride
, rel_patch_id
, "");
282 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
284 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
285 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
286 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
287 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
289 return LLVMBuildAdd(gallivm
->builder
, patch0_offset
,
290 LLVMBuildMul(gallivm
->builder
, patch_stride
,
296 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
298 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
299 LLVMValueRef patch0_patch_data_offset
=
300 get_tcs_out_patch0_patch_data_offset(ctx
);
301 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
302 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
304 return LLVMBuildAdd(gallivm
->builder
, patch0_patch_data_offset
,
305 LLVMBuildMul(gallivm
->builder
, patch_stride
,
310 static LLVMValueRef
build_gep0(struct si_shader_context
*ctx
,
311 LLVMValueRef base_ptr
, LLVMValueRef index
)
313 LLVMValueRef indices
[2] = {
314 LLVMConstInt(ctx
->i32
, 0, 0),
317 return LLVMBuildGEP(ctx
->gallivm
.builder
, base_ptr
,
321 static void build_indexed_store(struct si_shader_context
*ctx
,
322 LLVMValueRef base_ptr
, LLVMValueRef index
,
325 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
326 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
328 LLVMBuildStore(gallivm
->builder
, value
,
329 build_gep0(ctx
, base_ptr
, index
));
333 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
334 * It's equivalent to doing a load from &base_ptr[index].
336 * \param base_ptr Where the array starts.
337 * \param index The element index into the array.
338 * \param uniform Whether the base_ptr and index can be assumed to be
339 * dynamically uniform
341 static LLVMValueRef
build_indexed_load(struct si_shader_context
*ctx
,
342 LLVMValueRef base_ptr
, LLVMValueRef index
,
345 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
346 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
347 LLVMValueRef pointer
;
349 pointer
= build_gep0(ctx
, base_ptr
, index
);
351 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
352 return LLVMBuildLoad(gallivm
->builder
, pointer
, "");
356 * Do a load from &base_ptr[index], but also add a flag that it's loading
357 * a constant from a dynamically uniform index.
359 static LLVMValueRef
build_indexed_load_const(
360 struct si_shader_context
*ctx
,
361 LLVMValueRef base_ptr
, LLVMValueRef index
)
363 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
364 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
368 static LLVMValueRef
get_instance_index_for_fetch(
369 struct si_shader_context
*radeon_bld
,
370 unsigned param_start_instance
, unsigned divisor
)
372 struct si_shader_context
*ctx
=
373 si_shader_context(&radeon_bld
->bld_base
);
374 struct gallivm_state
*gallivm
= radeon_bld
->bld_base
.base
.gallivm
;
376 LLVMValueRef result
= LLVMGetParam(radeon_bld
->main_fn
,
377 ctx
->param_instance_id
);
379 /* The division must be done before START_INSTANCE is added. */
381 result
= LLVMBuildUDiv(gallivm
->builder
, result
,
382 lp_build_const_int32(gallivm
, divisor
), "");
384 return LLVMBuildAdd(gallivm
->builder
, result
,
385 LLVMGetParam(radeon_bld
->main_fn
, param_start_instance
), "");
388 static void declare_input_vs(
389 struct si_shader_context
*ctx
,
390 unsigned input_index
,
391 const struct tgsi_full_declaration
*decl
,
394 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
395 struct gallivm_state
*gallivm
= base
->gallivm
;
400 LLVMValueRef t_list_ptr
;
401 LLVMValueRef t_offset
;
403 LLVMValueRef attribute_offset
;
404 LLVMValueRef buffer_index
;
405 LLVMValueRef args
[3];
408 /* Load the T list */
409 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_VERTEX_BUFFERS
);
411 t_offset
= lp_build_const_int32(gallivm
, input_index
);
413 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
415 /* Build the attribute offset */
416 attribute_offset
= lp_build_const_int32(gallivm
, 0);
418 buffer_index
= LLVMGetParam(ctx
->main_fn
,
419 ctx
->param_vertex_index0
+
423 args
[1] = attribute_offset
;
424 args
[2] = buffer_index
;
425 input
= lp_build_intrinsic(gallivm
->builder
,
426 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
427 LP_FUNC_ATTR_READNONE
);
429 /* Break up the vec4 into individual components */
430 for (chan
= 0; chan
< 4; chan
++) {
431 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
432 out
[chan
] = LLVMBuildExtractElement(gallivm
->builder
,
433 input
, llvm_chan
, "");
436 fix_fetch
= (ctx
->shader
->key
.mono
.vs
.fix_fetch
>> (4 * input_index
)) & 0xf;
439 case SI_FIX_FETCH_A2_SNORM
:
440 case SI_FIX_FETCH_A2_SSCALED
:
441 case SI_FIX_FETCH_A2_SINT
: {
442 /* The hardware returns an unsigned value; convert it to a
445 LLVMValueRef tmp
= out
[3];
446 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
448 /* First, recover the sign-extended signed integer value. */
449 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
450 tmp
= LLVMBuildFPToUI(gallivm
->builder
, tmp
, ctx
->i32
, "");
452 tmp
= LLVMBuildBitCast(gallivm
->builder
, tmp
, ctx
->i32
, "");
454 /* For the integer-like cases, do a natural sign extension.
456 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
457 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
460 tmp
= LLVMBuildShl(gallivm
->builder
, tmp
,
461 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
462 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
463 tmp
= LLVMBuildAShr(gallivm
->builder
, tmp
, c30
, "");
465 /* Convert back to the right type. */
466 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
468 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
469 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
470 clamp
= LLVMBuildFCmp(gallivm
->builder
, LLVMRealULT
, tmp
, neg_one
, "");
471 tmp
= LLVMBuildSelect(gallivm
->builder
, clamp
, neg_one
, tmp
, "");
472 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
473 tmp
= LLVMBuildSIToFP(gallivm
->builder
, tmp
, ctx
->f32
, "");
479 case SI_FIX_FETCH_RGBA_32_UNORM
:
480 case SI_FIX_FETCH_RGBX_32_UNORM
:
481 for (chan
= 0; chan
< 4; chan
++) {
482 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
484 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
485 out
[chan
], ctx
->f32
, "");
486 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
487 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
489 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
490 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
491 out
[3] = LLVMConstReal(ctx
->f32
, 1);
493 case SI_FIX_FETCH_RGBA_32_SNORM
:
494 case SI_FIX_FETCH_RGBX_32_SNORM
:
495 case SI_FIX_FETCH_RGBA_32_FIXED
:
496 case SI_FIX_FETCH_RGBX_32_FIXED
: {
498 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
499 scale
= 1.0 / 0x10000;
501 scale
= 1.0 / INT_MAX
;
503 for (chan
= 0; chan
< 4; chan
++) {
504 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
506 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
507 out
[chan
], ctx
->f32
, "");
508 out
[chan
] = LLVMBuildFMul(gallivm
->builder
, out
[chan
],
509 LLVMConstReal(ctx
->f32
, scale
), "");
511 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
512 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
513 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
514 out
[3] = LLVMConstReal(ctx
->f32
, 1);
517 case SI_FIX_FETCH_RGBA_32_USCALED
:
518 for (chan
= 0; chan
< 4; chan
++) {
519 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
521 out
[chan
] = LLVMBuildUIToFP(gallivm
->builder
,
522 out
[chan
], ctx
->f32
, "");
525 case SI_FIX_FETCH_RGBA_32_SSCALED
:
526 for (chan
= 0; chan
< 4; chan
++) {
527 out
[chan
] = LLVMBuildBitCast(gallivm
->builder
, out
[chan
],
529 out
[chan
] = LLVMBuildSIToFP(gallivm
->builder
,
530 out
[chan
], ctx
->f32
, "");
536 static LLVMValueRef
get_primitive_id(struct lp_build_tgsi_context
*bld_base
,
539 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
542 return bld_base
->uint_bld
.zero
;
545 case PIPE_SHADER_VERTEX
:
546 return LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_prim_id
);
548 case PIPE_SHADER_TESS_CTRL
:
549 return LLVMGetParam(ctx
->main_fn
,
551 case PIPE_SHADER_TESS_EVAL
:
552 return LLVMGetParam(ctx
->main_fn
,
553 ctx
->param_tes_patch_id
);
554 case PIPE_SHADER_GEOMETRY
:
555 return LLVMGetParam(ctx
->main_fn
,
556 SI_PARAM_PRIMITIVE_ID
);
559 return bld_base
->uint_bld
.zero
;
564 * Return the value of tgsi_ind_register for indexing.
565 * This is the indirect index with the constant offset added to it.
567 static LLVMValueRef
get_indirect_index(struct si_shader_context
*ctx
,
568 const struct tgsi_ind_register
*ind
,
571 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
574 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
575 result
= LLVMBuildLoad(gallivm
->builder
, result
, "");
576 result
= LLVMBuildAdd(gallivm
->builder
, result
,
577 lp_build_const_int32(gallivm
, rel_index
), "");
582 * Like get_indirect_index, but restricts the return value to a (possibly
583 * undefined) value inside [0..num).
585 static LLVMValueRef
get_bounded_indirect_index(struct si_shader_context
*ctx
,
586 const struct tgsi_ind_register
*ind
,
587 int rel_index
, unsigned num
)
589 LLVMValueRef result
= get_indirect_index(ctx
, ind
, rel_index
);
591 /* LLVM 3.8: If indirect resource indexing is used:
595 if (HAVE_LLVM
<= 0x0308)
596 return LLVMGetUndef(ctx
->i32
);
598 return si_llvm_bound_index(ctx
, result
, num
);
603 * Calculate a dword address given an input or output register and a stride.
605 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
606 const struct tgsi_full_dst_register
*dst
,
607 const struct tgsi_full_src_register
*src
,
608 LLVMValueRef vertex_dw_stride
,
609 LLVMValueRef base_addr
)
611 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
612 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
613 ubyte
*name
, *index
, *array_first
;
615 struct tgsi_full_dst_register reg
;
617 /* Set the register description. The address computation is the same
618 * for sources and destinations. */
620 reg
.Register
.File
= src
->Register
.File
;
621 reg
.Register
.Index
= src
->Register
.Index
;
622 reg
.Register
.Indirect
= src
->Register
.Indirect
;
623 reg
.Register
.Dimension
= src
->Register
.Dimension
;
624 reg
.Indirect
= src
->Indirect
;
625 reg
.Dimension
= src
->Dimension
;
626 reg
.DimIndirect
= src
->DimIndirect
;
630 /* If the register is 2-dimensional (e.g. an array of vertices
631 * in a primitive), calculate the base address of the vertex. */
632 if (reg
.Register
.Dimension
) {
635 if (reg
.Dimension
.Indirect
)
636 index
= get_indirect_index(ctx
, ®
.DimIndirect
,
637 reg
.Dimension
.Index
);
639 index
= lp_build_const_int32(gallivm
, reg
.Dimension
.Index
);
641 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
642 LLVMBuildMul(gallivm
->builder
, index
,
643 vertex_dw_stride
, ""), "");
646 /* Get information about the register. */
647 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
648 name
= info
->input_semantic_name
;
649 index
= info
->input_semantic_index
;
650 array_first
= info
->input_array_first
;
651 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
652 name
= info
->output_semantic_name
;
653 index
= info
->output_semantic_index
;
654 array_first
= info
->output_array_first
;
660 if (reg
.Register
.Indirect
) {
661 /* Add the relative address of the element. */
662 LLVMValueRef ind_index
;
664 if (reg
.Indirect
.ArrayID
)
665 first
= array_first
[reg
.Indirect
.ArrayID
];
667 first
= reg
.Register
.Index
;
669 ind_index
= get_indirect_index(ctx
, ®
.Indirect
,
670 reg
.Register
.Index
- first
);
672 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
673 LLVMBuildMul(gallivm
->builder
, ind_index
,
674 lp_build_const_int32(gallivm
, 4), ""), "");
676 param
= si_shader_io_get_unique_index(name
[first
], index
[first
]);
678 param
= si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
679 index
[reg
.Register
.Index
]);
682 /* Add the base address of the element. */
683 return LLVMBuildAdd(gallivm
->builder
, base_addr
,
684 lp_build_const_int32(gallivm
, param
* 4), "");
687 /* The offchip buffer layout for TCS->TES is
689 * - attribute 0 of patch 0 vertex 0
690 * - attribute 0 of patch 0 vertex 1
691 * - attribute 0 of patch 0 vertex 2
693 * - attribute 0 of patch 1 vertex 0
694 * - attribute 0 of patch 1 vertex 1
696 * - attribute 1 of patch 0 vertex 0
697 * - attribute 1 of patch 0 vertex 1
699 * - per patch attribute 0 of patch 0
700 * - per patch attribute 0 of patch 1
703 * Note that every attribute has 4 components.
705 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
706 LLVMValueRef vertex_index
,
707 LLVMValueRef param_index
)
709 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
710 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
711 LLVMValueRef param_stride
, constant16
;
713 vertices_per_patch
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 6);
714 num_patches
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 0, 9);
715 total_vertices
= LLVMBuildMul(gallivm
->builder
, vertices_per_patch
,
718 constant16
= lp_build_const_int32(gallivm
, 16);
720 base_addr
= LLVMBuildMul(gallivm
->builder
, get_rel_patch_id(ctx
),
721 vertices_per_patch
, "");
723 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
726 param_stride
= total_vertices
;
728 base_addr
= get_rel_patch_id(ctx
);
729 param_stride
= num_patches
;
732 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
733 LLVMBuildMul(gallivm
->builder
, param_index
,
734 param_stride
, ""), "");
736 base_addr
= LLVMBuildMul(gallivm
->builder
, base_addr
, constant16
, "");
739 LLVMValueRef patch_data_offset
=
740 unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 16, 16);
742 base_addr
= LLVMBuildAdd(gallivm
->builder
, base_addr
,
743 patch_data_offset
, "");
748 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
749 struct si_shader_context
*ctx
,
750 const struct tgsi_full_dst_register
*dst
,
751 const struct tgsi_full_src_register
*src
)
753 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
754 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
755 ubyte
*name
, *index
, *array_first
;
756 struct tgsi_full_src_register reg
;
757 LLVMValueRef vertex_index
= NULL
;
758 LLVMValueRef param_index
= NULL
;
759 unsigned param_index_base
, param_base
;
761 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
763 if (reg
.Register
.Dimension
) {
765 if (reg
.Dimension
.Indirect
)
766 vertex_index
= get_indirect_index(ctx
, ®
.DimIndirect
,
767 reg
.Dimension
.Index
);
769 vertex_index
= lp_build_const_int32(gallivm
,
770 reg
.Dimension
.Index
);
773 /* Get information about the register. */
774 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
775 name
= info
->input_semantic_name
;
776 index
= info
->input_semantic_index
;
777 array_first
= info
->input_array_first
;
778 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
779 name
= info
->output_semantic_name
;
780 index
= info
->output_semantic_index
;
781 array_first
= info
->output_array_first
;
787 if (reg
.Register
.Indirect
) {
788 if (reg
.Indirect
.ArrayID
)
789 param_base
= array_first
[reg
.Indirect
.ArrayID
];
791 param_base
= reg
.Register
.Index
;
793 param_index
= get_indirect_index(ctx
, ®
.Indirect
,
794 reg
.Register
.Index
- param_base
);
797 param_base
= reg
.Register
.Index
;
798 param_index
= lp_build_const_int32(gallivm
, 0);
801 param_index_base
= si_shader_io_get_unique_index(name
[param_base
],
804 param_index
= LLVMBuildAdd(gallivm
->builder
, param_index
,
805 lp_build_const_int32(gallivm
, param_index_base
),
808 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
811 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
812 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
813 * or v4i32 (num_channels=3,4). */
814 static void build_tbuffer_store(struct si_shader_context
*ctx
,
817 unsigned num_channels
,
819 LLVMValueRef soffset
,
820 unsigned inst_offset
,
829 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
830 LLVMValueRef args
[] = {
833 LLVMConstInt(ctx
->i32
, num_channels
, 0),
836 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
837 LLVMConstInt(ctx
->i32
, dfmt
, 0),
838 LLVMConstInt(ctx
->i32
, nfmt
, 0),
839 LLVMConstInt(ctx
->i32
, offen
, 0),
840 LLVMConstInt(ctx
->i32
, idxen
, 0),
841 LLVMConstInt(ctx
->i32
, glc
, 0),
842 LLVMConstInt(ctx
->i32
, slc
, 0),
843 LLVMConstInt(ctx
->i32
, tfe
, 0)
846 /* The instruction offset field has 12 bits */
847 assert(offen
|| inst_offset
< (1 << 12));
849 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
850 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
851 const char *types
[] = {"i32", "v2i32", "v4i32"};
853 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
855 lp_build_intrinsic(gallivm
->builder
, name
, ctx
->voidt
,
856 args
, ARRAY_SIZE(args
), 0);
859 static void build_tbuffer_store_dwords(struct si_shader_context
*ctx
,
862 unsigned num_channels
,
864 LLVMValueRef soffset
,
865 unsigned inst_offset
)
867 static unsigned dfmt
[] = {
868 V_008F0C_BUF_DATA_FORMAT_32
,
869 V_008F0C_BUF_DATA_FORMAT_32_32
,
870 V_008F0C_BUF_DATA_FORMAT_32_32_32
,
871 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
873 assert(num_channels
>= 1 && num_channels
<= 4);
875 build_tbuffer_store(ctx
, rsrc
, vdata
, num_channels
, vaddr
, soffset
,
876 inst_offset
, dfmt
[num_channels
-1],
877 V_008F0C_BUF_NUM_FORMAT_UINT
, 1, 0, 1, 1, 0);
880 static LLVMValueRef
build_buffer_load(struct si_shader_context
*ctx
,
884 LLVMValueRef voffset
,
885 LLVMValueRef soffset
,
886 unsigned inst_offset
,
890 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
891 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
893 if (HAVE_LLVM
>= 0x309) {
894 LLVMValueRef args
[] = {
895 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v4i32
, ""),
896 vindex
? vindex
: LLVMConstInt(ctx
->i32
, 0, 0),
897 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
898 LLVMConstInt(ctx
->i1
, glc
, 0),
899 LLVMConstInt(ctx
->i1
, slc
, 0)
902 LLVMTypeRef types
[] = {ctx
->f32
, LLVMVectorType(ctx
->f32
, 2),
904 const char *type_names
[] = {"f32", "v2f32", "v4f32"};
908 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], voffset
,
913 args
[2] = LLVMBuildAdd(gallivm
->builder
, args
[2], soffset
,
917 snprintf(name
, sizeof(name
), "llvm.amdgcn.buffer.load.%s",
920 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
921 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
923 LLVMValueRef args
[] = {
924 LLVMBuildBitCast(gallivm
->builder
, rsrc
, ctx
->v16i8
, ""),
925 voffset
? voffset
: vindex
,
927 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
928 LLVMConstInt(ctx
->i32
, voffset
? 1 : 0, 0), // offen
929 LLVMConstInt(ctx
->i32
, vindex
? 1 : 0, 0), //idxen
930 LLVMConstInt(ctx
->i32
, glc
, 0),
931 LLVMConstInt(ctx
->i32
, slc
, 0),
932 LLVMConstInt(ctx
->i32
, 0, 0), // TFE
935 LLVMTypeRef types
[] = {ctx
->i32
, LLVMVectorType(ctx
->i32
, 2),
937 const char *type_names
[] = {"i32", "v2i32", "v4i32"};
938 const char *arg_type
= "i32";
941 if (voffset
&& vindex
) {
942 LLVMValueRef vaddr
[] = {vindex
, voffset
};
945 args
[1] = lp_build_gather_values(gallivm
, vaddr
, 2);
948 snprintf(name
, sizeof(name
), "llvm.SI.buffer.load.dword.%s.%s",
949 type_names
[func
], arg_type
);
951 return lp_build_intrinsic(gallivm
->builder
, name
, types
[func
], args
,
952 ARRAY_SIZE(args
), LP_FUNC_ATTR_READONLY
);
956 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
957 enum tgsi_opcode_type type
, unsigned swizzle
,
958 LLVMValueRef buffer
, LLVMValueRef offset
,
961 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
962 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
963 LLVMValueRef value
, value2
;
964 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
965 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
968 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
971 return LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
974 if (!tgsi_type_is_64bit(type
)) {
975 value
= build_buffer_load(ctx
, buffer
, 4, NULL
, base
, offset
,
978 value
= LLVMBuildBitCast(gallivm
->builder
, value
, vec_type
, "");
979 return LLVMBuildExtractElement(gallivm
->builder
, value
,
980 lp_build_const_int32(gallivm
, swizzle
), "");
983 value
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
986 value2
= build_buffer_load(ctx
, buffer
, 1, NULL
, base
, offset
,
987 swizzle
* 4 + 4, 1, 0);
989 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
995 * \param type output value type
996 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
997 * \param dw_addr address in dwords
999 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1000 enum tgsi_opcode_type type
, unsigned swizzle
,
1001 LLVMValueRef dw_addr
)
1003 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1004 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1007 if (swizzle
== ~0) {
1008 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1010 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1011 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1013 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
1017 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1018 lp_build_const_int32(gallivm
, swizzle
));
1020 value
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
1021 if (tgsi_type_is_64bit(type
)) {
1022 LLVMValueRef value2
;
1023 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1024 lp_build_const_int32(gallivm
, 1));
1025 value2
= build_indexed_load(ctx
, ctx
->lds
, dw_addr
, false);
1026 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1029 return LLVMBuildBitCast(gallivm
->builder
, value
,
1030 tgsi2llvmtype(bld_base
, type
), "");
1036 * \param swizzle offset (typically 0..3)
1037 * \param dw_addr address in dwords
1038 * \param value value to store
1040 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
1041 unsigned swizzle
, LLVMValueRef dw_addr
,
1044 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1045 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1047 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1048 lp_build_const_int32(gallivm
, swizzle
));
1050 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1051 build_indexed_store(ctx
, ctx
->lds
,
1055 static LLVMValueRef
fetch_input_tcs(
1056 struct lp_build_tgsi_context
*bld_base
,
1057 const struct tgsi_full_src_register
*reg
,
1058 enum tgsi_opcode_type type
, unsigned swizzle
)
1060 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1061 LLVMValueRef dw_addr
, stride
;
1063 stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
1064 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1065 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1067 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1070 static LLVMValueRef
fetch_output_tcs(
1071 struct lp_build_tgsi_context
*bld_base
,
1072 const struct tgsi_full_src_register
*reg
,
1073 enum tgsi_opcode_type type
, unsigned swizzle
)
1075 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1076 LLVMValueRef dw_addr
, stride
;
1078 if (reg
->Register
.Dimension
) {
1079 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1080 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1081 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1083 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1084 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1087 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1090 static LLVMValueRef
fetch_input_tes(
1091 struct lp_build_tgsi_context
*bld_base
,
1092 const struct tgsi_full_src_register
*reg
,
1093 enum tgsi_opcode_type type
, unsigned swizzle
)
1095 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1096 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1097 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1099 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1100 SI_PARAM_RW_BUFFERS
);
1101 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1102 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1104 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1105 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1107 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
);
1110 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1111 const struct tgsi_full_instruction
*inst
,
1112 const struct tgsi_opcode_info
*info
,
1113 LLVMValueRef dst
[4])
1115 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1116 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1117 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[0];
1118 unsigned chan_index
;
1119 LLVMValueRef dw_addr
, stride
;
1120 LLVMValueRef rw_buffers
, buffer
, base
, buf_addr
;
1121 LLVMValueRef values
[4];
1123 /* Only handle per-patch and per-vertex outputs here.
1124 * Vectors will be lowered to scalars and this function will be called again.
1126 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1127 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1128 si_llvm_emit_store(bld_base
, inst
, info
, dst
);
1132 if (reg
->Register
.Dimension
) {
1133 stride
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 13, 8);
1134 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1135 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1137 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1138 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1141 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1142 SI_PARAM_RW_BUFFERS
);
1143 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1144 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1146 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1147 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1150 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst
, chan_index
) {
1151 LLVMValueRef value
= dst
[chan_index
];
1153 if (inst
->Instruction
.Saturate
)
1154 value
= si_llvm_saturate(bld_base
, value
);
1156 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1158 value
= LLVMBuildBitCast(gallivm
->builder
, value
, ctx
->i32
, "");
1159 values
[chan_index
] = value
;
1161 if (inst
->Dst
[0].Register
.WriteMask
!= 0xF) {
1162 build_tbuffer_store_dwords(ctx
, buffer
, value
, 1,
1168 if (inst
->Dst
[0].Register
.WriteMask
== 0xF) {
1169 LLVMValueRef value
= lp_build_gather_values(bld_base
->base
.gallivm
,
1171 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buf_addr
,
1176 static LLVMValueRef
fetch_input_gs(
1177 struct lp_build_tgsi_context
*bld_base
,
1178 const struct tgsi_full_src_register
*reg
,
1179 enum tgsi_opcode_type type
,
1182 struct lp_build_context
*base
= &bld_base
->base
;
1183 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1184 struct si_shader
*shader
= ctx
->shader
;
1185 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1186 struct gallivm_state
*gallivm
= base
->gallivm
;
1187 LLVMValueRef vtx_offset
;
1188 LLVMValueRef args
[9];
1189 unsigned vtx_offset_param
;
1190 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1191 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1192 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1196 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1197 return get_primitive_id(bld_base
, swizzle
);
1199 if (!reg
->Register
.Dimension
)
1202 if (swizzle
== ~0) {
1203 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1205 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1206 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1208 return lp_build_gather_values(bld_base
->base
.gallivm
, values
,
1212 /* Get the vertex offset parameter */
1213 vtx_offset_param
= reg
->Dimension
.Index
;
1214 if (vtx_offset_param
< 2) {
1215 vtx_offset_param
+= SI_PARAM_VTX0_OFFSET
;
1217 assert(vtx_offset_param
< 6);
1218 vtx_offset_param
+= SI_PARAM_VTX2_OFFSET
- 2;
1220 vtx_offset
= lp_build_mul_imm(uint
,
1221 LLVMGetParam(ctx
->main_fn
,
1225 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1226 args
[0] = ctx
->esgs_ring
;
1227 args
[1] = vtx_offset
;
1228 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
) * 256);
1229 args
[3] = uint
->zero
;
1230 args
[4] = uint
->one
; /* OFFEN */
1231 args
[5] = uint
->zero
; /* IDXEN */
1232 args
[6] = uint
->one
; /* GLC */
1233 args
[7] = uint
->zero
; /* SLC */
1234 args
[8] = uint
->zero
; /* TFE */
1236 value
= lp_build_intrinsic(gallivm
->builder
,
1237 "llvm.SI.buffer.load.dword.i32.i32",
1239 LP_FUNC_ATTR_READONLY
);
1240 if (tgsi_type_is_64bit(type
)) {
1241 LLVMValueRef value2
;
1242 args
[2] = lp_build_const_int32(gallivm
, (param
* 4 + swizzle
+ 1) * 256);
1243 value2
= lp_build_intrinsic(gallivm
->builder
,
1244 "llvm.SI.buffer.load.dword.i32.i32",
1246 LP_FUNC_ATTR_READONLY
);
1247 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1250 return LLVMBuildBitCast(gallivm
->builder
,
1252 tgsi2llvmtype(bld_base
, type
), "");
1255 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1257 switch (interpolate
) {
1258 case TGSI_INTERPOLATE_CONSTANT
:
1261 case TGSI_INTERPOLATE_LINEAR
:
1262 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1263 return SI_PARAM_LINEAR_SAMPLE
;
1264 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1265 return SI_PARAM_LINEAR_CENTROID
;
1267 return SI_PARAM_LINEAR_CENTER
;
1269 case TGSI_INTERPOLATE_COLOR
:
1270 case TGSI_INTERPOLATE_PERSPECTIVE
:
1271 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1272 return SI_PARAM_PERSP_SAMPLE
;
1273 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1274 return SI_PARAM_PERSP_CENTROID
;
1276 return SI_PARAM_PERSP_CENTER
;
1279 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1284 static LLVMValueRef
build_fs_interp(
1285 struct lp_build_tgsi_context
*bld_base
,
1286 LLVMValueRef llvm_chan
,
1287 LLVMValueRef attr_number
,
1288 LLVMValueRef params
,
1292 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1293 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1294 LLVMValueRef args
[5];
1296 if (HAVE_LLVM
< 0x0400) {
1298 ij
[0] = LLVMBuildBitCast(gallivm
->builder
, i
, ctx
->i32
, "");
1299 ij
[1] = LLVMBuildBitCast(gallivm
->builder
, j
, ctx
->i32
, "");
1301 args
[0] = llvm_chan
;
1302 args
[1] = attr_number
;
1304 args
[3] = lp_build_gather_values(gallivm
, ij
, 2);
1305 return lp_build_intrinsic(gallivm
->builder
, "llvm.SI.fs.interp",
1307 LP_FUNC_ATTR_READNONE
);
1311 args
[1] = llvm_chan
;
1312 args
[2] = attr_number
;
1315 p1
= lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p1",
1316 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1320 args
[2] = llvm_chan
;
1321 args
[3] = attr_number
;
1324 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.p2",
1325 ctx
->f32
, args
, 5, LP_FUNC_ATTR_READNONE
);
1328 static LLVMValueRef
build_fs_interp_mov(
1329 struct lp_build_tgsi_context
*bld_base
,
1330 LLVMValueRef parameter
,
1331 LLVMValueRef llvm_chan
,
1332 LLVMValueRef attr_number
,
1333 LLVMValueRef params
) {
1335 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1336 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
1337 LLVMValueRef args
[4];
1338 if (HAVE_LLVM
< 0x0400) {
1339 args
[0] = llvm_chan
;
1340 args
[1] = attr_number
;
1343 return lp_build_intrinsic(gallivm
->builder
,
1344 "llvm.SI.fs.constant",
1346 LP_FUNC_ATTR_READNONE
);
1349 args
[0] = parameter
;
1350 args
[1] = llvm_chan
;
1351 args
[2] = attr_number
;
1354 return lp_build_intrinsic(gallivm
->builder
, "llvm.amdgcn.interp.mov",
1355 ctx
->f32
, args
, 4, LP_FUNC_ATTR_READNONE
);
1359 * Interpolate a fragment shader input.
1361 * @param ctx context
1362 * @param input_index index of the input in hardware
1363 * @param semantic_name TGSI_SEMANTIC_*
1364 * @param semantic_index semantic index
1365 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1366 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1367 * @param interp_param interpolation weights (i,j)
1368 * @param prim_mask SI_PARAM_PRIM_MASK
1369 * @param face SI_PARAM_FRONT_FACE
1370 * @param result the return value (4 components)
1372 static void interp_fs_input(struct si_shader_context
*ctx
,
1373 unsigned input_index
,
1374 unsigned semantic_name
,
1375 unsigned semantic_index
,
1376 unsigned num_interp_inputs
,
1377 unsigned colors_read_mask
,
1378 LLVMValueRef interp_param
,
1379 LLVMValueRef prim_mask
,
1381 LLVMValueRef result
[4])
1383 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1384 struct lp_build_context
*base
= &bld_base
->base
;
1385 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
1386 struct gallivm_state
*gallivm
= base
->gallivm
;
1387 LLVMValueRef attr_number
;
1392 /* fs.constant returns the param from the middle vertex, so it's not
1393 * really useful for flat shading. It's meant to be used for custom
1394 * interpolation (but the intrinsic can't fetch from the other two
1397 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1398 * to do the right thing. The only reason we use fs.constant is that
1399 * fs.interp cannot be used on integers, because they can be equal
1402 * When interp is false we will use fs.constant or for newer llvm,
1403 * amdgcn.interp.mov.
1405 bool interp
= interp_param
!= NULL
;
1407 attr_number
= lp_build_const_int32(gallivm
, input_index
);
1410 interp_param
= LLVMBuildBitCast(gallivm
->builder
, interp_param
,
1411 LLVMVectorType(ctx
->f32
, 2), "");
1413 i
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1415 j
= LLVMBuildExtractElement(gallivm
->builder
, interp_param
,
1419 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1420 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1421 LLVMValueRef is_face_positive
;
1422 LLVMValueRef back_attr_number
;
1424 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1425 * otherwise it's at offset "num_inputs".
1427 unsigned back_attr_offset
= num_interp_inputs
;
1428 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1429 back_attr_offset
+= 1;
1431 back_attr_number
= lp_build_const_int32(gallivm
, back_attr_offset
);
1433 is_face_positive
= LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
1434 face
, uint
->zero
, "");
1436 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1437 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1438 LLVMValueRef front
, back
;
1441 front
= build_fs_interp(bld_base
, llvm_chan
,
1442 attr_number
, prim_mask
,
1444 back
= build_fs_interp(bld_base
, llvm_chan
,
1445 back_attr_number
, prim_mask
,
1448 front
= build_fs_interp_mov(bld_base
,
1449 lp_build_const_int32(gallivm
, 2), /* P0 */
1450 llvm_chan
, attr_number
, prim_mask
);
1451 back
= build_fs_interp_mov(bld_base
,
1452 lp_build_const_int32(gallivm
, 2), /* P0 */
1453 llvm_chan
, back_attr_number
, prim_mask
);
1456 result
[chan
] = LLVMBuildSelect(gallivm
->builder
,
1462 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1464 result
[0] = build_fs_interp(bld_base
, uint
->zero
,
1465 attr_number
, prim_mask
, i
, j
);
1467 result
[0] = build_fs_interp_mov(bld_base
, uint
->zero
,
1468 lp_build_const_int32(gallivm
, 2), /* P0 */
1469 attr_number
, prim_mask
);
1472 result
[2] = lp_build_const_float(gallivm
, 0.0f
);
1473 result
[3] = lp_build_const_float(gallivm
, 1.0f
);
1475 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1476 LLVMValueRef llvm_chan
= lp_build_const_int32(gallivm
, chan
);
1479 result
[chan
] = build_fs_interp(bld_base
,
1480 llvm_chan
, attr_number
, prim_mask
, i
, j
);
1482 result
[chan
] = build_fs_interp_mov(bld_base
,
1483 lp_build_const_int32(gallivm
, 2), /* P0 */
1484 llvm_chan
, attr_number
, prim_mask
);
1490 static void declare_input_fs(
1491 struct si_shader_context
*radeon_bld
,
1492 unsigned input_index
,
1493 const struct tgsi_full_declaration
*decl
,
1494 LLVMValueRef out
[4])
1496 struct lp_build_context
*base
= &radeon_bld
->bld_base
.base
;
1497 struct si_shader_context
*ctx
=
1498 si_shader_context(&radeon_bld
->bld_base
);
1499 struct si_shader
*shader
= ctx
->shader
;
1500 LLVMValueRef main_fn
= radeon_bld
->main_fn
;
1501 LLVMValueRef interp_param
= NULL
;
1502 int interp_param_idx
;
1504 /* Get colors from input VGPRs (set by the prolog). */
1505 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
) {
1506 unsigned i
= decl
->Semantic
.Index
;
1507 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1508 unsigned mask
= colors_read
>> (i
* 4);
1509 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1510 (i
? util_bitcount(colors_read
& 0xf) : 0);
1512 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1513 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1514 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1515 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1519 interp_param_idx
= lookup_interp_param_index(decl
->Interp
.Interpolate
,
1520 decl
->Interp
.Location
);
1521 if (interp_param_idx
== -1)
1523 else if (interp_param_idx
) {
1524 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1527 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_COLOR
&&
1528 decl
->Interp
.Interpolate
== TGSI_INTERPOLATE_COLOR
&&
1529 ctx
->shader
->key
.part
.ps
.prolog
.flatshade_colors
)
1530 interp_param
= NULL
; /* load the constant color */
1532 interp_fs_input(ctx
, input_index
, decl
->Semantic
.Name
,
1533 decl
->Semantic
.Index
, shader
->selector
->info
.num_inputs
,
1534 shader
->selector
->info
.colors_read
, interp_param
,
1535 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1536 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1540 static LLVMValueRef
get_sample_id(struct si_shader_context
*radeon_bld
)
1542 return unpack_param(si_shader_context(&radeon_bld
->bld_base
),
1543 SI_PARAM_ANCILLARY
, 8, 4);
1547 * Set range metadata on an instruction. This can only be used on load and
1548 * call instructions. If you know an instruction can only produce the values
1549 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1550 * \p lo is the minimum value inclusive.
1551 * \p hi is the maximum value exclusive.
1553 static void set_range_metadata(struct si_shader_context
*ctx
,
1554 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1556 LLVMValueRef range_md
, md_args
[2];
1557 LLVMTypeRef type
= LLVMTypeOf(value
);
1558 LLVMContextRef context
= LLVMGetTypeContext(type
);
1560 md_args
[0] = LLVMConstInt(type
, lo
, false);
1561 md_args
[1] = LLVMConstInt(type
, hi
, false);
1562 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1563 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1566 static LLVMValueRef
get_thread_id(struct si_shader_context
*ctx
)
1568 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1571 if (HAVE_LLVM
< 0x0308) {
1572 tid
= lp_build_intrinsic(gallivm
->builder
, "llvm.SI.tid",
1573 ctx
->i32
, NULL
, 0, LP_FUNC_ATTR_READNONE
);
1575 LLVMValueRef tid_args
[2];
1576 tid_args
[0] = lp_build_const_int32(gallivm
, 0xffffffff);
1577 tid_args
[1] = lp_build_const_int32(gallivm
, 0);
1578 tid_args
[1] = lp_build_intrinsic(gallivm
->builder
,
1579 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1580 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1582 tid
= lp_build_intrinsic(gallivm
->builder
,
1583 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1584 tid_args
, 2, LP_FUNC_ATTR_READNONE
);
1586 set_range_metadata(ctx
, tid
, 0, 64);
1591 * Load a dword from a constant buffer.
1593 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1594 LLVMValueRef resource
,
1595 LLVMValueRef offset
)
1597 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
1598 LLVMValueRef args
[2] = {resource
, offset
};
1600 return lp_build_intrinsic(builder
, "llvm.SI.load.const", ctx
->f32
, args
, 2,
1601 LP_FUNC_ATTR_READNONE
);
1604 static LLVMValueRef
load_sample_position(struct si_shader_context
*radeon_bld
, LLVMValueRef sample_id
)
1606 struct si_shader_context
*ctx
=
1607 si_shader_context(&radeon_bld
->bld_base
);
1608 struct lp_build_context
*uint_bld
= &radeon_bld
->bld_base
.uint_bld
;
1609 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1610 LLVMBuilderRef builder
= gallivm
->builder
;
1611 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1612 LLVMValueRef buf_index
= lp_build_const_int32(gallivm
, SI_PS_CONST_SAMPLE_POSITIONS
);
1613 LLVMValueRef resource
= build_indexed_load_const(ctx
, desc
, buf_index
);
1615 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1616 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1617 LLVMValueRef offset1
= LLVMBuildAdd(builder
, offset0
, lp_build_const_int32(gallivm
, 4), "");
1619 LLVMValueRef pos
[4] = {
1620 buffer_load_const(ctx
, resource
, offset0
),
1621 buffer_load_const(ctx
, resource
, offset1
),
1622 lp_build_const_float(gallivm
, 0),
1623 lp_build_const_float(gallivm
, 0)
1626 return lp_build_gather_values(gallivm
, pos
, 4);
1629 static void declare_system_value(
1630 struct si_shader_context
*radeon_bld
,
1632 const struct tgsi_full_declaration
*decl
)
1634 struct si_shader_context
*ctx
=
1635 si_shader_context(&radeon_bld
->bld_base
);
1636 struct lp_build_context
*bld
= &radeon_bld
->bld_base
.base
;
1637 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1638 LLVMValueRef value
= 0;
1640 switch (decl
->Semantic
.Name
) {
1641 case TGSI_SEMANTIC_INSTANCEID
:
1642 value
= LLVMGetParam(radeon_bld
->main_fn
,
1643 ctx
->param_instance_id
);
1646 case TGSI_SEMANTIC_VERTEXID
:
1647 value
= LLVMBuildAdd(gallivm
->builder
,
1648 LLVMGetParam(radeon_bld
->main_fn
,
1649 ctx
->param_vertex_id
),
1650 LLVMGetParam(radeon_bld
->main_fn
,
1651 SI_PARAM_BASE_VERTEX
), "");
1654 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1655 value
= LLVMGetParam(radeon_bld
->main_fn
,
1656 ctx
->param_vertex_id
);
1659 case TGSI_SEMANTIC_BASEVERTEX
:
1660 value
= LLVMGetParam(radeon_bld
->main_fn
,
1661 SI_PARAM_BASE_VERTEX
);
1664 case TGSI_SEMANTIC_BASEINSTANCE
:
1665 value
= LLVMGetParam(radeon_bld
->main_fn
,
1666 SI_PARAM_START_INSTANCE
);
1669 case TGSI_SEMANTIC_DRAWID
:
1670 value
= LLVMGetParam(radeon_bld
->main_fn
,
1674 case TGSI_SEMANTIC_INVOCATIONID
:
1675 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1676 value
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
1677 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1678 value
= LLVMGetParam(radeon_bld
->main_fn
,
1679 SI_PARAM_GS_INSTANCE_ID
);
1681 assert(!"INVOCATIONID not implemented");
1684 case TGSI_SEMANTIC_POSITION
:
1686 LLVMValueRef pos
[4] = {
1687 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1688 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1689 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1690 lp_build_emit_llvm_unary(&radeon_bld
->bld_base
, TGSI_OPCODE_RCP
,
1691 LLVMGetParam(radeon_bld
->main_fn
,
1692 SI_PARAM_POS_W_FLOAT
)),
1694 value
= lp_build_gather_values(gallivm
, pos
, 4);
1698 case TGSI_SEMANTIC_FACE
:
1699 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_FRONT_FACE
);
1702 case TGSI_SEMANTIC_SAMPLEID
:
1703 value
= get_sample_id(radeon_bld
);
1706 case TGSI_SEMANTIC_SAMPLEPOS
: {
1707 LLVMValueRef pos
[4] = {
1708 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1709 LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1710 lp_build_const_float(gallivm
, 0),
1711 lp_build_const_float(gallivm
, 0)
1713 pos
[0] = lp_build_emit_llvm_unary(&radeon_bld
->bld_base
,
1714 TGSI_OPCODE_FRC
, pos
[0]);
1715 pos
[1] = lp_build_emit_llvm_unary(&radeon_bld
->bld_base
,
1716 TGSI_OPCODE_FRC
, pos
[1]);
1717 value
= lp_build_gather_values(gallivm
, pos
, 4);
1721 case TGSI_SEMANTIC_SAMPLEMASK
:
1722 /* This can only occur with the OpenGL Core profile, which
1723 * doesn't support smoothing.
1725 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1728 case TGSI_SEMANTIC_TESSCOORD
:
1730 LLVMValueRef coord
[4] = {
1731 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_u
),
1732 LLVMGetParam(radeon_bld
->main_fn
, ctx
->param_tes_v
),
1737 /* For triangles, the vector should be (u, v, 1-u-v). */
1738 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1739 PIPE_PRIM_TRIANGLES
)
1740 coord
[2] = lp_build_sub(bld
, bld
->one
,
1741 lp_build_add(bld
, coord
[0], coord
[1]));
1743 value
= lp_build_gather_values(gallivm
, coord
, 4);
1747 case TGSI_SEMANTIC_VERTICESIN
:
1748 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1749 value
= unpack_param(ctx
, SI_PARAM_TCS_OUT_LAYOUT
, 26, 6);
1750 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1751 value
= unpack_param(ctx
, SI_PARAM_TCS_OFFCHIP_LAYOUT
, 9, 7);
1753 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1756 case TGSI_SEMANTIC_TESSINNER
:
1757 case TGSI_SEMANTIC_TESSOUTER
:
1759 LLVMValueRef rw_buffers
, buffer
, base
, addr
;
1760 int param
= si_shader_io_get_unique_index(decl
->Semantic
.Name
, 0);
1762 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
1763 SI_PARAM_RW_BUFFERS
);
1764 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
1765 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
1767 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
1768 addr
= get_tcs_tes_buffer_address(ctx
, NULL
,
1769 lp_build_const_int32(gallivm
, param
));
1771 value
= buffer_load(&radeon_bld
->bld_base
, TGSI_TYPE_FLOAT
,
1772 ~0, buffer
, base
, addr
);
1777 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1778 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1780 LLVMValueRef buf
, slot
, val
[4];
1783 slot
= lp_build_const_int32(gallivm
, SI_HS_CONST_DEFAULT_TESS_LEVELS
);
1784 buf
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
1785 buf
= build_indexed_load_const(ctx
, buf
, slot
);
1786 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1788 for (i
= 0; i
< 4; i
++)
1789 val
[i
] = buffer_load_const(ctx
, buf
,
1790 lp_build_const_int32(gallivm
, (offset
+ i
) * 4));
1791 value
= lp_build_gather_values(gallivm
, val
, 4);
1795 case TGSI_SEMANTIC_PRIMID
:
1796 value
= get_primitive_id(&radeon_bld
->bld_base
, 0);
1799 case TGSI_SEMANTIC_GRID_SIZE
:
1800 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_GRID_SIZE
);
1803 case TGSI_SEMANTIC_BLOCK_SIZE
:
1805 LLVMValueRef values
[3];
1807 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1809 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1810 unsigned sizes
[3] = {
1811 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1812 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1813 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1816 for (i
= 0; i
< 3; ++i
)
1817 values
[i
] = lp_build_const_int32(gallivm
, sizes
[i
]);
1819 value
= lp_build_gather_values(gallivm
, values
, 3);
1821 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_SIZE
);
1826 case TGSI_SEMANTIC_BLOCK_ID
:
1827 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_BLOCK_ID
);
1830 case TGSI_SEMANTIC_THREAD_ID
:
1831 value
= LLVMGetParam(radeon_bld
->main_fn
, SI_PARAM_THREAD_ID
);
1834 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1835 if (HAVE_LLVM
>= 0x0309) {
1836 value
= lp_build_intrinsic(gallivm
->builder
,
1837 "llvm.amdgcn.ps.live",
1839 LP_FUNC_ATTR_READNONE
);
1840 value
= LLVMBuildNot(gallivm
->builder
, value
, "");
1841 value
= LLVMBuildSExt(gallivm
->builder
, value
, ctx
->i32
, "");
1843 assert(!"TGSI_SEMANTIC_HELPER_INVOCATION unsupported");
1849 assert(!"unknown system value");
1853 radeon_bld
->system_values
[index
] = value
;
1856 static void declare_compute_memory(struct si_shader_context
*radeon_bld
,
1857 const struct tgsi_full_declaration
*decl
)
1859 struct si_shader_context
*ctx
=
1860 si_shader_context(&radeon_bld
->bld_base
);
1861 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1862 struct gallivm_state
*gallivm
= &radeon_bld
->gallivm
;
1864 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1867 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1868 assert(decl
->Range
.First
== decl
->Range
.Last
);
1869 assert(!ctx
->shared_memory
);
1871 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1872 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1875 LLVMSetAlignment(var
, 4);
1877 ctx
->shared_memory
= LLVMBuildBitCast(gallivm
->builder
, var
, i8p
, "");
1880 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1882 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1883 SI_PARAM_CONST_BUFFERS
);
1885 return build_indexed_load_const(ctx
, list_ptr
,
1886 LLVMConstInt(ctx
->i32
, i
, 0));
1889 static LLVMValueRef
fetch_constant(
1890 struct lp_build_tgsi_context
*bld_base
,
1891 const struct tgsi_full_src_register
*reg
,
1892 enum tgsi_opcode_type type
,
1895 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1896 struct lp_build_context
*base
= &bld_base
->base
;
1897 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1900 LLVMValueRef addr
, bufp
;
1901 LLVMValueRef result
;
1903 if (swizzle
== LP_CHAN_ALL
) {
1905 LLVMValueRef values
[4];
1906 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1907 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1909 return lp_build_gather_values(bld_base
->base
.gallivm
, values
, 4);
1912 buf
= reg
->Register
.Dimension
? reg
->Dimension
.Index
: 0;
1913 idx
= reg
->Register
.Index
* 4 + swizzle
;
1915 if (reg
->Register
.Dimension
&& reg
->Dimension
.Indirect
) {
1916 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_CONST_BUFFERS
);
1918 index
= get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1919 reg
->Dimension
.Index
,
1920 SI_NUM_CONST_BUFFERS
);
1921 bufp
= build_indexed_load_const(ctx
, ptr
, index
);
1923 bufp
= load_const_buffer_desc(ctx
, buf
);
1925 if (reg
->Register
.Indirect
) {
1926 addr
= ctx
->addrs
[ireg
->Index
][ireg
->Swizzle
];
1927 addr
= LLVMBuildLoad(base
->gallivm
->builder
, addr
, "load addr reg");
1928 addr
= lp_build_mul_imm(&bld_base
->uint_bld
, addr
, 16);
1929 addr
= lp_build_add(&bld_base
->uint_bld
, addr
,
1930 lp_build_const_int32(base
->gallivm
, idx
* 4));
1932 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1935 result
= buffer_load_const(ctx
, bufp
, addr
);
1937 if (!tgsi_type_is_64bit(type
))
1938 result
= bitcast(bld_base
, type
, result
);
1940 LLVMValueRef addr2
, result2
;
1942 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1943 LLVMConstInt(ctx
->i32
, 4, 0));
1944 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1946 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1952 /* Upper 16 bits must be zero. */
1953 static LLVMValueRef
si_llvm_pack_two_int16(struct gallivm_state
*gallivm
,
1954 LLVMValueRef val
[2])
1956 return LLVMBuildOr(gallivm
->builder
, val
[0],
1957 LLVMBuildShl(gallivm
->builder
, val
[1],
1958 lp_build_const_int32(gallivm
, 16),
1962 /* Upper 16 bits are ignored and will be dropped. */
1963 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct gallivm_state
*gallivm
,
1964 LLVMValueRef val
[2])
1966 LLVMValueRef v
[2] = {
1967 LLVMBuildAnd(gallivm
->builder
, val
[0],
1968 lp_build_const_int32(gallivm
, 0xffff), ""),
1971 return si_llvm_pack_two_int16(gallivm
, v
);
1974 /* Initialize arguments for the shader export intrinsic */
1975 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1976 LLVMValueRef
*values
,
1980 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1981 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1982 struct lp_build_context
*base
= &bld_base
->base
;
1983 struct gallivm_state
*gallivm
= base
->gallivm
;
1984 LLVMBuilderRef builder
= base
->gallivm
->builder
;
1985 LLVMValueRef val
[4];
1986 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1990 /* Default is 0xf. Adjusted below depending on the format. */
1991 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
1993 /* Specify whether the EXEC mask represents the valid mask */
1994 args
[1] = uint
->zero
;
1996 /* Specify whether this is the last export */
1997 args
[2] = uint
->zero
;
1999 /* Specify the target we are exporting */
2000 args
[3] = lp_build_const_int32(base
->gallivm
, target
);
2002 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2003 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2004 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2005 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2007 assert(cbuf
>= 0 && cbuf
< 8);
2008 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2009 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2012 args
[4] = uint
->zero
; /* COMPR flag */
2013 args
[5] = base
->undef
;
2014 args
[6] = base
->undef
;
2015 args
[7] = base
->undef
;
2016 args
[8] = base
->undef
;
2018 switch (spi_shader_col_format
) {
2019 case V_028714_SPI_SHADER_ZERO
:
2020 args
[0] = uint
->zero
; /* writemask */
2021 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
2024 case V_028714_SPI_SHADER_32_R
:
2025 args
[0] = uint
->one
; /* writemask */
2026 args
[5] = values
[0];
2029 case V_028714_SPI_SHADER_32_GR
:
2030 args
[0] = lp_build_const_int32(base
->gallivm
, 0x3); /* writemask */
2031 args
[5] = values
[0];
2032 args
[6] = values
[1];
2035 case V_028714_SPI_SHADER_32_AR
:
2036 args
[0] = lp_build_const_int32(base
->gallivm
, 0x9); /* writemask */
2037 args
[5] = values
[0];
2038 args
[8] = values
[3];
2041 case V_028714_SPI_SHADER_FP16_ABGR
:
2042 args
[4] = uint
->one
; /* COMPR flag */
2044 for (chan
= 0; chan
< 2; chan
++) {
2045 LLVMValueRef pack_args
[2] = {
2047 values
[2 * chan
+ 1]
2049 LLVMValueRef packed
;
2051 packed
= lp_build_intrinsic(base
->gallivm
->builder
,
2053 ctx
->i32
, pack_args
, 2,
2054 LP_FUNC_ATTR_READNONE
);
2056 LLVMBuildBitCast(base
->gallivm
->builder
,
2057 packed
, ctx
->f32
, "");
2061 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2062 for (chan
= 0; chan
< 4; chan
++) {
2063 val
[chan
] = si_llvm_saturate(bld_base
, values
[chan
]);
2064 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2065 lp_build_const_float(gallivm
, 65535), "");
2066 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2067 lp_build_const_float(gallivm
, 0.5), "");
2068 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2072 args
[4] = uint
->one
; /* COMPR flag */
2073 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2074 si_llvm_pack_two_int16(gallivm
, val
));
2075 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2076 si_llvm_pack_two_int16(gallivm
, val
+2));
2079 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2080 for (chan
= 0; chan
< 4; chan
++) {
2081 /* Clamp between [-1, 1]. */
2082 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
2084 lp_build_const_float(gallivm
, 1));
2085 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
2087 lp_build_const_float(gallivm
, -1));
2088 /* Convert to a signed integer in [-32767, 32767]. */
2089 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2090 lp_build_const_float(gallivm
, 32767), "");
2091 /* If positive, add 0.5, else add -0.5. */
2092 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2093 LLVMBuildSelect(builder
,
2094 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2095 val
[chan
], base
->zero
, ""),
2096 lp_build_const_float(gallivm
, 0.5),
2097 lp_build_const_float(gallivm
, -0.5), ""), "");
2098 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2101 args
[4] = uint
->one
; /* COMPR flag */
2102 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2103 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2104 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2105 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2108 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2109 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2112 for (chan
= 0; chan
< 4; chan
++) {
2113 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2114 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
2118 args
[4] = uint
->one
; /* COMPR flag */
2119 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2120 si_llvm_pack_two_int16(gallivm
, val
));
2121 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2122 si_llvm_pack_two_int16(gallivm
, val
+2));
2126 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2127 LLVMValueRef max
= lp_build_const_int32(gallivm
, is_int8
?
2129 LLVMValueRef min
= lp_build_const_int32(gallivm
, is_int8
?
2132 for (chan
= 0; chan
< 4; chan
++) {
2133 val
[chan
] = bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, values
[chan
]);
2134 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2137 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2142 args
[4] = uint
->one
; /* COMPR flag */
2143 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2144 si_llvm_pack_two_int32_as_int16(gallivm
, val
));
2145 args
[6] = bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2146 si_llvm_pack_two_int32_as_int16(gallivm
, val
+2));
2150 case V_028714_SPI_SHADER_32_ABGR
:
2151 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
2156 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2160 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2162 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2163 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2164 SI_PARAM_ALPHA_REF
);
2166 LLVMValueRef alpha_pass
=
2167 lp_build_cmp(&bld_base
->base
,
2168 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2171 lp_build_select(&bld_base
->base
,
2173 lp_build_const_float(gallivm
, 1.0f
),
2174 lp_build_const_float(gallivm
, -1.0f
));
2176 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
2177 ctx
->voidt
, &arg
, 1, 0);
2179 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kilp",
2180 ctx
->voidt
, NULL
, 0, 0);
2184 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2186 unsigned samplemask_param
)
2188 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2189 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2190 LLVMValueRef coverage
;
2192 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2193 coverage
= LLVMGetParam(ctx
->main_fn
,
2195 coverage
= bitcast(bld_base
, TGSI_TYPE_SIGNED
, coverage
);
2197 coverage
= lp_build_intrinsic(gallivm
->builder
, "llvm.ctpop.i32",
2199 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2201 coverage
= LLVMBuildUIToFP(gallivm
->builder
, coverage
,
2204 coverage
= LLVMBuildFMul(gallivm
->builder
, coverage
,
2205 lp_build_const_float(gallivm
,
2206 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2208 return LLVMBuildFMul(gallivm
->builder
, alpha
, coverage
, "");
2211 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2212 LLVMValueRef (*pos
)[9], LLVMValueRef
*out_elts
)
2214 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2215 struct lp_build_context
*base
= &bld_base
->base
;
2216 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
2219 unsigned const_chan
;
2220 LLVMValueRef base_elt
;
2221 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2222 LLVMValueRef constbuf_index
= lp_build_const_int32(base
->gallivm
,
2223 SI_VS_CONST_CLIP_PLANES
);
2224 LLVMValueRef const_resource
= build_indexed_load_const(ctx
, ptr
, constbuf_index
);
2226 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2227 LLVMValueRef
*args
= pos
[2 + reg_index
];
2232 args
[8] = lp_build_const_float(base
->gallivm
, 0.0f
);
2234 /* Compute dot products of position and user clip plane vectors */
2235 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2236 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2237 args
[1] = lp_build_const_int32(base
->gallivm
,
2238 ((reg_index
* 4 + chan
) * 4 +
2240 base_elt
= buffer_load_const(ctx
, const_resource
,
2243 lp_build_add(base
, args
[5 + chan
],
2244 lp_build_mul(base
, base_elt
,
2245 out_elts
[const_chan
]));
2249 args
[0] = lp_build_const_int32(base
->gallivm
, 0xf);
2250 args
[1] = uint
->zero
;
2251 args
[2] = uint
->zero
;
2252 args
[3] = lp_build_const_int32(base
->gallivm
,
2253 V_008DFC_SQ_EXP_POS
+ 2 + reg_index
);
2254 args
[4] = uint
->zero
;
2258 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2262 if (so
->num_outputs
)
2263 fprintf(stderr
, "STREAMOUT\n");
2265 for (i
= 0; i
< so
->num_outputs
; i
++) {
2266 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2267 so
->output
[i
].start_component
;
2268 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2269 i
, so
->output
[i
].output_buffer
,
2270 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2271 so
->output
[i
].register_index
,
2272 mask
& 1 ? "x" : "",
2273 mask
& 2 ? "y" : "",
2274 mask
& 4 ? "z" : "",
2275 mask
& 8 ? "w" : "");
2279 static void emit_streamout_output(struct si_shader_context
*ctx
,
2280 LLVMValueRef
const *so_buffers
,
2281 LLVMValueRef
const *so_write_offsets
,
2282 struct pipe_stream_output
*stream_out
,
2283 struct si_shader_output_values
*shader_out
)
2285 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2286 LLVMBuilderRef builder
= gallivm
->builder
;
2287 unsigned buf_idx
= stream_out
->output_buffer
;
2288 unsigned start
= stream_out
->start_component
;
2289 unsigned num_comps
= stream_out
->num_components
;
2290 LLVMValueRef out
[4];
2292 assert(num_comps
&& num_comps
<= 4);
2293 if (!num_comps
|| num_comps
> 4)
2296 /* Load the output as int. */
2297 for (int j
= 0; j
< num_comps
; j
++) {
2298 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2300 out
[j
] = LLVMBuildBitCast(builder
,
2301 shader_out
->values
[start
+ j
],
2305 /* Pack the output. */
2306 LLVMValueRef vdata
= NULL
;
2308 switch (num_comps
) {
2309 case 1: /* as i32 */
2312 case 2: /* as v2i32 */
2313 case 3: /* as v4i32 (aligned to 4) */
2314 case 4: /* as v4i32 */
2315 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2316 for (int j
= 0; j
< num_comps
; j
++) {
2317 vdata
= LLVMBuildInsertElement(builder
, vdata
, out
[j
],
2318 LLVMConstInt(ctx
->i32
, j
, 0), "");
2323 build_tbuffer_store_dwords(ctx
, so_buffers
[buf_idx
],
2325 so_write_offsets
[buf_idx
],
2326 LLVMConstInt(ctx
->i32
, 0, 0),
2327 stream_out
->dst_offset
* 4);
2331 * Write streamout data to buffers for vertex stream @p stream (different
2332 * vertex streams can occur for GS copy shaders).
2334 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2335 struct si_shader_output_values
*outputs
,
2336 unsigned noutput
, unsigned stream
)
2338 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2339 struct pipe_stream_output_info
*so
= &sel
->so
;
2340 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2341 LLVMBuilderRef builder
= gallivm
->builder
;
2343 struct lp_build_if_state if_ctx
;
2345 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2346 LLVMValueRef so_vtx_count
=
2347 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2349 LLVMValueRef tid
= get_thread_id(ctx
);
2351 /* can_emit = tid < so_vtx_count; */
2352 LLVMValueRef can_emit
=
2353 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2355 /* Emit the streamout code conditionally. This actually avoids
2356 * out-of-bounds buffer access. The hw tells us via the SGPR
2357 * (so_vtx_count) which threads are allowed to emit streamout data. */
2358 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2360 /* The buffer offset is computed as follows:
2361 * ByteOffset = streamout_offset[buffer_id]*4 +
2362 * (streamout_write_index + thread_id)*stride[buffer_id] +
2366 LLVMValueRef so_write_index
=
2367 LLVMGetParam(ctx
->main_fn
,
2368 ctx
->param_streamout_write_index
);
2370 /* Compute (streamout_write_index + thread_id). */
2371 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2373 /* Load the descriptor and compute the write offset for each
2374 * enabled buffer. */
2375 LLVMValueRef so_write_offset
[4] = {};
2376 LLVMValueRef so_buffers
[4];
2377 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2378 SI_PARAM_RW_BUFFERS
);
2380 for (i
= 0; i
< 4; i
++) {
2384 LLVMValueRef offset
= lp_build_const_int32(gallivm
,
2385 SI_VS_STREAMOUT_BUF0
+ i
);
2387 so_buffers
[i
] = build_indexed_load_const(ctx
, buf_ptr
, offset
);
2389 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2390 ctx
->param_streamout_offset
[i
]);
2391 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2393 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2394 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2395 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2398 /* Write streamout data. */
2399 for (i
= 0; i
< so
->num_outputs
; i
++) {
2400 unsigned reg
= so
->output
[i
].register_index
;
2405 if (stream
!= so
->output
[i
].stream
)
2408 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2409 &so
->output
[i
], &outputs
[reg
]);
2412 lp_build_endif(&if_ctx
);
2416 /* Generate export instructions for hardware VS shader stage */
2417 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2418 struct si_shader_output_values
*outputs
,
2421 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2422 struct si_shader
*shader
= ctx
->shader
;
2423 struct lp_build_context
*base
= &bld_base
->base
;
2424 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
2425 LLVMValueRef args
[9];
2426 LLVMValueRef pos_args
[4][9] = { { 0 } };
2427 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2428 unsigned semantic_name
, semantic_index
;
2430 unsigned param_count
= 0;
2434 for (i
= 0; i
< noutput
; i
++) {
2435 semantic_name
= outputs
[i
].semantic_name
;
2436 semantic_index
= outputs
[i
].semantic_index
;
2437 bool export_param
= true;
2439 switch (semantic_name
) {
2440 case TGSI_SEMANTIC_POSITION
: /* ignore these */
2441 case TGSI_SEMANTIC_PSIZE
:
2442 case TGSI_SEMANTIC_CLIPVERTEX
:
2443 case TGSI_SEMANTIC_EDGEFLAG
:
2445 case TGSI_SEMANTIC_GENERIC
:
2446 case TGSI_SEMANTIC_CLIPDIST
:
2447 if (shader
->key
.opt
.hw_vs
.kill_outputs
&
2448 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2449 export_param
= false;
2452 if (shader
->key
.opt
.hw_vs
.kill_outputs2
&
2453 (1u << si_shader_io_get_unique_index2(semantic_name
, semantic_index
)))
2454 export_param
= false;
2458 if (outputs
[i
].vertex_stream
[0] != 0 &&
2459 outputs
[i
].vertex_stream
[1] != 0 &&
2460 outputs
[i
].vertex_stream
[2] != 0 &&
2461 outputs
[i
].vertex_stream
[3] != 0)
2462 export_param
= false;
2465 /* Select the correct target */
2466 switch(semantic_name
) {
2467 case TGSI_SEMANTIC_PSIZE
:
2468 psize_value
= outputs
[i
].values
[0];
2470 case TGSI_SEMANTIC_EDGEFLAG
:
2471 edgeflag_value
= outputs
[i
].values
[0];
2473 case TGSI_SEMANTIC_LAYER
:
2474 layer_value
= outputs
[i
].values
[0];
2475 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2476 goto handle_semantic
;
2477 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2478 viewport_index_value
= outputs
[i
].values
[0];
2479 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2480 goto handle_semantic
;
2481 case TGSI_SEMANTIC_POSITION
:
2482 target
= V_008DFC_SQ_EXP_POS
;
2484 case TGSI_SEMANTIC_CLIPDIST
:
2485 if (shader
->key
.opt
.hw_vs
.clip_disable
) {
2486 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2487 goto handle_semantic
;
2489 target
= V_008DFC_SQ_EXP_POS
+ 2 + semantic_index
;
2491 case TGSI_SEMANTIC_CLIPVERTEX
:
2492 if (shader
->key
.opt
.hw_vs
.clip_disable
)
2494 si_llvm_emit_clipvertex(bld_base
, pos_args
, outputs
[i
].values
);
2496 case TGSI_SEMANTIC_COLOR
:
2497 case TGSI_SEMANTIC_BCOLOR
:
2498 case TGSI_SEMANTIC_PRIMID
:
2499 case TGSI_SEMANTIC_FOG
:
2500 case TGSI_SEMANTIC_TEXCOORD
:
2501 case TGSI_SEMANTIC_GENERIC
:
2504 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
2505 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2506 shader
->info
.vs_output_param_offset
[i
] = param_count
;
2512 "Warning: SI unhandled vs output type:%d\n",
2516 si_llvm_init_export_args(bld_base
, outputs
[i
].values
, target
, args
);
2518 if (target
>= V_008DFC_SQ_EXP_POS
&&
2519 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
2520 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
2521 args
, sizeof(args
));
2523 lp_build_intrinsic(base
->gallivm
->builder
,
2524 "llvm.SI.export", ctx
->voidt
,
2528 if (semantic_name
== TGSI_SEMANTIC_CLIPDIST
) {
2529 semantic_name
= TGSI_SEMANTIC_GENERIC
;
2530 goto handle_semantic
;
2534 shader
->info
.nr_param_exports
= param_count
;
2536 /* We need to add the position output manually if it's missing. */
2537 if (!pos_args
[0][0]) {
2538 pos_args
[0][0] = lp_build_const_int32(base
->gallivm
, 0xf); /* writemask */
2539 pos_args
[0][1] = uint
->zero
; /* EXEC mask */
2540 pos_args
[0][2] = uint
->zero
; /* last export? */
2541 pos_args
[0][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
);
2542 pos_args
[0][4] = uint
->zero
; /* COMPR flag */
2543 pos_args
[0][5] = base
->zero
; /* X */
2544 pos_args
[0][6] = base
->zero
; /* Y */
2545 pos_args
[0][7] = base
->zero
; /* Z */
2546 pos_args
[0][8] = base
->one
; /* W */
2549 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2550 if (shader
->selector
->info
.writes_psize
||
2551 shader
->selector
->info
.writes_edgeflag
||
2552 shader
->selector
->info
.writes_viewport_index
||
2553 shader
->selector
->info
.writes_layer
) {
2554 pos_args
[1][0] = lp_build_const_int32(base
->gallivm
, /* writemask */
2555 shader
->selector
->info
.writes_psize
|
2556 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2557 (shader
->selector
->info
.writes_layer
<< 2) |
2558 (shader
->selector
->info
.writes_viewport_index
<< 3));
2559 pos_args
[1][1] = uint
->zero
; /* EXEC mask */
2560 pos_args
[1][2] = uint
->zero
; /* last export? */
2561 pos_args
[1][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ 1);
2562 pos_args
[1][4] = uint
->zero
; /* COMPR flag */
2563 pos_args
[1][5] = base
->zero
; /* X */
2564 pos_args
[1][6] = base
->zero
; /* Y */
2565 pos_args
[1][7] = base
->zero
; /* Z */
2566 pos_args
[1][8] = base
->zero
; /* W */
2568 if (shader
->selector
->info
.writes_psize
)
2569 pos_args
[1][5] = psize_value
;
2571 if (shader
->selector
->info
.writes_edgeflag
) {
2572 /* The output is a float, but the hw expects an integer
2573 * with the first bit containing the edge flag. */
2574 edgeflag_value
= LLVMBuildFPToUI(base
->gallivm
->builder
,
2577 edgeflag_value
= lp_build_min(&bld_base
->int_bld
,
2579 bld_base
->int_bld
.one
);
2581 /* The LLVM intrinsic expects a float. */
2582 pos_args
[1][6] = LLVMBuildBitCast(base
->gallivm
->builder
,
2587 if (shader
->selector
->info
.writes_layer
)
2588 pos_args
[1][7] = layer_value
;
2590 if (shader
->selector
->info
.writes_viewport_index
)
2591 pos_args
[1][8] = viewport_index_value
;
2594 for (i
= 0; i
< 4; i
++)
2596 shader
->info
.nr_pos_exports
++;
2599 for (i
= 0; i
< 4; i
++) {
2600 if (!pos_args
[i
][0])
2603 /* Specify the target we are exporting */
2604 pos_args
[i
][3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_POS
+ pos_idx
++);
2606 if (pos_idx
== shader
->info
.nr_pos_exports
)
2607 /* Specify that this is the last export */
2608 pos_args
[i
][2] = uint
->one
;
2610 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
2611 ctx
->voidt
, pos_args
[i
], 9, 0);
2616 * Forward all outputs from the vertex shader to the TES. This is only used
2617 * for the fixed function TCS.
2619 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2621 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2622 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2623 LLVMValueRef invocation_id
, rw_buffers
, buffer
, buffer_offset
;
2624 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2627 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2629 rw_buffers
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_RW_BUFFERS
);
2630 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2631 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_OFFCHIP
));
2633 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_oc_lds
);
2635 lds_vertex_stride
= unpack_param(ctx
, SI_PARAM_TCS_IN_LAYOUT
, 13, 8);
2636 lds_vertex_offset
= LLVMBuildMul(gallivm
->builder
, invocation_id
,
2637 lds_vertex_stride
, "");
2638 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2639 lds_base
= LLVMBuildAdd(gallivm
->builder
, lds_base
, lds_vertex_offset
, "");
2641 inputs
= ctx
->shader
->key
.mono
.tcs
.inputs_to_copy
;
2643 unsigned i
= u_bit_scan64(&inputs
);
2645 LLVMValueRef lds_ptr
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2646 lp_build_const_int32(gallivm
, 4 * i
),
2649 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2651 lp_build_const_int32(gallivm
, i
));
2653 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2656 build_tbuffer_store_dwords(ctx
, buffer
, value
, 4, buffer_addr
,
2661 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2662 LLVMValueRef rel_patch_id
,
2663 LLVMValueRef invocation_id
,
2664 LLVMValueRef tcs_out_current_patch_data_offset
)
2666 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2667 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2668 struct si_shader
*shader
= ctx
->shader
;
2669 unsigned tess_inner_index
, tess_outer_index
;
2670 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2671 LLVMValueRef out
[6], vec0
, vec1
, rw_buffers
, tf_base
;
2672 unsigned stride
, outer_comps
, inner_comps
, i
;
2673 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2675 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2677 /* Do this only for invocation 0, because the tess levels are per-patch,
2680 * This can't jump, because invocation 0 executes this. It should
2681 * at least mask out the loads and stores for other invocations.
2683 lp_build_if(&if_ctx
, gallivm
,
2684 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2685 invocation_id
, bld_base
->uint_bld
.zero
, ""));
2687 /* Determine the layout of one tess factor element in the buffer. */
2688 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2689 case PIPE_PRIM_LINES
:
2690 stride
= 2; /* 2 dwords, 1 vec2 store */
2694 case PIPE_PRIM_TRIANGLES
:
2695 stride
= 4; /* 4 dwords, 1 vec4 store */
2699 case PIPE_PRIM_QUADS
:
2700 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2709 /* Load tess_inner and tess_outer from LDS.
2710 * Any invocation can write them, so we can't get them from a temporary.
2712 tess_inner_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER
, 0);
2713 tess_outer_index
= si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER
, 0);
2715 lds_base
= tcs_out_current_patch_data_offset
;
2716 lds_inner
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2717 lp_build_const_int32(gallivm
,
2718 tess_inner_index
* 4), "");
2719 lds_outer
= LLVMBuildAdd(gallivm
->builder
, lds_base
,
2720 lp_build_const_int32(gallivm
,
2721 tess_outer_index
* 4), "");
2723 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2724 /* For isolines, the hardware expects tess factors in the
2725 * reverse order from what GLSL / TGSI specify.
2727 out
[0] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 1, lds_outer
);
2728 out
[1] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, 0, lds_outer
);
2730 for (i
= 0; i
< outer_comps
; i
++)
2731 out
[i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2732 for (i
= 0; i
< inner_comps
; i
++)
2733 out
[outer_comps
+i
] = lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2736 /* Convert the outputs to vectors for stores. */
2737 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2741 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2743 /* Get the buffer. */
2744 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2745 SI_PARAM_RW_BUFFERS
);
2746 buffer
= build_indexed_load_const(ctx
, rw_buffers
,
2747 lp_build_const_int32(gallivm
, SI_HS_RING_TESS_FACTOR
));
2749 /* Get the offset. */
2750 tf_base
= LLVMGetParam(ctx
->main_fn
,
2751 SI_PARAM_TESS_FACTOR_OFFSET
);
2752 byteoffset
= LLVMBuildMul(gallivm
->builder
, rel_patch_id
,
2753 lp_build_const_int32(gallivm
, 4 * stride
), "");
2755 lp_build_if(&inner_if_ctx
, gallivm
,
2756 LLVMBuildICmp(gallivm
->builder
, LLVMIntEQ
,
2757 rel_patch_id
, bld_base
->uint_bld
.zero
, ""));
2759 /* Store the dynamic HS control word. */
2760 build_tbuffer_store_dwords(ctx
, buffer
,
2761 lp_build_const_int32(gallivm
, 0x80000000),
2762 1, lp_build_const_int32(gallivm
, 0), tf_base
, 0);
2764 lp_build_endif(&inner_if_ctx
);
2766 /* Store the tessellation factors. */
2767 build_tbuffer_store_dwords(ctx
, buffer
, vec0
,
2768 MIN2(stride
, 4), byteoffset
, tf_base
, 4);
2770 build_tbuffer_store_dwords(ctx
, buffer
, vec1
,
2771 stride
- 4, byteoffset
, tf_base
, 20);
2772 lp_build_endif(&if_ctx
);
2775 /* This only writes the tessellation factor levels. */
2776 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2778 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2779 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2781 si_copy_tcs_inputs(bld_base
);
2783 rel_patch_id
= get_rel_patch_id(ctx
);
2784 invocation_id
= unpack_param(ctx
, SI_PARAM_REL_IDS
, 8, 5);
2785 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2787 /* Return epilog parameters from this function. */
2788 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
2789 LLVMValueRef ret
= ctx
->return_value
;
2790 LLVMValueRef rw_buffers
, rw0
, rw1
, tf_soffset
;
2793 /* RW_BUFFERS pointer */
2794 rw_buffers
= LLVMGetParam(ctx
->main_fn
,
2795 SI_PARAM_RW_BUFFERS
);
2796 rw_buffers
= LLVMBuildPtrToInt(builder
, rw_buffers
, ctx
->i64
, "");
2797 rw_buffers
= LLVMBuildBitCast(builder
, rw_buffers
, ctx
->v2i32
, "");
2798 rw0
= LLVMBuildExtractElement(builder
, rw_buffers
,
2799 bld_base
->uint_bld
.zero
, "");
2800 rw1
= LLVMBuildExtractElement(builder
, rw_buffers
,
2801 bld_base
->uint_bld
.one
, "");
2802 ret
= LLVMBuildInsertValue(builder
, ret
, rw0
, 0, "");
2803 ret
= LLVMBuildInsertValue(builder
, ret
, rw1
, 1, "");
2805 /* Tess factor buffer soffset is after user SGPRs. */
2806 tf_soffset
= LLVMGetParam(ctx
->main_fn
,
2807 SI_PARAM_TESS_FACTOR_OFFSET
);
2808 ret
= LLVMBuildInsertValue(builder
, ret
, tf_soffset
,
2809 SI_TCS_NUM_USER_SGPR
+ 1, "");
2812 rel_patch_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, rel_patch_id
);
2813 invocation_id
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, invocation_id
);
2814 tf_lds_offset
= bitcast(bld_base
, TGSI_TYPE_FLOAT
, tf_lds_offset
);
2816 vgpr
= SI_TCS_NUM_USER_SGPR
+ 2;
2817 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2818 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2819 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2820 ctx
->return_value
= ret
;
2823 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
2825 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2826 struct si_shader
*shader
= ctx
->shader
;
2827 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
2828 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2830 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
2831 ctx
->param_rel_auto_id
);
2832 LLVMValueRef vertex_dw_stride
=
2833 unpack_param(ctx
, SI_PARAM_LS_OUT_LAYOUT
, 13, 8);
2834 LLVMValueRef base_dw_addr
= LLVMBuildMul(gallivm
->builder
, vertex_id
,
2835 vertex_dw_stride
, "");
2837 /* Write outputs to LDS. The next shader (TCS aka HS) will read
2838 * its inputs from it. */
2839 for (i
= 0; i
< info
->num_outputs
; i
++) {
2840 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2841 unsigned name
= info
->output_semantic_name
[i
];
2842 unsigned index
= info
->output_semantic_index
[i
];
2843 int param
= si_shader_io_get_unique_index(name
, index
);
2844 LLVMValueRef dw_addr
= LLVMBuildAdd(gallivm
->builder
, base_dw_addr
,
2845 lp_build_const_int32(gallivm
, param
* 4), "");
2847 for (chan
= 0; chan
< 4; chan
++) {
2848 lds_store(bld_base
, chan
, dw_addr
,
2849 LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], ""));
2854 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
2856 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2857 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2858 struct si_shader
*es
= ctx
->shader
;
2859 struct tgsi_shader_info
*info
= &es
->selector
->info
;
2860 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
2861 ctx
->param_es2gs_offset
);
2865 for (i
= 0; i
< info
->num_outputs
; i
++) {
2866 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
2869 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
2870 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
2873 param_index
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
2874 info
->output_semantic_index
[i
]);
2876 for (chan
= 0; chan
< 4; chan
++) {
2877 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
2878 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
2880 build_tbuffer_store(ctx
,
2883 LLVMGetUndef(ctx
->i32
), soffset
,
2884 (4 * param_index
+ chan
) * 4,
2885 V_008F0C_BUF_DATA_FORMAT_32
,
2886 V_008F0C_BUF_NUM_FORMAT_UINT
,
2892 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2894 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2895 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2896 LLVMValueRef args
[2];
2898 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
);
2899 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
2900 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
2901 ctx
->voidt
, args
, 2, 0);
2904 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2906 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2907 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
2908 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
2909 struct si_shader_output_values
*outputs
= NULL
;
2912 assert(!ctx
->shader
->is_gs_copy_shader
);
2914 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
2916 /* Vertex color clamping.
2918 * This uses a state constant loaded in a user data SGPR and
2919 * an IF statement is added that clamps all colors if the constant
2922 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
2923 struct lp_build_if_state if_ctx
;
2924 LLVMValueRef cond
= NULL
;
2925 LLVMValueRef addr
, val
;
2927 for (i
= 0; i
< info
->num_outputs
; i
++) {
2928 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
2929 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
2932 /* We've found a color. */
2934 /* The state is in the first bit of the user SGPR. */
2935 cond
= LLVMGetParam(ctx
->main_fn
,
2936 SI_PARAM_VS_STATE_BITS
);
2937 cond
= LLVMBuildTrunc(gallivm
->builder
, cond
,
2939 lp_build_if(&if_ctx
, gallivm
, cond
);
2942 for (j
= 0; j
< 4; j
++) {
2943 addr
= ctx
->outputs
[i
][j
];
2944 val
= LLVMBuildLoad(gallivm
->builder
, addr
, "");
2945 val
= si_llvm_saturate(bld_base
, val
);
2946 LLVMBuildStore(gallivm
->builder
, val
, addr
);
2951 lp_build_endif(&if_ctx
);
2954 for (i
= 0; i
< info
->num_outputs
; i
++) {
2955 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
2956 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
2958 for (j
= 0; j
< 4; j
++) {
2959 outputs
[i
].values
[j
] =
2960 LLVMBuildLoad(gallivm
->builder
,
2963 outputs
[i
].vertex_stream
[j
] =
2964 (info
->output_streams
[i
] >> (2 * j
)) & 3;
2969 /* Return the primitive ID from the LLVM function. */
2971 LLVMBuildInsertValue(gallivm
->builder
,
2973 bitcast(bld_base
, TGSI_TYPE_FLOAT
,
2974 get_primitive_id(bld_base
, 0)),
2975 VS_EPILOG_PRIMID_LOC
, "");
2977 if (ctx
->shader
->selector
->so
.num_outputs
)
2978 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
2979 si_llvm_export_vs(bld_base
, outputs
, i
);
2983 struct si_ps_exports
{
2985 LLVMValueRef args
[10][9];
2988 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
2989 bool writes_samplemask
)
2992 /* Z needs 32 bits. */
2993 if (writes_samplemask
)
2994 return V_028710_SPI_SHADER_32_ABGR
;
2995 else if (writes_stencil
)
2996 return V_028710_SPI_SHADER_32_GR
;
2998 return V_028710_SPI_SHADER_32_R
;
2999 } else if (writes_stencil
|| writes_samplemask
) {
3000 /* Both stencil and sample mask need only 16 bits. */
3001 return V_028710_SPI_SHADER_UINT16_ABGR
;
3003 return V_028710_SPI_SHADER_ZERO
;
3007 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3008 LLVMValueRef depth
, LLVMValueRef stencil
,
3009 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3011 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3012 struct lp_build_context
*base
= &bld_base
->base
;
3013 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3014 LLVMValueRef args
[9];
3016 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
3018 samplemask
!= NULL
);
3020 assert(depth
|| stencil
|| samplemask
);
3022 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
3023 args
[2] = uint
->one
; /* DONE bit */
3025 /* Specify the target we are exporting */
3026 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_MRTZ
);
3028 args
[4] = uint
->zero
; /* COMP flag */
3029 args
[5] = base
->undef
; /* R, depth */
3030 args
[6] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
3031 args
[7] = base
->undef
; /* B, sample mask */
3032 args
[8] = base
->undef
; /* A, alpha to mask */
3034 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
3036 args
[4] = uint
->one
; /* COMPR flag */
3039 /* Stencil should be in X[23:16]. */
3040 stencil
= bitcast(bld_base
, TGSI_TYPE_UNSIGNED
, stencil
);
3041 stencil
= LLVMBuildShl(base
->gallivm
->builder
, stencil
,
3042 LLVMConstInt(ctx
->i32
, 16, 0), "");
3043 args
[5] = bitcast(bld_base
, TGSI_TYPE_FLOAT
, stencil
);
3047 /* SampleMask should be in Y[15:0]. */
3048 args
[6] = samplemask
;
3061 args
[7] = samplemask
;
3066 /* SI (except OLAND and HAINAN) has a bug that it only looks
3067 * at the X writemask component. */
3068 if (ctx
->screen
->b
.chip_class
== SI
&&
3069 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
3070 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
3073 /* Specify which components to enable */
3074 args
[0] = lp_build_const_int32(base
->gallivm
, mask
);
3076 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3079 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3080 LLVMValueRef
*color
, unsigned index
,
3081 unsigned samplemask_param
,
3082 bool is_last
, struct si_ps_exports
*exp
)
3084 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3085 struct lp_build_context
*base
= &bld_base
->base
;
3089 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3090 for (i
= 0; i
< 4; i
++)
3091 color
[i
] = si_llvm_saturate(bld_base
, color
[i
]);
3094 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3095 color
[3] = base
->one
;
3099 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3100 si_alpha_test(bld_base
, color
[3]);
3102 /* Line & polygon smoothing */
3103 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3104 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3107 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3108 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3109 LLVMValueRef args
[8][9];
3112 /* Get the export arguments, also find out what the last one is. */
3113 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3114 si_llvm_init_export_args(bld_base
, color
,
3115 V_008DFC_SQ_EXP_MRT
+ c
, args
[c
]);
3116 if (args
[c
][0] != bld_base
->uint_bld
.zero
)
3120 /* Emit all exports. */
3121 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3122 if (is_last
&& last
== c
) {
3123 args
[c
][1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3124 args
[c
][2] = bld_base
->uint_bld
.one
; /* DONE bit */
3125 } else if (args
[c
][0] == bld_base
->uint_bld
.zero
)
3126 continue; /* unnecessary NULL export */
3128 memcpy(exp
->args
[exp
->num
++], args
[c
], sizeof(args
[c
]));
3131 LLVMValueRef args
[9];
3134 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3137 args
[1] = bld_base
->uint_bld
.one
; /* whether the EXEC mask is valid */
3138 args
[2] = bld_base
->uint_bld
.one
; /* DONE bit */
3139 } else if (args
[0] == bld_base
->uint_bld
.zero
)
3140 return; /* unnecessary NULL export */
3142 memcpy(exp
->args
[exp
->num
++], args
, sizeof(args
));
3146 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3147 struct si_ps_exports
*exp
)
3149 for (unsigned i
= 0; i
< exp
->num
; i
++)
3150 lp_build_intrinsic(ctx
->gallivm
.builder
,
3151 "llvm.SI.export", ctx
->voidt
,
3152 exp
->args
[i
], 9, 0);
3155 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3157 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3158 struct lp_build_context
*base
= &bld_base
->base
;
3159 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3160 LLVMValueRef args
[9];
3162 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
3163 args
[1] = uint
->one
; /* whether the EXEC mask is valid */
3164 args
[2] = uint
->one
; /* DONE bit */
3165 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_NULL
);
3166 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
3167 args
[5] = base
->undef
; /* R */
3168 args
[6] = base
->undef
; /* G */
3169 args
[7] = base
->undef
; /* B */
3170 args
[8] = base
->undef
; /* A */
3172 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
3173 ctx
->voidt
, args
, 9, 0);
3177 * Return PS outputs in this order:
3179 * v[0:3] = color0.xyzw
3180 * v[4:7] = color1.xyzw
3185 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3187 * The alpha-ref SGPR is returned via its original location.
3189 static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context
*bld_base
)
3191 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3192 struct si_shader
*shader
= ctx
->shader
;
3193 struct lp_build_context
*base
= &bld_base
->base
;
3194 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3195 LLVMBuilderRef builder
= base
->gallivm
->builder
;
3196 unsigned i
, j
, first_vgpr
, vgpr
;
3198 LLVMValueRef color
[8][4] = {};
3199 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3202 /* Read the output values. */
3203 for (i
= 0; i
< info
->num_outputs
; i
++) {
3204 unsigned semantic_name
= info
->output_semantic_name
[i
];
3205 unsigned semantic_index
= info
->output_semantic_index
[i
];
3207 switch (semantic_name
) {
3208 case TGSI_SEMANTIC_COLOR
:
3209 assert(semantic_index
< 8);
3210 for (j
= 0; j
< 4; j
++) {
3211 LLVMValueRef ptr
= ctx
->outputs
[i
][j
];
3212 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3213 color
[semantic_index
][j
] = result
;
3216 case TGSI_SEMANTIC_POSITION
:
3217 depth
= LLVMBuildLoad(builder
,
3218 ctx
->outputs
[i
][2], "");
3220 case TGSI_SEMANTIC_STENCIL
:
3221 stencil
= LLVMBuildLoad(builder
,
3222 ctx
->outputs
[i
][1], "");
3224 case TGSI_SEMANTIC_SAMPLEMASK
:
3225 samplemask
= LLVMBuildLoad(builder
,
3226 ctx
->outputs
[i
][0], "");
3229 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3234 /* Fill the return structure. */
3235 ret
= ctx
->return_value
;
3238 ret
= LLVMBuildInsertValue(builder
, ret
,
3239 bitcast(bld_base
, TGSI_TYPE_SIGNED
,
3240 LLVMGetParam(ctx
->main_fn
,
3241 SI_PARAM_ALPHA_REF
)),
3242 SI_SGPR_ALPHA_REF
, "");
3245 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3246 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3250 for (j
= 0; j
< 4; j
++)
3251 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3254 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3256 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3258 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3260 /* Add the input sample mask for smoothing at the end. */
3261 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3262 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3263 ret
= LLVMBuildInsertValue(builder
, ret
,
3264 LLVMGetParam(ctx
->main_fn
,
3265 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3267 ctx
->return_value
= ret
;
3271 * Given a v8i32 resource descriptor for a buffer, extract the size of the
3272 * buffer in number of elements and return it as an i32.
3274 static LLVMValueRef
get_buffer_size(
3275 struct lp_build_tgsi_context
*bld_base
,
3276 LLVMValueRef descriptor
)
3278 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3279 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3280 LLVMBuilderRef builder
= gallivm
->builder
;
3282 LLVMBuildExtractElement(builder
, descriptor
,
3283 lp_build_const_int32(gallivm
, 2), "");
3285 if (ctx
->screen
->b
.chip_class
>= VI
) {
3286 /* On VI, the descriptor contains the size in bytes,
3287 * but TXQ must return the size in elements.
3288 * The stride is always non-zero for resources using TXQ.
3290 LLVMValueRef stride
=
3291 LLVMBuildExtractElement(builder
, descriptor
,
3292 lp_build_const_int32(gallivm
, 1), "");
3293 stride
= LLVMBuildLShr(builder
, stride
,
3294 lp_build_const_int32(gallivm
, 16), "");
3295 stride
= LLVMBuildAnd(builder
, stride
,
3296 lp_build_const_int32(gallivm
, 0x3FFF), "");
3298 size
= LLVMBuildUDiv(builder
, size
, stride
, "");
3305 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
3308 static void build_type_name_for_intr(
3310 char *buf
, unsigned bufsize
)
3312 LLVMTypeRef elem_type
= type
;
3314 assert(bufsize
>= 8);
3316 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
3317 int ret
= snprintf(buf
, bufsize
, "v%u",
3318 LLVMGetVectorSize(type
));
3320 char *type_name
= LLVMPrintTypeToString(type
);
3321 fprintf(stderr
, "Error building type name for: %s\n",
3325 elem_type
= LLVMGetElementType(type
);
3329 switch (LLVMGetTypeKind(elem_type
)) {
3331 case LLVMIntegerTypeKind
:
3332 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
3334 case LLVMFloatTypeKind
:
3335 snprintf(buf
, bufsize
, "f32");
3337 case LLVMDoubleTypeKind
:
3338 snprintf(buf
, bufsize
, "f64");
3343 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
3344 struct lp_build_tgsi_context
*bld_base
,
3345 struct lp_build_emit_data
*emit_data
);
3347 /* Prevent optimizations (at least of memory accesses) across the current
3348 * point in the program by emitting empty inline assembly that is marked as
3349 * having side effects.
3351 #if 0 /* unused currently */
3352 static void emit_optimization_barrier(struct si_shader_context
*ctx
)
3354 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3355 LLVMTypeRef ftype
= LLVMFunctionType(ctx
->voidt
, NULL
, 0, false);
3356 LLVMValueRef inlineasm
= LLVMConstInlineAsm(ftype
, "", "", true, false);
3357 LLVMBuildCall(builder
, inlineasm
, NULL
, 0, "");
3361 /* Combine these with & instead of |. */
3362 #define NOOP_WAITCNT 0xf7f
3363 #define LGKM_CNT 0x07f
3364 #define VM_CNT 0xf70
3366 static void emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3368 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3369 LLVMBuilderRef builder
= gallivm
->builder
;
3370 LLVMValueRef args
[1] = {
3371 lp_build_const_int32(gallivm
, simm16
)
3373 lp_build_intrinsic(builder
, "llvm.amdgcn.s.waitcnt",
3374 ctx
->voidt
, args
, 1, 0);
3377 static void membar_emit(
3378 const struct lp_build_tgsi_action
*action
,
3379 struct lp_build_tgsi_context
*bld_base
,
3380 struct lp_build_emit_data
*emit_data
)
3382 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3383 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3384 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3385 unsigned waitcnt
= NOOP_WAITCNT
;
3387 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3388 waitcnt
&= VM_CNT
& LGKM_CNT
;
3390 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3391 TGSI_MEMBAR_SHADER_BUFFER
|
3392 TGSI_MEMBAR_SHADER_IMAGE
))
3395 if (flags
& TGSI_MEMBAR_SHARED
)
3396 waitcnt
&= LGKM_CNT
;
3398 if (waitcnt
!= NOOP_WAITCNT
)
3399 emit_waitcnt(ctx
, waitcnt
);
3403 shader_buffer_fetch_rsrc(struct si_shader_context
*ctx
,
3404 const struct tgsi_full_src_register
*reg
)
3407 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3408 SI_PARAM_SHADER_BUFFERS
);
3410 if (!reg
->Register
.Indirect
)
3411 index
= LLVMConstInt(ctx
->i32
, reg
->Register
.Index
, 0);
3413 index
= get_bounded_indirect_index(ctx
, ®
->Indirect
,
3414 reg
->Register
.Index
,
3415 SI_NUM_SHADER_BUFFERS
);
3417 return build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3420 static bool tgsi_is_array_sampler(unsigned target
)
3422 return target
== TGSI_TEXTURE_1D_ARRAY
||
3423 target
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
3424 target
== TGSI_TEXTURE_2D_ARRAY
||
3425 target
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
3426 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3427 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
||
3428 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3431 static bool tgsi_is_array_image(unsigned target
)
3433 return target
== TGSI_TEXTURE_3D
||
3434 target
== TGSI_TEXTURE_CUBE
||
3435 target
== TGSI_TEXTURE_1D_ARRAY
||
3436 target
== TGSI_TEXTURE_2D_ARRAY
||
3437 target
== TGSI_TEXTURE_CUBE_ARRAY
||
3438 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
;
3442 * Given a 256-bit resource descriptor, force the DCC enable bit to off.
3444 * At least on Tonga, executing image stores on images with DCC enabled and
3445 * non-trivial can eventually lead to lockups. This can occur when an
3446 * application binds an image as read-only but then uses a shader that writes
3447 * to it. The OpenGL spec allows almost arbitrarily bad behavior (including
3448 * program termination) in this case, but it doesn't cost much to be a bit
3449 * nicer: disabling DCC in the shader still leads to undefined results but
3450 * avoids the lockup.
3452 static LLVMValueRef
force_dcc_off(struct si_shader_context
*ctx
,
3455 if (ctx
->screen
->b
.chip_class
<= CIK
) {
3458 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3459 LLVMValueRef i32_6
= LLVMConstInt(ctx
->i32
, 6, 0);
3460 LLVMValueRef i32_C
= LLVMConstInt(ctx
->i32
, C_008F28_COMPRESSION_EN
, 0);
3463 tmp
= LLVMBuildExtractElement(builder
, rsrc
, i32_6
, "");
3464 tmp
= LLVMBuildAnd(builder
, tmp
, i32_C
, "");
3465 return LLVMBuildInsertElement(builder
, rsrc
, tmp
, i32_6
, "");
3469 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
3471 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3476 * Load the resource descriptor for \p image.
3480 struct lp_build_tgsi_context
*bld_base
,
3481 const struct tgsi_full_src_register
*image
,
3482 bool is_store
, unsigned target
,
3485 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3486 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
3488 LLVMValueRef index
, tmp
;
3489 bool dcc_off
= target
!= TGSI_TEXTURE_BUFFER
&& is_store
;
3491 assert(image
->Register
.File
== TGSI_FILE_IMAGE
);
3493 if (!image
->Register
.Indirect
) {
3494 const struct tgsi_shader_info
*info
= bld_base
->info
;
3496 index
= LLVMConstInt(ctx
->i32
, image
->Register
.Index
, 0);
3498 if (info
->images_writemask
& (1 << image
->Register
.Index
) &&
3499 target
!= TGSI_TEXTURE_BUFFER
)
3502 /* From the GL_ARB_shader_image_load_store extension spec:
3504 * If a shader performs an image load, store, or atomic
3505 * operation using an image variable declared as an array,
3506 * and if the index used to select an individual element is
3507 * negative or greater than or equal to the size of the
3508 * array, the results of the operation are undefined but may
3509 * not lead to termination.
3511 index
= get_bounded_indirect_index(ctx
, &image
->Indirect
,
3512 image
->Register
.Index
,
3516 if (target
== TGSI_TEXTURE_BUFFER
) {
3517 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
3519 rsrc_ptr
= LLVMBuildPointerCast(builder
, rsrc_ptr
,
3520 const_array(ctx
->v4i32
, 0), "");
3521 index
= LLVMBuildMul(builder
, index
,
3522 LLVMConstInt(ctx
->i32
, 2, 0), "");
3523 index
= LLVMBuildAdd(builder
, index
,
3524 LLVMConstInt(ctx
->i32
, 1, 0), "");
3525 *rsrc
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3529 tmp
= build_indexed_load_const(ctx
, rsrc_ptr
, index
);
3531 tmp
= force_dcc_off(ctx
, tmp
);
3535 static LLVMValueRef
image_fetch_coords(
3536 struct lp_build_tgsi_context
*bld_base
,
3537 const struct tgsi_full_instruction
*inst
,
3540 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3541 LLVMBuilderRef builder
= gallivm
->builder
;
3542 unsigned target
= inst
->Memory
.Texture
;
3543 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
3544 LLVMValueRef coords
[4];
3548 for (chan
= 0; chan
< num_coords
; ++chan
) {
3549 tmp
= lp_build_emit_fetch(bld_base
, inst
, src
, chan
);
3550 tmp
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3554 if (num_coords
== 1)
3557 if (num_coords
== 3) {
3558 /* LLVM has difficulties lowering 3-element vectors. */
3559 coords
[3] = bld_base
->uint_bld
.undef
;
3563 return lp_build_gather_values(gallivm
, coords
, num_coords
);
3567 * Append the extra mode bits that are used by image load and store.
3569 static void image_append_args(
3570 struct si_shader_context
*ctx
,
3571 struct lp_build_emit_data
* emit_data
,
3576 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3577 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3578 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3579 LLVMValueRef r128
= i1false
;
3580 LLVMValueRef da
= tgsi_is_array_image(target
) ? i1true
: i1false
;
3583 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3585 LLVMValueRef slc
= i1false
;
3586 LLVMValueRef lwe
= i1false
;
3588 if (atomic
|| (HAVE_LLVM
<= 0x0309)) {
3589 emit_data
->args
[emit_data
->arg_count
++] = r128
;
3590 emit_data
->args
[emit_data
->arg_count
++] = da
;
3592 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3594 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3598 /* HAVE_LLVM >= 0x0400 */
3599 emit_data
->args
[emit_data
->arg_count
++] = glc
;
3600 emit_data
->args
[emit_data
->arg_count
++] = slc
;
3601 emit_data
->args
[emit_data
->arg_count
++] = lwe
;
3602 emit_data
->args
[emit_data
->arg_count
++] = da
;
3606 * Append the resource and indexing arguments for buffer intrinsics.
3608 * \param rsrc the v4i32 buffer resource
3609 * \param index index into the buffer (stride-based)
3610 * \param offset byte offset into the buffer
3612 static void buffer_append_args(
3613 struct si_shader_context
*ctx
,
3614 struct lp_build_emit_data
*emit_data
,
3617 LLVMValueRef offset
,
3621 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3622 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
3623 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
3625 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
3626 emit_data
->args
[emit_data
->arg_count
++] = index
; /* vindex */
3627 emit_data
->args
[emit_data
->arg_count
++] = offset
; /* voffset */
3629 emit_data
->args
[emit_data
->arg_count
++] =
3631 inst
->Memory
.Qualifier
& (TGSI_MEMORY_COHERENT
| TGSI_MEMORY_VOLATILE
) ?
3632 i1true
: i1false
; /* glc */
3634 emit_data
->args
[emit_data
->arg_count
++] = i1false
; /* slc */
3637 static void load_fetch_args(
3638 struct lp_build_tgsi_context
* bld_base
,
3639 struct lp_build_emit_data
* emit_data
)
3641 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3642 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3643 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3644 unsigned target
= inst
->Memory
.Texture
;
3647 emit_data
->dst_type
= LLVMVectorType(bld_base
->base
.elem_type
, 4);
3649 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3650 LLVMBuilderRef builder
= gallivm
->builder
;
3651 LLVMValueRef offset
;
3654 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
3656 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
3657 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3659 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3660 offset
, false, false);
3661 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3662 LLVMValueRef coords
;
3664 image_fetch_rsrc(bld_base
, &inst
->Src
[0], false, target
, &rsrc
);
3665 coords
= image_fetch_coords(bld_base
, inst
, 1);
3667 if (target
== TGSI_TEXTURE_BUFFER
) {
3668 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3669 bld_base
->uint_bld
.zero
, false, false);
3671 emit_data
->args
[0] = coords
;
3672 emit_data
->args
[1] = rsrc
;
3673 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
3674 emit_data
->arg_count
= 3;
3676 image_append_args(ctx
, emit_data
, target
, false, false);
3681 static void load_emit_buffer(struct si_shader_context
*ctx
,
3682 struct lp_build_emit_data
*emit_data
)
3684 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3685 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3686 LLVMBuilderRef builder
= gallivm
->builder
;
3687 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
3688 uint count
= util_last_bit(writemask
);
3689 const char *intrinsic_name
;
3690 LLVMTypeRef dst_type
;
3694 intrinsic_name
= "llvm.amdgcn.buffer.load.f32";
3695 dst_type
= ctx
->f32
;
3698 intrinsic_name
= "llvm.amdgcn.buffer.load.v2f32";
3699 dst_type
= LLVMVectorType(ctx
->f32
, 2);
3702 intrinsic_name
= "llvm.amdgcn.buffer.load.v4f32";
3703 dst_type
= ctx
->v4f32
;
3707 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
3708 builder
, intrinsic_name
, dst_type
,
3709 emit_data
->args
, emit_data
->arg_count
,
3710 LP_FUNC_ATTR_READONLY
);
3713 static LLVMValueRef
get_memory_ptr(struct si_shader_context
*ctx
,
3714 const struct tgsi_full_instruction
*inst
,
3715 LLVMTypeRef type
, int arg
)
3717 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3718 LLVMBuilderRef builder
= gallivm
->builder
;
3719 LLVMValueRef offset
, ptr
;
3722 offset
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, arg
, 0);
3723 offset
= LLVMBuildBitCast(builder
, offset
, ctx
->i32
, "");
3725 ptr
= ctx
->shared_memory
;
3726 ptr
= LLVMBuildGEP(builder
, ptr
, &offset
, 1, "");
3727 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
3728 ptr
= LLVMBuildBitCast(builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
3733 static void load_emit_memory(
3734 struct si_shader_context
*ctx
,
3735 struct lp_build_emit_data
*emit_data
)
3737 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3738 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
3739 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3740 LLVMBuilderRef builder
= gallivm
->builder
;
3741 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3742 LLVMValueRef channels
[4], ptr
, derived_ptr
, index
;
3745 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 1);
3747 for (chan
= 0; chan
< 4; ++chan
) {
3748 if (!(writemask
& (1 << chan
))) {
3749 channels
[chan
] = LLVMGetUndef(base
->elem_type
);
3753 index
= lp_build_const_int32(gallivm
, chan
);
3754 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3755 channels
[chan
] = LLVMBuildLoad(builder
, derived_ptr
, "");
3757 emit_data
->output
[emit_data
->chan
] = lp_build_gather_values(gallivm
, channels
, 4);
3760 static void get_image_intr_name(const char *base_name
,
3761 LLVMTypeRef data_type
,
3762 LLVMTypeRef coords_type
,
3763 LLVMTypeRef rsrc_type
,
3764 char *out_name
, unsigned out_len
)
3766 char coords_type_name
[8];
3768 build_type_name_for_intr(coords_type
, coords_type_name
,
3769 sizeof(coords_type_name
));
3771 if (HAVE_LLVM
<= 0x0309) {
3772 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
3774 char data_type_name
[8];
3775 char rsrc_type_name
[8];
3777 build_type_name_for_intr(data_type
, data_type_name
,
3778 sizeof(data_type_name
));
3779 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
3780 sizeof(rsrc_type_name
));
3781 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
3782 data_type_name
, coords_type_name
, rsrc_type_name
);
3786 static void load_emit(
3787 const struct lp_build_tgsi_action
*action
,
3788 struct lp_build_tgsi_context
*bld_base
,
3789 struct lp_build_emit_data
*emit_data
)
3791 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3792 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3793 LLVMBuilderRef builder
= gallivm
->builder
;
3794 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3795 char intrinsic_name
[64];
3797 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
3798 load_emit_memory(ctx
, emit_data
);
3802 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
3803 emit_waitcnt(ctx
, VM_CNT
);
3805 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3806 load_emit_buffer(ctx
, emit_data
);
3810 if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
3811 emit_data
->output
[emit_data
->chan
] =
3813 builder
, "llvm.amdgcn.buffer.load.format.v4f32", emit_data
->dst_type
,
3814 emit_data
->args
, emit_data
->arg_count
,
3815 LP_FUNC_ATTR_READONLY
);
3817 get_image_intr_name("llvm.amdgcn.image.load",
3818 emit_data
->dst_type
, /* vdata */
3819 LLVMTypeOf(emit_data
->args
[0]), /* coords */
3820 LLVMTypeOf(emit_data
->args
[1]), /* rsrc */
3821 intrinsic_name
, sizeof(intrinsic_name
));
3823 emit_data
->output
[emit_data
->chan
] =
3825 builder
, intrinsic_name
, emit_data
->dst_type
,
3826 emit_data
->args
, emit_data
->arg_count
,
3827 LP_FUNC_ATTR_READONLY
);
3831 static void store_fetch_args(
3832 struct lp_build_tgsi_context
* bld_base
,
3833 struct lp_build_emit_data
* emit_data
)
3835 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3836 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
3837 LLVMBuilderRef builder
= gallivm
->builder
;
3838 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
3839 struct tgsi_full_src_register memory
;
3840 LLVMValueRef chans
[4];
3845 emit_data
->dst_type
= LLVMVoidTypeInContext(gallivm
->context
);
3847 for (chan
= 0; chan
< 4; ++chan
) {
3848 chans
[chan
] = lp_build_emit_fetch(bld_base
, inst
, 1, chan
);
3850 data
= lp_build_gather_values(gallivm
, chans
, 4);
3852 emit_data
->args
[emit_data
->arg_count
++] = data
;
3854 memory
= tgsi_full_src_register_from_dst(&inst
->Dst
[0]);
3856 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
3857 LLVMValueRef offset
;
3860 rsrc
= shader_buffer_fetch_rsrc(ctx
, &memory
);
3862 tmp
= lp_build_emit_fetch(bld_base
, inst
, 0, 0);
3863 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
3865 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
3866 offset
, false, false);
3867 } else if (inst
->Dst
[0].Register
.File
== TGSI_FILE_IMAGE
) {
3868 unsigned target
= inst
->Memory
.Texture
;
3869 LLVMValueRef coords
;
3871 /* 8bit/16bit TC L1 write corruption bug on SI.
3872 * All store opcodes not aligned to a dword are affected.
3874 * The only way to get unaligned stores in radeonsi is through
3877 bool force_glc
= ctx
->screen
->b
.chip_class
== SI
;
3879 coords
= image_fetch_coords(bld_base
, inst
, 0);
3881 if (target
== TGSI_TEXTURE_BUFFER
) {
3882 image_fetch_rsrc(bld_base
, &memory
, true, target
, &rsrc
);
3883 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
3884 bld_base
->uint_bld
.zero
, false, force_glc
);
3886 emit_data
->args
[1] = coords
;
3887 image_fetch_rsrc(bld_base
, &memory
, true, target
,
3888 &emit_data
->args
[2]);
3889 emit_data
->args
[3] = lp_build_const_int32(gallivm
, 15); /* dmask */
3890 emit_data
->arg_count
= 4;
3892 image_append_args(ctx
, emit_data
, target
, false, force_glc
);
3897 static void store_emit_buffer(
3898 struct si_shader_context
*ctx
,
3899 struct lp_build_emit_data
*emit_data
)
3901 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3902 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3903 LLVMBuilderRef builder
= gallivm
->builder
;
3904 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
3905 LLVMValueRef base_data
= emit_data
->args
[0];
3906 LLVMValueRef base_offset
= emit_data
->args
[3];
3907 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3911 const char *intrinsic_name
;
3913 LLVMValueRef offset
;
3916 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
3918 /* Due to an LLVM limitation, split 3-element writes
3919 * into a 2-element and a 1-element write. */
3921 writemask
|= 1 << (start
+ 2);
3927 intrinsic_name
= "llvm.amdgcn.buffer.store.v4f32";
3928 } else if (count
== 2) {
3929 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
3931 tmp
= LLVMBuildExtractElement(
3933 lp_build_const_int32(gallivm
, start
), "");
3934 data
= LLVMBuildInsertElement(
3935 builder
, LLVMGetUndef(v2f32
), tmp
,
3936 uint_bld
->zero
, "");
3938 tmp
= LLVMBuildExtractElement(
3940 lp_build_const_int32(gallivm
, start
+ 1), "");
3941 data
= LLVMBuildInsertElement(
3942 builder
, data
, tmp
, uint_bld
->one
, "");
3944 intrinsic_name
= "llvm.amdgcn.buffer.store.v2f32";
3947 data
= LLVMBuildExtractElement(
3949 lp_build_const_int32(gallivm
, start
), "");
3950 intrinsic_name
= "llvm.amdgcn.buffer.store.f32";
3953 offset
= base_offset
;
3955 offset
= LLVMBuildAdd(
3957 lp_build_const_int32(gallivm
, start
* 4), "");
3960 emit_data
->args
[0] = data
;
3961 emit_data
->args
[3] = offset
;
3964 builder
, intrinsic_name
, emit_data
->dst_type
,
3965 emit_data
->args
, emit_data
->arg_count
, 0);
3969 static void store_emit_memory(
3970 struct si_shader_context
*ctx
,
3971 struct lp_build_emit_data
*emit_data
)
3973 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3974 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3975 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
3976 LLVMBuilderRef builder
= gallivm
->builder
;
3977 unsigned writemask
= inst
->Dst
[0].Register
.WriteMask
;
3978 LLVMValueRef ptr
, derived_ptr
, data
, index
;
3981 ptr
= get_memory_ptr(ctx
, inst
, base
->elem_type
, 0);
3983 for (chan
= 0; chan
< 4; ++chan
) {
3984 if (!(writemask
& (1 << chan
))) {
3987 data
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 1, chan
);
3988 index
= lp_build_const_int32(gallivm
, chan
);
3989 derived_ptr
= LLVMBuildGEP(builder
, ptr
, &index
, 1, "");
3990 LLVMBuildStore(builder
, data
, derived_ptr
);
3994 static void store_emit(
3995 const struct lp_build_tgsi_action
*action
,
3996 struct lp_build_tgsi_context
*bld_base
,
3997 struct lp_build_emit_data
*emit_data
)
3999 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4000 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4001 LLVMBuilderRef builder
= gallivm
->builder
;
4002 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4003 unsigned target
= inst
->Memory
.Texture
;
4004 char intrinsic_name
[64];
4006 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4007 store_emit_memory(ctx
, emit_data
);
4011 if (inst
->Memory
.Qualifier
& TGSI_MEMORY_VOLATILE
)
4012 emit_waitcnt(ctx
, VM_CNT
);
4014 if (inst
->Dst
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4015 store_emit_buffer(ctx
, emit_data
);
4019 if (target
== TGSI_TEXTURE_BUFFER
) {
4020 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4021 builder
, "llvm.amdgcn.buffer.store.format.v4f32",
4022 emit_data
->dst_type
, emit_data
->args
,
4023 emit_data
->arg_count
, 0);
4025 get_image_intr_name("llvm.amdgcn.image.store",
4026 LLVMTypeOf(emit_data
->args
[0]), /* vdata */
4027 LLVMTypeOf(emit_data
->args
[1]), /* coords */
4028 LLVMTypeOf(emit_data
->args
[2]), /* rsrc */
4029 intrinsic_name
, sizeof(intrinsic_name
));
4031 emit_data
->output
[emit_data
->chan
] =
4033 builder
, intrinsic_name
, emit_data
->dst_type
,
4034 emit_data
->args
, emit_data
->arg_count
, 0);
4038 static void atomic_fetch_args(
4039 struct lp_build_tgsi_context
* bld_base
,
4040 struct lp_build_emit_data
* emit_data
)
4042 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4043 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4044 LLVMBuilderRef builder
= gallivm
->builder
;
4045 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4046 LLVMValueRef data1
, data2
;
4050 emit_data
->dst_type
= bld_base
->base
.elem_type
;
4052 tmp
= lp_build_emit_fetch(bld_base
, inst
, 2, 0);
4053 data1
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4055 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4056 tmp
= lp_build_emit_fetch(bld_base
, inst
, 3, 0);
4057 data2
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4060 /* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
4061 * of arguments, which is reversed relative to TGSI (and GLSL)
4063 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4064 emit_data
->args
[emit_data
->arg_count
++] = data2
;
4065 emit_data
->args
[emit_data
->arg_count
++] = data1
;
4067 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4068 LLVMValueRef offset
;
4070 rsrc
= shader_buffer_fetch_rsrc(ctx
, &inst
->Src
[0]);
4072 tmp
= lp_build_emit_fetch(bld_base
, inst
, 1, 0);
4073 offset
= LLVMBuildBitCast(builder
, tmp
, bld_base
->uint_bld
.elem_type
, "");
4075 buffer_append_args(ctx
, emit_data
, rsrc
, bld_base
->uint_bld
.zero
,
4076 offset
, true, false);
4077 } else if (inst
->Src
[0].Register
.File
== TGSI_FILE_IMAGE
) {
4078 unsigned target
= inst
->Memory
.Texture
;
4079 LLVMValueRef coords
;
4081 image_fetch_rsrc(bld_base
, &inst
->Src
[0], true, target
, &rsrc
);
4082 coords
= image_fetch_coords(bld_base
, inst
, 1);
4084 if (target
== TGSI_TEXTURE_BUFFER
) {
4085 buffer_append_args(ctx
, emit_data
, rsrc
, coords
,
4086 bld_base
->uint_bld
.zero
, true, false);
4088 emit_data
->args
[emit_data
->arg_count
++] = coords
;
4089 emit_data
->args
[emit_data
->arg_count
++] = rsrc
;
4091 image_append_args(ctx
, emit_data
, target
, true, false);
4096 static void atomic_emit_memory(struct si_shader_context
*ctx
,
4097 struct lp_build_emit_data
*emit_data
) {
4098 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4099 LLVMBuilderRef builder
= gallivm
->builder
;
4100 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4101 LLVMValueRef ptr
, result
, arg
;
4103 ptr
= get_memory_ptr(ctx
, inst
, ctx
->i32
, 1);
4105 arg
= lp_build_emit_fetch(&ctx
->bld_base
, inst
, 2, 0);
4106 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
4108 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
) {
4109 LLVMValueRef new_data
;
4110 new_data
= lp_build_emit_fetch(&ctx
->bld_base
,
4113 new_data
= LLVMBuildBitCast(builder
, new_data
, ctx
->i32
, "");
4115 #if HAVE_LLVM >= 0x309
4116 result
= LLVMBuildAtomicCmpXchg(builder
, ptr
, arg
, new_data
,
4117 LLVMAtomicOrderingSequentiallyConsistent
,
4118 LLVMAtomicOrderingSequentiallyConsistent
,
4122 result
= LLVMBuildExtractValue(builder
, result
, 0, "");
4124 LLVMAtomicRMWBinOp op
;
4126 switch(inst
->Instruction
.Opcode
) {
4127 case TGSI_OPCODE_ATOMUADD
:
4128 op
= LLVMAtomicRMWBinOpAdd
;
4130 case TGSI_OPCODE_ATOMXCHG
:
4131 op
= LLVMAtomicRMWBinOpXchg
;
4133 case TGSI_OPCODE_ATOMAND
:
4134 op
= LLVMAtomicRMWBinOpAnd
;
4136 case TGSI_OPCODE_ATOMOR
:
4137 op
= LLVMAtomicRMWBinOpOr
;
4139 case TGSI_OPCODE_ATOMXOR
:
4140 op
= LLVMAtomicRMWBinOpXor
;
4142 case TGSI_OPCODE_ATOMUMIN
:
4143 op
= LLVMAtomicRMWBinOpUMin
;
4145 case TGSI_OPCODE_ATOMUMAX
:
4146 op
= LLVMAtomicRMWBinOpUMax
;
4148 case TGSI_OPCODE_ATOMIMIN
:
4149 op
= LLVMAtomicRMWBinOpMin
;
4151 case TGSI_OPCODE_ATOMIMAX
:
4152 op
= LLVMAtomicRMWBinOpMax
;
4155 unreachable("unknown atomic opcode");
4158 result
= LLVMBuildAtomicRMW(builder
, op
, ptr
, arg
,
4159 LLVMAtomicOrderingSequentiallyConsistent
,
4162 emit_data
->output
[emit_data
->chan
] = LLVMBuildBitCast(builder
, result
, emit_data
->dst_type
, "");
4165 static void atomic_emit(
4166 const struct lp_build_tgsi_action
*action
,
4167 struct lp_build_tgsi_context
*bld_base
,
4168 struct lp_build_emit_data
*emit_data
)
4170 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4171 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4172 LLVMBuilderRef builder
= gallivm
->builder
;
4173 const struct tgsi_full_instruction
* inst
= emit_data
->inst
;
4174 char intrinsic_name
[40];
4177 if (inst
->Src
[0].Register
.File
== TGSI_FILE_MEMORY
) {
4178 atomic_emit_memory(ctx
, emit_data
);
4182 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
||
4183 inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4184 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4185 "llvm.amdgcn.buffer.atomic.%s", action
->intr_name
);
4187 LLVMValueRef coords
;
4188 char coords_type
[8];
4190 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_ATOMCAS
)
4191 coords
= emit_data
->args
[2];
4193 coords
= emit_data
->args
[1];
4195 build_type_name_for_intr(LLVMTypeOf(coords
), coords_type
, sizeof(coords_type
));
4196 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
4197 "llvm.amdgcn.image.atomic.%s.%s",
4198 action
->intr_name
, coords_type
);
4201 tmp
= lp_build_intrinsic(
4202 builder
, intrinsic_name
, bld_base
->uint_bld
.elem_type
,
4203 emit_data
->args
, emit_data
->arg_count
, 0);
4204 emit_data
->output
[emit_data
->chan
] =
4205 LLVMBuildBitCast(builder
, tmp
, bld_base
->base
.elem_type
, "");
4208 static void resq_fetch_args(
4209 struct lp_build_tgsi_context
* bld_base
,
4210 struct lp_build_emit_data
* emit_data
)
4212 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4213 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4214 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4215 const struct tgsi_full_src_register
*reg
= &inst
->Src
[0];
4217 emit_data
->dst_type
= ctx
->v4i32
;
4219 if (reg
->Register
.File
== TGSI_FILE_BUFFER
) {
4220 emit_data
->args
[0] = shader_buffer_fetch_rsrc(ctx
, reg
);
4221 emit_data
->arg_count
= 1;
4222 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4223 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4224 &emit_data
->args
[0]);
4225 emit_data
->arg_count
= 1;
4227 emit_data
->args
[0] = bld_base
->uint_bld
.zero
; /* mip level */
4228 image_fetch_rsrc(bld_base
, reg
, false, inst
->Memory
.Texture
,
4229 &emit_data
->args
[1]);
4230 emit_data
->args
[2] = lp_build_const_int32(gallivm
, 15); /* dmask */
4231 emit_data
->args
[3] = bld_base
->uint_bld
.zero
; /* unorm */
4232 emit_data
->args
[4] = bld_base
->uint_bld
.zero
; /* r128 */
4233 emit_data
->args
[5] = tgsi_is_array_image(inst
->Memory
.Texture
) ?
4234 bld_base
->uint_bld
.one
: bld_base
->uint_bld
.zero
; /* da */
4235 emit_data
->args
[6] = bld_base
->uint_bld
.zero
; /* glc */
4236 emit_data
->args
[7] = bld_base
->uint_bld
.zero
; /* slc */
4237 emit_data
->args
[8] = bld_base
->uint_bld
.zero
; /* tfe */
4238 emit_data
->args
[9] = bld_base
->uint_bld
.zero
; /* lwe */
4239 emit_data
->arg_count
= 10;
4243 static void resq_emit(
4244 const struct lp_build_tgsi_action
*action
,
4245 struct lp_build_tgsi_context
*bld_base
,
4246 struct lp_build_emit_data
*emit_data
)
4248 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4249 LLVMBuilderRef builder
= gallivm
->builder
;
4250 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4253 if (inst
->Src
[0].Register
.File
== TGSI_FILE_BUFFER
) {
4254 out
= LLVMBuildExtractElement(builder
, emit_data
->args
[0],
4255 lp_build_const_int32(gallivm
, 2), "");
4256 } else if (inst
->Memory
.Texture
== TGSI_TEXTURE_BUFFER
) {
4257 out
= get_buffer_size(bld_base
, emit_data
->args
[0]);
4259 out
= lp_build_intrinsic(
4260 builder
, "llvm.SI.getresinfo.i32", emit_data
->dst_type
,
4261 emit_data
->args
, emit_data
->arg_count
,
4262 LP_FUNC_ATTR_READNONE
);
4264 /* Divide the number of layers by 6 to get the number of cubes. */
4265 if (inst
->Memory
.Texture
== TGSI_TEXTURE_CUBE_ARRAY
) {
4266 LLVMValueRef imm2
= lp_build_const_int32(gallivm
, 2);
4267 LLVMValueRef imm6
= lp_build_const_int32(gallivm
, 6);
4269 LLVMValueRef z
= LLVMBuildExtractElement(builder
, out
, imm2
, "");
4270 z
= LLVMBuildSDiv(builder
, z
, imm6
, "");
4271 out
= LLVMBuildInsertElement(builder
, out
, z
, imm2
, "");
4275 emit_data
->output
[emit_data
->chan
] = out
;
4278 static void set_tex_fetch_args(struct si_shader_context
*ctx
,
4279 struct lp_build_emit_data
*emit_data
,
4280 unsigned opcode
, unsigned target
,
4281 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4282 LLVMValueRef
*param
, unsigned count
,
4285 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4287 unsigned is_rect
= target
== TGSI_TEXTURE_RECT
;
4289 /* Pad to power of two vector */
4290 while (count
< util_next_power_of_two(count
))
4291 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4293 /* Texture coordinates. */
4295 emit_data
->args
[0] = lp_build_gather_values(gallivm
, param
, count
);
4297 emit_data
->args
[0] = param
[0];
4300 emit_data
->args
[1] = res_ptr
;
4303 if (opcode
== TGSI_OPCODE_TXF
|| opcode
== TGSI_OPCODE_TXQ
)
4304 emit_data
->dst_type
= ctx
->v4i32
;
4306 emit_data
->dst_type
= ctx
->v4f32
;
4308 emit_data
->args
[num_args
++] = samp_ptr
;
4311 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, dmask
);
4312 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, is_rect
); /* unorm */
4313 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* r128 */
4314 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
,
4315 tgsi_is_array_sampler(target
)); /* da */
4316 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* glc */
4317 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* slc */
4318 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* tfe */
4319 emit_data
->args
[num_args
++] = lp_build_const_int32(gallivm
, 0); /* lwe */
4321 emit_data
->arg_count
= num_args
;
4324 static const struct lp_build_tgsi_action tex_action
;
4334 * Load an image view, fmask view. or sampler state descriptor.
4336 static LLVMValueRef
load_sampler_desc_custom(struct si_shader_context
*ctx
,
4337 LLVMValueRef list
, LLVMValueRef index
,
4338 enum desc_type type
)
4340 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
4341 LLVMBuilderRef builder
= gallivm
->builder
;
4345 /* The image is at [0:7]. */
4346 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4349 /* The buffer is in [4:7]. */
4350 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4351 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4352 list
= LLVMBuildPointerCast(builder
, list
,
4353 const_array(ctx
->v4i32
, 0), "");
4356 /* The FMASK is at [8:15]. */
4357 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 2, 0), "");
4358 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 1, 0), "");
4361 /* The sampler state is at [12:15]. */
4362 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, 4, 0), "");
4363 index
= LLVMBuildAdd(builder
, index
, LLVMConstInt(ctx
->i32
, 3, 0), "");
4364 list
= LLVMBuildPointerCast(builder
, list
,
4365 const_array(ctx
->v4i32
, 0), "");
4369 return build_indexed_load_const(ctx
, list
, index
);
4372 static LLVMValueRef
load_sampler_desc(struct si_shader_context
*ctx
,
4373 LLVMValueRef index
, enum desc_type type
)
4375 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
,
4378 return load_sampler_desc_custom(ctx
, list
, index
, type
);
4381 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4384 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4385 * filtering manually. The driver sets img7 to a mask clearing
4386 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4387 * s_and_b32 samp0, samp0, img7
4390 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4392 static LLVMValueRef
sici_fix_sampler_aniso(struct si_shader_context
*ctx
,
4393 LLVMValueRef res
, LLVMValueRef samp
)
4395 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4396 LLVMValueRef img7
, samp0
;
4398 if (ctx
->screen
->b
.chip_class
>= VI
)
4401 img7
= LLVMBuildExtractElement(builder
, res
,
4402 LLVMConstInt(ctx
->i32
, 7, 0), "");
4403 samp0
= LLVMBuildExtractElement(builder
, samp
,
4404 LLVMConstInt(ctx
->i32
, 0, 0), "");
4405 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4406 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4407 LLVMConstInt(ctx
->i32
, 0, 0), "");
4410 static void tex_fetch_ptrs(
4411 struct lp_build_tgsi_context
*bld_base
,
4412 struct lp_build_emit_data
*emit_data
,
4413 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
, LLVMValueRef
*fmask_ptr
)
4415 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4416 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4417 unsigned target
= inst
->Texture
.Texture
;
4418 unsigned sampler_src
;
4419 unsigned sampler_index
;
4422 sampler_src
= emit_data
->inst
->Instruction
.NumSrcRegs
- 1;
4423 sampler_index
= emit_data
->inst
->Src
[sampler_src
].Register
.Index
;
4425 if (emit_data
->inst
->Src
[sampler_src
].Register
.Indirect
) {
4426 const struct tgsi_full_src_register
*reg
= &emit_data
->inst
->Src
[sampler_src
];
4428 index
= get_bounded_indirect_index(ctx
,
4430 reg
->Register
.Index
,
4433 index
= LLVMConstInt(ctx
->i32
, sampler_index
, 0);
4436 if (target
== TGSI_TEXTURE_BUFFER
)
4437 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_BUFFER
);
4439 *res_ptr
= load_sampler_desc(ctx
, index
, DESC_IMAGE
);
4446 if (target
== TGSI_TEXTURE_2D_MSAA
||
4447 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4449 *fmask_ptr
= load_sampler_desc(ctx
, index
, DESC_FMASK
);
4450 } else if (target
!= TGSI_TEXTURE_BUFFER
) {
4452 *samp_ptr
= load_sampler_desc(ctx
, index
, DESC_SAMPLER
);
4453 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4458 static void txq_fetch_args(
4459 struct lp_build_tgsi_context
*bld_base
,
4460 struct lp_build_emit_data
*emit_data
)
4462 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4463 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4464 unsigned target
= inst
->Texture
.Texture
;
4465 LLVMValueRef res_ptr
;
4466 LLVMValueRef address
;
4468 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, NULL
, NULL
);
4470 if (target
== TGSI_TEXTURE_BUFFER
) {
4471 /* Read the size from the buffer descriptor directly. */
4472 emit_data
->args
[0] = get_buffer_size(bld_base
, res_ptr
);
4476 /* Textures - set the mip level. */
4477 address
= lp_build_emit_fetch(bld_base
, inst
, 0, TGSI_CHAN_X
);
4479 set_tex_fetch_args(ctx
, emit_data
, TGSI_OPCODE_TXQ
, target
, res_ptr
,
4480 NULL
, &address
, 1, 0xf);
4483 static void txq_emit(const struct lp_build_tgsi_action
*action
,
4484 struct lp_build_tgsi_context
*bld_base
,
4485 struct lp_build_emit_data
*emit_data
)
4487 struct lp_build_context
*base
= &bld_base
->base
;
4488 unsigned target
= emit_data
->inst
->Texture
.Texture
;
4490 if (target
== TGSI_TEXTURE_BUFFER
) {
4491 /* Just return the buffer size. */
4492 emit_data
->output
[emit_data
->chan
] = emit_data
->args
[0];
4496 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4497 base
->gallivm
->builder
, "llvm.SI.getresinfo.i32",
4498 emit_data
->dst_type
, emit_data
->args
, emit_data
->arg_count
,
4499 LP_FUNC_ATTR_READNONE
);
4501 /* Divide the number of layers by 6 to get the number of cubes. */
4502 if (target
== TGSI_TEXTURE_CUBE_ARRAY
||
4503 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4504 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
4505 LLVMValueRef two
= lp_build_const_int32(bld_base
->base
.gallivm
, 2);
4506 LLVMValueRef six
= lp_build_const_int32(bld_base
->base
.gallivm
, 6);
4508 LLVMValueRef v4
= emit_data
->output
[emit_data
->chan
];
4509 LLVMValueRef z
= LLVMBuildExtractElement(builder
, v4
, two
, "");
4510 z
= LLVMBuildSDiv(builder
, z
, six
, "");
4512 emit_data
->output
[emit_data
->chan
] =
4513 LLVMBuildInsertElement(builder
, v4
, z
, two
, "");
4517 static void tex_fetch_args(
4518 struct lp_build_tgsi_context
*bld_base
,
4519 struct lp_build_emit_data
*emit_data
)
4521 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4522 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
4523 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4524 unsigned opcode
= inst
->Instruction
.Opcode
;
4525 unsigned target
= inst
->Texture
.Texture
;
4526 LLVMValueRef coords
[5], derivs
[6];
4527 LLVMValueRef address
[16];
4528 unsigned num_coords
= tgsi_util_get_texture_coord_dim(target
);
4529 int ref_pos
= tgsi_util_get_shadow_ref_src_index(target
);
4532 unsigned num_deriv_channels
= 0;
4533 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4534 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
4535 unsigned dmask
= 0xf;
4537 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4539 if (target
== TGSI_TEXTURE_BUFFER
) {
4540 emit_data
->dst_type
= ctx
->v4f32
;
4541 emit_data
->args
[0] = LLVMBuildBitCast(gallivm
->builder
, res_ptr
,
4543 emit_data
->args
[1] = bld_base
->uint_bld
.zero
;
4544 emit_data
->args
[2] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4545 emit_data
->arg_count
= 3;
4549 /* Fetch and project texture coordinates */
4550 coords
[3] = lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_W
);
4551 for (chan
= 0; chan
< 3; chan
++ ) {
4552 coords
[chan
] = lp_build_emit_fetch(bld_base
,
4555 if (opcode
== TGSI_OPCODE_TXP
)
4556 coords
[chan
] = lp_build_emit_llvm_binary(bld_base
,
4562 if (opcode
== TGSI_OPCODE_TXP
)
4563 coords
[3] = bld_base
->base
.one
;
4566 if (has_offset
&& opcode
!= TGSI_OPCODE_TXF
) {
4567 /* The offsets are six-bit signed integers packed like this:
4568 * X=[5:0], Y=[13:8], and Z=[21:16].
4570 LLVMValueRef offset
[3], pack
;
4572 assert(inst
->Texture
.NumOffsets
== 1);
4574 for (chan
= 0; chan
< 3; chan
++) {
4575 offset
[chan
] = lp_build_emit_fetch_texoffset(bld_base
,
4576 emit_data
->inst
, 0, chan
);
4577 offset
[chan
] = LLVMBuildAnd(gallivm
->builder
, offset
[chan
],
4578 lp_build_const_int32(gallivm
, 0x3f), "");
4580 offset
[chan
] = LLVMBuildShl(gallivm
->builder
, offset
[chan
],
4581 lp_build_const_int32(gallivm
, chan
*8), "");
4584 pack
= LLVMBuildOr(gallivm
->builder
, offset
[0], offset
[1], "");
4585 pack
= LLVMBuildOr(gallivm
->builder
, pack
, offset
[2], "");
4586 address
[count
++] = pack
;
4589 /* Pack LOD bias value */
4590 if (opcode
== TGSI_OPCODE_TXB
)
4591 address
[count
++] = coords
[3];
4592 if (opcode
== TGSI_OPCODE_TXB2
)
4593 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4595 /* Pack depth comparison value */
4596 if (tgsi_is_shadow_target(target
) && opcode
!= TGSI_OPCODE_LODQ
) {
4599 if (target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
4600 z
= lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4602 assert(ref_pos
>= 0);
4603 z
= coords
[ref_pos
];
4606 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4607 * so the depth comparison value isn't clamped for Z16 and
4608 * Z24 anymore. Do it manually here.
4610 * It's unnecessary if the original texture format was
4611 * Z32_FLOAT, but we don't know that here.
4613 if (ctx
->screen
->b
.chip_class
== VI
)
4614 z
= si_llvm_saturate(bld_base
, z
);
4616 address
[count
++] = z
;
4619 /* Pack user derivatives */
4620 if (opcode
== TGSI_OPCODE_TXD
) {
4621 int param
, num_src_deriv_channels
;
4624 case TGSI_TEXTURE_3D
:
4625 num_src_deriv_channels
= 3;
4626 num_deriv_channels
= 3;
4628 case TGSI_TEXTURE_2D
:
4629 case TGSI_TEXTURE_SHADOW2D
:
4630 case TGSI_TEXTURE_RECT
:
4631 case TGSI_TEXTURE_SHADOWRECT
:
4632 case TGSI_TEXTURE_2D_ARRAY
:
4633 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4634 num_src_deriv_channels
= 2;
4635 num_deriv_channels
= 2;
4637 case TGSI_TEXTURE_CUBE
:
4638 case TGSI_TEXTURE_SHADOWCUBE
:
4639 case TGSI_TEXTURE_CUBE_ARRAY
:
4640 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
4641 /* Cube derivatives will be converted to 2D. */
4642 num_src_deriv_channels
= 3;
4643 num_deriv_channels
= 2;
4645 case TGSI_TEXTURE_1D
:
4646 case TGSI_TEXTURE_SHADOW1D
:
4647 case TGSI_TEXTURE_1D_ARRAY
:
4648 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4649 num_src_deriv_channels
= 1;
4650 num_deriv_channels
= 1;
4653 unreachable("invalid target");
4656 for (param
= 0; param
< 2; param
++)
4657 for (chan
= 0; chan
< num_src_deriv_channels
; chan
++)
4658 derivs
[param
* num_src_deriv_channels
+ chan
] =
4659 lp_build_emit_fetch(bld_base
, inst
, param
+1, chan
);
4662 if (target
== TGSI_TEXTURE_CUBE
||
4663 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4664 target
== TGSI_TEXTURE_SHADOWCUBE
||
4665 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
)
4666 ac_prepare_cube_coords(&ctx
->ac
,
4667 opcode
== TGSI_OPCODE_TXD
,
4668 target
== TGSI_TEXTURE_CUBE_ARRAY
||
4669 target
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
4672 if (opcode
== TGSI_OPCODE_TXD
)
4673 for (int i
= 0; i
< num_deriv_channels
* 2; i
++)
4674 address
[count
++] = derivs
[i
];
4676 /* Pack texture coordinates */
4677 address
[count
++] = coords
[0];
4679 address
[count
++] = coords
[1];
4681 address
[count
++] = coords
[2];
4683 /* Pack LOD or sample index */
4684 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXF
)
4685 address
[count
++] = coords
[3];
4686 else if (opcode
== TGSI_OPCODE_TXL2
)
4687 address
[count
++] = lp_build_emit_fetch(bld_base
, inst
, 1, TGSI_CHAN_X
);
4690 assert(!"Cannot handle more than 16 texture address parameters");
4694 for (chan
= 0; chan
< count
; chan
++ ) {
4695 address
[chan
] = LLVMBuildBitCast(gallivm
->builder
,
4696 address
[chan
], ctx
->i32
, "");
4699 /* Adjust the sample index according to FMASK.
4701 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
4702 * which is the identity mapping. Each nibble says which physical sample
4703 * should be fetched to get that sample.
4705 * For example, 0x11111100 means there are only 2 samples stored and
4706 * the second sample covers 3/4 of the pixel. When reading samples 0
4707 * and 1, return physical sample 0 (determined by the first two 0s
4708 * in FMASK), otherwise return physical sample 1.
4710 * The sample index should be adjusted as follows:
4711 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
4713 if (target
== TGSI_TEXTURE_2D_MSAA
||
4714 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
4715 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4716 struct lp_build_emit_data txf_emit_data
= *emit_data
;
4717 LLVMValueRef txf_address
[4];
4718 unsigned txf_count
= count
;
4719 struct tgsi_full_instruction inst
= {};
4721 memcpy(txf_address
, address
, sizeof(txf_address
));
4723 if (target
== TGSI_TEXTURE_2D_MSAA
) {
4724 txf_address
[2] = bld_base
->uint_bld
.zero
;
4726 txf_address
[3] = bld_base
->uint_bld
.zero
;
4728 /* Read FMASK using TXF. */
4729 inst
.Instruction
.Opcode
= TGSI_OPCODE_TXF
;
4730 inst
.Texture
.Texture
= target
;
4731 txf_emit_data
.inst
= &inst
;
4732 txf_emit_data
.chan
= 0;
4733 set_tex_fetch_args(ctx
, &txf_emit_data
, TGSI_OPCODE_TXF
,
4734 target
, fmask_ptr
, NULL
,
4735 txf_address
, txf_count
, 0xf);
4736 build_tex_intrinsic(&tex_action
, bld_base
, &txf_emit_data
);
4738 /* Initialize some constants. */
4739 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, 0);
4740 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xF, 0);
4742 /* Apply the formula. */
4743 LLVMValueRef fmask
=
4744 LLVMBuildExtractElement(gallivm
->builder
,
4745 txf_emit_data
.output
[0],
4746 uint_bld
->zero
, "");
4748 unsigned sample_chan
= target
== TGSI_TEXTURE_2D_MSAA
? 2 : 3;
4750 LLVMValueRef sample_index4
=
4751 LLVMBuildMul(gallivm
->builder
, address
[sample_chan
], four
, "");
4753 LLVMValueRef shifted_fmask
=
4754 LLVMBuildLShr(gallivm
->builder
, fmask
, sample_index4
, "");
4756 LLVMValueRef final_sample
=
4757 LLVMBuildAnd(gallivm
->builder
, shifted_fmask
, F
, "");
4759 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
4760 * resource descriptor is 0 (invalid),
4762 LLVMValueRef fmask_desc
=
4763 LLVMBuildBitCast(gallivm
->builder
, fmask_ptr
,
4766 LLVMValueRef fmask_word1
=
4767 LLVMBuildExtractElement(gallivm
->builder
, fmask_desc
,
4770 LLVMValueRef word1_is_nonzero
=
4771 LLVMBuildICmp(gallivm
->builder
, LLVMIntNE
,
4772 fmask_word1
, uint_bld
->zero
, "");
4774 /* Replace the MSAA sample index. */
4775 address
[sample_chan
] =
4776 LLVMBuildSelect(gallivm
->builder
, word1_is_nonzero
,
4777 final_sample
, address
[sample_chan
], "");
4780 if (opcode
== TGSI_OPCODE_TXF
) {
4781 /* add tex offsets */
4782 if (inst
->Texture
.NumOffsets
) {
4783 struct lp_build_context
*uint_bld
= &bld_base
->uint_bld
;
4784 const struct tgsi_texture_offset
*off
= inst
->TexOffsets
;
4786 assert(inst
->Texture
.NumOffsets
== 1);
4789 case TGSI_TEXTURE_3D
:
4790 address
[2] = lp_build_add(uint_bld
, address
[2],
4791 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleZ
]);
4793 case TGSI_TEXTURE_2D
:
4794 case TGSI_TEXTURE_SHADOW2D
:
4795 case TGSI_TEXTURE_RECT
:
4796 case TGSI_TEXTURE_SHADOWRECT
:
4797 case TGSI_TEXTURE_2D_ARRAY
:
4798 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
4800 lp_build_add(uint_bld
, address
[1],
4801 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleY
]);
4803 case TGSI_TEXTURE_1D
:
4804 case TGSI_TEXTURE_SHADOW1D
:
4805 case TGSI_TEXTURE_1D_ARRAY
:
4806 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
4808 lp_build_add(uint_bld
, address
[0],
4809 ctx
->imms
[off
->Index
* TGSI_NUM_CHANNELS
+ off
->SwizzleX
]);
4811 /* texture offsets do not apply to other texture targets */
4816 if (opcode
== TGSI_OPCODE_TG4
) {
4817 unsigned gather_comp
= 0;
4819 /* DMASK was repurposed for GATHER4. 4 components are always
4820 * returned and DMASK works like a swizzle - it selects
4821 * the component to fetch. The only valid DMASK values are
4822 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4823 * (red,red,red,red) etc.) The ISA document doesn't mention
4827 /* Get the component index from src1.x for Gather4. */
4828 if (!tgsi_is_shadow_target(target
)) {
4829 LLVMValueRef comp_imm
;
4830 struct tgsi_src_register src1
= inst
->Src
[1].Register
;
4832 assert(src1
.File
== TGSI_FILE_IMMEDIATE
);
4834 comp_imm
= ctx
->imms
[src1
.Index
* TGSI_NUM_CHANNELS
+ src1
.SwizzleX
];
4835 gather_comp
= LLVMConstIntGetZExtValue(comp_imm
);
4836 gather_comp
= CLAMP(gather_comp
, 0, 3);
4839 dmask
= 1 << gather_comp
;
4842 set_tex_fetch_args(ctx
, emit_data
, opcode
, target
, res_ptr
,
4843 samp_ptr
, address
, count
, dmask
);
4846 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
4847 * incorrectly forces nearest filtering if the texture format is integer.
4848 * The only effect it has on Gather4, which always returns 4 texels for
4849 * bilinear filtering, is that the final coordinates are off by 0.5 of
4852 * The workaround is to subtract 0.5 from the unnormalized coordinates,
4853 * or (0.5 / size) from the normalized coordinates.
4855 static void si_lower_gather4_integer(struct si_shader_context
*ctx
,
4856 struct lp_build_emit_data
*emit_data
,
4857 const char *intr_name
,
4858 unsigned coord_vgpr_index
)
4860 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
4861 LLVMValueRef coord
= emit_data
->args
[0];
4862 LLVMValueRef half_texel
[2];
4865 if (emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
||
4866 emit_data
->inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWRECT
) {
4867 half_texel
[0] = half_texel
[1] = LLVMConstReal(ctx
->f32
, -0.5);
4869 struct tgsi_full_instruction txq_inst
= {};
4870 struct lp_build_emit_data txq_emit_data
= {};
4872 /* Query the texture size. */
4873 txq_inst
.Texture
.Texture
= emit_data
->inst
->Texture
.Texture
;
4874 txq_emit_data
.inst
= &txq_inst
;
4875 txq_emit_data
.dst_type
= ctx
->v4i32
;
4876 set_tex_fetch_args(ctx
, &txq_emit_data
, TGSI_OPCODE_TXQ
,
4877 txq_inst
.Texture
.Texture
,
4878 emit_data
->args
[1], NULL
,
4879 &ctx
->bld_base
.uint_bld
.zero
,
4881 txq_emit(NULL
, &ctx
->bld_base
, &txq_emit_data
);
4883 /* Compute -0.5 / size. */
4884 for (c
= 0; c
< 2; c
++) {
4886 LLVMBuildExtractElement(builder
, txq_emit_data
.output
[0],
4887 LLVMConstInt(ctx
->i32
, c
, 0), "");
4888 half_texel
[c
] = LLVMBuildUIToFP(builder
, half_texel
[c
], ctx
->f32
, "");
4890 lp_build_emit_llvm_unary(&ctx
->bld_base
,
4891 TGSI_OPCODE_RCP
, half_texel
[c
]);
4892 half_texel
[c
] = LLVMBuildFMul(builder
, half_texel
[c
],
4893 LLVMConstReal(ctx
->f32
, -0.5), "");
4897 for (c
= 0; c
< 2; c
++) {
4899 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
4901 tmp
= LLVMBuildExtractElement(builder
, coord
, index
, "");
4902 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->f32
, "");
4903 tmp
= LLVMBuildFAdd(builder
, tmp
, half_texel
[c
], "");
4904 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->i32
, "");
4905 coord
= LLVMBuildInsertElement(builder
, coord
, tmp
, index
, "");
4908 emit_data
->args
[0] = coord
;
4909 emit_data
->output
[emit_data
->chan
] =
4910 lp_build_intrinsic(builder
, intr_name
, emit_data
->dst_type
,
4911 emit_data
->args
, emit_data
->arg_count
,
4912 LP_FUNC_ATTR_READNONE
);
4915 static void build_tex_intrinsic(const struct lp_build_tgsi_action
*action
,
4916 struct lp_build_tgsi_context
*bld_base
,
4917 struct lp_build_emit_data
*emit_data
)
4919 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4920 struct lp_build_context
*base
= &bld_base
->base
;
4921 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4922 unsigned opcode
= inst
->Instruction
.Opcode
;
4923 unsigned target
= inst
->Texture
.Texture
;
4924 char intr_name
[127];
4925 bool has_offset
= inst
->Texture
.NumOffsets
> 0;
4926 bool is_shadow
= tgsi_is_shadow_target(target
);
4928 const char *name
= "llvm.SI.image.sample";
4929 const char *infix
= "";
4931 if (target
== TGSI_TEXTURE_BUFFER
) {
4932 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
4933 base
->gallivm
->builder
,
4934 "llvm.SI.vs.load.input", emit_data
->dst_type
,
4935 emit_data
->args
, emit_data
->arg_count
,
4936 LP_FUNC_ATTR_READNONE
);
4941 case TGSI_OPCODE_TXF
:
4942 name
= target
== TGSI_TEXTURE_2D_MSAA
||
4943 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
?
4944 "llvm.SI.image.load" :
4945 "llvm.SI.image.load.mip";
4949 case TGSI_OPCODE_LODQ
:
4950 name
= "llvm.SI.getlod";
4954 case TGSI_OPCODE_TEX
:
4955 case TGSI_OPCODE_TEX2
:
4956 case TGSI_OPCODE_TXP
:
4957 if (ctx
->type
!= PIPE_SHADER_FRAGMENT
)
4960 case TGSI_OPCODE_TXB
:
4961 case TGSI_OPCODE_TXB2
:
4962 assert(ctx
->type
== PIPE_SHADER_FRAGMENT
);
4965 case TGSI_OPCODE_TXL
:
4966 case TGSI_OPCODE_TXL2
:
4969 case TGSI_OPCODE_TXD
:
4972 case TGSI_OPCODE_TG4
:
4973 name
= "llvm.SI.gather4";
4981 /* Add the type and suffixes .c, .o if needed. */
4982 build_type_name_for_intr(LLVMTypeOf(emit_data
->args
[0]), type
, sizeof(type
));
4983 sprintf(intr_name
, "%s%s%s%s.%s",
4984 name
, is_shadow
? ".c" : "", infix
,
4985 has_offset
? ".o" : "", type
);
4987 /* The hardware needs special lowering for Gather4 with integer formats. */
4988 if (opcode
== TGSI_OPCODE_TG4
) {
4989 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4990 /* This will also work with non-constant indexing because of how
4991 * glsl_to_tgsi works and we intent to preserve that behavior.
4993 const unsigned src_idx
= 2;
4994 unsigned sampler
= inst
->Src
[src_idx
].Register
.Index
;
4996 assert(inst
->Src
[src_idx
].Register
.File
== TGSI_FILE_SAMPLER
);
4998 if (info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_SINT
||
4999 info
->sampler_type
[sampler
] == TGSI_RETURN_TYPE_UINT
) {
5000 /* Texture coordinates start after:
5001 * {offset, bias, z-compare, derivatives}
5002 * Only the offset and z-compare can occur here.
5004 si_lower_gather4_integer(ctx
, emit_data
, intr_name
,
5005 (int)has_offset
+ (int)is_shadow
);
5010 emit_data
->output
[emit_data
->chan
] = lp_build_intrinsic(
5011 base
->gallivm
->builder
, intr_name
, emit_data
->dst_type
,
5012 emit_data
->args
, emit_data
->arg_count
,
5013 LP_FUNC_ATTR_READNONE
);
5016 static void si_llvm_emit_txqs(
5017 const struct lp_build_tgsi_action
*action
,
5018 struct lp_build_tgsi_context
*bld_base
,
5019 struct lp_build_emit_data
*emit_data
)
5021 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5022 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5023 LLVMBuilderRef builder
= gallivm
->builder
;
5024 LLVMValueRef res
, samples
;
5025 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
;
5027 tex_fetch_ptrs(bld_base
, emit_data
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
5030 /* Read the samples from the descriptor directly. */
5031 res
= LLVMBuildBitCast(builder
, res_ptr
, ctx
->v8i32
, "");
5032 samples
= LLVMBuildExtractElement(
5034 lp_build_const_int32(gallivm
, 3), "");
5035 samples
= LLVMBuildLShr(builder
, samples
,
5036 lp_build_const_int32(gallivm
, 16), "");
5037 samples
= LLVMBuildAnd(builder
, samples
,
5038 lp_build_const_int32(gallivm
, 0xf), "");
5039 samples
= LLVMBuildShl(builder
, lp_build_const_int32(gallivm
, 1),
5042 emit_data
->output
[emit_data
->chan
] = samples
;
5046 * SI implements derivatives using the local data store (LDS)
5047 * All writes to the LDS happen in all executing threads at
5048 * the same time. TID is the Thread ID for the current
5049 * thread and is a value between 0 and 63, representing
5050 * the thread's position in the wavefront.
5052 * For the pixel shader threads are grouped into quads of four pixels.
5053 * The TIDs of the pixels of a quad are:
5061 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
5062 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
5063 * the current pixel's column, and masking with 0xfffffffe yields the TID
5064 * of the left pixel of the current pixel's row.
5066 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
5067 * adding 2 yields the TID of the pixel below the top pixel.
5069 /* masks for thread ID. */
5070 #define TID_MASK_TOP_LEFT 0xfffffffc
5071 #define TID_MASK_TOP 0xfffffffd
5072 #define TID_MASK_LEFT 0xfffffffe
5074 static void si_llvm_emit_ddxy(
5075 const struct lp_build_tgsi_action
*action
,
5076 struct lp_build_tgsi_context
*bld_base
,
5077 struct lp_build_emit_data
*emit_data
)
5079 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5080 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5081 unsigned opcode
= emit_data
->info
->opcode
;
5082 LLVMValueRef thread_id
, tl
, trbl
, tl_tid
, trbl_tid
, val
, args
[2];
5086 thread_id
= get_thread_id(ctx
);
5088 if (opcode
== TGSI_OPCODE_DDX_FINE
)
5089 mask
= TID_MASK_LEFT
;
5090 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
5091 mask
= TID_MASK_TOP
;
5093 mask
= TID_MASK_TOP_LEFT
;
5095 tl_tid
= LLVMBuildAnd(gallivm
->builder
, thread_id
,
5096 lp_build_const_int32(gallivm
, mask
), "");
5098 /* for DDX we want to next X pixel, DDY next Y pixel. */
5099 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
5100 trbl_tid
= LLVMBuildAdd(gallivm
->builder
, tl_tid
,
5101 lp_build_const_int32(gallivm
, idx
), "");
5103 val
= LLVMBuildBitCast(gallivm
->builder
, emit_data
->args
[0], ctx
->i32
, "");
5105 if (ctx
->screen
->has_ds_bpermute
) {
5106 args
[0] = LLVMBuildMul(gallivm
->builder
, tl_tid
,
5107 lp_build_const_int32(gallivm
, 4), "");
5109 tl
= lp_build_intrinsic(gallivm
->builder
,
5110 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5111 args
, 2, LP_FUNC_ATTR_READNONE
);
5113 args
[0] = LLVMBuildMul(gallivm
->builder
, trbl_tid
,
5114 lp_build_const_int32(gallivm
, 4), "");
5115 trbl
= lp_build_intrinsic(gallivm
->builder
,
5116 "llvm.amdgcn.ds.bpermute", ctx
->i32
,
5117 args
, 2, LP_FUNC_ATTR_READNONE
);
5119 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
5121 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
5122 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
5123 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
5125 LLVMBuildStore(gallivm
->builder
, val
, store_ptr
);
5126 tl
= LLVMBuildLoad(gallivm
->builder
, load_ptr0
, "");
5127 trbl
= LLVMBuildLoad(gallivm
->builder
, load_ptr1
, "");
5130 tl
= LLVMBuildBitCast(gallivm
->builder
, tl
, ctx
->f32
, "");
5131 trbl
= LLVMBuildBitCast(gallivm
->builder
, trbl
, ctx
->f32
, "");
5133 emit_data
->output
[emit_data
->chan
] =
5134 LLVMBuildFSub(gallivm
->builder
, trbl
, tl
, "");
5138 * this takes an I,J coordinate pair,
5139 * and works out the X and Y derivatives.
5140 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
5142 static LLVMValueRef
si_llvm_emit_ddxy_interp(
5143 struct lp_build_tgsi_context
*bld_base
,
5144 LLVMValueRef interp_ij
)
5146 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5147 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5148 LLVMValueRef result
[4], a
;
5151 for (i
= 0; i
< 2; i
++) {
5152 a
= LLVMBuildExtractElement(gallivm
->builder
, interp_ij
,
5153 LLVMConstInt(ctx
->i32
, i
, 0), "");
5154 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
5155 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
5158 return lp_build_gather_values(gallivm
, result
, 4);
5161 static void interp_fetch_args(
5162 struct lp_build_tgsi_context
*bld_base
,
5163 struct lp_build_emit_data
*emit_data
)
5165 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5166 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5167 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5169 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
5170 /* offset is in second src, first two channels */
5171 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
5174 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
5177 emit_data
->arg_count
= 2;
5178 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5179 LLVMValueRef sample_position
;
5180 LLVMValueRef sample_id
;
5181 LLVMValueRef halfval
= lp_build_const_float(gallivm
, 0.5f
);
5183 /* fetch sample ID, then fetch its sample position,
5184 * and place into first two channels.
5186 sample_id
= lp_build_emit_fetch(bld_base
,
5187 emit_data
->inst
, 1, TGSI_CHAN_X
);
5188 sample_id
= LLVMBuildBitCast(gallivm
->builder
, sample_id
,
5190 sample_position
= load_sample_position(ctx
, sample_id
);
5192 emit_data
->args
[0] = LLVMBuildExtractElement(gallivm
->builder
,
5194 lp_build_const_int32(gallivm
, 0), "");
5196 emit_data
->args
[0] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[0], halfval
, "");
5197 emit_data
->args
[1] = LLVMBuildExtractElement(gallivm
->builder
,
5199 lp_build_const_int32(gallivm
, 1), "");
5200 emit_data
->args
[1] = LLVMBuildFSub(gallivm
->builder
, emit_data
->args
[1], halfval
, "");
5201 emit_data
->arg_count
= 2;
5205 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
5206 struct lp_build_tgsi_context
*bld_base
,
5207 struct lp_build_emit_data
*emit_data
)
5209 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5210 struct si_shader
*shader
= ctx
->shader
;
5211 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5212 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5213 LLVMValueRef interp_param
;
5214 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
5215 int input_index
= inst
->Src
[0].Register
.Index
;
5218 LLVMValueRef attr_number
;
5219 LLVMValueRef params
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
5220 int interp_param_idx
;
5221 unsigned interp
= shader
->selector
->info
.input_interpolate
[input_index
];
5224 assert(inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
);
5226 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5227 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
5228 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5230 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
5232 interp_param_idx
= lookup_interp_param_index(interp
, location
);
5233 if (interp_param_idx
== -1)
5235 else if (interp_param_idx
)
5236 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
5238 interp_param
= NULL
;
5240 attr_number
= lp_build_const_int32(gallivm
, input_index
);
5242 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
5243 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
5244 LLVMValueRef ij_out
[2];
5245 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
5248 * take the I then J parameters, and the DDX/Y for it, and
5249 * calculate the IJ inputs for the interpolator.
5250 * temp1 = ddx * offset/sample.x + I;
5251 * interp_param.I = ddy * offset/sample.y + temp1;
5252 * temp1 = ddx * offset/sample.x + J;
5253 * interp_param.J = ddy * offset/sample.y + temp1;
5255 for (i
= 0; i
< 2; i
++) {
5256 LLVMValueRef ix_ll
= lp_build_const_int32(gallivm
, i
);
5257 LLVMValueRef iy_ll
= lp_build_const_int32(gallivm
, i
+ 2);
5258 LLVMValueRef ddx_el
= LLVMBuildExtractElement(gallivm
->builder
,
5259 ddxy_out
, ix_ll
, "");
5260 LLVMValueRef ddy_el
= LLVMBuildExtractElement(gallivm
->builder
,
5261 ddxy_out
, iy_ll
, "");
5262 LLVMValueRef interp_el
= LLVMBuildExtractElement(gallivm
->builder
,
5263 interp_param
, ix_ll
, "");
5264 LLVMValueRef temp1
, temp2
;
5266 interp_el
= LLVMBuildBitCast(gallivm
->builder
, interp_el
,
5269 temp1
= LLVMBuildFMul(gallivm
->builder
, ddx_el
, emit_data
->args
[0], "");
5271 temp1
= LLVMBuildFAdd(gallivm
->builder
, temp1
, interp_el
, "");
5273 temp2
= LLVMBuildFMul(gallivm
->builder
, ddy_el
, emit_data
->args
[1], "");
5275 ij_out
[i
] = LLVMBuildFAdd(gallivm
->builder
, temp2
, temp1
, "");
5277 interp_param
= lp_build_gather_values(bld_base
->base
.gallivm
, ij_out
, 2);
5280 for (chan
= 0; chan
< 4; chan
++) {
5281 LLVMValueRef llvm_chan
;
5284 schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
5285 llvm_chan
= lp_build_const_int32(gallivm
, schan
);
5288 interp_param
= LLVMBuildBitCast(gallivm
->builder
,
5289 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
5290 LLVMValueRef i
= LLVMBuildExtractElement(
5291 gallivm
->builder
, interp_param
, uint
->zero
, "");
5292 LLVMValueRef j
= LLVMBuildExtractElement(
5293 gallivm
->builder
, interp_param
, uint
->one
, "");
5294 emit_data
->output
[chan
] = build_fs_interp(bld_base
,
5295 llvm_chan
, attr_number
, params
,
5298 emit_data
->output
[chan
] = build_fs_interp_mov(bld_base
,
5299 lp_build_const_int32(gallivm
, 2), /* P0 */
5300 llvm_chan
, attr_number
, params
);
5305 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
5306 struct lp_build_emit_data
*emit_data
)
5308 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5309 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
5313 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
5315 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
5316 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
5320 /* Emit one vertex from the geometry shader */
5321 static void si_llvm_emit_vertex(
5322 const struct lp_build_tgsi_action
*action
,
5323 struct lp_build_tgsi_context
*bld_base
,
5324 struct lp_build_emit_data
*emit_data
)
5326 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5327 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5328 struct si_shader
*shader
= ctx
->shader
;
5329 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5330 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5331 struct lp_build_if_state if_state
;
5332 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
5333 SI_PARAM_GS2VS_OFFSET
);
5334 LLVMValueRef gs_next_vertex
;
5335 LLVMValueRef can_emit
, kill
;
5336 LLVMValueRef args
[2];
5337 unsigned chan
, offset
;
5341 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5343 /* Write vertex attribute values to GSVS ring */
5344 gs_next_vertex
= LLVMBuildLoad(gallivm
->builder
,
5345 ctx
->gs_next_vertex
[stream
],
5348 /* If this thread has already emitted the declared maximum number of
5349 * vertices, skip the write: excessive vertex emissions are not
5350 * supposed to have any effect.
5352 * If the shader has no writes to memory, kill it instead. This skips
5353 * further memory loads and may allow LLVM to skip to the end
5356 can_emit
= LLVMBuildICmp(gallivm
->builder
, LLVMIntULT
, gs_next_vertex
,
5357 lp_build_const_int32(gallivm
,
5358 shader
->selector
->gs_max_out_vertices
), "");
5360 bool use_kill
= !info
->writes_memory
;
5362 kill
= lp_build_select(&bld_base
->base
, can_emit
,
5363 lp_build_const_float(gallivm
, 1.0f
),
5364 lp_build_const_float(gallivm
, -1.0f
));
5366 lp_build_intrinsic(gallivm
->builder
, "llvm.AMDGPU.kill",
5367 ctx
->voidt
, &kill
, 1, 0);
5369 lp_build_if(&if_state
, gallivm
, can_emit
);
5373 for (i
= 0; i
< info
->num_outputs
; i
++) {
5374 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
5376 for (chan
= 0; chan
< 4; chan
++) {
5377 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
5378 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
5381 LLVMValueRef out_val
= LLVMBuildLoad(gallivm
->builder
, out_ptr
[chan
], "");
5382 LLVMValueRef voffset
=
5383 lp_build_const_int32(gallivm
, offset
*
5384 shader
->selector
->gs_max_out_vertices
);
5387 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
5388 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
5390 out_val
= LLVMBuildBitCast(gallivm
->builder
, out_val
, ctx
->i32
, "");
5392 build_tbuffer_store(ctx
,
5393 ctx
->gsvs_ring
[stream
],
5395 voffset
, soffset
, 0,
5396 V_008F0C_BUF_DATA_FORMAT_32
,
5397 V_008F0C_BUF_NUM_FORMAT_UINT
,
5402 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
5403 lp_build_const_int32(gallivm
, 1));
5405 LLVMBuildStore(gallivm
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
5407 /* Signal vertex emission */
5408 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (stream
<< 8));
5409 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5410 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5411 ctx
->voidt
, args
, 2, 0);
5414 lp_build_endif(&if_state
);
5417 /* Cut one primitive from the geometry shader */
5418 static void si_llvm_emit_primitive(
5419 const struct lp_build_tgsi_action
*action
,
5420 struct lp_build_tgsi_context
*bld_base
,
5421 struct lp_build_emit_data
*emit_data
)
5423 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5424 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5425 LLVMValueRef args
[2];
5428 /* Signal primitive cut */
5429 stream
= si_llvm_get_stream(bld_base
, emit_data
);
5430 args
[0] = lp_build_const_int32(gallivm
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (stream
<< 8));
5431 args
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_GS_WAVE_ID
);
5432 lp_build_intrinsic(gallivm
->builder
, "llvm.SI.sendmsg",
5433 ctx
->voidt
, args
, 2, 0);
5436 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
5437 struct lp_build_tgsi_context
*bld_base
,
5438 struct lp_build_emit_data
*emit_data
)
5440 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
5441 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5443 /* SI only (thanks to a hw bug workaround):
5444 * The real barrier instruction isn’t needed, because an entire patch
5445 * always fits into a single wave.
5447 if (HAVE_LLVM
>= 0x0309 &&
5448 ctx
->screen
->b
.chip_class
== SI
&&
5449 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5450 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
5454 lp_build_intrinsic(gallivm
->builder
,
5455 HAVE_LLVM
>= 0x0309 ? "llvm.amdgcn.s.barrier"
5456 : "llvm.AMDGPU.barrier.local",
5457 ctx
->voidt
, NULL
, 0, 0);
5460 static const struct lp_build_tgsi_action tex_action
= {
5461 .fetch_args
= tex_fetch_args
,
5462 .emit
= build_tex_intrinsic
,
5465 static const struct lp_build_tgsi_action interp_action
= {
5466 .fetch_args
= interp_fetch_args
,
5467 .emit
= build_interp_intrinsic
,
5470 static void si_create_function(struct si_shader_context
*ctx
,
5472 LLVMTypeRef
*returns
, unsigned num_returns
,
5473 LLVMTypeRef
*params
, unsigned num_params
,
5478 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
5479 params
, num_params
);
5480 si_llvm_shader_type(ctx
->main_fn
, ctx
->type
);
5481 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
5483 for (i
= 0; i
<= last_sgpr
; ++i
) {
5484 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
5486 /* The combination of:
5490 * allows the optimization passes to move loads and reduces
5491 * SGPR spilling significantly.
5493 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
5494 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
5495 lp_add_attr_dereferenceable(P
, UINT64_MAX
);
5497 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
5500 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
5501 /* These were copied from some LLVM test. */
5502 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5503 "less-precise-fpmad",
5505 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5508 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5511 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
5517 static void create_meta_data(struct si_shader_context
*ctx
)
5519 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
5521 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5522 "invariant.load", 14);
5523 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5525 ctx
->uniform_md_kind
= LLVMGetMDKindIDInContext(gallivm
->context
,
5526 "amdgpu.uniform", 14);
5528 ctx
->empty_md
= LLVMMDNodeInContext(gallivm
->context
, NULL
, 0);
5531 static void declare_streamout_params(struct si_shader_context
*ctx
,
5532 struct pipe_stream_output_info
*so
,
5533 LLVMTypeRef
*params
, LLVMTypeRef i32
,
5534 unsigned *num_params
)
5538 /* Streamout SGPRs. */
5539 if (so
->num_outputs
) {
5540 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
5541 params
[ctx
->param_streamout_config
= (*num_params
)++] = i32
;
5543 ctx
->param_streamout_config
= ctx
->param_tess_offchip
;
5545 params
[ctx
->param_streamout_write_index
= (*num_params
)++] = i32
;
5547 /* A streamout buffer offset is loaded if the stride is non-zero. */
5548 for (i
= 0; i
< 4; i
++) {
5552 params
[ctx
->param_streamout_offset
[i
] = (*num_params
)++] = i32
;
5556 static unsigned llvm_get_type_size(LLVMTypeRef type
)
5558 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
5561 case LLVMIntegerTypeKind
:
5562 return LLVMGetIntTypeWidth(type
) / 8;
5563 case LLVMFloatTypeKind
:
5565 case LLVMPointerTypeKind
:
5567 case LLVMVectorTypeKind
:
5568 return LLVMGetVectorSize(type
) *
5569 llvm_get_type_size(LLVMGetElementType(type
));
5570 case LLVMArrayTypeKind
:
5571 return LLVMGetArrayLength(type
) *
5572 llvm_get_type_size(LLVMGetElementType(type
));
5579 static void declare_tess_lds(struct si_shader_context
*ctx
)
5581 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
5582 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5583 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5585 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
5586 ctx
->lds
= LLVMBuildIntToPtr(gallivm
->builder
, uint
->zero
,
5587 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
5591 static unsigned si_get_max_workgroup_size(struct si_shader
*shader
)
5593 const unsigned *properties
= shader
->selector
->info
.properties
;
5594 unsigned max_work_group_size
=
5595 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
5596 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
5597 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
5599 if (!max_work_group_size
) {
5600 /* This is a variable group size compute shader,
5601 * compile it for the maximum possible group size.
5603 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
5605 return max_work_group_size
;
5608 static void create_function(struct si_shader_context
*ctx
)
5610 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5611 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5612 struct si_shader
*shader
= ctx
->shader
;
5613 LLVMTypeRef params
[SI_NUM_PARAMS
+ SI_NUM_VERTEX_BUFFERS
], v3i32
;
5614 LLVMTypeRef returns
[16+32*4];
5615 unsigned i
, last_sgpr
, num_params
, num_return_sgprs
;
5616 unsigned num_returns
= 0;
5617 unsigned num_prolog_vgprs
= 0;
5619 v3i32
= LLVMVectorType(ctx
->i32
, 3);
5621 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
5622 params
[SI_PARAM_CONST_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_CONST_BUFFERS
);
5623 params
[SI_PARAM_SAMPLERS
] = const_array(ctx
->v8i32
, SI_NUM_SAMPLERS
);
5624 params
[SI_PARAM_IMAGES
] = const_array(ctx
->v8i32
, SI_NUM_IMAGES
);
5625 params
[SI_PARAM_SHADER_BUFFERS
] = const_array(ctx
->v4i32
, SI_NUM_SHADER_BUFFERS
);
5627 switch (ctx
->type
) {
5628 case PIPE_SHADER_VERTEX
:
5629 params
[SI_PARAM_VERTEX_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_VERTEX_BUFFERS
);
5630 params
[SI_PARAM_BASE_VERTEX
] = ctx
->i32
;
5631 params
[SI_PARAM_START_INSTANCE
] = ctx
->i32
;
5632 params
[SI_PARAM_DRAWID
] = ctx
->i32
;
5633 num_params
= SI_PARAM_DRAWID
+1;
5635 if (shader
->key
.as_es
) {
5636 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5637 } else if (shader
->key
.as_ls
) {
5638 params
[SI_PARAM_LS_OUT_LAYOUT
] = ctx
->i32
;
5639 num_params
= SI_PARAM_LS_OUT_LAYOUT
+1;
5641 if (shader
->is_gs_copy_shader
) {
5642 num_params
= SI_PARAM_RW_BUFFERS
+1;
5644 params
[SI_PARAM_VS_STATE_BITS
] = ctx
->i32
;
5645 num_params
= SI_PARAM_VS_STATE_BITS
+1;
5648 /* The locations of the other parameters are assigned dynamically. */
5649 declare_streamout_params(ctx
, &shader
->selector
->so
,
5650 params
, ctx
->i32
, &num_params
);
5653 last_sgpr
= num_params
-1;
5656 params
[ctx
->param_vertex_id
= num_params
++] = ctx
->i32
;
5657 params
[ctx
->param_rel_auto_id
= num_params
++] = ctx
->i32
;
5658 params
[ctx
->param_vs_prim_id
= num_params
++] = ctx
->i32
;
5659 params
[ctx
->param_instance_id
= num_params
++] = ctx
->i32
;
5661 if (!shader
->is_gs_copy_shader
) {
5662 /* Vertex load indices. */
5663 ctx
->param_vertex_index0
= num_params
;
5665 for (i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
5666 params
[num_params
++] = ctx
->i32
;
5668 num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
5670 /* PrimitiveID output. */
5671 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
)
5672 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5673 returns
[num_returns
++] = ctx
->f32
;
5677 case PIPE_SHADER_TESS_CTRL
:
5678 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5679 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
5680 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
5681 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
5682 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
5683 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
5684 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
5687 params
[SI_PARAM_PATCH_ID
] = ctx
->i32
;
5688 params
[SI_PARAM_REL_IDS
] = ctx
->i32
;
5689 num_params
= SI_PARAM_REL_IDS
+1;
5691 /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are
5692 * placed after the user SGPRs.
5694 for (i
= 0; i
< SI_TCS_NUM_USER_SGPR
+ 2; i
++)
5695 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
5697 for (i
= 0; i
< 3; i
++)
5698 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
5701 case PIPE_SHADER_TESS_EVAL
:
5702 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
5703 num_params
= SI_PARAM_TCS_OFFCHIP_LAYOUT
+1;
5705 if (shader
->key
.as_es
) {
5706 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5707 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5708 params
[ctx
->param_es2gs_offset
= num_params
++] = ctx
->i32
;
5710 params
[ctx
->param_tess_offchip
= num_params
++] = ctx
->i32
;
5711 declare_streamout_params(ctx
, &shader
->selector
->so
,
5712 params
, ctx
->i32
, &num_params
);
5713 params
[ctx
->param_oc_lds
= num_params
++] = ctx
->i32
;
5715 last_sgpr
= num_params
- 1;
5718 params
[ctx
->param_tes_u
= num_params
++] = ctx
->f32
;
5719 params
[ctx
->param_tes_v
= num_params
++] = ctx
->f32
;
5720 params
[ctx
->param_tes_rel_patch_id
= num_params
++] = ctx
->i32
;
5721 params
[ctx
->param_tes_patch_id
= num_params
++] = ctx
->i32
;
5723 /* PrimitiveID output. */
5724 if (!shader
->key
.as_es
)
5725 for (i
= 0; i
<= VS_EPILOG_PRIMID_LOC
; i
++)
5726 returns
[num_returns
++] = ctx
->f32
;
5729 case PIPE_SHADER_GEOMETRY
:
5730 params
[SI_PARAM_GS2VS_OFFSET
] = ctx
->i32
;
5731 params
[SI_PARAM_GS_WAVE_ID
] = ctx
->i32
;
5732 last_sgpr
= SI_PARAM_GS_WAVE_ID
;
5735 params
[SI_PARAM_VTX0_OFFSET
] = ctx
->i32
;
5736 params
[SI_PARAM_VTX1_OFFSET
] = ctx
->i32
;
5737 params
[SI_PARAM_PRIMITIVE_ID
] = ctx
->i32
;
5738 params
[SI_PARAM_VTX2_OFFSET
] = ctx
->i32
;
5739 params
[SI_PARAM_VTX3_OFFSET
] = ctx
->i32
;
5740 params
[SI_PARAM_VTX4_OFFSET
] = ctx
->i32
;
5741 params
[SI_PARAM_VTX5_OFFSET
] = ctx
->i32
;
5742 params
[SI_PARAM_GS_INSTANCE_ID
] = ctx
->i32
;
5743 num_params
= SI_PARAM_GS_INSTANCE_ID
+1;
5746 case PIPE_SHADER_FRAGMENT
:
5747 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
5748 params
[SI_PARAM_PRIM_MASK
] = ctx
->i32
;
5749 last_sgpr
= SI_PARAM_PRIM_MASK
;
5750 params
[SI_PARAM_PERSP_SAMPLE
] = ctx
->v2i32
;
5751 params
[SI_PARAM_PERSP_CENTER
] = ctx
->v2i32
;
5752 params
[SI_PARAM_PERSP_CENTROID
] = ctx
->v2i32
;
5753 params
[SI_PARAM_PERSP_PULL_MODEL
] = v3i32
;
5754 params
[SI_PARAM_LINEAR_SAMPLE
] = ctx
->v2i32
;
5755 params
[SI_PARAM_LINEAR_CENTER
] = ctx
->v2i32
;
5756 params
[SI_PARAM_LINEAR_CENTROID
] = ctx
->v2i32
;
5757 params
[SI_PARAM_LINE_STIPPLE_TEX
] = ctx
->f32
;
5758 params
[SI_PARAM_POS_X_FLOAT
] = ctx
->f32
;
5759 params
[SI_PARAM_POS_Y_FLOAT
] = ctx
->f32
;
5760 params
[SI_PARAM_POS_Z_FLOAT
] = ctx
->f32
;
5761 params
[SI_PARAM_POS_W_FLOAT
] = ctx
->f32
;
5762 params
[SI_PARAM_FRONT_FACE
] = ctx
->i32
;
5763 shader
->info
.face_vgpr_index
= 20;
5764 params
[SI_PARAM_ANCILLARY
] = ctx
->i32
;
5765 params
[SI_PARAM_SAMPLE_COVERAGE
] = ctx
->f32
;
5766 params
[SI_PARAM_POS_FIXED_PT
] = ctx
->i32
;
5767 num_params
= SI_PARAM_POS_FIXED_PT
+1;
5769 /* Color inputs from the prolog. */
5770 if (shader
->selector
->info
.colors_read
) {
5771 unsigned num_color_elements
=
5772 util_bitcount(shader
->selector
->info
.colors_read
);
5774 assert(num_params
+ num_color_elements
<= ARRAY_SIZE(params
));
5775 for (i
= 0; i
< num_color_elements
; i
++)
5776 params
[num_params
++] = ctx
->f32
;
5778 num_prolog_vgprs
+= num_color_elements
;
5781 /* Outputs for the epilog. */
5782 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
5785 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
5786 shader
->selector
->info
.writes_z
+
5787 shader
->selector
->info
.writes_stencil
+
5788 shader
->selector
->info
.writes_samplemask
+
5789 1 /* SampleMaskIn */;
5791 num_returns
= MAX2(num_returns
,
5793 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
5795 for (i
= 0; i
< num_return_sgprs
; i
++)
5796 returns
[i
] = ctx
->i32
;
5797 for (; i
< num_returns
; i
++)
5798 returns
[i
] = ctx
->f32
;
5801 case PIPE_SHADER_COMPUTE
:
5802 params
[SI_PARAM_GRID_SIZE
] = v3i32
;
5803 params
[SI_PARAM_BLOCK_SIZE
] = v3i32
;
5804 params
[SI_PARAM_BLOCK_ID
] = v3i32
;
5805 last_sgpr
= SI_PARAM_BLOCK_ID
;
5807 params
[SI_PARAM_THREAD_ID
] = v3i32
;
5808 num_params
= SI_PARAM_THREAD_ID
+ 1;
5811 assert(0 && "unimplemented shader");
5815 assert(num_params
<= ARRAY_SIZE(params
));
5817 si_create_function(ctx
, "main", returns
, num_returns
, params
,
5818 num_params
, last_sgpr
);
5820 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5821 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
5822 ctx
->separate_prolog
) {
5823 si_llvm_add_attribute(ctx
->main_fn
,
5824 "InitialPSInputAddr",
5825 S_0286D0_PERSP_SAMPLE_ENA(1) |
5826 S_0286D0_PERSP_CENTER_ENA(1) |
5827 S_0286D0_PERSP_CENTROID_ENA(1) |
5828 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5829 S_0286D0_LINEAR_CENTER_ENA(1) |
5830 S_0286D0_LINEAR_CENTROID_ENA(1) |
5831 S_0286D0_FRONT_FACE_ENA(1) |
5832 S_0286D0_POS_FIXED_PT_ENA(1));
5833 } else if (ctx
->type
== PIPE_SHADER_COMPUTE
) {
5834 si_llvm_add_attribute(ctx
->main_fn
,
5835 "amdgpu-max-work-group-size",
5836 si_get_max_workgroup_size(shader
));
5839 shader
->info
.num_input_sgprs
= 0;
5840 shader
->info
.num_input_vgprs
= 0;
5842 for (i
= 0; i
<= last_sgpr
; ++i
)
5843 shader
->info
.num_input_sgprs
+= llvm_get_type_size(params
[i
]) / 4;
5845 for (; i
< num_params
; ++i
)
5846 shader
->info
.num_input_vgprs
+= llvm_get_type_size(params
[i
]) / 4;
5848 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5849 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5851 if (!ctx
->screen
->has_ds_bpermute
&&
5853 (bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX
] > 0 ||
5854 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY
] > 0 ||
5855 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDX_FINE
] > 0 ||
5856 bld_base
->info
->opcode_count
[TGSI_OPCODE_DDY_FINE
] > 0 ||
5857 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_OFFSET
] > 0 ||
5858 bld_base
->info
->opcode_count
[TGSI_OPCODE_INTERP_SAMPLE
] > 0))
5860 LLVMAddGlobalInAddressSpace(gallivm
->module
,
5861 LLVMArrayType(ctx
->i32
, 64),
5865 if ((ctx
->type
== PIPE_SHADER_VERTEX
&& shader
->key
.as_ls
) ||
5866 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5867 ctx
->type
== PIPE_SHADER_TESS_EVAL
)
5868 declare_tess_lds(ctx
);
5872 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5875 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5877 struct gallivm_state
*gallivm
= ctx
->bld_base
.base
.gallivm
;
5878 LLVMBuilderRef builder
= gallivm
->builder
;
5880 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5881 SI_PARAM_RW_BUFFERS
);
5883 if ((ctx
->type
== PIPE_SHADER_VERTEX
&&
5884 ctx
->shader
->key
.as_es
) ||
5885 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
5886 ctx
->shader
->key
.as_es
) ||
5887 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5889 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5891 LLVMValueRef offset
= lp_build_const_int32(gallivm
, ring
);
5894 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5897 if (ctx
->shader
->is_gs_copy_shader
) {
5898 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_RING_GSVS
);
5901 build_indexed_load_const(ctx
, buf_ptr
, offset
);
5902 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5903 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5904 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
5905 LLVMValueRef offset
= lp_build_const_int32(gallivm
, SI_RING_GSVS
);
5906 LLVMValueRef base_ring
;
5908 base_ring
= build_indexed_load_const(ctx
, buf_ptr
, offset
);
5910 /* The conceptual layout of the GSVS ring is
5911 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5912 * but the real memory layout is swizzled across
5914 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5916 * Override the buffer descriptor accordingly.
5918 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5919 uint64_t stream_offset
= 0;
5921 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5922 unsigned num_components
;
5924 unsigned num_records
;
5925 LLVMValueRef ring
, tmp
;
5927 num_components
= sel
->info
.num_stream_output_components
[stream
];
5928 if (!num_components
)
5931 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5933 /* Limit on the stride field for <= CIK. */
5934 assert(stride
< (1 << 14));
5938 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5939 tmp
= LLVMBuildExtractElement(builder
, ring
, uint
->zero
, "");
5940 tmp
= LLVMBuildAdd(builder
, tmp
,
5941 LLVMConstInt(ctx
->i64
,
5942 stream_offset
, 0), "");
5943 stream_offset
+= stride
* 64;
5945 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, uint
->zero
, "");
5946 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5947 tmp
= LLVMBuildExtractElement(builder
, ring
, uint
->one
, "");
5948 tmp
= LLVMBuildOr(builder
, tmp
,
5949 LLVMConstInt(ctx
->i32
,
5950 S_008F04_STRIDE(stride
) |
5951 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5952 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, uint
->one
, "");
5953 ring
= LLVMBuildInsertElement(builder
, ring
,
5954 LLVMConstInt(ctx
->i32
, num_records
, 0),
5955 LLVMConstInt(ctx
->i32
, 2, 0), "");
5956 ring
= LLVMBuildInsertElement(builder
, ring
,
5957 LLVMConstInt(ctx
->i32
,
5958 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5959 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5960 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5961 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5962 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5963 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5964 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5965 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5966 S_008F0C_ADD_TID_ENABLE(1),
5968 LLVMConstInt(ctx
->i32
, 3, 0), "");
5969 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v16i8
, "");
5971 ctx
->gsvs_ring
[stream
] = ring
;
5976 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5977 LLVMValueRef param_rw_buffers
,
5978 unsigned param_pos_fixed_pt
)
5980 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5981 struct gallivm_state
*gallivm
= bld_base
->base
.gallivm
;
5982 LLVMBuilderRef builder
= gallivm
->builder
;
5983 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5985 /* Use the fixed-point gl_FragCoord input.
5986 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5987 * per coordinate to get the repeating effect.
5989 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5990 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5992 /* Load the buffer descriptor. */
5993 slot
= lp_build_const_int32(gallivm
, SI_PS_CONST_POLY_STIPPLE
);
5994 desc
= build_indexed_load_const(ctx
, param_rw_buffers
, slot
);
5996 /* The stipple pattern is 32x32, each row has 32 bits. */
5997 offset
= LLVMBuildMul(builder
, address
[1],
5998 LLVMConstInt(ctx
->i32
, 4, 0), "");
5999 row
= buffer_load_const(ctx
, desc
, offset
);
6000 row
= LLVMBuildBitCast(builder
, row
, ctx
->i32
, "");
6001 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
6002 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
6004 /* The intrinsic kills the thread if arg < 0. */
6005 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
6006 LLVMConstReal(ctx
->f32
, -1), "");
6007 lp_build_intrinsic(builder
, "llvm.AMDGPU.kill", ctx
->voidt
, &bit
, 1, 0);
6010 void si_shader_binary_read_config(struct radeon_shader_binary
*binary
,
6011 struct si_shader_config
*conf
,
6012 unsigned symbol_offset
)
6015 const unsigned char *config
=
6016 radeon_shader_binary_config_start(binary
, symbol_offset
);
6017 bool really_needs_scratch
= false;
6019 /* LLVM adds SGPR spills to the scratch size.
6020 * Find out if we really need the scratch buffer.
6022 for (i
= 0; i
< binary
->reloc_count
; i
++) {
6023 const struct radeon_shader_reloc
*reloc
= &binary
->relocs
[i
];
6025 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
6026 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6027 really_needs_scratch
= true;
6032 /* XXX: We may be able to emit some of these values directly rather than
6033 * extracting fields to be emitted later.
6036 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
6037 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
6038 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
6040 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
6041 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
6042 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
6043 case R_00B848_COMPUTE_PGM_RSRC1
:
6044 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
6045 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
6046 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
6047 conf
->rsrc1
= value
;
6049 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
6050 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
6052 case R_00B84C_COMPUTE_PGM_RSRC2
:
6053 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
6054 conf
->rsrc2
= value
;
6056 case R_0286CC_SPI_PS_INPUT_ENA
:
6057 conf
->spi_ps_input_ena
= value
;
6059 case R_0286D0_SPI_PS_INPUT_ADDR
:
6060 conf
->spi_ps_input_addr
= value
;
6062 case R_0286E8_SPI_TMPRING_SIZE
:
6063 case R_00B860_COMPUTE_TMPRING_SIZE
:
6064 /* WAVESIZE is in units of 256 dwords. */
6065 if (really_needs_scratch
)
6066 conf
->scratch_bytes_per_wave
=
6067 G_00B860_WAVESIZE(value
) * 256 * 4;
6069 case 0x4: /* SPILLED_SGPRS */
6070 conf
->spilled_sgprs
= value
;
6072 case 0x8: /* SPILLED_VGPRS */
6073 conf
->spilled_vgprs
= value
;
6077 static bool printed
;
6080 fprintf(stderr
, "Warning: LLVM emitted unknown "
6081 "config register: 0x%x\n", reg
);
6089 if (!conf
->spi_ps_input_addr
)
6090 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
6093 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
6094 struct si_shader
*shader
,
6095 struct si_shader_config
*config
,
6096 uint64_t scratch_va
)
6099 uint32_t scratch_rsrc_dword0
= scratch_va
;
6100 uint32_t scratch_rsrc_dword1
=
6101 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
6103 /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE
6106 if (HAVE_LLVM
>= 0x0309)
6107 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
6109 scratch_rsrc_dword1
|=
6110 S_008F04_STRIDE(config
->scratch_bytes_per_wave
/ 64);
6112 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
6113 const struct radeon_shader_reloc
*reloc
=
6114 &shader
->binary
.relocs
[i
];
6115 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
6116 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6117 &scratch_rsrc_dword0
, 4);
6118 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
6119 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
6120 &scratch_rsrc_dword1
, 4);
6125 static unsigned si_get_shader_binary_size(struct si_shader
*shader
)
6127 unsigned size
= shader
->binary
.code_size
;
6130 size
+= shader
->prolog
->binary
.code_size
;
6132 size
+= shader
->epilog
->binary
.code_size
;
6136 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
6138 const struct radeon_shader_binary
*prolog
=
6139 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
6140 const struct radeon_shader_binary
*epilog
=
6141 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
6142 const struct radeon_shader_binary
*mainb
= &shader
->binary
;
6143 unsigned bo_size
= si_get_shader_binary_size(shader
) +
6144 (!epilog
? mainb
->rodata_size
: 0);
6147 assert(!prolog
|| !prolog
->rodata_size
);
6148 assert((!prolog
&& !epilog
) || !mainb
->rodata_size
);
6149 assert(!epilog
|| !epilog
->rodata_size
);
6151 r600_resource_reference(&shader
->bo
, NULL
);
6152 shader
->bo
= (struct r600_resource
*)
6153 pipe_buffer_create(&sscreen
->b
.b
, 0,
6154 PIPE_USAGE_IMMUTABLE
, bo_size
);
6159 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
6160 PIPE_TRANSFER_READ_WRITE
);
6163 util_memcpy_cpu_to_le32(ptr
, prolog
->code
, prolog
->code_size
);
6164 ptr
+= prolog
->code_size
;
6167 util_memcpy_cpu_to_le32(ptr
, mainb
->code
, mainb
->code_size
);
6168 ptr
+= mainb
->code_size
;
6171 util_memcpy_cpu_to_le32(ptr
, epilog
->code
, epilog
->code_size
);
6172 else if (mainb
->rodata_size
> 0)
6173 util_memcpy_cpu_to_le32(ptr
, mainb
->rodata
, mainb
->rodata_size
);
6175 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
6179 static void si_shader_dump_disassembly(const struct radeon_shader_binary
*binary
,
6180 struct pipe_debug_callback
*debug
,
6181 const char *name
, FILE *file
)
6186 if (binary
->disasm_string
) {
6187 fprintf(file
, "Shader %s disassembly:\n", name
);
6188 fprintf(file
, "%s", binary
->disasm_string
);
6190 if (debug
&& debug
->debug_message
) {
6191 /* Very long debug messages are cut off, so send the
6192 * disassembly one line at a time. This causes more
6193 * overhead, but on the plus side it simplifies
6194 * parsing of resulting logs.
6196 pipe_debug_message(debug
, SHADER_INFO
,
6197 "Shader Disassembly Begin");
6199 line
= binary
->disasm_string
;
6201 p
= util_strchrnul(line
, '\n');
6205 pipe_debug_message(debug
, SHADER_INFO
,
6206 "%.*s", count
, line
);
6214 pipe_debug_message(debug
, SHADER_INFO
,
6215 "Shader Disassembly End");
6218 fprintf(file
, "Shader %s binary:\n", name
);
6219 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
6220 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
6221 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
6222 binary
->code
[i
+ 1], binary
->code
[i
]);
6227 static void si_shader_dump_stats(struct si_screen
*sscreen
,
6228 struct si_shader
*shader
,
6229 struct pipe_debug_callback
*debug
,
6232 bool check_debug_option
)
6234 struct si_shader_config
*conf
= &shader
->config
;
6235 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
6236 unsigned code_size
= si_get_shader_binary_size(shader
);
6237 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
6238 unsigned lds_per_wave
= 0;
6239 unsigned max_simd_waves
= 10;
6241 /* Compute LDS usage for PS. */
6242 switch (processor
) {
6243 case PIPE_SHADER_FRAGMENT
:
6244 /* The minimum usage per wave is (num_inputs * 48). The maximum
6245 * usage is (num_inputs * 48 * 16).
6246 * We can get anything in between and it varies between waves.
6248 * The 48 bytes per input for a single primitive is equal to
6249 * 4 bytes/component * 4 components/input * 3 points.
6251 * Other stages don't know the size at compile time or don't
6252 * allocate LDS per wave, but instead they do it per thread group.
6254 lds_per_wave
= conf
->lds_size
* lds_increment
+
6255 align(num_inputs
* 48, lds_increment
);
6257 case PIPE_SHADER_COMPUTE
:
6258 if (shader
->selector
) {
6259 unsigned max_workgroup_size
=
6260 si_get_max_workgroup_size(shader
);
6261 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
6262 DIV_ROUND_UP(max_workgroup_size
, 64);
6267 /* Compute the per-SIMD wave counts. */
6268 if (conf
->num_sgprs
) {
6269 if (sscreen
->b
.chip_class
>= VI
)
6270 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
6272 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
6275 if (conf
->num_vgprs
)
6276 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
6278 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
6279 * 16KB makes some SIMDs unoccupied). */
6281 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
6283 if (!check_debug_option
||
6284 r600_can_dump_shader(&sscreen
->b
, processor
)) {
6285 if (processor
== PIPE_SHADER_FRAGMENT
) {
6286 fprintf(file
, "*** SHADER CONFIG ***\n"
6287 "SPI_PS_INPUT_ADDR = 0x%04x\n"
6288 "SPI_PS_INPUT_ENA = 0x%04x\n",
6289 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
6292 fprintf(file
, "*** SHADER STATS ***\n"
6295 "Spilled SGPRs: %d\n"
6296 "Spilled VGPRs: %d\n"
6297 "Private memory VGPRs: %d\n"
6298 "Code Size: %d bytes\n"
6300 "Scratch: %d bytes per wave\n"
6302 "********************\n\n\n",
6303 conf
->num_sgprs
, conf
->num_vgprs
,
6304 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
6305 conf
->private_mem_vgprs
, code_size
,
6306 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6310 pipe_debug_message(debug
, SHADER_INFO
,
6311 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
6312 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
6313 "Spilled VGPRs: %d PrivMem VGPRs: %d",
6314 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
6315 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
6316 max_simd_waves
, conf
->spilled_sgprs
,
6317 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
6320 static const char *si_get_shader_name(struct si_shader
*shader
,
6323 switch (processor
) {
6324 case PIPE_SHADER_VERTEX
:
6325 if (shader
->key
.as_es
)
6326 return "Vertex Shader as ES";
6327 else if (shader
->key
.as_ls
)
6328 return "Vertex Shader as LS";
6330 return "Vertex Shader as VS";
6331 case PIPE_SHADER_TESS_CTRL
:
6332 return "Tessellation Control Shader";
6333 case PIPE_SHADER_TESS_EVAL
:
6334 if (shader
->key
.as_es
)
6335 return "Tessellation Evaluation Shader as ES";
6337 return "Tessellation Evaluation Shader as VS";
6338 case PIPE_SHADER_GEOMETRY
:
6339 if (shader
->is_gs_copy_shader
)
6340 return "GS Copy Shader as VS";
6342 return "Geometry Shader";
6343 case PIPE_SHADER_FRAGMENT
:
6344 return "Pixel Shader";
6345 case PIPE_SHADER_COMPUTE
:
6346 return "Compute Shader";
6348 return "Unknown Shader";
6352 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
6353 struct pipe_debug_callback
*debug
, unsigned processor
,
6354 FILE *file
, bool check_debug_option
)
6356 if (!check_debug_option
||
6357 r600_can_dump_shader(&sscreen
->b
, processor
))
6358 si_dump_shader_key(processor
, &shader
->key
, file
);
6360 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
6361 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
6362 si_get_shader_name(shader
, processor
));
6363 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
6366 if (!check_debug_option
||
6367 (r600_can_dump_shader(&sscreen
->b
, processor
) &&
6368 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
6369 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
6372 si_shader_dump_disassembly(&shader
->prolog
->binary
,
6373 debug
, "prolog", file
);
6375 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
6378 si_shader_dump_disassembly(&shader
->epilog
->binary
,
6379 debug
, "epilog", file
);
6380 fprintf(file
, "\n");
6383 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
6384 check_debug_option
);
6387 int si_compile_llvm(struct si_screen
*sscreen
,
6388 struct radeon_shader_binary
*binary
,
6389 struct si_shader_config
*conf
,
6390 LLVMTargetMachineRef tm
,
6392 struct pipe_debug_callback
*debug
,
6397 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
6399 if (r600_can_dump_shader(&sscreen
->b
, processor
)) {
6400 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
6402 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
6403 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
6404 LLVMDumpModule(mod
);
6405 fprintf(stderr
, "\n");
6409 if (sscreen
->record_llvm_ir
) {
6410 char *ir
= LLVMPrintModuleToString(mod
);
6411 binary
->llvm_ir_string
= strdup(ir
);
6412 LLVMDisposeMessage(ir
);
6415 if (!si_replace_shader(count
, binary
)) {
6416 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
6421 si_shader_binary_read_config(binary
, conf
, 0);
6423 /* Enable 64-bit and 16-bit denormals, because there is no performance
6426 * If denormals are enabled, all floating-point output modifiers are
6429 * Don't enable denormals for 32-bit floats, because:
6430 * - Floating-point output modifiers would be ignored by the hw.
6431 * - Some opcodes don't support denormals, such as v_mad_f32. We would
6432 * have to stop using those.
6433 * - SI & CI would be very slow.
6435 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
6437 FREE(binary
->config
);
6438 FREE(binary
->global_symbol_offsets
);
6439 binary
->config
= NULL
;
6440 binary
->global_symbol_offsets
= NULL
;
6442 /* Some shaders can't have rodata because their binaries can be
6445 if (binary
->rodata_size
&&
6446 (processor
== PIPE_SHADER_VERTEX
||
6447 processor
== PIPE_SHADER_TESS_CTRL
||
6448 processor
== PIPE_SHADER_TESS_EVAL
||
6449 processor
== PIPE_SHADER_FRAGMENT
)) {
6450 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
6457 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
6459 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6460 LLVMBuildRetVoid(ctx
->gallivm
.builder
);
6462 LLVMBuildRet(ctx
->gallivm
.builder
, ret
);
6465 /* Generate code for the hardware VS shader stage to go with a geometry shader */
6467 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
6468 LLVMTargetMachineRef tm
,
6469 struct si_shader_selector
*gs_selector
,
6470 struct pipe_debug_callback
*debug
)
6472 struct si_shader_context ctx
;
6473 struct si_shader
*shader
;
6474 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6475 LLVMBuilderRef builder
;
6476 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
6477 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
6478 struct si_shader_output_values
*outputs
;
6479 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
6480 LLVMValueRef args
[9];
6483 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
6488 shader
= CALLOC_STRUCT(si_shader
);
6495 shader
->selector
= gs_selector
;
6496 shader
->is_gs_copy_shader
= true;
6498 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
6499 ctx
.type
= PIPE_SHADER_VERTEX
;
6501 builder
= gallivm
->builder
;
6503 create_meta_data(&ctx
);
6504 create_function(&ctx
);
6505 preload_ring_buffers(&ctx
);
6507 args
[0] = ctx
.gsvs_ring
[0];
6508 args
[1] = lp_build_mul_imm(uint
,
6509 LLVMGetParam(ctx
.main_fn
,
6510 ctx
.param_vertex_id
),
6512 args
[3] = uint
->zero
;
6513 args
[4] = uint
->one
; /* OFFEN */
6514 args
[5] = uint
->zero
; /* IDXEN */
6515 args
[6] = uint
->one
; /* GLC */
6516 args
[7] = uint
->one
; /* SLC */
6517 args
[8] = uint
->zero
; /* TFE */
6519 /* Fetch the vertex stream ID.*/
6520 LLVMValueRef stream_id
;
6522 if (gs_selector
->so
.num_outputs
)
6523 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
6525 stream_id
= uint
->zero
;
6527 /* Fill in output information. */
6528 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6529 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
6530 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
6532 for (int chan
= 0; chan
< 4; chan
++) {
6533 outputs
[i
].vertex_stream
[chan
] =
6534 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
6538 LLVMBasicBlockRef end_bb
;
6539 LLVMValueRef switch_inst
;
6541 end_bb
= LLVMAppendBasicBlockInContext(gallivm
->context
, ctx
.main_fn
, "end");
6542 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
6544 for (int stream
= 0; stream
< 4; stream
++) {
6545 LLVMBasicBlockRef bb
;
6548 if (!gsinfo
->num_stream_output_components
[stream
])
6551 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
6554 bb
= LLVMInsertBasicBlockInContext(gallivm
->context
, end_bb
, "out");
6555 LLVMAddCase(switch_inst
, lp_build_const_int32(gallivm
, stream
), bb
);
6556 LLVMPositionBuilderAtEnd(builder
, bb
);
6558 /* Fetch vertex data from GSVS ring */
6560 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
6561 for (unsigned chan
= 0; chan
< 4; chan
++) {
6562 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
6563 outputs
[i
].vertex_stream
[chan
] != stream
) {
6564 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
6568 args
[2] = lp_build_const_int32(
6570 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4);
6573 outputs
[i
].values
[chan
] =
6574 LLVMBuildBitCast(gallivm
->builder
,
6575 lp_build_intrinsic(gallivm
->builder
,
6576 "llvm.SI.buffer.load.dword.i32.i32",
6578 LP_FUNC_ATTR_READONLY
),
6583 /* Streamout and exports. */
6584 if (gs_selector
->so
.num_outputs
) {
6585 si_llvm_emit_streamout(&ctx
, outputs
,
6586 gsinfo
->num_outputs
,
6591 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
6593 LLVMBuildBr(builder
, end_bb
);
6596 LLVMPositionBuilderAtEnd(builder
, end_bb
);
6598 LLVMBuildRetVoid(gallivm
->builder
);
6600 /* Dump LLVM IR before any optimization passes */
6601 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
6602 r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6603 LLVMDumpModule(bld_base
->base
.gallivm
->module
);
6605 si_llvm_finalize_module(&ctx
,
6606 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_GEOMETRY
));
6608 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
6609 &ctx
.shader
->config
, ctx
.tm
,
6610 bld_base
->base
.gallivm
->module
,
6611 debug
, PIPE_SHADER_GEOMETRY
,
6614 if (r600_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
6615 fprintf(stderr
, "GS Copy Shader:\n");
6616 si_shader_dump(sscreen
, ctx
.shader
, debug
,
6617 PIPE_SHADER_GEOMETRY
, stderr
, true);
6618 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
6621 si_llvm_dispose(&ctx
);
6632 static void si_dump_shader_key(unsigned shader
, struct si_shader_key
*key
,
6637 fprintf(f
, "SHADER KEY\n");
6640 case PIPE_SHADER_VERTEX
:
6641 fprintf(f
, " part.vs.prolog.instance_divisors = {");
6642 for (i
= 0; i
< ARRAY_SIZE(key
->part
.vs
.prolog
.instance_divisors
); i
++)
6643 fprintf(f
, !i
? "%u" : ", %u",
6644 key
->part
.vs
.prolog
.instance_divisors
[i
]);
6646 fprintf(f
, " part.vs.epilog.export_prim_id = %u\n", key
->part
.vs
.epilog
.export_prim_id
);
6647 fprintf(f
, " as_es = %u\n", key
->as_es
);
6648 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
6649 fprintf(f
, " mono.vs.fix_fetch = 0x%"PRIx64
"\n", key
->mono
.vs
.fix_fetch
);
6652 case PIPE_SHADER_TESS_CTRL
:
6653 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
6654 fprintf(f
, " mono.tcs.inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.tcs
.inputs_to_copy
);
6657 case PIPE_SHADER_TESS_EVAL
:
6658 fprintf(f
, " part.tes.epilog.export_prim_id = %u\n", key
->part
.tes
.epilog
.export_prim_id
);
6659 fprintf(f
, " as_es = %u\n", key
->as_es
);
6662 case PIPE_SHADER_GEOMETRY
:
6663 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
6666 case PIPE_SHADER_COMPUTE
:
6669 case PIPE_SHADER_FRAGMENT
:
6670 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
6671 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
6672 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
6673 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
6674 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
6675 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
6676 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
6677 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
6678 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
6679 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
6680 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
6681 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
6682 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
6683 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
6684 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
6685 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
6692 if ((shader
== PIPE_SHADER_GEOMETRY
||
6693 shader
== PIPE_SHADER_TESS_EVAL
||
6694 shader
== PIPE_SHADER_VERTEX
) &&
6695 !key
->as_es
&& !key
->as_ls
) {
6696 fprintf(f
, " opt.hw_vs.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.hw_vs
.kill_outputs
);
6697 fprintf(f
, " opt.hw_vs.kill_outputs2 = 0x%x\n", key
->opt
.hw_vs
.kill_outputs2
);
6698 fprintf(f
, " opt.hw_vs.clip_disable = %u\n", key
->opt
.hw_vs
.clip_disable
);
6702 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6703 struct si_screen
*sscreen
,
6704 struct si_shader
*shader
,
6705 LLVMTargetMachineRef tm
)
6707 struct lp_build_tgsi_context
*bld_base
;
6708 struct lp_build_tgsi_action tmpl
= {};
6710 si_llvm_context_init(ctx
, sscreen
, shader
, tm
,
6711 (shader
&& shader
->selector
) ? &shader
->selector
->info
: NULL
,
6712 (shader
&& shader
->selector
) ? shader
->selector
->tokens
: NULL
);
6714 bld_base
= &ctx
->bld_base
;
6715 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6717 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
6718 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
6719 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
6721 bld_base
->op_actions
[TGSI_OPCODE_TEX
] = tex_action
;
6722 bld_base
->op_actions
[TGSI_OPCODE_TEX2
] = tex_action
;
6723 bld_base
->op_actions
[TGSI_OPCODE_TXB
] = tex_action
;
6724 bld_base
->op_actions
[TGSI_OPCODE_TXB2
] = tex_action
;
6725 bld_base
->op_actions
[TGSI_OPCODE_TXD
] = tex_action
;
6726 bld_base
->op_actions
[TGSI_OPCODE_TXF
] = tex_action
;
6727 bld_base
->op_actions
[TGSI_OPCODE_TXL
] = tex_action
;
6728 bld_base
->op_actions
[TGSI_OPCODE_TXL2
] = tex_action
;
6729 bld_base
->op_actions
[TGSI_OPCODE_TXP
] = tex_action
;
6730 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].fetch_args
= txq_fetch_args
;
6731 bld_base
->op_actions
[TGSI_OPCODE_TXQ
].emit
= txq_emit
;
6732 bld_base
->op_actions
[TGSI_OPCODE_TG4
] = tex_action
;
6733 bld_base
->op_actions
[TGSI_OPCODE_LODQ
] = tex_action
;
6734 bld_base
->op_actions
[TGSI_OPCODE_TXQS
].emit
= si_llvm_emit_txqs
;
6736 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].fetch_args
= load_fetch_args
;
6737 bld_base
->op_actions
[TGSI_OPCODE_LOAD
].emit
= load_emit
;
6738 bld_base
->op_actions
[TGSI_OPCODE_STORE
].fetch_args
= store_fetch_args
;
6739 bld_base
->op_actions
[TGSI_OPCODE_STORE
].emit
= store_emit
;
6740 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].fetch_args
= resq_fetch_args
;
6741 bld_base
->op_actions
[TGSI_OPCODE_RESQ
].emit
= resq_emit
;
6743 tmpl
.fetch_args
= atomic_fetch_args
;
6744 tmpl
.emit
= atomic_emit
;
6745 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
] = tmpl
;
6746 bld_base
->op_actions
[TGSI_OPCODE_ATOMUADD
].intr_name
= "add";
6747 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
] = tmpl
;
6748 bld_base
->op_actions
[TGSI_OPCODE_ATOMXCHG
].intr_name
= "swap";
6749 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
] = tmpl
;
6750 bld_base
->op_actions
[TGSI_OPCODE_ATOMCAS
].intr_name
= "cmpswap";
6751 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
] = tmpl
;
6752 bld_base
->op_actions
[TGSI_OPCODE_ATOMAND
].intr_name
= "and";
6753 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
] = tmpl
;
6754 bld_base
->op_actions
[TGSI_OPCODE_ATOMOR
].intr_name
= "or";
6755 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
] = tmpl
;
6756 bld_base
->op_actions
[TGSI_OPCODE_ATOMXOR
].intr_name
= "xor";
6757 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
] = tmpl
;
6758 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMIN
].intr_name
= "umin";
6759 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
] = tmpl
;
6760 bld_base
->op_actions
[TGSI_OPCODE_ATOMUMAX
].intr_name
= "umax";
6761 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
] = tmpl
;
6762 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMIN
].intr_name
= "smin";
6763 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
] = tmpl
;
6764 bld_base
->op_actions
[TGSI_OPCODE_ATOMIMAX
].intr_name
= "smax";
6766 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6768 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6769 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6770 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6771 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6773 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
6774 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
6775 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6778 /* Return true if the PARAM export has been eliminated. */
6779 static bool si_eliminate_const_output(struct si_shader_context
*ctx
,
6780 LLVMValueRef inst
, unsigned offset
)
6782 struct si_shader
*shader
= ctx
->shader
;
6783 unsigned num_outputs
= shader
->selector
->info
.num_outputs
;
6784 unsigned i
, default_val
; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
6785 bool is_zero
[4] = {}, is_one
[4] = {};
6787 for (i
= 0; i
< 4; i
++) {
6788 LLVMBool loses_info
;
6789 LLVMValueRef p
= LLVMGetOperand(inst
, 5 + i
);
6791 /* It's a constant expression. Undef outputs are eliminated too. */
6792 if (LLVMIsUndef(p
)) {
6795 } else if (LLVMIsAConstantFP(p
)) {
6796 double a
= LLVMConstRealGetDouble(p
, &loses_info
);
6803 return false; /* other constant */
6808 /* Only certain combinations of 0 and 1 can be eliminated. */
6809 if (is_zero
[0] && is_zero
[1] && is_zero
[2])
6810 default_val
= is_zero
[3] ? 0 : 1;
6811 else if (is_one
[0] && is_one
[1] && is_one
[2])
6812 default_val
= is_zero
[3] ? 2 : 3;
6816 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
6817 LLVMInstructionEraseFromParent(inst
);
6819 /* Change OFFSET to DEFAULT_VAL. */
6820 for (i
= 0; i
< num_outputs
; i
++) {
6821 if (shader
->info
.vs_output_param_offset
[i
] == offset
) {
6822 shader
->info
.vs_output_param_offset
[i
] =
6823 EXP_PARAM_DEFAULT_VAL_0000
+ default_val
;
6830 struct si_vs_exports
{
6832 unsigned offset
[SI_MAX_VS_OUTPUTS
];
6833 LLVMValueRef inst
[SI_MAX_VS_OUTPUTS
];
6836 static void si_eliminate_const_vs_outputs(struct si_shader_context
*ctx
)
6838 struct si_shader
*shader
= ctx
->shader
;
6839 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6840 LLVMBasicBlockRef bb
;
6841 struct si_vs_exports exports
;
6842 bool removed_any
= false;
6846 if (ctx
->type
== PIPE_SHADER_FRAGMENT
||
6847 ctx
->type
== PIPE_SHADER_COMPUTE
||
6848 shader
->key
.as_es
||
6852 /* Process all LLVM instructions. */
6853 bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6855 LLVMValueRef inst
= LLVMGetFirstInstruction(bb
);
6858 LLVMValueRef cur
= inst
;
6859 inst
= LLVMGetNextInstruction(inst
);
6861 if (LLVMGetInstructionOpcode(cur
) != LLVMCall
)
6864 LLVMValueRef callee
= lp_get_called_value(cur
);
6866 if (!lp_is_function(callee
))
6869 const char *name
= LLVMGetValueName(callee
);
6870 unsigned num_args
= LLVMCountParams(callee
);
6872 /* Check if this is an export instruction. */
6873 if (num_args
!= 9 || strcmp(name
, "llvm.SI.export"))
6876 LLVMValueRef arg
= LLVMGetOperand(cur
, 3);
6877 unsigned target
= LLVMConstIntGetZExtValue(arg
);
6879 if (target
< V_008DFC_SQ_EXP_PARAM
)
6882 target
-= V_008DFC_SQ_EXP_PARAM
;
6884 /* Eliminate constant value PARAM exports. */
6885 if (si_eliminate_const_output(ctx
, cur
, target
)) {
6888 exports
.offset
[exports
.num
] = target
;
6889 exports
.inst
[exports
.num
] = cur
;
6893 bb
= LLVMGetNextBasicBlock(bb
);
6896 /* Remove holes in export memory due to removed PARAM exports.
6897 * This is done by renumbering all PARAM exports.
6900 ubyte current_offset
[SI_MAX_VS_OUTPUTS
];
6901 unsigned new_count
= 0;
6904 /* Make a copy of the offsets. We need the old version while
6905 * we are modifying some of them. */
6906 assert(sizeof(current_offset
) ==
6907 sizeof(shader
->info
.vs_output_param_offset
));
6908 memcpy(current_offset
, shader
->info
.vs_output_param_offset
,
6909 sizeof(current_offset
));
6911 for (i
= 0; i
< exports
.num
; i
++) {
6912 unsigned offset
= exports
.offset
[i
];
6914 for (out
= 0; out
< info
->num_outputs
; out
++) {
6915 if (current_offset
[out
] != offset
)
6918 LLVMSetOperand(exports
.inst
[i
], 3,
6919 LLVMConstInt(ctx
->i32
,
6920 V_008DFC_SQ_EXP_PARAM
+ new_count
, 0));
6921 shader
->info
.vs_output_param_offset
[out
] = new_count
;
6926 shader
->info
.nr_param_exports
= new_count
;
6930 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
6932 ctx
->shader
->config
.private_mem_vgprs
= 0;
6934 /* Process all LLVM instructions. */
6935 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
6937 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
6940 LLVMValueRef inst
= next
;
6941 next
= LLVMGetNextInstruction(next
);
6943 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
6946 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
6947 /* No idea why LLVM aligns allocas to 4 elements. */
6948 unsigned alignment
= LLVMGetAlignment(inst
);
6949 unsigned dw_size
= align(llvm_get_type_size(type
) / 4, alignment
);
6950 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
6952 bb
= LLVMGetNextBasicBlock(bb
);
6956 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6957 struct si_shader
*shader
)
6959 struct si_shader_selector
*sel
= shader
->selector
;
6960 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6962 switch (ctx
->type
) {
6963 case PIPE_SHADER_VERTEX
:
6964 ctx
->load_input
= declare_input_vs
;
6965 if (shader
->key
.as_ls
)
6966 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
6967 else if (shader
->key
.as_es
)
6968 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6970 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6972 case PIPE_SHADER_TESS_CTRL
:
6973 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6974 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6975 bld_base
->emit_store
= store_output_tcs
;
6976 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
6978 case PIPE_SHADER_TESS_EVAL
:
6979 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6980 if (shader
->key
.as_es
)
6981 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
6983 bld_base
->emit_epilogue
= si_llvm_emit_vs_epilogue
;
6985 case PIPE_SHADER_GEOMETRY
:
6986 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6987 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
6989 case PIPE_SHADER_FRAGMENT
:
6990 ctx
->load_input
= declare_input_fs
;
6991 bld_base
->emit_epilogue
= si_llvm_return_fs_outputs
;
6993 case PIPE_SHADER_COMPUTE
:
6994 ctx
->declare_memory_region
= declare_compute_memory
;
6997 assert(!"Unsupported shader type");
7001 create_meta_data(ctx
);
7002 create_function(ctx
);
7003 preload_ring_buffers(ctx
);
7005 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
7007 for (i
= 0; i
< 4; i
++) {
7008 ctx
->gs_next_vertex
[i
] =
7009 lp_build_alloca(bld_base
->base
.gallivm
,
7014 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
7015 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
7019 si_llvm_build_ret(ctx
, ctx
->return_value
);
7024 * Compute the VS prolog key, which contains all the information needed to
7025 * build the VS prolog function, and set shader->info bits where needed.
7027 static void si_get_vs_prolog_key(struct si_shader
*shader
,
7028 union si_shader_part_key
*key
)
7030 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7032 memset(key
, 0, sizeof(*key
));
7033 key
->vs_prolog
.states
= shader
->key
.part
.vs
.prolog
;
7034 key
->vs_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
7035 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
7037 /* Set the instanceID flag. */
7038 for (unsigned i
= 0; i
< info
->num_inputs
; i
++)
7039 if (key
->vs_prolog
.states
.instance_divisors
[i
])
7040 shader
->info
.uses_instanceid
= true;
7044 * Compute the VS epilog key, which contains all the information needed to
7045 * build the VS epilog function, and set the PrimitiveID output offset.
7047 static void si_get_vs_epilog_key(struct si_shader
*shader
,
7048 struct si_vs_epilog_bits
*states
,
7049 union si_shader_part_key
*key
)
7051 memset(key
, 0, sizeof(*key
));
7052 key
->vs_epilog
.states
= *states
;
7054 /* Set up the PrimitiveID output. */
7055 if (shader
->key
.part
.vs
.epilog
.export_prim_id
) {
7056 unsigned index
= shader
->selector
->info
.num_outputs
;
7057 unsigned offset
= shader
->info
.nr_param_exports
++;
7059 key
->vs_epilog
.prim_id_param_offset
= offset
;
7060 assert(index
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
7061 shader
->info
.vs_output_param_offset
[index
] = offset
;
7066 * Compute the PS prolog key, which contains all the information needed to
7067 * build the PS prolog function, and set related bits in shader->config.
7069 static void si_get_ps_prolog_key(struct si_shader
*shader
,
7070 union si_shader_part_key
*key
,
7071 bool separate_prolog
)
7073 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7075 memset(key
, 0, sizeof(*key
));
7076 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
7077 key
->ps_prolog
.colors_read
= info
->colors_read
;
7078 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
7079 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
7080 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
7081 (key
->ps_prolog
.colors_read
||
7082 key
->ps_prolog
.states
.force_persp_sample_interp
||
7083 key
->ps_prolog
.states
.force_linear_sample_interp
||
7084 key
->ps_prolog
.states
.force_persp_center_interp
||
7085 key
->ps_prolog
.states
.force_linear_center_interp
||
7086 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7087 key
->ps_prolog
.states
.bc_optimize_for_linear
);
7089 if (info
->colors_read
) {
7090 unsigned *color
= shader
->selector
->color_attr_index
;
7092 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
7093 /* BCOLORs are stored after the last input. */
7094 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
7095 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
7096 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
7099 for (unsigned i
= 0; i
< 2; i
++) {
7100 unsigned interp
= info
->input_interpolate
[color
[i
]];
7101 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
7103 if (!(info
->colors_read
& (0xf << i
*4)))
7106 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
7108 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
7109 interp
== TGSI_INTERPOLATE_COLOR
)
7110 interp
= TGSI_INTERPOLATE_CONSTANT
;
7113 case TGSI_INTERPOLATE_CONSTANT
:
7114 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
7116 case TGSI_INTERPOLATE_PERSPECTIVE
:
7117 case TGSI_INTERPOLATE_COLOR
:
7118 /* Force the interpolation location for colors here. */
7119 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
7120 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7121 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
7122 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7125 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7126 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
7127 shader
->config
.spi_ps_input_ena
|=
7128 S_0286CC_PERSP_SAMPLE_ENA(1);
7130 case TGSI_INTERPOLATE_LOC_CENTER
:
7131 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
7132 shader
->config
.spi_ps_input_ena
|=
7133 S_0286CC_PERSP_CENTER_ENA(1);
7135 case TGSI_INTERPOLATE_LOC_CENTROID
:
7136 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
7137 shader
->config
.spi_ps_input_ena
|=
7138 S_0286CC_PERSP_CENTROID_ENA(1);
7144 case TGSI_INTERPOLATE_LINEAR
:
7145 /* Force the interpolation location for colors here. */
7146 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
7147 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
7148 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
7149 location
= TGSI_INTERPOLATE_LOC_CENTER
;
7151 /* The VGPR assignment for non-monolithic shaders
7152 * works because InitialPSInputAddr is set on the
7153 * main shader and PERSP_PULL_MODEL is never used.
7156 case TGSI_INTERPOLATE_LOC_SAMPLE
:
7157 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7158 separate_prolog
? 6 : 9;
7159 shader
->config
.spi_ps_input_ena
|=
7160 S_0286CC_LINEAR_SAMPLE_ENA(1);
7162 case TGSI_INTERPOLATE_LOC_CENTER
:
7163 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7164 separate_prolog
? 8 : 11;
7165 shader
->config
.spi_ps_input_ena
|=
7166 S_0286CC_LINEAR_CENTER_ENA(1);
7168 case TGSI_INTERPOLATE_LOC_CENTROID
:
7169 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
7170 separate_prolog
? 10 : 13;
7171 shader
->config
.spi_ps_input_ena
|=
7172 S_0286CC_LINEAR_CENTROID_ENA(1);
7186 * Check whether a PS prolog is required based on the key.
7188 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
7190 return key
->ps_prolog
.colors_read
||
7191 key
->ps_prolog
.states
.force_persp_sample_interp
||
7192 key
->ps_prolog
.states
.force_linear_sample_interp
||
7193 key
->ps_prolog
.states
.force_persp_center_interp
||
7194 key
->ps_prolog
.states
.force_linear_center_interp
||
7195 key
->ps_prolog
.states
.bc_optimize_for_persp
||
7196 key
->ps_prolog
.states
.bc_optimize_for_linear
||
7197 key
->ps_prolog
.states
.poly_stipple
;
7201 * Compute the PS epilog key, which contains all the information needed to
7202 * build the PS epilog function.
7204 static void si_get_ps_epilog_key(struct si_shader
*shader
,
7205 union si_shader_part_key
*key
)
7207 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7208 memset(key
, 0, sizeof(*key
));
7209 key
->ps_epilog
.colors_written
= info
->colors_written
;
7210 key
->ps_epilog
.writes_z
= info
->writes_z
;
7211 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
7212 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
7213 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
7217 * Build the GS prolog function. Rotate the input vertices for triangle strips
7220 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
7221 union si_shader_part_key
*key
)
7223 const unsigned num_sgprs
= SI_GS_NUM_USER_SGPR
+ 2;
7224 const unsigned num_vgprs
= 8;
7225 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7226 LLVMBuilderRef builder
= gallivm
->builder
;
7227 LLVMTypeRef params
[32];
7228 LLVMTypeRef returns
[32];
7229 LLVMValueRef func
, ret
;
7231 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
7232 params
[i
] = ctx
->i32
;
7233 returns
[i
] = ctx
->i32
;
7236 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
7237 params
[num_sgprs
+ i
] = ctx
->i32
;
7238 returns
[num_sgprs
+ i
] = ctx
->f32
;
7241 /* Create the function. */
7242 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
7243 params
, num_sgprs
+ num_vgprs
, num_sgprs
- 1);
7244 func
= ctx
->main_fn
;
7246 /* Copy inputs to outputs. This should be no-op, as the registers match,
7247 * but it will prevent the compiler from overwriting them unintentionally.
7249 ret
= ctx
->return_value
;
7250 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
7251 LLVMValueRef p
= LLVMGetParam(func
, i
);
7252 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
7254 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
7255 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
7256 p
= LLVMBuildBitCast(builder
, p
, ctx
->f32
, "");
7257 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
7260 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
7261 /* Remap the input vertices for every other primitive. */
7262 const unsigned vtx_params
[6] = {
7270 LLVMValueRef prim_id
, rotate
;
7272 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
7273 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
7275 for (unsigned i
= 0; i
< 6; ++i
) {
7276 LLVMValueRef base
, rotated
, actual
;
7277 base
= LLVMGetParam(func
, vtx_params
[i
]);
7278 rotated
= LLVMGetParam(func
, vtx_params
[(i
+ 4) % 6]);
7279 actual
= LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
7280 actual
= LLVMBuildBitCast(builder
, actual
, ctx
->f32
, "");
7281 ret
= LLVMBuildInsertValue(builder
, ret
, actual
, vtx_params
[i
], "");
7285 LLVMBuildRet(builder
, ret
);
7289 * Given a list of shader part functions, build a wrapper function that
7290 * runs them in sequence to form a monolithic shader.
7292 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
7293 LLVMValueRef
*parts
,
7297 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7298 LLVMBuilderRef builder
= ctx
->gallivm
.builder
;
7299 /* PS epilog has one arg per color component */
7300 LLVMTypeRef param_types
[48];
7301 LLVMValueRef out
[48];
7302 LLVMTypeRef function_type
;
7303 unsigned num_params
;
7305 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
7306 unsigned num_sgprs
, num_vgprs
;
7307 unsigned last_sgpr_param
;
7310 for (unsigned i
= 0; i
< num_parts
; ++i
) {
7311 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
7312 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
7315 /* The parameters of the wrapper function correspond to those of the
7316 * first part in terms of SGPRs and VGPRs, but we use the types of the
7317 * main part to get the right types. This is relevant for the
7318 * dereferenceable attribute on descriptor table pointers.
7323 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
7324 num_params
= LLVMCountParamTypes(function_type
);
7326 for (unsigned i
= 0; i
< num_params
; ++i
) {
7327 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
7329 if (ac_is_sgpr_param(param
)) {
7330 assert(num_vgprs
== 0);
7331 num_sgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7333 num_vgprs
+= llvm_get_type_size(LLVMTypeOf(param
)) / 4;
7336 assert(num_vgprs
+ num_sgprs
<= ARRAY_SIZE(param_types
));
7339 last_sgpr_param
= 0;
7341 while (gprs
< num_sgprs
+ num_vgprs
) {
7342 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], num_params
);
7345 param_types
[num_params
] = LLVMTypeOf(param
);
7346 if (gprs
< num_sgprs
)
7347 last_sgpr_param
= num_params
;
7348 size
= llvm_get_type_size(param_types
[num_params
]) / 4;
7351 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
7352 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
7353 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
7358 si_create_function(ctx
, "wrapper", NULL
, 0, param_types
, num_params
, last_sgpr_param
);
7360 /* Record the arguments of the function as if they were an output of
7366 for (unsigned i
= 0; i
< num_params
; ++i
) {
7367 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
7368 LLVMTypeRef param_type
= LLVMTypeOf(param
);
7369 LLVMTypeRef out_type
= i
<= last_sgpr_param
? ctx
->i32
: ctx
->f32
;
7370 unsigned size
= llvm_get_type_size(param_type
) / 4;
7373 if (param_type
!= out_type
)
7374 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
7375 out
[num_out
++] = param
;
7377 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
7379 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7380 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
7381 param_type
= ctx
->i64
;
7384 if (param_type
!= vector_type
)
7385 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
7387 for (unsigned j
= 0; j
< size
; ++j
)
7388 out
[num_out
++] = LLVMBuildExtractElement(
7389 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
7392 if (i
<= last_sgpr_param
)
7393 num_out_sgpr
= num_out
;
7396 /* Now chain the parts. */
7397 for (unsigned part
= 0; part
< num_parts
; ++part
) {
7398 LLVMValueRef in
[48];
7400 LLVMTypeRef ret_type
;
7401 unsigned out_idx
= 0;
7403 num_params
= LLVMCountParams(parts
[part
]);
7404 assert(num_params
<= ARRAY_SIZE(param_types
));
7406 /* Derive arguments for the next part from outputs of the
7409 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
7411 LLVMTypeRef param_type
;
7413 unsigned param_size
;
7414 LLVMValueRef arg
= NULL
;
7416 param
= LLVMGetParam(parts
[part
], param_idx
);
7417 param_type
= LLVMTypeOf(param
);
7418 param_size
= llvm_get_type_size(param_type
) / 4;
7419 is_sgpr
= ac_is_sgpr_param(param
);
7422 #if HAVE_LLVM < 0x0400
7423 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
7425 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
7426 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
7428 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
7431 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
7432 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
7434 if (param_size
== 1)
7437 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
7439 if (LLVMTypeOf(arg
) != param_type
) {
7440 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
7441 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
7442 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
7444 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
7448 in
[param_idx
] = arg
;
7449 out_idx
+= param_size
;
7452 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
7453 ret_type
= LLVMTypeOf(ret
);
7455 /* Extract the returned GPRs. */
7459 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
7460 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
7462 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
7464 for (unsigned i
= 0; i
< ret_size
; ++i
) {
7466 LLVMBuildExtractValue(builder
, ret
, i
, "");
7468 out
[num_out
++] = val
;
7470 if (LLVMTypeOf(val
) == ctx
->i32
) {
7471 assert(num_out_sgpr
+ 1 == num_out
);
7472 num_out_sgpr
= num_out
;
7478 LLVMBuildRetVoid(builder
);
7481 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
7482 LLVMTargetMachineRef tm
,
7483 struct si_shader
*shader
,
7485 struct pipe_debug_callback
*debug
)
7487 struct si_shader_selector
*sel
= shader
->selector
;
7488 struct si_shader_context ctx
;
7489 struct lp_build_tgsi_context
*bld_base
;
7493 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
7494 * conversion fails. */
7495 if (r600_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
7496 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
7497 tgsi_dump(sel
->tokens
, 0);
7498 si_dump_streamout(&sel
->so
);
7501 si_init_shader_ctx(&ctx
, sscreen
, shader
, tm
);
7502 ctx
.separate_prolog
= !is_monolithic
;
7504 memset(shader
->info
.vs_output_param_offset
, EXP_PARAM_UNDEFINED
,
7505 sizeof(shader
->info
.vs_output_param_offset
));
7507 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
7509 bld_base
= &ctx
.bld_base
;
7510 ctx
.load_system_value
= declare_system_value
;
7512 if (!si_compile_tgsi_main(&ctx
, shader
)) {
7513 si_llvm_dispose(&ctx
);
7517 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
7518 LLVMValueRef parts
[3];
7522 need_prolog
= sel
->info
.num_inputs
;
7523 need_epilog
= !shader
->key
.as_es
&& !shader
->key
.as_ls
;
7525 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7528 union si_shader_part_key prolog_key
;
7529 si_get_vs_prolog_key(shader
, &prolog_key
);
7530 si_build_vs_prolog_function(&ctx
, &prolog_key
);
7531 parts
[0] = ctx
.main_fn
;
7535 union si_shader_part_key epilog_key
;
7536 si_get_vs_epilog_key(shader
, &shader
->key
.part
.vs
.epilog
, &epilog_key
);
7537 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7538 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7541 si_build_wrapper_function(&ctx
, parts
, 1 + need_prolog
+ need_epilog
,
7542 need_prolog
? 1 : 0);
7543 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
7544 LLVMValueRef parts
[2];
7545 union si_shader_part_key epilog_key
;
7547 parts
[0] = ctx
.main_fn
;
7549 memset(&epilog_key
, 0, sizeof(epilog_key
));
7550 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7551 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7552 parts
[1] = ctx
.main_fn
;
7554 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7555 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_EVAL
&&
7556 !shader
->key
.as_es
) {
7557 LLVMValueRef parts
[2];
7558 union si_shader_part_key epilog_key
;
7560 parts
[0] = ctx
.main_fn
;
7562 si_get_vs_epilog_key(shader
, &shader
->key
.part
.tes
.epilog
, &epilog_key
);
7563 si_build_vs_epilog_function(&ctx
, &epilog_key
);
7564 parts
[1] = ctx
.main_fn
;
7566 si_build_wrapper_function(&ctx
, parts
, 2, 0);
7567 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7568 LLVMValueRef parts
[2];
7569 union si_shader_part_key prolog_key
;
7571 parts
[1] = ctx
.main_fn
;
7573 memset(&prolog_key
, 0, sizeof(prolog_key
));
7574 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7575 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7576 parts
[0] = ctx
.main_fn
;
7578 si_build_wrapper_function(&ctx
, parts
, 2, 1);
7579 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7580 LLVMValueRef parts
[3];
7581 union si_shader_part_key prolog_key
;
7582 union si_shader_part_key epilog_key
;
7585 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7586 need_prolog
= si_need_ps_prolog(&prolog_key
);
7588 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7591 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7592 parts
[0] = ctx
.main_fn
;
7595 si_get_ps_epilog_key(shader
, &epilog_key
);
7596 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7597 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7599 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2, need_prolog
? 1 : 0);
7602 mod
= bld_base
->base
.gallivm
->module
;
7604 /* Dump LLVM IR before any optimization passes */
7605 if (sscreen
->b
.debug_flags
& DBG_PREOPT_IR
&&
7606 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7607 LLVMDumpModule(mod
);
7609 si_llvm_finalize_module(&ctx
,
7610 r600_extra_shader_checks(&sscreen
->b
, ctx
.type
));
7612 /* Post-optimization transformations and analysis. */
7613 si_eliminate_const_vs_outputs(&ctx
);
7615 if ((debug
&& debug
->debug_message
) ||
7616 r600_can_dump_shader(&sscreen
->b
, ctx
.type
))
7617 si_count_scratch_private_memory(&ctx
);
7619 /* Compile to bytecode. */
7620 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
7621 mod
, debug
, ctx
.type
, "TGSI shader");
7622 si_llvm_dispose(&ctx
);
7624 fprintf(stderr
, "LLVM failed to compile shader\n");
7628 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7629 * LLVM 3.9svn has this bug.
7631 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7632 unsigned wave_size
= 64;
7633 unsigned max_vgprs
= 256;
7634 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
7635 unsigned max_sgprs_per_wave
= 128;
7636 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7637 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7638 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7640 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7641 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7643 if (shader
->config
.num_sgprs
> max_sgprs
||
7644 shader
->config
.num_vgprs
> max_vgprs
) {
7645 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7646 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7647 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7648 max_sgprs
, max_vgprs
);
7650 /* Just terminate the process, because dependent
7651 * shaders can hang due to bad input data, but use
7652 * the env var to allow shader-db to work.
7654 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7659 /* Add the scratch offset to input SGPRs. */
7660 if (shader
->config
.scratch_bytes_per_wave
)
7661 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7663 /* Calculate the number of fragment input VGPRs. */
7664 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7665 shader
->info
.num_input_vgprs
= 0;
7666 shader
->info
.face_vgpr_index
= -1;
7668 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7669 shader
->info
.num_input_vgprs
+= 2;
7670 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7671 shader
->info
.num_input_vgprs
+= 2;
7672 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7673 shader
->info
.num_input_vgprs
+= 2;
7674 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7675 shader
->info
.num_input_vgprs
+= 3;
7676 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7677 shader
->info
.num_input_vgprs
+= 2;
7678 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7679 shader
->info
.num_input_vgprs
+= 2;
7680 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7681 shader
->info
.num_input_vgprs
+= 2;
7682 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7683 shader
->info
.num_input_vgprs
+= 1;
7684 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7685 shader
->info
.num_input_vgprs
+= 1;
7686 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7687 shader
->info
.num_input_vgprs
+= 1;
7688 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7689 shader
->info
.num_input_vgprs
+= 1;
7690 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7691 shader
->info
.num_input_vgprs
+= 1;
7692 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7693 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7694 shader
->info
.num_input_vgprs
+= 1;
7696 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
))
7697 shader
->info
.num_input_vgprs
+= 1;
7698 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7699 shader
->info
.num_input_vgprs
+= 1;
7700 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7701 shader
->info
.num_input_vgprs
+= 1;
7708 * Create, compile and return a shader part (prolog or epilog).
7710 * \param sscreen screen
7711 * \param list list of shader parts of the same category
7712 * \param type shader type
7713 * \param key shader part key
7714 * \param prolog whether the part being requested is a prolog
7715 * \param tm LLVM target machine
7716 * \param debug debug callback
7717 * \param build the callback responsible for building the main function
7718 * \return non-NULL on success
7720 static struct si_shader_part
*
7721 si_get_shader_part(struct si_screen
*sscreen
,
7722 struct si_shader_part
**list
,
7723 enum pipe_shader_type type
,
7725 union si_shader_part_key
*key
,
7726 LLVMTargetMachineRef tm
,
7727 struct pipe_debug_callback
*debug
,
7728 void (*build
)(struct si_shader_context
*,
7729 union si_shader_part_key
*),
7732 struct si_shader_part
*result
;
7734 pipe_mutex_lock(sscreen
->shader_parts_mutex
);
7736 /* Find existing. */
7737 for (result
= *list
; result
; result
= result
->next
) {
7738 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7739 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7744 /* Compile a new one. */
7745 result
= CALLOC_STRUCT(si_shader_part
);
7748 struct si_shader shader
= {};
7749 struct si_shader_context ctx
;
7750 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
7752 si_init_shader_ctx(&ctx
, sscreen
, &shader
, tm
);
7756 case PIPE_SHADER_VERTEX
:
7758 case PIPE_SHADER_TESS_CTRL
:
7760 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7762 case PIPE_SHADER_GEOMETRY
:
7765 case PIPE_SHADER_FRAGMENT
:
7767 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7769 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7772 unreachable("bad shader part");
7778 si_llvm_finalize_module(&ctx
,
7779 r600_extra_shader_checks(&sscreen
->b
, PIPE_SHADER_FRAGMENT
));
7781 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7782 gallivm
->module
, debug
, ctx
.type
, name
)) {
7788 result
->next
= *list
;
7792 si_llvm_dispose(&ctx
);
7793 pipe_mutex_unlock(sscreen
->shader_parts_mutex
);
7798 * Build the vertex shader prolog function.
7800 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7801 * All inputs are returned unmodified. The vertex load indices are
7802 * stored after them, which will be used by the API VS for fetching inputs.
7804 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7809 * (VertexID + BaseVertex),
7810 * (InstanceID + StartInstance),
7811 * (InstanceID / 2 + StartInstance)
7813 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7814 union si_shader_part_key
*key
)
7816 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7817 LLVMTypeRef
*params
, *returns
;
7818 LLVMValueRef ret
, func
;
7819 int last_sgpr
, num_params
, num_returns
, i
;
7821 ctx
->param_vertex_id
= key
->vs_prolog
.num_input_sgprs
;
7822 ctx
->param_instance_id
= key
->vs_prolog
.num_input_sgprs
+ 3;
7824 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7825 params
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4) *
7826 sizeof(LLVMTypeRef
));
7827 returns
= alloca((key
->vs_prolog
.num_input_sgprs
+ 4 +
7828 key
->vs_prolog
.last_input
+ 1) *
7829 sizeof(LLVMTypeRef
));
7833 /* Declare input and output SGPRs. */
7835 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7836 params
[num_params
++] = ctx
->i32
;
7837 returns
[num_returns
++] = ctx
->i32
;
7839 last_sgpr
= num_params
- 1;
7841 /* 4 preloaded VGPRs (outputs must be floats) */
7842 for (i
= 0; i
< 4; i
++) {
7843 params
[num_params
++] = ctx
->i32
;
7844 returns
[num_returns
++] = ctx
->f32
;
7847 /* Vertex load indices. */
7848 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7849 returns
[num_returns
++] = ctx
->f32
;
7851 /* Create the function. */
7852 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, params
,
7853 num_params
, last_sgpr
);
7854 func
= ctx
->main_fn
;
7856 /* Copy inputs to outputs. This should be no-op, as the registers match,
7857 * but it will prevent the compiler from overwriting them unintentionally.
7859 ret
= ctx
->return_value
;
7860 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7861 LLVMValueRef p
= LLVMGetParam(func
, i
);
7862 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7864 for (i
= num_params
- 4; i
< num_params
; i
++) {
7865 LLVMValueRef p
= LLVMGetParam(func
, i
);
7866 p
= LLVMBuildBitCast(gallivm
->builder
, p
, ctx
->f32
, "");
7867 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
7870 /* Compute vertex load indices from instance divisors. */
7871 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7872 unsigned divisor
= key
->vs_prolog
.states
.instance_divisors
[i
];
7876 /* InstanceID / Divisor + StartInstance */
7877 index
= get_instance_index_for_fetch(ctx
,
7878 SI_SGPR_START_INSTANCE
,
7881 /* VertexID + BaseVertex */
7882 index
= LLVMBuildAdd(gallivm
->builder
,
7883 LLVMGetParam(func
, ctx
->param_vertex_id
),
7884 LLVMGetParam(func
, SI_SGPR_BASE_VERTEX
), "");
7887 index
= LLVMBuildBitCast(gallivm
->builder
, index
, ctx
->f32
, "");
7888 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, index
,
7892 si_llvm_build_ret(ctx
, ret
);
7896 * Build the vertex shader epilog function. This is also used by the tessellation
7897 * evaluation shader compiled as VS.
7899 * The input is PrimitiveID.
7901 * If PrimitiveID is required by the pixel shader, export it.
7902 * Otherwise, do nothing.
7904 static void si_build_vs_epilog_function(struct si_shader_context
*ctx
,
7905 union si_shader_part_key
*key
)
7907 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7908 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7909 LLVMTypeRef params
[5];
7912 /* Declare input VGPRs. */
7913 num_params
= key
->vs_epilog
.states
.export_prim_id
?
7914 (VS_EPILOG_PRIMID_LOC
+ 1) : 0;
7915 assert(num_params
<= ARRAY_SIZE(params
));
7917 for (i
= 0; i
< num_params
; i
++)
7918 params
[i
] = ctx
->f32
;
7920 /* Create the function. */
7921 si_create_function(ctx
, "vs_epilog", NULL
, 0, params
, num_params
, -1);
7924 if (key
->vs_epilog
.states
.export_prim_id
) {
7925 struct lp_build_context
*base
= &bld_base
->base
;
7926 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
7927 LLVMValueRef args
[9];
7929 args
[0] = lp_build_const_int32(base
->gallivm
, 0x0); /* enabled channels */
7930 args
[1] = uint
->zero
; /* whether the EXEC mask is valid */
7931 args
[2] = uint
->zero
; /* DONE bit */
7932 args
[3] = lp_build_const_int32(base
->gallivm
, V_008DFC_SQ_EXP_PARAM
+
7933 key
->vs_epilog
.prim_id_param_offset
);
7934 args
[4] = uint
->zero
; /* COMPR flag (0 = 32-bit export) */
7935 args
[5] = LLVMGetParam(ctx
->main_fn
,
7936 VS_EPILOG_PRIMID_LOC
); /* X */
7937 args
[6] = base
->undef
; /* Y */
7938 args
[7] = base
->undef
; /* Z */
7939 args
[8] = base
->undef
; /* W */
7941 lp_build_intrinsic(base
->gallivm
->builder
, "llvm.SI.export",
7942 LLVMVoidTypeInContext(base
->gallivm
->context
),
7946 LLVMBuildRetVoid(gallivm
->builder
);
7950 * Create & compile a vertex shader epilog. This a helper used by VS and TES.
7952 static bool si_get_vs_epilog(struct si_screen
*sscreen
,
7953 LLVMTargetMachineRef tm
,
7954 struct si_shader
*shader
,
7955 struct pipe_debug_callback
*debug
,
7956 struct si_vs_epilog_bits
*states
)
7958 union si_shader_part_key epilog_key
;
7960 si_get_vs_epilog_key(shader
, states
, &epilog_key
);
7962 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->vs_epilogs
,
7963 PIPE_SHADER_VERTEX
, true,
7964 &epilog_key
, tm
, debug
,
7965 si_build_vs_epilog_function
,
7966 "Vertex Shader Epilog");
7967 return shader
->epilog
!= NULL
;
7971 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7973 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7974 LLVMTargetMachineRef tm
,
7975 struct si_shader
*shader
,
7976 struct pipe_debug_callback
*debug
)
7978 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
7979 union si_shader_part_key prolog_key
;
7981 /* Get the prolog. */
7982 si_get_vs_prolog_key(shader
, &prolog_key
);
7984 /* The prolog is a no-op if there are no inputs. */
7985 if (info
->num_inputs
) {
7987 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7988 PIPE_SHADER_VERTEX
, true,
7989 &prolog_key
, tm
, debug
,
7990 si_build_vs_prolog_function
,
7991 "Vertex Shader Prolog");
7992 if (!shader
->prolog
)
7996 /* Get the epilog. */
7997 if (!shader
->key
.as_es
&& !shader
->key
.as_ls
&&
7998 !si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
7999 &shader
->key
.part
.vs
.epilog
))
8006 * Select and compile (or reuse) TES parts (epilog).
8008 static bool si_shader_select_tes_parts(struct si_screen
*sscreen
,
8009 LLVMTargetMachineRef tm
,
8010 struct si_shader
*shader
,
8011 struct pipe_debug_callback
*debug
)
8013 if (shader
->key
.as_es
)
8016 /* TES compiled as VS. */
8017 return si_get_vs_epilog(sscreen
, tm
, shader
, debug
,
8018 &shader
->key
.part
.tes
.epilog
);
8022 * Compile the TCS epilog function. This writes tesselation factors to memory
8023 * based on the output primitive type of the tesselator (determined by TES).
8025 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
8026 union si_shader_part_key
*key
)
8028 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8029 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8030 LLVMTypeRef params
[16];
8032 int last_sgpr
, num_params
;
8034 /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */
8035 params
[SI_PARAM_RW_BUFFERS
] = const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
);
8036 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8037 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8038 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8039 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8040 params
[SI_PARAM_TCS_OFFCHIP_LAYOUT
] = ctx
->i32
;
8041 params
[SI_PARAM_TCS_OUT_OFFSETS
] = ctx
->i32
;
8042 params
[SI_PARAM_TCS_OUT_LAYOUT
] = ctx
->i32
;
8043 params
[SI_PARAM_TCS_IN_LAYOUT
] = ctx
->i32
;
8044 params
[ctx
->param_oc_lds
= SI_PARAM_TCS_OC_LDS
] = ctx
->i32
;
8045 params
[SI_PARAM_TESS_FACTOR_OFFSET
] = ctx
->i32
;
8046 last_sgpr
= SI_PARAM_TESS_FACTOR_OFFSET
;
8047 num_params
= last_sgpr
+ 1;
8049 params
[num_params
++] = ctx
->i32
; /* patch index within the wave (REL_PATCH_ID) */
8050 params
[num_params
++] = ctx
->i32
; /* invocation ID within the patch */
8051 params
[num_params
++] = ctx
->i32
; /* LDS offset where tess factors should be loaded from */
8053 /* Create the function. */
8054 si_create_function(ctx
, "tcs_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8055 declare_tess_lds(ctx
);
8056 func
= ctx
->main_fn
;
8058 si_write_tess_factors(bld_base
,
8059 LLVMGetParam(func
, last_sgpr
+ 1),
8060 LLVMGetParam(func
, last_sgpr
+ 2),
8061 LLVMGetParam(func
, last_sgpr
+ 3));
8063 LLVMBuildRetVoid(gallivm
->builder
);
8067 * Select and compile (or reuse) TCS parts (epilog).
8069 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
8070 LLVMTargetMachineRef tm
,
8071 struct si_shader
*shader
,
8072 struct pipe_debug_callback
*debug
)
8074 union si_shader_part_key epilog_key
;
8076 /* Get the epilog. */
8077 memset(&epilog_key
, 0, sizeof(epilog_key
));
8078 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
8080 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
8081 PIPE_SHADER_TESS_CTRL
, false,
8082 &epilog_key
, tm
, debug
,
8083 si_build_tcs_epilog_function
,
8084 "Tessellation Control Shader Epilog");
8085 return shader
->epilog
!= NULL
;
8089 * Select and compile (or reuse) GS parts (prolog).
8091 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
8092 LLVMTargetMachineRef tm
,
8093 struct si_shader
*shader
,
8094 struct pipe_debug_callback
*debug
)
8096 union si_shader_part_key prolog_key
;
8098 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
8101 memset(&prolog_key
, 0, sizeof(prolog_key
));
8102 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
8104 shader
->prolog
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
8105 PIPE_SHADER_GEOMETRY
, true,
8106 &prolog_key
, tm
, debug
,
8107 si_build_gs_prolog_function
,
8108 "Geometry Shader Prolog");
8109 return shader
->prolog
!= NULL
;
8113 * Build the pixel shader prolog function. This handles:
8114 * - two-side color selection and interpolation
8115 * - overriding interpolation parameters for the API PS
8116 * - polygon stippling
8118 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
8119 * overriden by other states. (e.g. per-sample interpolation)
8120 * Interpolated colors are stored after the preloaded VGPRs.
8122 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
8123 union si_shader_part_key
*key
)
8125 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8126 LLVMTypeRef
*params
;
8127 LLVMValueRef ret
, func
;
8128 int last_sgpr
, num_params
, num_returns
, i
, num_color_channels
;
8130 assert(si_need_ps_prolog(key
));
8132 /* Number of inputs + 8 color elements. */
8133 params
= alloca((key
->ps_prolog
.num_input_sgprs
+
8134 key
->ps_prolog
.num_input_vgprs
+ 8) *
8135 sizeof(LLVMTypeRef
));
8137 /* Declare inputs. */
8139 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
8140 params
[num_params
++] = ctx
->i32
;
8141 last_sgpr
= num_params
- 1;
8143 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
8144 params
[num_params
++] = ctx
->f32
;
8146 /* Declare outputs (same as inputs + add colors if needed) */
8147 num_returns
= num_params
;
8148 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
8149 for (i
= 0; i
< num_color_channels
; i
++)
8150 params
[num_returns
++] = ctx
->f32
;
8152 /* Create the function. */
8153 si_create_function(ctx
, "ps_prolog", params
, num_returns
, params
,
8154 num_params
, last_sgpr
);
8155 func
= ctx
->main_fn
;
8157 /* Copy inputs to outputs. This should be no-op, as the registers match,
8158 * but it will prevent the compiler from overwriting them unintentionally.
8160 ret
= ctx
->return_value
;
8161 for (i
= 0; i
< num_params
; i
++) {
8162 LLVMValueRef p
= LLVMGetParam(func
, i
);
8163 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, p
, i
, "");
8166 /* Polygon stippling. */
8167 if (key
->ps_prolog
.states
.poly_stipple
) {
8168 /* POS_FIXED_PT is always last. */
8169 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
8170 key
->ps_prolog
.num_input_vgprs
- 1;
8171 LLVMValueRef ptr
[2], list
;
8173 /* Get the pointer to rw buffers. */
8174 ptr
[0] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS
);
8175 ptr
[1] = LLVMGetParam(func
, SI_SGPR_RW_BUFFERS_HI
);
8176 list
= lp_build_gather_values(gallivm
, ptr
, 2);
8177 list
= LLVMBuildBitCast(gallivm
->builder
, list
, ctx
->i64
, "");
8178 list
= LLVMBuildIntToPtr(gallivm
->builder
, list
,
8179 const_array(ctx
->v16i8
, SI_NUM_RW_BUFFERS
), "");
8181 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
8184 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
8185 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8186 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8187 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
8189 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
8190 * The hw doesn't compute CENTROID if the whole wave only
8191 * contains fully-covered quads.
8193 * PRIM_MASK is after user SGPRs.
8195 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8196 bc_optimize
= LLVMBuildLShr(gallivm
->builder
, bc_optimize
,
8197 LLVMConstInt(ctx
->i32
, 31, 0), "");
8198 bc_optimize
= LLVMBuildTrunc(gallivm
->builder
, bc_optimize
,
8201 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
8202 /* Read PERSP_CENTER. */
8203 for (i
= 0; i
< 2; i
++)
8204 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8205 /* Read PERSP_CENTROID. */
8206 for (i
= 0; i
< 2; i
++)
8207 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
8208 /* Select PERSP_CENTROID. */
8209 for (i
= 0; i
< 2; i
++) {
8210 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8211 center
[i
], centroid
[i
], "");
8212 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8213 tmp
, base
+ 4 + i
, "");
8216 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
8217 /* Read LINEAR_CENTER. */
8218 for (i
= 0; i
< 2; i
++)
8219 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8220 /* Read LINEAR_CENTROID. */
8221 for (i
= 0; i
< 2; i
++)
8222 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
8223 /* Select LINEAR_CENTROID. */
8224 for (i
= 0; i
< 2; i
++) {
8225 tmp
= LLVMBuildSelect(gallivm
->builder
, bc_optimize
,
8226 center
[i
], centroid
[i
], "");
8227 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8228 tmp
, base
+ 10 + i
, "");
8233 /* Force per-sample interpolation. */
8234 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
8235 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8236 LLVMValueRef persp_sample
[2];
8238 /* Read PERSP_SAMPLE. */
8239 for (i
= 0; i
< 2; i
++)
8240 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
8241 /* Overwrite PERSP_CENTER. */
8242 for (i
= 0; i
< 2; i
++)
8243 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8244 persp_sample
[i
], base
+ 2 + i
, "");
8245 /* Overwrite PERSP_CENTROID. */
8246 for (i
= 0; i
< 2; i
++)
8247 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8248 persp_sample
[i
], base
+ 4 + i
, "");
8250 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
8251 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8252 LLVMValueRef linear_sample
[2];
8254 /* Read LINEAR_SAMPLE. */
8255 for (i
= 0; i
< 2; i
++)
8256 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
8257 /* Overwrite LINEAR_CENTER. */
8258 for (i
= 0; i
< 2; i
++)
8259 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8260 linear_sample
[i
], base
+ 8 + i
, "");
8261 /* Overwrite LINEAR_CENTROID. */
8262 for (i
= 0; i
< 2; i
++)
8263 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8264 linear_sample
[i
], base
+ 10 + i
, "");
8267 /* Force center interpolation. */
8268 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
8269 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8270 LLVMValueRef persp_center
[2];
8272 /* Read PERSP_CENTER. */
8273 for (i
= 0; i
< 2; i
++)
8274 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
8275 /* Overwrite PERSP_SAMPLE. */
8276 for (i
= 0; i
< 2; i
++)
8277 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8278 persp_center
[i
], base
+ i
, "");
8279 /* Overwrite PERSP_CENTROID. */
8280 for (i
= 0; i
< 2; i
++)
8281 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8282 persp_center
[i
], base
+ 4 + i
, "");
8284 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
8285 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
8286 LLVMValueRef linear_center
[2];
8288 /* Read LINEAR_CENTER. */
8289 for (i
= 0; i
< 2; i
++)
8290 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
8291 /* Overwrite LINEAR_SAMPLE. */
8292 for (i
= 0; i
< 2; i
++)
8293 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8294 linear_center
[i
], base
+ 6 + i
, "");
8295 /* Overwrite LINEAR_CENTROID. */
8296 for (i
= 0; i
< 2; i
++)
8297 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
,
8298 linear_center
[i
], base
+ 10 + i
, "");
8301 /* Interpolate colors. */
8302 for (i
= 0; i
< 2; i
++) {
8303 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
8304 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8305 key
->ps_prolog
.face_vgpr_index
;
8306 LLVMValueRef interp
[2], color
[4];
8307 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
8312 /* If the interpolation qualifier is not CONSTANT (-1). */
8313 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
8314 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8315 key
->ps_prolog
.color_interp_vgpr_index
[i
];
8317 /* Get the (i,j) updated by bc_optimize handling. */
8318 interp
[0] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8320 interp
[1] = LLVMBuildExtractValue(gallivm
->builder
, ret
,
8321 interp_vgpr
+ 1, "");
8322 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
8325 /* Use the absolute location of the input. */
8326 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
8328 if (key
->ps_prolog
.states
.color_two_side
) {
8329 face
= LLVMGetParam(func
, face_vgpr
);
8330 face
= LLVMBuildBitCast(gallivm
->builder
, face
, ctx
->i32
, "");
8333 interp_fs_input(ctx
,
8334 key
->ps_prolog
.color_attr_index
[i
],
8335 TGSI_SEMANTIC_COLOR
, i
,
8336 key
->ps_prolog
.num_interp_inputs
,
8337 key
->ps_prolog
.colors_read
, interp_ij
,
8338 prim_mask
, face
, color
);
8341 unsigned chan
= u_bit_scan(&writemask
);
8342 ret
= LLVMBuildInsertValue(gallivm
->builder
, ret
, color
[chan
],
8347 /* Tell LLVM to insert WQM instruction sequence when needed. */
8348 if (key
->ps_prolog
.wqm
) {
8349 LLVMAddTargetDependentFunctionAttr(func
,
8350 "amdgpu-ps-wqm-outputs", "");
8353 si_llvm_build_ret(ctx
, ret
);
8357 * Build the pixel shader epilog function. This handles everything that must be
8358 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8360 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8361 union si_shader_part_key
*key
)
8363 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
8364 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8365 LLVMTypeRef params
[16+8*4+3];
8366 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8367 int last_sgpr
, num_params
, i
;
8368 struct si_ps_exports exp
= {};
8370 /* Declare input SGPRs. */
8371 params
[SI_PARAM_RW_BUFFERS
] = ctx
->i64
;
8372 params
[SI_PARAM_CONST_BUFFERS
] = ctx
->i64
;
8373 params
[SI_PARAM_SAMPLERS
] = ctx
->i64
;
8374 params
[SI_PARAM_IMAGES
] = ctx
->i64
;
8375 params
[SI_PARAM_SHADER_BUFFERS
] = ctx
->i64
;
8376 params
[SI_PARAM_ALPHA_REF
] = ctx
->f32
;
8377 last_sgpr
= SI_PARAM_ALPHA_REF
;
8379 /* Declare input VGPRs. */
8380 num_params
= (last_sgpr
+ 1) +
8381 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8382 key
->ps_epilog
.writes_z
+
8383 key
->ps_epilog
.writes_stencil
+
8384 key
->ps_epilog
.writes_samplemask
;
8386 num_params
= MAX2(num_params
,
8387 last_sgpr
+ 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8389 assert(num_params
<= ARRAY_SIZE(params
));
8391 for (i
= last_sgpr
+ 1; i
< num_params
; i
++)
8392 params
[i
] = ctx
->f32
;
8394 /* Create the function. */
8395 si_create_function(ctx
, "ps_epilog", NULL
, 0, params
, num_params
, last_sgpr
);
8396 /* Disable elimination of unused inputs. */
8397 si_llvm_add_attribute(ctx
->main_fn
,
8398 "InitialPSInputAddr", 0xffffff);
8400 /* Process colors. */
8401 unsigned vgpr
= last_sgpr
+ 1;
8402 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8403 int last_color_export
= -1;
8405 /* Find the last color export. */
8406 if (!key
->ps_epilog
.writes_z
&&
8407 !key
->ps_epilog
.writes_stencil
&&
8408 !key
->ps_epilog
.writes_samplemask
) {
8409 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8411 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8412 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8413 /* Just set this if any of the colorbuffers are enabled. */
8415 ((1llu << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8416 last_color_export
= 0;
8418 for (i
= 0; i
< 8; i
++)
8419 if (colors_written
& (1 << i
) &&
8420 (spi_format
>> (i
* 4)) & 0xf)
8421 last_color_export
= i
;
8425 while (colors_written
) {
8426 LLVMValueRef color
[4];
8427 int mrt
= u_bit_scan(&colors_written
);
8429 for (i
= 0; i
< 4; i
++)
8430 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8432 si_export_mrt_color(bld_base
, color
, mrt
,
8434 mrt
== last_color_export
, &exp
);
8437 /* Process depth, stencil, samplemask. */
8438 if (key
->ps_epilog
.writes_z
)
8439 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8440 if (key
->ps_epilog
.writes_stencil
)
8441 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8442 if (key
->ps_epilog
.writes_samplemask
)
8443 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8445 if (depth
|| stencil
|| samplemask
)
8446 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8447 else if (last_color_export
== -1)
8448 si_export_null(bld_base
);
8451 si_emit_ps_exports(ctx
, &exp
);
8454 LLVMBuildRetVoid(gallivm
->builder
);
8458 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8460 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8461 LLVMTargetMachineRef tm
,
8462 struct si_shader
*shader
,
8463 struct pipe_debug_callback
*debug
)
8465 union si_shader_part_key prolog_key
;
8466 union si_shader_part_key epilog_key
;
8468 /* Get the prolog. */
8469 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8471 /* The prolog is a no-op if these aren't set. */
8472 if (si_need_ps_prolog(&prolog_key
)) {
8474 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8475 PIPE_SHADER_FRAGMENT
, true,
8476 &prolog_key
, tm
, debug
,
8477 si_build_ps_prolog_function
,
8478 "Fragment Shader Prolog");
8479 if (!shader
->prolog
)
8483 /* Get the epilog. */
8484 si_get_ps_epilog_key(shader
, &epilog_key
);
8487 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8488 PIPE_SHADER_FRAGMENT
, false,
8489 &epilog_key
, tm
, debug
,
8490 si_build_ps_epilog_function
,
8491 "Fragment Shader Epilog");
8492 if (!shader
->epilog
)
8495 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8496 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8497 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8498 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8501 /* Set up the enable bits for per-sample shading if needed. */
8502 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8503 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8504 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8505 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8506 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8507 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8509 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8510 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8511 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8512 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8513 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8514 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8516 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8517 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8518 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8519 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8520 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8521 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8523 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8524 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8525 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8526 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8527 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8528 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8531 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8532 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8533 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8534 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8535 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8538 /* At least one pair of interpolation weights must be enabled. */
8539 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8540 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8541 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8544 /* The sample mask input is always enabled, because the API shader always
8545 * passes it through to the epilog. Disable it here if it's unused.
8547 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8548 !shader
->selector
->info
.reads_samplemask
)
8549 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8554 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8557 /* SPI barrier management bug:
8558 * Make sure we have at least 4k of LDS in use to avoid the bug.
8559 * It applies to workgroup sizes of more than one wavefront.
8561 if (sscreen
->b
.family
== CHIP_BONAIRE
||
8562 sscreen
->b
.family
== CHIP_KABINI
||
8563 sscreen
->b
.family
== CHIP_MULLINS
)
8564 *lds_size
= MAX2(*lds_size
, 8);
8567 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8568 struct si_shader
*shader
)
8570 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8572 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8574 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8575 si_get_max_workgroup_size(shader
) > 64) {
8576 si_multiwave_lds_size_workaround(sscreen
,
8577 &shader
->config
.lds_size
);
8581 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
8582 struct si_shader
*shader
,
8583 struct pipe_debug_callback
*debug
)
8585 struct si_shader_selector
*sel
= shader
->selector
;
8586 struct si_shader
*mainp
= sel
->main_shader_part
;
8589 /* LS, ES, VS are compiled on demand if the main part hasn't been
8590 * compiled for that stage.
8592 * Vertex shaders are compiled on demand when a vertex fetch
8593 * workaround must be applied.
8595 if (shader
->is_monolithic
) {
8596 /* Monolithic shader (compiled as a whole, has many variants,
8597 * may take a long time to compile).
8599 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
8603 /* The shader consists of 2-3 parts:
8605 * - the middle part is the user shader, it has 1 variant only
8606 * and it was compiled during the creation of the shader
8608 * - the prolog part is inserted at the beginning
8609 * - the epilog part is inserted at the end
8611 * The prolog and epilog have many (but simple) variants.
8614 /* Copy the compiled TGSI shader data over. */
8615 shader
->is_binary_shared
= true;
8616 shader
->binary
= mainp
->binary
;
8617 shader
->config
= mainp
->config
;
8618 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8619 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8620 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8621 memcpy(shader
->info
.vs_output_param_offset
,
8622 mainp
->info
.vs_output_param_offset
,
8623 sizeof(mainp
->info
.vs_output_param_offset
));
8624 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8625 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8626 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8628 /* Select prologs and/or epilogs. */
8629 switch (sel
->type
) {
8630 case PIPE_SHADER_VERTEX
:
8631 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8634 case PIPE_SHADER_TESS_CTRL
:
8635 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8638 case PIPE_SHADER_TESS_EVAL
:
8639 if (!si_shader_select_tes_parts(sscreen
, tm
, shader
, debug
))
8642 case PIPE_SHADER_GEOMETRY
:
8643 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8646 case PIPE_SHADER_FRAGMENT
:
8647 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8650 /* Make sure we have at least as many VGPRs as there
8651 * are allocated inputs.
8653 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8654 shader
->info
.num_input_vgprs
);
8658 /* Update SGPR and VGPR counts. */
8659 if (shader
->prolog
) {
8660 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8661 shader
->prolog
->config
.num_sgprs
);
8662 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8663 shader
->prolog
->config
.num_vgprs
);
8665 if (shader
->epilog
) {
8666 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8667 shader
->epilog
->config
.num_sgprs
);
8668 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8669 shader
->epilog
->config
.num_vgprs
);
8673 si_fix_resource_usage(sscreen
, shader
);
8674 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8678 r
= si_shader_binary_upload(sscreen
, shader
);
8680 fprintf(stderr
, "LLVM failed to upload shader\n");
8687 void si_shader_destroy(struct si_shader
*shader
)
8689 if (shader
->scratch_bo
)
8690 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8692 r600_resource_reference(&shader
->bo
, NULL
);
8694 if (!shader
->is_binary_shared
)
8695 radeon_shader_binary_clean(&shader
->binary
);
8697 free(shader
->shader_log
);