2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "gallivm/lp_bld_const.h"
25 #include "gallivm/lp_bld_gather.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_logic.h"
28 #include "gallivm/lp_bld_arit.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_misc.h"
31 #include "util/u_memory.h"
32 #include "util/u_string.h"
33 #include "tgsi/tgsi_build.h"
34 #include "tgsi/tgsi_util.h"
35 #include "tgsi/tgsi_dump.h"
37 #include "ac_binary.h"
38 #include "ac_llvm_util.h"
39 #include "ac_exp_param.h"
40 #include "ac_shader_util.h"
41 #include "si_shader_internal.h"
45 #include "compiler/nir/nir.h"
47 static const char *scratch_rsrc_dword0_symbol
=
48 "SCRATCH_RSRC_DWORD0";
50 static const char *scratch_rsrc_dword1_symbol
=
51 "SCRATCH_RSRC_DWORD1";
53 struct si_shader_output_values
55 LLVMValueRef values
[4];
56 unsigned semantic_name
;
57 unsigned semantic_index
;
58 ubyte vertex_stream
[4];
62 * Used to collect types and other info about arguments of the LLVM function
63 * before the function is created.
65 struct si_function_info
{
66 LLVMTypeRef types
[100];
67 LLVMValueRef
*assign
[100];
68 unsigned num_sgpr_params
;
77 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
78 struct si_screen
*sscreen
,
79 LLVMTargetMachineRef tm
);
81 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
82 struct lp_build_tgsi_context
*bld_base
,
83 struct lp_build_emit_data
*emit_data
);
85 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
88 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
89 union si_shader_part_key
*key
);
90 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
91 union si_shader_part_key
*key
);
92 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
97 /* Ideally pass the sample mask input to the PS epilog as v14, which
98 * is its usual location, so that the shader doesn't have to add v_mov.
100 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
102 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
105 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
111 static bool is_merged_shader(struct si_shader
*shader
)
113 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
116 return shader
->key
.as_ls
||
118 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
119 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
122 static void si_init_function_info(struct si_function_info
*fninfo
)
124 fninfo
->num_params
= 0;
125 fninfo
->num_sgpr_params
= 0;
128 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
,
130 LLVMValueRef
*assign
)
132 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
134 unsigned idx
= fninfo
->num_params
++;
135 assert(idx
< ARRAY_SIZE(fninfo
->types
));
137 if (regfile
== ARG_SGPR
)
138 fninfo
->num_sgpr_params
= fninfo
->num_params
;
140 fninfo
->types
[idx
] = type
;
141 fninfo
->assign
[idx
] = assign
;
145 static unsigned add_arg(struct si_function_info
*fninfo
,
146 enum si_arg_regfile regfile
, LLVMTypeRef type
)
148 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
151 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
152 enum si_arg_regfile regfile
, LLVMTypeRef type
,
153 LLVMValueRef
*assign
, unsigned idx
)
155 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
156 assert(actual
== idx
);
159 static void add_arg_checked(struct si_function_info
*fninfo
,
160 enum si_arg_regfile regfile
, LLVMTypeRef type
,
163 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
167 * Returns a unique index for a per-patch semantic name and index. The index
168 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
171 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
173 switch (semantic_name
) {
174 case TGSI_SEMANTIC_TESSOUTER
:
176 case TGSI_SEMANTIC_TESSINNER
:
178 case TGSI_SEMANTIC_PATCH
:
183 assert(!"invalid semantic name");
189 * Returns a unique index for a semantic name and index. The index must be
190 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
193 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
195 switch (semantic_name
) {
196 case TGSI_SEMANTIC_POSITION
:
198 case TGSI_SEMANTIC_GENERIC
:
199 /* Since some shader stages use the the highest used IO index
200 * to determine the size to allocate for inputs/outputs
201 * (in LDS, tess and GS rings). GENERIC should be placed right
202 * after POSITION to make that size as small as possible.
204 if (index
< SI_MAX_IO_GENERIC
)
207 assert(!"invalid generic index");
209 case TGSI_SEMANTIC_PSIZE
:
210 return SI_MAX_IO_GENERIC
+ 1;
211 case TGSI_SEMANTIC_CLIPDIST
:
213 return SI_MAX_IO_GENERIC
+ 2 + index
;
214 case TGSI_SEMANTIC_FOG
:
215 return SI_MAX_IO_GENERIC
+ 4;
216 case TGSI_SEMANTIC_LAYER
:
217 return SI_MAX_IO_GENERIC
+ 5;
218 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
219 return SI_MAX_IO_GENERIC
+ 6;
220 case TGSI_SEMANTIC_PRIMID
:
221 return SI_MAX_IO_GENERIC
+ 7;
222 case TGSI_SEMANTIC_COLOR
: /* these alias */
223 case TGSI_SEMANTIC_BCOLOR
:
225 return SI_MAX_IO_GENERIC
+ 8 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
229 return SI_MAX_IO_GENERIC
+ 10 + index
;
231 assert(!"invalid semantic name");
237 * Get the value of a shader input parameter and extract a bitfield.
239 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
240 LLVMValueRef value
, unsigned rshift
,
243 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
244 value
= ac_to_integer(&ctx
->ac
, value
);
247 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
248 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
250 if (rshift
+ bitwidth
< 32) {
251 unsigned mask
= (1 << bitwidth
) - 1;
252 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
253 LLVMConstInt(ctx
->i32
, mask
, 0), "");
259 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
260 unsigned param
, unsigned rshift
,
263 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
265 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
268 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
271 case PIPE_SHADER_TESS_CTRL
:
272 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
274 case PIPE_SHADER_TESS_EVAL
:
275 return LLVMGetParam(ctx
->main_fn
,
276 ctx
->param_tes_rel_patch_id
);
284 /* Tessellation shaders pass outputs to the next shader using LDS.
286 * LS outputs = TCS inputs
287 * TCS outputs = TES inputs
290 * - TCS inputs for patch 0
291 * - TCS inputs for patch 1
292 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
294 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
295 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
296 * - TCS outputs for patch 1
297 * - Per-patch TCS outputs for patch 1
298 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
299 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
302 * All three shaders VS(LS), TCS, TES share the same LDS space.
306 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
308 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
311 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
313 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
315 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
316 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
318 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
321 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
323 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
325 return LLVMConstInt(ctx
->i32
, stride
, 0);
328 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
330 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
331 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
333 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
334 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
335 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
336 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
337 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
338 num_patch_outputs
* 4;
339 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
343 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
345 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
347 ctx
->param_tcs_out_lds_offsets
,
353 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
355 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
357 ctx
->param_tcs_out_lds_offsets
,
363 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
365 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
366 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
368 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
372 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
374 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
375 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
376 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
378 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
379 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
385 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
387 LLVMValueRef patch0_patch_data_offset
=
388 get_tcs_out_patch0_patch_data_offset(ctx
);
389 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
390 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
392 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
393 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
398 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
400 unsigned tcs_out_vertices
=
401 ctx
->shader
->selector
?
402 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
404 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
405 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
406 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
408 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
411 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
416 case PIPE_SHADER_VERTEX
:
417 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
418 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
420 case PIPE_SHADER_TESS_CTRL
:
421 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
422 ctx
->shader
->is_monolithic
) {
423 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
424 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
426 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
434 static LLVMValueRef
get_instance_index_for_fetch(
435 struct si_shader_context
*ctx
,
436 unsigned param_start_instance
, LLVMValueRef divisor
)
438 LLVMValueRef result
= ctx
->abi
.instance_id
;
440 /* The division must be done before START_INSTANCE is added. */
441 if (divisor
!= ctx
->i32_1
)
442 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
444 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
445 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
448 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
450 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
452 unsigned double_index
)
454 LLVMBuilderRef builder
= ctx
->ac
.builder
;
455 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
456 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
457 LLVMVectorType(f64
, 2), "");
458 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
459 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
460 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
463 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
464 LLVMValueRef i32
, unsigned index
)
469 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
470 LLVMConstInt(ctx
->i32
, 16, 0), "");
472 return LLVMBuildSExt(ctx
->ac
.builder
,
473 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
478 void si_llvm_load_input_vs(
479 struct si_shader_context
*ctx
,
480 unsigned input_index
,
483 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
484 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
486 if (vs_blit_property
) {
487 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
488 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
489 LLVMIntULE
, vertex_id
,
491 /* Use LLVMIntNE, because we have 3 vertices and only
492 * the middle one should use y2.
494 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
495 LLVMIntNE
, vertex_id
,
498 if (input_index
== 0) {
500 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
);
502 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
503 ctx
->param_vs_blit_inputs
+ 1);
505 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
506 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
507 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
508 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
510 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
512 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
515 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
516 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
517 out
[2] = LLVMGetParam(ctx
->main_fn
,
518 ctx
->param_vs_blit_inputs
+ 2);
519 out
[3] = ctx
->ac
.f32_1
;
523 /* Color or texture coordinates: */
524 assert(input_index
== 1);
526 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
527 for (int i
= 0; i
< 4; i
++) {
528 out
[i
] = LLVMGetParam(ctx
->main_fn
,
529 ctx
->param_vs_blit_inputs
+ 3 + i
);
532 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
533 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
534 ctx
->param_vs_blit_inputs
+ 3);
535 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
536 ctx
->param_vs_blit_inputs
+ 4);
537 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
538 ctx
->param_vs_blit_inputs
+ 5);
539 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
540 ctx
->param_vs_blit_inputs
+ 6);
542 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
544 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
546 out
[2] = LLVMGetParam(ctx
->main_fn
,
547 ctx
->param_vs_blit_inputs
+ 7);
548 out
[3] = LLVMGetParam(ctx
->main_fn
,
549 ctx
->param_vs_blit_inputs
+ 8);
556 unsigned num_fetches
;
557 unsigned fetch_stride
;
558 unsigned num_channels
;
560 LLVMValueRef t_list_ptr
;
561 LLVMValueRef t_offset
;
563 LLVMValueRef vertex_index
;
564 LLVMValueRef input
[3];
566 /* Load the T list */
567 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
569 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
571 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
573 vertex_index
= LLVMGetParam(ctx
->main_fn
,
574 ctx
->param_vertex_index0
+
577 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
579 /* Do multiple loads for special formats. */
581 case SI_FIX_FETCH_RGB_64_FLOAT
:
582 num_fetches
= 3; /* 3 2-dword loads */
586 case SI_FIX_FETCH_RGBA_64_FLOAT
:
587 num_fetches
= 2; /* 2 4-dword loads */
591 case SI_FIX_FETCH_RGB_8
:
592 case SI_FIX_FETCH_RGB_8_INT
:
597 case SI_FIX_FETCH_RGB_16
:
598 case SI_FIX_FETCH_RGB_16_INT
:
606 num_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
609 for (unsigned i
= 0; i
< num_fetches
; i
++) {
610 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
612 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
613 vertex_index
, voffset
,
614 num_channels
, false, true);
615 input
[i
] = ac_build_expand_to_vec4(&ctx
->ac
, input
[i
], num_channels
);
618 /* Break up the vec4 into individual components */
619 for (chan
= 0; chan
< 4; chan
++) {
620 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
621 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
622 input
[0], llvm_chan
, "");
626 case SI_FIX_FETCH_A2_SNORM
:
627 case SI_FIX_FETCH_A2_SSCALED
:
628 case SI_FIX_FETCH_A2_SINT
: {
629 /* The hardware returns an unsigned value; convert it to a
632 LLVMValueRef tmp
= out
[3];
633 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
635 /* First, recover the sign-extended signed integer value. */
636 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
637 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
639 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
641 /* For the integer-like cases, do a natural sign extension.
643 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
644 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
647 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
648 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
649 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
650 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
652 /* Convert back to the right type. */
653 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
655 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
656 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
657 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
658 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
659 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
660 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
666 case SI_FIX_FETCH_RGBA_32_UNORM
:
667 case SI_FIX_FETCH_RGBX_32_UNORM
:
668 for (chan
= 0; chan
< 4; chan
++) {
669 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
670 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
671 out
[chan
], ctx
->f32
, "");
672 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
673 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
675 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
676 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
677 out
[3] = LLVMConstReal(ctx
->f32
, 1);
679 case SI_FIX_FETCH_RGBA_32_SNORM
:
680 case SI_FIX_FETCH_RGBX_32_SNORM
:
681 case SI_FIX_FETCH_RGBA_32_FIXED
:
682 case SI_FIX_FETCH_RGBX_32_FIXED
: {
684 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
685 scale
= 1.0 / 0x10000;
687 scale
= 1.0 / INT_MAX
;
689 for (chan
= 0; chan
< 4; chan
++) {
690 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
691 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
692 out
[chan
], ctx
->f32
, "");
693 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
694 LLVMConstReal(ctx
->f32
, scale
), "");
696 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
697 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
698 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
699 out
[3] = LLVMConstReal(ctx
->f32
, 1);
702 case SI_FIX_FETCH_RGBA_32_USCALED
:
703 for (chan
= 0; chan
< 4; chan
++) {
704 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
705 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
706 out
[chan
], ctx
->f32
, "");
709 case SI_FIX_FETCH_RGBA_32_SSCALED
:
710 for (chan
= 0; chan
< 4; chan
++) {
711 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
712 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
713 out
[chan
], ctx
->f32
, "");
716 case SI_FIX_FETCH_RG_64_FLOAT
:
717 for (chan
= 0; chan
< 2; chan
++)
718 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
720 out
[2] = LLVMConstReal(ctx
->f32
, 0);
721 out
[3] = LLVMConstReal(ctx
->f32
, 1);
723 case SI_FIX_FETCH_RGB_64_FLOAT
:
724 for (chan
= 0; chan
< 3; chan
++)
725 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
727 out
[3] = LLVMConstReal(ctx
->f32
, 1);
729 case SI_FIX_FETCH_RGBA_64_FLOAT
:
730 for (chan
= 0; chan
< 4; chan
++) {
731 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
735 case SI_FIX_FETCH_RGB_8
:
736 case SI_FIX_FETCH_RGB_8_INT
:
737 case SI_FIX_FETCH_RGB_16
:
738 case SI_FIX_FETCH_RGB_16_INT
:
739 for (chan
= 0; chan
< 3; chan
++) {
740 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
744 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
745 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
746 out
[3] = LLVMConstReal(ctx
->f32
, 1);
748 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
754 static void declare_input_vs(
755 struct si_shader_context
*ctx
,
756 unsigned input_index
,
757 const struct tgsi_full_declaration
*decl
,
760 si_llvm_load_input_vs(ctx
, input_index
, out
);
763 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
770 case PIPE_SHADER_VERTEX
:
771 return LLVMGetParam(ctx
->main_fn
,
772 ctx
->param_vs_prim_id
);
773 case PIPE_SHADER_TESS_CTRL
:
774 return ctx
->abi
.tcs_patch_id
;
775 case PIPE_SHADER_TESS_EVAL
:
776 return ctx
->abi
.tes_patch_id
;
777 case PIPE_SHADER_GEOMETRY
:
778 return ctx
->abi
.gs_prim_id
;
786 * Return the value of tgsi_ind_register for indexing.
787 * This is the indirect index with the constant offset added to it.
789 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
790 const struct tgsi_ind_register
*ind
,
796 if (ind
->File
== TGSI_FILE_ADDRESS
) {
797 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
798 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
800 struct tgsi_full_src_register src
= {};
802 src
.Register
.File
= ind
->File
;
803 src
.Register
.Index
= ind
->Index
;
805 /* Set the second index to 0 for constants. */
806 if (ind
->File
== TGSI_FILE_CONSTANT
)
807 src
.Register
.Dimension
= 1;
809 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
812 result
= ac_to_integer(&ctx
->ac
, result
);
816 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
817 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
818 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
819 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
824 * Like si_get_indirect_index, but restricts the return value to a (possibly
825 * undefined) value inside [0..num).
827 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
828 const struct tgsi_ind_register
*ind
,
829 int rel_index
, unsigned num
)
831 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
833 return si_llvm_bound_index(ctx
, result
, num
);
836 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
837 LLVMValueRef vertex_dw_stride
,
838 LLVMValueRef base_addr
,
839 LLVMValueRef vertex_index
,
840 LLVMValueRef param_index
,
841 unsigned input_index
,
846 if (vertex_dw_stride
) {
847 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
848 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
849 vertex_dw_stride
, ""), "");
853 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
854 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
855 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
858 int param
= is_patch
?
859 si_shader_io_get_unique_index_patch(name
[input_index
],
860 index
[input_index
]) :
861 si_shader_io_get_unique_index(name
[input_index
],
864 /* Add the base address of the element. */
865 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
866 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
870 * Calculate a dword address given an input or output register and a stride.
872 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
873 const struct tgsi_full_dst_register
*dst
,
874 const struct tgsi_full_src_register
*src
,
875 LLVMValueRef vertex_dw_stride
,
876 LLVMValueRef base_addr
)
878 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
879 ubyte
*name
, *index
, *array_first
;
881 struct tgsi_full_dst_register reg
;
882 LLVMValueRef vertex_index
= NULL
;
883 LLVMValueRef ind_index
= NULL
;
885 /* Set the register description. The address computation is the same
886 * for sources and destinations. */
888 reg
.Register
.File
= src
->Register
.File
;
889 reg
.Register
.Index
= src
->Register
.Index
;
890 reg
.Register
.Indirect
= src
->Register
.Indirect
;
891 reg
.Register
.Dimension
= src
->Register
.Dimension
;
892 reg
.Indirect
= src
->Indirect
;
893 reg
.Dimension
= src
->Dimension
;
894 reg
.DimIndirect
= src
->DimIndirect
;
898 /* If the register is 2-dimensional (e.g. an array of vertices
899 * in a primitive), calculate the base address of the vertex. */
900 if (reg
.Register
.Dimension
) {
901 if (reg
.Dimension
.Indirect
)
902 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
903 1, reg
.Dimension
.Index
);
905 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
908 /* Get information about the register. */
909 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
910 name
= info
->input_semantic_name
;
911 index
= info
->input_semantic_index
;
912 array_first
= info
->input_array_first
;
913 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
914 name
= info
->output_semantic_name
;
915 index
= info
->output_semantic_index
;
916 array_first
= info
->output_array_first
;
922 if (reg
.Register
.Indirect
) {
923 /* Add the relative address of the element. */
924 if (reg
.Indirect
.ArrayID
)
925 input_index
= array_first
[reg
.Indirect
.ArrayID
];
927 input_index
= reg
.Register
.Index
;
929 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
930 1, reg
.Register
.Index
- input_index
);
932 input_index
= reg
.Register
.Index
;
935 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
936 base_addr
, vertex_index
,
937 ind_index
, input_index
,
939 !reg
.Register
.Dimension
);
942 /* The offchip buffer layout for TCS->TES is
944 * - attribute 0 of patch 0 vertex 0
945 * - attribute 0 of patch 0 vertex 1
946 * - attribute 0 of patch 0 vertex 2
948 * - attribute 0 of patch 1 vertex 0
949 * - attribute 0 of patch 1 vertex 1
951 * - attribute 1 of patch 0 vertex 0
952 * - attribute 1 of patch 0 vertex 1
954 * - per patch attribute 0 of patch 0
955 * - per patch attribute 0 of patch 1
958 * Note that every attribute has 4 components.
960 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
961 LLVMValueRef rel_patch_id
,
962 LLVMValueRef vertex_index
,
963 LLVMValueRef param_index
)
965 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
966 LLVMValueRef param_stride
, constant16
;
968 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
969 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
970 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
973 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
975 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
976 vertices_per_patch
, "");
978 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
981 param_stride
= total_vertices
;
983 base_addr
= rel_patch_id
;
984 param_stride
= num_patches
;
987 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
988 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
989 param_stride
, ""), "");
991 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
994 LLVMValueRef patch_data_offset
=
995 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
997 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
998 patch_data_offset
, "");
1003 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1004 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1005 struct si_shader_context
*ctx
,
1006 LLVMValueRef vertex_index
,
1007 LLVMValueRef param_index
,
1008 unsigned param_base
,
1013 unsigned param_index_base
;
1015 param_index_base
= is_patch
?
1016 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1017 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]);
1020 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1021 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1024 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1027 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1028 vertex_index
, param_index
);
1031 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1032 struct si_shader_context
*ctx
,
1033 const struct tgsi_full_dst_register
*dst
,
1034 const struct tgsi_full_src_register
*src
)
1036 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1037 ubyte
*name
, *index
, *array_first
;
1038 struct tgsi_full_src_register reg
;
1039 LLVMValueRef vertex_index
= NULL
;
1040 LLVMValueRef param_index
= NULL
;
1041 unsigned param_base
;
1043 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1045 if (reg
.Register
.Dimension
) {
1047 if (reg
.Dimension
.Indirect
)
1048 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1049 1, reg
.Dimension
.Index
);
1051 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1054 /* Get information about the register. */
1055 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1056 name
= info
->input_semantic_name
;
1057 index
= info
->input_semantic_index
;
1058 array_first
= info
->input_array_first
;
1059 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1060 name
= info
->output_semantic_name
;
1061 index
= info
->output_semantic_index
;
1062 array_first
= info
->output_array_first
;
1068 if (reg
.Register
.Indirect
) {
1069 if (reg
.Indirect
.ArrayID
)
1070 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1072 param_base
= reg
.Register
.Index
;
1074 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1075 1, reg
.Register
.Index
- param_base
);
1078 param_base
= reg
.Register
.Index
;
1081 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1082 param_index
, param_base
,
1083 name
, index
, !reg
.Register
.Dimension
);
1086 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1087 LLVMTypeRef type
, unsigned swizzle
,
1088 LLVMValueRef buffer
, LLVMValueRef offset
,
1089 LLVMValueRef base
, bool can_speculate
)
1091 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1092 LLVMValueRef value
, value2
;
1093 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1095 if (swizzle
== ~0) {
1096 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1097 0, 1, 0, can_speculate
, false);
1099 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1102 if (!llvm_type_is_64bit(ctx
, type
)) {
1103 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1104 0, 1, 0, can_speculate
, false);
1106 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1107 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1108 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1111 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1112 swizzle
* 4, 1, 0, can_speculate
, false);
1114 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1115 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1117 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1123 * \param type output value type
1124 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1125 * \param dw_addr address in dwords
1127 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1128 LLVMTypeRef type
, unsigned swizzle
,
1129 LLVMValueRef dw_addr
)
1131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1134 if (swizzle
== ~0) {
1135 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1137 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1138 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1140 return lp_build_gather_values(&ctx
->gallivm
, values
,
1144 /* Split 64-bit loads. */
1145 if (llvm_type_is_64bit(ctx
, type
)) {
1146 LLVMValueRef lo
, hi
;
1148 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1149 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1150 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1153 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1154 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1156 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1158 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1164 * \param swizzle offset (typically 0..3)
1165 * \param dw_addr address in dwords
1166 * \param value value to store
1168 static void lds_store(struct si_shader_context
*ctx
,
1169 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1172 dw_addr
= lp_build_add(&ctx
->bld_base
.uint_bld
, dw_addr
,
1173 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1175 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1180 TESS_OFFCHIP_RING_TCS
,
1181 TESS_OFFCHIP_RING_TES
,
1184 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1185 enum si_tess_ring ring
)
1187 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1188 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1189 ctx
->param_tcs_out_lds_layout
;
1190 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1192 /* TCS only receives high 13 bits of the address. */
1193 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1194 addr
= LLVMBuildAnd(builder
, addr
,
1195 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1198 if (ring
== TCS_FACTOR_RING
) {
1199 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1200 addr
= LLVMBuildAdd(builder
, addr
,
1201 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1204 LLVMValueRef desc
[4];
1206 desc
[1] = LLVMConstInt(ctx
->i32
,
1207 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1208 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1209 desc
[3] = LLVMConstInt(ctx
->i32
,
1210 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1211 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1212 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1213 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1214 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1215 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1217 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1220 static LLVMValueRef
fetch_input_tcs(
1221 struct lp_build_tgsi_context
*bld_base
,
1222 const struct tgsi_full_src_register
*reg
,
1223 enum tgsi_opcode_type type
, unsigned swizzle
)
1225 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1226 LLVMValueRef dw_addr
, stride
;
1228 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1229 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1230 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1232 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1235 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1237 LLVMValueRef vertex_index
,
1238 LLVMValueRef param_index
,
1239 unsigned const_index
,
1241 unsigned driver_location
,
1243 unsigned num_components
,
1248 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1249 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1250 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1251 LLVMValueRef dw_addr
, stride
;
1253 driver_location
= driver_location
/ 4;
1256 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1257 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1261 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1263 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1264 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1269 /* Add the constant index to the indirect index */
1270 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1271 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1273 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1279 names
= info
->input_semantic_name
;
1280 indices
= info
->input_semantic_index
;
1282 names
= info
->output_semantic_name
;
1283 indices
= info
->output_semantic_index
;
1286 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1287 vertex_index
, param_index
,
1292 LLVMValueRef value
[4];
1293 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
1294 value
[i
] = lds_load(bld_base
, type
, i
, dw_addr
);
1297 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1300 static LLVMValueRef
fetch_output_tcs(
1301 struct lp_build_tgsi_context
*bld_base
,
1302 const struct tgsi_full_src_register
*reg
,
1303 enum tgsi_opcode_type type
, unsigned swizzle
)
1305 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1306 LLVMValueRef dw_addr
, stride
;
1308 if (reg
->Register
.Dimension
) {
1309 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1310 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1311 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1313 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1314 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1317 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1320 static LLVMValueRef
fetch_input_tes(
1321 struct lp_build_tgsi_context
*bld_base
,
1322 const struct tgsi_full_src_register
*reg
,
1323 enum tgsi_opcode_type type
, unsigned swizzle
)
1325 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1326 LLVMValueRef base
, addr
;
1328 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1329 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1331 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1332 ctx
->tess_offchip_ring
, base
, addr
, true);
1335 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1337 LLVMValueRef vertex_index
,
1338 LLVMValueRef param_index
,
1339 unsigned const_index
,
1341 unsigned driver_location
,
1343 unsigned num_components
,
1348 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1349 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1350 LLVMValueRef base
, addr
;
1352 driver_location
= driver_location
/ 4;
1354 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1357 /* Add the constant index to the indirect index */
1358 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1359 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1361 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1364 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1365 param_index
, driver_location
,
1366 info
->input_semantic_name
,
1367 info
->input_semantic_index
,
1370 /* TODO: This will generate rather ordinary llvm code, although it
1371 * should be easy for the optimiser to fix up. In future we might want
1372 * to refactor buffer_load(), but for now this maximises code sharing
1373 * between the NIR and TGSI backends.
1375 LLVMValueRef value
[4];
1376 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
1377 value
[i
] = buffer_load(&ctx
->bld_base
, type
, i
,
1378 ctx
->tess_offchip_ring
, base
, addr
, true);
1381 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1384 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1385 const struct tgsi_full_instruction
*inst
,
1386 const struct tgsi_opcode_info
*info
,
1388 LLVMValueRef dst
[4])
1390 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1391 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1392 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1393 unsigned chan_index
;
1394 LLVMValueRef dw_addr
, stride
;
1395 LLVMValueRef buffer
, base
, buf_addr
;
1396 LLVMValueRef values
[4];
1397 bool skip_lds_store
;
1398 bool is_tess_factor
= false, is_tess_inner
= false;
1400 /* Only handle per-patch and per-vertex outputs here.
1401 * Vectors will be lowered to scalars and this function will be called again.
1403 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1404 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1405 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1409 if (reg
->Register
.Dimension
) {
1410 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1411 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1412 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1413 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1415 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1416 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1417 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1419 if (!reg
->Register
.Indirect
) {
1420 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1422 /* Always write tess factors into LDS for the TCS epilog. */
1423 if (name
== TGSI_SEMANTIC_TESSINNER
||
1424 name
== TGSI_SEMANTIC_TESSOUTER
) {
1425 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1426 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1427 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1428 is_tess_factor
= true;
1429 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1434 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1436 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1437 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1439 uint32_t writemask
= reg
->Register
.WriteMask
;
1441 chan_index
= u_bit_scan(&writemask
);
1442 LLVMValueRef value
= dst
[chan_index
];
1444 if (inst
->Instruction
.Saturate
)
1445 value
= ac_build_clamp(&ctx
->ac
, value
);
1447 /* Skip LDS stores if there is no LDS read of this output. */
1448 if (!skip_lds_store
)
1449 lds_store(ctx
, chan_index
, dw_addr
, value
);
1451 value
= ac_to_integer(&ctx
->ac
, value
);
1452 values
[chan_index
] = value
;
1454 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1455 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1457 4 * chan_index
, 1, 0, true, false);
1460 /* Write tess factors into VGPRs for the epilog. */
1461 if (is_tess_factor
&&
1462 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1463 if (!is_tess_inner
) {
1464 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1465 ctx
->invoc0_tess_factors
[chan_index
]);
1466 } else if (chan_index
< 2) {
1467 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1468 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1473 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1474 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1476 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1477 base
, 0, 1, 0, true, false);
1481 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1482 LLVMValueRef vertex_index
,
1483 LLVMValueRef param_index
,
1484 unsigned const_index
,
1486 unsigned driver_location
,
1493 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1494 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1495 LLVMValueRef dw_addr
, stride
;
1496 LLVMValueRef buffer
, base
, addr
;
1497 LLVMValueRef values
[4];
1498 bool skip_lds_store
;
1499 bool is_tess_factor
= false, is_tess_inner
= false;
1501 driver_location
= driver_location
/ 4;
1504 /* Add the constant index to the indirect index */
1505 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1506 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1508 if (const_index
!= 0)
1509 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1513 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1514 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1515 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1516 vertex_index
, param_index
,
1518 info
->output_semantic_name
,
1519 info
->output_semantic_index
,
1522 skip_lds_store
= !info
->reads_pervertex_outputs
;
1524 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1525 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1526 vertex_index
, param_index
,
1528 info
->output_semantic_name
,
1529 info
->output_semantic_index
,
1532 skip_lds_store
= !info
->reads_perpatch_outputs
;
1535 int name
= info
->output_semantic_name
[driver_location
];
1537 /* Always write tess factors into LDS for the TCS epilog. */
1538 if (name
== TGSI_SEMANTIC_TESSINNER
||
1539 name
== TGSI_SEMANTIC_TESSOUTER
) {
1540 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1541 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1542 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1543 is_tess_factor
= true;
1544 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1549 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1551 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1553 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1554 param_index
, driver_location
,
1555 info
->output_semantic_name
,
1556 info
->output_semantic_index
,
1559 for (unsigned chan
= 0; chan
< 4; chan
++) {
1560 if (!(writemask
& (1 << chan
)))
1562 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1564 /* Skip LDS stores if there is no LDS read of this output. */
1565 if (!skip_lds_store
)
1566 lds_store(ctx
, chan
, dw_addr
, value
);
1568 value
= ac_to_integer(&ctx
->ac
, value
);
1569 values
[chan
] = value
;
1571 if (writemask
!= 0xF && !is_tess_factor
) {
1572 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1574 4 * chan
, 1, 0, true, false);
1577 /* Write tess factors into VGPRs for the epilog. */
1578 if (is_tess_factor
&&
1579 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1580 if (!is_tess_inner
) {
1581 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1582 ctx
->invoc0_tess_factors
[chan
]);
1583 } else if (chan
< 2) {
1584 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1585 ctx
->invoc0_tess_factors
[4 + chan
]);
1590 if (writemask
== 0xF && !is_tess_factor
) {
1591 LLVMValueRef value
= lp_build_gather_values(&ctx
->gallivm
,
1593 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1594 base
, 0, 1, 0, true, false);
1598 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1599 unsigned input_index
,
1600 unsigned vtx_offset_param
,
1604 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1605 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1606 struct si_shader
*shader
= ctx
->shader
;
1607 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1608 LLVMValueRef vtx_offset
, soffset
;
1609 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1610 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1611 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1615 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1617 /* GFX9 has the ESGS ring in LDS. */
1618 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1619 unsigned index
= vtx_offset_param
;
1621 switch (index
/ 2) {
1623 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1624 index
% 2 ? 16 : 0, 16);
1627 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1628 index
% 2 ? 16 : 0, 16);
1631 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1632 index
% 2 ? 16 : 0, 16);
1639 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1640 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1641 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1644 /* GFX6: input load from the ESGS ring in memory. */
1645 if (swizzle
== ~0) {
1646 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1648 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1649 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1652 return lp_build_gather_values(&ctx
->gallivm
, values
,
1656 /* Get the vertex offset parameter on GFX6. */
1657 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1659 vtx_offset
= lp_build_mul_imm(uint
, gs_vtx_offset
, 4);
1661 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1663 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1664 vtx_offset
, soffset
, 0, 1, 0, true, false);
1665 if (llvm_type_is_64bit(ctx
, type
)) {
1666 LLVMValueRef value2
;
1667 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1669 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1670 ctx
->i32_0
, vtx_offset
, soffset
,
1671 0, 1, 0, true, false);
1672 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1674 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1677 static LLVMValueRef
fetch_input_gs(
1678 struct lp_build_tgsi_context
*bld_base
,
1679 const struct tgsi_full_src_register
*reg
,
1680 enum tgsi_opcode_type type
,
1683 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1684 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1686 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1687 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1688 return get_primitive_id(ctx
, swizzle
);
1690 if (!reg
->Register
.Dimension
)
1693 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1694 reg
->Dimension
.Index
,
1695 tgsi2llvmtype(bld_base
, type
),
1699 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1701 switch (interpolate
) {
1702 case TGSI_INTERPOLATE_CONSTANT
:
1705 case TGSI_INTERPOLATE_LINEAR
:
1706 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1707 return SI_PARAM_LINEAR_SAMPLE
;
1708 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1709 return SI_PARAM_LINEAR_CENTROID
;
1711 return SI_PARAM_LINEAR_CENTER
;
1713 case TGSI_INTERPOLATE_COLOR
:
1714 case TGSI_INTERPOLATE_PERSPECTIVE
:
1715 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1716 return SI_PARAM_PERSP_SAMPLE
;
1717 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1718 return SI_PARAM_PERSP_CENTROID
;
1720 return SI_PARAM_PERSP_CENTER
;
1723 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1728 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1729 unsigned attr_index
, unsigned chan
,
1730 LLVMValueRef prim_mask
,
1731 LLVMValueRef i
, LLVMValueRef j
)
1734 return ac_build_fs_interp(&ctx
->ac
,
1735 LLVMConstInt(ctx
->i32
, chan
, 0),
1736 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1739 return ac_build_fs_interp_mov(&ctx
->ac
,
1740 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1741 LLVMConstInt(ctx
->i32
, chan
, 0),
1742 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1747 * Interpolate a fragment shader input.
1749 * @param ctx context
1750 * @param input_index index of the input in hardware
1751 * @param semantic_name TGSI_SEMANTIC_*
1752 * @param semantic_index semantic index
1753 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1754 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1755 * @param interp_param interpolation weights (i,j)
1756 * @param prim_mask SI_PARAM_PRIM_MASK
1757 * @param face SI_PARAM_FRONT_FACE
1758 * @param result the return value (4 components)
1760 static void interp_fs_input(struct si_shader_context
*ctx
,
1761 unsigned input_index
,
1762 unsigned semantic_name
,
1763 unsigned semantic_index
,
1764 unsigned num_interp_inputs
,
1765 unsigned colors_read_mask
,
1766 LLVMValueRef interp_param
,
1767 LLVMValueRef prim_mask
,
1769 LLVMValueRef result
[4])
1771 LLVMValueRef i
= NULL
, j
= NULL
;
1774 /* fs.constant returns the param from the middle vertex, so it's not
1775 * really useful for flat shading. It's meant to be used for custom
1776 * interpolation (but the intrinsic can't fetch from the other two
1779 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1780 * to do the right thing. The only reason we use fs.constant is that
1781 * fs.interp cannot be used on integers, because they can be equal
1784 * When interp is false we will use fs.constant or for newer llvm,
1785 * amdgcn.interp.mov.
1787 bool interp
= interp_param
!= NULL
;
1790 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1791 LLVMVectorType(ctx
->f32
, 2), "");
1793 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1795 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1799 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1800 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1801 LLVMValueRef is_face_positive
;
1803 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1804 * otherwise it's at offset "num_inputs".
1806 unsigned back_attr_offset
= num_interp_inputs
;
1807 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1808 back_attr_offset
+= 1;
1810 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1811 face
, ctx
->i32_0
, "");
1813 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1814 LLVMValueRef front
, back
;
1816 front
= si_build_fs_interp(ctx
,
1819 back
= si_build_fs_interp(ctx
,
1820 back_attr_offset
, chan
,
1823 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1829 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1830 result
[0] = si_build_fs_interp(ctx
, input_index
,
1831 0, prim_mask
, i
, j
);
1833 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1834 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1836 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1837 result
[chan
] = si_build_fs_interp(ctx
,
1844 void si_llvm_load_input_fs(
1845 struct si_shader_context
*ctx
,
1846 unsigned input_index
,
1847 LLVMValueRef out
[4])
1849 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1850 struct si_shader
*shader
= ctx
->shader
;
1851 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1852 LLVMValueRef main_fn
= ctx
->main_fn
;
1853 LLVMValueRef interp_param
= NULL
;
1854 int interp_param_idx
;
1855 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1856 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1857 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1858 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1860 /* Get colors from input VGPRs (set by the prolog). */
1861 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1862 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1863 unsigned mask
= colors_read
>> (semantic_index
* 4);
1864 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1865 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1867 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1868 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1869 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1870 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1874 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1875 if (interp_param_idx
== -1)
1877 else if (interp_param_idx
) {
1878 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1881 interp_fs_input(ctx
, input_index
, semantic_name
,
1882 semantic_index
, 0, /* this param is unused */
1883 shader
->selector
->info
.colors_read
, interp_param
,
1885 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1889 static void declare_input_fs(
1890 struct si_shader_context
*ctx
,
1891 unsigned input_index
,
1892 const struct tgsi_full_declaration
*decl
,
1893 LLVMValueRef out
[4])
1895 si_llvm_load_input_fs(ctx
, input_index
, out
);
1898 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1900 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1903 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1905 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1907 LLVMValueRef values
[3];
1908 LLVMValueRef result
;
1910 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1912 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1913 unsigned sizes
[3] = {
1914 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1915 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1916 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1919 for (i
= 0; i
< 3; ++i
)
1920 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1922 result
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
1924 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1931 * Load a dword from a constant buffer.
1933 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1934 LLVMValueRef resource
,
1935 LLVMValueRef offset
)
1937 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1938 0, 0, 0, true, true);
1941 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1943 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1944 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1945 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1946 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1947 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1949 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1950 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1951 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1953 LLVMValueRef pos
[4] = {
1954 buffer_load_const(ctx
, resource
, offset0
),
1955 buffer_load_const(ctx
, resource
, offset1
),
1956 LLVMConstReal(ctx
->f32
, 0),
1957 LLVMConstReal(ctx
->f32
, 0)
1960 return lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
1963 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1965 return abi
->sample_coverage
;
1968 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1970 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1971 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1973 LLVMValueRef coord
[4] = {
1974 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1975 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1980 /* For triangles, the vector should be (u, v, 1-u-v). */
1981 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1982 PIPE_PRIM_TRIANGLES
)
1983 coord
[2] = lp_build_sub(bld
, ctx
->ac
.f32_1
,
1984 lp_build_add(bld
, coord
[0], coord
[1]));
1986 return lp_build_gather_values(&ctx
->gallivm
, coord
, 4);
1989 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1990 unsigned semantic_name
)
1992 LLVMValueRef base
, addr
;
1994 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1996 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1997 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1998 LLVMConstInt(ctx
->i32
, param
, 0));
2000 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
2001 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
2005 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
2006 unsigned varying_id
)
2008 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2009 unsigned semantic_name
;
2011 switch (varying_id
) {
2012 case VARYING_SLOT_TESS_LEVEL_INNER
:
2013 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2015 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2016 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2019 unreachable("unknown tess level");
2022 return load_tess_level(ctx
, semantic_name
);
2026 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2028 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2029 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2030 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2031 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2032 return get_num_tcs_out_vertices(ctx
);
2034 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2037 void si_load_system_value(struct si_shader_context
*ctx
,
2039 const struct tgsi_full_declaration
*decl
)
2041 LLVMValueRef value
= 0;
2043 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2045 switch (decl
->Semantic
.Name
) {
2046 case TGSI_SEMANTIC_INSTANCEID
:
2047 value
= ctx
->abi
.instance_id
;
2050 case TGSI_SEMANTIC_VERTEXID
:
2051 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2053 ctx
->abi
.base_vertex
, "");
2056 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2057 /* Unused. Clarify the meaning in indexed vs. non-indexed
2058 * draws if this is ever used again. */
2062 case TGSI_SEMANTIC_BASEVERTEX
:
2064 /* For non-indexed draws, the base vertex set by the driver
2065 * (for direct draws) or the CP (for indirect draws) is the
2066 * first vertex ID, but GLSL expects 0 to be returned.
2068 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2069 LLVMValueRef indexed
;
2071 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
2072 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
2074 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
2075 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
2079 case TGSI_SEMANTIC_BASEINSTANCE
:
2080 value
= ctx
->abi
.start_instance
;
2083 case TGSI_SEMANTIC_DRAWID
:
2084 value
= ctx
->abi
.draw_id
;
2087 case TGSI_SEMANTIC_INVOCATIONID
:
2088 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2089 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2090 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2091 value
= ctx
->abi
.gs_invocation_id
;
2093 assert(!"INVOCATIONID not implemented");
2096 case TGSI_SEMANTIC_POSITION
:
2098 LLVMValueRef pos
[4] = {
2099 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2100 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2101 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2102 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
2103 LLVMGetParam(ctx
->main_fn
,
2104 SI_PARAM_POS_W_FLOAT
)),
2106 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2110 case TGSI_SEMANTIC_FACE
:
2111 value
= ctx
->abi
.front_face
;
2114 case TGSI_SEMANTIC_SAMPLEID
:
2115 value
= get_sample_id(ctx
);
2118 case TGSI_SEMANTIC_SAMPLEPOS
: {
2119 LLVMValueRef pos
[4] = {
2120 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2121 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2122 LLVMConstReal(ctx
->f32
, 0),
2123 LLVMConstReal(ctx
->f32
, 0)
2125 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2126 TGSI_OPCODE_FRC
, pos
[0]);
2127 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
2128 TGSI_OPCODE_FRC
, pos
[1]);
2129 value
= lp_build_gather_values(&ctx
->gallivm
, pos
, 4);
2133 case TGSI_SEMANTIC_SAMPLEMASK
:
2134 /* This can only occur with the OpenGL Core profile, which
2135 * doesn't support smoothing.
2137 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2140 case TGSI_SEMANTIC_TESSCOORD
:
2141 value
= si_load_tess_coord(&ctx
->abi
);
2144 case TGSI_SEMANTIC_VERTICESIN
:
2145 value
= si_load_patch_vertices_in(&ctx
->abi
);
2148 case TGSI_SEMANTIC_TESSINNER
:
2149 case TGSI_SEMANTIC_TESSOUTER
:
2150 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2153 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2154 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2156 LLVMValueRef buf
, slot
, val
[4];
2159 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2160 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2161 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2162 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2164 for (i
= 0; i
< 4; i
++)
2165 val
[i
] = buffer_load_const(ctx
, buf
,
2166 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2167 value
= lp_build_gather_values(&ctx
->gallivm
, val
, 4);
2171 case TGSI_SEMANTIC_PRIMID
:
2172 value
= get_primitive_id(ctx
, 0);
2175 case TGSI_SEMANTIC_GRID_SIZE
:
2176 value
= ctx
->abi
.num_work_groups
;
2179 case TGSI_SEMANTIC_BLOCK_SIZE
:
2180 value
= get_block_size(&ctx
->abi
);
2183 case TGSI_SEMANTIC_BLOCK_ID
:
2185 LLVMValueRef values
[3];
2187 for (int i
= 0; i
< 3; i
++) {
2188 values
[i
] = ctx
->i32_0
;
2189 if (ctx
->abi
.workgroup_ids
[i
]) {
2190 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2193 value
= lp_build_gather_values(&ctx
->gallivm
, values
, 3);
2197 case TGSI_SEMANTIC_THREAD_ID
:
2198 value
= ctx
->abi
.local_invocation_ids
;
2201 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2202 value
= lp_build_intrinsic(ctx
->ac
.builder
,
2203 "llvm.amdgcn.ps.live",
2205 LP_FUNC_ATTR_READNONE
);
2206 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2207 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2210 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2211 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2214 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2215 value
= ac_get_thread_id(&ctx
->ac
);
2218 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2220 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2221 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2222 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2223 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2227 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2228 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2229 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2230 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2232 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2233 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2234 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2235 /* All bits set except LSB */
2236 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2239 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2241 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2242 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2243 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2244 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2245 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2246 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2251 assert(!"unknown system value");
2255 ctx
->system_values
[index
] = value
;
2258 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2260 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2262 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2265 assert(!ctx
->ac
.lds
);
2267 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2268 LLVMArrayType(ctx
->i8
, sel
->local_size
),
2270 AC_LOCAL_ADDR_SPACE
);
2271 LLVMSetAlignment(var
, 4);
2273 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2276 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2277 const struct tgsi_full_declaration
*decl
)
2279 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2280 assert(decl
->Range
.First
== decl
->Range
.Last
);
2282 si_declare_compute_memory(ctx
);
2285 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2287 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2288 ctx
->param_const_and_shader_buffers
);
2290 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2291 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2294 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2296 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2297 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2299 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2300 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2301 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2303 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2307 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2309 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2310 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2311 ctx
->param_const_and_shader_buffers
);
2313 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2314 index
= LLVMBuildSub(ctx
->ac
.builder
,
2315 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2318 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2321 static LLVMValueRef
fetch_constant(
2322 struct lp_build_tgsi_context
*bld_base
,
2323 const struct tgsi_full_src_register
*reg
,
2324 enum tgsi_opcode_type type
,
2327 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2328 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2329 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2332 LLVMValueRef addr
, bufp
;
2334 if (swizzle
== LP_CHAN_ALL
) {
2336 LLVMValueRef values
[4];
2337 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2338 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2340 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
2343 /* Split 64-bit loads. */
2344 if (tgsi_type_is_64bit(type
)) {
2345 LLVMValueRef lo
, hi
;
2347 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2348 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2349 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2353 idx
= reg
->Register
.Index
* 4 + swizzle
;
2354 if (reg
->Register
.Indirect
) {
2355 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2357 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2360 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2361 if (sel
->info
.const_buffers_declared
== 1 &&
2362 sel
->info
.shader_buffers_declared
== 0) {
2364 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2366 /* This enables use of s_load_dword and flat_load_dword for const buffer 0
2367 * loads, and up to x4 load opcode merging. However, it leads to horrible
2368 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
2370 * Using s_buffer_load_dword (x1) seems to be the best option right now.
2372 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
2373 * a descriptor and s_buffer_load_dword using it, so we can't expand
2374 * the pointer into a full descriptor like below. We have to use
2375 * s_load_dword instead. The only case when LLVM 5.0 would select
2376 * s_buffer_load_dword (that we have to prevent) is when we use use
2377 * a literal offset where we don't need bounds checking.
2379 if (ctx
->screen
->info
.chip_class
== SI
&&
2380 HAVE_LLVM
< 0x0600 &&
2381 !reg
->Register
.Indirect
) {
2382 addr
= LLVMBuildLShr(ctx
->ac
.builder
, addr
, LLVMConstInt(ctx
->i32
, 2, 0), "");
2383 LLVMValueRef result
= ac_build_load_invariant(&ctx
->ac
, ptr
, addr
);
2384 return bitcast(bld_base
, type
, result
);
2387 /* Do the bounds checking with a descriptor, because
2388 * doing computation and manual bounds checking of 64-bit
2389 * addresses generates horrible VALU code with very high
2390 * VGPR usage and very low SIMD occupancy.
2392 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->i64
, "");
2393 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2395 LLVMValueRef desc_elems
[] = {
2396 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, ""),
2397 LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, ""),
2398 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2399 LLVMConstInt(ctx
->i32
,
2400 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2401 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2402 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2403 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2404 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2405 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2407 LLVMValueRef desc
= ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2408 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2409 return bitcast(bld_base
, type
, result
);
2412 assert(reg
->Register
.Dimension
);
2413 buf
= reg
->Dimension
.Index
;
2415 if (reg
->Dimension
.Indirect
) {
2416 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2418 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2419 reg
->Dimension
.Index
,
2420 ctx
->num_const_buffers
);
2421 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2422 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2423 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2425 bufp
= load_const_buffer_desc(ctx
, buf
);
2427 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2430 /* Initialize arguments for the shader export intrinsic */
2431 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2432 LLVMValueRef
*values
,
2434 struct ac_export_args
*args
)
2436 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2437 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2439 bool is_int8
, is_int10
;
2441 /* Default is 0xf. Adjusted below depending on the format. */
2442 args
->enabled_channels
= 0xf; /* writemask */
2444 /* Specify whether the EXEC mask represents the valid mask */
2445 args
->valid_mask
= 0;
2447 /* Specify whether this is the last export */
2450 /* Specify the target we are exporting */
2451 args
->target
= target
;
2453 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2454 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2455 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2456 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2458 assert(cbuf
>= 0 && cbuf
< 8);
2459 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2460 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2461 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2464 args
->compr
= false;
2465 args
->out
[0] = f32undef
;
2466 args
->out
[1] = f32undef
;
2467 args
->out
[2] = f32undef
;
2468 args
->out
[3] = f32undef
;
2470 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2471 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2472 unsigned bits
, bool hi
) = NULL
;
2474 switch (spi_shader_col_format
) {
2475 case V_028714_SPI_SHADER_ZERO
:
2476 args
->enabled_channels
= 0; /* writemask */
2477 args
->target
= V_008DFC_SQ_EXP_NULL
;
2480 case V_028714_SPI_SHADER_32_R
:
2481 args
->enabled_channels
= 1; /* writemask */
2482 args
->out
[0] = values
[0];
2485 case V_028714_SPI_SHADER_32_GR
:
2486 args
->enabled_channels
= 0x3; /* writemask */
2487 args
->out
[0] = values
[0];
2488 args
->out
[1] = values
[1];
2491 case V_028714_SPI_SHADER_32_AR
:
2492 args
->enabled_channels
= 0x9; /* writemask */
2493 args
->out
[0] = values
[0];
2494 args
->out
[3] = values
[3];
2497 case V_028714_SPI_SHADER_FP16_ABGR
:
2498 packf
= ac_build_cvt_pkrtz_f16
;
2501 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2502 packf
= ac_build_cvt_pknorm_u16
;
2505 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2506 packf
= ac_build_cvt_pknorm_i16
;
2509 case V_028714_SPI_SHADER_UINT16_ABGR
:
2510 packi
= ac_build_cvt_pk_u16
;
2513 case V_028714_SPI_SHADER_SINT16_ABGR
:
2514 packi
= ac_build_cvt_pk_i16
;
2517 case V_028714_SPI_SHADER_32_ABGR
:
2518 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2522 /* Pack f16 or norm_i16/u16. */
2524 for (chan
= 0; chan
< 2; chan
++) {
2525 LLVMValueRef pack_args
[2] = {
2527 values
[2 * chan
+ 1]
2529 LLVMValueRef packed
;
2531 packed
= packf(&ctx
->ac
, pack_args
);
2532 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2534 args
->compr
= 1; /* COMPR flag */
2538 for (chan
= 0; chan
< 2; chan
++) {
2539 LLVMValueRef pack_args
[2] = {
2540 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2541 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2543 LLVMValueRef packed
;
2545 packed
= packi(&ctx
->ac
, pack_args
,
2546 is_int8
? 8 : is_int10
? 10 : 16,
2548 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2550 args
->compr
= 1; /* COMPR flag */
2554 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2557 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2559 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2560 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2561 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2562 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2563 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2564 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2565 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2566 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2568 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2571 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2572 SI_PARAM_ALPHA_REF
);
2573 LLVMValueRef alpha_pass
=
2574 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2575 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2577 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2581 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2583 unsigned samplemask_param
)
2585 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2586 LLVMValueRef coverage
;
2588 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2589 coverage
= LLVMGetParam(ctx
->main_fn
,
2591 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2593 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2595 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2597 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2600 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2601 LLVMConstReal(ctx
->f32
,
2602 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2604 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2607 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2608 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2612 unsigned const_chan
;
2613 LLVMValueRef base_elt
;
2614 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2615 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2616 SI_VS_CONST_CLIP_PLANES
, 0);
2617 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2619 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2620 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2625 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2627 /* Compute dot products of position and user clip plane vectors */
2628 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2629 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2631 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2632 const_chan
) * 4, 0);
2633 base_elt
= buffer_load_const(ctx
, const_resource
,
2636 lp_build_add(&ctx
->bld_base
.base
, args
->out
[chan
],
2637 lp_build_mul(&ctx
->bld_base
.base
, base_elt
,
2638 out_elts
[const_chan
]));
2642 args
->enabled_channels
= 0xf;
2643 args
->valid_mask
= 0;
2645 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2650 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2654 if (so
->num_outputs
)
2655 fprintf(stderr
, "STREAMOUT\n");
2657 for (i
= 0; i
< so
->num_outputs
; i
++) {
2658 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2659 so
->output
[i
].start_component
;
2660 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2661 i
, so
->output
[i
].output_buffer
,
2662 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2663 so
->output
[i
].register_index
,
2664 mask
& 1 ? "x" : "",
2665 mask
& 2 ? "y" : "",
2666 mask
& 4 ? "z" : "",
2667 mask
& 8 ? "w" : "");
2671 static void emit_streamout_output(struct si_shader_context
*ctx
,
2672 LLVMValueRef
const *so_buffers
,
2673 LLVMValueRef
const *so_write_offsets
,
2674 struct pipe_stream_output
*stream_out
,
2675 struct si_shader_output_values
*shader_out
)
2677 unsigned buf_idx
= stream_out
->output_buffer
;
2678 unsigned start
= stream_out
->start_component
;
2679 unsigned num_comps
= stream_out
->num_components
;
2680 LLVMValueRef out
[4];
2682 assert(num_comps
&& num_comps
<= 4);
2683 if (!num_comps
|| num_comps
> 4)
2686 /* Load the output as int. */
2687 for (int j
= 0; j
< num_comps
; j
++) {
2688 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2690 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2693 /* Pack the output. */
2694 LLVMValueRef vdata
= NULL
;
2696 switch (num_comps
) {
2697 case 1: /* as i32 */
2700 case 2: /* as v2i32 */
2701 case 3: /* as v4i32 (aligned to 4) */
2702 case 4: /* as v4i32 */
2703 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2704 for (int j
= 0; j
< num_comps
; j
++) {
2705 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2706 LLVMConstInt(ctx
->i32
, j
, 0), "");
2711 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2713 so_write_offsets
[buf_idx
],
2715 stream_out
->dst_offset
* 4, 1, 1, true, false);
2719 * Write streamout data to buffers for vertex stream @p stream (different
2720 * vertex streams can occur for GS copy shaders).
2722 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2723 struct si_shader_output_values
*outputs
,
2724 unsigned noutput
, unsigned stream
)
2726 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2727 struct pipe_stream_output_info
*so
= &sel
->so
;
2728 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2730 struct lp_build_if_state if_ctx
;
2732 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2733 LLVMValueRef so_vtx_count
=
2734 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2736 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2738 /* can_emit = tid < so_vtx_count; */
2739 LLVMValueRef can_emit
=
2740 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2742 /* Emit the streamout code conditionally. This actually avoids
2743 * out-of-bounds buffer access. The hw tells us via the SGPR
2744 * (so_vtx_count) which threads are allowed to emit streamout data. */
2745 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2747 /* The buffer offset is computed as follows:
2748 * ByteOffset = streamout_offset[buffer_id]*4 +
2749 * (streamout_write_index + thread_id)*stride[buffer_id] +
2753 LLVMValueRef so_write_index
=
2754 LLVMGetParam(ctx
->main_fn
,
2755 ctx
->param_streamout_write_index
);
2757 /* Compute (streamout_write_index + thread_id). */
2758 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2760 /* Load the descriptor and compute the write offset for each
2761 * enabled buffer. */
2762 LLVMValueRef so_write_offset
[4] = {};
2763 LLVMValueRef so_buffers
[4];
2764 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2765 ctx
->param_rw_buffers
);
2767 for (i
= 0; i
< 4; i
++) {
2771 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2772 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2774 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2776 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2777 ctx
->param_streamout_offset
[i
]);
2778 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2780 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2781 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2782 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2785 /* Write streamout data. */
2786 for (i
= 0; i
< so
->num_outputs
; i
++) {
2787 unsigned reg
= so
->output
[i
].register_index
;
2792 if (stream
!= so
->output
[i
].stream
)
2795 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2796 &so
->output
[i
], &outputs
[reg
]);
2799 lp_build_endif(&if_ctx
);
2802 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2803 LLVMValueRef
*values
)
2805 struct ac_export_args args
;
2807 si_llvm_init_export_args(ctx
, values
,
2808 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2809 ac_build_export(&ctx
->ac
, &args
);
2812 static void si_build_param_exports(struct si_shader_context
*ctx
,
2813 struct si_shader_output_values
*outputs
,
2816 struct si_shader
*shader
= ctx
->shader
;
2817 unsigned param_count
= 0;
2819 for (unsigned i
= 0; i
< noutput
; i
++) {
2820 unsigned semantic_name
= outputs
[i
].semantic_name
;
2821 unsigned semantic_index
= outputs
[i
].semantic_index
;
2823 if (outputs
[i
].vertex_stream
[0] != 0 &&
2824 outputs
[i
].vertex_stream
[1] != 0 &&
2825 outputs
[i
].vertex_stream
[2] != 0 &&
2826 outputs
[i
].vertex_stream
[3] != 0)
2829 switch (semantic_name
) {
2830 case TGSI_SEMANTIC_LAYER
:
2831 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2832 case TGSI_SEMANTIC_CLIPDIST
:
2833 case TGSI_SEMANTIC_COLOR
:
2834 case TGSI_SEMANTIC_BCOLOR
:
2835 case TGSI_SEMANTIC_PRIMID
:
2836 case TGSI_SEMANTIC_FOG
:
2837 case TGSI_SEMANTIC_TEXCOORD
:
2838 case TGSI_SEMANTIC_GENERIC
:
2844 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2845 semantic_index
< SI_MAX_IO_GENERIC
) &&
2846 shader
->key
.opt
.kill_outputs
&
2847 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2850 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2852 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2853 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2856 shader
->info
.nr_param_exports
= param_count
;
2859 /* Generate export instructions for hardware VS shader stage */
2860 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2861 struct si_shader_output_values
*outputs
,
2864 struct si_shader
*shader
= ctx
->shader
;
2865 struct ac_export_args pos_args
[4] = {};
2866 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2870 /* Build position exports. */
2871 for (i
= 0; i
< noutput
; i
++) {
2872 switch (outputs
[i
].semantic_name
) {
2873 case TGSI_SEMANTIC_POSITION
:
2874 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2875 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2877 case TGSI_SEMANTIC_PSIZE
:
2878 psize_value
= outputs
[i
].values
[0];
2880 case TGSI_SEMANTIC_LAYER
:
2881 layer_value
= outputs
[i
].values
[0];
2883 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2884 viewport_index_value
= outputs
[i
].values
[0];
2886 case TGSI_SEMANTIC_EDGEFLAG
:
2887 edgeflag_value
= outputs
[i
].values
[0];
2889 case TGSI_SEMANTIC_CLIPDIST
:
2890 if (!shader
->key
.opt
.clip_disable
) {
2891 unsigned index
= 2 + outputs
[i
].semantic_index
;
2892 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2893 V_008DFC_SQ_EXP_POS
+ index
,
2897 case TGSI_SEMANTIC_CLIPVERTEX
:
2898 if (!shader
->key
.opt
.clip_disable
) {
2899 si_llvm_emit_clipvertex(ctx
, pos_args
,
2906 /* We need to add the position output manually if it's missing. */
2907 if (!pos_args
[0].out
[0]) {
2908 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2909 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2910 pos_args
[0].done
= 0; /* last export? */
2911 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2912 pos_args
[0].compr
= 0; /* COMPR flag */
2913 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2914 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2915 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2916 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2919 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2920 if (shader
->selector
->info
.writes_psize
||
2921 shader
->selector
->info
.writes_edgeflag
||
2922 shader
->selector
->info
.writes_viewport_index
||
2923 shader
->selector
->info
.writes_layer
) {
2924 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2925 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2926 (shader
->selector
->info
.writes_layer
<< 2);
2928 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2929 pos_args
[1].done
= 0; /* last export? */
2930 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2931 pos_args
[1].compr
= 0; /* COMPR flag */
2932 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2933 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2934 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2935 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2937 if (shader
->selector
->info
.writes_psize
)
2938 pos_args
[1].out
[0] = psize_value
;
2940 if (shader
->selector
->info
.writes_edgeflag
) {
2941 /* The output is a float, but the hw expects an integer
2942 * with the first bit containing the edge flag. */
2943 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2946 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2950 /* The LLVM intrinsic expects a float. */
2951 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2954 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2955 /* GFX9 has the layer in out.z[10:0] and the viewport
2956 * index in out.z[19:16].
2958 if (shader
->selector
->info
.writes_layer
)
2959 pos_args
[1].out
[2] = layer_value
;
2961 if (shader
->selector
->info
.writes_viewport_index
) {
2962 LLVMValueRef v
= viewport_index_value
;
2964 v
= ac_to_integer(&ctx
->ac
, v
);
2965 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2966 LLVMConstInt(ctx
->i32
, 16, 0), "");
2967 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2968 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2969 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2970 pos_args
[1].enabled_channels
|= 1 << 2;
2973 if (shader
->selector
->info
.writes_layer
)
2974 pos_args
[1].out
[2] = layer_value
;
2976 if (shader
->selector
->info
.writes_viewport_index
) {
2977 pos_args
[1].out
[3] = viewport_index_value
;
2978 pos_args
[1].enabled_channels
|= 1 << 3;
2983 for (i
= 0; i
< 4; i
++)
2984 if (pos_args
[i
].out
[0])
2985 shader
->info
.nr_pos_exports
++;
2988 for (i
= 0; i
< 4; i
++) {
2989 if (!pos_args
[i
].out
[0])
2992 /* Specify the target we are exporting */
2993 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2995 if (pos_idx
== shader
->info
.nr_pos_exports
)
2996 /* Specify that this is the last export */
2997 pos_args
[i
].done
= 1;
2999 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3002 /* Build parameter exports. */
3003 si_build_param_exports(ctx
, outputs
, noutput
);
3007 * Forward all outputs from the vertex shader to the TES. This is only used
3008 * for the fixed function TCS.
3010 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3012 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3013 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3014 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3017 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3018 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3019 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3021 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3022 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3023 lds_vertex_stride
, "");
3024 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3025 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3027 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3029 unsigned i
= u_bit_scan64(&inputs
);
3031 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3032 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3035 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3036 get_rel_patch_id(ctx
),
3038 LLVMConstInt(ctx
->i32
, i
, 0));
3040 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3043 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3044 buffer_offset
, 0, 1, 0, true, false);
3048 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3049 LLVMValueRef rel_patch_id
,
3050 LLVMValueRef invocation_id
,
3051 LLVMValueRef tcs_out_current_patch_data_offset
,
3052 LLVMValueRef invoc0_tf_outer
[4],
3053 LLVMValueRef invoc0_tf_inner
[2])
3055 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3056 struct si_shader
*shader
= ctx
->shader
;
3057 unsigned tess_inner_index
, tess_outer_index
;
3058 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3059 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3060 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3061 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3063 /* Add a barrier before loading tess factors from LDS. */
3064 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3065 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3067 /* Do this only for invocation 0, because the tess levels are per-patch,
3070 * This can't jump, because invocation 0 executes this. It should
3071 * at least mask out the loads and stores for other invocations.
3073 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3074 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3075 invocation_id
, ctx
->i32_0
, ""));
3077 /* Determine the layout of one tess factor element in the buffer. */
3078 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3079 case PIPE_PRIM_LINES
:
3080 stride
= 2; /* 2 dwords, 1 vec2 store */
3084 case PIPE_PRIM_TRIANGLES
:
3085 stride
= 4; /* 4 dwords, 1 vec4 store */
3089 case PIPE_PRIM_QUADS
:
3090 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3099 for (i
= 0; i
< 4; i
++) {
3100 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3101 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3104 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3105 /* Tess factors are in VGPRs. */
3106 for (i
= 0; i
< outer_comps
; i
++)
3107 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3108 for (i
= 0; i
< inner_comps
; i
++)
3109 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3111 /* Load tess_inner and tess_outer from LDS.
3112 * Any invocation can write them, so we can't get them from a temporary.
3114 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3115 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3117 lds_base
= tcs_out_current_patch_data_offset
;
3118 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3119 LLVMConstInt(ctx
->i32
,
3120 tess_inner_index
* 4, 0), "");
3121 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3122 LLVMConstInt(ctx
->i32
,
3123 tess_outer_index
* 4, 0), "");
3125 for (i
= 0; i
< outer_comps
; i
++) {
3127 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3129 for (i
= 0; i
< inner_comps
; i
++) {
3130 inner
[i
] = out
[outer_comps
+i
] =
3131 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3135 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3136 /* For isolines, the hardware expects tess factors in the
3137 * reverse order from what GLSL / TGSI specify.
3139 LLVMValueRef tmp
= out
[0];
3144 /* Convert the outputs to vectors for stores. */
3145 vec0
= lp_build_gather_values(&ctx
->gallivm
, out
, MIN2(stride
, 4));
3149 vec1
= lp_build_gather_values(&ctx
->gallivm
, out
+4, stride
- 4);
3151 /* Get the buffer. */
3152 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3154 /* Get the offset. */
3155 tf_base
= LLVMGetParam(ctx
->main_fn
,
3156 ctx
->param_tcs_factor_offset
);
3157 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3158 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3160 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3161 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3162 rel_patch_id
, ctx
->i32_0
, ""));
3164 /* Store the dynamic HS control word. */
3166 if (ctx
->screen
->info
.chip_class
<= VI
) {
3167 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3168 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3169 1, ctx
->i32_0
, tf_base
,
3170 offset
, 1, 0, true, false);
3174 lp_build_endif(&inner_if_ctx
);
3176 /* Store the tessellation factors. */
3177 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3178 MIN2(stride
, 4), byteoffset
, tf_base
,
3179 offset
, 1, 0, true, false);
3182 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3183 stride
- 4, byteoffset
, tf_base
,
3184 offset
, 1, 0, true, false);
3186 /* Store the tess factors into the offchip buffer if TES reads them. */
3187 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3188 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3189 LLVMValueRef tf_inner_offset
;
3190 unsigned param_outer
, param_inner
;
3192 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3193 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3195 param_outer
= si_shader_io_get_unique_index_patch(
3196 TGSI_SEMANTIC_TESSOUTER
, 0);
3197 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3198 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3200 outer_vec
= lp_build_gather_values(&ctx
->gallivm
, outer
,
3201 util_next_power_of_two(outer_comps
));
3203 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3204 outer_comps
, tf_outer_offset
,
3205 base
, 0, 1, 0, true, false);
3207 param_inner
= si_shader_io_get_unique_index_patch(
3208 TGSI_SEMANTIC_TESSINNER
, 0);
3209 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3210 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3212 inner_vec
= inner_comps
== 1 ? inner
[0] :
3213 lp_build_gather_values(&ctx
->gallivm
, inner
, inner_comps
);
3214 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3215 inner_comps
, tf_inner_offset
,
3216 base
, 0, 1, 0, true, false);
3220 lp_build_endif(&if_ctx
);
3224 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3225 unsigned param
, unsigned return_index
)
3227 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3228 LLVMGetParam(ctx
->main_fn
, param
),
3233 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3234 unsigned param
, unsigned return_index
)
3236 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3237 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3239 return LLVMBuildInsertValue(builder
, ret
,
3240 ac_to_float(&ctx
->ac
, p
),
3245 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3246 unsigned param
, unsigned return_index
)
3248 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3249 LLVMValueRef ptr
, lo
, hi
;
3251 if (HAVE_32BIT_POINTERS
) {
3252 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3253 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3254 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3257 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3258 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3259 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3260 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3261 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3262 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3263 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3266 /* This only writes the tessellation factor levels. */
3267 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3268 unsigned max_outputs
,
3269 LLVMValueRef
*addrs
)
3271 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3272 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3273 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3274 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3276 si_copy_tcs_inputs(bld_base
);
3278 rel_patch_id
= get_rel_patch_id(ctx
);
3279 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3280 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3282 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3283 LLVMBasicBlockRef blocks
[2] = {
3284 LLVMGetInsertBlock(builder
),
3285 ctx
->merged_wrap_if_state
.entry_block
3287 LLVMValueRef values
[2];
3289 lp_build_endif(&ctx
->merged_wrap_if_state
);
3291 values
[0] = rel_patch_id
;
3292 values
[1] = LLVMGetUndef(ctx
->i32
);
3293 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3295 values
[0] = tf_lds_offset
;
3296 values
[1] = LLVMGetUndef(ctx
->i32
);
3297 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3299 values
[0] = invocation_id
;
3300 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3301 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3304 /* Return epilog parameters from this function. */
3305 LLVMValueRef ret
= ctx
->return_value
;
3308 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3309 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3310 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3311 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3312 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3313 /* Tess offchip and tess factor offsets are at the beginning. */
3314 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3315 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3316 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3318 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3319 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3320 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3321 GFX6_SGPR_TCS_OUT_LAYOUT
);
3322 /* Tess offchip and tess factor offsets are after user SGPRs. */
3323 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3324 GFX6_TCS_NUM_USER_SGPR
);
3325 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3326 GFX6_TCS_NUM_USER_SGPR
+ 1);
3327 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3331 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3332 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3333 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3335 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3336 * the invocation_id output does not alias the tcs_rel_ids input,
3337 * which saves a V_MOV on gfx9.
3341 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3342 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3344 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3345 vgpr
++; /* skip the tess factor LDS offset */
3346 for (unsigned i
= 0; i
< 6; i
++) {
3347 LLVMValueRef value
=
3348 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3349 value
= ac_to_float(&ctx
->ac
, value
);
3350 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3353 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3355 ctx
->return_value
= ret
;
3358 /* Pass TCS inputs from LS to TCS on GFX9. */
3359 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3361 LLVMValueRef ret
= ctx
->return_value
;
3363 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3364 if (HAVE_32BIT_POINTERS
)
3365 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3366 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3367 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3368 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3371 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3372 8 + SI_SGPR_RW_BUFFERS
);
3373 ret
= si_insert_input_ptr(ctx
, ret
,
3374 ctx
->param_bindless_samplers_and_images
,
3375 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3377 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3378 8 + SI_SGPR_VS_STATE_BITS
);
3380 #if !HAVE_32BIT_POINTERS
3381 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3382 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3385 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3386 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3387 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3388 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3389 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3390 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3392 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3393 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3394 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3396 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3397 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3399 ctx
->return_value
= ret
;
3402 /* Pass GS inputs from ES to GS on GFX9. */
3403 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3405 LLVMValueRef ret
= ctx
->return_value
;
3407 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3408 if (HAVE_32BIT_POINTERS
)
3409 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3410 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3411 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3412 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3414 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3415 8 + SI_SGPR_RW_BUFFERS
);
3416 ret
= si_insert_input_ptr(ctx
, ret
,
3417 ctx
->param_bindless_samplers_and_images
,
3418 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3420 #if !HAVE_32BIT_POINTERS
3421 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 1,
3422 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3425 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3426 for (unsigned i
= 0; i
< 5; i
++) {
3427 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3428 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3430 ctx
->return_value
= ret
;
3433 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3434 unsigned max_outputs
,
3435 LLVMValueRef
*addrs
)
3437 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3438 struct si_shader
*shader
= ctx
->shader
;
3439 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3441 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3442 ctx
->param_rel_auto_id
);
3443 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3444 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3445 vertex_dw_stride
, "");
3447 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3448 * its inputs from it. */
3449 for (i
= 0; i
< info
->num_outputs
; i
++) {
3450 unsigned name
= info
->output_semantic_name
[i
];
3451 unsigned index
= info
->output_semantic_index
[i
];
3453 /* The ARB_shader_viewport_layer_array spec contains the
3456 * 2) What happens if gl_ViewportIndex or gl_Layer is
3457 * written in the vertex shader and a geometry shader is
3460 * RESOLVED: The value written by the last vertex processing
3461 * stage is used. If the last vertex processing stage
3462 * (vertex, tessellation evaluation or geometry) does not
3463 * statically assign to gl_ViewportIndex or gl_Layer, index
3464 * or layer zero is assumed.
3466 * So writes to those outputs in VS-as-LS are simply ignored.
3468 if (name
== TGSI_SEMANTIC_LAYER
||
3469 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3472 int param
= si_shader_io_get_unique_index(name
, index
);
3473 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3474 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3476 for (chan
= 0; chan
< 4; chan
++) {
3477 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3480 lds_store(ctx
, chan
, dw_addr
,
3481 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3485 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3486 si_set_ls_return_value_for_tcs(ctx
);
3489 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3490 unsigned max_outputs
,
3491 LLVMValueRef
*addrs
)
3493 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3494 struct si_shader
*es
= ctx
->shader
;
3495 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3496 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3497 ctx
->param_es2gs_offset
);
3498 LLVMValueRef lds_base
= NULL
;
3502 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3503 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3504 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3505 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3506 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3507 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3508 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3509 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3510 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3513 for (i
= 0; i
< info
->num_outputs
; i
++) {
3516 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3517 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3520 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3521 info
->output_semantic_index
[i
]);
3523 for (chan
= 0; chan
< 4; chan
++) {
3524 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3525 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3527 /* GFX9 has the ESGS ring in LDS. */
3528 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3529 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3533 ac_build_buffer_store_dword(&ctx
->ac
,
3535 out_val
, 1, NULL
, soffset
,
3536 (4 * param
+ chan
) * 4,
3541 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3542 si_set_es_return_value_for_gs(ctx
);
3545 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3547 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3548 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3550 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3553 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3555 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3556 si_get_gs_wave_id(ctx
));
3558 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3559 lp_build_endif(&ctx
->merged_wrap_if_state
);
3562 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3563 unsigned max_outputs
,
3564 LLVMValueRef
*addrs
)
3566 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3567 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3569 assert(info
->num_outputs
<= max_outputs
);
3571 emit_gs_epilogue(ctx
);
3574 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3576 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3577 emit_gs_epilogue(ctx
);
3580 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3581 unsigned max_outputs
,
3582 LLVMValueRef
*addrs
)
3584 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3585 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3586 struct si_shader_output_values
*outputs
= NULL
;
3589 assert(!ctx
->shader
->is_gs_copy_shader
);
3590 assert(info
->num_outputs
<= max_outputs
);
3592 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3594 /* Vertex color clamping.
3596 * This uses a state constant loaded in a user data SGPR and
3597 * an IF statement is added that clamps all colors if the constant
3600 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3601 struct lp_build_if_state if_ctx
;
3602 LLVMValueRef cond
= NULL
;
3603 LLVMValueRef addr
, val
;
3605 for (i
= 0; i
< info
->num_outputs
; i
++) {
3606 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3607 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3610 /* We've found a color. */
3612 /* The state is in the first bit of the user SGPR. */
3613 cond
= LLVMGetParam(ctx
->main_fn
,
3614 ctx
->param_vs_state_bits
);
3615 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3617 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3620 for (j
= 0; j
< 4; j
++) {
3621 addr
= addrs
[4 * i
+ j
];
3622 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3623 val
= ac_build_clamp(&ctx
->ac
, val
);
3624 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3629 lp_build_endif(&if_ctx
);
3632 for (i
= 0; i
< info
->num_outputs
; i
++) {
3633 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3634 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3636 for (j
= 0; j
< 4; j
++) {
3637 outputs
[i
].values
[j
] =
3638 LLVMBuildLoad(ctx
->ac
.builder
,
3641 outputs
[i
].vertex_stream
[j
] =
3642 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3646 if (ctx
->shader
->selector
->so
.num_outputs
)
3647 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3649 /* Export PrimitiveID. */
3650 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3651 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3652 outputs
[i
].semantic_index
= 0;
3653 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3654 for (j
= 1; j
< 4; j
++)
3655 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3657 memset(outputs
[i
].vertex_stream
, 0,
3658 sizeof(outputs
[i
].vertex_stream
));
3662 si_llvm_export_vs(ctx
, outputs
, i
);
3666 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3668 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3670 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3671 &ctx
->outputs
[0][0]);
3674 struct si_ps_exports
{
3676 struct ac_export_args args
[10];
3679 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3680 LLVMValueRef depth
, LLVMValueRef stencil
,
3681 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3683 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3684 struct ac_export_args args
;
3686 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3688 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3691 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3692 LLVMValueRef
*color
, unsigned index
,
3693 unsigned samplemask_param
,
3694 bool is_last
, struct si_ps_exports
*exp
)
3696 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3700 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3701 for (i
= 0; i
< 4; i
++)
3702 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3705 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3706 color
[3] = ctx
->ac
.f32_1
;
3710 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3711 si_alpha_test(bld_base
, color
[3]);
3713 /* Line & polygon smoothing */
3714 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3715 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3718 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3719 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3720 struct ac_export_args args
[8];
3723 /* Get the export arguments, also find out what the last one is. */
3724 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3725 si_llvm_init_export_args(ctx
, color
,
3726 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3727 if (args
[c
].enabled_channels
)
3731 /* Emit all exports. */
3732 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3733 if (is_last
&& last
== c
) {
3734 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3735 args
[c
].done
= 1; /* DONE bit */
3736 } else if (!args
[c
].enabled_channels
)
3737 continue; /* unnecessary NULL export */
3739 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3742 struct ac_export_args args
;
3745 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3748 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3749 args
.done
= 1; /* DONE bit */
3750 } else if (!args
.enabled_channels
)
3751 return; /* unnecessary NULL export */
3753 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3757 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3758 struct si_ps_exports
*exp
)
3760 for (unsigned i
= 0; i
< exp
->num
; i
++)
3761 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3765 * Return PS outputs in this order:
3767 * v[0:3] = color0.xyzw
3768 * v[4:7] = color1.xyzw
3773 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3775 * The alpha-ref SGPR is returned via its original location.
3777 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3778 unsigned max_outputs
,
3779 LLVMValueRef
*addrs
)
3781 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3782 struct si_shader
*shader
= ctx
->shader
;
3783 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3784 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3785 unsigned i
, j
, first_vgpr
, vgpr
;
3787 LLVMValueRef color
[8][4] = {};
3788 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3791 if (ctx
->postponed_kill
)
3792 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3794 /* Read the output values. */
3795 for (i
= 0; i
< info
->num_outputs
; i
++) {
3796 unsigned semantic_name
= info
->output_semantic_name
[i
];
3797 unsigned semantic_index
= info
->output_semantic_index
[i
];
3799 switch (semantic_name
) {
3800 case TGSI_SEMANTIC_COLOR
:
3801 assert(semantic_index
< 8);
3802 for (j
= 0; j
< 4; j
++) {
3803 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3804 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3805 color
[semantic_index
][j
] = result
;
3808 case TGSI_SEMANTIC_POSITION
:
3809 depth
= LLVMBuildLoad(builder
,
3810 addrs
[4 * i
+ 2], "");
3812 case TGSI_SEMANTIC_STENCIL
:
3813 stencil
= LLVMBuildLoad(builder
,
3814 addrs
[4 * i
+ 1], "");
3816 case TGSI_SEMANTIC_SAMPLEMASK
:
3817 samplemask
= LLVMBuildLoad(builder
,
3818 addrs
[4 * i
+ 0], "");
3821 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3826 /* Fill the return structure. */
3827 ret
= ctx
->return_value
;
3830 ret
= LLVMBuildInsertValue(builder
, ret
,
3831 ac_to_integer(&ctx
->ac
,
3832 LLVMGetParam(ctx
->main_fn
,
3833 SI_PARAM_ALPHA_REF
)),
3834 SI_SGPR_ALPHA_REF
, "");
3837 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3838 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3842 for (j
= 0; j
< 4; j
++)
3843 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3846 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3848 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3850 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3852 /* Add the input sample mask for smoothing at the end. */
3853 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3854 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3855 ret
= LLVMBuildInsertValue(builder
, ret
,
3856 LLVMGetParam(ctx
->main_fn
,
3857 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3859 ctx
->return_value
= ret
;
3862 static void membar_emit(
3863 const struct lp_build_tgsi_action
*action
,
3864 struct lp_build_tgsi_context
*bld_base
,
3865 struct lp_build_emit_data
*emit_data
)
3867 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3868 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3869 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3870 unsigned waitcnt
= NOOP_WAITCNT
;
3872 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3873 waitcnt
&= VM_CNT
& LGKM_CNT
;
3875 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3876 TGSI_MEMBAR_SHADER_BUFFER
|
3877 TGSI_MEMBAR_SHADER_IMAGE
))
3880 if (flags
& TGSI_MEMBAR_SHARED
)
3881 waitcnt
&= LGKM_CNT
;
3883 if (waitcnt
!= NOOP_WAITCNT
)
3884 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3887 static void clock_emit(
3888 const struct lp_build_tgsi_action
*action
,
3889 struct lp_build_tgsi_context
*bld_base
,
3890 struct lp_build_emit_data
*emit_data
)
3892 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3893 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3895 emit_data
->output
[0] =
3896 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3897 emit_data
->output
[1] =
3898 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3901 static void si_llvm_emit_ddxy(
3902 const struct lp_build_tgsi_action
*action
,
3903 struct lp_build_tgsi_context
*bld_base
,
3904 struct lp_build_emit_data
*emit_data
)
3906 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3907 unsigned opcode
= emit_data
->info
->opcode
;
3912 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3913 mask
= AC_TID_MASK_LEFT
;
3914 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3915 mask
= AC_TID_MASK_TOP
;
3917 mask
= AC_TID_MASK_TOP_LEFT
;
3919 /* for DDX we want to next X pixel, DDY next Y pixel. */
3920 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3922 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3923 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3924 emit_data
->output
[emit_data
->chan
] = val
;
3928 * this takes an I,J coordinate pair,
3929 * and works out the X and Y derivatives.
3930 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3932 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3933 struct lp_build_tgsi_context
*bld_base
,
3934 LLVMValueRef interp_ij
)
3936 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3937 LLVMValueRef result
[4], a
;
3940 for (i
= 0; i
< 2; i
++) {
3941 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3942 LLVMConstInt(ctx
->i32
, i
, 0), "");
3943 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3944 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3947 return lp_build_gather_values(&ctx
->gallivm
, result
, 4);
3950 static void interp_fetch_args(
3951 struct lp_build_tgsi_context
*bld_base
,
3952 struct lp_build_emit_data
*emit_data
)
3954 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3955 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3957 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3958 /* offset is in second src, first two channels */
3959 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
3962 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
3965 emit_data
->arg_count
= 2;
3966 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3967 LLVMValueRef sample_position
;
3968 LLVMValueRef sample_id
;
3969 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3971 /* fetch sample ID, then fetch its sample position,
3972 * and place into first two channels.
3974 sample_id
= lp_build_emit_fetch(bld_base
,
3975 emit_data
->inst
, 1, TGSI_CHAN_X
);
3976 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3978 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3979 * Language 4.50 spec says about interpolateAtSample:
3981 * "Returns the value of the input interpolant variable at
3982 * the location of sample number sample. If multisample
3983 * buffers are not available, the input variable will be
3984 * evaluated at the center of the pixel. If sample sample
3985 * does not exist, the position used to interpolate the
3986 * input variable is undefined."
3988 * This means that sample_id values outside of the valid are
3989 * in fact valid input, and the usual mechanism for loading the
3990 * sample position doesn't work.
3992 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3993 LLVMValueRef center
[4] = {
3994 LLVMConstReal(ctx
->f32
, 0.5),
3995 LLVMConstReal(ctx
->f32
, 0.5),
4000 sample_position
= lp_build_gather_values(&ctx
->gallivm
, center
, 4);
4002 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4005 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4009 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4010 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4013 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4014 emit_data
->arg_count
= 2;
4018 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4019 struct lp_build_tgsi_context
*bld_base
,
4020 struct lp_build_emit_data
*emit_data
)
4022 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4023 struct si_shader
*shader
= ctx
->shader
;
4024 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4025 LLVMValueRef interp_param
;
4026 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4027 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4028 int input_base
, input_array_size
;
4031 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4032 LLVMValueRef array_idx
;
4033 int interp_param_idx
;
4037 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4039 if (input
->Register
.Indirect
) {
4040 unsigned array_id
= input
->Indirect
.ArrayID
;
4043 input_base
= info
->input_array_first
[array_id
];
4044 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4046 input_base
= inst
->Src
[0].Register
.Index
;
4047 input_array_size
= info
->num_inputs
- input_base
;
4050 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4051 1, input
->Register
.Index
- input_base
);
4053 input_base
= inst
->Src
[0].Register
.Index
;
4054 input_array_size
= 1;
4055 array_idx
= ctx
->i32_0
;
4058 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4060 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4061 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4062 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4064 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4066 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4067 if (interp_param_idx
== -1)
4069 else if (interp_param_idx
)
4070 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4072 interp_param
= NULL
;
4074 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4075 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4076 LLVMValueRef ij_out
[2];
4077 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4080 * take the I then J parameters, and the DDX/Y for it, and
4081 * calculate the IJ inputs for the interpolator.
4082 * temp1 = ddx * offset/sample.x + I;
4083 * interp_param.I = ddy * offset/sample.y + temp1;
4084 * temp1 = ddx * offset/sample.x + J;
4085 * interp_param.J = ddy * offset/sample.y + temp1;
4087 for (i
= 0; i
< 2; i
++) {
4088 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4089 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4090 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4091 ddxy_out
, ix_ll
, "");
4092 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4093 ddxy_out
, iy_ll
, "");
4094 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4095 interp_param
, ix_ll
, "");
4096 LLVMValueRef temp1
, temp2
;
4098 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4100 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4102 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4104 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4106 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4108 interp_param
= lp_build_gather_values(&ctx
->gallivm
, ij_out
, 2);
4112 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4114 for (chan
= 0; chan
< 4; chan
++) {
4115 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4116 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4118 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4119 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4122 i
= LLVMBuildExtractElement(
4123 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4124 j
= LLVMBuildExtractElement(
4125 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4127 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4130 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4131 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4134 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4135 ctx
->ac
.builder
, gather
, array_idx
, "");
4139 static void vote_all_emit(
4140 const struct lp_build_tgsi_action
*action
,
4141 struct lp_build_tgsi_context
*bld_base
,
4142 struct lp_build_emit_data
*emit_data
)
4144 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4146 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4147 emit_data
->output
[emit_data
->chan
] =
4148 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4151 static void vote_any_emit(
4152 const struct lp_build_tgsi_action
*action
,
4153 struct lp_build_tgsi_context
*bld_base
,
4154 struct lp_build_emit_data
*emit_data
)
4156 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4158 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4159 emit_data
->output
[emit_data
->chan
] =
4160 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4163 static void vote_eq_emit(
4164 const struct lp_build_tgsi_action
*action
,
4165 struct lp_build_tgsi_context
*bld_base
,
4166 struct lp_build_emit_data
*emit_data
)
4168 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4170 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4171 emit_data
->output
[emit_data
->chan
] =
4172 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4175 static void ballot_emit(
4176 const struct lp_build_tgsi_action
*action
,
4177 struct lp_build_tgsi_context
*bld_base
,
4178 struct lp_build_emit_data
*emit_data
)
4180 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4181 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4184 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4185 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4186 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4188 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4189 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4192 static void read_invoc_fetch_args(
4193 struct lp_build_tgsi_context
*bld_base
,
4194 struct lp_build_emit_data
*emit_data
)
4196 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4197 0, emit_data
->src_chan
);
4199 /* Always read the source invocation (= lane) from the X channel. */
4200 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4202 emit_data
->arg_count
= 2;
4205 static void read_lane_emit(
4206 const struct lp_build_tgsi_action
*action
,
4207 struct lp_build_tgsi_context
*bld_base
,
4208 struct lp_build_emit_data
*emit_data
)
4210 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4212 /* We currently have no other way to prevent LLVM from lifting the icmp
4213 * calls to a dominating basic block.
4215 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4217 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4218 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4220 emit_data
->output
[emit_data
->chan
] =
4221 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4222 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4223 AC_FUNC_ATTR_READNONE
|
4224 AC_FUNC_ATTR_CONVERGENT
);
4227 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4228 struct lp_build_emit_data
*emit_data
)
4230 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4231 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4235 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4237 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4238 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4242 /* Emit one vertex from the geometry shader */
4243 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4245 LLVMValueRef
*addrs
)
4247 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4248 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4249 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
4250 struct si_shader
*shader
= ctx
->shader
;
4251 struct lp_build_if_state if_state
;
4252 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4253 ctx
->param_gs2vs_offset
);
4254 LLVMValueRef gs_next_vertex
;
4255 LLVMValueRef can_emit
;
4256 unsigned chan
, offset
;
4259 /* Write vertex attribute values to GSVS ring */
4260 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4261 ctx
->gs_next_vertex
[stream
],
4264 /* If this thread has already emitted the declared maximum number of
4265 * vertices, skip the write: excessive vertex emissions are not
4266 * supposed to have any effect.
4268 * If the shader has no writes to memory, kill it instead. This skips
4269 * further memory loads and may allow LLVM to skip to the end
4272 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4273 LLVMConstInt(ctx
->i32
,
4274 shader
->selector
->gs_max_out_vertices
, 0), "");
4276 bool use_kill
= !info
->writes_memory
;
4278 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4280 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4284 for (i
= 0; i
< info
->num_outputs
; i
++) {
4285 for (chan
= 0; chan
< 4; chan
++) {
4286 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4287 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4290 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4291 LLVMValueRef voffset
=
4292 LLVMConstInt(ctx
->i32
, offset
*
4293 shader
->selector
->gs_max_out_vertices
, 0);
4296 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
4297 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
4299 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4301 ac_build_buffer_store_dword(&ctx
->ac
,
4302 ctx
->gsvs_ring
[stream
],
4304 voffset
, soffset
, 0,
4309 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4312 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4314 /* Signal vertex emission */
4315 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4316 si_get_gs_wave_id(ctx
));
4318 lp_build_endif(&if_state
);
4321 /* Emit one vertex from the geometry shader */
4322 static void si_tgsi_emit_vertex(
4323 const struct lp_build_tgsi_action
*action
,
4324 struct lp_build_tgsi_context
*bld_base
,
4325 struct lp_build_emit_data
*emit_data
)
4327 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4328 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4330 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4333 /* Cut one primitive from the geometry shader */
4334 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4337 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4339 /* Signal primitive cut */
4340 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4341 si_get_gs_wave_id(ctx
));
4344 /* Cut one primitive from the geometry shader */
4345 static void si_tgsi_emit_primitive(
4346 const struct lp_build_tgsi_action
*action
,
4347 struct lp_build_tgsi_context
*bld_base
,
4348 struct lp_build_emit_data
*emit_data
)
4350 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4352 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4355 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4356 struct lp_build_tgsi_context
*bld_base
,
4357 struct lp_build_emit_data
*emit_data
)
4359 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4361 /* SI only (thanks to a hw bug workaround):
4362 * The real barrier instruction isn’t needed, because an entire patch
4363 * always fits into a single wave.
4365 if (ctx
->screen
->info
.chip_class
== SI
&&
4366 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4367 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4371 lp_build_intrinsic(ctx
->ac
.builder
,
4372 "llvm.amdgcn.s.barrier",
4373 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4376 static const struct lp_build_tgsi_action interp_action
= {
4377 .fetch_args
= interp_fetch_args
,
4378 .emit
= build_interp_intrinsic
,
4381 static void si_create_function(struct si_shader_context
*ctx
,
4383 LLVMTypeRef
*returns
, unsigned num_returns
,
4384 struct si_function_info
*fninfo
,
4385 unsigned max_workgroup_size
)
4389 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4390 fninfo
->types
, fninfo
->num_params
);
4391 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4393 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4394 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4396 /* The combination of:
4400 * allows the optimization passes to move loads and reduces
4401 * SGPR spilling significantly.
4403 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4405 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4406 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4407 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4411 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4412 if (fninfo
->assign
[i
])
4413 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4416 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-32bit-address-high-bits",
4417 ctx
->screen
->info
.address32_hi
);
4419 if (max_workgroup_size
) {
4420 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4421 max_workgroup_size
);
4423 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4424 "no-signed-zeros-fp-math",
4427 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4428 /* These were copied from some LLVM test. */
4429 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4430 "less-precise-fpmad",
4432 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4435 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4438 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4444 static void declare_streamout_params(struct si_shader_context
*ctx
,
4445 struct pipe_stream_output_info
*so
,
4446 struct si_function_info
*fninfo
)
4450 /* Streamout SGPRs. */
4451 if (so
->num_outputs
) {
4452 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4453 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4455 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4457 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4459 /* A streamout buffer offset is loaded if the stride is non-zero. */
4460 for (i
= 0; i
< 4; i
++) {
4464 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4468 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4470 switch (shader
->selector
->type
) {
4471 case PIPE_SHADER_TESS_CTRL
:
4472 /* Return this so that LLVM doesn't remove s_barrier
4473 * instructions on chips where we use s_barrier. */
4474 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4476 case PIPE_SHADER_GEOMETRY
:
4477 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4479 case PIPE_SHADER_COMPUTE
:
4480 break; /* see below */
4486 const unsigned *properties
= shader
->selector
->info
.properties
;
4487 unsigned max_work_group_size
=
4488 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4489 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4490 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4492 if (!max_work_group_size
) {
4493 /* This is a variable group size compute shader,
4494 * compile it for the maximum possible group size.
4496 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4498 return max_work_group_size
;
4501 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4502 struct si_function_info
*fninfo
,
4505 LLVMTypeRef const_shader_buf_type
;
4507 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4508 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4509 const_shader_buf_type
= ctx
->f32
;
4511 const_shader_buf_type
= ctx
->v4i32
;
4513 unsigned const_and_shader_buffers
=
4514 add_arg(fninfo
, ARG_SGPR
,
4515 ac_array_in_const32_addr_space(const_shader_buf_type
));
4518 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4521 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4522 struct si_function_info
*fninfo
,
4525 unsigned samplers_and_images
=
4526 add_arg(fninfo
, ARG_SGPR
,
4527 ac_array_in_const32_addr_space(ctx
->v8i32
));
4530 ctx
->param_samplers_and_images
= samplers_and_images
;
4533 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4534 struct si_function_info
*fninfo
,
4537 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4538 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4541 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4542 struct si_function_info
*fninfo
)
4544 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4545 ac_array_in_const32_addr_space(ctx
->v4i32
));
4546 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4547 ac_array_in_const32_addr_space(ctx
->v8i32
));
4550 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4551 struct si_function_info
*fninfo
)
4553 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4554 ac_array_in_const32_addr_space(ctx
->v4i32
));
4555 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4556 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4557 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4558 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4561 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4562 struct si_function_info
*fninfo
,
4563 unsigned *num_prolog_vgprs
)
4565 struct si_shader
*shader
= ctx
->shader
;
4567 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4568 if (shader
->key
.as_ls
) {
4569 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4570 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4572 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4573 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4575 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4577 if (!shader
->is_gs_copy_shader
) {
4578 /* Vertex load indices. */
4579 ctx
->param_vertex_index0
= fninfo
->num_params
;
4580 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4581 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4582 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4586 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4587 struct si_function_info
*fninfo
)
4589 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4590 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4591 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4592 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4596 /* Convenient merged shader definitions. */
4597 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4598 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4601 static void create_function(struct si_shader_context
*ctx
)
4603 struct si_shader
*shader
= ctx
->shader
;
4604 struct si_function_info fninfo
;
4605 LLVMTypeRef returns
[16+32*4];
4606 unsigned i
, num_return_sgprs
;
4607 unsigned num_returns
= 0;
4608 unsigned num_prolog_vgprs
= 0;
4609 unsigned type
= ctx
->type
;
4610 unsigned vs_blit_property
=
4611 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4613 si_init_function_info(&fninfo
);
4615 /* Set MERGED shaders. */
4616 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4617 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4618 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4619 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4620 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4623 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4626 case PIPE_SHADER_VERTEX
:
4627 declare_global_desc_pointers(ctx
, &fninfo
);
4629 if (vs_blit_property
) {
4630 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4631 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4632 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4633 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4635 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4636 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4637 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4638 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4639 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4640 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4641 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4642 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4643 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4644 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4645 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4646 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4650 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4654 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4655 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4657 if (shader
->key
.as_es
) {
4658 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4659 } else if (shader
->key
.as_ls
) {
4660 /* no extra parameters */
4662 if (shader
->is_gs_copy_shader
) {
4663 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4664 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4667 /* The locations of the other parameters are assigned dynamically. */
4668 declare_streamout_params(ctx
, &shader
->selector
->so
,
4673 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4676 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4677 declare_global_desc_pointers(ctx
, &fninfo
);
4678 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4679 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4680 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4681 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4682 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4683 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4684 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4687 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4688 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4690 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4691 * placed after the user SGPRs.
4693 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4694 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4695 for (i
= 0; i
< 11; i
++)
4696 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4699 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4700 /* Merged stages have 8 system SGPRs at the beginning. */
4701 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4702 if (HAVE_32BIT_POINTERS
) {
4703 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4704 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4706 declare_const_and_shader_buffers(ctx
, &fninfo
,
4707 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4709 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4710 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4711 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4712 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4713 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4714 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4716 declare_global_desc_pointers(ctx
, &fninfo
);
4717 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4718 ctx
->type
== PIPE_SHADER_VERTEX
);
4719 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4721 if (!HAVE_32BIT_POINTERS
) {
4722 declare_samplers_and_images(ctx
, &fninfo
,
4723 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4725 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4726 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4727 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4729 /* VGPRs (first TCS, then VS) */
4730 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4731 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4733 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4734 declare_vs_input_vgprs(ctx
, &fninfo
,
4737 /* LS return values are inputs to the TCS main shader part. */
4738 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4739 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4740 for (i
= 0; i
< 2; i
++)
4741 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4743 /* TCS return values are inputs to the TCS epilog.
4745 * param_tcs_offchip_offset, param_tcs_factor_offset,
4746 * param_tcs_offchip_layout, and param_rw_buffers
4747 * should be passed to the epilog.
4749 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4750 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4751 for (i
= 0; i
< 11; i
++)
4752 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4756 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4757 /* Merged stages have 8 system SGPRs at the beginning. */
4758 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4759 if (HAVE_32BIT_POINTERS
) {
4760 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4761 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4763 declare_const_and_shader_buffers(ctx
, &fninfo
,
4764 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4766 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4767 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4768 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4769 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4770 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4771 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4773 declare_global_desc_pointers(ctx
, &fninfo
);
4774 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4775 (ctx
->type
== PIPE_SHADER_VERTEX
||
4776 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4777 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4778 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4780 /* TESS_EVAL (and also GEOMETRY):
4781 * Declare as many input SGPRs as the VS has. */
4782 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4783 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4784 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4785 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4786 if (!HAVE_32BIT_POINTERS
)
4787 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4788 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4791 if (!HAVE_32BIT_POINTERS
) {
4792 declare_samplers_and_images(ctx
, &fninfo
,
4793 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4796 /* VGPRs (first GS, then VS/TES) */
4797 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4798 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4799 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4800 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4801 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4803 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4804 declare_vs_input_vgprs(ctx
, &fninfo
,
4806 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4807 declare_tes_input_vgprs(ctx
, &fninfo
);
4810 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4811 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4812 /* ES return values are inputs to GS. */
4813 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4814 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4815 for (i
= 0; i
< 5; i
++)
4816 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4820 case PIPE_SHADER_TESS_EVAL
:
4821 declare_global_desc_pointers(ctx
, &fninfo
);
4822 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4823 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4824 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4826 if (shader
->key
.as_es
) {
4827 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4828 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4829 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4832 declare_streamout_params(ctx
, &shader
->selector
->so
,
4834 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4838 declare_tes_input_vgprs(ctx
, &fninfo
);
4841 case PIPE_SHADER_GEOMETRY
:
4842 declare_global_desc_pointers(ctx
, &fninfo
);
4843 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4844 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4845 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4848 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4849 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4850 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4851 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4852 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4853 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4854 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4855 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4858 case PIPE_SHADER_FRAGMENT
:
4859 declare_global_desc_pointers(ctx
, &fninfo
);
4860 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4861 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4862 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4863 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4865 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4866 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4867 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4868 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4869 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4870 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4871 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4872 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4873 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4874 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4875 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4876 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4877 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4878 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4879 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4880 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4881 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4882 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4883 shader
->info
.face_vgpr_index
= 20;
4884 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4885 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4886 shader
->info
.ancillary_vgpr_index
= 21;
4887 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4888 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4889 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4891 /* Color inputs from the prolog. */
4892 if (shader
->selector
->info
.colors_read
) {
4893 unsigned num_color_elements
=
4894 util_bitcount(shader
->selector
->info
.colors_read
);
4896 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4897 for (i
= 0; i
< num_color_elements
; i
++)
4898 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4900 num_prolog_vgprs
+= num_color_elements
;
4903 /* Outputs for the epilog. */
4904 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4907 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4908 shader
->selector
->info
.writes_z
+
4909 shader
->selector
->info
.writes_stencil
+
4910 shader
->selector
->info
.writes_samplemask
+
4911 1 /* SampleMaskIn */;
4913 num_returns
= MAX2(num_returns
,
4915 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4917 for (i
= 0; i
< num_return_sgprs
; i
++)
4918 returns
[i
] = ctx
->i32
;
4919 for (; i
< num_returns
; i
++)
4920 returns
[i
] = ctx
->f32
;
4923 case PIPE_SHADER_COMPUTE
:
4924 declare_global_desc_pointers(ctx
, &fninfo
);
4925 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4926 if (shader
->selector
->info
.uses_grid_size
)
4927 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4928 if (shader
->selector
->info
.uses_block_size
)
4929 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4931 for (i
= 0; i
< 3; i
++) {
4932 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4933 if (shader
->selector
->info
.uses_block_id
[i
])
4934 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4937 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4940 assert(0 && "unimplemented shader");
4944 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4945 si_get_max_workgroup_size(shader
));
4947 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4948 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4949 ctx
->separate_prolog
) {
4950 si_llvm_add_attribute(ctx
->main_fn
,
4951 "InitialPSInputAddr",
4952 S_0286D0_PERSP_SAMPLE_ENA(1) |
4953 S_0286D0_PERSP_CENTER_ENA(1) |
4954 S_0286D0_PERSP_CENTROID_ENA(1) |
4955 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4956 S_0286D0_LINEAR_CENTER_ENA(1) |
4957 S_0286D0_LINEAR_CENTROID_ENA(1) |
4958 S_0286D0_FRONT_FACE_ENA(1) |
4959 S_0286D0_ANCILLARY_ENA(1) |
4960 S_0286D0_POS_FIXED_PT_ENA(1));
4963 shader
->info
.num_input_sgprs
= 0;
4964 shader
->info
.num_input_vgprs
= 0;
4966 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4967 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4969 for (; i
< fninfo
.num_params
; ++i
)
4970 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4972 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4973 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4975 if (shader
->key
.as_ls
||
4976 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4977 /* GFX9 has the ESGS ring buffer in LDS. */
4978 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
4979 ac_declare_lds_as_pointer(&ctx
->ac
);
4983 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4986 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4988 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4990 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4991 ctx
->param_rw_buffers
);
4993 if (ctx
->screen
->info
.chip_class
<= VI
&&
4994 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4996 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4998 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5001 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5004 if (ctx
->shader
->is_gs_copy_shader
) {
5005 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5008 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5009 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5010 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5011 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5012 LLVMValueRef base_ring
;
5014 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5016 /* The conceptual layout of the GSVS ring is
5017 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5018 * but the real memory layout is swizzled across
5020 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5022 * Override the buffer descriptor accordingly.
5024 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5025 uint64_t stream_offset
= 0;
5027 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5028 unsigned num_components
;
5030 unsigned num_records
;
5031 LLVMValueRef ring
, tmp
;
5033 num_components
= sel
->info
.num_stream_output_components
[stream
];
5034 if (!num_components
)
5037 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5039 /* Limit on the stride field for <= CIK. */
5040 assert(stride
< (1 << 14));
5044 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5045 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5046 tmp
= LLVMBuildAdd(builder
, tmp
,
5047 LLVMConstInt(ctx
->i64
,
5048 stream_offset
, 0), "");
5049 stream_offset
+= stride
* 64;
5051 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5052 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5053 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5054 tmp
= LLVMBuildOr(builder
, tmp
,
5055 LLVMConstInt(ctx
->i32
,
5056 S_008F04_STRIDE(stride
) |
5057 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5058 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5059 ring
= LLVMBuildInsertElement(builder
, ring
,
5060 LLVMConstInt(ctx
->i32
, num_records
, 0),
5061 LLVMConstInt(ctx
->i32
, 2, 0), "");
5062 ring
= LLVMBuildInsertElement(builder
, ring
,
5063 LLVMConstInt(ctx
->i32
,
5064 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5065 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5066 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5067 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5068 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5069 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5070 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5071 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5072 S_008F0C_ADD_TID_ENABLE(1),
5074 LLVMConstInt(ctx
->i32
, 3, 0), "");
5076 ctx
->gsvs_ring
[stream
] = ring
;
5078 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5079 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5083 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5084 LLVMValueRef param_rw_buffers
,
5085 unsigned param_pos_fixed_pt
)
5087 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5088 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5090 /* Use the fixed-point gl_FragCoord input.
5091 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5092 * per coordinate to get the repeating effect.
5094 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5095 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5097 /* Load the buffer descriptor. */
5098 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5099 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5101 /* The stipple pattern is 32x32, each row has 32 bits. */
5102 offset
= LLVMBuildMul(builder
, address
[1],
5103 LLVMConstInt(ctx
->i32
, 4, 0), "");
5104 row
= buffer_load_const(ctx
, desc
, offset
);
5105 row
= ac_to_integer(&ctx
->ac
, row
);
5106 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5107 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5108 ac_build_kill_if_false(&ctx
->ac
, bit
);
5111 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5112 struct si_shader_config
*conf
,
5113 unsigned symbol_offset
)
5116 const unsigned char *config
=
5117 ac_shader_binary_config_start(binary
, symbol_offset
);
5118 bool really_needs_scratch
= false;
5120 /* LLVM adds SGPR spills to the scratch size.
5121 * Find out if we really need the scratch buffer.
5123 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5124 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5126 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5127 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5128 really_needs_scratch
= true;
5133 /* XXX: We may be able to emit some of these values directly rather than
5134 * extracting fields to be emitted later.
5137 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5138 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5139 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5141 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5142 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5143 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5144 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5145 case R_00B848_COMPUTE_PGM_RSRC1
:
5146 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5147 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5148 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5149 conf
->rsrc1
= value
;
5151 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5152 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5154 case R_00B84C_COMPUTE_PGM_RSRC2
:
5155 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5156 conf
->rsrc2
= value
;
5158 case R_0286CC_SPI_PS_INPUT_ENA
:
5159 conf
->spi_ps_input_ena
= value
;
5161 case R_0286D0_SPI_PS_INPUT_ADDR
:
5162 conf
->spi_ps_input_addr
= value
;
5164 case R_0286E8_SPI_TMPRING_SIZE
:
5165 case R_00B860_COMPUTE_TMPRING_SIZE
:
5166 /* WAVESIZE is in units of 256 dwords. */
5167 if (really_needs_scratch
)
5168 conf
->scratch_bytes_per_wave
=
5169 G_00B860_WAVESIZE(value
) * 256 * 4;
5171 case 0x4: /* SPILLED_SGPRS */
5172 conf
->spilled_sgprs
= value
;
5174 case 0x8: /* SPILLED_VGPRS */
5175 conf
->spilled_vgprs
= value
;
5179 static bool printed
;
5182 fprintf(stderr
, "Warning: LLVM emitted unknown "
5183 "config register: 0x%x\n", reg
);
5191 if (!conf
->spi_ps_input_addr
)
5192 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5195 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5196 uint64_t scratch_va
)
5199 uint32_t scratch_rsrc_dword0
= scratch_va
;
5200 uint32_t scratch_rsrc_dword1
=
5201 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5203 /* Enable scratch coalescing. */
5204 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5206 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5207 const struct ac_shader_reloc
*reloc
=
5208 &shader
->binary
.relocs
[i
];
5209 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5210 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5211 &scratch_rsrc_dword0
, 4);
5212 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5213 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5214 &scratch_rsrc_dword1
, 4);
5219 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5221 unsigned size
= shader
->binary
.code_size
;
5224 size
+= shader
->prolog
->binary
.code_size
;
5225 if (shader
->previous_stage
)
5226 size
+= shader
->previous_stage
->binary
.code_size
;
5227 if (shader
->prolog2
)
5228 size
+= shader
->prolog2
->binary
.code_size
;
5230 size
+= shader
->epilog
->binary
.code_size
;
5234 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5236 const struct ac_shader_binary
*prolog
=
5237 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5238 const struct ac_shader_binary
*previous_stage
=
5239 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5240 const struct ac_shader_binary
*prolog2
=
5241 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5242 const struct ac_shader_binary
*epilog
=
5243 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5244 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5245 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5246 (!epilog
? mainb
->rodata_size
: 0);
5249 assert(!prolog
|| !prolog
->rodata_size
);
5250 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5251 assert(!prolog2
|| !prolog2
->rodata_size
);
5252 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5253 !mainb
->rodata_size
);
5254 assert(!epilog
|| !epilog
->rodata_size
);
5256 r600_resource_reference(&shader
->bo
, NULL
);
5257 shader
->bo
= (struct r600_resource
*)
5258 si_aligned_buffer_create(&sscreen
->b
,
5259 sscreen
->cpdma_prefetch_writes_memory
?
5260 0 : R600_RESOURCE_FLAG_READ_ONLY
,
5261 PIPE_USAGE_IMMUTABLE
,
5262 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5268 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5269 PIPE_TRANSFER_READ_WRITE
|
5270 PIPE_TRANSFER_UNSYNCHRONIZED
);
5272 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5273 * endian-independent. */
5275 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5276 ptr
+= prolog
->code_size
;
5278 if (previous_stage
) {
5279 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5280 ptr
+= previous_stage
->code_size
;
5283 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5284 ptr
+= prolog2
->code_size
;
5287 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5288 ptr
+= mainb
->code_size
;
5291 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5292 else if (mainb
->rodata_size
> 0)
5293 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5295 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5299 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5300 struct pipe_debug_callback
*debug
,
5301 const char *name
, FILE *file
)
5306 if (binary
->disasm_string
) {
5307 fprintf(file
, "Shader %s disassembly:\n", name
);
5308 fprintf(file
, "%s", binary
->disasm_string
);
5310 if (debug
&& debug
->debug_message
) {
5311 /* Very long debug messages are cut off, so send the
5312 * disassembly one line at a time. This causes more
5313 * overhead, but on the plus side it simplifies
5314 * parsing of resulting logs.
5316 pipe_debug_message(debug
, SHADER_INFO
,
5317 "Shader Disassembly Begin");
5319 line
= binary
->disasm_string
;
5321 p
= util_strchrnul(line
, '\n');
5325 pipe_debug_message(debug
, SHADER_INFO
,
5326 "%.*s", count
, line
);
5334 pipe_debug_message(debug
, SHADER_INFO
,
5335 "Shader Disassembly End");
5338 fprintf(file
, "Shader %s binary:\n", name
);
5339 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5340 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5341 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5342 binary
->code
[i
+ 1], binary
->code
[i
]);
5347 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5349 struct si_screen
*sscreen
= shader
->selector
->screen
;
5350 struct si_shader_config
*conf
= &shader
->config
;
5351 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5352 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5353 unsigned lds_per_wave
= 0;
5354 unsigned max_simd_waves
;
5356 switch (sscreen
->info
.family
) {
5357 /* These always have 8 waves: */
5358 case CHIP_POLARIS10
:
5359 case CHIP_POLARIS11
:
5360 case CHIP_POLARIS12
:
5364 max_simd_waves
= 10;
5367 /* Compute LDS usage for PS. */
5368 switch (shader
->selector
->type
) {
5369 case PIPE_SHADER_FRAGMENT
:
5370 /* The minimum usage per wave is (num_inputs * 48). The maximum
5371 * usage is (num_inputs * 48 * 16).
5372 * We can get anything in between and it varies between waves.
5374 * The 48 bytes per input for a single primitive is equal to
5375 * 4 bytes/component * 4 components/input * 3 points.
5377 * Other stages don't know the size at compile time or don't
5378 * allocate LDS per wave, but instead they do it per thread group.
5380 lds_per_wave
= conf
->lds_size
* lds_increment
+
5381 align(num_inputs
* 48, lds_increment
);
5383 case PIPE_SHADER_COMPUTE
:
5384 if (shader
->selector
) {
5385 unsigned max_workgroup_size
=
5386 si_get_max_workgroup_size(shader
);
5387 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5388 DIV_ROUND_UP(max_workgroup_size
, 64);
5393 /* Compute the per-SIMD wave counts. */
5394 if (conf
->num_sgprs
) {
5395 if (sscreen
->info
.chip_class
>= VI
)
5396 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5398 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5401 if (conf
->num_vgprs
)
5402 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5404 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5405 * 16KB makes some SIMDs unoccupied). */
5407 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5409 conf
->max_simd_waves
= max_simd_waves
;
5412 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5413 struct pipe_debug_callback
*debug
)
5415 const struct si_shader_config
*conf
= &shader
->config
;
5417 pipe_debug_message(debug
, SHADER_INFO
,
5418 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5419 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5420 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5421 conf
->num_sgprs
, conf
->num_vgprs
,
5422 si_get_shader_binary_size(shader
),
5423 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5424 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5425 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5428 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5429 const struct si_shader
*shader
,
5432 bool check_debug_option
)
5434 const struct si_shader_config
*conf
= &shader
->config
;
5436 if (!check_debug_option
||
5437 si_can_dump_shader(sscreen
, processor
)) {
5438 if (processor
== PIPE_SHADER_FRAGMENT
) {
5439 fprintf(file
, "*** SHADER CONFIG ***\n"
5440 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5441 "SPI_PS_INPUT_ENA = 0x%04x\n",
5442 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5445 fprintf(file
, "*** SHADER STATS ***\n"
5448 "Spilled SGPRs: %d\n"
5449 "Spilled VGPRs: %d\n"
5450 "Private memory VGPRs: %d\n"
5451 "Code Size: %d bytes\n"
5453 "Scratch: %d bytes per wave\n"
5455 "********************\n\n\n",
5456 conf
->num_sgprs
, conf
->num_vgprs
,
5457 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5458 conf
->private_mem_vgprs
,
5459 si_get_shader_binary_size(shader
),
5460 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5461 conf
->max_simd_waves
);
5465 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5467 switch (processor
) {
5468 case PIPE_SHADER_VERTEX
:
5469 if (shader
->key
.as_es
)
5470 return "Vertex Shader as ES";
5471 else if (shader
->key
.as_ls
)
5472 return "Vertex Shader as LS";
5474 return "Vertex Shader as VS";
5475 case PIPE_SHADER_TESS_CTRL
:
5476 return "Tessellation Control Shader";
5477 case PIPE_SHADER_TESS_EVAL
:
5478 if (shader
->key
.as_es
)
5479 return "Tessellation Evaluation Shader as ES";
5481 return "Tessellation Evaluation Shader as VS";
5482 case PIPE_SHADER_GEOMETRY
:
5483 if (shader
->is_gs_copy_shader
)
5484 return "GS Copy Shader as VS";
5486 return "Geometry Shader";
5487 case PIPE_SHADER_FRAGMENT
:
5488 return "Pixel Shader";
5489 case PIPE_SHADER_COMPUTE
:
5490 return "Compute Shader";
5492 return "Unknown Shader";
5496 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5497 struct pipe_debug_callback
*debug
, unsigned processor
,
5498 FILE *file
, bool check_debug_option
)
5500 if (!check_debug_option
||
5501 si_can_dump_shader(sscreen
, processor
))
5502 si_dump_shader_key(processor
, shader
, file
);
5504 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5505 if (shader
->previous_stage
&&
5506 shader
->previous_stage
->binary
.llvm_ir_string
) {
5507 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5508 si_get_shader_name(shader
, processor
));
5509 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5512 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5513 si_get_shader_name(shader
, processor
));
5514 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5517 if (!check_debug_option
||
5518 (si_can_dump_shader(sscreen
, processor
) &&
5519 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5520 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5523 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5524 debug
, "prolog", file
);
5525 if (shader
->previous_stage
)
5526 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5527 debug
, "previous stage", file
);
5528 if (shader
->prolog2
)
5529 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5530 debug
, "prolog2", file
);
5532 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5535 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5536 debug
, "epilog", file
);
5537 fprintf(file
, "\n");
5540 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5541 check_debug_option
);
5544 static int si_compile_llvm(struct si_screen
*sscreen
,
5545 struct ac_shader_binary
*binary
,
5546 struct si_shader_config
*conf
,
5547 LLVMTargetMachineRef tm
,
5549 struct pipe_debug_callback
*debug
,
5554 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5556 if (si_can_dump_shader(sscreen
, processor
)) {
5557 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5559 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5560 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5561 ac_dump_module(mod
);
5562 fprintf(stderr
, "\n");
5566 if (sscreen
->record_llvm_ir
) {
5567 char *ir
= LLVMPrintModuleToString(mod
);
5568 binary
->llvm_ir_string
= strdup(ir
);
5569 LLVMDisposeMessage(ir
);
5572 if (!si_replace_shader(count
, binary
)) {
5573 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5578 si_shader_binary_read_config(binary
, conf
, 0);
5580 /* Enable 64-bit and 16-bit denormals, because there is no performance
5583 * If denormals are enabled, all floating-point output modifiers are
5586 * Don't enable denormals for 32-bit floats, because:
5587 * - Floating-point output modifiers would be ignored by the hw.
5588 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5589 * have to stop using those.
5590 * - SI & CI would be very slow.
5592 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5594 FREE(binary
->config
);
5595 FREE(binary
->global_symbol_offsets
);
5596 binary
->config
= NULL
;
5597 binary
->global_symbol_offsets
= NULL
;
5599 /* Some shaders can't have rodata because their binaries can be
5602 if (binary
->rodata_size
&&
5603 (processor
== PIPE_SHADER_VERTEX
||
5604 processor
== PIPE_SHADER_TESS_CTRL
||
5605 processor
== PIPE_SHADER_TESS_EVAL
||
5606 processor
== PIPE_SHADER_FRAGMENT
)) {
5607 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5614 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5616 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5617 LLVMBuildRetVoid(ctx
->ac
.builder
);
5619 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5622 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5624 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5625 LLVMTargetMachineRef tm
,
5626 struct si_shader_selector
*gs_selector
,
5627 struct pipe_debug_callback
*debug
)
5629 struct si_shader_context ctx
;
5630 struct si_shader
*shader
;
5631 LLVMBuilderRef builder
;
5632 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5633 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5634 struct si_shader_output_values
*outputs
;
5635 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5638 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5643 shader
= CALLOC_STRUCT(si_shader
);
5649 /* We can leave the fence as permanently signaled because the GS copy
5650 * shader only becomes visible globally after it has been compiled. */
5651 util_queue_fence_init(&shader
->ready
);
5653 shader
->selector
= gs_selector
;
5654 shader
->is_gs_copy_shader
= true;
5656 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5657 ctx
.shader
= shader
;
5658 ctx
.type
= PIPE_SHADER_VERTEX
;
5660 builder
= ctx
.ac
.builder
;
5662 create_function(&ctx
);
5663 preload_ring_buffers(&ctx
);
5665 LLVMValueRef voffset
=
5666 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5668 /* Fetch the vertex stream ID.*/
5669 LLVMValueRef stream_id
;
5671 if (gs_selector
->so
.num_outputs
)
5672 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5674 stream_id
= ctx
.i32_0
;
5676 /* Fill in output information. */
5677 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5678 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5679 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5681 for (int chan
= 0; chan
< 4; chan
++) {
5682 outputs
[i
].vertex_stream
[chan
] =
5683 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5687 LLVMBasicBlockRef end_bb
;
5688 LLVMValueRef switch_inst
;
5690 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5691 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5693 for (int stream
= 0; stream
< 4; stream
++) {
5694 LLVMBasicBlockRef bb
;
5697 if (!gsinfo
->num_stream_output_components
[stream
])
5700 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5703 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5704 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5705 LLVMPositionBuilderAtEnd(builder
, bb
);
5707 /* Fetch vertex data from GSVS ring */
5709 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5710 for (unsigned chan
= 0; chan
< 4; chan
++) {
5711 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5712 outputs
[i
].vertex_stream
[chan
] != stream
) {
5713 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5717 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5718 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5721 outputs
[i
].values
[chan
] =
5722 ac_build_buffer_load(&ctx
.ac
,
5723 ctx
.gsvs_ring
[0], 1,
5730 /* Streamout and exports. */
5731 if (gs_selector
->so
.num_outputs
) {
5732 si_llvm_emit_streamout(&ctx
, outputs
,
5733 gsinfo
->num_outputs
,
5738 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5740 LLVMBuildBr(builder
, end_bb
);
5743 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5745 LLVMBuildRetVoid(ctx
.ac
.builder
);
5747 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5748 si_llvm_optimize_module(&ctx
);
5750 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5751 &ctx
.shader
->config
, ctx
.tm
,
5753 debug
, PIPE_SHADER_GEOMETRY
,
5756 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5757 fprintf(stderr
, "GS Copy Shader:\n");
5758 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5759 PIPE_SHADER_GEOMETRY
, stderr
, true);
5760 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5763 si_llvm_dispose(&ctx
);
5774 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5775 const struct si_vs_prolog_bits
*prolog
,
5776 const char *prefix
, FILE *f
)
5778 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5779 prefix
, prolog
->instance_divisor_is_one
);
5780 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5781 prefix
, prolog
->instance_divisor_is_fetched
);
5782 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5783 prefix
, prolog
->ls_vgpr_fix
);
5785 fprintf(f
, " mono.vs.fix_fetch = {");
5786 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5787 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5791 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5794 const struct si_shader_key
*key
= &shader
->key
;
5796 fprintf(f
, "SHADER KEY\n");
5798 switch (processor
) {
5799 case PIPE_SHADER_VERTEX
:
5800 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5801 "part.vs.prolog", f
);
5802 fprintf(f
, " as_es = %u\n", key
->as_es
);
5803 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5804 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5805 key
->mono
.u
.vs_export_prim_id
);
5808 case PIPE_SHADER_TESS_CTRL
:
5809 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5810 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5811 "part.tcs.ls_prolog", f
);
5813 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5814 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5817 case PIPE_SHADER_TESS_EVAL
:
5818 fprintf(f
, " as_es = %u\n", key
->as_es
);
5819 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5820 key
->mono
.u
.vs_export_prim_id
);
5823 case PIPE_SHADER_GEOMETRY
:
5824 if (shader
->is_gs_copy_shader
)
5827 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5828 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5829 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5830 "part.gs.vs_prolog", f
);
5832 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5835 case PIPE_SHADER_COMPUTE
:
5838 case PIPE_SHADER_FRAGMENT
:
5839 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5840 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5841 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5842 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5843 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5844 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5845 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5846 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5847 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5848 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5849 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5850 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5851 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5852 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5853 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5854 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5855 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5862 if ((processor
== PIPE_SHADER_GEOMETRY
||
5863 processor
== PIPE_SHADER_TESS_EVAL
||
5864 processor
== PIPE_SHADER_VERTEX
) &&
5865 !key
->as_es
&& !key
->as_ls
) {
5866 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5867 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5871 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5872 struct si_screen
*sscreen
,
5873 LLVMTargetMachineRef tm
)
5875 struct lp_build_tgsi_context
*bld_base
;
5877 si_llvm_context_init(ctx
, sscreen
, tm
);
5879 bld_base
= &ctx
->bld_base
;
5880 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5882 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5883 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5884 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5886 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5888 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5890 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5891 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5892 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5893 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5895 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5896 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5897 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5898 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5899 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5900 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5901 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5902 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5903 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5905 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5906 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5907 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5910 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5912 struct si_shader
*shader
= ctx
->shader
;
5913 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5915 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5916 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5917 shader
->key
.as_ls
||
5921 ac_optimize_vs_outputs(&ctx
->ac
,
5923 shader
->info
.vs_output_param_offset
,
5925 &shader
->info
.nr_param_exports
);
5928 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5930 ctx
->shader
->config
.private_mem_vgprs
= 0;
5932 /* Process all LLVM instructions. */
5933 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5935 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5938 LLVMValueRef inst
= next
;
5939 next
= LLVMGetNextInstruction(next
);
5941 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5944 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5945 /* No idea why LLVM aligns allocas to 4 elements. */
5946 unsigned alignment
= LLVMGetAlignment(inst
);
5947 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5948 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5950 bb
= LLVMGetNextBasicBlock(bb
);
5954 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5955 unsigned param
, unsigned bitoffset
)
5957 LLVMValueRef args
[] = {
5958 LLVMGetParam(ctx
->main_fn
, param
),
5959 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5961 lp_build_intrinsic(ctx
->ac
.builder
,
5962 "llvm.amdgcn.init.exec.from.input",
5963 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5966 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5967 const struct si_vs_prolog_bits
*key
)
5969 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5971 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5974 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5977 struct si_shader
*shader
= ctx
->shader
;
5978 struct si_shader_selector
*sel
= shader
->selector
;
5979 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5981 // TODO clean all this up!
5982 switch (ctx
->type
) {
5983 case PIPE_SHADER_VERTEX
:
5984 ctx
->load_input
= declare_input_vs
;
5985 if (shader
->key
.as_ls
)
5986 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
5987 else if (shader
->key
.as_es
)
5988 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
5990 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5991 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5993 case PIPE_SHADER_TESS_CTRL
:
5994 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5995 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
5996 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5997 bld_base
->emit_store
= store_output_tcs
;
5998 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
5999 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6000 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6001 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6003 case PIPE_SHADER_TESS_EVAL
:
6004 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6005 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6006 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6007 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6008 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6009 if (shader
->key
.as_es
)
6010 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6012 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6013 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6015 case PIPE_SHADER_GEOMETRY
:
6016 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6017 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6018 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6019 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6020 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6021 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6023 case PIPE_SHADER_FRAGMENT
:
6024 ctx
->load_input
= declare_input_fs
;
6025 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6026 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6027 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6028 ctx
->abi
.load_sample_position
= load_sample_position
;
6029 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6031 case PIPE_SHADER_COMPUTE
:
6032 ctx
->abi
.load_local_group_size
= get_block_size
;
6035 assert(!"Unsupported shader type");
6039 ctx
->abi
.load_ubo
= load_ubo
;
6040 ctx
->abi
.load_ssbo
= load_ssbo
;
6042 create_function(ctx
);
6043 preload_ring_buffers(ctx
);
6045 /* For GFX9 merged shaders:
6046 * - Set EXEC for the first shader. If the prolog is present, set
6047 * EXEC there instead.
6048 * - Add a barrier before the second shader.
6049 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6050 * an if-statement. This is required for correctness in geometry
6051 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6054 * For monolithic merged shaders, the first shader is wrapped in an
6055 * if-block together with its prolog in si_build_wrapper_function.
6057 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6058 if (!is_monolithic
&&
6059 sel
->info
.num_instructions
> 1 && /* not empty shader */
6060 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6061 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6062 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6063 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6064 si_init_exec_from_input(ctx
,
6065 ctx
->param_merged_wave_info
, 0);
6066 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6067 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6069 ac_init_exec_full_mask(&ctx
->ac
);
6071 /* The barrier must execute for all shaders in a
6074 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6076 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6078 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6079 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6080 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6084 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6085 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6086 for (unsigned i
= 0; i
< 6; i
++) {
6087 ctx
->invoc0_tess_factors
[i
] =
6088 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
6092 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6094 for (i
= 0; i
< 4; i
++) {
6095 ctx
->gs_next_vertex
[i
] =
6096 lp_build_alloca(&ctx
->gallivm
,
6101 if (sel
->force_correct_derivs_after_kill
) {
6102 ctx
->postponed_kill
= lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i1
, "");
6103 /* true = don't kill. */
6104 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6105 ctx
->postponed_kill
);
6109 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6110 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6114 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6115 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6120 si_llvm_build_ret(ctx
, ctx
->return_value
);
6125 * Compute the VS prolog key, which contains all the information needed to
6126 * build the VS prolog function, and set shader->info bits where needed.
6128 * \param info Shader info of the vertex shader.
6129 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6130 * \param prolog_key Key of the VS prolog
6131 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6132 * \param key Output shader part key.
6134 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6135 unsigned num_input_sgprs
,
6136 const struct si_vs_prolog_bits
*prolog_key
,
6137 struct si_shader
*shader_out
,
6138 union si_shader_part_key
*key
)
6140 memset(key
, 0, sizeof(*key
));
6141 key
->vs_prolog
.states
= *prolog_key
;
6142 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6143 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6144 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6145 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6147 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6148 key
->vs_prolog
.as_ls
= 1;
6149 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6150 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6151 key
->vs_prolog
.as_es
= 1;
6152 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6155 /* Enable loading the InstanceID VGPR. */
6156 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6158 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6159 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6160 shader_out
->info
.uses_instanceid
= true;
6164 * Compute the PS prolog key, which contains all the information needed to
6165 * build the PS prolog function, and set related bits in shader->config.
6167 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6168 union si_shader_part_key
*key
,
6169 bool separate_prolog
)
6171 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6173 memset(key
, 0, sizeof(*key
));
6174 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6175 key
->ps_prolog
.colors_read
= info
->colors_read
;
6176 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6177 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6178 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6179 (key
->ps_prolog
.colors_read
||
6180 key
->ps_prolog
.states
.force_persp_sample_interp
||
6181 key
->ps_prolog
.states
.force_linear_sample_interp
||
6182 key
->ps_prolog
.states
.force_persp_center_interp
||
6183 key
->ps_prolog
.states
.force_linear_center_interp
||
6184 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6185 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6186 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6188 if (info
->colors_read
) {
6189 unsigned *color
= shader
->selector
->color_attr_index
;
6191 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6192 /* BCOLORs are stored after the last input. */
6193 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6194 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6195 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6198 for (unsigned i
= 0; i
< 2; i
++) {
6199 unsigned interp
= info
->input_interpolate
[color
[i
]];
6200 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6202 if (!(info
->colors_read
& (0xf << i
*4)))
6205 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6207 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6208 interp
== TGSI_INTERPOLATE_COLOR
)
6209 interp
= TGSI_INTERPOLATE_CONSTANT
;
6212 case TGSI_INTERPOLATE_CONSTANT
:
6213 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6215 case TGSI_INTERPOLATE_PERSPECTIVE
:
6216 case TGSI_INTERPOLATE_COLOR
:
6217 /* Force the interpolation location for colors here. */
6218 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6219 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6220 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6221 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6224 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6225 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6226 shader
->config
.spi_ps_input_ena
|=
6227 S_0286CC_PERSP_SAMPLE_ENA(1);
6229 case TGSI_INTERPOLATE_LOC_CENTER
:
6230 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6231 shader
->config
.spi_ps_input_ena
|=
6232 S_0286CC_PERSP_CENTER_ENA(1);
6234 case TGSI_INTERPOLATE_LOC_CENTROID
:
6235 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6236 shader
->config
.spi_ps_input_ena
|=
6237 S_0286CC_PERSP_CENTROID_ENA(1);
6243 case TGSI_INTERPOLATE_LINEAR
:
6244 /* Force the interpolation location for colors here. */
6245 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6246 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6247 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6248 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6250 /* The VGPR assignment for non-monolithic shaders
6251 * works because InitialPSInputAddr is set on the
6252 * main shader and PERSP_PULL_MODEL is never used.
6255 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6256 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6257 separate_prolog
? 6 : 9;
6258 shader
->config
.spi_ps_input_ena
|=
6259 S_0286CC_LINEAR_SAMPLE_ENA(1);
6261 case TGSI_INTERPOLATE_LOC_CENTER
:
6262 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6263 separate_prolog
? 8 : 11;
6264 shader
->config
.spi_ps_input_ena
|=
6265 S_0286CC_LINEAR_CENTER_ENA(1);
6267 case TGSI_INTERPOLATE_LOC_CENTROID
:
6268 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6269 separate_prolog
? 10 : 13;
6270 shader
->config
.spi_ps_input_ena
|=
6271 S_0286CC_LINEAR_CENTROID_ENA(1);
6285 * Check whether a PS prolog is required based on the key.
6287 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6289 return key
->ps_prolog
.colors_read
||
6290 key
->ps_prolog
.states
.force_persp_sample_interp
||
6291 key
->ps_prolog
.states
.force_linear_sample_interp
||
6292 key
->ps_prolog
.states
.force_persp_center_interp
||
6293 key
->ps_prolog
.states
.force_linear_center_interp
||
6294 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6295 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6296 key
->ps_prolog
.states
.poly_stipple
||
6297 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6301 * Compute the PS epilog key, which contains all the information needed to
6302 * build the PS epilog function.
6304 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6305 union si_shader_part_key
*key
)
6307 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6308 memset(key
, 0, sizeof(*key
));
6309 key
->ps_epilog
.colors_written
= info
->colors_written
;
6310 key
->ps_epilog
.writes_z
= info
->writes_z
;
6311 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6312 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6313 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6317 * Build the GS prolog function. Rotate the input vertices for triangle strips
6320 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6321 union si_shader_part_key
*key
)
6323 unsigned num_sgprs
, num_vgprs
;
6324 struct si_function_info fninfo
;
6325 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6326 LLVMTypeRef returns
[48];
6327 LLVMValueRef func
, ret
;
6329 si_init_function_info(&fninfo
);
6331 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6332 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
6333 num_vgprs
= 5; /* ES inputs are not needed by GS */
6335 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6339 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6340 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6341 returns
[i
] = ctx
->i32
;
6344 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6345 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6346 returns
[num_sgprs
+ i
] = ctx
->f32
;
6349 /* Create the function. */
6350 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6352 func
= ctx
->main_fn
;
6354 /* Set the full EXEC mask for the prolog, because we are only fiddling
6355 * with registers here. The main shader part will set the correct EXEC
6358 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6359 ac_init_exec_full_mask(&ctx
->ac
);
6361 /* Copy inputs to outputs. This should be no-op, as the registers match,
6362 * but it will prevent the compiler from overwriting them unintentionally.
6364 ret
= ctx
->return_value
;
6365 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6366 LLVMValueRef p
= LLVMGetParam(func
, i
);
6367 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6369 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6370 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6371 p
= ac_to_float(&ctx
->ac
, p
);
6372 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6375 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6376 /* Remap the input vertices for every other primitive. */
6377 const unsigned gfx6_vtx_params
[6] = {
6385 const unsigned gfx9_vtx_params
[3] = {
6390 LLVMValueRef vtx_in
[6], vtx_out
[6];
6391 LLVMValueRef prim_id
, rotate
;
6393 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6394 for (unsigned i
= 0; i
< 3; i
++) {
6395 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6396 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6399 for (unsigned i
= 0; i
< 6; i
++)
6400 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6403 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6404 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6406 for (unsigned i
= 0; i
< 6; ++i
) {
6407 LLVMValueRef base
, rotated
;
6409 rotated
= vtx_in
[(i
+ 4) % 6];
6410 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6413 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6414 for (unsigned i
= 0; i
< 3; i
++) {
6415 LLVMValueRef hi
, out
;
6417 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6418 LLVMConstInt(ctx
->i32
, 16, 0), "");
6419 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6420 out
= ac_to_float(&ctx
->ac
, out
);
6421 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6422 gfx9_vtx_params
[i
], "");
6425 for (unsigned i
= 0; i
< 6; i
++) {
6428 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6429 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6430 gfx6_vtx_params
[i
], "");
6435 LLVMBuildRet(builder
, ret
);
6439 * Given a list of shader part functions, build a wrapper function that
6440 * runs them in sequence to form a monolithic shader.
6442 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6443 LLVMValueRef
*parts
,
6446 unsigned next_shader_first_part
)
6448 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6449 /* PS epilog has one arg per color component; gfx9 merged shader
6450 * prologs need to forward 32 user SGPRs.
6452 struct si_function_info fninfo
;
6453 LLVMValueRef initial
[64], out
[64];
6454 LLVMTypeRef function_type
;
6455 unsigned num_first_params
;
6456 unsigned num_out
, initial_num_out
;
6457 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6458 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6459 unsigned num_sgprs
, num_vgprs
;
6461 struct lp_build_if_state if_state
;
6463 si_init_function_info(&fninfo
);
6465 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6466 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6467 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6470 /* The parameters of the wrapper function correspond to those of the
6471 * first part in terms of SGPRs and VGPRs, but we use the types of the
6472 * main part to get the right types. This is relevant for the
6473 * dereferenceable attribute on descriptor table pointers.
6478 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6479 num_first_params
= LLVMCountParamTypes(function_type
);
6481 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6482 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6484 if (ac_is_sgpr_param(param
)) {
6485 assert(num_vgprs
== 0);
6486 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6488 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6493 while (gprs
< num_sgprs
+ num_vgprs
) {
6494 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6495 LLVMTypeRef type
= LLVMTypeOf(param
);
6496 unsigned size
= ac_get_type_size(type
) / 4;
6498 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6500 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6501 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6502 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6507 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6508 si_get_max_workgroup_size(ctx
->shader
));
6510 if (is_merged_shader(ctx
->shader
))
6511 ac_init_exec_full_mask(&ctx
->ac
);
6513 /* Record the arguments of the function as if they were an output of
6519 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6520 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6521 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6522 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6523 unsigned size
= ac_get_type_size(param_type
) / 4;
6526 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6527 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6528 param_type
= ctx
->i32
;
6531 if (param_type
!= out_type
)
6532 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6533 out
[num_out
++] = param
;
6535 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6537 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6538 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6539 param_type
= ctx
->i64
;
6542 if (param_type
!= vector_type
)
6543 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6545 for (unsigned j
= 0; j
< size
; ++j
)
6546 out
[num_out
++] = LLVMBuildExtractElement(
6547 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6550 if (i
< fninfo
.num_sgpr_params
)
6551 num_out_sgpr
= num_out
;
6554 memcpy(initial
, out
, sizeof(out
));
6555 initial_num_out
= num_out
;
6556 initial_num_out_sgpr
= num_out_sgpr
;
6558 /* Now chain the parts. */
6559 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6560 LLVMValueRef in
[48];
6562 LLVMTypeRef ret_type
;
6563 unsigned out_idx
= 0;
6564 unsigned num_params
= LLVMCountParams(parts
[part
]);
6566 /* Merged shaders are executed conditionally depending
6567 * on the number of enabled threads passed in the input SGPRs. */
6568 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6569 LLVMValueRef ena
, count
= initial
[3];
6571 count
= LLVMBuildAnd(builder
, count
,
6572 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6573 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6574 ac_get_thread_id(&ctx
->ac
), count
, "");
6575 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6578 /* Derive arguments for the next part from outputs of the
6581 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6583 LLVMTypeRef param_type
;
6585 unsigned param_size
;
6586 LLVMValueRef arg
= NULL
;
6588 param
= LLVMGetParam(parts
[part
], param_idx
);
6589 param_type
= LLVMTypeOf(param
);
6590 param_size
= ac_get_type_size(param_type
) / 4;
6591 is_sgpr
= ac_is_sgpr_param(param
);
6594 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6596 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6597 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6599 if (param_size
== 1)
6602 arg
= lp_build_gather_values(&ctx
->gallivm
, &out
[out_idx
], param_size
);
6604 if (LLVMTypeOf(arg
) != param_type
) {
6605 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6606 if (LLVMGetPointerAddressSpace(param_type
) ==
6607 AC_CONST_32BIT_ADDR_SPACE
) {
6608 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6609 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6611 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6612 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6615 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6619 in
[param_idx
] = arg
;
6620 out_idx
+= param_size
;
6623 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6625 if (is_merged_shader(ctx
->shader
) &&
6626 part
+ 1 == next_shader_first_part
) {
6627 lp_build_endif(&if_state
);
6629 /* The second half of the merged shader should use
6630 * the inputs from the toplevel (wrapper) function,
6631 * not the return value from the last call.
6633 * That's because the last call was executed condi-
6634 * tionally, so we can't consume it in the main
6637 memcpy(out
, initial
, sizeof(initial
));
6638 num_out
= initial_num_out
;
6639 num_out_sgpr
= initial_num_out_sgpr
;
6643 /* Extract the returned GPRs. */
6644 ret_type
= LLVMTypeOf(ret
);
6648 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6649 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6651 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6653 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6655 LLVMBuildExtractValue(builder
, ret
, i
, "");
6657 assert(num_out
< ARRAY_SIZE(out
));
6658 out
[num_out
++] = val
;
6660 if (LLVMTypeOf(val
) == ctx
->i32
) {
6661 assert(num_out_sgpr
+ 1 == num_out
);
6662 num_out_sgpr
= num_out
;
6668 LLVMBuildRetVoid(builder
);
6671 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6672 LLVMTargetMachineRef tm
,
6673 struct si_shader
*shader
,
6675 struct pipe_debug_callback
*debug
)
6677 struct si_shader_selector
*sel
= shader
->selector
;
6678 struct si_shader_context ctx
;
6681 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6682 * conversion fails. */
6683 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6684 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6686 tgsi_dump(sel
->tokens
, 0);
6688 nir_print_shader(sel
->nir
, stderr
);
6689 si_dump_streamout(&sel
->so
);
6692 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6693 si_llvm_context_set_tgsi(&ctx
, shader
);
6694 ctx
.separate_prolog
= !is_monolithic
;
6696 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6697 sizeof(shader
->info
.vs_output_param_offset
));
6699 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6701 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6702 si_llvm_dispose(&ctx
);
6706 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6707 LLVMValueRef parts
[2];
6708 bool need_prolog
= sel
->vs_needs_prolog
;
6710 parts
[1] = ctx
.main_fn
;
6713 union si_shader_part_key prolog_key
;
6714 si_get_vs_prolog_key(&sel
->info
,
6715 shader
->info
.num_input_sgprs
,
6716 &shader
->key
.part
.vs
.prolog
,
6717 shader
, &prolog_key
);
6718 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6719 parts
[0] = ctx
.main_fn
;
6722 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6723 1 + need_prolog
, need_prolog
, 0);
6724 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6725 if (sscreen
->info
.chip_class
>= GFX9
) {
6726 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6727 LLVMValueRef parts
[4];
6728 bool vs_needs_prolog
=
6729 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6732 parts
[2] = ctx
.main_fn
;
6735 union si_shader_part_key tcs_epilog_key
;
6736 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6737 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6738 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6739 parts
[3] = ctx
.main_fn
;
6742 if (vs_needs_prolog
) {
6743 union si_shader_part_key vs_prolog_key
;
6744 si_get_vs_prolog_key(&ls
->info
,
6745 shader
->info
.num_input_sgprs
,
6746 &shader
->key
.part
.tcs
.ls_prolog
,
6747 shader
, &vs_prolog_key
);
6748 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6749 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6750 parts
[0] = ctx
.main_fn
;
6753 /* VS as LS main part */
6754 struct si_shader shader_ls
= {};
6755 shader_ls
.selector
= ls
;
6756 shader_ls
.key
.as_ls
= 1;
6757 shader_ls
.key
.mono
= shader
->key
.mono
;
6758 shader_ls
.key
.opt
= shader
->key
.opt
;
6759 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6761 if (!si_compile_tgsi_main(&ctx
, true)) {
6762 si_llvm_dispose(&ctx
);
6765 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6766 parts
[1] = ctx
.main_fn
;
6768 /* Reset the shader context. */
6769 ctx
.shader
= shader
;
6770 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6772 si_build_wrapper_function(&ctx
,
6773 parts
+ !vs_needs_prolog
,
6774 4 - !vs_needs_prolog
, 0,
6775 vs_needs_prolog
? 2 : 1);
6777 LLVMValueRef parts
[2];
6778 union si_shader_part_key epilog_key
;
6780 parts
[0] = ctx
.main_fn
;
6782 memset(&epilog_key
, 0, sizeof(epilog_key
));
6783 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6784 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6785 parts
[1] = ctx
.main_fn
;
6787 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6789 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6790 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6791 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6792 LLVMValueRef es_prolog
= NULL
;
6793 LLVMValueRef es_main
= NULL
;
6794 LLVMValueRef gs_prolog
= NULL
;
6795 LLVMValueRef gs_main
= ctx
.main_fn
;
6798 union si_shader_part_key gs_prolog_key
;
6799 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6800 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6801 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6802 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6803 gs_prolog
= ctx
.main_fn
;
6806 if (es
->vs_needs_prolog
) {
6807 union si_shader_part_key vs_prolog_key
;
6808 si_get_vs_prolog_key(&es
->info
,
6809 shader
->info
.num_input_sgprs
,
6810 &shader
->key
.part
.gs
.vs_prolog
,
6811 shader
, &vs_prolog_key
);
6812 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6813 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6814 es_prolog
= ctx
.main_fn
;
6818 struct si_shader shader_es
= {};
6819 shader_es
.selector
= es
;
6820 shader_es
.key
.as_es
= 1;
6821 shader_es
.key
.mono
= shader
->key
.mono
;
6822 shader_es
.key
.opt
= shader
->key
.opt
;
6823 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6825 if (!si_compile_tgsi_main(&ctx
, true)) {
6826 si_llvm_dispose(&ctx
);
6829 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6830 es_main
= ctx
.main_fn
;
6832 /* Reset the shader context. */
6833 ctx
.shader
= shader
;
6834 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6836 /* Prepare the array of shader parts. */
6837 LLVMValueRef parts
[4];
6838 unsigned num_parts
= 0, main_part
, next_first_part
;
6841 parts
[num_parts
++] = es_prolog
;
6843 parts
[main_part
= num_parts
++] = es_main
;
6844 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6845 parts
[num_parts
++] = gs_main
;
6847 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6848 main_part
, next_first_part
);
6850 LLVMValueRef parts
[2];
6851 union si_shader_part_key prolog_key
;
6853 parts
[1] = ctx
.main_fn
;
6855 memset(&prolog_key
, 0, sizeof(prolog_key
));
6856 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6857 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6858 parts
[0] = ctx
.main_fn
;
6860 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6862 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6863 LLVMValueRef parts
[3];
6864 union si_shader_part_key prolog_key
;
6865 union si_shader_part_key epilog_key
;
6868 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6869 need_prolog
= si_need_ps_prolog(&prolog_key
);
6871 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6874 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6875 parts
[0] = ctx
.main_fn
;
6878 si_get_ps_epilog_key(shader
, &epilog_key
);
6879 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6880 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6882 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6883 need_prolog
? 1 : 0, 0);
6886 si_llvm_optimize_module(&ctx
);
6888 /* Post-optimization transformations and analysis. */
6889 si_optimize_vs_outputs(&ctx
);
6891 if ((debug
&& debug
->debug_message
) ||
6892 si_can_dump_shader(sscreen
, ctx
.type
))
6893 si_count_scratch_private_memory(&ctx
);
6895 /* Compile to bytecode. */
6896 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6897 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6898 si_llvm_dispose(&ctx
);
6900 fprintf(stderr
, "LLVM failed to compile shader\n");
6904 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6905 * LLVM 3.9svn has this bug.
6907 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6908 unsigned wave_size
= 64;
6909 unsigned max_vgprs
= 256;
6910 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
6911 unsigned max_sgprs_per_wave
= 128;
6912 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6913 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6914 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6916 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6917 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6919 if (shader
->config
.num_sgprs
> max_sgprs
||
6920 shader
->config
.num_vgprs
> max_vgprs
) {
6921 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6922 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6923 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6924 max_sgprs
, max_vgprs
);
6926 /* Just terminate the process, because dependent
6927 * shaders can hang due to bad input data, but use
6928 * the env var to allow shader-db to work.
6930 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6935 /* Add the scratch offset to input SGPRs. */
6936 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6937 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6939 /* Calculate the number of fragment input VGPRs. */
6940 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6941 shader
->info
.num_input_vgprs
= 0;
6942 shader
->info
.face_vgpr_index
= -1;
6943 shader
->info
.ancillary_vgpr_index
= -1;
6945 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6946 shader
->info
.num_input_vgprs
+= 2;
6947 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6948 shader
->info
.num_input_vgprs
+= 2;
6949 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6950 shader
->info
.num_input_vgprs
+= 2;
6951 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6952 shader
->info
.num_input_vgprs
+= 3;
6953 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6954 shader
->info
.num_input_vgprs
+= 2;
6955 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6956 shader
->info
.num_input_vgprs
+= 2;
6957 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6958 shader
->info
.num_input_vgprs
+= 2;
6959 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6960 shader
->info
.num_input_vgprs
+= 1;
6961 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6962 shader
->info
.num_input_vgprs
+= 1;
6963 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6964 shader
->info
.num_input_vgprs
+= 1;
6965 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6966 shader
->info
.num_input_vgprs
+= 1;
6967 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6968 shader
->info
.num_input_vgprs
+= 1;
6969 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6970 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6971 shader
->info
.num_input_vgprs
+= 1;
6973 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6974 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6975 shader
->info
.num_input_vgprs
+= 1;
6977 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6978 shader
->info
.num_input_vgprs
+= 1;
6979 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6980 shader
->info
.num_input_vgprs
+= 1;
6983 si_calculate_max_simd_waves(shader
);
6984 si_shader_dump_stats_for_shader_db(shader
, debug
);
6989 * Create, compile and return a shader part (prolog or epilog).
6991 * \param sscreen screen
6992 * \param list list of shader parts of the same category
6993 * \param type shader type
6994 * \param key shader part key
6995 * \param prolog whether the part being requested is a prolog
6996 * \param tm LLVM target machine
6997 * \param debug debug callback
6998 * \param build the callback responsible for building the main function
6999 * \return non-NULL on success
7001 static struct si_shader_part
*
7002 si_get_shader_part(struct si_screen
*sscreen
,
7003 struct si_shader_part
**list
,
7004 enum pipe_shader_type type
,
7006 union si_shader_part_key
*key
,
7007 LLVMTargetMachineRef tm
,
7008 struct pipe_debug_callback
*debug
,
7009 void (*build
)(struct si_shader_context
*,
7010 union si_shader_part_key
*),
7013 struct si_shader_part
*result
;
7015 mtx_lock(&sscreen
->shader_parts_mutex
);
7017 /* Find existing. */
7018 for (result
= *list
; result
; result
= result
->next
) {
7019 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7020 mtx_unlock(&sscreen
->shader_parts_mutex
);
7025 /* Compile a new one. */
7026 result
= CALLOC_STRUCT(si_shader_part
);
7029 struct si_shader shader
= {};
7030 struct si_shader_context ctx
;
7032 si_init_shader_ctx(&ctx
, sscreen
, tm
);
7033 ctx
.shader
= &shader
;
7037 case PIPE_SHADER_VERTEX
:
7038 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7039 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7041 case PIPE_SHADER_TESS_CTRL
:
7043 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7045 case PIPE_SHADER_GEOMETRY
:
7048 case PIPE_SHADER_FRAGMENT
:
7050 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7052 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7055 unreachable("bad shader part");
7061 si_llvm_optimize_module(&ctx
);
7063 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
7064 ctx
.ac
.module
, debug
, ctx
.type
, name
)) {
7070 result
->next
= *list
;
7074 si_llvm_dispose(&ctx
);
7075 mtx_unlock(&sscreen
->shader_parts_mutex
);
7079 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7081 LLVMValueRef ptr
[2], list
;
7082 bool is_merged_shader
=
7083 ctx
->screen
->info
.chip_class
>= GFX9
&&
7084 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7085 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7086 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7088 if (HAVE_32BIT_POINTERS
) {
7089 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7090 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7091 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7095 /* Get the pointer to rw buffers. */
7096 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7097 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
+ 1);
7098 list
= lp_build_gather_values(&ctx
->gallivm
, ptr
, 2);
7099 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7100 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7101 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7106 * Build the vertex shader prolog function.
7108 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7109 * All inputs are returned unmodified. The vertex load indices are
7110 * stored after them, which will be used by the API VS for fetching inputs.
7112 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7117 * (VertexID + BaseVertex),
7118 * (InstanceID + StartInstance),
7119 * (InstanceID / 2 + StartInstance)
7121 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7122 union si_shader_part_key
*key
)
7124 struct si_function_info fninfo
;
7125 LLVMTypeRef
*returns
;
7126 LLVMValueRef ret
, func
;
7128 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7129 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7130 LLVMValueRef input_vgprs
[9];
7131 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7133 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7135 si_init_function_info(&fninfo
);
7137 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7138 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7139 sizeof(LLVMTypeRef
));
7142 /* Declare input and output SGPRs. */
7143 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7144 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7145 returns
[num_returns
++] = ctx
->i32
;
7148 /* Preloaded VGPRs (outputs must be floats) */
7149 for (i
= 0; i
< num_input_vgprs
; i
++) {
7150 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7151 returns
[num_returns
++] = ctx
->f32
;
7154 /* Vertex load indices. */
7155 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7156 returns
[num_returns
++] = ctx
->f32
;
7158 /* Create the function. */
7159 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7160 func
= ctx
->main_fn
;
7162 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7163 if (!key
->vs_prolog
.is_monolithic
)
7164 si_init_exec_from_input(ctx
, 3, 0);
7166 if (key
->vs_prolog
.as_ls
&&
7167 ctx
->screen
->has_ls_vgpr_init_bug
) {
7168 /* If there are no HS threads, SPI loads the LS VGPRs
7169 * starting at VGPR 0. Shift them back to where they
7172 LLVMValueRef has_hs_threads
=
7173 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7174 unpack_param(ctx
, 3, 8, 8),
7177 for (i
= 4; i
> 0; --i
) {
7178 input_vgprs
[i
+ 1] =
7179 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7181 input_vgprs
[i
- 1], "");
7186 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7187 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7189 /* Copy inputs to outputs. This should be no-op, as the registers match,
7190 * but it will prevent the compiler from overwriting them unintentionally.
7192 ret
= ctx
->return_value
;
7193 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7194 LLVMValueRef p
= LLVMGetParam(func
, i
);
7195 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7197 for (i
= 0; i
< num_input_vgprs
; i
++) {
7198 LLVMValueRef p
= input_vgprs
[i
];
7199 p
= ac_to_float(&ctx
->ac
, p
);
7200 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7201 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7204 /* Compute vertex load indices from instance divisors. */
7205 LLVMValueRef instance_divisor_constbuf
= NULL
;
7207 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7208 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7209 LLVMValueRef buf_index
=
7210 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7211 instance_divisor_constbuf
=
7212 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7215 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7216 bool divisor_is_one
=
7217 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7218 bool divisor_is_fetched
=
7219 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7222 if (divisor_is_one
|| divisor_is_fetched
) {
7223 LLVMValueRef divisor
= ctx
->i32_1
;
7225 if (divisor_is_fetched
) {
7226 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7227 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7228 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7231 /* InstanceID / Divisor + StartInstance */
7232 index
= get_instance_index_for_fetch(ctx
,
7234 SI_SGPR_START_INSTANCE
,
7237 /* VertexID + BaseVertex */
7238 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7240 LLVMGetParam(func
, user_sgpr_base
+
7241 SI_SGPR_BASE_VERTEX
), "");
7244 index
= ac_to_float(&ctx
->ac
, index
);
7245 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7246 fninfo
.num_params
+ i
, "");
7249 si_llvm_build_ret(ctx
, ret
);
7252 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7253 LLVMTargetMachineRef tm
,
7254 struct si_shader
*shader
,
7255 struct pipe_debug_callback
*debug
,
7256 struct si_shader
*main_part
,
7257 const struct si_vs_prolog_bits
*key
)
7259 struct si_shader_selector
*vs
= main_part
->selector
;
7261 if (!si_vs_needs_prolog(vs
, key
))
7264 /* Get the prolog. */
7265 union si_shader_part_key prolog_key
;
7266 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7267 key
, shader
, &prolog_key
);
7270 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7271 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
7272 debug
, si_build_vs_prolog_function
,
7273 "Vertex Shader Prolog");
7274 return shader
->prolog
!= NULL
;
7278 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7280 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7281 LLVMTargetMachineRef tm
,
7282 struct si_shader
*shader
,
7283 struct pipe_debug_callback
*debug
)
7285 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
7286 &shader
->key
.part
.vs
.prolog
);
7290 * Compile the TCS epilog function. This writes tesselation factors to memory
7291 * based on the output primitive type of the tesselator (determined by TES).
7293 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7294 union si_shader_part_key
*key
)
7296 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7297 struct si_function_info fninfo
;
7300 si_init_function_info(&fninfo
);
7302 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7303 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7304 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7305 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7306 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7307 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7308 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7309 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7310 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7311 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7312 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7313 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7314 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7315 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7316 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7317 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7318 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7319 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7320 if (!HAVE_32BIT_POINTERS
)
7321 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7322 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7323 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7324 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7326 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7327 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7328 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7329 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7330 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7331 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7332 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7333 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7334 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7335 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7338 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7339 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7340 unsigned tess_factors_idx
=
7341 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7342 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7343 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7345 for (unsigned i
= 0; i
< 6; i
++)
7346 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7348 /* Create the function. */
7349 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7350 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7351 ac_declare_lds_as_pointer(&ctx
->ac
);
7352 func
= ctx
->main_fn
;
7354 LLVMValueRef invoc0_tess_factors
[6];
7355 for (unsigned i
= 0; i
< 6; i
++)
7356 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7358 si_write_tess_factors(bld_base
,
7359 LLVMGetParam(func
, tess_factors_idx
),
7360 LLVMGetParam(func
, tess_factors_idx
+ 1),
7361 LLVMGetParam(func
, tess_factors_idx
+ 2),
7362 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7364 LLVMBuildRetVoid(ctx
->ac
.builder
);
7368 * Select and compile (or reuse) TCS parts (epilog).
7370 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7371 LLVMTargetMachineRef tm
,
7372 struct si_shader
*shader
,
7373 struct pipe_debug_callback
*debug
)
7375 if (sscreen
->info
.chip_class
>= GFX9
) {
7376 struct si_shader
*ls_main_part
=
7377 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7379 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
7380 &shader
->key
.part
.tcs
.ls_prolog
))
7383 shader
->previous_stage
= ls_main_part
;
7386 /* Get the epilog. */
7387 union si_shader_part_key epilog_key
;
7388 memset(&epilog_key
, 0, sizeof(epilog_key
));
7389 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7391 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7392 PIPE_SHADER_TESS_CTRL
, false,
7393 &epilog_key
, tm
, debug
,
7394 si_build_tcs_epilog_function
,
7395 "Tessellation Control Shader Epilog");
7396 return shader
->epilog
!= NULL
;
7400 * Select and compile (or reuse) GS parts (prolog).
7402 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7403 LLVMTargetMachineRef tm
,
7404 struct si_shader
*shader
,
7405 struct pipe_debug_callback
*debug
)
7407 if (sscreen
->info
.chip_class
>= GFX9
) {
7408 struct si_shader
*es_main_part
=
7409 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7411 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7412 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7413 &shader
->key
.part
.gs
.vs_prolog
))
7416 shader
->previous_stage
= es_main_part
;
7419 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7422 union si_shader_part_key prolog_key
;
7423 memset(&prolog_key
, 0, sizeof(prolog_key
));
7424 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7426 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7427 PIPE_SHADER_GEOMETRY
, true,
7428 &prolog_key
, tm
, debug
,
7429 si_build_gs_prolog_function
,
7430 "Geometry Shader Prolog");
7431 return shader
->prolog2
!= NULL
;
7435 * Build the pixel shader prolog function. This handles:
7436 * - two-side color selection and interpolation
7437 * - overriding interpolation parameters for the API PS
7438 * - polygon stippling
7440 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7441 * overriden by other states. (e.g. per-sample interpolation)
7442 * Interpolated colors are stored after the preloaded VGPRs.
7444 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7445 union si_shader_part_key
*key
)
7447 struct si_function_info fninfo
;
7448 LLVMValueRef ret
, func
;
7449 int num_returns
, i
, num_color_channels
;
7451 assert(si_need_ps_prolog(key
));
7453 si_init_function_info(&fninfo
);
7455 /* Declare inputs. */
7456 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7457 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7459 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7460 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7462 /* Declare outputs (same as inputs + add colors if needed) */
7463 num_returns
= fninfo
.num_params
;
7464 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7465 for (i
= 0; i
< num_color_channels
; i
++)
7466 fninfo
.types
[num_returns
++] = ctx
->f32
;
7468 /* Create the function. */
7469 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7471 func
= ctx
->main_fn
;
7473 /* Copy inputs to outputs. This should be no-op, as the registers match,
7474 * but it will prevent the compiler from overwriting them unintentionally.
7476 ret
= ctx
->return_value
;
7477 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7478 LLVMValueRef p
= LLVMGetParam(func
, i
);
7479 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7482 /* Polygon stippling. */
7483 if (key
->ps_prolog
.states
.poly_stipple
) {
7484 /* POS_FIXED_PT is always last. */
7485 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7486 key
->ps_prolog
.num_input_vgprs
- 1;
7487 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7489 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7492 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7493 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7494 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7495 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7497 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7498 * The hw doesn't compute CENTROID if the whole wave only
7499 * contains fully-covered quads.
7501 * PRIM_MASK is after user SGPRs.
7503 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7504 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7505 LLVMConstInt(ctx
->i32
, 31, 0), "");
7506 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7509 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7510 /* Read PERSP_CENTER. */
7511 for (i
= 0; i
< 2; i
++)
7512 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7513 /* Read PERSP_CENTROID. */
7514 for (i
= 0; i
< 2; i
++)
7515 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7516 /* Select PERSP_CENTROID. */
7517 for (i
= 0; i
< 2; i
++) {
7518 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7519 center
[i
], centroid
[i
], "");
7520 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7521 tmp
, base
+ 4 + i
, "");
7524 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7525 /* Read LINEAR_CENTER. */
7526 for (i
= 0; i
< 2; i
++)
7527 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7528 /* Read LINEAR_CENTROID. */
7529 for (i
= 0; i
< 2; i
++)
7530 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7531 /* Select LINEAR_CENTROID. */
7532 for (i
= 0; i
< 2; i
++) {
7533 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7534 center
[i
], centroid
[i
], "");
7535 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7536 tmp
, base
+ 10 + i
, "");
7541 /* Force per-sample interpolation. */
7542 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7543 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7544 LLVMValueRef persp_sample
[2];
7546 /* Read PERSP_SAMPLE. */
7547 for (i
= 0; i
< 2; i
++)
7548 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7549 /* Overwrite PERSP_CENTER. */
7550 for (i
= 0; i
< 2; i
++)
7551 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7552 persp_sample
[i
], base
+ 2 + i
, "");
7553 /* Overwrite PERSP_CENTROID. */
7554 for (i
= 0; i
< 2; i
++)
7555 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7556 persp_sample
[i
], base
+ 4 + i
, "");
7558 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7559 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7560 LLVMValueRef linear_sample
[2];
7562 /* Read LINEAR_SAMPLE. */
7563 for (i
= 0; i
< 2; i
++)
7564 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7565 /* Overwrite LINEAR_CENTER. */
7566 for (i
= 0; i
< 2; i
++)
7567 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7568 linear_sample
[i
], base
+ 8 + i
, "");
7569 /* Overwrite LINEAR_CENTROID. */
7570 for (i
= 0; i
< 2; i
++)
7571 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7572 linear_sample
[i
], base
+ 10 + i
, "");
7575 /* Force center interpolation. */
7576 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7577 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7578 LLVMValueRef persp_center
[2];
7580 /* Read PERSP_CENTER. */
7581 for (i
= 0; i
< 2; i
++)
7582 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7583 /* Overwrite PERSP_SAMPLE. */
7584 for (i
= 0; i
< 2; i
++)
7585 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7586 persp_center
[i
], base
+ i
, "");
7587 /* Overwrite PERSP_CENTROID. */
7588 for (i
= 0; i
< 2; i
++)
7589 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7590 persp_center
[i
], base
+ 4 + i
, "");
7592 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7593 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7594 LLVMValueRef linear_center
[2];
7596 /* Read LINEAR_CENTER. */
7597 for (i
= 0; i
< 2; i
++)
7598 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7599 /* Overwrite LINEAR_SAMPLE. */
7600 for (i
= 0; i
< 2; i
++)
7601 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7602 linear_center
[i
], base
+ 6 + i
, "");
7603 /* Overwrite LINEAR_CENTROID. */
7604 for (i
= 0; i
< 2; i
++)
7605 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7606 linear_center
[i
], base
+ 10 + i
, "");
7609 /* Interpolate colors. */
7610 unsigned color_out_idx
= 0;
7611 for (i
= 0; i
< 2; i
++) {
7612 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7613 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7614 key
->ps_prolog
.face_vgpr_index
;
7615 LLVMValueRef interp
[2], color
[4];
7616 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7621 /* If the interpolation qualifier is not CONSTANT (-1). */
7622 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7623 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7624 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7626 /* Get the (i,j) updated by bc_optimize handling. */
7627 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7629 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7630 interp_vgpr
+ 1, "");
7631 interp_ij
= lp_build_gather_values(&ctx
->gallivm
, interp
, 2);
7634 /* Use the absolute location of the input. */
7635 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7637 if (key
->ps_prolog
.states
.color_two_side
) {
7638 face
= LLVMGetParam(func
, face_vgpr
);
7639 face
= ac_to_integer(&ctx
->ac
, face
);
7642 interp_fs_input(ctx
,
7643 key
->ps_prolog
.color_attr_index
[i
],
7644 TGSI_SEMANTIC_COLOR
, i
,
7645 key
->ps_prolog
.num_interp_inputs
,
7646 key
->ps_prolog
.colors_read
, interp_ij
,
7647 prim_mask
, face
, color
);
7650 unsigned chan
= u_bit_scan(&writemask
);
7651 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7652 fninfo
.num_params
+ color_out_idx
++, "");
7656 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7659 * "When per-sample shading is active due to the use of a fragment
7660 * input qualified by sample or due to the use of the gl_SampleID
7661 * or gl_SamplePosition variables, only the bit for the current
7662 * sample is set in gl_SampleMaskIn. When state specifies multiple
7663 * fragment shader invocations for a given fragment, the sample
7664 * mask for any single fragment shader invocation may specify a
7665 * subset of the covered samples for the fragment. In this case,
7666 * the bit corresponding to each covered sample will be set in
7667 * exactly one fragment shader invocation."
7669 * The samplemask loaded by hardware is always the coverage of the
7670 * entire pixel/fragment, so mask bits out based on the sample ID.
7672 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7673 /* The bit pattern matches that used by fixed function fragment
7675 static const uint16_t ps_iter_masks
[] = {
7676 0xffff, /* not used */
7682 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7684 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7685 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7686 key
->ps_prolog
.ancillary_vgpr_index
;
7687 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7688 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7690 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7691 samplemask
= LLVMBuildAnd(
7694 LLVMBuildShl(ctx
->ac
.builder
,
7695 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7698 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7700 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7701 ancillary_vgpr
+ 1, "");
7704 /* Tell LLVM to insert WQM instruction sequence when needed. */
7705 if (key
->ps_prolog
.wqm
) {
7706 LLVMAddTargetDependentFunctionAttr(func
,
7707 "amdgpu-ps-wqm-outputs", "");
7710 si_llvm_build_ret(ctx
, ret
);
7714 * Build the pixel shader epilog function. This handles everything that must be
7715 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7717 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7718 union si_shader_part_key
*key
)
7720 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7721 struct si_function_info fninfo
;
7722 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7724 struct si_ps_exports exp
= {};
7726 si_init_function_info(&fninfo
);
7728 /* Declare input SGPRs. */
7729 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7730 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7731 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7732 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7733 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7735 /* Declare input VGPRs. */
7736 unsigned required_num_params
=
7737 fninfo
.num_sgpr_params
+
7738 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7739 key
->ps_epilog
.writes_z
+
7740 key
->ps_epilog
.writes_stencil
+
7741 key
->ps_epilog
.writes_samplemask
;
7743 required_num_params
= MAX2(required_num_params
,
7744 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7746 while (fninfo
.num_params
< required_num_params
)
7747 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7749 /* Create the function. */
7750 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7751 /* Disable elimination of unused inputs. */
7752 si_llvm_add_attribute(ctx
->main_fn
,
7753 "InitialPSInputAddr", 0xffffff);
7755 /* Process colors. */
7756 unsigned vgpr
= fninfo
.num_sgpr_params
;
7757 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7758 int last_color_export
= -1;
7760 /* Find the last color export. */
7761 if (!key
->ps_epilog
.writes_z
&&
7762 !key
->ps_epilog
.writes_stencil
&&
7763 !key
->ps_epilog
.writes_samplemask
) {
7764 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7766 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7767 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7768 /* Just set this if any of the colorbuffers are enabled. */
7770 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7771 last_color_export
= 0;
7773 for (i
= 0; i
< 8; i
++)
7774 if (colors_written
& (1 << i
) &&
7775 (spi_format
>> (i
* 4)) & 0xf)
7776 last_color_export
= i
;
7780 while (colors_written
) {
7781 LLVMValueRef color
[4];
7782 int mrt
= u_bit_scan(&colors_written
);
7784 for (i
= 0; i
< 4; i
++)
7785 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7787 si_export_mrt_color(bld_base
, color
, mrt
,
7788 fninfo
.num_params
- 1,
7789 mrt
== last_color_export
, &exp
);
7792 /* Process depth, stencil, samplemask. */
7793 if (key
->ps_epilog
.writes_z
)
7794 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7795 if (key
->ps_epilog
.writes_stencil
)
7796 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7797 if (key
->ps_epilog
.writes_samplemask
)
7798 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7800 if (depth
|| stencil
|| samplemask
)
7801 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7802 else if (last_color_export
== -1)
7803 ac_build_export_null(&ctx
->ac
);
7806 si_emit_ps_exports(ctx
, &exp
);
7809 LLVMBuildRetVoid(ctx
->ac
.builder
);
7813 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7815 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7816 LLVMTargetMachineRef tm
,
7817 struct si_shader
*shader
,
7818 struct pipe_debug_callback
*debug
)
7820 union si_shader_part_key prolog_key
;
7821 union si_shader_part_key epilog_key
;
7823 /* Get the prolog. */
7824 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7826 /* The prolog is a no-op if these aren't set. */
7827 if (si_need_ps_prolog(&prolog_key
)) {
7829 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7830 PIPE_SHADER_FRAGMENT
, true,
7831 &prolog_key
, tm
, debug
,
7832 si_build_ps_prolog_function
,
7833 "Fragment Shader Prolog");
7834 if (!shader
->prolog
)
7838 /* Get the epilog. */
7839 si_get_ps_epilog_key(shader
, &epilog_key
);
7842 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7843 PIPE_SHADER_FRAGMENT
, false,
7844 &epilog_key
, tm
, debug
,
7845 si_build_ps_epilog_function
,
7846 "Fragment Shader Epilog");
7847 if (!shader
->epilog
)
7850 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7851 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7852 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7853 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7856 /* Set up the enable bits for per-sample shading if needed. */
7857 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7858 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7859 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7860 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7861 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7862 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7864 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7865 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7866 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7867 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7868 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7869 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7871 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7872 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7873 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7874 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7875 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7876 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7878 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7879 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7880 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7881 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7882 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7883 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7886 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7887 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7888 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7889 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7890 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7893 /* At least one pair of interpolation weights must be enabled. */
7894 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7895 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7896 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7899 /* Samplemask fixup requires the sample ID. */
7900 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7901 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7902 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7905 /* The sample mask input is always enabled, because the API shader always
7906 * passes it through to the epilog. Disable it here if it's unused.
7908 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7909 !shader
->selector
->info
.reads_samplemask
)
7910 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7915 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7918 /* SPI barrier management bug:
7919 * Make sure we have at least 4k of LDS in use to avoid the bug.
7920 * It applies to workgroup sizes of more than one wavefront.
7922 if (sscreen
->info
.family
== CHIP_BONAIRE
||
7923 sscreen
->info
.family
== CHIP_KABINI
||
7924 sscreen
->info
.family
== CHIP_MULLINS
)
7925 *lds_size
= MAX2(*lds_size
, 8);
7928 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7929 struct si_shader
*shader
)
7931 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7933 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7935 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7936 si_get_max_workgroup_size(shader
) > 64) {
7937 si_multiwave_lds_size_workaround(sscreen
,
7938 &shader
->config
.lds_size
);
7942 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7943 struct si_shader
*shader
,
7944 struct pipe_debug_callback
*debug
)
7946 struct si_shader_selector
*sel
= shader
->selector
;
7947 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7950 /* LS, ES, VS are compiled on demand if the main part hasn't been
7951 * compiled for that stage.
7953 * Vertex shaders are compiled on demand when a vertex fetch
7954 * workaround must be applied.
7956 if (shader
->is_monolithic
) {
7957 /* Monolithic shader (compiled as a whole, has many variants,
7958 * may take a long time to compile).
7960 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7964 /* The shader consists of several parts:
7966 * - the middle part is the user shader, it has 1 variant only
7967 * and it was compiled during the creation of the shader
7969 * - the prolog part is inserted at the beginning
7970 * - the epilog part is inserted at the end
7972 * The prolog and epilog have many (but simple) variants.
7974 * Starting with gfx9, geometry and tessellation control
7975 * shaders also contain the prolog and user shader parts of
7976 * the previous shader stage.
7982 /* Copy the compiled TGSI shader data over. */
7983 shader
->is_binary_shared
= true;
7984 shader
->binary
= mainp
->binary
;
7985 shader
->config
= mainp
->config
;
7986 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7987 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7988 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7989 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7990 memcpy(shader
->info
.vs_output_param_offset
,
7991 mainp
->info
.vs_output_param_offset
,
7992 sizeof(mainp
->info
.vs_output_param_offset
));
7993 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7994 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7995 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7997 /* Select prologs and/or epilogs. */
7998 switch (sel
->type
) {
7999 case PIPE_SHADER_VERTEX
:
8000 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
8003 case PIPE_SHADER_TESS_CTRL
:
8004 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
8007 case PIPE_SHADER_TESS_EVAL
:
8009 case PIPE_SHADER_GEOMETRY
:
8010 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
8013 case PIPE_SHADER_FRAGMENT
:
8014 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
8017 /* Make sure we have at least as many VGPRs as there
8018 * are allocated inputs.
8020 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8021 shader
->info
.num_input_vgprs
);
8025 /* Update SGPR and VGPR counts. */
8026 if (shader
->prolog
) {
8027 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8028 shader
->prolog
->config
.num_sgprs
);
8029 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8030 shader
->prolog
->config
.num_vgprs
);
8032 if (shader
->previous_stage
) {
8033 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8034 shader
->previous_stage
->config
.num_sgprs
);
8035 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8036 shader
->previous_stage
->config
.num_vgprs
);
8037 shader
->config
.spilled_sgprs
=
8038 MAX2(shader
->config
.spilled_sgprs
,
8039 shader
->previous_stage
->config
.spilled_sgprs
);
8040 shader
->config
.spilled_vgprs
=
8041 MAX2(shader
->config
.spilled_vgprs
,
8042 shader
->previous_stage
->config
.spilled_vgprs
);
8043 shader
->config
.private_mem_vgprs
=
8044 MAX2(shader
->config
.private_mem_vgprs
,
8045 shader
->previous_stage
->config
.private_mem_vgprs
);
8046 shader
->config
.scratch_bytes_per_wave
=
8047 MAX2(shader
->config
.scratch_bytes_per_wave
,
8048 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8049 shader
->info
.uses_instanceid
|=
8050 shader
->previous_stage
->info
.uses_instanceid
;
8052 if (shader
->prolog2
) {
8053 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8054 shader
->prolog2
->config
.num_sgprs
);
8055 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8056 shader
->prolog2
->config
.num_vgprs
);
8058 if (shader
->epilog
) {
8059 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8060 shader
->epilog
->config
.num_sgprs
);
8061 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8062 shader
->epilog
->config
.num_vgprs
);
8064 si_calculate_max_simd_waves(shader
);
8067 si_fix_resource_usage(sscreen
, shader
);
8068 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8072 r
= si_shader_binary_upload(sscreen
, shader
);
8074 fprintf(stderr
, "LLVM failed to upload shader\n");
8081 void si_shader_destroy(struct si_shader
*shader
)
8083 if (shader
->scratch_bo
)
8084 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8086 r600_resource_reference(&shader
->bo
, NULL
);
8088 if (!shader
->is_binary_shared
)
8089 ac_shader_binary_clean(&shader
->binary
);
8091 free(shader
->shader_log
);