2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 #include "gallivm/lp_bld_const.h"
30 #include "gallivm/lp_bld_gather.h"
31 #include "gallivm/lp_bld_intr.h"
32 #include "gallivm/lp_bld_logic.h"
33 #include "gallivm/lp_bld_arit.h"
34 #include "gallivm/lp_bld_flow.h"
35 #include "gallivm/lp_bld_misc.h"
36 #include "util/u_memory.h"
37 #include "util/u_string.h"
38 #include "tgsi/tgsi_build.h"
39 #include "tgsi/tgsi_util.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "ac_binary.h"
43 #include "ac_llvm_util.h"
44 #include "ac_exp_param.h"
45 #include "si_shader_internal.h"
49 #include "compiler/nir/nir.h"
51 static const char *scratch_rsrc_dword0_symbol
=
52 "SCRATCH_RSRC_DWORD0";
54 static const char *scratch_rsrc_dword1_symbol
=
55 "SCRATCH_RSRC_DWORD1";
57 struct si_shader_output_values
59 LLVMValueRef values
[4];
60 unsigned semantic_name
;
61 unsigned semantic_index
;
62 ubyte vertex_stream
[4];
66 * Used to collect types and other info about arguments of the LLVM function
67 * before the function is created.
69 struct si_function_info
{
70 LLVMTypeRef types
[100];
71 LLVMValueRef
*assign
[100];
72 unsigned num_sgpr_params
;
81 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
82 struct si_screen
*sscreen
,
83 LLVMTargetMachineRef tm
);
85 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
86 struct lp_build_tgsi_context
*bld_base
,
87 struct lp_build_emit_data
*emit_data
);
89 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
92 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
93 union si_shader_part_key
*key
);
94 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
95 union si_shader_part_key
*key
);
96 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
97 union si_shader_part_key
*key
);
98 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
99 union si_shader_part_key
*key
);
101 /* Ideally pass the sample mask input to the PS epilog as v14, which
102 * is its usual location, so that the shader doesn't have to add v_mov.
104 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
107 CONST_ADDR_SPACE
= 2,
108 LOCAL_ADDR_SPACE
= 3,
111 static bool is_merged_shader(struct si_shader
*shader
)
113 if (shader
->selector
->screen
->b
.chip_class
<= VI
)
116 return shader
->key
.as_ls
||
118 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
119 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
122 static void si_init_function_info(struct si_function_info
*fninfo
)
124 fninfo
->num_params
= 0;
125 fninfo
->num_sgpr_params
= 0;
128 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
,
130 LLVMValueRef
*assign
)
132 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
134 unsigned idx
= fninfo
->num_params
++;
135 assert(idx
< ARRAY_SIZE(fninfo
->types
));
137 if (regfile
== ARG_SGPR
)
138 fninfo
->num_sgpr_params
= fninfo
->num_params
;
140 fninfo
->types
[idx
] = type
;
141 fninfo
->assign
[idx
] = assign
;
145 static unsigned add_arg(struct si_function_info
*fninfo
,
146 enum si_arg_regfile regfile
, LLVMTypeRef type
)
148 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
151 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
152 enum si_arg_regfile regfile
, LLVMTypeRef type
,
153 LLVMValueRef
*assign
, unsigned idx
)
155 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
156 assert(actual
== idx
);
159 static void add_arg_checked(struct si_function_info
*fninfo
,
160 enum si_arg_regfile regfile
, LLVMTypeRef type
,
163 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
167 * Returns a unique index for a per-patch semantic name and index. The index
168 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
171 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
173 switch (semantic_name
) {
174 case TGSI_SEMANTIC_TESSOUTER
:
176 case TGSI_SEMANTIC_TESSINNER
:
178 case TGSI_SEMANTIC_PATCH
:
183 assert(!"invalid semantic name");
189 * Returns a unique index for a semantic name and index. The index must be
190 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
193 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
)
195 switch (semantic_name
) {
196 case TGSI_SEMANTIC_POSITION
:
198 case TGSI_SEMANTIC_GENERIC
:
199 /* Since some shader stages use the the highest used IO index
200 * to determine the size to allocate for inputs/outputs
201 * (in LDS, tess and GS rings). GENERIC should be placed right
202 * after POSITION to make that size as small as possible.
204 if (index
< SI_MAX_IO_GENERIC
)
207 assert(!"invalid generic index");
209 case TGSI_SEMANTIC_PSIZE
:
210 return SI_MAX_IO_GENERIC
+ 1;
211 case TGSI_SEMANTIC_CLIPDIST
:
213 return SI_MAX_IO_GENERIC
+ 2 + index
;
214 case TGSI_SEMANTIC_FOG
:
215 return SI_MAX_IO_GENERIC
+ 4;
216 case TGSI_SEMANTIC_LAYER
:
217 return SI_MAX_IO_GENERIC
+ 5;
218 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
219 return SI_MAX_IO_GENERIC
+ 6;
220 case TGSI_SEMANTIC_PRIMID
:
221 return SI_MAX_IO_GENERIC
+ 7;
222 case TGSI_SEMANTIC_COLOR
: /* these alias */
223 case TGSI_SEMANTIC_BCOLOR
:
225 return SI_MAX_IO_GENERIC
+ 8 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 assert(SI_MAX_IO_GENERIC
+ 10 + index
< 64);
229 return SI_MAX_IO_GENERIC
+ 10 + index
;
231 assert(!"invalid semantic name");
237 * Get the value of a shader input parameter and extract a bitfield.
239 static LLVMValueRef
unpack_param(struct si_shader_context
*ctx
,
240 unsigned param
, unsigned rshift
,
243 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
,
246 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
247 value
= ac_to_integer(&ctx
->ac
, value
);
250 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
251 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
253 if (rshift
+ bitwidth
< 32) {
254 unsigned mask
= (1 << bitwidth
) - 1;
255 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
256 LLVMConstInt(ctx
->i32
, mask
, 0), "");
262 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
265 case PIPE_SHADER_TESS_CTRL
:
266 return unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 0, 8);
268 case PIPE_SHADER_TESS_EVAL
:
269 return LLVMGetParam(ctx
->main_fn
,
270 ctx
->param_tes_rel_patch_id
);
278 /* Tessellation shaders pass outputs to the next shader using LDS.
280 * LS outputs = TCS inputs
281 * TCS outputs = TES inputs
284 * - TCS inputs for patch 0
285 * - TCS inputs for patch 1
286 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
288 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
289 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
290 * - TCS outputs for patch 1
291 * - Per-patch TCS outputs for patch 1
292 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
293 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
296 * All three shaders VS(LS), TCS, TES share the same LDS space.
300 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
302 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
305 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
307 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
309 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
310 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
312 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
315 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
317 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
319 return LLVMConstInt(ctx
->i32
, stride
, 0);
322 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
324 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
325 return unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
327 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
328 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
329 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
330 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
331 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
332 num_patch_outputs
* 4;
333 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
337 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
339 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
341 ctx
->param_tcs_out_lds_offsets
,
347 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
349 return lp_build_mul_imm(&ctx
->bld_base
.uint_bld
,
351 ctx
->param_tcs_out_lds_offsets
,
357 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
359 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
360 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
362 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
366 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
368 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
369 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
370 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
372 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
373 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
379 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
381 LLVMValueRef patch0_patch_data_offset
=
382 get_tcs_out_patch0_patch_data_offset(ctx
);
383 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
384 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
386 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
387 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
392 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
394 unsigned tcs_out_vertices
=
395 ctx
->shader
->selector
?
396 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
398 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
399 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
400 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
402 return unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
405 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
410 case PIPE_SHADER_VERTEX
:
411 stride
= util_last_bit64(ctx
->shader
->selector
->outputs_written
);
412 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
414 case PIPE_SHADER_TESS_CTRL
:
415 if (ctx
->screen
->b
.chip_class
>= GFX9
&&
416 ctx
->shader
->is_monolithic
) {
417 stride
= util_last_bit64(ctx
->shader
->key
.part
.tcs
.ls
->outputs_written
);
418 return LLVMConstInt(ctx
->i32
, stride
* 4, 0);
420 return unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
428 static LLVMValueRef
get_instance_index_for_fetch(
429 struct si_shader_context
*ctx
,
430 unsigned param_start_instance
, LLVMValueRef divisor
)
432 LLVMValueRef result
= ctx
->abi
.instance_id
;
434 /* The division must be done before START_INSTANCE is added. */
435 if (divisor
!= ctx
->i32_1
)
436 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
438 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
439 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
442 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
444 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
446 unsigned double_index
)
448 LLVMBuilderRef builder
= ctx
->ac
.builder
;
449 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
450 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
451 LLVMVectorType(f64
, 2), "");
452 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
453 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
454 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
457 void si_llvm_load_input_vs(
458 struct si_shader_context
*ctx
,
459 unsigned input_index
,
464 unsigned num_fetches
;
465 unsigned fetch_stride
;
467 LLVMValueRef t_list_ptr
;
468 LLVMValueRef t_offset
;
470 LLVMValueRef vertex_index
;
471 LLVMValueRef input
[3];
473 /* Load the T list */
474 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
476 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
478 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
480 vertex_index
= LLVMGetParam(ctx
->main_fn
,
481 ctx
->param_vertex_index0
+
484 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
486 /* Do multiple loads for special formats. */
488 case SI_FIX_FETCH_RGB_64_FLOAT
:
489 num_fetches
= 3; /* 3 2-dword loads */
492 case SI_FIX_FETCH_RGBA_64_FLOAT
:
493 num_fetches
= 2; /* 2 4-dword loads */
496 case SI_FIX_FETCH_RGB_8
:
497 case SI_FIX_FETCH_RGB_8_INT
:
501 case SI_FIX_FETCH_RGB_16
:
502 case SI_FIX_FETCH_RGB_16_INT
:
511 for (unsigned i
= 0; i
< num_fetches
; i
++) {
512 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
514 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
515 vertex_index
, voffset
,
519 /* Break up the vec4 into individual components */
520 for (chan
= 0; chan
< 4; chan
++) {
521 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
522 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
523 input
[0], llvm_chan
, "");
527 case SI_FIX_FETCH_A2_SNORM
:
528 case SI_FIX_FETCH_A2_SSCALED
:
529 case SI_FIX_FETCH_A2_SINT
: {
530 /* The hardware returns an unsigned value; convert it to a
533 LLVMValueRef tmp
= out
[3];
534 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
536 /* First, recover the sign-extended signed integer value. */
537 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
538 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
540 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
542 /* For the integer-like cases, do a natural sign extension.
544 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
545 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
548 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
549 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
550 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
551 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
553 /* Convert back to the right type. */
554 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
556 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
557 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
558 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
559 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
560 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
561 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
567 case SI_FIX_FETCH_RGBA_32_UNORM
:
568 case SI_FIX_FETCH_RGBX_32_UNORM
:
569 for (chan
= 0; chan
< 4; chan
++) {
570 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
571 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
572 out
[chan
], ctx
->f32
, "");
573 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
574 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
576 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
577 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
578 out
[3] = LLVMConstReal(ctx
->f32
, 1);
580 case SI_FIX_FETCH_RGBA_32_SNORM
:
581 case SI_FIX_FETCH_RGBX_32_SNORM
:
582 case SI_FIX_FETCH_RGBA_32_FIXED
:
583 case SI_FIX_FETCH_RGBX_32_FIXED
: {
585 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
586 scale
= 1.0 / 0x10000;
588 scale
= 1.0 / INT_MAX
;
590 for (chan
= 0; chan
< 4; chan
++) {
591 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
592 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
593 out
[chan
], ctx
->f32
, "");
594 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
595 LLVMConstReal(ctx
->f32
, scale
), "");
597 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
598 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
599 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
600 out
[3] = LLVMConstReal(ctx
->f32
, 1);
603 case SI_FIX_FETCH_RGBA_32_USCALED
:
604 for (chan
= 0; chan
< 4; chan
++) {
605 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
606 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
607 out
[chan
], ctx
->f32
, "");
610 case SI_FIX_FETCH_RGBA_32_SSCALED
:
611 for (chan
= 0; chan
< 4; chan
++) {
612 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
613 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
614 out
[chan
], ctx
->f32
, "");
617 case SI_FIX_FETCH_RG_64_FLOAT
:
618 for (chan
= 0; chan
< 2; chan
++)
619 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
621 out
[2] = LLVMConstReal(ctx
->f32
, 0);
622 out
[3] = LLVMConstReal(ctx
->f32
, 1);
624 case SI_FIX_FETCH_RGB_64_FLOAT
:
625 for (chan
= 0; chan
< 3; chan
++)
626 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
628 out
[3] = LLVMConstReal(ctx
->f32
, 1);
630 case SI_FIX_FETCH_RGBA_64_FLOAT
:
631 for (chan
= 0; chan
< 4; chan
++) {
632 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
636 case SI_FIX_FETCH_RGB_8
:
637 case SI_FIX_FETCH_RGB_8_INT
:
638 case SI_FIX_FETCH_RGB_16
:
639 case SI_FIX_FETCH_RGB_16_INT
:
640 for (chan
= 0; chan
< 3; chan
++) {
641 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
645 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
646 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
647 out
[3] = LLVMConstReal(ctx
->f32
, 1);
649 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
655 static void declare_input_vs(
656 struct si_shader_context
*ctx
,
657 unsigned input_index
,
658 const struct tgsi_full_declaration
*decl
,
661 si_llvm_load_input_vs(ctx
, input_index
, out
);
664 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
671 case PIPE_SHADER_VERTEX
:
672 return LLVMGetParam(ctx
->main_fn
,
673 ctx
->param_vs_prim_id
);
674 case PIPE_SHADER_TESS_CTRL
:
675 return LLVMGetParam(ctx
->main_fn
,
676 ctx
->param_tcs_patch_id
);
677 case PIPE_SHADER_TESS_EVAL
:
678 return LLVMGetParam(ctx
->main_fn
,
679 ctx
->param_tes_patch_id
);
680 case PIPE_SHADER_GEOMETRY
:
681 return LLVMGetParam(ctx
->main_fn
,
682 ctx
->param_gs_prim_id
);
690 * Return the value of tgsi_ind_register for indexing.
691 * This is the indirect index with the constant offset added to it.
693 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
694 const struct tgsi_ind_register
*ind
,
700 if (ind
->File
== TGSI_FILE_ADDRESS
) {
701 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
702 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
704 struct tgsi_full_src_register src
= {};
706 src
.Register
.File
= ind
->File
;
707 src
.Register
.Index
= ind
->Index
;
709 /* Set the second index to 0 for constants. */
710 if (ind
->File
== TGSI_FILE_CONSTANT
)
711 src
.Register
.Dimension
= 1;
713 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
716 result
= ac_to_integer(&ctx
->ac
, result
);
720 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
721 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
722 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
723 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
728 * Like si_get_indirect_index, but restricts the return value to a (possibly
729 * undefined) value inside [0..num).
731 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
732 const struct tgsi_ind_register
*ind
,
733 int rel_index
, unsigned num
)
735 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
737 return si_llvm_bound_index(ctx
, result
, num
);
742 * Calculate a dword address given an input or output register and a stride.
744 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
745 const struct tgsi_full_dst_register
*dst
,
746 const struct tgsi_full_src_register
*src
,
747 LLVMValueRef vertex_dw_stride
,
748 LLVMValueRef base_addr
)
750 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
751 ubyte
*name
, *index
, *array_first
;
753 struct tgsi_full_dst_register reg
;
755 /* Set the register description. The address computation is the same
756 * for sources and destinations. */
758 reg
.Register
.File
= src
->Register
.File
;
759 reg
.Register
.Index
= src
->Register
.Index
;
760 reg
.Register
.Indirect
= src
->Register
.Indirect
;
761 reg
.Register
.Dimension
= src
->Register
.Dimension
;
762 reg
.Indirect
= src
->Indirect
;
763 reg
.Dimension
= src
->Dimension
;
764 reg
.DimIndirect
= src
->DimIndirect
;
768 /* If the register is 2-dimensional (e.g. an array of vertices
769 * in a primitive), calculate the base address of the vertex. */
770 if (reg
.Register
.Dimension
) {
773 if (reg
.Dimension
.Indirect
)
774 index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
775 1, reg
.Dimension
.Index
);
777 index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
779 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
780 LLVMBuildMul(ctx
->ac
.builder
, index
,
781 vertex_dw_stride
, ""), "");
784 /* Get information about the register. */
785 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
786 name
= info
->input_semantic_name
;
787 index
= info
->input_semantic_index
;
788 array_first
= info
->input_array_first
;
789 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
790 name
= info
->output_semantic_name
;
791 index
= info
->output_semantic_index
;
792 array_first
= info
->output_array_first
;
798 if (reg
.Register
.Indirect
) {
799 /* Add the relative address of the element. */
800 LLVMValueRef ind_index
;
802 if (reg
.Indirect
.ArrayID
)
803 first
= array_first
[reg
.Indirect
.ArrayID
];
805 first
= reg
.Register
.Index
;
807 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
808 1, reg
.Register
.Index
- first
);
810 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
811 LLVMBuildMul(ctx
->ac
.builder
, ind_index
,
812 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
814 param
= reg
.Register
.Dimension
?
815 si_shader_io_get_unique_index(name
[first
], index
[first
]) :
816 si_shader_io_get_unique_index_patch(name
[first
], index
[first
]);
818 param
= reg
.Register
.Dimension
?
819 si_shader_io_get_unique_index(name
[reg
.Register
.Index
],
820 index
[reg
.Register
.Index
]) :
821 si_shader_io_get_unique_index_patch(name
[reg
.Register
.Index
],
822 index
[reg
.Register
.Index
]);
825 /* Add the base address of the element. */
826 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
827 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
830 /* The offchip buffer layout for TCS->TES is
832 * - attribute 0 of patch 0 vertex 0
833 * - attribute 0 of patch 0 vertex 1
834 * - attribute 0 of patch 0 vertex 2
836 * - attribute 0 of patch 1 vertex 0
837 * - attribute 0 of patch 1 vertex 1
839 * - attribute 1 of patch 0 vertex 0
840 * - attribute 1 of patch 0 vertex 1
842 * - per patch attribute 0 of patch 0
843 * - per patch attribute 0 of patch 1
846 * Note that every attribute has 4 components.
848 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
849 LLVMValueRef rel_patch_id
,
850 LLVMValueRef vertex_index
,
851 LLVMValueRef param_index
)
853 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
854 LLVMValueRef param_stride
, constant16
;
856 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
857 num_patches
= unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
858 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
861 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
863 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
864 vertices_per_patch
, "");
866 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
869 param_stride
= total_vertices
;
871 base_addr
= rel_patch_id
;
872 param_stride
= num_patches
;
875 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
876 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
877 param_stride
, ""), "");
879 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
882 LLVMValueRef patch_data_offset
=
883 unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
885 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
886 patch_data_offset
, "");
891 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
892 struct si_shader_context
*ctx
,
893 const struct tgsi_full_dst_register
*dst
,
894 const struct tgsi_full_src_register
*src
)
896 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
897 ubyte
*name
, *index
, *array_first
;
898 struct tgsi_full_src_register reg
;
899 LLVMValueRef vertex_index
= NULL
;
900 LLVMValueRef param_index
= NULL
;
901 unsigned param_index_base
, param_base
;
903 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
905 if (reg
.Register
.Dimension
) {
907 if (reg
.Dimension
.Indirect
)
908 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
909 1, reg
.Dimension
.Index
);
911 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
914 /* Get information about the register. */
915 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
916 name
= info
->input_semantic_name
;
917 index
= info
->input_semantic_index
;
918 array_first
= info
->input_array_first
;
919 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
920 name
= info
->output_semantic_name
;
921 index
= info
->output_semantic_index
;
922 array_first
= info
->output_array_first
;
928 if (reg
.Register
.Indirect
) {
929 if (reg
.Indirect
.ArrayID
)
930 param_base
= array_first
[reg
.Indirect
.ArrayID
];
932 param_base
= reg
.Register
.Index
;
934 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
935 1, reg
.Register
.Index
- param_base
);
938 param_base
= reg
.Register
.Index
;
939 param_index
= ctx
->i32_0
;
942 param_index_base
= reg
.Register
.Dimension
?
943 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
]) :
944 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]);
946 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
947 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
950 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
951 vertex_index
, param_index
);
954 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
955 enum tgsi_opcode_type type
, unsigned swizzle
,
956 LLVMValueRef buffer
, LLVMValueRef offset
,
957 LLVMValueRef base
, bool can_speculate
)
959 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
960 LLVMValueRef value
, value2
;
961 LLVMTypeRef llvm_type
= tgsi2llvmtype(bld_base
, type
);
962 LLVMTypeRef vec_type
= LLVMVectorType(llvm_type
, 4);
965 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
966 0, 1, 0, can_speculate
, false);
968 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
971 if (!tgsi_type_is_64bit(type
)) {
972 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
973 0, 1, 0, can_speculate
, false);
975 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
976 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
977 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
980 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
981 swizzle
* 4, 1, 0, can_speculate
, false);
983 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
984 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
986 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
992 * \param type output value type
993 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
994 * \param dw_addr address in dwords
996 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
997 enum tgsi_opcode_type type
, unsigned swizzle
,
998 LLVMValueRef dw_addr
)
1000 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1001 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1004 if (swizzle
== ~0) {
1005 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1007 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1008 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1010 return lp_build_gather_values(gallivm
, values
,
1014 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1015 LLVMConstInt(ctx
->i32
, swizzle
, 0));
1017 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
1018 if (tgsi_type_is_64bit(type
)) {
1019 LLVMValueRef value2
;
1020 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1022 value2
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
1023 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1026 return bitcast(bld_base
, type
, value
);
1032 * \param swizzle offset (typically 0..3)
1033 * \param dw_addr address in dwords
1034 * \param value value to store
1036 static void lds_store(struct lp_build_tgsi_context
*bld_base
,
1037 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1040 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1042 dw_addr
= lp_build_add(&bld_base
->uint_bld
, dw_addr
,
1043 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0));
1045 value
= ac_to_integer(&ctx
->ac
, value
);
1046 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
1050 static LLVMValueRef
desc_from_addr_base64k(struct si_shader_context
*ctx
,
1053 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1055 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1056 addr
= LLVMBuildZExt(builder
, addr
, ctx
->i64
, "");
1057 addr
= LLVMBuildShl(builder
, addr
, LLVMConstInt(ctx
->i64
, 16, 0), "");
1059 uint64_t desc2
= 0xffffffff;
1060 uint64_t desc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1061 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1062 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1063 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1064 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1065 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1066 LLVMValueRef hi
= LLVMConstInt(ctx
->i64
, desc2
| (desc3
<< 32), 0);
1068 LLVMValueRef desc
= LLVMGetUndef(LLVMVectorType(ctx
->i64
, 2));
1069 desc
= LLVMBuildInsertElement(builder
, desc
, addr
, ctx
->i32_0
, "");
1070 desc
= LLVMBuildInsertElement(builder
, desc
, hi
, ctx
->i32_1
, "");
1071 return LLVMBuildBitCast(builder
, desc
, ctx
->v4i32
, "");
1074 static LLVMValueRef
fetch_input_tcs(
1075 struct lp_build_tgsi_context
*bld_base
,
1076 const struct tgsi_full_src_register
*reg
,
1077 enum tgsi_opcode_type type
, unsigned swizzle
)
1079 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1080 LLVMValueRef dw_addr
, stride
;
1082 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1083 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1084 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1086 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1089 static LLVMValueRef
fetch_output_tcs(
1090 struct lp_build_tgsi_context
*bld_base
,
1091 const struct tgsi_full_src_register
*reg
,
1092 enum tgsi_opcode_type type
, unsigned swizzle
)
1094 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1095 LLVMValueRef dw_addr
, stride
;
1097 if (reg
->Register
.Dimension
) {
1098 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1099 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1100 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1102 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1103 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1106 return lds_load(bld_base
, type
, swizzle
, dw_addr
);
1109 static LLVMValueRef
fetch_input_tes(
1110 struct lp_build_tgsi_context
*bld_base
,
1111 const struct tgsi_full_src_register
*reg
,
1112 enum tgsi_opcode_type type
, unsigned swizzle
)
1114 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1115 LLVMValueRef buffer
, base
, addr
;
1117 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1119 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1120 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1122 return buffer_load(bld_base
, type
, swizzle
, buffer
, base
, addr
, true);
1125 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1126 const struct tgsi_full_instruction
*inst
,
1127 const struct tgsi_opcode_info
*info
,
1129 LLVMValueRef dst
[4])
1131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1132 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1133 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1134 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1135 unsigned chan_index
;
1136 LLVMValueRef dw_addr
, stride
;
1137 LLVMValueRef buffer
, base
, buf_addr
;
1138 LLVMValueRef values
[4];
1139 bool skip_lds_store
;
1140 bool is_tess_factor
= false, is_tess_inner
= false;
1142 /* Only handle per-patch and per-vertex outputs here.
1143 * Vectors will be lowered to scalars and this function will be called again.
1145 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1146 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1147 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1151 if (reg
->Register
.Dimension
) {
1152 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1153 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1154 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1155 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1157 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1158 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1159 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1161 if (!reg
->Register
.Indirect
) {
1162 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1164 /* Always write tess factors into LDS for the TCS epilog. */
1165 if (name
== TGSI_SEMANTIC_TESSINNER
||
1166 name
== TGSI_SEMANTIC_TESSOUTER
) {
1167 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1168 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1169 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1170 is_tess_factor
= true;
1171 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1176 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1178 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1179 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1181 uint32_t writemask
= reg
->Register
.WriteMask
;
1183 chan_index
= u_bit_scan(&writemask
);
1184 LLVMValueRef value
= dst
[chan_index
];
1186 if (inst
->Instruction
.Saturate
)
1187 value
= ac_build_clamp(&ctx
->ac
, value
);
1189 /* Skip LDS stores if there is no LDS read of this output. */
1190 if (!skip_lds_store
)
1191 lds_store(bld_base
, chan_index
, dw_addr
, value
);
1193 value
= ac_to_integer(&ctx
->ac
, value
);
1194 values
[chan_index
] = value
;
1196 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1197 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1199 4 * chan_index
, 1, 0, true, false);
1202 /* Write tess factors into VGPRs for the epilog. */
1203 if (is_tess_factor
&&
1204 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1205 if (!is_tess_inner
) {
1206 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1207 ctx
->invoc0_tess_factors
[chan_index
]);
1208 } else if (chan_index
< 2) {
1209 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1210 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1215 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1216 LLVMValueRef value
= lp_build_gather_values(gallivm
,
1218 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1219 base
, 0, 1, 0, true, false);
1223 static LLVMValueRef
fetch_input_gs(
1224 struct lp_build_tgsi_context
*bld_base
,
1225 const struct tgsi_full_src_register
*reg
,
1226 enum tgsi_opcode_type type
,
1229 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1230 struct si_shader
*shader
= ctx
->shader
;
1231 struct lp_build_context
*uint
= &ctx
->bld_base
.uint_bld
;
1232 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1233 LLVMValueRef vtx_offset
, soffset
;
1234 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1235 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1236 unsigned semantic_index
= info
->input_semantic_index
[reg
->Register
.Index
];
1240 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1241 return get_primitive_id(ctx
, swizzle
);
1243 if (!reg
->Register
.Dimension
)
1246 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
);
1248 /* GFX9 has the ESGS ring in LDS. */
1249 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
1250 unsigned index
= reg
->Dimension
.Index
;
1252 switch (index
/ 2) {
1254 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1255 index
% 2 ? 16 : 0, 16);
1258 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1259 index
% 2 ? 16 : 0, 16);
1262 vtx_offset
= unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1263 index
% 2 ? 16 : 0, 16);
1270 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1271 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1272 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1275 /* GFX6: input load from the ESGS ring in memory. */
1276 if (swizzle
== ~0) {
1277 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1279 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1280 values
[chan
] = fetch_input_gs(bld_base
, reg
, type
, chan
);
1282 return lp_build_gather_values(gallivm
, values
,
1286 /* Get the vertex offset parameter on GFX6. */
1287 unsigned vtx_offset_param
= reg
->Dimension
.Index
;
1288 if (vtx_offset_param
< 2) {
1289 vtx_offset_param
+= ctx
->param_gs_vtx0_offset
;
1291 assert(vtx_offset_param
< 6);
1292 vtx_offset_param
+= ctx
->param_gs_vtx2_offset
- 2;
1294 vtx_offset
= lp_build_mul_imm(uint
,
1295 LLVMGetParam(ctx
->main_fn
,
1299 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1301 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1302 vtx_offset
, soffset
, 0, 1, 0, true, false);
1303 if (tgsi_type_is_64bit(type
)) {
1304 LLVMValueRef value2
;
1305 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1307 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1308 ctx
->i32_0
, vtx_offset
, soffset
,
1309 0, 1, 0, true, false);
1310 return si_llvm_emit_fetch_64bit(bld_base
, type
,
1313 return bitcast(bld_base
, type
, value
);
1316 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1318 switch (interpolate
) {
1319 case TGSI_INTERPOLATE_CONSTANT
:
1322 case TGSI_INTERPOLATE_LINEAR
:
1323 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1324 return SI_PARAM_LINEAR_SAMPLE
;
1325 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1326 return SI_PARAM_LINEAR_CENTROID
;
1328 return SI_PARAM_LINEAR_CENTER
;
1330 case TGSI_INTERPOLATE_COLOR
:
1331 case TGSI_INTERPOLATE_PERSPECTIVE
:
1332 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1333 return SI_PARAM_PERSP_SAMPLE
;
1334 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1335 return SI_PARAM_PERSP_CENTROID
;
1337 return SI_PARAM_PERSP_CENTER
;
1340 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1345 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1346 unsigned attr_index
, unsigned chan
,
1347 LLVMValueRef prim_mask
,
1348 LLVMValueRef i
, LLVMValueRef j
)
1351 return ac_build_fs_interp(&ctx
->ac
,
1352 LLVMConstInt(ctx
->i32
, chan
, 0),
1353 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1356 return ac_build_fs_interp_mov(&ctx
->ac
,
1357 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1358 LLVMConstInt(ctx
->i32
, chan
, 0),
1359 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1364 * Interpolate a fragment shader input.
1366 * @param ctx context
1367 * @param input_index index of the input in hardware
1368 * @param semantic_name TGSI_SEMANTIC_*
1369 * @param semantic_index semantic index
1370 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1371 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1372 * @param interp_param interpolation weights (i,j)
1373 * @param prim_mask SI_PARAM_PRIM_MASK
1374 * @param face SI_PARAM_FRONT_FACE
1375 * @param result the return value (4 components)
1377 static void interp_fs_input(struct si_shader_context
*ctx
,
1378 unsigned input_index
,
1379 unsigned semantic_name
,
1380 unsigned semantic_index
,
1381 unsigned num_interp_inputs
,
1382 unsigned colors_read_mask
,
1383 LLVMValueRef interp_param
,
1384 LLVMValueRef prim_mask
,
1386 LLVMValueRef result
[4])
1388 LLVMValueRef i
= NULL
, j
= NULL
;
1391 /* fs.constant returns the param from the middle vertex, so it's not
1392 * really useful for flat shading. It's meant to be used for custom
1393 * interpolation (but the intrinsic can't fetch from the other two
1396 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1397 * to do the right thing. The only reason we use fs.constant is that
1398 * fs.interp cannot be used on integers, because they can be equal
1401 * When interp is false we will use fs.constant or for newer llvm,
1402 * amdgcn.interp.mov.
1404 bool interp
= interp_param
!= NULL
;
1407 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1408 LLVMVectorType(ctx
->f32
, 2), "");
1410 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1412 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1416 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1417 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1418 LLVMValueRef is_face_positive
;
1420 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1421 * otherwise it's at offset "num_inputs".
1423 unsigned back_attr_offset
= num_interp_inputs
;
1424 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1425 back_attr_offset
+= 1;
1427 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1428 face
, ctx
->i32_0
, "");
1430 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1431 LLVMValueRef front
, back
;
1433 front
= si_build_fs_interp(ctx
,
1436 back
= si_build_fs_interp(ctx
,
1437 back_attr_offset
, chan
,
1440 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1446 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1447 result
[0] = si_build_fs_interp(ctx
, input_index
,
1448 0, prim_mask
, i
, j
);
1450 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1451 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1453 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1454 result
[chan
] = si_build_fs_interp(ctx
,
1461 void si_llvm_load_input_fs(
1462 struct si_shader_context
*ctx
,
1463 unsigned input_index
,
1464 LLVMValueRef out
[4])
1466 struct lp_build_context
*base
= &ctx
->bld_base
.base
;
1467 struct si_shader
*shader
= ctx
->shader
;
1468 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1469 LLVMValueRef main_fn
= ctx
->main_fn
;
1470 LLVMValueRef interp_param
= NULL
;
1471 int interp_param_idx
;
1472 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1473 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1474 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1475 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1477 /* Get colors from input VGPRs (set by the prolog). */
1478 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1479 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1480 unsigned mask
= colors_read
>> (semantic_index
* 4);
1481 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1482 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1484 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1485 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1486 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1487 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : base
->undef
;
1491 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1492 if (interp_param_idx
== -1)
1494 else if (interp_param_idx
) {
1495 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1498 interp_fs_input(ctx
, input_index
, semantic_name
,
1499 semantic_index
, 0, /* this param is unused */
1500 shader
->selector
->info
.colors_read
, interp_param
,
1501 LLVMGetParam(main_fn
, SI_PARAM_PRIM_MASK
),
1502 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1506 static void declare_input_fs(
1507 struct si_shader_context
*ctx
,
1508 unsigned input_index
,
1509 const struct tgsi_full_declaration
*decl
,
1510 LLVMValueRef out
[4])
1512 si_llvm_load_input_fs(ctx
, input_index
, out
);
1515 static LLVMValueRef
get_sample_id(struct si_shader_context
*ctx
)
1517 return unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1522 * Load a dword from a constant buffer.
1524 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1525 LLVMValueRef resource
,
1526 LLVMValueRef offset
)
1528 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1529 0, 0, 0, true, true);
1532 static LLVMValueRef
load_sample_position(struct si_shader_context
*ctx
, LLVMValueRef sample_id
)
1534 struct lp_build_context
*uint_bld
= &ctx
->bld_base
.uint_bld
;
1535 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1536 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1537 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1538 LLVMValueRef resource
= ac_build_indexed_load_const(&ctx
->ac
, desc
, buf_index
);
1540 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1541 LLVMValueRef offset0
= lp_build_mul_imm(uint_bld
, sample_id
, 8);
1542 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1544 LLVMValueRef pos
[4] = {
1545 buffer_load_const(ctx
, resource
, offset0
),
1546 buffer_load_const(ctx
, resource
, offset1
),
1547 LLVMConstReal(ctx
->f32
, 0),
1548 LLVMConstReal(ctx
->f32
, 0)
1551 return lp_build_gather_values(gallivm
, pos
, 4);
1554 void si_load_system_value(struct si_shader_context
*ctx
,
1556 const struct tgsi_full_declaration
*decl
)
1558 struct lp_build_context
*bld
= &ctx
->bld_base
.base
;
1559 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1560 LLVMValueRef value
= 0;
1562 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1564 switch (decl
->Semantic
.Name
) {
1565 case TGSI_SEMANTIC_INSTANCEID
:
1566 value
= ctx
->abi
.instance_id
;
1569 case TGSI_SEMANTIC_VERTEXID
:
1570 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1572 ctx
->abi
.base_vertex
, "");
1575 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1576 /* Unused. Clarify the meaning in indexed vs. non-indexed
1577 * draws if this is ever used again. */
1581 case TGSI_SEMANTIC_BASEVERTEX
:
1583 /* For non-indexed draws, the base vertex set by the driver
1584 * (for direct draws) or the CP (for indirect draws) is the
1585 * first vertex ID, but GLSL expects 0 to be returned.
1587 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
1588 LLVMValueRef indexed
;
1590 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1591 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1593 value
= LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1594 ctx
->abi
.base_vertex
, ctx
->i32_0
, "");
1598 case TGSI_SEMANTIC_BASEINSTANCE
:
1599 value
= ctx
->abi
.start_instance
;
1602 case TGSI_SEMANTIC_DRAWID
:
1603 value
= ctx
->abi
.draw_id
;
1606 case TGSI_SEMANTIC_INVOCATIONID
:
1607 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1608 value
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
1609 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
1610 value
= LLVMGetParam(ctx
->main_fn
,
1611 ctx
->param_gs_instance_id
);
1613 assert(!"INVOCATIONID not implemented");
1616 case TGSI_SEMANTIC_POSITION
:
1618 LLVMValueRef pos
[4] = {
1619 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1620 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1621 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
1622 lp_build_emit_llvm_unary(&ctx
->bld_base
, TGSI_OPCODE_RCP
,
1623 LLVMGetParam(ctx
->main_fn
,
1624 SI_PARAM_POS_W_FLOAT
)),
1626 value
= lp_build_gather_values(gallivm
, pos
, 4);
1630 case TGSI_SEMANTIC_FACE
:
1631 value
= ctx
->abi
.front_face
;
1634 case TGSI_SEMANTIC_SAMPLEID
:
1635 value
= get_sample_id(ctx
);
1638 case TGSI_SEMANTIC_SAMPLEPOS
: {
1639 LLVMValueRef pos
[4] = {
1640 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
1641 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
1642 LLVMConstReal(ctx
->f32
, 0),
1643 LLVMConstReal(ctx
->f32
, 0)
1645 pos
[0] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1646 TGSI_OPCODE_FRC
, pos
[0]);
1647 pos
[1] = lp_build_emit_llvm_unary(&ctx
->bld_base
,
1648 TGSI_OPCODE_FRC
, pos
[1]);
1649 value
= lp_build_gather_values(gallivm
, pos
, 4);
1653 case TGSI_SEMANTIC_SAMPLEMASK
:
1654 /* This can only occur with the OpenGL Core profile, which
1655 * doesn't support smoothing.
1657 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
1660 case TGSI_SEMANTIC_TESSCOORD
:
1662 LLVMValueRef coord
[4] = {
1663 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1664 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1669 /* For triangles, the vector should be (u, v, 1-u-v). */
1670 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1671 PIPE_PRIM_TRIANGLES
)
1672 coord
[2] = lp_build_sub(bld
, bld
->one
,
1673 lp_build_add(bld
, coord
[0], coord
[1]));
1675 value
= lp_build_gather_values(gallivm
, coord
, 4);
1679 case TGSI_SEMANTIC_VERTICESIN
:
1680 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1681 value
= unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 26, 6);
1682 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1683 value
= get_num_tcs_out_vertices(ctx
);
1685 assert(!"invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1688 case TGSI_SEMANTIC_TESSINNER
:
1689 case TGSI_SEMANTIC_TESSOUTER
:
1691 LLVMValueRef buffer
, base
, addr
;
1692 int param
= si_shader_io_get_unique_index_patch(decl
->Semantic
.Name
, 0);
1694 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
1696 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1697 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1698 LLVMConstInt(ctx
->i32
, param
, 0));
1700 value
= buffer_load(&ctx
->bld_base
, TGSI_TYPE_FLOAT
,
1701 ~0, buffer
, base
, addr
, true);
1706 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
1707 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
1709 LLVMValueRef buf
, slot
, val
[4];
1712 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1713 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1714 buf
= ac_build_indexed_load_const(&ctx
->ac
, buf
, slot
);
1715 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
1717 for (i
= 0; i
< 4; i
++)
1718 val
[i
] = buffer_load_const(ctx
, buf
,
1719 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1720 value
= lp_build_gather_values(gallivm
, val
, 4);
1724 case TGSI_SEMANTIC_PRIMID
:
1725 value
= get_primitive_id(ctx
, 0);
1728 case TGSI_SEMANTIC_GRID_SIZE
:
1729 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_grid_size
);
1732 case TGSI_SEMANTIC_BLOCK_SIZE
:
1734 LLVMValueRef values
[3];
1736 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1738 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1739 unsigned sizes
[3] = {
1740 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1741 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1742 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1745 for (i
= 0; i
< 3; ++i
)
1746 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1748 value
= lp_build_gather_values(gallivm
, values
, 3);
1750 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1755 case TGSI_SEMANTIC_BLOCK_ID
:
1757 LLVMValueRef values
[3];
1759 for (int i
= 0; i
< 3; i
++) {
1760 values
[i
] = ctx
->i32_0
;
1761 if (ctx
->param_block_id
[i
] >= 0) {
1762 values
[i
] = LLVMGetParam(ctx
->main_fn
,
1763 ctx
->param_block_id
[i
]);
1766 value
= lp_build_gather_values(gallivm
, values
, 3);
1770 case TGSI_SEMANTIC_THREAD_ID
:
1771 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_thread_id
);
1774 case TGSI_SEMANTIC_HELPER_INVOCATION
:
1775 value
= lp_build_intrinsic(ctx
->ac
.builder
,
1776 "llvm.amdgcn.ps.live",
1778 LP_FUNC_ATTR_READNONE
);
1779 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
1780 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
1783 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
1784 value
= LLVMConstInt(ctx
->i32
, 64, 0);
1787 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
1788 value
= ac_get_thread_id(&ctx
->ac
);
1791 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
1793 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1794 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
1795 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
1796 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
1800 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
1801 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
1802 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
1803 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
1805 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
1806 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
1807 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
1808 /* All bits set except LSB */
1809 value
= LLVMConstInt(ctx
->i64
, -2, 0);
1812 value
= LLVMConstInt(ctx
->i64
, -1, 0);
1814 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
1815 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
1816 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
1817 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
1818 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
1819 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
1824 assert(!"unknown system value");
1828 ctx
->system_values
[index
] = value
;
1831 void si_declare_compute_memory(struct si_shader_context
*ctx
,
1832 const struct tgsi_full_declaration
*decl
)
1834 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
1835 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
1837 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, LOCAL_ADDR_SPACE
);
1840 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
1841 assert(decl
->Range
.First
== decl
->Range
.Last
);
1842 assert(!ctx
->shared_memory
);
1844 var
= LLVMAddGlobalInAddressSpace(gallivm
->module
,
1845 LLVMArrayType(ctx
->i8
, sel
->local_size
),
1848 LLVMSetAlignment(var
, 4);
1850 ctx
->shared_memory
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
1853 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
1855 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
1856 ctx
->param_const_and_shader_buffers
);
1858 return ac_build_indexed_load_const(&ctx
->ac
, list_ptr
,
1859 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
1862 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
1864 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1865 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
1867 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
1868 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
1869 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
1871 return ac_build_indexed_load_const(&ctx
->ac
, ptr
, index
);
1875 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
1877 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1878 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
1879 ctx
->param_const_and_shader_buffers
);
1881 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
1882 index
= LLVMBuildSub(ctx
->ac
.builder
,
1883 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
1886 return ac_build_indexed_load_const(&ctx
->ac
, rsrc_ptr
, index
);
1889 static LLVMValueRef
fetch_constant(
1890 struct lp_build_tgsi_context
*bld_base
,
1891 const struct tgsi_full_src_register
*reg
,
1892 enum tgsi_opcode_type type
,
1895 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1896 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
1899 LLVMValueRef addr
, bufp
;
1900 LLVMValueRef result
;
1902 if (swizzle
== LP_CHAN_ALL
) {
1904 LLVMValueRef values
[4];
1905 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
1906 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
1908 return lp_build_gather_values(&ctx
->gallivm
, values
, 4);
1911 assert(reg
->Register
.Dimension
);
1912 buf
= reg
->Dimension
.Index
;
1913 idx
= reg
->Register
.Index
* 4 + swizzle
;
1915 if (reg
->Dimension
.Indirect
) {
1916 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
1918 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
1919 reg
->Dimension
.Index
,
1920 ctx
->num_const_buffers
);
1921 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
1922 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
1923 bufp
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, index
);
1925 bufp
= load_const_buffer_desc(ctx
, buf
);
1927 if (reg
->Register
.Indirect
) {
1928 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
1930 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
1933 result
= buffer_load_const(ctx
, bufp
, addr
);
1935 if (!tgsi_type_is_64bit(type
))
1936 result
= bitcast(bld_base
, type
, result
);
1938 LLVMValueRef addr2
, result2
;
1940 addr2
= lp_build_add(&bld_base
->uint_bld
, addr
,
1941 LLVMConstInt(ctx
->i32
, 4, 0));
1942 result2
= buffer_load_const(ctx
, bufp
, addr2
);
1944 result
= si_llvm_emit_fetch_64bit(bld_base
, type
,
1950 /* Upper 16 bits must be zero. */
1951 static LLVMValueRef
si_llvm_pack_two_int16(struct si_shader_context
*ctx
,
1952 LLVMValueRef val
[2])
1954 return LLVMBuildOr(ctx
->ac
.builder
, val
[0],
1955 LLVMBuildShl(ctx
->ac
.builder
, val
[1],
1956 LLVMConstInt(ctx
->i32
, 16, 0),
1960 /* Upper 16 bits are ignored and will be dropped. */
1961 static LLVMValueRef
si_llvm_pack_two_int32_as_int16(struct si_shader_context
*ctx
,
1962 LLVMValueRef val
[2])
1964 LLVMValueRef v
[2] = {
1965 LLVMBuildAnd(ctx
->ac
.builder
, val
[0],
1966 LLVMConstInt(ctx
->i32
, 0xffff, 0), ""),
1969 return si_llvm_pack_two_int16(ctx
, v
);
1972 /* Initialize arguments for the shader export intrinsic */
1973 static void si_llvm_init_export_args(struct lp_build_tgsi_context
*bld_base
,
1974 LLVMValueRef
*values
,
1976 struct ac_export_args
*args
)
1978 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1979 struct lp_build_context
*base
= &bld_base
->base
;
1980 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1981 LLVMValueRef val
[4];
1982 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
1984 bool is_int8
, is_int10
;
1986 /* Default is 0xf. Adjusted below depending on the format. */
1987 args
->enabled_channels
= 0xf; /* writemask */
1989 /* Specify whether the EXEC mask represents the valid mask */
1990 args
->valid_mask
= 0;
1992 /* Specify whether this is the last export */
1995 /* Specify the target we are exporting */
1996 args
->target
= target
;
1998 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
1999 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2000 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2001 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2003 assert(cbuf
>= 0 && cbuf
< 8);
2004 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2005 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2006 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2009 args
->compr
= false;
2010 args
->out
[0] = base
->undef
;
2011 args
->out
[1] = base
->undef
;
2012 args
->out
[2] = base
->undef
;
2013 args
->out
[3] = base
->undef
;
2015 switch (spi_shader_col_format
) {
2016 case V_028714_SPI_SHADER_ZERO
:
2017 args
->enabled_channels
= 0; /* writemask */
2018 args
->target
= V_008DFC_SQ_EXP_NULL
;
2021 case V_028714_SPI_SHADER_32_R
:
2022 args
->enabled_channels
= 1; /* writemask */
2023 args
->out
[0] = values
[0];
2026 case V_028714_SPI_SHADER_32_GR
:
2027 args
->enabled_channels
= 0x3; /* writemask */
2028 args
->out
[0] = values
[0];
2029 args
->out
[1] = values
[1];
2032 case V_028714_SPI_SHADER_32_AR
:
2033 args
->enabled_channels
= 0x9; /* writemask */
2034 args
->out
[0] = values
[0];
2035 args
->out
[3] = values
[3];
2038 case V_028714_SPI_SHADER_FP16_ABGR
:
2039 args
->compr
= 1; /* COMPR flag */
2041 for (chan
= 0; chan
< 2; chan
++) {
2042 LLVMValueRef pack_args
[2] = {
2044 values
[2 * chan
+ 1]
2046 LLVMValueRef packed
;
2048 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
2049 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2053 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2054 for (chan
= 0; chan
< 4; chan
++) {
2055 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
2056 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2057 LLVMConstReal(ctx
->f32
, 65535), "");
2058 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2059 LLVMConstReal(ctx
->f32
, 0.5), "");
2060 val
[chan
] = LLVMBuildFPToUI(builder
, val
[chan
],
2064 args
->compr
= 1; /* COMPR flag */
2065 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2066 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2069 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2070 for (chan
= 0; chan
< 4; chan
++) {
2071 /* Clamp between [-1, 1]. */
2072 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MIN
,
2074 LLVMConstReal(ctx
->f32
, 1));
2075 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_MAX
,
2077 LLVMConstReal(ctx
->f32
, -1));
2078 /* Convert to a signed integer in [-32767, 32767]. */
2079 val
[chan
] = LLVMBuildFMul(builder
, val
[chan
],
2080 LLVMConstReal(ctx
->f32
, 32767), "");
2081 /* If positive, add 0.5, else add -0.5. */
2082 val
[chan
] = LLVMBuildFAdd(builder
, val
[chan
],
2083 LLVMBuildSelect(builder
,
2084 LLVMBuildFCmp(builder
, LLVMRealOGE
,
2085 val
[chan
], base
->zero
, ""),
2086 LLVMConstReal(ctx
->f32
, 0.5),
2087 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
2088 val
[chan
] = LLVMBuildFPToSI(builder
, val
[chan
], ctx
->i32
, "");
2091 args
->compr
= 1; /* COMPR flag */
2092 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2093 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2096 case V_028714_SPI_SHADER_UINT16_ABGR
: {
2097 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2098 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
2099 LLVMValueRef max_alpha
=
2100 !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
2103 for (chan
= 0; chan
< 4; chan
++) {
2104 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2105 val
[chan
] = lp_build_emit_llvm_binary(bld_base
, TGSI_OPCODE_UMIN
,
2107 chan
== 3 ? max_alpha
: max_rgb
);
2110 args
->compr
= 1; /* COMPR flag */
2111 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
));
2112 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int16(ctx
, val
+2));
2116 case V_028714_SPI_SHADER_SINT16_ABGR
: {
2117 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
2118 is_int8
? 127 : is_int10
? 511 : 32767, 0);
2119 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
2120 is_int8
? -128 : is_int10
? -512 : -32768, 0);
2121 LLVMValueRef max_alpha
=
2122 !is_int10
? max_rgb
: ctx
->i32_1
;
2123 LLVMValueRef min_alpha
=
2124 !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
2127 for (chan
= 0; chan
< 4; chan
++) {
2128 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
2129 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2131 val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
2132 val
[chan
] = lp_build_emit_llvm_binary(bld_base
,
2134 val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
2137 args
->compr
= 1; /* COMPR flag */
2138 args
->out
[0] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
));
2139 args
->out
[1] = ac_to_float(&ctx
->ac
, si_llvm_pack_two_int32_as_int16(ctx
, val
+2));
2143 case V_028714_SPI_SHADER_32_ABGR
:
2144 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2149 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2152 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2154 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2155 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2156 SI_PARAM_ALPHA_REF
);
2158 LLVMValueRef alpha_pass
=
2159 lp_build_cmp(&bld_base
->base
,
2160 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
,
2163 lp_build_select(&bld_base
->base
,
2165 LLVMConstReal(ctx
->f32
, 1.0f
),
2166 LLVMConstReal(ctx
->f32
, -1.0f
));
2168 ac_build_kill(&ctx
->ac
, arg
);
2170 ac_build_kill(&ctx
->ac
, NULL
);
2174 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2176 unsigned samplemask_param
)
2178 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2179 LLVMValueRef coverage
;
2181 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2182 coverage
= LLVMGetParam(ctx
->main_fn
,
2184 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2186 coverage
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.ctpop.i32",
2188 &coverage
, 1, LP_FUNC_ATTR_READNONE
);
2190 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2193 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2194 LLVMConstReal(ctx
->f32
,
2195 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2197 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2200 static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context
*bld_base
,
2201 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2203 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2204 struct lp_build_context
*base
= &bld_base
->base
;
2207 unsigned const_chan
;
2208 LLVMValueRef base_elt
;
2209 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2210 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2211 SI_VS_CONST_CLIP_PLANES
, 0);
2212 LLVMValueRef const_resource
= ac_build_indexed_load_const(&ctx
->ac
, ptr
, constbuf_index
);
2214 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2215 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2220 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2222 /* Compute dot products of position and user clip plane vectors */
2223 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2224 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2226 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2227 const_chan
) * 4, 0);
2228 base_elt
= buffer_load_const(ctx
, const_resource
,
2231 lp_build_add(base
, args
->out
[chan
],
2232 lp_build_mul(base
, base_elt
,
2233 out_elts
[const_chan
]));
2237 args
->enabled_channels
= 0xf;
2238 args
->valid_mask
= 0;
2240 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2245 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2249 if (so
->num_outputs
)
2250 fprintf(stderr
, "STREAMOUT\n");
2252 for (i
= 0; i
< so
->num_outputs
; i
++) {
2253 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2254 so
->output
[i
].start_component
;
2255 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2256 i
, so
->output
[i
].output_buffer
,
2257 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2258 so
->output
[i
].register_index
,
2259 mask
& 1 ? "x" : "",
2260 mask
& 2 ? "y" : "",
2261 mask
& 4 ? "z" : "",
2262 mask
& 8 ? "w" : "");
2266 static void emit_streamout_output(struct si_shader_context
*ctx
,
2267 LLVMValueRef
const *so_buffers
,
2268 LLVMValueRef
const *so_write_offsets
,
2269 struct pipe_stream_output
*stream_out
,
2270 struct si_shader_output_values
*shader_out
)
2272 unsigned buf_idx
= stream_out
->output_buffer
;
2273 unsigned start
= stream_out
->start_component
;
2274 unsigned num_comps
= stream_out
->num_components
;
2275 LLVMValueRef out
[4];
2277 assert(num_comps
&& num_comps
<= 4);
2278 if (!num_comps
|| num_comps
> 4)
2281 /* Load the output as int. */
2282 for (int j
= 0; j
< num_comps
; j
++) {
2283 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2285 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2288 /* Pack the output. */
2289 LLVMValueRef vdata
= NULL
;
2291 switch (num_comps
) {
2292 case 1: /* as i32 */
2295 case 2: /* as v2i32 */
2296 case 3: /* as v4i32 (aligned to 4) */
2297 case 4: /* as v4i32 */
2298 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2299 for (int j
= 0; j
< num_comps
; j
++) {
2300 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2301 LLVMConstInt(ctx
->i32
, j
, 0), "");
2306 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2308 so_write_offsets
[buf_idx
],
2310 stream_out
->dst_offset
* 4, 1, 1, true, false);
2314 * Write streamout data to buffers for vertex stream @p stream (different
2315 * vertex streams can occur for GS copy shaders).
2317 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2318 struct si_shader_output_values
*outputs
,
2319 unsigned noutput
, unsigned stream
)
2321 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2322 struct pipe_stream_output_info
*so
= &sel
->so
;
2323 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2324 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2326 struct lp_build_if_state if_ctx
;
2328 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2329 LLVMValueRef so_vtx_count
=
2330 unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2332 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2334 /* can_emit = tid < so_vtx_count; */
2335 LLVMValueRef can_emit
=
2336 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2338 /* Emit the streamout code conditionally. This actually avoids
2339 * out-of-bounds buffer access. The hw tells us via the SGPR
2340 * (so_vtx_count) which threads are allowed to emit streamout data. */
2341 lp_build_if(&if_ctx
, gallivm
, can_emit
);
2343 /* The buffer offset is computed as follows:
2344 * ByteOffset = streamout_offset[buffer_id]*4 +
2345 * (streamout_write_index + thread_id)*stride[buffer_id] +
2349 LLVMValueRef so_write_index
=
2350 LLVMGetParam(ctx
->main_fn
,
2351 ctx
->param_streamout_write_index
);
2353 /* Compute (streamout_write_index + thread_id). */
2354 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2356 /* Load the descriptor and compute the write offset for each
2357 * enabled buffer. */
2358 LLVMValueRef so_write_offset
[4] = {};
2359 LLVMValueRef so_buffers
[4];
2360 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2361 ctx
->param_rw_buffers
);
2363 for (i
= 0; i
< 4; i
++) {
2367 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2368 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2370 so_buffers
[i
] = ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
2372 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2373 ctx
->param_streamout_offset
[i
]);
2374 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2376 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2377 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2378 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2381 /* Write streamout data. */
2382 for (i
= 0; i
< so
->num_outputs
; i
++) {
2383 unsigned reg
= so
->output
[i
].register_index
;
2388 if (stream
!= so
->output
[i
].stream
)
2391 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2392 &so
->output
[i
], &outputs
[reg
]);
2395 lp_build_endif(&if_ctx
);
2398 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2399 LLVMValueRef
*values
)
2401 struct ac_export_args args
;
2403 si_llvm_init_export_args(&ctx
->bld_base
, values
,
2404 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2405 ac_build_export(&ctx
->ac
, &args
);
2408 static void si_build_param_exports(struct si_shader_context
*ctx
,
2409 struct si_shader_output_values
*outputs
,
2412 struct si_shader
*shader
= ctx
->shader
;
2413 unsigned param_count
= 0;
2415 for (unsigned i
= 0; i
< noutput
; i
++) {
2416 unsigned semantic_name
= outputs
[i
].semantic_name
;
2417 unsigned semantic_index
= outputs
[i
].semantic_index
;
2419 if (outputs
[i
].vertex_stream
[0] != 0 &&
2420 outputs
[i
].vertex_stream
[1] != 0 &&
2421 outputs
[i
].vertex_stream
[2] != 0 &&
2422 outputs
[i
].vertex_stream
[3] != 0)
2425 switch (semantic_name
) {
2426 case TGSI_SEMANTIC_LAYER
:
2427 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2428 case TGSI_SEMANTIC_CLIPDIST
:
2429 case TGSI_SEMANTIC_COLOR
:
2430 case TGSI_SEMANTIC_BCOLOR
:
2431 case TGSI_SEMANTIC_PRIMID
:
2432 case TGSI_SEMANTIC_FOG
:
2433 case TGSI_SEMANTIC_TEXCOORD
:
2434 case TGSI_SEMANTIC_GENERIC
:
2440 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2441 semantic_index
< SI_MAX_IO_GENERIC
) &&
2442 shader
->key
.opt
.kill_outputs
&
2443 (1ull << si_shader_io_get_unique_index(semantic_name
, semantic_index
)))
2446 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2448 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2449 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2452 shader
->info
.nr_param_exports
= param_count
;
2455 /* Generate export instructions for hardware VS shader stage */
2456 static void si_llvm_export_vs(struct lp_build_tgsi_context
*bld_base
,
2457 struct si_shader_output_values
*outputs
,
2460 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2461 struct si_shader
*shader
= ctx
->shader
;
2462 struct lp_build_context
*base
= &bld_base
->base
;
2463 struct ac_export_args pos_args
[4] = {};
2464 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2468 /* Build position exports. */
2469 for (i
= 0; i
< noutput
; i
++) {
2470 switch (outputs
[i
].semantic_name
) {
2471 case TGSI_SEMANTIC_POSITION
:
2472 si_llvm_init_export_args(bld_base
, outputs
[i
].values
,
2473 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2475 case TGSI_SEMANTIC_PSIZE
:
2476 psize_value
= outputs
[i
].values
[0];
2478 case TGSI_SEMANTIC_LAYER
:
2479 layer_value
= outputs
[i
].values
[0];
2481 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2482 viewport_index_value
= outputs
[i
].values
[0];
2484 case TGSI_SEMANTIC_EDGEFLAG
:
2485 edgeflag_value
= outputs
[i
].values
[0];
2487 case TGSI_SEMANTIC_CLIPDIST
:
2488 if (!shader
->key
.opt
.clip_disable
) {
2489 unsigned index
= 2 + outputs
[i
].semantic_index
;
2490 si_llvm_init_export_args(bld_base
, outputs
[i
].values
,
2491 V_008DFC_SQ_EXP_POS
+ index
,
2495 case TGSI_SEMANTIC_CLIPVERTEX
:
2496 if (!shader
->key
.opt
.clip_disable
) {
2497 si_llvm_emit_clipvertex(bld_base
, pos_args
,
2504 /* We need to add the position output manually if it's missing. */
2505 if (!pos_args
[0].out
[0]) {
2506 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2507 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2508 pos_args
[0].done
= 0; /* last export? */
2509 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2510 pos_args
[0].compr
= 0; /* COMPR flag */
2511 pos_args
[0].out
[0] = base
->zero
; /* X */
2512 pos_args
[0].out
[1] = base
->zero
; /* Y */
2513 pos_args
[0].out
[2] = base
->zero
; /* Z */
2514 pos_args
[0].out
[3] = base
->one
; /* W */
2517 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2518 if (shader
->selector
->info
.writes_psize
||
2519 shader
->selector
->info
.writes_edgeflag
||
2520 shader
->selector
->info
.writes_viewport_index
||
2521 shader
->selector
->info
.writes_layer
) {
2522 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2523 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2524 (shader
->selector
->info
.writes_layer
<< 2);
2526 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2527 pos_args
[1].done
= 0; /* last export? */
2528 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2529 pos_args
[1].compr
= 0; /* COMPR flag */
2530 pos_args
[1].out
[0] = base
->zero
; /* X */
2531 pos_args
[1].out
[1] = base
->zero
; /* Y */
2532 pos_args
[1].out
[2] = base
->zero
; /* Z */
2533 pos_args
[1].out
[3] = base
->zero
; /* W */
2535 if (shader
->selector
->info
.writes_psize
)
2536 pos_args
[1].out
[0] = psize_value
;
2538 if (shader
->selector
->info
.writes_edgeflag
) {
2539 /* The output is a float, but the hw expects an integer
2540 * with the first bit containing the edge flag. */
2541 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2544 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2548 /* The LLVM intrinsic expects a float. */
2549 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2552 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2553 /* GFX9 has the layer in out.z[10:0] and the viewport
2554 * index in out.z[19:16].
2556 if (shader
->selector
->info
.writes_layer
)
2557 pos_args
[1].out
[2] = layer_value
;
2559 if (shader
->selector
->info
.writes_viewport_index
) {
2560 LLVMValueRef v
= viewport_index_value
;
2562 v
= ac_to_integer(&ctx
->ac
, v
);
2563 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2564 LLVMConstInt(ctx
->i32
, 16, 0), "");
2565 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2566 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2567 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2568 pos_args
[1].enabled_channels
|= 1 << 2;
2571 if (shader
->selector
->info
.writes_layer
)
2572 pos_args
[1].out
[2] = layer_value
;
2574 if (shader
->selector
->info
.writes_viewport_index
) {
2575 pos_args
[1].out
[3] = viewport_index_value
;
2576 pos_args
[1].enabled_channels
|= 1 << 3;
2581 for (i
= 0; i
< 4; i
++)
2582 if (pos_args
[i
].out
[0])
2583 shader
->info
.nr_pos_exports
++;
2586 for (i
= 0; i
< 4; i
++) {
2587 if (!pos_args
[i
].out
[0])
2590 /* Specify the target we are exporting */
2591 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
2593 if (pos_idx
== shader
->info
.nr_pos_exports
)
2594 /* Specify that this is the last export */
2595 pos_args
[i
].done
= 1;
2597 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
2600 /* Build parameter exports. */
2601 si_build_param_exports(ctx
, outputs
, noutput
);
2605 * Forward all outputs from the vertex shader to the TES. This is only used
2606 * for the fixed function TCS.
2608 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
2610 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2611 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
2612 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
2615 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2616 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2617 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2619 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
2620 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
2621 lds_vertex_stride
, "");
2622 lds_base
= get_tcs_in_current_patch_offset(ctx
);
2623 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
2625 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
2627 unsigned i
= u_bit_scan64(&inputs
);
2629 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2630 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2633 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
2634 get_rel_patch_id(ctx
),
2636 LLVMConstInt(ctx
->i32
, i
, 0));
2638 LLVMValueRef value
= lds_load(bld_base
, TGSI_TYPE_SIGNED
, ~0,
2641 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
2642 buffer_offset
, 0, 1, 0, true, false);
2646 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
2647 LLVMValueRef rel_patch_id
,
2648 LLVMValueRef invocation_id
,
2649 LLVMValueRef tcs_out_current_patch_data_offset
,
2650 LLVMValueRef invoc0_tf_outer
[4],
2651 LLVMValueRef invoc0_tf_inner
[2])
2653 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2654 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
2655 struct si_shader
*shader
= ctx
->shader
;
2656 unsigned tess_inner_index
, tess_outer_index
;
2657 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
2658 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
2659 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
2660 struct lp_build_if_state if_ctx
, inner_if_ctx
;
2662 /* Add a barrier before loading tess factors from LDS. */
2663 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
2664 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
2666 /* Do this only for invocation 0, because the tess levels are per-patch,
2669 * This can't jump, because invocation 0 executes this. It should
2670 * at least mask out the loads and stores for other invocations.
2672 lp_build_if(&if_ctx
, gallivm
,
2673 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
2674 invocation_id
, ctx
->i32_0
, ""));
2676 /* Determine the layout of one tess factor element in the buffer. */
2677 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
2678 case PIPE_PRIM_LINES
:
2679 stride
= 2; /* 2 dwords, 1 vec2 store */
2683 case PIPE_PRIM_TRIANGLES
:
2684 stride
= 4; /* 4 dwords, 1 vec4 store */
2688 case PIPE_PRIM_QUADS
:
2689 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
2698 for (i
= 0; i
< 4; i
++) {
2699 inner
[i
] = LLVMGetUndef(ctx
->i32
);
2700 outer
[i
] = LLVMGetUndef(ctx
->i32
);
2703 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
2704 /* Tess factors are in VGPRs. */
2705 for (i
= 0; i
< outer_comps
; i
++)
2706 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
2707 for (i
= 0; i
< inner_comps
; i
++)
2708 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
2710 /* Load tess_inner and tess_outer from LDS.
2711 * Any invocation can write them, so we can't get them from a temporary.
2713 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
2714 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
2716 lds_base
= tcs_out_current_patch_data_offset
;
2717 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2718 LLVMConstInt(ctx
->i32
,
2719 tess_inner_index
* 4, 0), "");
2720 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
2721 LLVMConstInt(ctx
->i32
,
2722 tess_outer_index
* 4, 0), "");
2724 for (i
= 0; i
< outer_comps
; i
++) {
2726 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_outer
);
2728 for (i
= 0; i
< inner_comps
; i
++) {
2729 inner
[i
] = out
[outer_comps
+i
] =
2730 lds_load(bld_base
, TGSI_TYPE_SIGNED
, i
, lds_inner
);
2734 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
2735 /* For isolines, the hardware expects tess factors in the
2736 * reverse order from what GLSL / TGSI specify.
2738 LLVMValueRef tmp
= out
[0];
2743 /* Convert the outputs to vectors for stores. */
2744 vec0
= lp_build_gather_values(gallivm
, out
, MIN2(stride
, 4));
2748 vec1
= lp_build_gather_values(gallivm
, out
+4, stride
- 4);
2750 /* Get the buffer. */
2751 buffer
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_factor_addr_base64k
);
2753 /* Get the offset. */
2754 tf_base
= LLVMGetParam(ctx
->main_fn
,
2755 ctx
->param_tcs_factor_offset
);
2756 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
2757 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
2759 lp_build_if(&inner_if_ctx
, gallivm
,
2760 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
2761 rel_patch_id
, ctx
->i32_0
, ""));
2763 /* Store the dynamic HS control word. */
2765 if (ctx
->screen
->b
.chip_class
<= VI
) {
2766 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
2767 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
2768 1, ctx
->i32_0
, tf_base
,
2769 offset
, 1, 0, true, false);
2773 lp_build_endif(&inner_if_ctx
);
2775 /* Store the tessellation factors. */
2776 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
2777 MIN2(stride
, 4), byteoffset
, tf_base
,
2778 offset
, 1, 0, true, false);
2781 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
2782 stride
- 4, byteoffset
, tf_base
,
2783 offset
, 1, 0, true, false);
2785 /* Store the tess factors into the offchip buffer if TES reads them. */
2786 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
2787 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
2788 LLVMValueRef tf_inner_offset
;
2789 unsigned param_outer
, param_inner
;
2791 buf
= desc_from_addr_base64k(ctx
, ctx
->param_tcs_offchip_addr_base64k
);
2792 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2794 param_outer
= si_shader_io_get_unique_index_patch(
2795 TGSI_SEMANTIC_TESSOUTER
, 0);
2796 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2797 LLVMConstInt(ctx
->i32
, param_outer
, 0));
2799 outer_vec
= lp_build_gather_values(gallivm
, outer
,
2800 util_next_power_of_two(outer_comps
));
2802 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
2803 outer_comps
, tf_outer_offset
,
2804 base
, 0, 1, 0, true, false);
2806 param_inner
= si_shader_io_get_unique_index_patch(
2807 TGSI_SEMANTIC_TESSINNER
, 0);
2808 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
2809 LLVMConstInt(ctx
->i32
, param_inner
, 0));
2811 inner_vec
= inner_comps
== 1 ? inner
[0] :
2812 lp_build_gather_values(gallivm
, inner
, inner_comps
);
2813 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
2814 inner_comps
, tf_inner_offset
,
2815 base
, 0, 1, 0, true, false);
2819 lp_build_endif(&if_ctx
);
2823 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2824 unsigned param
, unsigned return_index
)
2826 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
2827 LLVMGetParam(ctx
->main_fn
, param
),
2832 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2833 unsigned param
, unsigned return_index
)
2835 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2836 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
2838 return LLVMBuildInsertValue(builder
, ret
,
2839 ac_to_float(&ctx
->ac
, p
),
2844 si_insert_input_ptr_as_2xi32(struct si_shader_context
*ctx
, LLVMValueRef ret
,
2845 unsigned param
, unsigned return_index
)
2847 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2848 LLVMValueRef ptr
, lo
, hi
;
2850 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
2851 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
2852 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
2853 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
2854 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
2855 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
2856 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
2859 /* This only writes the tessellation factor levels. */
2860 static void si_llvm_emit_tcs_epilogue(struct lp_build_tgsi_context
*bld_base
)
2862 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2863 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2864 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
2866 si_copy_tcs_inputs(bld_base
);
2868 rel_patch_id
= get_rel_patch_id(ctx
);
2869 invocation_id
= unpack_param(ctx
, ctx
->param_tcs_rel_ids
, 8, 5);
2870 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
2872 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2873 LLVMBasicBlockRef blocks
[2] = {
2874 LLVMGetInsertBlock(builder
),
2875 ctx
->merged_wrap_if_state
.entry_block
2877 LLVMValueRef values
[2];
2879 lp_build_endif(&ctx
->merged_wrap_if_state
);
2881 values
[0] = rel_patch_id
;
2882 values
[1] = LLVMGetUndef(ctx
->i32
);
2883 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
2885 values
[0] = tf_lds_offset
;
2886 values
[1] = LLVMGetUndef(ctx
->i32
);
2887 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
2889 values
[0] = invocation_id
;
2890 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
2891 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
2894 /* Return epilog parameters from this function. */
2895 LLVMValueRef ret
= ctx
->return_value
;
2898 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
2899 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2900 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
2901 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2902 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2903 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2904 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2905 /* Tess offchip and tess factor offsets are at the beginning. */
2906 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
2907 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
2908 vgpr
= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
+ 1;
2910 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2911 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
2912 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2913 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2914 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2915 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2916 /* Tess offchip and tess factor offsets are after user SGPRs. */
2917 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
2918 GFX6_TCS_NUM_USER_SGPR
);
2919 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
2920 GFX6_TCS_NUM_USER_SGPR
+ 1);
2921 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
2925 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
2926 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
2927 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
2929 /* Leave a hole corresponding to the two input VGPRs. This ensures that
2930 * the invocation_id output does not alias the param_tcs_rel_ids input,
2931 * which saves a V_MOV on gfx9.
2935 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
2936 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
2938 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
2939 vgpr
++; /* skip the tess factor LDS offset */
2940 for (unsigned i
= 0; i
< 6; i
++) {
2941 LLVMValueRef value
=
2942 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
2943 value
= ac_to_float(&ctx
->ac
, value
);
2944 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
2947 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
2949 ctx
->return_value
= ret
;
2952 /* Pass TCS inputs from LS to TCS on GFX9. */
2953 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
2955 LLVMValueRef ret
= ctx
->return_value
;
2957 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
, 0);
2958 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
2959 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
2960 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
2961 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
2962 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
2963 ctx
->param_bindless_samplers_and_images
,
2964 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
2966 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
2967 8 + SI_SGPR_VS_STATE_BITS
);
2968 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
2969 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
2970 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
2971 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
2972 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
2973 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
2974 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_addr_base64k
,
2975 8 + GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K
);
2976 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_addr_base64k
,
2977 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
);
2979 unsigned desc_param
= ctx
->param_tcs_factor_addr_base64k
+ 2;
2980 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
2981 8 + GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS
);
2982 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
2983 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES
);
2985 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
2986 ret
= si_insert_input_ret_float(ctx
, ret
,
2987 ctx
->param_tcs_patch_id
, vgpr
++);
2988 ret
= si_insert_input_ret_float(ctx
, ret
,
2989 ctx
->param_tcs_rel_ids
, vgpr
++);
2990 ctx
->return_value
= ret
;
2993 /* Pass GS inputs from ES to GS on GFX9. */
2994 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
2996 LLVMValueRef ret
= ctx
->return_value
;
2998 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, ctx
->param_rw_buffers
, 0);
2999 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3000 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3002 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3003 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
,
3004 ctx
->param_bindless_samplers_and_images
,
3005 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3007 unsigned desc_param
= ctx
->param_vs_state_bits
+ 1;
3008 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
,
3009 8 + GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS
);
3010 ret
= si_insert_input_ptr_as_2xi32(ctx
, ret
, desc_param
+ 1,
3011 8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES
);
3013 unsigned vgpr
= 8 + GFX9_GS_NUM_USER_SGPR
;
3014 for (unsigned i
= 0; i
< 5; i
++) {
3015 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3016 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3018 ctx
->return_value
= ret
;
3021 static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context
*bld_base
)
3023 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3024 struct si_shader
*shader
= ctx
->shader
;
3025 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3027 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3028 ctx
->param_rel_auto_id
);
3029 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3030 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3031 vertex_dw_stride
, "");
3033 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3034 * its inputs from it. */
3035 for (i
= 0; i
< info
->num_outputs
; i
++) {
3036 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
3037 unsigned name
= info
->output_semantic_name
[i
];
3038 unsigned index
= info
->output_semantic_index
[i
];
3040 /* The ARB_shader_viewport_layer_array spec contains the
3043 * 2) What happens if gl_ViewportIndex or gl_Layer is
3044 * written in the vertex shader and a geometry shader is
3047 * RESOLVED: The value written by the last vertex processing
3048 * stage is used. If the last vertex processing stage
3049 * (vertex, tessellation evaluation or geometry) does not
3050 * statically assign to gl_ViewportIndex or gl_Layer, index
3051 * or layer zero is assumed.
3053 * So writes to those outputs in VS-as-LS are simply ignored.
3055 if (name
== TGSI_SEMANTIC_LAYER
||
3056 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3059 int param
= si_shader_io_get_unique_index(name
, index
);
3060 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3061 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3063 for (chan
= 0; chan
< 4; chan
++) {
3064 lds_store(bld_base
, chan
, dw_addr
,
3065 LLVMBuildLoad(ctx
->ac
.builder
, out_ptr
[chan
], ""));
3069 if (ctx
->screen
->b
.chip_class
>= GFX9
)
3070 si_set_ls_return_value_for_tcs(ctx
);
3073 static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context
*bld_base
)
3075 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3076 struct si_shader
*es
= ctx
->shader
;
3077 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3078 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3079 ctx
->param_es2gs_offset
);
3080 LLVMValueRef lds_base
= NULL
;
3084 if (ctx
->screen
->b
.chip_class
>= GFX9
&& info
->num_outputs
) {
3085 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3086 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3087 LLVMValueRef wave_idx
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3088 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3089 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3090 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3091 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3092 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3095 for (i
= 0; i
< info
->num_outputs
; i
++) {
3096 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
3099 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3100 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3103 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3104 info
->output_semantic_index
[i
]);
3106 for (chan
= 0; chan
< 4; chan
++) {
3107 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, out_ptr
[chan
], "");
3108 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3110 /* GFX9 has the ESGS ring in LDS. */
3111 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
3112 lds_store(bld_base
, param
* 4 + chan
, lds_base
, out_val
);
3116 ac_build_buffer_store_dword(&ctx
->ac
,
3118 out_val
, 1, NULL
, soffset
,
3119 (4 * param
+ chan
) * 4,
3124 if (ctx
->screen
->b
.chip_class
>= GFX9
)
3125 si_set_es_return_value_for_gs(ctx
);
3128 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3130 if (ctx
->screen
->b
.chip_class
>= GFX9
)
3131 return unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3133 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3136 static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3138 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3140 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3141 si_get_gs_wave_id(ctx
));
3143 if (ctx
->screen
->b
.chip_class
>= GFX9
)
3144 lp_build_endif(&ctx
->merged_wrap_if_state
);
3147 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3148 unsigned max_outputs
,
3149 LLVMValueRef
*addrs
)
3151 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3152 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3153 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3154 struct si_shader_output_values
*outputs
= NULL
;
3157 assert(!ctx
->shader
->is_gs_copy_shader
);
3158 assert(info
->num_outputs
<= max_outputs
);
3160 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3162 /* Vertex color clamping.
3164 * This uses a state constant loaded in a user data SGPR and
3165 * an IF statement is added that clamps all colors if the constant
3168 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
3169 struct lp_build_if_state if_ctx
;
3170 LLVMValueRef cond
= NULL
;
3171 LLVMValueRef addr
, val
;
3173 for (i
= 0; i
< info
->num_outputs
; i
++) {
3174 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3175 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3178 /* We've found a color. */
3180 /* The state is in the first bit of the user SGPR. */
3181 cond
= LLVMGetParam(ctx
->main_fn
,
3182 ctx
->param_vs_state_bits
);
3183 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3185 lp_build_if(&if_ctx
, gallivm
, cond
);
3188 for (j
= 0; j
< 4; j
++) {
3189 addr
= addrs
[4 * i
+ j
];
3190 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3191 val
= ac_build_clamp(&ctx
->ac
, val
);
3192 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3197 lp_build_endif(&if_ctx
);
3200 for (i
= 0; i
< info
->num_outputs
; i
++) {
3201 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3202 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3204 for (j
= 0; j
< 4; j
++) {
3205 outputs
[i
].values
[j
] =
3206 LLVMBuildLoad(ctx
->ac
.builder
,
3209 outputs
[i
].vertex_stream
[j
] =
3210 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3214 if (ctx
->shader
->selector
->so
.num_outputs
)
3215 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3217 /* Export PrimitiveID. */
3218 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3219 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3220 outputs
[i
].semantic_index
= 0;
3221 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3222 for (j
= 1; j
< 4; j
++)
3223 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3225 memset(outputs
[i
].vertex_stream
, 0,
3226 sizeof(outputs
[i
].vertex_stream
));
3230 si_llvm_export_vs(&ctx
->bld_base
, outputs
, i
);
3234 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3236 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3238 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3239 &ctx
->outputs
[0][0]);
3242 struct si_ps_exports
{
3244 struct ac_export_args args
[10];
3247 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
3248 bool writes_samplemask
)
3251 /* Z needs 32 bits. */
3252 if (writes_samplemask
)
3253 return V_028710_SPI_SHADER_32_ABGR
;
3254 else if (writes_stencil
)
3255 return V_028710_SPI_SHADER_32_GR
;
3257 return V_028710_SPI_SHADER_32_R
;
3258 } else if (writes_stencil
|| writes_samplemask
) {
3259 /* Both stencil and sample mask need only 16 bits. */
3260 return V_028710_SPI_SHADER_UINT16_ABGR
;
3262 return V_028710_SPI_SHADER_ZERO
;
3266 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3267 LLVMValueRef depth
, LLVMValueRef stencil
,
3268 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3270 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3271 struct lp_build_context
*base
= &bld_base
->base
;
3272 struct ac_export_args args
;
3274 unsigned format
= si_get_spi_shader_z_format(depth
!= NULL
,
3276 samplemask
!= NULL
);
3278 assert(depth
|| stencil
|| samplemask
);
3280 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3281 args
.done
= 1; /* DONE bit */
3283 /* Specify the target we are exporting */
3284 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
3286 args
.compr
= 0; /* COMP flag */
3287 args
.out
[0] = base
->undef
; /* R, depth */
3288 args
.out
[1] = base
->undef
; /* G, stencil test value[0:7], stencil op value[8:15] */
3289 args
.out
[2] = base
->undef
; /* B, sample mask */
3290 args
.out
[3] = base
->undef
; /* A, alpha to mask */
3292 if (format
== V_028710_SPI_SHADER_UINT16_ABGR
) {
3294 args
.compr
= 1; /* COMPR flag */
3297 /* Stencil should be in X[23:16]. */
3298 stencil
= ac_to_integer(&ctx
->ac
, stencil
);
3299 stencil
= LLVMBuildShl(ctx
->ac
.builder
, stencil
,
3300 LLVMConstInt(ctx
->i32
, 16, 0), "");
3301 args
.out
[0] = ac_to_float(&ctx
->ac
, stencil
);
3305 /* SampleMask should be in Y[15:0]. */
3306 args
.out
[1] = samplemask
;
3311 args
.out
[0] = depth
;
3315 args
.out
[1] = stencil
;
3319 args
.out
[2] = samplemask
;
3324 /* SI (except OLAND and HAINAN) has a bug that it only looks
3325 * at the X writemask component. */
3326 if (ctx
->screen
->b
.chip_class
== SI
&&
3327 ctx
->screen
->b
.family
!= CHIP_OLAND
&&
3328 ctx
->screen
->b
.family
!= CHIP_HAINAN
)
3331 /* Specify which components to enable */
3332 args
.enabled_channels
= mask
;
3334 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3337 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3338 LLVMValueRef
*color
, unsigned index
,
3339 unsigned samplemask_param
,
3340 bool is_last
, struct si_ps_exports
*exp
)
3342 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3343 struct lp_build_context
*base
= &bld_base
->base
;
3347 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3348 for (i
= 0; i
< 4; i
++)
3349 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3352 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3353 color
[3] = base
->one
;
3357 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3358 si_alpha_test(bld_base
, color
[3]);
3360 /* Line & polygon smoothing */
3361 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3362 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3365 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3366 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3367 struct ac_export_args args
[8];
3370 /* Get the export arguments, also find out what the last one is. */
3371 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3372 si_llvm_init_export_args(bld_base
, color
,
3373 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3374 if (args
[c
].enabled_channels
)
3378 /* Emit all exports. */
3379 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3380 if (is_last
&& last
== c
) {
3381 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3382 args
[c
].done
= 1; /* DONE bit */
3383 } else if (!args
[c
].enabled_channels
)
3384 continue; /* unnecessary NULL export */
3386 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3389 struct ac_export_args args
;
3392 si_llvm_init_export_args(bld_base
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3395 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3396 args
.done
= 1; /* DONE bit */
3397 } else if (!args
.enabled_channels
)
3398 return; /* unnecessary NULL export */
3400 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3404 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3405 struct si_ps_exports
*exp
)
3407 for (unsigned i
= 0; i
< exp
->num
; i
++)
3408 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3411 static void si_export_null(struct lp_build_tgsi_context
*bld_base
)
3413 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3414 struct lp_build_context
*base
= &bld_base
->base
;
3415 struct ac_export_args args
;
3417 args
.enabled_channels
= 0x0; /* enabled channels */
3418 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3419 args
.done
= 1; /* DONE bit */
3420 args
.target
= V_008DFC_SQ_EXP_NULL
;
3421 args
.compr
= 0; /* COMPR flag (0 = 32-bit export) */
3422 args
.out
[0] = base
->undef
; /* R */
3423 args
.out
[1] = base
->undef
; /* G */
3424 args
.out
[2] = base
->undef
; /* B */
3425 args
.out
[3] = base
->undef
; /* A */
3427 ac_build_export(&ctx
->ac
, &args
);
3431 * Return PS outputs in this order:
3433 * v[0:3] = color0.xyzw
3434 * v[4:7] = color1.xyzw
3439 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3441 * The alpha-ref SGPR is returned via its original location.
3443 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3444 unsigned max_outputs
,
3445 LLVMValueRef
*addrs
)
3447 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3448 struct si_shader
*shader
= ctx
->shader
;
3449 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3450 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3451 unsigned i
, j
, first_vgpr
, vgpr
;
3453 LLVMValueRef color
[8][4] = {};
3454 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3457 if (ctx
->postponed_kill
)
3458 ac_build_kill(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3460 /* Read the output values. */
3461 for (i
= 0; i
< info
->num_outputs
; i
++) {
3462 unsigned semantic_name
= info
->output_semantic_name
[i
];
3463 unsigned semantic_index
= info
->output_semantic_index
[i
];
3465 switch (semantic_name
) {
3466 case TGSI_SEMANTIC_COLOR
:
3467 assert(semantic_index
< 8);
3468 for (j
= 0; j
< 4; j
++) {
3469 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3470 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3471 color
[semantic_index
][j
] = result
;
3474 case TGSI_SEMANTIC_POSITION
:
3475 depth
= LLVMBuildLoad(builder
,
3476 addrs
[4 * i
+ 2], "");
3478 case TGSI_SEMANTIC_STENCIL
:
3479 stencil
= LLVMBuildLoad(builder
,
3480 addrs
[4 * i
+ 1], "");
3482 case TGSI_SEMANTIC_SAMPLEMASK
:
3483 samplemask
= LLVMBuildLoad(builder
,
3484 addrs
[4 * i
+ 0], "");
3487 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3492 /* Fill the return structure. */
3493 ret
= ctx
->return_value
;
3496 ret
= LLVMBuildInsertValue(builder
, ret
,
3497 ac_to_integer(&ctx
->ac
,
3498 LLVMGetParam(ctx
->main_fn
,
3499 SI_PARAM_ALPHA_REF
)),
3500 SI_SGPR_ALPHA_REF
, "");
3503 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3504 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3508 for (j
= 0; j
< 4; j
++)
3509 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3512 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3514 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3516 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3518 /* Add the input sample mask for smoothing at the end. */
3519 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3520 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3521 ret
= LLVMBuildInsertValue(builder
, ret
,
3522 LLVMGetParam(ctx
->main_fn
,
3523 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3525 ctx
->return_value
= ret
;
3528 void si_emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
)
3530 LLVMValueRef args
[1] = {
3531 LLVMConstInt(ctx
->i32
, simm16
, 0)
3533 lp_build_intrinsic(ctx
->ac
.builder
, "llvm.amdgcn.s.waitcnt",
3534 ctx
->voidt
, args
, 1, 0);
3537 static void membar_emit(
3538 const struct lp_build_tgsi_action
*action
,
3539 struct lp_build_tgsi_context
*bld_base
,
3540 struct lp_build_emit_data
*emit_data
)
3542 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3543 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3544 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3545 unsigned waitcnt
= NOOP_WAITCNT
;
3547 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3548 waitcnt
&= VM_CNT
& LGKM_CNT
;
3550 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3551 TGSI_MEMBAR_SHADER_BUFFER
|
3552 TGSI_MEMBAR_SHADER_IMAGE
))
3555 if (flags
& TGSI_MEMBAR_SHARED
)
3556 waitcnt
&= LGKM_CNT
;
3558 if (waitcnt
!= NOOP_WAITCNT
)
3559 si_emit_waitcnt(ctx
, waitcnt
);
3562 static void clock_emit(
3563 const struct lp_build_tgsi_action
*action
,
3564 struct lp_build_tgsi_context
*bld_base
,
3565 struct lp_build_emit_data
*emit_data
)
3567 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3570 tmp
= lp_build_intrinsic(ctx
->ac
.builder
, "llvm.readcyclecounter",
3571 ctx
->i64
, NULL
, 0, 0);
3572 tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->v2i32
, "");
3574 emit_data
->output
[0] =
3575 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3576 emit_data
->output
[1] =
3577 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3580 LLVMTypeRef
si_const_array(LLVMTypeRef elem_type
, int num_elements
)
3582 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
3586 static void si_llvm_emit_ddxy(
3587 const struct lp_build_tgsi_action
*action
,
3588 struct lp_build_tgsi_context
*bld_base
,
3589 struct lp_build_emit_data
*emit_data
)
3591 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3592 unsigned opcode
= emit_data
->info
->opcode
;
3597 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3598 mask
= AC_TID_MASK_LEFT
;
3599 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3600 mask
= AC_TID_MASK_TOP
;
3602 mask
= AC_TID_MASK_TOP_LEFT
;
3604 /* for DDX we want to next X pixel, DDY next Y pixel. */
3605 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3607 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3608 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3609 emit_data
->output
[emit_data
->chan
] = val
;
3613 * this takes an I,J coordinate pair,
3614 * and works out the X and Y derivatives.
3615 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3617 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3618 struct lp_build_tgsi_context
*bld_base
,
3619 LLVMValueRef interp_ij
)
3621 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3622 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3623 LLVMValueRef result
[4], a
;
3626 for (i
= 0; i
< 2; i
++) {
3627 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3628 LLVMConstInt(ctx
->i32
, i
, 0), "");
3629 result
[i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDX
, a
);
3630 result
[2+i
] = lp_build_emit_llvm_unary(bld_base
, TGSI_OPCODE_DDY
, a
);
3633 return lp_build_gather_values(gallivm
, result
, 4);
3636 static void interp_fetch_args(
3637 struct lp_build_tgsi_context
*bld_base
,
3638 struct lp_build_emit_data
*emit_data
)
3640 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3641 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3642 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3644 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3645 /* offset is in second src, first two channels */
3646 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
3649 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
3652 emit_data
->arg_count
= 2;
3653 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3654 LLVMValueRef sample_position
;
3655 LLVMValueRef sample_id
;
3656 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3658 /* fetch sample ID, then fetch its sample position,
3659 * and place into first two channels.
3661 sample_id
= lp_build_emit_fetch(bld_base
,
3662 emit_data
->inst
, 1, TGSI_CHAN_X
);
3663 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3665 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3666 * Language 4.50 spec says about interpolateAtSample:
3668 * "Returns the value of the input interpolant variable at
3669 * the location of sample number sample. If multisample
3670 * buffers are not available, the input variable will be
3671 * evaluated at the center of the pixel. If sample sample
3672 * does not exist, the position used to interpolate the
3673 * input variable is undefined."
3675 * This means that sample_id values outside of the valid are
3676 * in fact valid input, and the usual mechanism for loading the
3677 * sample position doesn't work.
3679 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3680 LLVMValueRef center
[4] = {
3681 LLVMConstReal(ctx
->f32
, 0.5),
3682 LLVMConstReal(ctx
->f32
, 0.5),
3687 sample_position
= lp_build_gather_values(gallivm
, center
, 4);
3689 sample_position
= load_sample_position(ctx
, sample_id
);
3692 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3696 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
3697 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3700 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
3701 emit_data
->arg_count
= 2;
3705 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3706 struct lp_build_tgsi_context
*bld_base
,
3707 struct lp_build_emit_data
*emit_data
)
3709 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3710 struct si_shader
*shader
= ctx
->shader
;
3711 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3712 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3713 LLVMValueRef interp_param
;
3714 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3715 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3716 int input_base
, input_array_size
;
3719 LLVMValueRef prim_mask
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_PRIM_MASK
);
3720 LLVMValueRef array_idx
;
3721 int interp_param_idx
;
3725 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
3727 if (input
->Register
.Indirect
) {
3728 unsigned array_id
= input
->Indirect
.ArrayID
;
3731 input_base
= info
->input_array_first
[array_id
];
3732 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
3734 input_base
= inst
->Src
[0].Register
.Index
;
3735 input_array_size
= info
->num_inputs
- input_base
;
3738 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
3739 1, input
->Register
.Index
- input_base
);
3741 input_base
= inst
->Src
[0].Register
.Index
;
3742 input_array_size
= 1;
3743 array_idx
= ctx
->i32_0
;
3746 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
3748 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3749 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
3750 location
= TGSI_INTERPOLATE_LOC_CENTER
;
3752 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
3754 interp_param_idx
= lookup_interp_param_index(interp
, location
);
3755 if (interp_param_idx
== -1)
3757 else if (interp_param_idx
)
3758 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
3760 interp_param
= NULL
;
3762 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
3763 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3764 LLVMValueRef ij_out
[2];
3765 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
3768 * take the I then J parameters, and the DDX/Y for it, and
3769 * calculate the IJ inputs for the interpolator.
3770 * temp1 = ddx * offset/sample.x + I;
3771 * interp_param.I = ddy * offset/sample.y + temp1;
3772 * temp1 = ddx * offset/sample.x + J;
3773 * interp_param.J = ddy * offset/sample.y + temp1;
3775 for (i
= 0; i
< 2; i
++) {
3776 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
3777 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
3778 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3779 ddxy_out
, ix_ll
, "");
3780 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3781 ddxy_out
, iy_ll
, "");
3782 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
3783 interp_param
, ix_ll
, "");
3784 LLVMValueRef temp1
, temp2
;
3786 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
3788 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
3790 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
3792 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
3794 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
3796 interp_param
= lp_build_gather_values(gallivm
, ij_out
, 2);
3800 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
3802 for (chan
= 0; chan
< 4; chan
++) {
3803 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
3804 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
3806 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
3807 LLVMValueRef v
, i
= NULL
, j
= NULL
;
3810 i
= LLVMBuildExtractElement(
3811 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
3812 j
= LLVMBuildExtractElement(
3813 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
3815 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
3818 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
3819 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
3822 emit_data
->output
[chan
] = LLVMBuildExtractElement(
3823 ctx
->ac
.builder
, gather
, array_idx
, "");
3827 static void vote_all_emit(
3828 const struct lp_build_tgsi_action
*action
,
3829 struct lp_build_tgsi_context
*bld_base
,
3830 struct lp_build_emit_data
*emit_data
)
3832 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3834 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
3835 emit_data
->output
[emit_data
->chan
] =
3836 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
3839 static void vote_any_emit(
3840 const struct lp_build_tgsi_action
*action
,
3841 struct lp_build_tgsi_context
*bld_base
,
3842 struct lp_build_emit_data
*emit_data
)
3844 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3846 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
3847 emit_data
->output
[emit_data
->chan
] =
3848 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
3851 static void vote_eq_emit(
3852 const struct lp_build_tgsi_action
*action
,
3853 struct lp_build_tgsi_context
*bld_base
,
3854 struct lp_build_emit_data
*emit_data
)
3856 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3858 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
3859 emit_data
->output
[emit_data
->chan
] =
3860 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
3863 static void ballot_emit(
3864 const struct lp_build_tgsi_action
*action
,
3865 struct lp_build_tgsi_context
*bld_base
,
3866 struct lp_build_emit_data
*emit_data
)
3868 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3869 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3872 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
3873 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
3874 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
3876 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
3877 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
3880 static void read_invoc_fetch_args(
3881 struct lp_build_tgsi_context
*bld_base
,
3882 struct lp_build_emit_data
*emit_data
)
3884 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
3885 0, emit_data
->src_chan
);
3887 /* Always read the source invocation (= lane) from the X channel. */
3888 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
3890 emit_data
->arg_count
= 2;
3893 static void read_lane_emit(
3894 const struct lp_build_tgsi_action
*action
,
3895 struct lp_build_tgsi_context
*bld_base
,
3896 struct lp_build_emit_data
*emit_data
)
3898 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3900 /* We currently have no other way to prevent LLVM from lifting the icmp
3901 * calls to a dominating basic block.
3903 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
3905 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
3906 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
3908 emit_data
->output
[emit_data
->chan
] =
3909 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
3910 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
3911 AC_FUNC_ATTR_READNONE
|
3912 AC_FUNC_ATTR_CONVERGENT
);
3915 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
3916 struct lp_build_emit_data
*emit_data
)
3918 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3919 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
3923 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
3925 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
3926 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
3930 /* Emit one vertex from the geometry shader */
3931 static void si_llvm_emit_vertex(
3932 const struct lp_build_tgsi_action
*action
,
3933 struct lp_build_tgsi_context
*bld_base
,
3934 struct lp_build_emit_data
*emit_data
)
3936 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3937 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
3938 struct si_shader
*shader
= ctx
->shader
;
3939 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3940 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
3941 struct lp_build_if_state if_state
;
3942 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3943 ctx
->param_gs2vs_offset
);
3944 LLVMValueRef gs_next_vertex
;
3945 LLVMValueRef can_emit
, kill
;
3946 unsigned chan
, offset
;
3950 stream
= si_llvm_get_stream(bld_base
, emit_data
);
3952 /* Write vertex attribute values to GSVS ring */
3953 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
3954 ctx
->gs_next_vertex
[stream
],
3957 /* If this thread has already emitted the declared maximum number of
3958 * vertices, skip the write: excessive vertex emissions are not
3959 * supposed to have any effect.
3961 * If the shader has no writes to memory, kill it instead. This skips
3962 * further memory loads and may allow LLVM to skip to the end
3965 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
3966 LLVMConstInt(ctx
->i32
,
3967 shader
->selector
->gs_max_out_vertices
, 0), "");
3969 bool use_kill
= !info
->writes_memory
;
3971 kill
= lp_build_select(&bld_base
->base
, can_emit
,
3972 LLVMConstReal(ctx
->f32
, 1.0f
),
3973 LLVMConstReal(ctx
->f32
, -1.0f
));
3975 ac_build_kill(&ctx
->ac
, kill
);
3977 lp_build_if(&if_state
, gallivm
, can_emit
);
3981 for (i
= 0; i
< info
->num_outputs
; i
++) {
3982 LLVMValueRef
*out_ptr
= ctx
->outputs
[i
];
3984 for (chan
= 0; chan
< 4; chan
++) {
3985 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
3986 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
3989 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, out_ptr
[chan
], "");
3990 LLVMValueRef voffset
=
3991 LLVMConstInt(ctx
->i32
, offset
*
3992 shader
->selector
->gs_max_out_vertices
, 0);
3995 voffset
= lp_build_add(uint
, voffset
, gs_next_vertex
);
3996 voffset
= lp_build_mul_imm(uint
, voffset
, 4);
3998 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4000 ac_build_buffer_store_dword(&ctx
->ac
,
4001 ctx
->gsvs_ring
[stream
],
4003 voffset
, soffset
, 0,
4008 gs_next_vertex
= lp_build_add(uint
, gs_next_vertex
,
4011 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4013 /* Signal vertex emission */
4014 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4015 si_get_gs_wave_id(ctx
));
4017 lp_build_endif(&if_state
);
4020 /* Cut one primitive from the geometry shader */
4021 static void si_llvm_emit_primitive(
4022 const struct lp_build_tgsi_action
*action
,
4023 struct lp_build_tgsi_context
*bld_base
,
4024 struct lp_build_emit_data
*emit_data
)
4026 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4029 /* Signal primitive cut */
4030 stream
= si_llvm_get_stream(bld_base
, emit_data
);
4031 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4032 si_get_gs_wave_id(ctx
));
4035 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4036 struct lp_build_tgsi_context
*bld_base
,
4037 struct lp_build_emit_data
*emit_data
)
4039 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4041 /* SI only (thanks to a hw bug workaround):
4042 * The real barrier instruction isn’t needed, because an entire patch
4043 * always fits into a single wave.
4045 if (ctx
->screen
->b
.chip_class
== SI
&&
4046 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4047 si_emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
4051 lp_build_intrinsic(ctx
->ac
.builder
,
4052 "llvm.amdgcn.s.barrier",
4053 ctx
->voidt
, NULL
, 0, LP_FUNC_ATTR_CONVERGENT
);
4056 static const struct lp_build_tgsi_action interp_action
= {
4057 .fetch_args
= interp_fetch_args
,
4058 .emit
= build_interp_intrinsic
,
4061 static void si_create_function(struct si_shader_context
*ctx
,
4063 LLVMTypeRef
*returns
, unsigned num_returns
,
4064 struct si_function_info
*fninfo
,
4065 unsigned max_workgroup_size
)
4069 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4070 fninfo
->types
, fninfo
->num_params
);
4071 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4073 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4074 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4076 /* The combination of:
4080 * allows the optimization passes to move loads and reduces
4081 * SGPR spilling significantly.
4083 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4084 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_BYVAL
);
4085 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_NOALIAS
);
4086 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4088 lp_add_function_attr(ctx
->main_fn
, i
+ 1, LP_FUNC_ATTR_INREG
);
4091 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4092 if (fninfo
->assign
[i
])
4093 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4096 if (max_workgroup_size
) {
4097 si_llvm_add_attribute(ctx
->main_fn
, "amdgpu-max-work-group-size",
4098 max_workgroup_size
);
4100 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4101 "no-signed-zeros-fp-math",
4104 if (ctx
->screen
->b
.debug_flags
& DBG_UNSAFE_MATH
) {
4105 /* These were copied from some LLVM test. */
4106 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4107 "less-precise-fpmad",
4109 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4112 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4115 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4121 static void declare_streamout_params(struct si_shader_context
*ctx
,
4122 struct pipe_stream_output_info
*so
,
4123 struct si_function_info
*fninfo
)
4127 /* Streamout SGPRs. */
4128 if (so
->num_outputs
) {
4129 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4130 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4132 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4134 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4136 /* A streamout buffer offset is loaded if the stride is non-zero. */
4137 for (i
= 0; i
< 4; i
++) {
4141 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4145 static void declare_lds_as_pointer(struct si_shader_context
*ctx
)
4147 unsigned lds_size
= ctx
->screen
->b
.chip_class
>= CIK
? 65536 : 32768;
4148 ctx
->lds
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ctx
->i32_0
,
4149 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
4153 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4155 switch (shader
->selector
->type
) {
4156 case PIPE_SHADER_TESS_CTRL
:
4157 /* Return this so that LLVM doesn't remove s_barrier
4158 * instructions on chips where we use s_barrier. */
4159 return shader
->selector
->screen
->b
.chip_class
>= CIK
? 128 : 64;
4161 case PIPE_SHADER_GEOMETRY
:
4162 return shader
->selector
->screen
->b
.chip_class
>= GFX9
? 128 : 64;
4164 case PIPE_SHADER_COMPUTE
:
4165 break; /* see below */
4171 const unsigned *properties
= shader
->selector
->info
.properties
;
4172 unsigned max_work_group_size
=
4173 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4174 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4175 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4177 if (!max_work_group_size
) {
4178 /* This is a variable group size compute shader,
4179 * compile it for the maximum possible group size.
4181 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4183 return max_work_group_size
;
4186 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4187 struct si_function_info
*fninfo
,
4190 unsigned const_and_shader_buffers
=
4191 add_arg(fninfo
, ARG_SGPR
,
4192 si_const_array(ctx
->v4i32
,
4193 SI_NUM_SHADER_BUFFERS
+ SI_NUM_CONST_BUFFERS
));
4194 unsigned samplers_and_images
=
4195 add_arg(fninfo
, ARG_SGPR
,
4196 si_const_array(ctx
->v8i32
,
4197 SI_NUM_IMAGES
+ SI_NUM_SAMPLERS
* 2));
4199 if (assign_params
) {
4200 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4201 ctx
->param_samplers_and_images
= samplers_and_images
;
4205 static void declare_default_desc_pointers(struct si_shader_context
*ctx
,
4206 struct si_function_info
*fninfo
)
4208 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4209 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
));
4210 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4211 si_const_array(ctx
->v8i32
, 0));
4212 declare_per_stage_desc_pointers(ctx
, fninfo
, true);
4215 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4216 struct si_function_info
*fninfo
)
4218 ctx
->param_vertex_buffers
= add_arg(fninfo
, ARG_SGPR
,
4219 si_const_array(ctx
->v4i32
, SI_NUM_VERTEX_BUFFERS
));
4220 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4221 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4222 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4223 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4226 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4227 struct si_function_info
*fninfo
,
4228 unsigned *num_prolog_vgprs
)
4230 struct si_shader
*shader
= ctx
->shader
;
4232 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4233 if (shader
->key
.as_ls
) {
4234 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4235 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4237 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4238 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4240 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4242 if (!shader
->is_gs_copy_shader
) {
4243 /* Vertex load indices. */
4244 ctx
->param_vertex_index0
= fninfo
->num_params
;
4245 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4246 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4247 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4251 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4252 struct si_function_info
*fninfo
)
4254 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4255 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4256 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4257 ctx
->param_tes_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4261 /* Convenient merged shader definitions. */
4262 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4263 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4266 static void create_function(struct si_shader_context
*ctx
)
4268 struct si_shader
*shader
= ctx
->shader
;
4269 struct si_function_info fninfo
;
4270 LLVMTypeRef returns
[16+32*4];
4271 unsigned i
, num_return_sgprs
;
4272 unsigned num_returns
= 0;
4273 unsigned num_prolog_vgprs
= 0;
4274 unsigned type
= ctx
->type
;
4276 si_init_function_info(&fninfo
);
4278 /* Set MERGED shaders. */
4279 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
4280 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4281 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4282 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4283 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4286 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4289 case PIPE_SHADER_VERTEX
:
4290 declare_default_desc_pointers(ctx
, &fninfo
);
4291 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4293 if (shader
->key
.as_es
) {
4294 assert(!shader
->selector
->nir
);
4295 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4296 } else if (shader
->key
.as_ls
) {
4297 assert(!shader
->selector
->nir
);
4298 /* no extra parameters */
4300 if (shader
->is_gs_copy_shader
) {
4301 fninfo
.num_params
= ctx
->param_rw_buffers
+ 1;
4302 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4305 /* The locations of the other parameters are assigned dynamically. */
4306 declare_streamout_params(ctx
, &shader
->selector
->so
,
4311 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4314 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4315 declare_default_desc_pointers(ctx
, &fninfo
);
4316 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4317 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4318 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4319 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4320 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4321 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4322 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4323 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4326 ctx
->param_tcs_patch_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4327 ctx
->param_tcs_rel_ids
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4329 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4330 * placed after the user SGPRs.
4332 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4333 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4334 for (i
= 0; i
< 11; i
++)
4335 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4338 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4339 /* Merged stages have 8 system SGPRs at the beginning. */
4340 ctx
->param_rw_buffers
= /* SPI_SHADER_USER_DATA_ADDR_LO_HS */
4341 add_arg(&fninfo
, ARG_SGPR
, si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
));
4342 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4343 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4344 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4345 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4346 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4347 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4349 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4350 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4352 ctx
->param_bindless_samplers_and_images
=
4353 add_arg(&fninfo
, ARG_SGPR
, si_const_array(ctx
->v8i32
, 0));
4355 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4356 ctx
->type
== PIPE_SHADER_VERTEX
);
4357 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4359 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4360 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4361 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4362 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4363 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4364 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4366 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4367 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4369 /* VGPRs (first TCS, then VS) */
4370 ctx
->param_tcs_patch_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4371 ctx
->param_tcs_rel_ids
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4373 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4374 declare_vs_input_vgprs(ctx
, &fninfo
,
4377 /* LS return values are inputs to the TCS main shader part. */
4378 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4379 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4380 for (i
= 0; i
< 2; i
++)
4381 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4383 /* TCS return values are inputs to the TCS epilog.
4385 * param_tcs_offchip_offset, param_tcs_factor_offset,
4386 * param_tcs_offchip_layout, and param_rw_buffers
4387 * should be passed to the epilog.
4389 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K
; i
++)
4390 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4391 for (i
= 0; i
< 11; i
++)
4392 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4396 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4397 /* Merged stages have 8 system SGPRs at the beginning. */
4398 ctx
->param_rw_buffers
= /* SPI_SHADER_USER_DATA_ADDR_LO_GS */
4399 add_arg(&fninfo
, ARG_SGPR
, si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
));
4400 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4401 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4402 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4403 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4404 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4405 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4407 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4408 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4410 ctx
->param_bindless_samplers_and_images
=
4411 add_arg(&fninfo
, ARG_SGPR
, si_const_array(ctx
->v8i32
, 0));
4413 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4414 (ctx
->type
== PIPE_SHADER_VERTEX
||
4415 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4416 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4417 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4419 /* TESS_EVAL (and also GEOMETRY):
4420 * Declare as many input SGPRs as the VS has. */
4421 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4422 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4423 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4424 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4425 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4426 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4429 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4430 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4432 /* VGPRs (first GS, then VS/TES) */
4433 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4434 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4435 ctx
->param_gs_prim_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4436 ctx
->param_gs_instance_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4437 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4439 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4440 declare_vs_input_vgprs(ctx
, &fninfo
,
4442 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4443 declare_tes_input_vgprs(ctx
, &fninfo
);
4446 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4447 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4448 /* ES return values are inputs to GS. */
4449 for (i
= 0; i
< 8 + GFX9_GS_NUM_USER_SGPR
; i
++)
4450 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4451 for (i
= 0; i
< 5; i
++)
4452 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4456 case PIPE_SHADER_TESS_EVAL
:
4457 declare_default_desc_pointers(ctx
, &fninfo
);
4458 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4459 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4461 if (shader
->key
.as_es
) {
4462 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4463 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4464 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4466 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4467 declare_streamout_params(ctx
, &shader
->selector
->so
,
4469 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4473 declare_tes_input_vgprs(ctx
, &fninfo
);
4476 case PIPE_SHADER_GEOMETRY
:
4477 declare_default_desc_pointers(ctx
, &fninfo
);
4478 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4479 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4482 ctx
->param_gs_vtx0_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4483 ctx
->param_gs_vtx1_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4484 ctx
->param_gs_prim_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4485 ctx
->param_gs_vtx2_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4486 ctx
->param_gs_vtx3_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4487 ctx
->param_gs_vtx4_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4488 ctx
->param_gs_vtx5_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4489 ctx
->param_gs_instance_id
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4492 case PIPE_SHADER_FRAGMENT
:
4493 declare_default_desc_pointers(ctx
, &fninfo
);
4494 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4495 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->i32
, SI_PARAM_PRIM_MASK
);
4497 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4498 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4499 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4500 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4501 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4502 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4503 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4504 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4505 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4506 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4507 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4508 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4509 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4510 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4511 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4512 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4513 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4514 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4515 shader
->info
.face_vgpr_index
= 20;
4516 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4517 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4518 shader
->info
.ancillary_vgpr_index
= 21;
4519 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4520 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4521 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4523 /* Color inputs from the prolog. */
4524 if (shader
->selector
->info
.colors_read
) {
4525 unsigned num_color_elements
=
4526 util_bitcount(shader
->selector
->info
.colors_read
);
4528 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4529 for (i
= 0; i
< num_color_elements
; i
++)
4530 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4532 num_prolog_vgprs
+= num_color_elements
;
4535 /* Outputs for the epilog. */
4536 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4539 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4540 shader
->selector
->info
.writes_z
+
4541 shader
->selector
->info
.writes_stencil
+
4542 shader
->selector
->info
.writes_samplemask
+
4543 1 /* SampleMaskIn */;
4545 num_returns
= MAX2(num_returns
,
4547 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4549 for (i
= 0; i
< num_return_sgprs
; i
++)
4550 returns
[i
] = ctx
->i32
;
4551 for (; i
< num_returns
; i
++)
4552 returns
[i
] = ctx
->f32
;
4555 case PIPE_SHADER_COMPUTE
:
4556 declare_default_desc_pointers(ctx
, &fninfo
);
4557 if (shader
->selector
->info
.uses_grid_size
)
4558 ctx
->param_grid_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4559 if (shader
->selector
->info
.uses_block_size
)
4560 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4562 for (i
= 0; i
< 3; i
++) {
4563 ctx
->param_block_id
[i
] = -1;
4564 if (shader
->selector
->info
.uses_block_id
[i
])
4565 ctx
->param_block_id
[i
] = add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4568 ctx
->param_thread_id
= add_arg(&fninfo
, ARG_VGPR
, v3i32
);
4571 assert(0 && "unimplemented shader");
4575 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4576 si_get_max_workgroup_size(shader
));
4578 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4579 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&&
4580 ctx
->separate_prolog
) {
4581 si_llvm_add_attribute(ctx
->main_fn
,
4582 "InitialPSInputAddr",
4583 S_0286D0_PERSP_SAMPLE_ENA(1) |
4584 S_0286D0_PERSP_CENTER_ENA(1) |
4585 S_0286D0_PERSP_CENTROID_ENA(1) |
4586 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4587 S_0286D0_LINEAR_CENTER_ENA(1) |
4588 S_0286D0_LINEAR_CENTROID_ENA(1) |
4589 S_0286D0_FRONT_FACE_ENA(1) |
4590 S_0286D0_ANCILLARY_ENA(1) |
4591 S_0286D0_POS_FIXED_PT_ENA(1));
4594 shader
->info
.num_input_sgprs
= 0;
4595 shader
->info
.num_input_vgprs
= 0;
4597 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
4598 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4600 for (; i
< fninfo
.num_params
; ++i
)
4601 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
4603 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4604 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4606 if (shader
->key
.as_ls
||
4607 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
4608 /* GFX9 has the ESGS ring buffer in LDS. */
4609 (ctx
->screen
->b
.chip_class
>= GFX9
&&
4610 (shader
->key
.as_es
||
4611 ctx
->type
== PIPE_SHADER_GEOMETRY
)))
4612 declare_lds_as_pointer(ctx
);
4616 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4619 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4621 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4623 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
4624 ctx
->param_rw_buffers
);
4626 if (ctx
->screen
->b
.chip_class
<= VI
&&
4627 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
4629 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
4631 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
4634 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4637 if (ctx
->shader
->is_gs_copy_shader
) {
4638 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4641 ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4642 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4643 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
4644 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
4645 LLVMValueRef base_ring
;
4647 base_ring
= ac_build_indexed_load_const(&ctx
->ac
, buf_ptr
, offset
);
4649 /* The conceptual layout of the GSVS ring is
4650 * v0c0 .. vLv0 v0c1 .. vLc1 ..
4651 * but the real memory layout is swizzled across
4653 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
4655 * Override the buffer descriptor accordingly.
4657 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
4658 uint64_t stream_offset
= 0;
4660 for (unsigned stream
= 0; stream
< 4; ++stream
) {
4661 unsigned num_components
;
4663 unsigned num_records
;
4664 LLVMValueRef ring
, tmp
;
4666 num_components
= sel
->info
.num_stream_output_components
[stream
];
4667 if (!num_components
)
4670 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
4672 /* Limit on the stride field for <= CIK. */
4673 assert(stride
< (1 << 14));
4677 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
4678 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
4679 tmp
= LLVMBuildAdd(builder
, tmp
,
4680 LLVMConstInt(ctx
->i64
,
4681 stream_offset
, 0), "");
4682 stream_offset
+= stride
* 64;
4684 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
4685 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
4686 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
4687 tmp
= LLVMBuildOr(builder
, tmp
,
4688 LLVMConstInt(ctx
->i32
,
4689 S_008F04_STRIDE(stride
) |
4690 S_008F04_SWIZZLE_ENABLE(1), 0), "");
4691 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
4692 ring
= LLVMBuildInsertElement(builder
, ring
,
4693 LLVMConstInt(ctx
->i32
, num_records
, 0),
4694 LLVMConstInt(ctx
->i32
, 2, 0), "");
4695 ring
= LLVMBuildInsertElement(builder
, ring
,
4696 LLVMConstInt(ctx
->i32
,
4697 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
4698 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
4699 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
4700 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
4701 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
4702 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
4703 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
4704 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
4705 S_008F0C_ADD_TID_ENABLE(1),
4707 LLVMConstInt(ctx
->i32
, 3, 0), "");
4709 ctx
->gsvs_ring
[stream
] = ring
;
4714 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
4715 LLVMValueRef param_rw_buffers
,
4716 unsigned param_pos_fixed_pt
)
4718 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4719 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
4721 /* Use the fixed-point gl_FragCoord input.
4722 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
4723 * per coordinate to get the repeating effect.
4725 address
[0] = unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
4726 address
[1] = unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
4728 /* Load the buffer descriptor. */
4729 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
4730 desc
= ac_build_indexed_load_const(&ctx
->ac
, param_rw_buffers
, slot
);
4732 /* The stipple pattern is 32x32, each row has 32 bits. */
4733 offset
= LLVMBuildMul(builder
, address
[1],
4734 LLVMConstInt(ctx
->i32
, 4, 0), "");
4735 row
= buffer_load_const(ctx
, desc
, offset
);
4736 row
= ac_to_integer(&ctx
->ac
, row
);
4737 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
4738 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
4740 /* The intrinsic kills the thread if arg < 0. */
4741 bit
= LLVMBuildSelect(builder
, bit
, LLVMConstReal(ctx
->f32
, 0),
4742 LLVMConstReal(ctx
->f32
, -1), "");
4743 ac_build_kill(&ctx
->ac
, bit
);
4746 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
4747 struct si_shader_config
*conf
,
4748 unsigned symbol_offset
)
4751 const unsigned char *config
=
4752 ac_shader_binary_config_start(binary
, symbol_offset
);
4753 bool really_needs_scratch
= false;
4755 /* LLVM adds SGPR spills to the scratch size.
4756 * Find out if we really need the scratch buffer.
4758 for (i
= 0; i
< binary
->reloc_count
; i
++) {
4759 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
4761 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
4762 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4763 really_needs_scratch
= true;
4768 /* XXX: We may be able to emit some of these values directly rather than
4769 * extracting fields to be emitted later.
4772 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
4773 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
4774 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
4776 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
4777 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
4778 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
4779 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
4780 case R_00B848_COMPUTE_PGM_RSRC1
:
4781 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
4782 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
4783 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
4784 conf
->rsrc1
= value
;
4786 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
4787 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
4789 case R_00B84C_COMPUTE_PGM_RSRC2
:
4790 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
4791 conf
->rsrc2
= value
;
4793 case R_0286CC_SPI_PS_INPUT_ENA
:
4794 conf
->spi_ps_input_ena
= value
;
4796 case R_0286D0_SPI_PS_INPUT_ADDR
:
4797 conf
->spi_ps_input_addr
= value
;
4799 case R_0286E8_SPI_TMPRING_SIZE
:
4800 case R_00B860_COMPUTE_TMPRING_SIZE
:
4801 /* WAVESIZE is in units of 256 dwords. */
4802 if (really_needs_scratch
)
4803 conf
->scratch_bytes_per_wave
=
4804 G_00B860_WAVESIZE(value
) * 256 * 4;
4806 case 0x4: /* SPILLED_SGPRS */
4807 conf
->spilled_sgprs
= value
;
4809 case 0x8: /* SPILLED_VGPRS */
4810 conf
->spilled_vgprs
= value
;
4814 static bool printed
;
4817 fprintf(stderr
, "Warning: LLVM emitted unknown "
4818 "config register: 0x%x\n", reg
);
4826 if (!conf
->spi_ps_input_addr
)
4827 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
4830 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
4831 uint64_t scratch_va
)
4834 uint32_t scratch_rsrc_dword0
= scratch_va
;
4835 uint32_t scratch_rsrc_dword1
=
4836 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
4838 /* Enable scratch coalescing. */
4839 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
4841 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
4842 const struct ac_shader_reloc
*reloc
=
4843 &shader
->binary
.relocs
[i
];
4844 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
4845 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
4846 &scratch_rsrc_dword0
, 4);
4847 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
4848 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
4849 &scratch_rsrc_dword1
, 4);
4854 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
4856 unsigned size
= shader
->binary
.code_size
;
4859 size
+= shader
->prolog
->binary
.code_size
;
4860 if (shader
->previous_stage
)
4861 size
+= shader
->previous_stage
->binary
.code_size
;
4862 if (shader
->prolog2
)
4863 size
+= shader
->prolog2
->binary
.code_size
;
4865 size
+= shader
->epilog
->binary
.code_size
;
4869 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
4871 const struct ac_shader_binary
*prolog
=
4872 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
4873 const struct ac_shader_binary
*previous_stage
=
4874 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
4875 const struct ac_shader_binary
*prolog2
=
4876 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
4877 const struct ac_shader_binary
*epilog
=
4878 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
4879 const struct ac_shader_binary
*mainb
= &shader
->binary
;
4880 unsigned bo_size
= si_get_shader_binary_size(shader
) +
4881 (!epilog
? mainb
->rodata_size
: 0);
4884 assert(!prolog
|| !prolog
->rodata_size
);
4885 assert(!previous_stage
|| !previous_stage
->rodata_size
);
4886 assert(!prolog2
|| !prolog2
->rodata_size
);
4887 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
4888 !mainb
->rodata_size
);
4889 assert(!epilog
|| !epilog
->rodata_size
);
4891 r600_resource_reference(&shader
->bo
, NULL
);
4892 shader
->bo
= (struct r600_resource
*)
4893 pipe_buffer_create(&sscreen
->b
.b
, 0,
4894 PIPE_USAGE_IMMUTABLE
,
4895 align(bo_size
, SI_CPDMA_ALIGNMENT
));
4900 ptr
= sscreen
->b
.ws
->buffer_map(shader
->bo
->buf
, NULL
,
4901 PIPE_TRANSFER_READ_WRITE
|
4902 PIPE_TRANSFER_UNSYNCHRONIZED
);
4904 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
4905 * endian-independent. */
4907 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
4908 ptr
+= prolog
->code_size
;
4910 if (previous_stage
) {
4911 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
4912 ptr
+= previous_stage
->code_size
;
4915 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
4916 ptr
+= prolog2
->code_size
;
4919 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
4920 ptr
+= mainb
->code_size
;
4923 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
4924 else if (mainb
->rodata_size
> 0)
4925 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
4927 sscreen
->b
.ws
->buffer_unmap(shader
->bo
->buf
);
4931 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
4932 struct pipe_debug_callback
*debug
,
4933 const char *name
, FILE *file
)
4938 if (binary
->disasm_string
) {
4939 fprintf(file
, "Shader %s disassembly:\n", name
);
4940 fprintf(file
, "%s", binary
->disasm_string
);
4942 if (debug
&& debug
->debug_message
) {
4943 /* Very long debug messages are cut off, so send the
4944 * disassembly one line at a time. This causes more
4945 * overhead, but on the plus side it simplifies
4946 * parsing of resulting logs.
4948 pipe_debug_message(debug
, SHADER_INFO
,
4949 "Shader Disassembly Begin");
4951 line
= binary
->disasm_string
;
4953 p
= util_strchrnul(line
, '\n');
4957 pipe_debug_message(debug
, SHADER_INFO
,
4958 "%.*s", count
, line
);
4966 pipe_debug_message(debug
, SHADER_INFO
,
4967 "Shader Disassembly End");
4970 fprintf(file
, "Shader %s binary:\n", name
);
4971 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
4972 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
4973 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
4974 binary
->code
[i
+ 1], binary
->code
[i
]);
4979 static void si_shader_dump_stats(struct si_screen
*sscreen
,
4980 const struct si_shader
*shader
,
4981 struct pipe_debug_callback
*debug
,
4984 bool check_debug_option
)
4986 const struct si_shader_config
*conf
= &shader
->config
;
4987 unsigned num_inputs
= shader
->selector
? shader
->selector
->info
.num_inputs
: 0;
4988 unsigned code_size
= si_get_shader_binary_size(shader
);
4989 unsigned lds_increment
= sscreen
->b
.chip_class
>= CIK
? 512 : 256;
4990 unsigned lds_per_wave
= 0;
4991 unsigned max_simd_waves
;
4993 switch (sscreen
->b
.family
) {
4994 /* These always have 8 waves: */
4995 case CHIP_POLARIS10
:
4996 case CHIP_POLARIS11
:
4997 case CHIP_POLARIS12
:
5001 max_simd_waves
= 10;
5004 /* Compute LDS usage for PS. */
5005 switch (processor
) {
5006 case PIPE_SHADER_FRAGMENT
:
5007 /* The minimum usage per wave is (num_inputs * 48). The maximum
5008 * usage is (num_inputs * 48 * 16).
5009 * We can get anything in between and it varies between waves.
5011 * The 48 bytes per input for a single primitive is equal to
5012 * 4 bytes/component * 4 components/input * 3 points.
5014 * Other stages don't know the size at compile time or don't
5015 * allocate LDS per wave, but instead they do it per thread group.
5017 lds_per_wave
= conf
->lds_size
* lds_increment
+
5018 align(num_inputs
* 48, lds_increment
);
5020 case PIPE_SHADER_COMPUTE
:
5021 if (shader
->selector
) {
5022 unsigned max_workgroup_size
=
5023 si_get_max_workgroup_size(shader
);
5024 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5025 DIV_ROUND_UP(max_workgroup_size
, 64);
5030 /* Compute the per-SIMD wave counts. */
5031 if (conf
->num_sgprs
) {
5032 if (sscreen
->b
.chip_class
>= VI
)
5033 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5035 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5038 if (conf
->num_vgprs
)
5039 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5041 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5042 * 16KB makes some SIMDs unoccupied). */
5044 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5046 if (!check_debug_option
||
5047 si_can_dump_shader(&sscreen
->b
, processor
)) {
5048 if (processor
== PIPE_SHADER_FRAGMENT
) {
5049 fprintf(file
, "*** SHADER CONFIG ***\n"
5050 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5051 "SPI_PS_INPUT_ENA = 0x%04x\n",
5052 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5055 fprintf(file
, "*** SHADER STATS ***\n"
5058 "Spilled SGPRs: %d\n"
5059 "Spilled VGPRs: %d\n"
5060 "Private memory VGPRs: %d\n"
5061 "Code Size: %d bytes\n"
5063 "Scratch: %d bytes per wave\n"
5065 "********************\n\n\n",
5066 conf
->num_sgprs
, conf
->num_vgprs
,
5067 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5068 conf
->private_mem_vgprs
, code_size
,
5069 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5073 pipe_debug_message(debug
, SHADER_INFO
,
5074 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5075 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5076 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5077 conf
->num_sgprs
, conf
->num_vgprs
, code_size
,
5078 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5079 max_simd_waves
, conf
->spilled_sgprs
,
5080 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5083 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5085 switch (processor
) {
5086 case PIPE_SHADER_VERTEX
:
5087 if (shader
->key
.as_es
)
5088 return "Vertex Shader as ES";
5089 else if (shader
->key
.as_ls
)
5090 return "Vertex Shader as LS";
5092 return "Vertex Shader as VS";
5093 case PIPE_SHADER_TESS_CTRL
:
5094 return "Tessellation Control Shader";
5095 case PIPE_SHADER_TESS_EVAL
:
5096 if (shader
->key
.as_es
)
5097 return "Tessellation Evaluation Shader as ES";
5099 return "Tessellation Evaluation Shader as VS";
5100 case PIPE_SHADER_GEOMETRY
:
5101 if (shader
->is_gs_copy_shader
)
5102 return "GS Copy Shader as VS";
5104 return "Geometry Shader";
5105 case PIPE_SHADER_FRAGMENT
:
5106 return "Pixel Shader";
5107 case PIPE_SHADER_COMPUTE
:
5108 return "Compute Shader";
5110 return "Unknown Shader";
5114 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5115 struct pipe_debug_callback
*debug
, unsigned processor
,
5116 FILE *file
, bool check_debug_option
)
5118 if (!check_debug_option
||
5119 si_can_dump_shader(&sscreen
->b
, processor
))
5120 si_dump_shader_key(processor
, shader
, file
);
5122 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5123 if (shader
->previous_stage
&&
5124 shader
->previous_stage
->binary
.llvm_ir_string
) {
5125 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5126 si_get_shader_name(shader
, processor
));
5127 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5130 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5131 si_get_shader_name(shader
, processor
));
5132 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5135 if (!check_debug_option
||
5136 (si_can_dump_shader(&sscreen
->b
, processor
) &&
5137 !(sscreen
->b
.debug_flags
& DBG_NO_ASM
))) {
5138 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5141 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5142 debug
, "prolog", file
);
5143 if (shader
->previous_stage
)
5144 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5145 debug
, "previous stage", file
);
5146 if (shader
->prolog2
)
5147 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5148 debug
, "prolog2", file
);
5150 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5153 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5154 debug
, "epilog", file
);
5155 fprintf(file
, "\n");
5158 si_shader_dump_stats(sscreen
, shader
, debug
, processor
, file
,
5159 check_debug_option
);
5162 static int si_compile_llvm(struct si_screen
*sscreen
,
5163 struct ac_shader_binary
*binary
,
5164 struct si_shader_config
*conf
,
5165 LLVMTargetMachineRef tm
,
5167 struct pipe_debug_callback
*debug
,
5172 unsigned count
= p_atomic_inc_return(&sscreen
->b
.num_compilations
);
5174 if (si_can_dump_shader(&sscreen
->b
, processor
)) {
5175 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5177 if (!(sscreen
->b
.debug_flags
& (DBG_NO_IR
| DBG_PREOPT_IR
))) {
5178 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5179 ac_dump_module(mod
);
5180 fprintf(stderr
, "\n");
5184 if (sscreen
->record_llvm_ir
) {
5185 char *ir
= LLVMPrintModuleToString(mod
);
5186 binary
->llvm_ir_string
= strdup(ir
);
5187 LLVMDisposeMessage(ir
);
5190 if (!si_replace_shader(count
, binary
)) {
5191 r
= si_llvm_compile(mod
, binary
, tm
, debug
);
5196 si_shader_binary_read_config(binary
, conf
, 0);
5198 /* Enable 64-bit and 16-bit denormals, because there is no performance
5201 * If denormals are enabled, all floating-point output modifiers are
5204 * Don't enable denormals for 32-bit floats, because:
5205 * - Floating-point output modifiers would be ignored by the hw.
5206 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5207 * have to stop using those.
5208 * - SI & CI would be very slow.
5210 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5212 FREE(binary
->config
);
5213 FREE(binary
->global_symbol_offsets
);
5214 binary
->config
= NULL
;
5215 binary
->global_symbol_offsets
= NULL
;
5217 /* Some shaders can't have rodata because their binaries can be
5220 if (binary
->rodata_size
&&
5221 (processor
== PIPE_SHADER_VERTEX
||
5222 processor
== PIPE_SHADER_TESS_CTRL
||
5223 processor
== PIPE_SHADER_TESS_EVAL
||
5224 processor
== PIPE_SHADER_FRAGMENT
)) {
5225 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5232 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5234 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5235 LLVMBuildRetVoid(ctx
->ac
.builder
);
5237 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5240 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5242 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5243 LLVMTargetMachineRef tm
,
5244 struct si_shader_selector
*gs_selector
,
5245 struct pipe_debug_callback
*debug
)
5247 struct si_shader_context ctx
;
5248 struct si_shader
*shader
;
5249 LLVMBuilderRef builder
;
5250 struct lp_build_tgsi_context
*bld_base
= &ctx
.bld_base
;
5251 struct lp_build_context
*uint
= &bld_base
->uint_bld
;
5252 struct si_shader_output_values
*outputs
;
5253 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5256 outputs
= MALLOC(gsinfo
->num_outputs
* sizeof(outputs
[0]));
5261 shader
= CALLOC_STRUCT(si_shader
);
5268 shader
->selector
= gs_selector
;
5269 shader
->is_gs_copy_shader
= true;
5271 si_init_shader_ctx(&ctx
, sscreen
, tm
);
5272 ctx
.shader
= shader
;
5273 ctx
.type
= PIPE_SHADER_VERTEX
;
5275 builder
= ctx
.ac
.builder
;
5277 create_function(&ctx
);
5278 preload_ring_buffers(&ctx
);
5280 LLVMValueRef voffset
=
5281 lp_build_mul_imm(uint
, ctx
.abi
.vertex_id
, 4);
5283 /* Fetch the vertex stream ID.*/
5284 LLVMValueRef stream_id
;
5286 if (gs_selector
->so
.num_outputs
)
5287 stream_id
= unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5289 stream_id
= ctx
.i32_0
;
5291 /* Fill in output information. */
5292 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5293 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5294 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5296 for (int chan
= 0; chan
< 4; chan
++) {
5297 outputs
[i
].vertex_stream
[chan
] =
5298 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5302 LLVMBasicBlockRef end_bb
;
5303 LLVMValueRef switch_inst
;
5305 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5306 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5308 for (int stream
= 0; stream
< 4; stream
++) {
5309 LLVMBasicBlockRef bb
;
5312 if (!gsinfo
->num_stream_output_components
[stream
])
5315 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5318 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5319 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5320 LLVMPositionBuilderAtEnd(builder
, bb
);
5322 /* Fetch vertex data from GSVS ring */
5324 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5325 for (unsigned chan
= 0; chan
< 4; chan
++) {
5326 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5327 outputs
[i
].vertex_stream
[chan
] != stream
) {
5328 outputs
[i
].values
[chan
] = ctx
.bld_base
.base
.undef
;
5332 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5333 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5336 outputs
[i
].values
[chan
] =
5337 ac_build_buffer_load(&ctx
.ac
,
5338 ctx
.gsvs_ring
[0], 1,
5345 /* Streamout and exports. */
5346 if (gs_selector
->so
.num_outputs
) {
5347 si_llvm_emit_streamout(&ctx
, outputs
,
5348 gsinfo
->num_outputs
,
5353 si_llvm_export_vs(bld_base
, outputs
, gsinfo
->num_outputs
);
5355 LLVMBuildBr(builder
, end_bb
);
5358 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5360 LLVMBuildRetVoid(ctx
.ac
.builder
);
5362 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5363 si_llvm_optimize_module(&ctx
);
5365 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5366 &ctx
.shader
->config
, ctx
.tm
,
5368 debug
, PIPE_SHADER_GEOMETRY
,
5371 if (si_can_dump_shader(&sscreen
->b
, PIPE_SHADER_GEOMETRY
))
5372 fprintf(stderr
, "GS Copy Shader:\n");
5373 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5374 PIPE_SHADER_GEOMETRY
, stderr
, true);
5375 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5378 si_llvm_dispose(&ctx
);
5389 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5390 const struct si_vs_prolog_bits
*prolog
,
5391 const char *prefix
, FILE *f
)
5393 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5394 prefix
, prolog
->instance_divisor_is_one
);
5395 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5396 prefix
, prolog
->instance_divisor_is_fetched
);
5397 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5398 prefix
, prolog
->ls_vgpr_fix
);
5400 fprintf(f
, " mono.vs.fix_fetch = {");
5401 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5402 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5406 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5409 const struct si_shader_key
*key
= &shader
->key
;
5411 fprintf(f
, "SHADER KEY\n");
5413 switch (processor
) {
5414 case PIPE_SHADER_VERTEX
:
5415 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5416 "part.vs.prolog", f
);
5417 fprintf(f
, " as_es = %u\n", key
->as_es
);
5418 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5419 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5420 key
->mono
.u
.vs_export_prim_id
);
5423 case PIPE_SHADER_TESS_CTRL
:
5424 if (shader
->selector
->screen
->b
.chip_class
>= GFX9
) {
5425 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5426 "part.tcs.ls_prolog", f
);
5428 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5429 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5432 case PIPE_SHADER_TESS_EVAL
:
5433 fprintf(f
, " as_es = %u\n", key
->as_es
);
5434 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5435 key
->mono
.u
.vs_export_prim_id
);
5438 case PIPE_SHADER_GEOMETRY
:
5439 if (shader
->is_gs_copy_shader
)
5442 if (shader
->selector
->screen
->b
.chip_class
>= GFX9
&&
5443 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5444 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5445 "part.gs.vs_prolog", f
);
5447 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5450 case PIPE_SHADER_COMPUTE
:
5453 case PIPE_SHADER_FRAGMENT
:
5454 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5455 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5456 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5457 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5458 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5459 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5460 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5461 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5462 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5463 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5464 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5465 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5466 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5467 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5468 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5469 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5470 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5477 if ((processor
== PIPE_SHADER_GEOMETRY
||
5478 processor
== PIPE_SHADER_TESS_EVAL
||
5479 processor
== PIPE_SHADER_VERTEX
) &&
5480 !key
->as_es
&& !key
->as_ls
) {
5481 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5482 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5486 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5487 struct si_screen
*sscreen
,
5488 LLVMTargetMachineRef tm
)
5490 struct lp_build_tgsi_context
*bld_base
;
5492 si_llvm_context_init(ctx
, sscreen
, tm
);
5494 bld_base
= &ctx
->bld_base
;
5495 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5497 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5498 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5499 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5501 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5503 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5505 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5506 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5507 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5508 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5510 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5511 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5512 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5513 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5514 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5515 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5516 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5517 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
5518 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5520 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_llvm_emit_vertex
;
5521 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_llvm_emit_primitive
;
5522 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5525 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5527 struct si_shader
*shader
= ctx
->shader
;
5528 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5530 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5531 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5532 shader
->key
.as_ls
||
5536 ac_optimize_vs_outputs(&ctx
->ac
,
5538 shader
->info
.vs_output_param_offset
,
5540 &shader
->info
.nr_param_exports
);
5543 static void si_count_scratch_private_memory(struct si_shader_context
*ctx
)
5545 ctx
->shader
->config
.private_mem_vgprs
= 0;
5547 /* Process all LLVM instructions. */
5548 LLVMBasicBlockRef bb
= LLVMGetFirstBasicBlock(ctx
->main_fn
);
5550 LLVMValueRef next
= LLVMGetFirstInstruction(bb
);
5553 LLVMValueRef inst
= next
;
5554 next
= LLVMGetNextInstruction(next
);
5556 if (LLVMGetInstructionOpcode(inst
) != LLVMAlloca
)
5559 LLVMTypeRef type
= LLVMGetElementType(LLVMTypeOf(inst
));
5560 /* No idea why LLVM aligns allocas to 4 elements. */
5561 unsigned alignment
= LLVMGetAlignment(inst
);
5562 unsigned dw_size
= align(ac_get_type_size(type
) / 4, alignment
);
5563 ctx
->shader
->config
.private_mem_vgprs
+= dw_size
;
5565 bb
= LLVMGetNextBasicBlock(bb
);
5569 static void si_init_exec_full_mask(struct si_shader_context
*ctx
)
5571 LLVMValueRef full_mask
= LLVMConstInt(ctx
->i64
, ~0ull, 0);
5572 lp_build_intrinsic(ctx
->ac
.builder
,
5573 "llvm.amdgcn.init.exec", ctx
->voidt
,
5574 &full_mask
, 1, LP_FUNC_ATTR_CONVERGENT
);
5577 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5578 unsigned param
, unsigned bitoffset
)
5580 LLVMValueRef args
[] = {
5581 LLVMGetParam(ctx
->main_fn
, param
),
5582 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5584 lp_build_intrinsic(ctx
->ac
.builder
,
5585 "llvm.amdgcn.init.exec.from.input",
5586 ctx
->voidt
, args
, 2, LP_FUNC_ATTR_CONVERGENT
);
5589 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5590 const struct si_vs_prolog_bits
*key
)
5592 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5594 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5597 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5600 struct si_shader
*shader
= ctx
->shader
;
5601 struct si_shader_selector
*sel
= shader
->selector
;
5602 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5604 // TODO clean all this up!
5605 switch (ctx
->type
) {
5606 case PIPE_SHADER_VERTEX
:
5607 ctx
->load_input
= declare_input_vs
;
5608 if (shader
->key
.as_ls
)
5609 bld_base
->emit_epilogue
= si_llvm_emit_ls_epilogue
;
5610 else if (shader
->key
.as_es
)
5611 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
5613 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5614 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5617 case PIPE_SHADER_TESS_CTRL
:
5618 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
5619 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
5620 bld_base
->emit_store
= store_output_tcs
;
5621 bld_base
->emit_epilogue
= si_llvm_emit_tcs_epilogue
;
5623 case PIPE_SHADER_TESS_EVAL
:
5624 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
5625 if (shader
->key
.as_es
)
5626 bld_base
->emit_epilogue
= si_llvm_emit_es_epilogue
;
5628 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
5629 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5632 case PIPE_SHADER_GEOMETRY
:
5633 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
5634 bld_base
->emit_epilogue
= si_llvm_emit_gs_epilogue
;
5636 case PIPE_SHADER_FRAGMENT
:
5637 ctx
->load_input
= declare_input_fs
;
5638 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
5639 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
5641 case PIPE_SHADER_COMPUTE
:
5644 assert(!"Unsupported shader type");
5648 ctx
->abi
.load_ubo
= load_ubo
;
5649 ctx
->abi
.load_ssbo
= load_ssbo
;
5651 create_function(ctx
);
5652 preload_ring_buffers(ctx
);
5654 /* For GFX9 merged shaders:
5655 * - Set EXEC for the first shader. If the prolog is present, set
5656 * EXEC there instead.
5657 * - Add a barrier before the second shader.
5658 * - In the second shader, reset EXEC to ~0 and wrap the main part in
5659 * an if-statement. This is required for correctness in geometry
5660 * shaders, to ensure that empty GS waves do not send GS_EMIT and
5663 * For monolithic merged shaders, the first shader is wrapped in an
5664 * if-block together with its prolog in si_build_wrapper_function.
5666 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
5667 if (!is_monolithic
&&
5668 sel
->info
.num_instructions
> 1 && /* not empty shader */
5669 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
5670 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
5671 (ctx
->type
== PIPE_SHADER_VERTEX
&&
5672 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
5673 si_init_exec_from_input(ctx
,
5674 ctx
->param_merged_wave_info
, 0);
5675 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5676 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5678 si_init_exec_full_mask(ctx
);
5680 /* The barrier must execute for all shaders in a
5683 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
5685 LLVMValueRef num_threads
= unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
5687 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
5688 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
5689 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
5693 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
5694 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
5695 for (unsigned i
= 0; i
< 6; i
++) {
5696 ctx
->invoc0_tess_factors
[i
] =
5697 lp_build_alloca_undef(&ctx
->gallivm
, ctx
->i32
, "");
5701 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5703 for (i
= 0; i
< 4; i
++) {
5704 ctx
->gs_next_vertex
[i
] =
5705 lp_build_alloca(&ctx
->gallivm
,
5710 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& sel
->info
.uses_kill
&&
5711 ctx
->screen
->b
.debug_flags
& DBG_FS_CORRECT_DERIVS_AFTER_KILL
) {
5712 /* This is initialized to 0.0 = not kill. */
5713 ctx
->postponed_kill
= lp_build_alloca(&ctx
->gallivm
, ctx
->f32
, "");
5717 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
5718 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
5722 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
5723 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
5728 si_llvm_build_ret(ctx
, ctx
->return_value
);
5733 * Compute the VS prolog key, which contains all the information needed to
5734 * build the VS prolog function, and set shader->info bits where needed.
5736 * \param info Shader info of the vertex shader.
5737 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
5738 * \param prolog_key Key of the VS prolog
5739 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
5740 * \param key Output shader part key.
5742 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
5743 unsigned num_input_sgprs
,
5744 const struct si_vs_prolog_bits
*prolog_key
,
5745 struct si_shader
*shader_out
,
5746 union si_shader_part_key
*key
)
5748 memset(key
, 0, sizeof(*key
));
5749 key
->vs_prolog
.states
= *prolog_key
;
5750 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
5751 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
5752 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
5754 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
5755 key
->vs_prolog
.as_ls
= 1;
5756 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
5757 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
5758 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
5761 /* Enable loading the InstanceID VGPR. */
5762 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
5764 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
5765 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
5766 shader_out
->info
.uses_instanceid
= true;
5770 * Compute the PS prolog key, which contains all the information needed to
5771 * build the PS prolog function, and set related bits in shader->config.
5773 static void si_get_ps_prolog_key(struct si_shader
*shader
,
5774 union si_shader_part_key
*key
,
5775 bool separate_prolog
)
5777 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5779 memset(key
, 0, sizeof(*key
));
5780 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
5781 key
->ps_prolog
.colors_read
= info
->colors_read
;
5782 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
5783 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
5784 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
5785 (key
->ps_prolog
.colors_read
||
5786 key
->ps_prolog
.states
.force_persp_sample_interp
||
5787 key
->ps_prolog
.states
.force_linear_sample_interp
||
5788 key
->ps_prolog
.states
.force_persp_center_interp
||
5789 key
->ps_prolog
.states
.force_linear_center_interp
||
5790 key
->ps_prolog
.states
.bc_optimize_for_persp
||
5791 key
->ps_prolog
.states
.bc_optimize_for_linear
);
5792 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
5794 if (info
->colors_read
) {
5795 unsigned *color
= shader
->selector
->color_attr_index
;
5797 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
5798 /* BCOLORs are stored after the last input. */
5799 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
5800 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
5801 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
5804 for (unsigned i
= 0; i
< 2; i
++) {
5805 unsigned interp
= info
->input_interpolate
[color
[i
]];
5806 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
5808 if (!(info
->colors_read
& (0xf << i
*4)))
5811 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
5813 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
5814 interp
== TGSI_INTERPOLATE_COLOR
)
5815 interp
= TGSI_INTERPOLATE_CONSTANT
;
5818 case TGSI_INTERPOLATE_CONSTANT
:
5819 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
5821 case TGSI_INTERPOLATE_PERSPECTIVE
:
5822 case TGSI_INTERPOLATE_COLOR
:
5823 /* Force the interpolation location for colors here. */
5824 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
5825 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
5826 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
5827 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5830 case TGSI_INTERPOLATE_LOC_SAMPLE
:
5831 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
5832 shader
->config
.spi_ps_input_ena
|=
5833 S_0286CC_PERSP_SAMPLE_ENA(1);
5835 case TGSI_INTERPOLATE_LOC_CENTER
:
5836 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
5837 shader
->config
.spi_ps_input_ena
|=
5838 S_0286CC_PERSP_CENTER_ENA(1);
5840 case TGSI_INTERPOLATE_LOC_CENTROID
:
5841 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
5842 shader
->config
.spi_ps_input_ena
|=
5843 S_0286CC_PERSP_CENTROID_ENA(1);
5849 case TGSI_INTERPOLATE_LINEAR
:
5850 /* Force the interpolation location for colors here. */
5851 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
5852 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
5853 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
5854 location
= TGSI_INTERPOLATE_LOC_CENTER
;
5856 /* The VGPR assignment for non-monolithic shaders
5857 * works because InitialPSInputAddr is set on the
5858 * main shader and PERSP_PULL_MODEL is never used.
5861 case TGSI_INTERPOLATE_LOC_SAMPLE
:
5862 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5863 separate_prolog
? 6 : 9;
5864 shader
->config
.spi_ps_input_ena
|=
5865 S_0286CC_LINEAR_SAMPLE_ENA(1);
5867 case TGSI_INTERPOLATE_LOC_CENTER
:
5868 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5869 separate_prolog
? 8 : 11;
5870 shader
->config
.spi_ps_input_ena
|=
5871 S_0286CC_LINEAR_CENTER_ENA(1);
5873 case TGSI_INTERPOLATE_LOC_CENTROID
:
5874 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
5875 separate_prolog
? 10 : 13;
5876 shader
->config
.spi_ps_input_ena
|=
5877 S_0286CC_LINEAR_CENTROID_ENA(1);
5891 * Check whether a PS prolog is required based on the key.
5893 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
5895 return key
->ps_prolog
.colors_read
||
5896 key
->ps_prolog
.states
.force_persp_sample_interp
||
5897 key
->ps_prolog
.states
.force_linear_sample_interp
||
5898 key
->ps_prolog
.states
.force_persp_center_interp
||
5899 key
->ps_prolog
.states
.force_linear_center_interp
||
5900 key
->ps_prolog
.states
.bc_optimize_for_persp
||
5901 key
->ps_prolog
.states
.bc_optimize_for_linear
||
5902 key
->ps_prolog
.states
.poly_stipple
||
5903 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
5907 * Compute the PS epilog key, which contains all the information needed to
5908 * build the PS epilog function.
5910 static void si_get_ps_epilog_key(struct si_shader
*shader
,
5911 union si_shader_part_key
*key
)
5913 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5914 memset(key
, 0, sizeof(*key
));
5915 key
->ps_epilog
.colors_written
= info
->colors_written
;
5916 key
->ps_epilog
.writes_z
= info
->writes_z
;
5917 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
5918 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
5919 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
5923 * Build the GS prolog function. Rotate the input vertices for triangle strips
5926 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
5927 union si_shader_part_key
*key
)
5929 unsigned num_sgprs
, num_vgprs
;
5930 struct si_function_info fninfo
;
5931 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5932 LLVMTypeRef returns
[48];
5933 LLVMValueRef func
, ret
;
5935 si_init_function_info(&fninfo
);
5937 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
5938 num_sgprs
= 8 + GFX9_GS_NUM_USER_SGPR
;
5939 num_vgprs
= 5; /* ES inputs are not needed by GS */
5941 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
5945 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
5946 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
5947 returns
[i
] = ctx
->i32
;
5950 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
5951 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
5952 returns
[num_sgprs
+ i
] = ctx
->f32
;
5955 /* Create the function. */
5956 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
5958 func
= ctx
->main_fn
;
5960 /* Set the full EXEC mask for the prolog, because we are only fiddling
5961 * with registers here. The main shader part will set the correct EXEC
5964 if (ctx
->screen
->b
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
5965 si_init_exec_full_mask(ctx
);
5967 /* Copy inputs to outputs. This should be no-op, as the registers match,
5968 * but it will prevent the compiler from overwriting them unintentionally.
5970 ret
= ctx
->return_value
;
5971 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
5972 LLVMValueRef p
= LLVMGetParam(func
, i
);
5973 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
5975 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
5976 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
5977 p
= ac_to_float(&ctx
->ac
, p
);
5978 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
5981 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
5982 /* Remap the input vertices for every other primitive. */
5983 const unsigned gfx6_vtx_params
[6] = {
5991 const unsigned gfx9_vtx_params
[3] = {
5996 LLVMValueRef vtx_in
[6], vtx_out
[6];
5997 LLVMValueRef prim_id
, rotate
;
5999 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
6000 for (unsigned i
= 0; i
< 3; i
++) {
6001 vtx_in
[i
*2] = unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6002 vtx_in
[i
*2+1] = unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6005 for (unsigned i
= 0; i
< 6; i
++)
6006 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6009 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6010 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6012 for (unsigned i
= 0; i
< 6; ++i
) {
6013 LLVMValueRef base
, rotated
;
6015 rotated
= vtx_in
[(i
+ 4) % 6];
6016 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6019 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
6020 for (unsigned i
= 0; i
< 3; i
++) {
6021 LLVMValueRef hi
, out
;
6023 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6024 LLVMConstInt(ctx
->i32
, 16, 0), "");
6025 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6026 out
= ac_to_float(&ctx
->ac
, out
);
6027 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6028 gfx9_vtx_params
[i
], "");
6031 for (unsigned i
= 0; i
< 6; i
++) {
6034 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6035 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6036 gfx6_vtx_params
[i
], "");
6041 LLVMBuildRet(builder
, ret
);
6045 * Given a list of shader part functions, build a wrapper function that
6046 * runs them in sequence to form a monolithic shader.
6048 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6049 LLVMValueRef
*parts
,
6052 unsigned next_shader_first_part
)
6054 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6055 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6056 /* PS epilog has one arg per color component; gfx9 merged shader
6057 * prologs need to forward 32 user SGPRs.
6059 struct si_function_info fninfo
;
6060 LLVMValueRef initial
[64], out
[64];
6061 LLVMTypeRef function_type
;
6062 unsigned num_first_params
;
6063 unsigned num_out
, initial_num_out
;
6064 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6065 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6066 unsigned num_sgprs
, num_vgprs
;
6068 struct lp_build_if_state if_state
;
6070 si_init_function_info(&fninfo
);
6072 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6073 lp_add_function_attr(parts
[i
], -1, LP_FUNC_ATTR_ALWAYSINLINE
);
6074 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6077 /* The parameters of the wrapper function correspond to those of the
6078 * first part in terms of SGPRs and VGPRs, but we use the types of the
6079 * main part to get the right types. This is relevant for the
6080 * dereferenceable attribute on descriptor table pointers.
6085 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6086 num_first_params
= LLVMCountParamTypes(function_type
);
6088 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6089 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6091 if (ac_is_sgpr_param(param
)) {
6092 assert(num_vgprs
== 0);
6093 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6095 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6100 while (gprs
< num_sgprs
+ num_vgprs
) {
6101 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6102 LLVMTypeRef type
= LLVMTypeOf(param
);
6103 unsigned size
= ac_get_type_size(type
) / 4;
6105 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6107 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6108 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6109 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6114 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6115 si_get_max_workgroup_size(ctx
->shader
));
6117 if (is_merged_shader(ctx
->shader
))
6118 si_init_exec_full_mask(ctx
);
6120 /* Record the arguments of the function as if they were an output of
6126 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6127 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6128 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6129 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6130 unsigned size
= ac_get_type_size(param_type
) / 4;
6133 if (param_type
!= out_type
)
6134 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6135 out
[num_out
++] = param
;
6137 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6139 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6140 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6141 param_type
= ctx
->i64
;
6144 if (param_type
!= vector_type
)
6145 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6147 for (unsigned j
= 0; j
< size
; ++j
)
6148 out
[num_out
++] = LLVMBuildExtractElement(
6149 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6152 if (i
< fninfo
.num_sgpr_params
)
6153 num_out_sgpr
= num_out
;
6156 memcpy(initial
, out
, sizeof(out
));
6157 initial_num_out
= num_out
;
6158 initial_num_out_sgpr
= num_out_sgpr
;
6160 /* Now chain the parts. */
6161 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6162 LLVMValueRef in
[48];
6164 LLVMTypeRef ret_type
;
6165 unsigned out_idx
= 0;
6166 unsigned num_params
= LLVMCountParams(parts
[part
]);
6168 /* Merged shaders are executed conditionally depending
6169 * on the number of enabled threads passed in the input SGPRs. */
6170 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6171 LLVMValueRef ena
, count
= initial
[3];
6173 count
= LLVMBuildAnd(builder
, count
,
6174 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6175 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6176 ac_get_thread_id(&ctx
->ac
), count
, "");
6177 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6180 /* Derive arguments for the next part from outputs of the
6183 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6185 LLVMTypeRef param_type
;
6187 unsigned param_size
;
6188 LLVMValueRef arg
= NULL
;
6190 param
= LLVMGetParam(parts
[part
], param_idx
);
6191 param_type
= LLVMTypeOf(param
);
6192 param_size
= ac_get_type_size(param_type
) / 4;
6193 is_sgpr
= ac_is_sgpr_param(param
);
6196 #if HAVE_LLVM < 0x0400
6197 LLVMRemoveAttribute(param
, LLVMByValAttribute
);
6199 unsigned kind_id
= LLVMGetEnumAttributeKindForName("byval", 5);
6200 LLVMRemoveEnumAttributeAtIndex(parts
[part
], param_idx
+ 1, kind_id
);
6202 lp_add_function_attr(parts
[part
], param_idx
+ 1, LP_FUNC_ATTR_INREG
);
6205 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6206 assert(is_sgpr
|| out_idx
>= num_out_sgpr
);
6208 if (param_size
== 1)
6211 arg
= lp_build_gather_values(gallivm
, &out
[out_idx
], param_size
);
6213 if (LLVMTypeOf(arg
) != param_type
) {
6214 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6215 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6216 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6218 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6222 in
[param_idx
] = arg
;
6223 out_idx
+= param_size
;
6226 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6228 if (is_merged_shader(ctx
->shader
) &&
6229 part
+ 1 == next_shader_first_part
) {
6230 lp_build_endif(&if_state
);
6232 /* The second half of the merged shader should use
6233 * the inputs from the toplevel (wrapper) function,
6234 * not the return value from the last call.
6236 * That's because the last call was executed condi-
6237 * tionally, so we can't consume it in the main
6240 memcpy(out
, initial
, sizeof(initial
));
6241 num_out
= initial_num_out
;
6242 num_out_sgpr
= initial_num_out_sgpr
;
6246 /* Extract the returned GPRs. */
6247 ret_type
= LLVMTypeOf(ret
);
6251 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6252 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6254 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6256 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6258 LLVMBuildExtractValue(builder
, ret
, i
, "");
6260 assert(num_out
< ARRAY_SIZE(out
));
6261 out
[num_out
++] = val
;
6263 if (LLVMTypeOf(val
) == ctx
->i32
) {
6264 assert(num_out_sgpr
+ 1 == num_out
);
6265 num_out_sgpr
= num_out
;
6271 LLVMBuildRetVoid(builder
);
6274 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6275 LLVMTargetMachineRef tm
,
6276 struct si_shader
*shader
,
6278 struct pipe_debug_callback
*debug
)
6280 struct si_shader_selector
*sel
= shader
->selector
;
6281 struct si_shader_context ctx
;
6284 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6285 * conversion fails. */
6286 if (si_can_dump_shader(&sscreen
->b
, sel
->info
.processor
) &&
6287 !(sscreen
->b
.debug_flags
& DBG_NO_TGSI
)) {
6289 tgsi_dump(sel
->tokens
, 0);
6291 nir_print_shader(sel
->nir
, stderr
);
6292 si_dump_streamout(&sel
->so
);
6295 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6296 si_llvm_context_set_tgsi(&ctx
, shader
);
6297 ctx
.separate_prolog
= !is_monolithic
;
6299 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6300 sizeof(shader
->info
.vs_output_param_offset
));
6302 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6304 if (!si_compile_tgsi_main(&ctx
, is_monolithic
)) {
6305 si_llvm_dispose(&ctx
);
6309 if (is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6310 LLVMValueRef parts
[2];
6311 bool need_prolog
= sel
->vs_needs_prolog
;
6313 parts
[1] = ctx
.main_fn
;
6316 union si_shader_part_key prolog_key
;
6317 si_get_vs_prolog_key(&sel
->info
,
6318 shader
->info
.num_input_sgprs
,
6319 &shader
->key
.part
.vs
.prolog
,
6320 shader
, &prolog_key
);
6321 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6322 parts
[0] = ctx
.main_fn
;
6325 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6326 1 + need_prolog
, need_prolog
, 0);
6327 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6328 if (sscreen
->b
.chip_class
>= GFX9
) {
6329 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6330 LLVMValueRef parts
[4];
6331 bool vs_needs_prolog
=
6332 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6335 parts
[2] = ctx
.main_fn
;
6338 union si_shader_part_key tcs_epilog_key
;
6339 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6340 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6341 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6342 parts
[3] = ctx
.main_fn
;
6345 if (vs_needs_prolog
) {
6346 union si_shader_part_key vs_prolog_key
;
6347 si_get_vs_prolog_key(&ls
->info
,
6348 shader
->info
.num_input_sgprs
,
6349 &shader
->key
.part
.tcs
.ls_prolog
,
6350 shader
, &vs_prolog_key
);
6351 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6352 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6353 parts
[0] = ctx
.main_fn
;
6356 /* VS as LS main part */
6357 struct si_shader shader_ls
= {};
6358 shader_ls
.selector
= ls
;
6359 shader_ls
.key
.as_ls
= 1;
6360 shader_ls
.key
.mono
= shader
->key
.mono
;
6361 shader_ls
.key
.opt
= shader
->key
.opt
;
6362 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6364 if (!si_compile_tgsi_main(&ctx
, true)) {
6365 si_llvm_dispose(&ctx
);
6368 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6369 parts
[1] = ctx
.main_fn
;
6371 /* Reset the shader context. */
6372 ctx
.shader
= shader
;
6373 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6375 si_build_wrapper_function(&ctx
,
6376 parts
+ !vs_needs_prolog
,
6377 4 - !vs_needs_prolog
, 0,
6378 vs_needs_prolog
? 2 : 1);
6380 LLVMValueRef parts
[2];
6381 union si_shader_part_key epilog_key
;
6383 parts
[0] = ctx
.main_fn
;
6385 memset(&epilog_key
, 0, sizeof(epilog_key
));
6386 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6387 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6388 parts
[1] = ctx
.main_fn
;
6390 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6392 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6393 if (ctx
.screen
->b
.chip_class
>= GFX9
) {
6394 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6395 LLVMValueRef es_prolog
= NULL
;
6396 LLVMValueRef es_main
= NULL
;
6397 LLVMValueRef gs_prolog
= NULL
;
6398 LLVMValueRef gs_main
= ctx
.main_fn
;
6401 union si_shader_part_key gs_prolog_key
;
6402 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6403 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6404 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6405 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6406 gs_prolog
= ctx
.main_fn
;
6409 if (es
->vs_needs_prolog
) {
6410 union si_shader_part_key vs_prolog_key
;
6411 si_get_vs_prolog_key(&es
->info
,
6412 shader
->info
.num_input_sgprs
,
6413 &shader
->key
.part
.tcs
.ls_prolog
,
6414 shader
, &vs_prolog_key
);
6415 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6416 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6417 es_prolog
= ctx
.main_fn
;
6421 struct si_shader shader_es
= {};
6422 shader_es
.selector
= es
;
6423 shader_es
.key
.as_es
= 1;
6424 shader_es
.key
.mono
= shader
->key
.mono
;
6425 shader_es
.key
.opt
= shader
->key
.opt
;
6426 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6428 if (!si_compile_tgsi_main(&ctx
, true)) {
6429 si_llvm_dispose(&ctx
);
6432 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6433 es_main
= ctx
.main_fn
;
6435 /* Reset the shader context. */
6436 ctx
.shader
= shader
;
6437 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6439 /* Prepare the array of shader parts. */
6440 LLVMValueRef parts
[4];
6441 unsigned num_parts
= 0, main_part
, next_first_part
;
6444 parts
[num_parts
++] = es_prolog
;
6446 parts
[main_part
= num_parts
++] = es_main
;
6447 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6448 parts
[num_parts
++] = gs_main
;
6450 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6451 main_part
, next_first_part
);
6453 LLVMValueRef parts
[2];
6454 union si_shader_part_key prolog_key
;
6456 parts
[1] = ctx
.main_fn
;
6458 memset(&prolog_key
, 0, sizeof(prolog_key
));
6459 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6460 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6461 parts
[0] = ctx
.main_fn
;
6463 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6465 } else if (is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6466 LLVMValueRef parts
[3];
6467 union si_shader_part_key prolog_key
;
6468 union si_shader_part_key epilog_key
;
6471 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6472 need_prolog
= si_need_ps_prolog(&prolog_key
);
6474 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6477 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6478 parts
[0] = ctx
.main_fn
;
6481 si_get_ps_epilog_key(shader
, &epilog_key
);
6482 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6483 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6485 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6486 need_prolog
? 1 : 0, 0);
6489 si_llvm_optimize_module(&ctx
);
6491 /* Post-optimization transformations and analysis. */
6492 si_optimize_vs_outputs(&ctx
);
6494 if ((debug
&& debug
->debug_message
) ||
6495 si_can_dump_shader(&sscreen
->b
, ctx
.type
))
6496 si_count_scratch_private_memory(&ctx
);
6498 /* Compile to bytecode. */
6499 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, tm
,
6500 ctx
.gallivm
.module
, debug
, ctx
.type
, "TGSI shader");
6501 si_llvm_dispose(&ctx
);
6503 fprintf(stderr
, "LLVM failed to compile shader\n");
6507 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
6508 * LLVM 3.9svn has this bug.
6510 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
6511 unsigned wave_size
= 64;
6512 unsigned max_vgprs
= 256;
6513 unsigned max_sgprs
= sscreen
->b
.chip_class
>= VI
? 800 : 512;
6514 unsigned max_sgprs_per_wave
= 128;
6515 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
6516 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
6517 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
6519 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
6520 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
6522 if (shader
->config
.num_sgprs
> max_sgprs
||
6523 shader
->config
.num_vgprs
> max_vgprs
) {
6524 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
6525 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
6526 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
6527 max_sgprs
, max_vgprs
);
6529 /* Just terminate the process, because dependent
6530 * shaders can hang due to bad input data, but use
6531 * the env var to allow shader-db to work.
6533 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
6538 /* Add the scratch offset to input SGPRs. */
6539 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
6540 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
6542 /* Calculate the number of fragment input VGPRs. */
6543 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6544 shader
->info
.num_input_vgprs
= 0;
6545 shader
->info
.face_vgpr_index
= -1;
6546 shader
->info
.ancillary_vgpr_index
= -1;
6548 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6549 shader
->info
.num_input_vgprs
+= 2;
6550 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6551 shader
->info
.num_input_vgprs
+= 2;
6552 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6553 shader
->info
.num_input_vgprs
+= 2;
6554 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
6555 shader
->info
.num_input_vgprs
+= 3;
6556 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
6557 shader
->info
.num_input_vgprs
+= 2;
6558 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
6559 shader
->info
.num_input_vgprs
+= 2;
6560 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
6561 shader
->info
.num_input_vgprs
+= 2;
6562 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
6563 shader
->info
.num_input_vgprs
+= 1;
6564 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6565 shader
->info
.num_input_vgprs
+= 1;
6566 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6567 shader
->info
.num_input_vgprs
+= 1;
6568 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6569 shader
->info
.num_input_vgprs
+= 1;
6570 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
6571 shader
->info
.num_input_vgprs
+= 1;
6572 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
6573 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
6574 shader
->info
.num_input_vgprs
+= 1;
6576 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
6577 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
6578 shader
->info
.num_input_vgprs
+= 1;
6580 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
6581 shader
->info
.num_input_vgprs
+= 1;
6582 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
6583 shader
->info
.num_input_vgprs
+= 1;
6590 * Create, compile and return a shader part (prolog or epilog).
6592 * \param sscreen screen
6593 * \param list list of shader parts of the same category
6594 * \param type shader type
6595 * \param key shader part key
6596 * \param prolog whether the part being requested is a prolog
6597 * \param tm LLVM target machine
6598 * \param debug debug callback
6599 * \param build the callback responsible for building the main function
6600 * \return non-NULL on success
6602 static struct si_shader_part
*
6603 si_get_shader_part(struct si_screen
*sscreen
,
6604 struct si_shader_part
**list
,
6605 enum pipe_shader_type type
,
6607 union si_shader_part_key
*key
,
6608 LLVMTargetMachineRef tm
,
6609 struct pipe_debug_callback
*debug
,
6610 void (*build
)(struct si_shader_context
*,
6611 union si_shader_part_key
*),
6614 struct si_shader_part
*result
;
6616 mtx_lock(&sscreen
->shader_parts_mutex
);
6618 /* Find existing. */
6619 for (result
= *list
; result
; result
= result
->next
) {
6620 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
6621 mtx_unlock(&sscreen
->shader_parts_mutex
);
6626 /* Compile a new one. */
6627 result
= CALLOC_STRUCT(si_shader_part
);
6630 struct si_shader shader
= {};
6631 struct si_shader_context ctx
;
6632 struct gallivm_state
*gallivm
= &ctx
.gallivm
;
6634 si_init_shader_ctx(&ctx
, sscreen
, tm
);
6635 ctx
.shader
= &shader
;
6639 case PIPE_SHADER_VERTEX
:
6641 case PIPE_SHADER_TESS_CTRL
:
6643 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
6645 case PIPE_SHADER_GEOMETRY
:
6648 case PIPE_SHADER_FRAGMENT
:
6650 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
6652 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
6655 unreachable("bad shader part");
6661 si_llvm_optimize_module(&ctx
);
6663 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, tm
,
6664 gallivm
->module
, debug
, ctx
.type
, name
)) {
6670 result
->next
= *list
;
6674 si_llvm_dispose(&ctx
);
6675 mtx_unlock(&sscreen
->shader_parts_mutex
);
6679 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
6681 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
6682 LLVMValueRef ptr
[2], list
;
6684 /* Get the pointer to rw buffers. */
6685 ptr
[0] = LLVMGetParam(ctx
->main_fn
, SI_SGPR_RW_BUFFERS
);
6686 ptr
[1] = LLVMGetParam(ctx
->main_fn
, SI_SGPR_RW_BUFFERS_HI
);
6687 list
= lp_build_gather_values(gallivm
, ptr
, 2);
6688 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
6689 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
6690 si_const_array(ctx
->v4i32
, SI_NUM_RW_BUFFERS
), "");
6695 * Build the vertex shader prolog function.
6697 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
6698 * All inputs are returned unmodified. The vertex load indices are
6699 * stored after them, which will be used by the API VS for fetching inputs.
6701 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
6706 * (VertexID + BaseVertex),
6707 * (InstanceID + StartInstance),
6708 * (InstanceID / 2 + StartInstance)
6710 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
6711 union si_shader_part_key
*key
)
6713 struct si_function_info fninfo
;
6714 LLVMTypeRef
*returns
;
6715 LLVMValueRef ret
, func
;
6717 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
6718 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
6719 LLVMValueRef input_vgprs
[9];
6720 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
6722 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
6724 si_init_function_info(&fninfo
);
6726 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
6727 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
6728 sizeof(LLVMTypeRef
));
6731 /* Declare input and output SGPRs. */
6732 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6733 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6734 returns
[num_returns
++] = ctx
->i32
;
6737 /* Preloaded VGPRs (outputs must be floats) */
6738 for (i
= 0; i
< num_input_vgprs
; i
++) {
6739 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
6740 returns
[num_returns
++] = ctx
->f32
;
6743 /* Vertex load indices. */
6744 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
6745 returns
[num_returns
++] = ctx
->f32
;
6747 /* Create the function. */
6748 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
6749 func
= ctx
->main_fn
;
6751 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
6752 if (!key
->vs_prolog
.is_monolithic
)
6753 si_init_exec_from_input(ctx
, 3, 0);
6755 if (key
->vs_prolog
.as_ls
&&
6756 (ctx
->screen
->b
.family
== CHIP_VEGA10
||
6757 ctx
->screen
->b
.family
== CHIP_RAVEN
)) {
6758 /* If there are no HS threads, SPI loads the LS VGPRs
6759 * starting at VGPR 0. Shift them back to where they
6762 LLVMValueRef has_hs_threads
=
6763 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
6764 unpack_param(ctx
, 3, 8, 8),
6767 for (i
= 4; i
> 0; --i
) {
6768 input_vgprs
[i
+ 1] =
6769 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
6771 input_vgprs
[i
- 1], "");
6776 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
6777 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
6779 /* Copy inputs to outputs. This should be no-op, as the registers match,
6780 * but it will prevent the compiler from overwriting them unintentionally.
6782 ret
= ctx
->return_value
;
6783 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
6784 LLVMValueRef p
= LLVMGetParam(func
, i
);
6785 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
6787 for (i
= 0; i
< num_input_vgprs
; i
++) {
6788 LLVMValueRef p
= input_vgprs
[i
];
6789 p
= ac_to_float(&ctx
->ac
, p
);
6790 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
6791 key
->vs_prolog
.num_input_sgprs
+ i
, "");
6794 /* Compute vertex load indices from instance divisors. */
6795 LLVMValueRef instance_divisor_constbuf
= NULL
;
6797 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
6798 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
6799 LLVMValueRef buf_index
=
6800 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
6801 instance_divisor_constbuf
=
6802 ac_build_indexed_load_const(&ctx
->ac
, list
, buf_index
);
6805 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
6806 bool divisor_is_one
=
6807 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
6808 bool divisor_is_fetched
=
6809 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
6812 if (divisor_is_one
|| divisor_is_fetched
) {
6813 LLVMValueRef divisor
= ctx
->i32_1
;
6815 if (divisor_is_fetched
) {
6816 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
6817 LLVMConstInt(ctx
->i32
, i
* 4, 0));
6818 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
6821 /* InstanceID / Divisor + StartInstance */
6822 index
= get_instance_index_for_fetch(ctx
,
6824 SI_SGPR_START_INSTANCE
,
6827 /* VertexID + BaseVertex */
6828 index
= LLVMBuildAdd(ctx
->ac
.builder
,
6830 LLVMGetParam(func
, user_sgpr_base
+
6831 SI_SGPR_BASE_VERTEX
), "");
6834 index
= ac_to_float(&ctx
->ac
, index
);
6835 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
6836 fninfo
.num_params
+ i
, "");
6839 si_llvm_build_ret(ctx
, ret
);
6842 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
6843 LLVMTargetMachineRef tm
,
6844 struct si_shader
*shader
,
6845 struct pipe_debug_callback
*debug
,
6846 struct si_shader
*main_part
,
6847 const struct si_vs_prolog_bits
*key
)
6849 struct si_shader_selector
*vs
= main_part
->selector
;
6851 if (!si_vs_needs_prolog(vs
, key
))
6854 /* Get the prolog. */
6855 union si_shader_part_key prolog_key
;
6856 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
6857 key
, shader
, &prolog_key
);
6860 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
6861 PIPE_SHADER_VERTEX
, true, &prolog_key
, tm
,
6862 debug
, si_build_vs_prolog_function
,
6863 "Vertex Shader Prolog");
6864 return shader
->prolog
!= NULL
;
6868 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
6870 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
6871 LLVMTargetMachineRef tm
,
6872 struct si_shader
*shader
,
6873 struct pipe_debug_callback
*debug
)
6875 return si_get_vs_prolog(sscreen
, tm
, shader
, debug
, shader
,
6876 &shader
->key
.part
.vs
.prolog
);
6880 * Compile the TCS epilog function. This writes tesselation factors to memory
6881 * based on the output primitive type of the tesselator (determined by TES).
6883 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
6884 union si_shader_part_key
*key
)
6886 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6887 struct si_function_info fninfo
;
6890 si_init_function_info(&fninfo
);
6892 if (ctx
->screen
->b
.chip_class
>= GFX9
) {
6893 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6894 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6895 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
6896 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6897 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6898 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6899 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6900 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6901 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6902 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6903 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6904 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6905 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6906 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6907 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6908 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6909 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6910 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6911 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6912 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6913 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6915 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6916 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6917 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6918 add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
6919 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6920 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6921 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6922 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6923 ctx
->param_tcs_offchip_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6924 ctx
->param_tcs_factor_addr_base64k
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6925 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6926 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6929 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
6930 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
6931 unsigned tess_factors_idx
=
6932 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
6933 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
6934 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
6936 for (unsigned i
= 0; i
< 6; i
++)
6937 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
6939 /* Create the function. */
6940 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
6941 ctx
->screen
->b
.chip_class
>= CIK
? 128 : 64);
6942 declare_lds_as_pointer(ctx
);
6943 func
= ctx
->main_fn
;
6945 LLVMValueRef invoc0_tess_factors
[6];
6946 for (unsigned i
= 0; i
< 6; i
++)
6947 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
6949 si_write_tess_factors(bld_base
,
6950 LLVMGetParam(func
, tess_factors_idx
),
6951 LLVMGetParam(func
, tess_factors_idx
+ 1),
6952 LLVMGetParam(func
, tess_factors_idx
+ 2),
6953 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
6955 LLVMBuildRetVoid(ctx
->ac
.builder
);
6959 * Select and compile (or reuse) TCS parts (epilog).
6961 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
6962 LLVMTargetMachineRef tm
,
6963 struct si_shader
*shader
,
6964 struct pipe_debug_callback
*debug
)
6966 if (sscreen
->b
.chip_class
>= GFX9
) {
6967 struct si_shader
*ls_main_part
=
6968 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
6970 if (!si_get_vs_prolog(sscreen
, tm
, shader
, debug
, ls_main_part
,
6971 &shader
->key
.part
.tcs
.ls_prolog
))
6974 shader
->previous_stage
= ls_main_part
;
6977 /* Get the epilog. */
6978 union si_shader_part_key epilog_key
;
6979 memset(&epilog_key
, 0, sizeof(epilog_key
));
6980 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6982 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
6983 PIPE_SHADER_TESS_CTRL
, false,
6984 &epilog_key
, tm
, debug
,
6985 si_build_tcs_epilog_function
,
6986 "Tessellation Control Shader Epilog");
6987 return shader
->epilog
!= NULL
;
6991 * Select and compile (or reuse) GS parts (prolog).
6993 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
6994 LLVMTargetMachineRef tm
,
6995 struct si_shader
*shader
,
6996 struct pipe_debug_callback
*debug
)
6998 if (sscreen
->b
.chip_class
>= GFX9
) {
6999 struct si_shader
*es_main_part
=
7000 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7002 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7003 !si_get_vs_prolog(sscreen
, tm
, shader
, debug
, es_main_part
,
7004 &shader
->key
.part
.gs
.vs_prolog
))
7007 shader
->previous_stage
= es_main_part
;
7010 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7013 union si_shader_part_key prolog_key
;
7014 memset(&prolog_key
, 0, sizeof(prolog_key
));
7015 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7017 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7018 PIPE_SHADER_GEOMETRY
, true,
7019 &prolog_key
, tm
, debug
,
7020 si_build_gs_prolog_function
,
7021 "Geometry Shader Prolog");
7022 return shader
->prolog2
!= NULL
;
7026 * Build the pixel shader prolog function. This handles:
7027 * - two-side color selection and interpolation
7028 * - overriding interpolation parameters for the API PS
7029 * - polygon stippling
7031 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7032 * overriden by other states. (e.g. per-sample interpolation)
7033 * Interpolated colors are stored after the preloaded VGPRs.
7035 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7036 union si_shader_part_key
*key
)
7038 struct gallivm_state
*gallivm
= &ctx
->gallivm
;
7039 struct si_function_info fninfo
;
7040 LLVMValueRef ret
, func
;
7041 int num_returns
, i
, num_color_channels
;
7043 assert(si_need_ps_prolog(key
));
7045 si_init_function_info(&fninfo
);
7047 /* Declare inputs. */
7048 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7049 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7051 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7052 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7054 /* Declare outputs (same as inputs + add colors if needed) */
7055 num_returns
= fninfo
.num_params
;
7056 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7057 for (i
= 0; i
< num_color_channels
; i
++)
7058 fninfo
.types
[num_returns
++] = ctx
->f32
;
7060 /* Create the function. */
7061 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7063 func
= ctx
->main_fn
;
7065 /* Copy inputs to outputs. This should be no-op, as the registers match,
7066 * but it will prevent the compiler from overwriting them unintentionally.
7068 ret
= ctx
->return_value
;
7069 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7070 LLVMValueRef p
= LLVMGetParam(func
, i
);
7071 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7074 /* Polygon stippling. */
7075 if (key
->ps_prolog
.states
.poly_stipple
) {
7076 /* POS_FIXED_PT is always last. */
7077 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7078 key
->ps_prolog
.num_input_vgprs
- 1;
7079 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7081 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7084 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7085 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7086 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7087 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7089 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7090 * The hw doesn't compute CENTROID if the whole wave only
7091 * contains fully-covered quads.
7093 * PRIM_MASK is after user SGPRs.
7095 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7096 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7097 LLVMConstInt(ctx
->i32
, 31, 0), "");
7098 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7101 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7102 /* Read PERSP_CENTER. */
7103 for (i
= 0; i
< 2; i
++)
7104 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7105 /* Read PERSP_CENTROID. */
7106 for (i
= 0; i
< 2; i
++)
7107 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7108 /* Select PERSP_CENTROID. */
7109 for (i
= 0; i
< 2; i
++) {
7110 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7111 center
[i
], centroid
[i
], "");
7112 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7113 tmp
, base
+ 4 + i
, "");
7116 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7117 /* Read LINEAR_CENTER. */
7118 for (i
= 0; i
< 2; i
++)
7119 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7120 /* Read LINEAR_CENTROID. */
7121 for (i
= 0; i
< 2; i
++)
7122 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7123 /* Select LINEAR_CENTROID. */
7124 for (i
= 0; i
< 2; i
++) {
7125 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7126 center
[i
], centroid
[i
], "");
7127 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7128 tmp
, base
+ 10 + i
, "");
7133 /* Force per-sample interpolation. */
7134 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7135 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7136 LLVMValueRef persp_sample
[2];
7138 /* Read PERSP_SAMPLE. */
7139 for (i
= 0; i
< 2; i
++)
7140 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7141 /* Overwrite PERSP_CENTER. */
7142 for (i
= 0; i
< 2; i
++)
7143 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7144 persp_sample
[i
], base
+ 2 + i
, "");
7145 /* Overwrite PERSP_CENTROID. */
7146 for (i
= 0; i
< 2; i
++)
7147 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7148 persp_sample
[i
], base
+ 4 + i
, "");
7150 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7151 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7152 LLVMValueRef linear_sample
[2];
7154 /* Read LINEAR_SAMPLE. */
7155 for (i
= 0; i
< 2; i
++)
7156 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7157 /* Overwrite LINEAR_CENTER. */
7158 for (i
= 0; i
< 2; i
++)
7159 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7160 linear_sample
[i
], base
+ 8 + i
, "");
7161 /* Overwrite LINEAR_CENTROID. */
7162 for (i
= 0; i
< 2; i
++)
7163 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7164 linear_sample
[i
], base
+ 10 + i
, "");
7167 /* Force center interpolation. */
7168 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7169 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7170 LLVMValueRef persp_center
[2];
7172 /* Read PERSP_CENTER. */
7173 for (i
= 0; i
< 2; i
++)
7174 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7175 /* Overwrite PERSP_SAMPLE. */
7176 for (i
= 0; i
< 2; i
++)
7177 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7178 persp_center
[i
], base
+ i
, "");
7179 /* Overwrite PERSP_CENTROID. */
7180 for (i
= 0; i
< 2; i
++)
7181 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7182 persp_center
[i
], base
+ 4 + i
, "");
7184 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7185 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7186 LLVMValueRef linear_center
[2];
7188 /* Read LINEAR_CENTER. */
7189 for (i
= 0; i
< 2; i
++)
7190 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7191 /* Overwrite LINEAR_SAMPLE. */
7192 for (i
= 0; i
< 2; i
++)
7193 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7194 linear_center
[i
], base
+ 6 + i
, "");
7195 /* Overwrite LINEAR_CENTROID. */
7196 for (i
= 0; i
< 2; i
++)
7197 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7198 linear_center
[i
], base
+ 10 + i
, "");
7201 /* Interpolate colors. */
7202 unsigned color_out_idx
= 0;
7203 for (i
= 0; i
< 2; i
++) {
7204 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7205 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7206 key
->ps_prolog
.face_vgpr_index
;
7207 LLVMValueRef interp
[2], color
[4];
7208 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7213 /* If the interpolation qualifier is not CONSTANT (-1). */
7214 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7215 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7216 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7218 /* Get the (i,j) updated by bc_optimize handling. */
7219 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7221 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7222 interp_vgpr
+ 1, "");
7223 interp_ij
= lp_build_gather_values(gallivm
, interp
, 2);
7226 /* Use the absolute location of the input. */
7227 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7229 if (key
->ps_prolog
.states
.color_two_side
) {
7230 face
= LLVMGetParam(func
, face_vgpr
);
7231 face
= ac_to_integer(&ctx
->ac
, face
);
7234 interp_fs_input(ctx
,
7235 key
->ps_prolog
.color_attr_index
[i
],
7236 TGSI_SEMANTIC_COLOR
, i
,
7237 key
->ps_prolog
.num_interp_inputs
,
7238 key
->ps_prolog
.colors_read
, interp_ij
,
7239 prim_mask
, face
, color
);
7242 unsigned chan
= u_bit_scan(&writemask
);
7243 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7244 fninfo
.num_params
+ color_out_idx
++, "");
7248 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7251 * "When per-sample shading is active due to the use of a fragment
7252 * input qualified by sample or due to the use of the gl_SampleID
7253 * or gl_SamplePosition variables, only the bit for the current
7254 * sample is set in gl_SampleMaskIn. When state specifies multiple
7255 * fragment shader invocations for a given fragment, the sample
7256 * mask for any single fragment shader invocation may specify a
7257 * subset of the covered samples for the fragment. In this case,
7258 * the bit corresponding to each covered sample will be set in
7259 * exactly one fragment shader invocation."
7261 * The samplemask loaded by hardware is always the coverage of the
7262 * entire pixel/fragment, so mask bits out based on the sample ID.
7264 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7265 /* The bit pattern matches that used by fixed function fragment
7267 static const uint16_t ps_iter_masks
[] = {
7268 0xffff, /* not used */
7274 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7276 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7277 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7278 key
->ps_prolog
.ancillary_vgpr_index
;
7279 LLVMValueRef sampleid
= unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7280 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7282 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7283 samplemask
= LLVMBuildAnd(
7286 LLVMBuildShl(ctx
->ac
.builder
,
7287 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7290 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7292 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7293 ancillary_vgpr
+ 1, "");
7296 /* Tell LLVM to insert WQM instruction sequence when needed. */
7297 if (key
->ps_prolog
.wqm
) {
7298 LLVMAddTargetDependentFunctionAttr(func
,
7299 "amdgpu-ps-wqm-outputs", "");
7302 si_llvm_build_ret(ctx
, ret
);
7306 * Build the pixel shader epilog function. This handles everything that must be
7307 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7309 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7310 union si_shader_part_key
*key
)
7312 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7313 struct si_function_info fninfo
;
7314 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7316 struct si_ps_exports exp
= {};
7318 si_init_function_info(&fninfo
);
7320 /* Declare input SGPRs. */
7321 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7322 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7323 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7324 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i64
);
7325 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7327 /* Declare input VGPRs. */
7328 unsigned required_num_params
=
7329 fninfo
.num_sgpr_params
+
7330 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7331 key
->ps_epilog
.writes_z
+
7332 key
->ps_epilog
.writes_stencil
+
7333 key
->ps_epilog
.writes_samplemask
;
7335 required_num_params
= MAX2(required_num_params
,
7336 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7338 while (fninfo
.num_params
< required_num_params
)
7339 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7341 /* Create the function. */
7342 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7343 /* Disable elimination of unused inputs. */
7344 si_llvm_add_attribute(ctx
->main_fn
,
7345 "InitialPSInputAddr", 0xffffff);
7347 /* Process colors. */
7348 unsigned vgpr
= fninfo
.num_sgpr_params
;
7349 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7350 int last_color_export
= -1;
7352 /* Find the last color export. */
7353 if (!key
->ps_epilog
.writes_z
&&
7354 !key
->ps_epilog
.writes_stencil
&&
7355 !key
->ps_epilog
.writes_samplemask
) {
7356 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7358 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7359 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7360 /* Just set this if any of the colorbuffers are enabled. */
7362 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7363 last_color_export
= 0;
7365 for (i
= 0; i
< 8; i
++)
7366 if (colors_written
& (1 << i
) &&
7367 (spi_format
>> (i
* 4)) & 0xf)
7368 last_color_export
= i
;
7372 while (colors_written
) {
7373 LLVMValueRef color
[4];
7374 int mrt
= u_bit_scan(&colors_written
);
7376 for (i
= 0; i
< 4; i
++)
7377 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7379 si_export_mrt_color(bld_base
, color
, mrt
,
7380 fninfo
.num_params
- 1,
7381 mrt
== last_color_export
, &exp
);
7384 /* Process depth, stencil, samplemask. */
7385 if (key
->ps_epilog
.writes_z
)
7386 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7387 if (key
->ps_epilog
.writes_stencil
)
7388 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7389 if (key
->ps_epilog
.writes_samplemask
)
7390 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7392 if (depth
|| stencil
|| samplemask
)
7393 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7394 else if (last_color_export
== -1)
7395 si_export_null(bld_base
);
7398 si_emit_ps_exports(ctx
, &exp
);
7401 LLVMBuildRetVoid(ctx
->ac
.builder
);
7405 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7407 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7408 LLVMTargetMachineRef tm
,
7409 struct si_shader
*shader
,
7410 struct pipe_debug_callback
*debug
)
7412 union si_shader_part_key prolog_key
;
7413 union si_shader_part_key epilog_key
;
7415 /* Get the prolog. */
7416 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7418 /* The prolog is a no-op if these aren't set. */
7419 if (si_need_ps_prolog(&prolog_key
)) {
7421 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7422 PIPE_SHADER_FRAGMENT
, true,
7423 &prolog_key
, tm
, debug
,
7424 si_build_ps_prolog_function
,
7425 "Fragment Shader Prolog");
7426 if (!shader
->prolog
)
7430 /* Get the epilog. */
7431 si_get_ps_epilog_key(shader
, &epilog_key
);
7434 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7435 PIPE_SHADER_FRAGMENT
, false,
7436 &epilog_key
, tm
, debug
,
7437 si_build_ps_epilog_function
,
7438 "Fragment Shader Epilog");
7439 if (!shader
->epilog
)
7442 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7443 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7444 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7445 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7448 /* Set up the enable bits for per-sample shading if needed. */
7449 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7450 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7451 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7452 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7453 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7454 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7456 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7457 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7458 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7459 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7460 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7461 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7463 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7464 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7465 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7466 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7467 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7468 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7470 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
7471 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7472 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7473 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
7474 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7475 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7478 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
7479 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
7480 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
7481 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
7482 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7485 /* At least one pair of interpolation weights must be enabled. */
7486 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
7487 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
7488 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
7491 /* Samplemask fixup requires the sample ID. */
7492 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
7493 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
7494 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
7497 /* The sample mask input is always enabled, because the API shader always
7498 * passes it through to the epilog. Disable it here if it's unused.
7500 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
7501 !shader
->selector
->info
.reads_samplemask
)
7502 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
7507 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
7510 /* SPI barrier management bug:
7511 * Make sure we have at least 4k of LDS in use to avoid the bug.
7512 * It applies to workgroup sizes of more than one wavefront.
7514 if (sscreen
->b
.family
== CHIP_BONAIRE
||
7515 sscreen
->b
.family
== CHIP_KABINI
||
7516 sscreen
->b
.family
== CHIP_MULLINS
)
7517 *lds_size
= MAX2(*lds_size
, 8);
7520 static void si_fix_resource_usage(struct si_screen
*sscreen
,
7521 struct si_shader
*shader
)
7523 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
7525 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
7527 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
7528 si_get_max_workgroup_size(shader
) > 64) {
7529 si_multiwave_lds_size_workaround(sscreen
,
7530 &shader
->config
.lds_size
);
7534 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
7535 struct si_shader
*shader
,
7536 struct pipe_debug_callback
*debug
)
7538 struct si_shader_selector
*sel
= shader
->selector
;
7539 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
7542 /* LS, ES, VS are compiled on demand if the main part hasn't been
7543 * compiled for that stage.
7545 * Vertex shaders are compiled on demand when a vertex fetch
7546 * workaround must be applied.
7548 if (shader
->is_monolithic
) {
7549 /* Monolithic shader (compiled as a whole, has many variants,
7550 * may take a long time to compile).
7552 r
= si_compile_tgsi_shader(sscreen
, tm
, shader
, true, debug
);
7556 /* The shader consists of several parts:
7558 * - the middle part is the user shader, it has 1 variant only
7559 * and it was compiled during the creation of the shader
7561 * - the prolog part is inserted at the beginning
7562 * - the epilog part is inserted at the end
7564 * The prolog and epilog have many (but simple) variants.
7566 * Starting with gfx9, geometry and tessellation control
7567 * shaders also contain the prolog and user shader parts of
7568 * the previous shader stage.
7574 /* Copy the compiled TGSI shader data over. */
7575 shader
->is_binary_shared
= true;
7576 shader
->binary
= mainp
->binary
;
7577 shader
->config
= mainp
->config
;
7578 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
7579 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
7580 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
7581 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
7582 memcpy(shader
->info
.vs_output_param_offset
,
7583 mainp
->info
.vs_output_param_offset
,
7584 sizeof(mainp
->info
.vs_output_param_offset
));
7585 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
7586 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
7587 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
7589 /* Select prologs and/or epilogs. */
7590 switch (sel
->type
) {
7591 case PIPE_SHADER_VERTEX
:
7592 if (!si_shader_select_vs_parts(sscreen
, tm
, shader
, debug
))
7595 case PIPE_SHADER_TESS_CTRL
:
7596 if (!si_shader_select_tcs_parts(sscreen
, tm
, shader
, debug
))
7599 case PIPE_SHADER_TESS_EVAL
:
7601 case PIPE_SHADER_GEOMETRY
:
7602 if (!si_shader_select_gs_parts(sscreen
, tm
, shader
, debug
))
7605 case PIPE_SHADER_FRAGMENT
:
7606 if (!si_shader_select_ps_parts(sscreen
, tm
, shader
, debug
))
7609 /* Make sure we have at least as many VGPRs as there
7610 * are allocated inputs.
7612 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7613 shader
->info
.num_input_vgprs
);
7617 /* Update SGPR and VGPR counts. */
7618 if (shader
->prolog
) {
7619 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7620 shader
->prolog
->config
.num_sgprs
);
7621 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7622 shader
->prolog
->config
.num_vgprs
);
7624 if (shader
->previous_stage
) {
7625 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7626 shader
->previous_stage
->config
.num_sgprs
);
7627 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7628 shader
->previous_stage
->config
.num_vgprs
);
7629 shader
->config
.spilled_sgprs
=
7630 MAX2(shader
->config
.spilled_sgprs
,
7631 shader
->previous_stage
->config
.spilled_sgprs
);
7632 shader
->config
.spilled_vgprs
=
7633 MAX2(shader
->config
.spilled_vgprs
,
7634 shader
->previous_stage
->config
.spilled_vgprs
);
7635 shader
->config
.private_mem_vgprs
=
7636 MAX2(shader
->config
.private_mem_vgprs
,
7637 shader
->previous_stage
->config
.private_mem_vgprs
);
7638 shader
->config
.scratch_bytes_per_wave
=
7639 MAX2(shader
->config
.scratch_bytes_per_wave
,
7640 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
7641 shader
->info
.uses_instanceid
|=
7642 shader
->previous_stage
->info
.uses_instanceid
;
7644 if (shader
->prolog2
) {
7645 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7646 shader
->prolog2
->config
.num_sgprs
);
7647 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7648 shader
->prolog2
->config
.num_vgprs
);
7650 if (shader
->epilog
) {
7651 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
7652 shader
->epilog
->config
.num_sgprs
);
7653 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
7654 shader
->epilog
->config
.num_vgprs
);
7658 si_fix_resource_usage(sscreen
, shader
);
7659 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
7663 r
= si_shader_binary_upload(sscreen
, shader
);
7665 fprintf(stderr
, "LLVM failed to upload shader\n");
7672 void si_shader_destroy(struct si_shader
*shader
)
7674 if (shader
->scratch_bo
)
7675 r600_resource_reference(&shader
->scratch_bo
, NULL
);
7677 r600_resource_reference(&shader
->bo
, NULL
);
7679 if (!shader
->is_binary_shared
)
7680 si_radeon_shader_binary_clean(&shader
->binary
);
7682 free(shader
->shader_log
);