2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_util.h"
29 #include "tgsi/tgsi_dump.h"
31 #include "ac_exp_param.h"
32 #include "ac_shader_util.h"
33 #include "ac_llvm_util.h"
34 #include "si_shader_internal.h"
38 #include "compiler/nir/nir.h"
40 static const char *scratch_rsrc_dword0_symbol
=
41 "SCRATCH_RSRC_DWORD0";
43 static const char *scratch_rsrc_dword1_symbol
=
44 "SCRATCH_RSRC_DWORD1";
46 struct si_shader_output_values
48 LLVMValueRef values
[4];
49 unsigned semantic_name
;
50 unsigned semantic_index
;
51 ubyte vertex_stream
[4];
55 * Used to collect types and other info about arguments of the LLVM function
56 * before the function is created.
58 struct si_function_info
{
59 LLVMTypeRef types
[100];
60 LLVMValueRef
*assign
[100];
61 unsigned num_sgpr_params
;
70 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
71 struct si_screen
*sscreen
,
72 struct ac_llvm_compiler
*compiler
);
74 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
75 struct lp_build_tgsi_context
*bld_base
,
76 struct lp_build_emit_data
*emit_data
);
78 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
81 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
82 union si_shader_part_key
*key
);
83 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
84 union si_shader_part_key
*key
);
85 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
86 union si_shader_part_key
*key
);
87 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
88 union si_shader_part_key
*key
);
90 /* Ideally pass the sample mask input to the PS epilog as v14, which
91 * is its usual location, so that the shader doesn't have to add v_mov.
93 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
95 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
98 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
104 static bool is_merged_shader(struct si_shader
*shader
)
106 if (shader
->selector
->screen
->info
.chip_class
<= VI
)
109 return shader
->key
.as_ls
||
111 shader
->selector
->type
== PIPE_SHADER_TESS_CTRL
||
112 shader
->selector
->type
== PIPE_SHADER_GEOMETRY
;
115 static void si_init_function_info(struct si_function_info
*fninfo
)
117 fninfo
->num_params
= 0;
118 fninfo
->num_sgpr_params
= 0;
121 static unsigned add_arg_assign(struct si_function_info
*fninfo
,
122 enum si_arg_regfile regfile
, LLVMTypeRef type
,
123 LLVMValueRef
*assign
)
125 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
127 unsigned idx
= fninfo
->num_params
++;
128 assert(idx
< ARRAY_SIZE(fninfo
->types
));
130 if (regfile
== ARG_SGPR
)
131 fninfo
->num_sgpr_params
= fninfo
->num_params
;
133 fninfo
->types
[idx
] = type
;
134 fninfo
->assign
[idx
] = assign
;
138 static unsigned add_arg(struct si_function_info
*fninfo
,
139 enum si_arg_regfile regfile
, LLVMTypeRef type
)
141 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
144 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
145 enum si_arg_regfile regfile
, LLVMTypeRef type
,
146 LLVMValueRef
*assign
, unsigned idx
)
148 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
149 assert(actual
== idx
);
152 static void add_arg_checked(struct si_function_info
*fninfo
,
153 enum si_arg_regfile regfile
, LLVMTypeRef type
,
156 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
160 * Returns a unique index for a per-patch semantic name and index. The index
161 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
164 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
166 switch (semantic_name
) {
167 case TGSI_SEMANTIC_TESSOUTER
:
169 case TGSI_SEMANTIC_TESSINNER
:
171 case TGSI_SEMANTIC_PATCH
:
176 assert(!"invalid semantic name");
182 * Returns a unique index for a semantic name and index. The index must be
183 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
186 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
189 switch (semantic_name
) {
190 case TGSI_SEMANTIC_POSITION
:
192 case TGSI_SEMANTIC_GENERIC
:
193 /* Since some shader stages use the the highest used IO index
194 * to determine the size to allocate for inputs/outputs
195 * (in LDS, tess and GS rings). GENERIC should be placed right
196 * after POSITION to make that size as small as possible.
198 if (index
< SI_MAX_IO_GENERIC
)
201 assert(!"invalid generic index");
203 case TGSI_SEMANTIC_PSIZE
:
204 return SI_MAX_IO_GENERIC
+ 1;
205 case TGSI_SEMANTIC_CLIPDIST
:
207 return SI_MAX_IO_GENERIC
+ 2 + index
;
208 case TGSI_SEMANTIC_FOG
:
209 return SI_MAX_IO_GENERIC
+ 4;
210 case TGSI_SEMANTIC_LAYER
:
211 return SI_MAX_IO_GENERIC
+ 5;
212 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
213 return SI_MAX_IO_GENERIC
+ 6;
214 case TGSI_SEMANTIC_PRIMID
:
215 return SI_MAX_IO_GENERIC
+ 7;
216 case TGSI_SEMANTIC_COLOR
:
218 return SI_MAX_IO_GENERIC
+ 8 + index
;
219 case TGSI_SEMANTIC_BCOLOR
:
221 /* If it's a varying, COLOR and BCOLOR alias. */
223 return SI_MAX_IO_GENERIC
+ 8 + index
;
225 return SI_MAX_IO_GENERIC
+ 10 + index
;
226 case TGSI_SEMANTIC_TEXCOORD
:
228 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 12 + 8 <= 63);
229 return SI_MAX_IO_GENERIC
+ 12 + index
;
230 case TGSI_SEMANTIC_CLIPVERTEX
:
233 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
234 assert(!"invalid semantic name");
240 * Get the value of a shader input parameter and extract a bitfield.
242 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
243 LLVMValueRef value
, unsigned rshift
,
246 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
247 value
= ac_to_integer(&ctx
->ac
, value
);
250 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
251 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
253 if (rshift
+ bitwidth
< 32) {
254 unsigned mask
= (1 << bitwidth
) - 1;
255 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
256 LLVMConstInt(ctx
->i32
, mask
, 0), "");
262 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
263 unsigned param
, unsigned rshift
,
266 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
268 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
271 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
274 case PIPE_SHADER_TESS_CTRL
:
275 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
277 case PIPE_SHADER_TESS_EVAL
:
278 return LLVMGetParam(ctx
->main_fn
,
279 ctx
->param_tes_rel_patch_id
);
287 /* Tessellation shaders pass outputs to the next shader using LDS.
289 * LS outputs = TCS inputs
290 * TCS outputs = TES inputs
293 * - TCS inputs for patch 0
294 * - TCS inputs for patch 1
295 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
297 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
298 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
299 * - TCS outputs for patch 1
300 * - Per-patch TCS outputs for patch 1
301 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
302 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
305 * All three shaders VS(LS), TCS, TES share the same LDS space.
309 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
311 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
314 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
316 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
318 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
319 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
321 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
324 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
326 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
328 return LLVMConstInt(ctx
->i32
, stride
, 0);
331 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
333 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
334 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
336 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
337 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
338 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
339 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
340 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
341 num_patch_outputs
* 4;
342 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
346 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
348 return LLVMBuildMul(ctx
->ac
.builder
,
350 ctx
->param_tcs_out_lds_offsets
,
352 LLVMConstInt(ctx
->i32
, 4, 0), "");
356 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
358 return LLVMBuildMul(ctx
->ac
.builder
,
360 ctx
->param_tcs_out_lds_offsets
,
362 LLVMConstInt(ctx
->i32
, 4, 0), "");
366 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
368 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
369 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
371 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
375 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
377 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
378 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
379 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
381 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_offset
,
382 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
388 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
390 LLVMValueRef patch0_patch_data_offset
=
391 get_tcs_out_patch0_patch_data_offset(ctx
);
392 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
393 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
395 return LLVMBuildAdd(ctx
->ac
.builder
, patch0_patch_data_offset
,
396 LLVMBuildMul(ctx
->ac
.builder
, patch_stride
,
401 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
403 unsigned tcs_out_vertices
=
404 ctx
->shader
->selector
?
405 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
407 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
408 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
409 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
411 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
414 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
419 case PIPE_SHADER_VERTEX
:
420 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
421 return LLVMConstInt(ctx
->i32
, stride
, 0);
423 case PIPE_SHADER_TESS_CTRL
:
424 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
425 ctx
->shader
->is_monolithic
) {
426 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
427 return LLVMConstInt(ctx
->i32
, stride
, 0);
429 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
437 static LLVMValueRef
get_instance_index_for_fetch(
438 struct si_shader_context
*ctx
,
439 unsigned param_start_instance
, LLVMValueRef divisor
)
441 LLVMValueRef result
= ctx
->abi
.instance_id
;
443 /* The division must be done before START_INSTANCE is added. */
444 if (divisor
!= ctx
->i32_1
)
445 result
= LLVMBuildUDiv(ctx
->ac
.builder
, result
, divisor
, "");
447 return LLVMBuildAdd(ctx
->ac
.builder
, result
,
448 LLVMGetParam(ctx
->main_fn
, param_start_instance
), "");
451 /* Bitcast <4 x float> to <2 x double>, extract the component, and convert
453 static LLVMValueRef
extract_double_to_float(struct si_shader_context
*ctx
,
455 unsigned double_index
)
457 LLVMBuilderRef builder
= ctx
->ac
.builder
;
458 LLVMTypeRef f64
= LLVMDoubleTypeInContext(ctx
->ac
.context
);
459 LLVMValueRef dvec2
= LLVMBuildBitCast(builder
, vec4
,
460 LLVMVectorType(f64
, 2), "");
461 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, double_index
, 0);
462 LLVMValueRef value
= LLVMBuildExtractElement(builder
, dvec2
, index
, "");
463 return LLVMBuildFPTrunc(builder
, value
, ctx
->f32
, "");
466 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
467 LLVMValueRef i32
, unsigned index
)
472 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
473 LLVMConstInt(ctx
->i32
, 16, 0), "");
475 return LLVMBuildSExt(ctx
->ac
.builder
,
476 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
481 void si_llvm_load_input_vs(
482 struct si_shader_context
*ctx
,
483 unsigned input_index
,
486 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
487 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
489 if (vs_blit_property
) {
490 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
491 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
492 LLVMIntULE
, vertex_id
,
494 /* Use LLVMIntNE, because we have 3 vertices and only
495 * the middle one should use y2.
497 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
498 LLVMIntNE
, vertex_id
,
501 if (input_index
== 0) {
503 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
504 ctx
->param_vs_blit_inputs
);
505 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
506 ctx
->param_vs_blit_inputs
+ 1);
508 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
509 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
510 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
511 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
513 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
515 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
518 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
519 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
520 out
[2] = LLVMGetParam(ctx
->main_fn
,
521 ctx
->param_vs_blit_inputs
+ 2);
522 out
[3] = ctx
->ac
.f32_1
;
526 /* Color or texture coordinates: */
527 assert(input_index
== 1);
529 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
530 for (int i
= 0; i
< 4; i
++) {
531 out
[i
] = LLVMGetParam(ctx
->main_fn
,
532 ctx
->param_vs_blit_inputs
+ 3 + i
);
535 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
536 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
537 ctx
->param_vs_blit_inputs
+ 3);
538 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
539 ctx
->param_vs_blit_inputs
+ 4);
540 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
541 ctx
->param_vs_blit_inputs
+ 5);
542 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
543 ctx
->param_vs_blit_inputs
+ 6);
545 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
547 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
549 out
[2] = LLVMGetParam(ctx
->main_fn
,
550 ctx
->param_vs_blit_inputs
+ 7);
551 out
[3] = LLVMGetParam(ctx
->main_fn
,
552 ctx
->param_vs_blit_inputs
+ 8);
559 unsigned num_fetches
;
560 unsigned fetch_stride
;
561 unsigned num_channels
;
563 LLVMValueRef t_list_ptr
;
564 LLVMValueRef t_offset
;
566 LLVMValueRef vertex_index
;
567 LLVMValueRef input
[3];
569 /* Load the T list */
570 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
572 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
574 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
576 vertex_index
= LLVMGetParam(ctx
->main_fn
,
577 ctx
->param_vertex_index0
+
580 fix_fetch
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
];
582 /* Do multiple loads for special formats. */
584 case SI_FIX_FETCH_RGB_64_FLOAT
:
585 num_fetches
= 3; /* 3 2-dword loads */
589 case SI_FIX_FETCH_RGBA_64_FLOAT
:
590 num_fetches
= 2; /* 2 4-dword loads */
594 case SI_FIX_FETCH_RGB_8
:
595 case SI_FIX_FETCH_RGB_8_INT
:
600 case SI_FIX_FETCH_RGB_16
:
601 case SI_FIX_FETCH_RGB_16_INT
:
609 num_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
612 for (unsigned i
= 0; i
< num_fetches
; i
++) {
613 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
615 input
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
,
616 vertex_index
, voffset
,
617 num_channels
, false, true);
618 input
[i
] = ac_build_expand_to_vec4(&ctx
->ac
, input
[i
], num_channels
);
621 /* Break up the vec4 into individual components */
622 for (chan
= 0; chan
< 4; chan
++) {
623 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, 0);
624 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
625 input
[0], llvm_chan
, "");
629 case SI_FIX_FETCH_A2_SNORM
:
630 case SI_FIX_FETCH_A2_SSCALED
:
631 case SI_FIX_FETCH_A2_SINT
: {
632 /* The hardware returns an unsigned value; convert it to a
635 LLVMValueRef tmp
= out
[3];
636 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
638 /* First, recover the sign-extended signed integer value. */
639 if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
)
640 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
642 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
644 /* For the integer-like cases, do a natural sign extension.
646 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
647 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
650 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
651 fix_fetch
== SI_FIX_FETCH_A2_SNORM
?
652 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
653 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
655 /* Convert back to the right type. */
656 if (fix_fetch
== SI_FIX_FETCH_A2_SNORM
) {
658 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
659 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
660 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
661 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
662 } else if (fix_fetch
== SI_FIX_FETCH_A2_SSCALED
) {
663 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
669 case SI_FIX_FETCH_RGBA_32_UNORM
:
670 case SI_FIX_FETCH_RGBX_32_UNORM
:
671 for (chan
= 0; chan
< 4; chan
++) {
672 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
673 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
674 out
[chan
], ctx
->f32
, "");
675 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
676 LLVMConstReal(ctx
->f32
, 1.0 / UINT_MAX
), "");
678 /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
679 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_UNORM
)
680 out
[3] = LLVMConstReal(ctx
->f32
, 1);
682 case SI_FIX_FETCH_RGBA_32_SNORM
:
683 case SI_FIX_FETCH_RGBX_32_SNORM
:
684 case SI_FIX_FETCH_RGBA_32_FIXED
:
685 case SI_FIX_FETCH_RGBX_32_FIXED
: {
687 if (fix_fetch
>= SI_FIX_FETCH_RGBA_32_FIXED
)
688 scale
= 1.0 / 0x10000;
690 scale
= 1.0 / INT_MAX
;
692 for (chan
= 0; chan
< 4; chan
++) {
693 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
694 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
695 out
[chan
], ctx
->f32
, "");
696 out
[chan
] = LLVMBuildFMul(ctx
->ac
.builder
, out
[chan
],
697 LLVMConstReal(ctx
->f32
, scale
), "");
699 /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */
700 if (fix_fetch
== SI_FIX_FETCH_RGBX_32_SNORM
||
701 fix_fetch
== SI_FIX_FETCH_RGBX_32_FIXED
)
702 out
[3] = LLVMConstReal(ctx
->f32
, 1);
705 case SI_FIX_FETCH_RGBA_32_USCALED
:
706 for (chan
= 0; chan
< 4; chan
++) {
707 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
708 out
[chan
] = LLVMBuildUIToFP(ctx
->ac
.builder
,
709 out
[chan
], ctx
->f32
, "");
712 case SI_FIX_FETCH_RGBA_32_SSCALED
:
713 for (chan
= 0; chan
< 4; chan
++) {
714 out
[chan
] = ac_to_integer(&ctx
->ac
, out
[chan
]);
715 out
[chan
] = LLVMBuildSIToFP(ctx
->ac
.builder
,
716 out
[chan
], ctx
->f32
, "");
719 case SI_FIX_FETCH_RG_64_FLOAT
:
720 for (chan
= 0; chan
< 2; chan
++)
721 out
[chan
] = extract_double_to_float(ctx
, input
[0], chan
);
723 out
[2] = LLVMConstReal(ctx
->f32
, 0);
724 out
[3] = LLVMConstReal(ctx
->f32
, 1);
726 case SI_FIX_FETCH_RGB_64_FLOAT
:
727 for (chan
= 0; chan
< 3; chan
++)
728 out
[chan
] = extract_double_to_float(ctx
, input
[chan
], 0);
730 out
[3] = LLVMConstReal(ctx
->f32
, 1);
732 case SI_FIX_FETCH_RGBA_64_FLOAT
:
733 for (chan
= 0; chan
< 4; chan
++) {
734 out
[chan
] = extract_double_to_float(ctx
, input
[chan
/ 2],
738 case SI_FIX_FETCH_RGB_8
:
739 case SI_FIX_FETCH_RGB_8_INT
:
740 case SI_FIX_FETCH_RGB_16
:
741 case SI_FIX_FETCH_RGB_16_INT
:
742 for (chan
= 0; chan
< 3; chan
++) {
743 out
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
747 if (fix_fetch
== SI_FIX_FETCH_RGB_8
||
748 fix_fetch
== SI_FIX_FETCH_RGB_16
) {
749 out
[3] = LLVMConstReal(ctx
->f32
, 1);
751 out
[3] = ac_to_float(&ctx
->ac
, ctx
->i32_1
);
757 static void declare_input_vs(
758 struct si_shader_context
*ctx
,
759 unsigned input_index
,
760 const struct tgsi_full_declaration
*decl
,
763 si_llvm_load_input_vs(ctx
, input_index
, out
);
766 static LLVMValueRef
get_primitive_id(struct si_shader_context
*ctx
,
773 case PIPE_SHADER_VERTEX
:
774 return LLVMGetParam(ctx
->main_fn
,
775 ctx
->param_vs_prim_id
);
776 case PIPE_SHADER_TESS_CTRL
:
777 return ctx
->abi
.tcs_patch_id
;
778 case PIPE_SHADER_TESS_EVAL
:
779 return ctx
->abi
.tes_patch_id
;
780 case PIPE_SHADER_GEOMETRY
:
781 return ctx
->abi
.gs_prim_id
;
789 * Return the value of tgsi_ind_register for indexing.
790 * This is the indirect index with the constant offset added to it.
792 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
793 const struct tgsi_ind_register
*ind
,
799 if (ind
->File
== TGSI_FILE_ADDRESS
) {
800 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
801 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
803 struct tgsi_full_src_register src
= {};
805 src
.Register
.File
= ind
->File
;
806 src
.Register
.Index
= ind
->Index
;
808 /* Set the second index to 0 for constants. */
809 if (ind
->File
== TGSI_FILE_CONSTANT
)
810 src
.Register
.Dimension
= 1;
812 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
815 result
= ac_to_integer(&ctx
->ac
, result
);
819 result
= LLVMBuildMul(ctx
->ac
.builder
, result
,
820 LLVMConstInt(ctx
->i32
, addr_mul
, 0), "");
821 result
= LLVMBuildAdd(ctx
->ac
.builder
, result
,
822 LLVMConstInt(ctx
->i32
, rel_index
, 0), "");
827 * Like si_get_indirect_index, but restricts the return value to a (possibly
828 * undefined) value inside [0..num).
830 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
831 const struct tgsi_ind_register
*ind
,
832 int rel_index
, unsigned num
)
834 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
836 return si_llvm_bound_index(ctx
, result
, num
);
839 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
840 LLVMValueRef vertex_dw_stride
,
841 LLVMValueRef base_addr
,
842 LLVMValueRef vertex_index
,
843 LLVMValueRef param_index
,
844 unsigned input_index
,
849 if (vertex_dw_stride
) {
850 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
851 LLVMBuildMul(ctx
->ac
.builder
, vertex_index
,
852 vertex_dw_stride
, ""), "");
856 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
857 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
858 LLVMConstInt(ctx
->i32
, 4, 0), ""), "");
861 int param
= is_patch
?
862 si_shader_io_get_unique_index_patch(name
[input_index
],
863 index
[input_index
]) :
864 si_shader_io_get_unique_index(name
[input_index
],
865 index
[input_index
], false);
867 /* Add the base address of the element. */
868 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
869 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
873 * Calculate a dword address given an input or output register and a stride.
875 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
876 const struct tgsi_full_dst_register
*dst
,
877 const struct tgsi_full_src_register
*src
,
878 LLVMValueRef vertex_dw_stride
,
879 LLVMValueRef base_addr
)
881 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
882 ubyte
*name
, *index
, *array_first
;
884 struct tgsi_full_dst_register reg
;
885 LLVMValueRef vertex_index
= NULL
;
886 LLVMValueRef ind_index
= NULL
;
888 /* Set the register description. The address computation is the same
889 * for sources and destinations. */
891 reg
.Register
.File
= src
->Register
.File
;
892 reg
.Register
.Index
= src
->Register
.Index
;
893 reg
.Register
.Indirect
= src
->Register
.Indirect
;
894 reg
.Register
.Dimension
= src
->Register
.Dimension
;
895 reg
.Indirect
= src
->Indirect
;
896 reg
.Dimension
= src
->Dimension
;
897 reg
.DimIndirect
= src
->DimIndirect
;
901 /* If the register is 2-dimensional (e.g. an array of vertices
902 * in a primitive), calculate the base address of the vertex. */
903 if (reg
.Register
.Dimension
) {
904 if (reg
.Dimension
.Indirect
)
905 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
906 1, reg
.Dimension
.Index
);
908 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
911 /* Get information about the register. */
912 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
913 name
= info
->input_semantic_name
;
914 index
= info
->input_semantic_index
;
915 array_first
= info
->input_array_first
;
916 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
917 name
= info
->output_semantic_name
;
918 index
= info
->output_semantic_index
;
919 array_first
= info
->output_array_first
;
925 if (reg
.Register
.Indirect
) {
926 /* Add the relative address of the element. */
927 if (reg
.Indirect
.ArrayID
)
928 input_index
= array_first
[reg
.Indirect
.ArrayID
];
930 input_index
= reg
.Register
.Index
;
932 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
933 1, reg
.Register
.Index
- input_index
);
935 input_index
= reg
.Register
.Index
;
938 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
939 base_addr
, vertex_index
,
940 ind_index
, input_index
,
942 !reg
.Register
.Dimension
);
945 /* The offchip buffer layout for TCS->TES is
947 * - attribute 0 of patch 0 vertex 0
948 * - attribute 0 of patch 0 vertex 1
949 * - attribute 0 of patch 0 vertex 2
951 * - attribute 0 of patch 1 vertex 0
952 * - attribute 0 of patch 1 vertex 1
954 * - attribute 1 of patch 0 vertex 0
955 * - attribute 1 of patch 0 vertex 1
957 * - per patch attribute 0 of patch 0
958 * - per patch attribute 0 of patch 1
961 * Note that every attribute has 4 components.
963 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
964 LLVMValueRef rel_patch_id
,
965 LLVMValueRef vertex_index
,
966 LLVMValueRef param_index
)
968 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
969 LLVMValueRef param_stride
, constant16
;
971 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
972 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
973 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
976 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
978 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
979 vertices_per_patch
, "");
981 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
984 param_stride
= total_vertices
;
986 base_addr
= rel_patch_id
;
987 param_stride
= num_patches
;
990 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
991 LLVMBuildMul(ctx
->ac
.builder
, param_index
,
992 param_stride
, ""), "");
994 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
997 LLVMValueRef patch_data_offset
=
998 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
1000 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
1001 patch_data_offset
, "");
1006 /* This is a generic helper that can be shared by the NIR and TGSI backends */
1007 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
1008 struct si_shader_context
*ctx
,
1009 LLVMValueRef vertex_index
,
1010 LLVMValueRef param_index
,
1011 unsigned param_base
,
1016 unsigned param_index_base
;
1018 param_index_base
= is_patch
?
1019 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
1020 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
1023 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1024 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
1027 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
1030 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
1031 vertex_index
, param_index
);
1034 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
1035 struct si_shader_context
*ctx
,
1036 const struct tgsi_full_dst_register
*dst
,
1037 const struct tgsi_full_src_register
*src
)
1039 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1040 ubyte
*name
, *index
, *array_first
;
1041 struct tgsi_full_src_register reg
;
1042 LLVMValueRef vertex_index
= NULL
;
1043 LLVMValueRef param_index
= NULL
;
1044 unsigned param_base
;
1046 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
1048 if (reg
.Register
.Dimension
) {
1050 if (reg
.Dimension
.Indirect
)
1051 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
1052 1, reg
.Dimension
.Index
);
1054 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
1057 /* Get information about the register. */
1058 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
1059 name
= info
->input_semantic_name
;
1060 index
= info
->input_semantic_index
;
1061 array_first
= info
->input_array_first
;
1062 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
1063 name
= info
->output_semantic_name
;
1064 index
= info
->output_semantic_index
;
1065 array_first
= info
->output_array_first
;
1071 if (reg
.Register
.Indirect
) {
1072 if (reg
.Indirect
.ArrayID
)
1073 param_base
= array_first
[reg
.Indirect
.ArrayID
];
1075 param_base
= reg
.Register
.Index
;
1077 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
1078 1, reg
.Register
.Index
- param_base
);
1081 param_base
= reg
.Register
.Index
;
1084 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1085 param_index
, param_base
,
1086 name
, index
, !reg
.Register
.Dimension
);
1089 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
1090 LLVMTypeRef type
, unsigned swizzle
,
1091 LLVMValueRef buffer
, LLVMValueRef offset
,
1092 LLVMValueRef base
, bool can_speculate
)
1094 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1095 LLVMValueRef value
, value2
;
1096 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
1098 if (swizzle
== ~0) {
1099 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1100 0, 1, 0, can_speculate
, false);
1102 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1105 if (!llvm_type_is_64bit(ctx
, type
)) {
1106 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
1107 0, 1, 0, can_speculate
, false);
1109 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
1110 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1111 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1114 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1115 swizzle
* 4, 1, 0, can_speculate
, false);
1117 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
1118 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
1120 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1126 * \param type output value type
1127 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1128 * \param dw_addr address in dwords
1130 static LLVMValueRef
lds_load(struct lp_build_tgsi_context
*bld_base
,
1131 LLVMTypeRef type
, unsigned swizzle
,
1132 LLVMValueRef dw_addr
)
1134 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1137 if (swizzle
== ~0) {
1138 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1140 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1141 values
[chan
] = lds_load(bld_base
, type
, chan
, dw_addr
);
1143 return ac_build_gather_values(&ctx
->ac
, values
,
1147 /* Split 64-bit loads. */
1148 if (llvm_type_is_64bit(ctx
, type
)) {
1149 LLVMValueRef lo
, hi
;
1151 lo
= lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1152 hi
= lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1153 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1156 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1157 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1159 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1161 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1167 * \param swizzle offset (typically 0..3)
1168 * \param dw_addr address in dwords
1169 * \param value value to store
1171 static void lds_store(struct si_shader_context
*ctx
,
1172 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1175 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1176 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1178 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1183 TESS_OFFCHIP_RING_TCS
,
1184 TESS_OFFCHIP_RING_TES
,
1187 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1188 enum si_tess_ring ring
)
1190 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1191 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1192 ctx
->param_tcs_out_lds_layout
;
1193 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1195 /* TCS only receives high 13 bits of the address. */
1196 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1197 addr
= LLVMBuildAnd(builder
, addr
,
1198 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1201 if (ring
== TCS_FACTOR_RING
) {
1202 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1203 addr
= LLVMBuildAdd(builder
, addr
,
1204 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1207 LLVMValueRef desc
[4];
1209 desc
[1] = LLVMConstInt(ctx
->i32
,
1210 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1211 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1212 desc
[3] = LLVMConstInt(ctx
->i32
,
1213 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1214 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1215 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1216 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
1217 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1218 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0);
1220 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1223 static LLVMValueRef
fetch_input_tcs(
1224 struct lp_build_tgsi_context
*bld_base
,
1225 const struct tgsi_full_src_register
*reg
,
1226 enum tgsi_opcode_type type
, unsigned swizzle
)
1228 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1229 LLVMValueRef dw_addr
, stride
;
1231 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1232 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1233 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1235 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1238 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1240 LLVMValueRef vertex_index
,
1241 LLVMValueRef param_index
,
1242 unsigned const_index
,
1244 unsigned driver_location
,
1246 unsigned num_components
,
1251 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1252 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1253 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1254 LLVMValueRef dw_addr
, stride
;
1256 driver_location
= driver_location
/ 4;
1259 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1260 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1264 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1266 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1267 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1272 /* Add the constant index to the indirect index */
1273 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1274 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1276 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1282 names
= info
->input_semantic_name
;
1283 indices
= info
->input_semantic_index
;
1285 names
= info
->output_semantic_name
;
1286 indices
= info
->output_semantic_index
;
1289 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1290 vertex_index
, param_index
,
1295 LLVMValueRef value
[4];
1296 for (unsigned i
= 0; i
< num_components
; i
++) {
1297 unsigned offset
= i
;
1298 if (llvm_type_is_64bit(ctx
, type
))
1301 offset
+= component
;
1302 value
[i
+ component
] = lds_load(bld_base
, type
, offset
, dw_addr
);
1305 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1308 static LLVMValueRef
fetch_output_tcs(
1309 struct lp_build_tgsi_context
*bld_base
,
1310 const struct tgsi_full_src_register
*reg
,
1311 enum tgsi_opcode_type type
, unsigned swizzle
)
1313 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1314 LLVMValueRef dw_addr
, stride
;
1316 if (reg
->Register
.Dimension
) {
1317 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1318 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1319 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1321 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1322 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1325 return lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1328 static LLVMValueRef
fetch_input_tes(
1329 struct lp_build_tgsi_context
*bld_base
,
1330 const struct tgsi_full_src_register
*reg
,
1331 enum tgsi_opcode_type type
, unsigned swizzle
)
1333 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1334 LLVMValueRef base
, addr
;
1336 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1337 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1339 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1340 ctx
->tess_offchip_ring
, base
, addr
, true);
1343 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1345 LLVMValueRef vertex_index
,
1346 LLVMValueRef param_index
,
1347 unsigned const_index
,
1349 unsigned driver_location
,
1351 unsigned num_components
,
1356 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1357 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1358 LLVMValueRef base
, addr
;
1360 driver_location
= driver_location
/ 4;
1362 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1365 /* Add the constant index to the indirect index */
1366 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1367 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1369 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1372 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1373 param_index
, driver_location
,
1374 info
->input_semantic_name
,
1375 info
->input_semantic_index
,
1378 /* TODO: This will generate rather ordinary llvm code, although it
1379 * should be easy for the optimiser to fix up. In future we might want
1380 * to refactor buffer_load(), but for now this maximises code sharing
1381 * between the NIR and TGSI backends.
1383 LLVMValueRef value
[4];
1384 for (unsigned i
= 0; i
< num_components
; i
++) {
1385 unsigned offset
= i
;
1386 if (llvm_type_is_64bit(ctx
, type
))
1389 offset
+= component
;
1390 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1391 ctx
->tess_offchip_ring
, base
, addr
, true);
1394 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1397 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1398 const struct tgsi_full_instruction
*inst
,
1399 const struct tgsi_opcode_info
*info
,
1401 LLVMValueRef dst
[4])
1403 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1404 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1405 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1406 unsigned chan_index
;
1407 LLVMValueRef dw_addr
, stride
;
1408 LLVMValueRef buffer
, base
, buf_addr
;
1409 LLVMValueRef values
[4];
1410 bool skip_lds_store
;
1411 bool is_tess_factor
= false, is_tess_inner
= false;
1413 /* Only handle per-patch and per-vertex outputs here.
1414 * Vectors will be lowered to scalars and this function will be called again.
1416 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1417 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1418 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1422 if (reg
->Register
.Dimension
) {
1423 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1424 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1425 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1426 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1428 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1429 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1430 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1432 if (!reg
->Register
.Indirect
) {
1433 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1435 /* Always write tess factors into LDS for the TCS epilog. */
1436 if (name
== TGSI_SEMANTIC_TESSINNER
||
1437 name
== TGSI_SEMANTIC_TESSOUTER
) {
1438 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1439 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1440 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1441 is_tess_factor
= true;
1442 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1447 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1449 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1450 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1452 uint32_t writemask
= reg
->Register
.WriteMask
;
1454 chan_index
= u_bit_scan(&writemask
);
1455 LLVMValueRef value
= dst
[chan_index
];
1457 if (inst
->Instruction
.Saturate
)
1458 value
= ac_build_clamp(&ctx
->ac
, value
);
1460 /* Skip LDS stores if there is no LDS read of this output. */
1461 if (!skip_lds_store
)
1462 lds_store(ctx
, chan_index
, dw_addr
, value
);
1464 value
= ac_to_integer(&ctx
->ac
, value
);
1465 values
[chan_index
] = value
;
1467 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1468 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1470 4 * chan_index
, 1, 0, true, false);
1473 /* Write tess factors into VGPRs for the epilog. */
1474 if (is_tess_factor
&&
1475 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1476 if (!is_tess_inner
) {
1477 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1478 ctx
->invoc0_tess_factors
[chan_index
]);
1479 } else if (chan_index
< 2) {
1480 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1481 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1486 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1487 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1489 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1490 base
, 0, 1, 0, true, false);
1494 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1495 const struct nir_variable
*var
,
1496 LLVMValueRef vertex_index
,
1497 LLVMValueRef param_index
,
1498 unsigned const_index
,
1502 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1503 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1504 const unsigned component
= var
->data
.location_frac
;
1505 const bool is_patch
= var
->data
.patch
;
1506 unsigned driver_location
= var
->data
.driver_location
;
1507 LLVMValueRef dw_addr
, stride
;
1508 LLVMValueRef buffer
, base
, addr
;
1509 LLVMValueRef values
[4];
1510 bool skip_lds_store
;
1511 bool is_tess_factor
= false, is_tess_inner
= false;
1513 driver_location
= driver_location
/ 4;
1516 /* Add the constant index to the indirect index */
1517 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1518 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1520 if (const_index
!= 0)
1521 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1525 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1526 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1527 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1528 vertex_index
, param_index
,
1530 info
->output_semantic_name
,
1531 info
->output_semantic_index
,
1534 skip_lds_store
= !info
->reads_pervertex_outputs
;
1536 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1537 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1538 vertex_index
, param_index
,
1540 info
->output_semantic_name
,
1541 info
->output_semantic_index
,
1544 skip_lds_store
= !info
->reads_perpatch_outputs
;
1547 int name
= info
->output_semantic_name
[driver_location
];
1549 /* Always write tess factors into LDS for the TCS epilog. */
1550 if (name
== TGSI_SEMANTIC_TESSINNER
||
1551 name
== TGSI_SEMANTIC_TESSOUTER
) {
1552 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1553 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1554 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1555 is_tess_factor
= true;
1556 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1561 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1563 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1565 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1566 param_index
, driver_location
,
1567 info
->output_semantic_name
,
1568 info
->output_semantic_index
,
1571 for (unsigned chan
= 0; chan
< 4; chan
++) {
1572 if (!(writemask
& (1 << chan
)))
1574 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1576 /* Skip LDS stores if there is no LDS read of this output. */
1577 if (!skip_lds_store
)
1578 lds_store(ctx
, chan
, dw_addr
, value
);
1580 value
= ac_to_integer(&ctx
->ac
, value
);
1581 values
[chan
] = value
;
1583 if (writemask
!= 0xF && !is_tess_factor
) {
1584 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1586 4 * chan
, 1, 0, true, false);
1589 /* Write tess factors into VGPRs for the epilog. */
1590 if (is_tess_factor
&&
1591 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1592 if (!is_tess_inner
) {
1593 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1594 ctx
->invoc0_tess_factors
[chan
]);
1595 } else if (chan
< 2) {
1596 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1597 ctx
->invoc0_tess_factors
[4 + chan
]);
1602 if (writemask
== 0xF && !is_tess_factor
) {
1603 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1605 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1606 base
, 0, 1, 0, true, false);
1610 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1611 unsigned input_index
,
1612 unsigned vtx_offset_param
,
1616 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1617 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1618 struct si_shader
*shader
= ctx
->shader
;
1619 LLVMValueRef vtx_offset
, soffset
;
1620 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1621 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1622 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1626 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1628 /* GFX9 has the ESGS ring in LDS. */
1629 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1630 unsigned index
= vtx_offset_param
;
1632 switch (index
/ 2) {
1634 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1635 index
% 2 ? 16 : 0, 16);
1638 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1639 index
% 2 ? 16 : 0, 16);
1642 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1643 index
% 2 ? 16 : 0, 16);
1650 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1651 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
1652 return lds_load(bld_base
, type
, swizzle
, vtx_offset
);
1655 /* GFX6: input load from the ESGS ring in memory. */
1656 if (swizzle
== ~0) {
1657 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1659 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1660 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1663 return ac_build_gather_values(&ctx
->ac
, values
,
1667 /* Get the vertex offset parameter on GFX6. */
1668 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1670 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1671 LLVMConstInt(ctx
->i32
, 4, 0), "");
1673 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1675 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1676 vtx_offset
, soffset
, 0, 1, 0, true, false);
1677 if (llvm_type_is_64bit(ctx
, type
)) {
1678 LLVMValueRef value2
;
1679 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1681 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1682 ctx
->i32_0
, vtx_offset
, soffset
,
1683 0, 1, 0, true, false);
1684 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1686 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1689 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1691 unsigned driver_location
,
1693 unsigned num_components
,
1694 unsigned vertex_index
,
1695 unsigned const_index
,
1698 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1700 LLVMValueRef value
[4];
1701 for (unsigned i
= 0; i
< num_components
; i
++) {
1702 unsigned offset
= i
;
1703 if (llvm_type_is_64bit(ctx
, type
))
1706 offset
+= component
;
1707 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1708 vertex_index
, type
, offset
);
1711 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1714 static LLVMValueRef
fetch_input_gs(
1715 struct lp_build_tgsi_context
*bld_base
,
1716 const struct tgsi_full_src_register
*reg
,
1717 enum tgsi_opcode_type type
,
1720 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1721 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1723 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1724 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1725 return get_primitive_id(ctx
, swizzle
);
1727 if (!reg
->Register
.Dimension
)
1730 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1731 reg
->Dimension
.Index
,
1732 tgsi2llvmtype(bld_base
, type
),
1736 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1738 switch (interpolate
) {
1739 case TGSI_INTERPOLATE_CONSTANT
:
1742 case TGSI_INTERPOLATE_LINEAR
:
1743 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1744 return SI_PARAM_LINEAR_SAMPLE
;
1745 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1746 return SI_PARAM_LINEAR_CENTROID
;
1748 return SI_PARAM_LINEAR_CENTER
;
1750 case TGSI_INTERPOLATE_COLOR
:
1751 case TGSI_INTERPOLATE_PERSPECTIVE
:
1752 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1753 return SI_PARAM_PERSP_SAMPLE
;
1754 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1755 return SI_PARAM_PERSP_CENTROID
;
1757 return SI_PARAM_PERSP_CENTER
;
1760 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1765 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1766 unsigned attr_index
, unsigned chan
,
1767 LLVMValueRef prim_mask
,
1768 LLVMValueRef i
, LLVMValueRef j
)
1771 return ac_build_fs_interp(&ctx
->ac
,
1772 LLVMConstInt(ctx
->i32
, chan
, 0),
1773 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1776 return ac_build_fs_interp_mov(&ctx
->ac
,
1777 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1778 LLVMConstInt(ctx
->i32
, chan
, 0),
1779 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1784 * Interpolate a fragment shader input.
1786 * @param ctx context
1787 * @param input_index index of the input in hardware
1788 * @param semantic_name TGSI_SEMANTIC_*
1789 * @param semantic_index semantic index
1790 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1791 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1792 * @param interp_param interpolation weights (i,j)
1793 * @param prim_mask SI_PARAM_PRIM_MASK
1794 * @param face SI_PARAM_FRONT_FACE
1795 * @param result the return value (4 components)
1797 static void interp_fs_input(struct si_shader_context
*ctx
,
1798 unsigned input_index
,
1799 unsigned semantic_name
,
1800 unsigned semantic_index
,
1801 unsigned num_interp_inputs
,
1802 unsigned colors_read_mask
,
1803 LLVMValueRef interp_param
,
1804 LLVMValueRef prim_mask
,
1806 LLVMValueRef result
[4])
1808 LLVMValueRef i
= NULL
, j
= NULL
;
1811 /* fs.constant returns the param from the middle vertex, so it's not
1812 * really useful for flat shading. It's meant to be used for custom
1813 * interpolation (but the intrinsic can't fetch from the other two
1816 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1817 * to do the right thing. The only reason we use fs.constant is that
1818 * fs.interp cannot be used on integers, because they can be equal
1821 * When interp is false we will use fs.constant or for newer llvm,
1822 * amdgcn.interp.mov.
1824 bool interp
= interp_param
!= NULL
;
1827 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1828 LLVMVectorType(ctx
->f32
, 2), "");
1830 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1832 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1836 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1837 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1838 LLVMValueRef is_face_positive
;
1840 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1841 * otherwise it's at offset "num_inputs".
1843 unsigned back_attr_offset
= num_interp_inputs
;
1844 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1845 back_attr_offset
+= 1;
1847 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1848 face
, ctx
->i32_0
, "");
1850 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1851 LLVMValueRef front
, back
;
1853 front
= si_build_fs_interp(ctx
,
1856 back
= si_build_fs_interp(ctx
,
1857 back_attr_offset
, chan
,
1860 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1866 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1867 result
[0] = si_build_fs_interp(ctx
, input_index
,
1868 0, prim_mask
, i
, j
);
1870 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1871 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1873 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1874 result
[chan
] = si_build_fs_interp(ctx
,
1881 void si_llvm_load_input_fs(
1882 struct si_shader_context
*ctx
,
1883 unsigned input_index
,
1884 LLVMValueRef out
[4])
1886 struct si_shader
*shader
= ctx
->shader
;
1887 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1888 LLVMValueRef main_fn
= ctx
->main_fn
;
1889 LLVMValueRef interp_param
= NULL
;
1890 int interp_param_idx
;
1891 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1892 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1893 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1894 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1896 /* Get colors from input VGPRs (set by the prolog). */
1897 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1898 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1899 unsigned mask
= colors_read
>> (semantic_index
* 4);
1900 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1901 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1902 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1904 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1905 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1906 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1907 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1911 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1912 if (interp_param_idx
== -1)
1914 else if (interp_param_idx
) {
1915 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1918 interp_fs_input(ctx
, input_index
, semantic_name
,
1919 semantic_index
, 0, /* this param is unused */
1920 shader
->selector
->info
.colors_read
, interp_param
,
1922 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1926 static void declare_input_fs(
1927 struct si_shader_context
*ctx
,
1928 unsigned input_index
,
1929 const struct tgsi_full_declaration
*decl
,
1930 LLVMValueRef out
[4])
1932 si_llvm_load_input_fs(ctx
, input_index
, out
);
1935 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1937 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1940 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1942 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1944 /* For non-indexed draws, the base vertex set by the driver
1945 * (for direct draws) or the CP (for indirect draws) is the
1946 * first vertex ID, but GLSL expects 0 to be returned.
1948 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1949 ctx
->param_vs_state_bits
);
1950 LLVMValueRef indexed
;
1952 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1953 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1955 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1959 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1961 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1963 LLVMValueRef values
[3];
1964 LLVMValueRef result
;
1966 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1968 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1969 unsigned sizes
[3] = {
1970 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1971 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1972 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1975 for (i
= 0; i
< 3; ++i
)
1976 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1978 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1980 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1987 * Load a dword from a constant buffer.
1989 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1990 LLVMValueRef resource
,
1991 LLVMValueRef offset
)
1993 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1994 0, 0, 0, true, true);
1997 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1999 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2000 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2001 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
2002 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
2004 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2005 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
2006 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2008 LLVMValueRef pos
[4] = {
2009 buffer_load_const(ctx
, resource
, offset0
),
2010 buffer_load_const(ctx
, resource
, offset1
),
2011 LLVMConstReal(ctx
->f32
, 0),
2012 LLVMConstReal(ctx
->f32
, 0)
2015 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
2018 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
2020 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2021 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
2024 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
2026 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2027 LLVMValueRef coord
[4] = {
2028 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
2029 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
2034 /* For triangles, the vector should be (u, v, 1-u-v). */
2035 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
2036 PIPE_PRIM_TRIANGLES
) {
2037 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
2038 LLVMBuildFAdd(ctx
->ac
.builder
,
2039 coord
[0], coord
[1], ""), "");
2041 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
2044 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
2045 unsigned semantic_name
)
2047 LLVMValueRef base
, addr
;
2049 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
2051 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
2052 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
2053 LLVMConstInt(ctx
->i32
, param
, 0));
2055 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
2056 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
2060 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
2061 unsigned varying_id
)
2063 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2064 unsigned semantic_name
;
2066 switch (varying_id
) {
2067 case VARYING_SLOT_TESS_LEVEL_INNER
:
2068 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2070 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2071 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2074 unreachable("unknown tess level");
2077 return load_tess_level(ctx
, semantic_name
);
2081 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2083 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2084 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2085 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2086 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2087 return get_num_tcs_out_vertices(ctx
);
2089 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2092 void si_load_system_value(struct si_shader_context
*ctx
,
2094 const struct tgsi_full_declaration
*decl
)
2096 LLVMValueRef value
= 0;
2098 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2100 switch (decl
->Semantic
.Name
) {
2101 case TGSI_SEMANTIC_INSTANCEID
:
2102 value
= ctx
->abi
.instance_id
;
2105 case TGSI_SEMANTIC_VERTEXID
:
2106 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2108 ctx
->abi
.base_vertex
, "");
2111 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2112 /* Unused. Clarify the meaning in indexed vs. non-indexed
2113 * draws if this is ever used again. */
2117 case TGSI_SEMANTIC_BASEVERTEX
:
2118 value
= get_base_vertex(&ctx
->abi
);
2121 case TGSI_SEMANTIC_BASEINSTANCE
:
2122 value
= ctx
->abi
.start_instance
;
2125 case TGSI_SEMANTIC_DRAWID
:
2126 value
= ctx
->abi
.draw_id
;
2129 case TGSI_SEMANTIC_INVOCATIONID
:
2130 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2131 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2132 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2133 value
= ctx
->abi
.gs_invocation_id
;
2135 assert(!"INVOCATIONID not implemented");
2138 case TGSI_SEMANTIC_POSITION
:
2140 LLVMValueRef pos
[4] = {
2141 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2142 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2143 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2144 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2145 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2147 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2151 case TGSI_SEMANTIC_FACE
:
2152 value
= ctx
->abi
.front_face
;
2155 case TGSI_SEMANTIC_SAMPLEID
:
2156 value
= si_get_sample_id(ctx
);
2159 case TGSI_SEMANTIC_SAMPLEPOS
: {
2160 LLVMValueRef pos
[4] = {
2161 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2162 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2163 LLVMConstReal(ctx
->f32
, 0),
2164 LLVMConstReal(ctx
->f32
, 0)
2166 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2167 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2168 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2172 case TGSI_SEMANTIC_SAMPLEMASK
:
2173 /* This can only occur with the OpenGL Core profile, which
2174 * doesn't support smoothing.
2176 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2179 case TGSI_SEMANTIC_TESSCOORD
:
2180 value
= si_load_tess_coord(&ctx
->abi
);
2183 case TGSI_SEMANTIC_VERTICESIN
:
2184 value
= si_load_patch_vertices_in(&ctx
->abi
);
2187 case TGSI_SEMANTIC_TESSINNER
:
2188 case TGSI_SEMANTIC_TESSOUTER
:
2189 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2192 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2193 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2195 LLVMValueRef buf
, slot
, val
[4];
2198 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2199 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2200 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2201 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2203 for (i
= 0; i
< 4; i
++)
2204 val
[i
] = buffer_load_const(ctx
, buf
,
2205 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2206 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2210 case TGSI_SEMANTIC_PRIMID
:
2211 value
= get_primitive_id(ctx
, 0);
2214 case TGSI_SEMANTIC_GRID_SIZE
:
2215 value
= ctx
->abi
.num_work_groups
;
2218 case TGSI_SEMANTIC_BLOCK_SIZE
:
2219 value
= get_block_size(&ctx
->abi
);
2222 case TGSI_SEMANTIC_BLOCK_ID
:
2224 LLVMValueRef values
[3];
2226 for (int i
= 0; i
< 3; i
++) {
2227 values
[i
] = ctx
->i32_0
;
2228 if (ctx
->abi
.workgroup_ids
[i
]) {
2229 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2232 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2236 case TGSI_SEMANTIC_THREAD_ID
:
2237 value
= ctx
->abi
.local_invocation_ids
;
2240 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2241 value
= ac_build_intrinsic(&ctx
->ac
,
2242 "llvm.amdgcn.ps.live",
2244 AC_FUNC_ATTR_READNONE
);
2245 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2246 value
= LLVMBuildSExt(ctx
->ac
.builder
, value
, ctx
->i32
, "");
2249 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2250 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2253 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2254 value
= ac_get_thread_id(&ctx
->ac
);
2257 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2259 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2260 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2261 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2262 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2266 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2267 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2268 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2269 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2271 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2272 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2273 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2274 /* All bits set except LSB */
2275 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2278 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2280 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2281 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2282 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2283 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2284 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2285 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2290 assert(!"unknown system value");
2294 ctx
->system_values
[index
] = value
;
2297 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2299 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2300 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2302 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_LOCAL_ADDR_SPACE
);
2305 assert(!ctx
->ac
.lds
);
2307 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2308 LLVMArrayType(ctx
->i8
, lds_size
),
2310 AC_LOCAL_ADDR_SPACE
);
2311 LLVMSetAlignment(var
, 4);
2313 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2316 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2317 const struct tgsi_full_declaration
*decl
)
2319 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2320 assert(decl
->Range
.First
== decl
->Range
.Last
);
2322 si_declare_compute_memory(ctx
);
2325 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2328 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2329 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2331 /* Do the bounds checking with a descriptor, because
2332 * doing computation and manual bounds checking of 64-bit
2333 * addresses generates horrible VALU code with very high
2334 * VGPR usage and very low SIMD occupancy.
2336 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2338 LLVMValueRef desc0
, desc1
;
2339 if (HAVE_32BIT_POINTERS
) {
2341 desc1
= LLVMConstInt(ctx
->i32
,
2342 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2344 ptr
= LLVMBuildBitCast(ctx
->ac
.builder
, ptr
, ctx
->v2i32
, "");
2345 desc0
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_0
, "");
2346 desc1
= LLVMBuildExtractElement(ctx
->ac
.builder
, ptr
, ctx
->i32_1
, "");
2347 /* Mask out all bits except BASE_ADDRESS_HI. */
2348 desc1
= LLVMBuildAnd(ctx
->ac
.builder
, desc1
,
2349 LLVMConstInt(ctx
->i32
, ~C_008F04_BASE_ADDRESS_HI
, 0), "");
2352 LLVMValueRef desc_elems
[] = {
2355 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2356 LLVMConstInt(ctx
->i32
,
2357 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2358 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2359 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2360 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
2361 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2362 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
), 0)
2365 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2368 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2370 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2371 ctx
->param_const_and_shader_buffers
);
2373 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2374 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2377 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2379 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2380 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2382 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2384 if (sel
->info
.const_buffers_declared
== 1 &&
2385 sel
->info
.shader_buffers_declared
== 0) {
2386 return load_const_buffer_desc_fast_path(ctx
);
2389 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2390 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2391 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2393 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2397 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2399 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2400 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2401 ctx
->param_const_and_shader_buffers
);
2403 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2404 index
= LLVMBuildSub(ctx
->ac
.builder
,
2405 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2408 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2411 static LLVMValueRef
fetch_constant(
2412 struct lp_build_tgsi_context
*bld_base
,
2413 const struct tgsi_full_src_register
*reg
,
2414 enum tgsi_opcode_type type
,
2417 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2418 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2419 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2422 LLVMValueRef addr
, bufp
;
2424 if (swizzle
== LP_CHAN_ALL
) {
2426 LLVMValueRef values
[4];
2427 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2428 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2430 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2433 /* Split 64-bit loads. */
2434 if (tgsi_type_is_64bit(type
)) {
2435 LLVMValueRef lo
, hi
;
2437 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2438 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
+ 1);
2439 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2443 idx
= reg
->Register
.Index
* 4 + swizzle
;
2444 if (reg
->Register
.Indirect
) {
2445 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2447 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2450 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2451 if (sel
->info
.const_buffers_declared
== 1 &&
2452 sel
->info
.shader_buffers_declared
== 0) {
2453 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2454 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2455 return bitcast(bld_base
, type
, result
);
2458 assert(reg
->Register
.Dimension
);
2459 buf
= reg
->Dimension
.Index
;
2461 if (reg
->Dimension
.Indirect
) {
2462 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2464 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2465 reg
->Dimension
.Index
,
2466 ctx
->num_const_buffers
);
2467 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2468 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2469 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2471 bufp
= load_const_buffer_desc(ctx
, buf
);
2473 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2476 /* Initialize arguments for the shader export intrinsic */
2477 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2478 LLVMValueRef
*values
,
2480 struct ac_export_args
*args
)
2482 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2483 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2485 bool is_int8
, is_int10
;
2487 /* Default is 0xf. Adjusted below depending on the format. */
2488 args
->enabled_channels
= 0xf; /* writemask */
2490 /* Specify whether the EXEC mask represents the valid mask */
2491 args
->valid_mask
= 0;
2493 /* Specify whether this is the last export */
2496 /* Specify the target we are exporting */
2497 args
->target
= target
;
2499 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2500 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2501 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2502 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2504 assert(cbuf
>= 0 && cbuf
< 8);
2505 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2506 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2507 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2510 args
->compr
= false;
2511 args
->out
[0] = f32undef
;
2512 args
->out
[1] = f32undef
;
2513 args
->out
[2] = f32undef
;
2514 args
->out
[3] = f32undef
;
2516 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2517 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2518 unsigned bits
, bool hi
) = NULL
;
2520 switch (spi_shader_col_format
) {
2521 case V_028714_SPI_SHADER_ZERO
:
2522 args
->enabled_channels
= 0; /* writemask */
2523 args
->target
= V_008DFC_SQ_EXP_NULL
;
2526 case V_028714_SPI_SHADER_32_R
:
2527 args
->enabled_channels
= 1; /* writemask */
2528 args
->out
[0] = values
[0];
2531 case V_028714_SPI_SHADER_32_GR
:
2532 args
->enabled_channels
= 0x3; /* writemask */
2533 args
->out
[0] = values
[0];
2534 args
->out
[1] = values
[1];
2537 case V_028714_SPI_SHADER_32_AR
:
2538 args
->enabled_channels
= 0x9; /* writemask */
2539 args
->out
[0] = values
[0];
2540 args
->out
[3] = values
[3];
2543 case V_028714_SPI_SHADER_FP16_ABGR
:
2544 packf
= ac_build_cvt_pkrtz_f16
;
2547 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2548 packf
= ac_build_cvt_pknorm_u16
;
2551 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2552 packf
= ac_build_cvt_pknorm_i16
;
2555 case V_028714_SPI_SHADER_UINT16_ABGR
:
2556 packi
= ac_build_cvt_pk_u16
;
2559 case V_028714_SPI_SHADER_SINT16_ABGR
:
2560 packi
= ac_build_cvt_pk_i16
;
2563 case V_028714_SPI_SHADER_32_ABGR
:
2564 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2568 /* Pack f16 or norm_i16/u16. */
2570 for (chan
= 0; chan
< 2; chan
++) {
2571 LLVMValueRef pack_args
[2] = {
2573 values
[2 * chan
+ 1]
2575 LLVMValueRef packed
;
2577 packed
= packf(&ctx
->ac
, pack_args
);
2578 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2580 args
->compr
= 1; /* COMPR flag */
2584 for (chan
= 0; chan
< 2; chan
++) {
2585 LLVMValueRef pack_args
[2] = {
2586 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2587 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2589 LLVMValueRef packed
;
2591 packed
= packi(&ctx
->ac
, pack_args
,
2592 is_int8
? 8 : is_int10
? 10 : 16,
2594 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2596 args
->compr
= 1; /* COMPR flag */
2600 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2603 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2605 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2606 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2607 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2608 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2609 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2610 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2611 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2612 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2614 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2617 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2618 SI_PARAM_ALPHA_REF
);
2619 LLVMValueRef alpha_pass
=
2620 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2621 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2623 ac_build_kill_if_false(&ctx
->ac
, LLVMConstInt(ctx
->i1
, 0, 0));
2627 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2629 unsigned samplemask_param
)
2631 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2632 LLVMValueRef coverage
;
2634 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2635 coverage
= LLVMGetParam(ctx
->main_fn
,
2637 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2639 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2641 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2643 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2646 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2647 LLVMConstReal(ctx
->f32
,
2648 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2650 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2653 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2654 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2658 unsigned const_chan
;
2659 LLVMValueRef base_elt
;
2660 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2661 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2662 SI_VS_CONST_CLIP_PLANES
, 0);
2663 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2665 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2666 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2671 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2673 /* Compute dot products of position and user clip plane vectors */
2674 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2675 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2677 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2678 const_chan
) * 4, 0);
2679 base_elt
= buffer_load_const(ctx
, const_resource
,
2682 LLVMBuildFAdd(ctx
->ac
.builder
, args
->out
[chan
],
2683 LLVMBuildFMul(ctx
->ac
.builder
, base_elt
,
2684 out_elts
[const_chan
], ""), "");
2688 args
->enabled_channels
= 0xf;
2689 args
->valid_mask
= 0;
2691 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2696 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2700 if (so
->num_outputs
)
2701 fprintf(stderr
, "STREAMOUT\n");
2703 for (i
= 0; i
< so
->num_outputs
; i
++) {
2704 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2705 so
->output
[i
].start_component
;
2706 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2707 i
, so
->output
[i
].output_buffer
,
2708 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2709 so
->output
[i
].register_index
,
2710 mask
& 1 ? "x" : "",
2711 mask
& 2 ? "y" : "",
2712 mask
& 4 ? "z" : "",
2713 mask
& 8 ? "w" : "");
2717 static void emit_streamout_output(struct si_shader_context
*ctx
,
2718 LLVMValueRef
const *so_buffers
,
2719 LLVMValueRef
const *so_write_offsets
,
2720 struct pipe_stream_output
*stream_out
,
2721 struct si_shader_output_values
*shader_out
)
2723 unsigned buf_idx
= stream_out
->output_buffer
;
2724 unsigned start
= stream_out
->start_component
;
2725 unsigned num_comps
= stream_out
->num_components
;
2726 LLVMValueRef out
[4];
2728 assert(num_comps
&& num_comps
<= 4);
2729 if (!num_comps
|| num_comps
> 4)
2732 /* Load the output as int. */
2733 for (int j
= 0; j
< num_comps
; j
++) {
2734 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2736 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2739 /* Pack the output. */
2740 LLVMValueRef vdata
= NULL
;
2742 switch (num_comps
) {
2743 case 1: /* as i32 */
2746 case 2: /* as v2i32 */
2747 case 3: /* as v4i32 (aligned to 4) */
2748 case 4: /* as v4i32 */
2749 vdata
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, util_next_power_of_two(num_comps
)));
2750 for (int j
= 0; j
< num_comps
; j
++) {
2751 vdata
= LLVMBuildInsertElement(ctx
->ac
.builder
, vdata
, out
[j
],
2752 LLVMConstInt(ctx
->i32
, j
, 0), "");
2757 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2759 so_write_offsets
[buf_idx
],
2761 stream_out
->dst_offset
* 4, 1, 1, true, false);
2765 * Write streamout data to buffers for vertex stream @p stream (different
2766 * vertex streams can occur for GS copy shaders).
2768 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2769 struct si_shader_output_values
*outputs
,
2770 unsigned noutput
, unsigned stream
)
2772 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2773 struct pipe_stream_output_info
*so
= &sel
->so
;
2774 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2776 struct lp_build_if_state if_ctx
;
2778 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2779 LLVMValueRef so_vtx_count
=
2780 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2782 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2784 /* can_emit = tid < so_vtx_count; */
2785 LLVMValueRef can_emit
=
2786 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2788 /* Emit the streamout code conditionally. This actually avoids
2789 * out-of-bounds buffer access. The hw tells us via the SGPR
2790 * (so_vtx_count) which threads are allowed to emit streamout data. */
2791 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2793 /* The buffer offset is computed as follows:
2794 * ByteOffset = streamout_offset[buffer_id]*4 +
2795 * (streamout_write_index + thread_id)*stride[buffer_id] +
2799 LLVMValueRef so_write_index
=
2800 LLVMGetParam(ctx
->main_fn
,
2801 ctx
->param_streamout_write_index
);
2803 /* Compute (streamout_write_index + thread_id). */
2804 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2806 /* Load the descriptor and compute the write offset for each
2807 * enabled buffer. */
2808 LLVMValueRef so_write_offset
[4] = {};
2809 LLVMValueRef so_buffers
[4];
2810 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2811 ctx
->param_rw_buffers
);
2813 for (i
= 0; i
< 4; i
++) {
2817 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2818 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2820 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2822 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2823 ctx
->param_streamout_offset
[i
]);
2824 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2826 so_write_offset
[i
] = LLVMBuildMul(builder
, so_write_index
,
2827 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0), "");
2828 so_write_offset
[i
] = LLVMBuildAdd(builder
, so_write_offset
[i
], so_offset
, "");
2831 /* Write streamout data. */
2832 for (i
= 0; i
< so
->num_outputs
; i
++) {
2833 unsigned reg
= so
->output
[i
].register_index
;
2838 if (stream
!= so
->output
[i
].stream
)
2841 emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2842 &so
->output
[i
], &outputs
[reg
]);
2845 lp_build_endif(&if_ctx
);
2848 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2849 LLVMValueRef
*values
)
2851 struct ac_export_args args
;
2853 si_llvm_init_export_args(ctx
, values
,
2854 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2855 ac_build_export(&ctx
->ac
, &args
);
2858 static void si_build_param_exports(struct si_shader_context
*ctx
,
2859 struct si_shader_output_values
*outputs
,
2862 struct si_shader
*shader
= ctx
->shader
;
2863 unsigned param_count
= 0;
2865 for (unsigned i
= 0; i
< noutput
; i
++) {
2866 unsigned semantic_name
= outputs
[i
].semantic_name
;
2867 unsigned semantic_index
= outputs
[i
].semantic_index
;
2869 if (outputs
[i
].vertex_stream
[0] != 0 &&
2870 outputs
[i
].vertex_stream
[1] != 0 &&
2871 outputs
[i
].vertex_stream
[2] != 0 &&
2872 outputs
[i
].vertex_stream
[3] != 0)
2875 switch (semantic_name
) {
2876 case TGSI_SEMANTIC_LAYER
:
2877 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2878 case TGSI_SEMANTIC_CLIPDIST
:
2879 case TGSI_SEMANTIC_COLOR
:
2880 case TGSI_SEMANTIC_BCOLOR
:
2881 case TGSI_SEMANTIC_PRIMID
:
2882 case TGSI_SEMANTIC_FOG
:
2883 case TGSI_SEMANTIC_TEXCOORD
:
2884 case TGSI_SEMANTIC_GENERIC
:
2890 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2891 semantic_index
< SI_MAX_IO_GENERIC
) &&
2892 shader
->key
.opt
.kill_outputs
&
2893 (1ull << si_shader_io_get_unique_index(semantic_name
,
2894 semantic_index
, true)))
2897 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2899 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2900 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2903 shader
->info
.nr_param_exports
= param_count
;
2906 /* Generate export instructions for hardware VS shader stage */
2907 static void si_llvm_export_vs(struct si_shader_context
*ctx
,
2908 struct si_shader_output_values
*outputs
,
2911 struct si_shader
*shader
= ctx
->shader
;
2912 struct ac_export_args pos_args
[4] = {};
2913 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2917 /* Build position exports. */
2918 for (i
= 0; i
< noutput
; i
++) {
2919 switch (outputs
[i
].semantic_name
) {
2920 case TGSI_SEMANTIC_POSITION
:
2921 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2922 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2924 case TGSI_SEMANTIC_PSIZE
:
2925 psize_value
= outputs
[i
].values
[0];
2927 case TGSI_SEMANTIC_LAYER
:
2928 layer_value
= outputs
[i
].values
[0];
2930 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2931 viewport_index_value
= outputs
[i
].values
[0];
2933 case TGSI_SEMANTIC_EDGEFLAG
:
2934 edgeflag_value
= outputs
[i
].values
[0];
2936 case TGSI_SEMANTIC_CLIPDIST
:
2937 if (!shader
->key
.opt
.clip_disable
) {
2938 unsigned index
= 2 + outputs
[i
].semantic_index
;
2939 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2940 V_008DFC_SQ_EXP_POS
+ index
,
2944 case TGSI_SEMANTIC_CLIPVERTEX
:
2945 if (!shader
->key
.opt
.clip_disable
) {
2946 si_llvm_emit_clipvertex(ctx
, pos_args
,
2953 /* We need to add the position output manually if it's missing. */
2954 if (!pos_args
[0].out
[0]) {
2955 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2956 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2957 pos_args
[0].done
= 0; /* last export? */
2958 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2959 pos_args
[0].compr
= 0; /* COMPR flag */
2960 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2961 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2962 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2963 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2966 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2967 if (shader
->selector
->info
.writes_psize
||
2968 shader
->selector
->info
.writes_edgeflag
||
2969 shader
->selector
->info
.writes_viewport_index
||
2970 shader
->selector
->info
.writes_layer
) {
2971 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2972 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2973 (shader
->selector
->info
.writes_layer
<< 2);
2975 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2976 pos_args
[1].done
= 0; /* last export? */
2977 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2978 pos_args
[1].compr
= 0; /* COMPR flag */
2979 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2980 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2981 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2982 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2984 if (shader
->selector
->info
.writes_psize
)
2985 pos_args
[1].out
[0] = psize_value
;
2987 if (shader
->selector
->info
.writes_edgeflag
) {
2988 /* The output is a float, but the hw expects an integer
2989 * with the first bit containing the edge flag. */
2990 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2993 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2997 /* The LLVM intrinsic expects a float. */
2998 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3001 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3002 /* GFX9 has the layer in out.z[10:0] and the viewport
3003 * index in out.z[19:16].
3005 if (shader
->selector
->info
.writes_layer
)
3006 pos_args
[1].out
[2] = layer_value
;
3008 if (shader
->selector
->info
.writes_viewport_index
) {
3009 LLVMValueRef v
= viewport_index_value
;
3011 v
= ac_to_integer(&ctx
->ac
, v
);
3012 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3013 LLVMConstInt(ctx
->i32
, 16, 0), "");
3014 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3015 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3016 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3017 pos_args
[1].enabled_channels
|= 1 << 2;
3020 if (shader
->selector
->info
.writes_layer
)
3021 pos_args
[1].out
[2] = layer_value
;
3023 if (shader
->selector
->info
.writes_viewport_index
) {
3024 pos_args
[1].out
[3] = viewport_index_value
;
3025 pos_args
[1].enabled_channels
|= 1 << 3;
3030 for (i
= 0; i
< 4; i
++)
3031 if (pos_args
[i
].out
[0])
3032 shader
->info
.nr_pos_exports
++;
3035 for (i
= 0; i
< 4; i
++) {
3036 if (!pos_args
[i
].out
[0])
3039 /* Specify the target we are exporting */
3040 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3042 if (pos_idx
== shader
->info
.nr_pos_exports
)
3043 /* Specify that this is the last export */
3044 pos_args
[i
].done
= 1;
3046 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3049 /* Build parameter exports. */
3050 si_build_param_exports(ctx
, outputs
, noutput
);
3054 * Forward all outputs from the vertex shader to the TES. This is only used
3055 * for the fixed function TCS.
3057 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3059 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3060 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3061 LLVMValueRef lds_vertex_stride
, lds_vertex_offset
, lds_base
;
3064 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3065 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3066 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3068 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3069 lds_vertex_offset
= LLVMBuildMul(ctx
->ac
.builder
, invocation_id
,
3070 lds_vertex_stride
, "");
3071 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3072 lds_base
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, lds_vertex_offset
, "");
3074 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3076 unsigned i
= u_bit_scan64(&inputs
);
3078 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3079 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3082 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3083 get_rel_patch_id(ctx
),
3085 LLVMConstInt(ctx
->i32
, i
, 0));
3087 LLVMValueRef value
= lds_load(bld_base
, ctx
->ac
.i32
, ~0,
3090 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3091 buffer_offset
, 0, 1, 0, true, false);
3095 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3096 LLVMValueRef rel_patch_id
,
3097 LLVMValueRef invocation_id
,
3098 LLVMValueRef tcs_out_current_patch_data_offset
,
3099 LLVMValueRef invoc0_tf_outer
[4],
3100 LLVMValueRef invoc0_tf_inner
[2])
3102 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3103 struct si_shader
*shader
= ctx
->shader
;
3104 unsigned tess_inner_index
, tess_outer_index
;
3105 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3106 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3107 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3108 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3110 /* Add a barrier before loading tess factors from LDS. */
3111 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3112 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3114 /* Do this only for invocation 0, because the tess levels are per-patch,
3117 * This can't jump, because invocation 0 executes this. It should
3118 * at least mask out the loads and stores for other invocations.
3120 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3121 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3122 invocation_id
, ctx
->i32_0
, ""));
3124 /* Determine the layout of one tess factor element in the buffer. */
3125 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3126 case PIPE_PRIM_LINES
:
3127 stride
= 2; /* 2 dwords, 1 vec2 store */
3131 case PIPE_PRIM_TRIANGLES
:
3132 stride
= 4; /* 4 dwords, 1 vec4 store */
3136 case PIPE_PRIM_QUADS
:
3137 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3146 for (i
= 0; i
< 4; i
++) {
3147 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3148 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3151 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3152 /* Tess factors are in VGPRs. */
3153 for (i
= 0; i
< outer_comps
; i
++)
3154 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3155 for (i
= 0; i
< inner_comps
; i
++)
3156 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3158 /* Load tess_inner and tess_outer from LDS.
3159 * Any invocation can write them, so we can't get them from a temporary.
3161 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3162 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3164 lds_base
= tcs_out_current_patch_data_offset
;
3165 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3166 LLVMConstInt(ctx
->i32
,
3167 tess_inner_index
* 4, 0), "");
3168 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3169 LLVMConstInt(ctx
->i32
,
3170 tess_outer_index
* 4, 0), "");
3172 for (i
= 0; i
< outer_comps
; i
++) {
3174 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3176 for (i
= 0; i
< inner_comps
; i
++) {
3177 inner
[i
] = out
[outer_comps
+i
] =
3178 lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3182 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3183 /* For isolines, the hardware expects tess factors in the
3184 * reverse order from what GLSL / TGSI specify.
3186 LLVMValueRef tmp
= out
[0];
3191 /* Convert the outputs to vectors for stores. */
3192 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3196 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3198 /* Get the buffer. */
3199 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3201 /* Get the offset. */
3202 tf_base
= LLVMGetParam(ctx
->main_fn
,
3203 ctx
->param_tcs_factor_offset
);
3204 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3205 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3207 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3208 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3209 rel_patch_id
, ctx
->i32_0
, ""));
3211 /* Store the dynamic HS control word. */
3213 if (ctx
->screen
->info
.chip_class
<= VI
) {
3214 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3215 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3216 1, ctx
->i32_0
, tf_base
,
3217 offset
, 1, 0, true, false);
3221 lp_build_endif(&inner_if_ctx
);
3223 /* Store the tessellation factors. */
3224 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3225 MIN2(stride
, 4), byteoffset
, tf_base
,
3226 offset
, 1, 0, true, false);
3229 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3230 stride
- 4, byteoffset
, tf_base
,
3231 offset
, 1, 0, true, false);
3233 /* Store the tess factors into the offchip buffer if TES reads them. */
3234 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3235 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3236 LLVMValueRef tf_inner_offset
;
3237 unsigned param_outer
, param_inner
;
3239 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3240 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3242 param_outer
= si_shader_io_get_unique_index_patch(
3243 TGSI_SEMANTIC_TESSOUTER
, 0);
3244 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3245 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3247 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
3248 util_next_power_of_two(outer_comps
));
3250 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3251 outer_comps
, tf_outer_offset
,
3252 base
, 0, 1, 0, true, false);
3254 param_inner
= si_shader_io_get_unique_index_patch(
3255 TGSI_SEMANTIC_TESSINNER
, 0);
3256 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3257 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3259 inner_vec
= inner_comps
== 1 ? inner
[0] :
3260 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3261 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3262 inner_comps
, tf_inner_offset
,
3263 base
, 0, 1, 0, true, false);
3267 lp_build_endif(&if_ctx
);
3271 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3272 unsigned param
, unsigned return_index
)
3274 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3275 LLVMGetParam(ctx
->main_fn
, param
),
3280 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3281 unsigned param
, unsigned return_index
)
3283 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3284 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3286 return LLVMBuildInsertValue(builder
, ret
,
3287 ac_to_float(&ctx
->ac
, p
),
3292 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3293 unsigned param
, unsigned return_index
)
3295 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3296 LLVMValueRef ptr
, lo
, hi
;
3298 if (HAVE_32BIT_POINTERS
) {
3299 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3300 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3301 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3304 ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3305 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i64
, "");
3306 ptr
= LLVMBuildBitCast(builder
, ptr
, ctx
->v2i32
, "");
3307 lo
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_0
, "");
3308 hi
= LLVMBuildExtractElement(builder
, ptr
, ctx
->i32_1
, "");
3309 ret
= LLVMBuildInsertValue(builder
, ret
, lo
, return_index
, "");
3310 return LLVMBuildInsertValue(builder
, ret
, hi
, return_index
+ 1, "");
3313 /* This only writes the tessellation factor levels. */
3314 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3315 unsigned max_outputs
,
3316 LLVMValueRef
*addrs
)
3318 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3319 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3320 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3321 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3323 si_copy_tcs_inputs(bld_base
);
3325 rel_patch_id
= get_rel_patch_id(ctx
);
3326 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3327 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3329 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3330 LLVMBasicBlockRef blocks
[2] = {
3331 LLVMGetInsertBlock(builder
),
3332 ctx
->merged_wrap_if_state
.entry_block
3334 LLVMValueRef values
[2];
3336 lp_build_endif(&ctx
->merged_wrap_if_state
);
3338 values
[0] = rel_patch_id
;
3339 values
[1] = LLVMGetUndef(ctx
->i32
);
3340 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3342 values
[0] = tf_lds_offset
;
3343 values
[1] = LLVMGetUndef(ctx
->i32
);
3344 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3346 values
[0] = invocation_id
;
3347 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3348 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3351 /* Return epilog parameters from this function. */
3352 LLVMValueRef ret
= ctx
->return_value
;
3355 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3356 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3357 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3358 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3359 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3360 /* Tess offchip and tess factor offsets are at the beginning. */
3361 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3362 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3363 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3365 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3366 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3367 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3368 GFX6_SGPR_TCS_OUT_LAYOUT
);
3369 /* Tess offchip and tess factor offsets are after user SGPRs. */
3370 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3371 GFX6_TCS_NUM_USER_SGPR
);
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3373 GFX6_TCS_NUM_USER_SGPR
+ 1);
3374 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3378 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3379 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3380 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3382 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3383 * the invocation_id output does not alias the tcs_rel_ids input,
3384 * which saves a V_MOV on gfx9.
3388 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3389 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3391 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3392 vgpr
++; /* skip the tess factor LDS offset */
3393 for (unsigned i
= 0; i
< 6; i
++) {
3394 LLVMValueRef value
=
3395 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3396 value
= ac_to_float(&ctx
->ac
, value
);
3397 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3400 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3402 ctx
->return_value
= ret
;
3405 /* Pass TCS inputs from LS to TCS on GFX9. */
3406 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3408 LLVMValueRef ret
= ctx
->return_value
;
3410 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3411 if (HAVE_32BIT_POINTERS
)
3412 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3413 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3414 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3415 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3416 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3418 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3419 8 + SI_SGPR_RW_BUFFERS
);
3420 ret
= si_insert_input_ptr(ctx
, ret
,
3421 ctx
->param_bindless_samplers_and_images
,
3422 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3424 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3425 8 + SI_SGPR_VS_STATE_BITS
);
3427 #if !HAVE_32BIT_POINTERS
3428 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 4,
3429 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3432 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3433 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3434 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3435 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3436 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3437 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3439 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3440 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3441 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3443 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3444 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3446 ctx
->return_value
= ret
;
3449 /* Pass GS inputs from ES to GS on GFX9. */
3450 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3452 LLVMValueRef ret
= ctx
->return_value
;
3454 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3455 if (HAVE_32BIT_POINTERS
)
3456 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3457 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3458 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3459 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3461 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3462 8 + SI_SGPR_RW_BUFFERS
);
3463 ret
= si_insert_input_ptr(ctx
, ret
,
3464 ctx
->param_bindless_samplers_and_images
,
3465 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3467 #if !HAVE_32BIT_POINTERS
3468 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
+ 4,
3469 8 + GFX9_SGPR_2ND_SAMPLERS_AND_IMAGES
);
3473 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3474 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3476 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3478 for (unsigned i
= 0; i
< 5; i
++) {
3479 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3480 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3482 ctx
->return_value
= ret
;
3485 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3486 unsigned max_outputs
,
3487 LLVMValueRef
*addrs
)
3489 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3490 struct si_shader
*shader
= ctx
->shader
;
3491 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3493 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3494 ctx
->param_rel_auto_id
);
3495 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3496 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3497 vertex_dw_stride
, "");
3499 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3500 * its inputs from it. */
3501 for (i
= 0; i
< info
->num_outputs
; i
++) {
3502 unsigned name
= info
->output_semantic_name
[i
];
3503 unsigned index
= info
->output_semantic_index
[i
];
3505 /* The ARB_shader_viewport_layer_array spec contains the
3508 * 2) What happens if gl_ViewportIndex or gl_Layer is
3509 * written in the vertex shader and a geometry shader is
3512 * RESOLVED: The value written by the last vertex processing
3513 * stage is used. If the last vertex processing stage
3514 * (vertex, tessellation evaluation or geometry) does not
3515 * statically assign to gl_ViewportIndex or gl_Layer, index
3516 * or layer zero is assumed.
3518 * So writes to those outputs in VS-as-LS are simply ignored.
3520 if (name
== TGSI_SEMANTIC_LAYER
||
3521 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3524 int param
= si_shader_io_get_unique_index(name
, index
, false);
3525 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3526 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3528 for (chan
= 0; chan
< 4; chan
++) {
3529 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3532 lds_store(ctx
, chan
, dw_addr
,
3533 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3537 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3538 si_set_ls_return_value_for_tcs(ctx
);
3541 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3542 unsigned max_outputs
,
3543 LLVMValueRef
*addrs
)
3545 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3546 struct si_shader
*es
= ctx
->shader
;
3547 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3548 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3549 ctx
->param_es2gs_offset
);
3550 LLVMValueRef lds_base
= NULL
;
3554 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3555 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3556 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3557 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3558 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3559 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3560 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3561 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3562 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3565 for (i
= 0; i
< info
->num_outputs
; i
++) {
3568 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3569 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3572 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3573 info
->output_semantic_index
[i
], false);
3575 for (chan
= 0; chan
< 4; chan
++) {
3576 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3579 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3580 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3582 /* GFX9 has the ESGS ring in LDS. */
3583 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3584 lds_store(ctx
, param
* 4 + chan
, lds_base
, out_val
);
3588 ac_build_buffer_store_dword(&ctx
->ac
,
3590 out_val
, 1, NULL
, soffset
,
3591 (4 * param
+ chan
) * 4,
3596 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3597 si_set_es_return_value_for_gs(ctx
);
3600 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3602 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3603 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3605 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3608 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3610 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3611 si_get_gs_wave_id(ctx
));
3613 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3614 lp_build_endif(&ctx
->merged_wrap_if_state
);
3617 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3618 unsigned max_outputs
,
3619 LLVMValueRef
*addrs
)
3621 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3622 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3624 assert(info
->num_outputs
<= max_outputs
);
3626 emit_gs_epilogue(ctx
);
3629 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3631 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3632 emit_gs_epilogue(ctx
);
3635 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3636 unsigned max_outputs
,
3637 LLVMValueRef
*addrs
)
3639 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3640 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3641 struct si_shader_output_values
*outputs
= NULL
;
3644 assert(!ctx
->shader
->is_gs_copy_shader
);
3645 assert(info
->num_outputs
<= max_outputs
);
3647 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3649 /* Vertex color clamping.
3651 * This uses a state constant loaded in a user data SGPR and
3652 * an IF statement is added that clamps all colors if the constant
3655 struct lp_build_if_state if_ctx
;
3656 LLVMValueRef cond
= NULL
;
3657 LLVMValueRef addr
, val
;
3659 for (i
= 0; i
< info
->num_outputs
; i
++) {
3660 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
3661 info
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
3664 /* We've found a color. */
3666 /* The state is in the first bit of the user SGPR. */
3667 cond
= LLVMGetParam(ctx
->main_fn
,
3668 ctx
->param_vs_state_bits
);
3669 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
,
3671 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
3674 for (j
= 0; j
< 4; j
++) {
3675 addr
= addrs
[4 * i
+ j
];
3676 val
= LLVMBuildLoad(ctx
->ac
.builder
, addr
, "");
3677 val
= ac_build_clamp(&ctx
->ac
, val
);
3678 LLVMBuildStore(ctx
->ac
.builder
, val
, addr
);
3683 lp_build_endif(&if_ctx
);
3685 for (i
= 0; i
< info
->num_outputs
; i
++) {
3686 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3687 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3689 for (j
= 0; j
< 4; j
++) {
3690 outputs
[i
].values
[j
] =
3691 LLVMBuildLoad(ctx
->ac
.builder
,
3694 outputs
[i
].vertex_stream
[j
] =
3695 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3699 if (ctx
->shader
->selector
->so
.num_outputs
)
3700 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3702 /* Export PrimitiveID. */
3703 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3704 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3705 outputs
[i
].semantic_index
= 0;
3706 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, get_primitive_id(ctx
, 0));
3707 for (j
= 1; j
< 4; j
++)
3708 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3710 memset(outputs
[i
].vertex_stream
, 0,
3711 sizeof(outputs
[i
].vertex_stream
));
3715 si_llvm_export_vs(ctx
, outputs
, i
);
3719 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3721 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3723 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3724 &ctx
->outputs
[0][0]);
3727 struct si_ps_exports
{
3729 struct ac_export_args args
[10];
3732 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3733 LLVMValueRef depth
, LLVMValueRef stencil
,
3734 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3736 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3737 struct ac_export_args args
;
3739 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3741 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3744 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3745 LLVMValueRef
*color
, unsigned index
,
3746 unsigned samplemask_param
,
3747 bool is_last
, struct si_ps_exports
*exp
)
3749 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3753 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3754 for (i
= 0; i
< 4; i
++)
3755 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3758 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3759 color
[3] = ctx
->ac
.f32_1
;
3763 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3764 si_alpha_test(bld_base
, color
[3]);
3766 /* Line & polygon smoothing */
3767 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3768 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3771 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3772 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3773 struct ac_export_args args
[8];
3776 /* Get the export arguments, also find out what the last one is. */
3777 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3778 si_llvm_init_export_args(ctx
, color
,
3779 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3780 if (args
[c
].enabled_channels
)
3784 /* Emit all exports. */
3785 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3786 if (is_last
&& last
== c
) {
3787 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3788 args
[c
].done
= 1; /* DONE bit */
3789 } else if (!args
[c
].enabled_channels
)
3790 continue; /* unnecessary NULL export */
3792 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3795 struct ac_export_args args
;
3798 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3801 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3802 args
.done
= 1; /* DONE bit */
3803 } else if (!args
.enabled_channels
)
3804 return; /* unnecessary NULL export */
3806 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3810 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3811 struct si_ps_exports
*exp
)
3813 for (unsigned i
= 0; i
< exp
->num
; i
++)
3814 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3818 * Return PS outputs in this order:
3820 * v[0:3] = color0.xyzw
3821 * v[4:7] = color1.xyzw
3826 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3828 * The alpha-ref SGPR is returned via its original location.
3830 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3831 unsigned max_outputs
,
3832 LLVMValueRef
*addrs
)
3834 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3835 struct si_shader
*shader
= ctx
->shader
;
3836 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3837 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3838 unsigned i
, j
, first_vgpr
, vgpr
;
3840 LLVMValueRef color
[8][4] = {};
3841 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3844 if (ctx
->postponed_kill
)
3845 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3847 /* Read the output values. */
3848 for (i
= 0; i
< info
->num_outputs
; i
++) {
3849 unsigned semantic_name
= info
->output_semantic_name
[i
];
3850 unsigned semantic_index
= info
->output_semantic_index
[i
];
3852 switch (semantic_name
) {
3853 case TGSI_SEMANTIC_COLOR
:
3854 assert(semantic_index
< 8);
3855 for (j
= 0; j
< 4; j
++) {
3856 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3857 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3858 color
[semantic_index
][j
] = result
;
3861 case TGSI_SEMANTIC_POSITION
:
3862 depth
= LLVMBuildLoad(builder
,
3863 addrs
[4 * i
+ 2], "");
3865 case TGSI_SEMANTIC_STENCIL
:
3866 stencil
= LLVMBuildLoad(builder
,
3867 addrs
[4 * i
+ 1], "");
3869 case TGSI_SEMANTIC_SAMPLEMASK
:
3870 samplemask
= LLVMBuildLoad(builder
,
3871 addrs
[4 * i
+ 0], "");
3874 fprintf(stderr
, "Warning: SI unhandled fs output type:%d\n",
3879 /* Fill the return structure. */
3880 ret
= ctx
->return_value
;
3883 ret
= LLVMBuildInsertValue(builder
, ret
,
3884 ac_to_integer(&ctx
->ac
,
3885 LLVMGetParam(ctx
->main_fn
,
3886 SI_PARAM_ALPHA_REF
)),
3887 SI_SGPR_ALPHA_REF
, "");
3890 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3891 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3895 for (j
= 0; j
< 4; j
++)
3896 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3899 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3901 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3903 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3905 /* Add the input sample mask for smoothing at the end. */
3906 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3907 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3908 ret
= LLVMBuildInsertValue(builder
, ret
,
3909 LLVMGetParam(ctx
->main_fn
,
3910 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3912 ctx
->return_value
= ret
;
3915 static void membar_emit(
3916 const struct lp_build_tgsi_action
*action
,
3917 struct lp_build_tgsi_context
*bld_base
,
3918 struct lp_build_emit_data
*emit_data
)
3920 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3921 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3922 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3923 unsigned waitcnt
= NOOP_WAITCNT
;
3925 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3926 waitcnt
&= VM_CNT
& LGKM_CNT
;
3928 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3929 TGSI_MEMBAR_SHADER_BUFFER
|
3930 TGSI_MEMBAR_SHADER_IMAGE
))
3933 if (flags
& TGSI_MEMBAR_SHARED
)
3934 waitcnt
&= LGKM_CNT
;
3936 if (waitcnt
!= NOOP_WAITCNT
)
3937 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3940 static void clock_emit(
3941 const struct lp_build_tgsi_action
*action
,
3942 struct lp_build_tgsi_context
*bld_base
,
3943 struct lp_build_emit_data
*emit_data
)
3945 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3946 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3948 emit_data
->output
[0] =
3949 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3950 emit_data
->output
[1] =
3951 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3954 static void si_llvm_emit_ddxy(
3955 const struct lp_build_tgsi_action
*action
,
3956 struct lp_build_tgsi_context
*bld_base
,
3957 struct lp_build_emit_data
*emit_data
)
3959 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3960 unsigned opcode
= emit_data
->info
->opcode
;
3965 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3966 mask
= AC_TID_MASK_LEFT
;
3967 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3968 mask
= AC_TID_MASK_TOP
;
3970 mask
= AC_TID_MASK_TOP_LEFT
;
3972 /* for DDX we want to next X pixel, DDY next Y pixel. */
3973 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3975 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3976 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3977 emit_data
->output
[emit_data
->chan
] = val
;
3981 * this takes an I,J coordinate pair,
3982 * and works out the X and Y derivatives.
3983 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
3985 static LLVMValueRef
si_llvm_emit_ddxy_interp(
3986 struct lp_build_tgsi_context
*bld_base
,
3987 LLVMValueRef interp_ij
)
3989 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3990 LLVMValueRef result
[4], a
;
3993 for (i
= 0; i
< 2; i
++) {
3994 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
3995 LLVMConstInt(ctx
->i32
, i
, 0), "");
3996 result
[i
] = ac_build_ddxy(&ctx
->ac
, AC_TID_MASK_TOP_LEFT
, 1,
3997 ac_to_integer(&ctx
->ac
, a
)); /* DDX */
3998 result
[2+i
] = ac_build_ddxy(&ctx
->ac
, AC_TID_MASK_TOP_LEFT
, 2,
3999 ac_to_integer(&ctx
->ac
, a
)); /* DDY */
4002 return ac_build_gather_values(&ctx
->ac
, result
, 4);
4005 static void interp_fetch_args(
4006 struct lp_build_tgsi_context
*bld_base
,
4007 struct lp_build_emit_data
*emit_data
)
4009 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4010 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4012 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4013 /* offset is in second src, first two channels */
4014 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
,
4017 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
,
4020 emit_data
->arg_count
= 2;
4021 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4022 LLVMValueRef sample_position
;
4023 LLVMValueRef sample_id
;
4024 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4026 /* fetch sample ID, then fetch its sample position,
4027 * and place into first two channels.
4029 sample_id
= lp_build_emit_fetch(bld_base
,
4030 emit_data
->inst
, 1, TGSI_CHAN_X
);
4031 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4033 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4034 * Language 4.50 spec says about interpolateAtSample:
4036 * "Returns the value of the input interpolant variable at
4037 * the location of sample number sample. If multisample
4038 * buffers are not available, the input variable will be
4039 * evaluated at the center of the pixel. If sample sample
4040 * does not exist, the position used to interpolate the
4041 * input variable is undefined."
4043 * This means that sample_id values outside of the valid are
4044 * in fact valid input, and the usual mechanism for loading the
4045 * sample position doesn't work.
4047 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4048 LLVMValueRef center
[4] = {
4049 LLVMConstReal(ctx
->f32
, 0.5),
4050 LLVMConstReal(ctx
->f32
, 0.5),
4055 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4057 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4060 emit_data
->args
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4064 emit_data
->args
[0] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[0], halfval
, "");
4065 emit_data
->args
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
,
4068 emit_data
->args
[1] = LLVMBuildFSub(ctx
->ac
.builder
, emit_data
->args
[1], halfval
, "");
4069 emit_data
->arg_count
= 2;
4073 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
4074 struct lp_build_tgsi_context
*bld_base
,
4075 struct lp_build_emit_data
*emit_data
)
4077 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4078 struct si_shader
*shader
= ctx
->shader
;
4079 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4080 LLVMValueRef interp_param
;
4081 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4082 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4083 int input_base
, input_array_size
;
4086 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4087 LLVMValueRef array_idx
;
4088 int interp_param_idx
;
4092 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4094 if (input
->Register
.Indirect
) {
4095 unsigned array_id
= input
->Indirect
.ArrayID
;
4098 input_base
= info
->input_array_first
[array_id
];
4099 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4101 input_base
= inst
->Src
[0].Register
.Index
;
4102 input_array_size
= info
->num_inputs
- input_base
;
4105 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4106 1, input
->Register
.Index
- input_base
);
4108 input_base
= inst
->Src
[0].Register
.Index
;
4109 input_array_size
= 1;
4110 array_idx
= ctx
->i32_0
;
4113 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4115 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4116 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4117 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4119 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4121 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4122 if (interp_param_idx
== -1)
4124 else if (interp_param_idx
)
4125 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4127 interp_param
= NULL
;
4129 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4130 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4131 LLVMValueRef ij_out
[2];
4132 LLVMValueRef ddxy_out
= si_llvm_emit_ddxy_interp(bld_base
, interp_param
);
4135 * take the I then J parameters, and the DDX/Y for it, and
4136 * calculate the IJ inputs for the interpolator.
4137 * temp1 = ddx * offset/sample.x + I;
4138 * interp_param.I = ddy * offset/sample.y + temp1;
4139 * temp1 = ddx * offset/sample.x + J;
4140 * interp_param.J = ddy * offset/sample.y + temp1;
4142 for (i
= 0; i
< 2; i
++) {
4143 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4144 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4145 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4146 ddxy_out
, ix_ll
, "");
4147 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4148 ddxy_out
, iy_ll
, "");
4149 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4150 interp_param
, ix_ll
, "");
4151 LLVMValueRef temp1
, temp2
;
4153 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4155 temp1
= LLVMBuildFMul(ctx
->ac
.builder
, ddx_el
, emit_data
->args
[0], "");
4157 temp1
= LLVMBuildFAdd(ctx
->ac
.builder
, temp1
, interp_el
, "");
4159 temp2
= LLVMBuildFMul(ctx
->ac
.builder
, ddy_el
, emit_data
->args
[1], "");
4161 ij_out
[i
] = LLVMBuildFAdd(ctx
->ac
.builder
, temp2
, temp1
, "");
4163 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4167 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4169 for (chan
= 0; chan
< 4; chan
++) {
4170 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4171 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4173 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4174 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4177 i
= LLVMBuildExtractElement(
4178 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4179 j
= LLVMBuildExtractElement(
4180 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4182 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4185 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4186 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4189 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4190 ctx
->ac
.builder
, gather
, array_idx
, "");
4194 static void vote_all_emit(
4195 const struct lp_build_tgsi_action
*action
,
4196 struct lp_build_tgsi_context
*bld_base
,
4197 struct lp_build_emit_data
*emit_data
)
4199 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4201 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4202 emit_data
->output
[emit_data
->chan
] =
4203 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4206 static void vote_any_emit(
4207 const struct lp_build_tgsi_action
*action
,
4208 struct lp_build_tgsi_context
*bld_base
,
4209 struct lp_build_emit_data
*emit_data
)
4211 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4213 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4214 emit_data
->output
[emit_data
->chan
] =
4215 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4218 static void vote_eq_emit(
4219 const struct lp_build_tgsi_action
*action
,
4220 struct lp_build_tgsi_context
*bld_base
,
4221 struct lp_build_emit_data
*emit_data
)
4223 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4225 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4226 emit_data
->output
[emit_data
->chan
] =
4227 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4230 static void ballot_emit(
4231 const struct lp_build_tgsi_action
*action
,
4232 struct lp_build_tgsi_context
*bld_base
,
4233 struct lp_build_emit_data
*emit_data
)
4235 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4236 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4239 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4240 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4241 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4243 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4244 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4247 static void read_invoc_fetch_args(
4248 struct lp_build_tgsi_context
*bld_base
,
4249 struct lp_build_emit_data
*emit_data
)
4251 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4252 0, emit_data
->src_chan
);
4254 /* Always read the source invocation (= lane) from the X channel. */
4255 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4257 emit_data
->arg_count
= 2;
4260 static void read_lane_emit(
4261 const struct lp_build_tgsi_action
*action
,
4262 struct lp_build_tgsi_context
*bld_base
,
4263 struct lp_build_emit_data
*emit_data
)
4265 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4267 /* We currently have no other way to prevent LLVM from lifting the icmp
4268 * calls to a dominating basic block.
4270 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4272 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4273 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4275 emit_data
->output
[emit_data
->chan
] =
4276 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4277 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4278 AC_FUNC_ATTR_READNONE
|
4279 AC_FUNC_ATTR_CONVERGENT
);
4282 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4283 struct lp_build_emit_data
*emit_data
)
4285 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4286 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4290 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4292 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4293 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4297 /* Emit one vertex from the geometry shader */
4298 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4300 LLVMValueRef
*addrs
)
4302 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4303 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4304 struct si_shader
*shader
= ctx
->shader
;
4305 struct lp_build_if_state if_state
;
4306 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4307 ctx
->param_gs2vs_offset
);
4308 LLVMValueRef gs_next_vertex
;
4309 LLVMValueRef can_emit
;
4310 unsigned chan
, offset
;
4313 /* Write vertex attribute values to GSVS ring */
4314 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4315 ctx
->gs_next_vertex
[stream
],
4318 /* If this thread has already emitted the declared maximum number of
4319 * vertices, skip the write: excessive vertex emissions are not
4320 * supposed to have any effect.
4322 * If the shader has no writes to memory, kill it instead. This skips
4323 * further memory loads and may allow LLVM to skip to the end
4326 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4327 LLVMConstInt(ctx
->i32
,
4328 shader
->selector
->gs_max_out_vertices
, 0), "");
4330 bool use_kill
= !info
->writes_memory
;
4332 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4334 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4338 for (i
= 0; i
< info
->num_outputs
; i
++) {
4339 for (chan
= 0; chan
< 4; chan
++) {
4340 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4341 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4344 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4345 LLVMValueRef voffset
=
4346 LLVMConstInt(ctx
->i32
, offset
*
4347 shader
->selector
->gs_max_out_vertices
, 0);
4350 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4351 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4352 LLVMConstInt(ctx
->i32
, 4, 0), "");
4354 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4356 ac_build_buffer_store_dword(&ctx
->ac
,
4357 ctx
->gsvs_ring
[stream
],
4359 voffset
, soffset
, 0,
4364 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4365 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4367 /* Signal vertex emission */
4368 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4369 si_get_gs_wave_id(ctx
));
4371 lp_build_endif(&if_state
);
4374 /* Emit one vertex from the geometry shader */
4375 static void si_tgsi_emit_vertex(
4376 const struct lp_build_tgsi_action
*action
,
4377 struct lp_build_tgsi_context
*bld_base
,
4378 struct lp_build_emit_data
*emit_data
)
4380 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4381 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4383 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4386 /* Cut one primitive from the geometry shader */
4387 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4390 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4392 /* Signal primitive cut */
4393 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4394 si_get_gs_wave_id(ctx
));
4397 /* Cut one primitive from the geometry shader */
4398 static void si_tgsi_emit_primitive(
4399 const struct lp_build_tgsi_action
*action
,
4400 struct lp_build_tgsi_context
*bld_base
,
4401 struct lp_build_emit_data
*emit_data
)
4403 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4405 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4408 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4409 struct lp_build_tgsi_context
*bld_base
,
4410 struct lp_build_emit_data
*emit_data
)
4412 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4414 /* SI only (thanks to a hw bug workaround):
4415 * The real barrier instruction isn’t needed, because an entire patch
4416 * always fits into a single wave.
4418 if (ctx
->screen
->info
.chip_class
== SI
&&
4419 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4420 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4424 ac_build_intrinsic(&ctx
->ac
,
4425 "llvm.amdgcn.s.barrier",
4426 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
4429 static const struct lp_build_tgsi_action interp_action
= {
4430 .fetch_args
= interp_fetch_args
,
4431 .emit
= build_interp_intrinsic
,
4434 static void si_create_function(struct si_shader_context
*ctx
,
4436 LLVMTypeRef
*returns
, unsigned num_returns
,
4437 struct si_function_info
*fninfo
,
4438 unsigned max_workgroup_size
)
4442 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4443 fninfo
->types
, fninfo
->num_params
);
4444 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4446 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4447 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4449 /* The combination of:
4453 * allows the optimization passes to move loads and reduces
4454 * SGPR spilling significantly.
4456 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4457 AC_FUNC_ATTR_INREG
);
4459 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4460 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4461 AC_FUNC_ATTR_NOALIAS
);
4462 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4466 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4467 if (fninfo
->assign
[i
])
4468 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4471 if (ctx
->screen
->info
.address32_hi
) {
4472 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4473 "amdgpu-32bit-address-high-bits",
4474 ctx
->screen
->info
.address32_hi
);
4477 if (max_workgroup_size
) {
4478 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4479 "amdgpu-max-work-group-size",
4480 max_workgroup_size
);
4482 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4483 "no-signed-zeros-fp-math",
4486 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4487 /* These were copied from some LLVM test. */
4488 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4489 "less-precise-fpmad",
4491 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4494 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4497 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4503 static void declare_streamout_params(struct si_shader_context
*ctx
,
4504 struct pipe_stream_output_info
*so
,
4505 struct si_function_info
*fninfo
)
4509 /* Streamout SGPRs. */
4510 if (so
->num_outputs
) {
4511 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4512 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4514 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4516 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4518 /* A streamout buffer offset is loaded if the stride is non-zero. */
4519 for (i
= 0; i
< 4; i
++) {
4523 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4527 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4529 switch (shader
->selector
->type
) {
4530 case PIPE_SHADER_TESS_CTRL
:
4531 /* Return this so that LLVM doesn't remove s_barrier
4532 * instructions on chips where we use s_barrier. */
4533 return shader
->selector
->screen
->info
.chip_class
>= CIK
? 128 : 64;
4535 case PIPE_SHADER_GEOMETRY
:
4536 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4538 case PIPE_SHADER_COMPUTE
:
4539 break; /* see below */
4545 const unsigned *properties
= shader
->selector
->info
.properties
;
4546 unsigned max_work_group_size
=
4547 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4548 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4549 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4551 if (!max_work_group_size
) {
4552 /* This is a variable group size compute shader,
4553 * compile it for the maximum possible group size.
4555 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4557 return max_work_group_size
;
4560 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4561 struct si_function_info
*fninfo
,
4564 LLVMTypeRef const_shader_buf_type
;
4566 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4567 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4568 const_shader_buf_type
= ctx
->f32
;
4570 const_shader_buf_type
= ctx
->v4i32
;
4572 unsigned const_and_shader_buffers
=
4573 add_arg(fninfo
, ARG_SGPR
,
4574 ac_array_in_const32_addr_space(const_shader_buf_type
));
4577 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4580 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4581 struct si_function_info
*fninfo
,
4584 unsigned samplers_and_images
=
4585 add_arg(fninfo
, ARG_SGPR
,
4586 ac_array_in_const32_addr_space(ctx
->v8i32
));
4589 ctx
->param_samplers_and_images
= samplers_and_images
;
4592 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4593 struct si_function_info
*fninfo
,
4596 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4597 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4600 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4601 struct si_function_info
*fninfo
)
4603 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4604 ac_array_in_const32_addr_space(ctx
->v4i32
));
4605 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4606 ac_array_in_const32_addr_space(ctx
->v8i32
));
4609 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4610 struct si_function_info
*fninfo
)
4612 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4613 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4614 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4615 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4618 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4619 struct si_function_info
*fninfo
,
4620 unsigned *num_prolog_vgprs
)
4622 struct si_shader
*shader
= ctx
->shader
;
4624 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4625 if (shader
->key
.as_ls
) {
4626 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4627 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4629 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4630 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4632 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4634 if (!shader
->is_gs_copy_shader
) {
4635 /* Vertex load indices. */
4636 ctx
->param_vertex_index0
= fninfo
->num_params
;
4637 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4638 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4639 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4643 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4644 struct si_function_info
*fninfo
)
4646 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4647 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4648 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4649 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4653 /* Convenient merged shader definitions. */
4654 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4655 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4658 static void create_function(struct si_shader_context
*ctx
)
4660 struct si_shader
*shader
= ctx
->shader
;
4661 struct si_function_info fninfo
;
4662 LLVMTypeRef returns
[16+32*4];
4663 unsigned i
, num_return_sgprs
;
4664 unsigned num_returns
= 0;
4665 unsigned num_prolog_vgprs
= 0;
4666 unsigned type
= ctx
->type
;
4667 unsigned vs_blit_property
=
4668 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4670 si_init_function_info(&fninfo
);
4672 /* Set MERGED shaders. */
4673 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4674 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4675 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4676 else if (shader
->key
.as_es
|| type
== PIPE_SHADER_GEOMETRY
)
4677 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4680 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4683 case PIPE_SHADER_VERTEX
:
4684 declare_global_desc_pointers(ctx
, &fninfo
);
4686 if (vs_blit_property
) {
4687 ctx
->param_vs_blit_inputs
= fninfo
.num_params
;
4688 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4689 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4690 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4692 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4693 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4694 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4695 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4696 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4697 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4698 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4699 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4700 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4701 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4702 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4703 add_arg(&fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4707 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4711 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4712 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4713 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4714 ac_array_in_const32_addr_space(ctx
->v4i32
));
4716 if (shader
->key
.as_es
) {
4717 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4718 } else if (shader
->key
.as_ls
) {
4719 /* no extra parameters */
4721 if (shader
->is_gs_copy_shader
) {
4722 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4723 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4726 /* The locations of the other parameters are assigned dynamically. */
4727 declare_streamout_params(ctx
, &shader
->selector
->so
,
4732 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4735 case PIPE_SHADER_TESS_CTRL
: /* SI-CI-VI */
4736 declare_global_desc_pointers(ctx
, &fninfo
);
4737 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4738 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4739 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4740 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4741 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4742 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4743 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4746 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4747 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4749 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4750 * placed after the user SGPRs.
4752 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4753 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4754 for (i
= 0; i
< 11; i
++)
4755 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4758 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4759 /* Merged stages have 8 system SGPRs at the beginning. */
4760 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4761 if (HAVE_32BIT_POINTERS
) {
4762 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4763 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4765 declare_const_and_shader_buffers(ctx
, &fninfo
,
4766 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4768 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4769 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4770 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4771 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4772 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4773 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4775 declare_global_desc_pointers(ctx
, &fninfo
);
4776 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4777 ctx
->type
== PIPE_SHADER_VERTEX
);
4778 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4780 if (!HAVE_32BIT_POINTERS
) {
4781 declare_samplers_and_images(ctx
, &fninfo
,
4782 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4784 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4785 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4786 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4787 if (!HAVE_32BIT_POINTERS
) /* Align to 2 dwords. */
4788 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4789 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4790 ac_array_in_const32_addr_space(ctx
->v4i32
));
4792 /* VGPRs (first TCS, then VS) */
4793 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4794 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4796 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4797 declare_vs_input_vgprs(ctx
, &fninfo
,
4800 /* LS return values are inputs to the TCS main shader part. */
4801 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4802 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4803 for (i
= 0; i
< 2; i
++)
4804 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4806 /* TCS return values are inputs to the TCS epilog.
4808 * param_tcs_offchip_offset, param_tcs_factor_offset,
4809 * param_tcs_offchip_layout, and param_rw_buffers
4810 * should be passed to the epilog.
4812 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4813 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4814 for (i
= 0; i
< 11; i
++)
4815 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4819 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4820 /* Merged stages have 8 system SGPRs at the beginning. */
4821 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4822 if (HAVE_32BIT_POINTERS
) {
4823 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4824 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4826 declare_const_and_shader_buffers(ctx
, &fninfo
,
4827 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4829 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4830 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4832 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4833 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4834 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4836 declare_global_desc_pointers(ctx
, &fninfo
);
4837 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4838 (ctx
->type
== PIPE_SHADER_VERTEX
||
4839 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4840 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4841 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4843 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4844 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4845 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4846 /* Declare as many input SGPRs as the VS has. */
4847 if (!HAVE_32BIT_POINTERS
)
4848 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4851 if (!HAVE_32BIT_POINTERS
) {
4852 declare_samplers_and_images(ctx
, &fninfo
,
4853 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4855 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4856 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4857 ac_array_in_const32_addr_space(ctx
->v4i32
));
4860 /* VGPRs (first GS, then VS/TES) */
4861 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4862 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4863 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4864 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4865 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4867 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4868 declare_vs_input_vgprs(ctx
, &fninfo
,
4870 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4871 declare_tes_input_vgprs(ctx
, &fninfo
);
4874 if (ctx
->type
== PIPE_SHADER_VERTEX
||
4875 ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4876 unsigned num_user_sgprs
;
4878 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4879 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4881 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4883 /* ES return values are inputs to GS. */
4884 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4885 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4886 for (i
= 0; i
< 5; i
++)
4887 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4891 case PIPE_SHADER_TESS_EVAL
:
4892 declare_global_desc_pointers(ctx
, &fninfo
);
4893 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4894 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4895 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4896 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4898 if (shader
->key
.as_es
) {
4899 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4900 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4901 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4903 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4904 declare_streamout_params(ctx
, &shader
->selector
->so
,
4906 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4910 declare_tes_input_vgprs(ctx
, &fninfo
);
4913 case PIPE_SHADER_GEOMETRY
:
4914 declare_global_desc_pointers(ctx
, &fninfo
);
4915 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4916 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4917 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4920 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4921 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4922 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4923 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4924 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4925 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4926 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4927 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4930 case PIPE_SHADER_FRAGMENT
:
4931 declare_global_desc_pointers(ctx
, &fninfo
);
4932 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4933 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4934 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4935 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4937 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4938 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4939 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4940 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4941 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4942 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4943 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4944 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4945 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4946 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4947 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4948 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4949 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4950 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4951 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4952 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4953 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4954 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4955 shader
->info
.face_vgpr_index
= 20;
4956 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4957 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4958 shader
->info
.ancillary_vgpr_index
= 21;
4959 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4960 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4961 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4963 /* Color inputs from the prolog. */
4964 if (shader
->selector
->info
.colors_read
) {
4965 unsigned num_color_elements
=
4966 util_bitcount(shader
->selector
->info
.colors_read
);
4968 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4969 for (i
= 0; i
< num_color_elements
; i
++)
4970 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4972 num_prolog_vgprs
+= num_color_elements
;
4975 /* Outputs for the epilog. */
4976 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4979 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4980 shader
->selector
->info
.writes_z
+
4981 shader
->selector
->info
.writes_stencil
+
4982 shader
->selector
->info
.writes_samplemask
+
4983 1 /* SampleMaskIn */;
4985 num_returns
= MAX2(num_returns
,
4987 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4989 for (i
= 0; i
< num_return_sgprs
; i
++)
4990 returns
[i
] = ctx
->i32
;
4991 for (; i
< num_returns
; i
++)
4992 returns
[i
] = ctx
->f32
;
4995 case PIPE_SHADER_COMPUTE
:
4996 declare_global_desc_pointers(ctx
, &fninfo
);
4997 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4998 if (shader
->selector
->info
.uses_grid_size
)
4999 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
5000 if (shader
->selector
->info
.uses_block_size
)
5001 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
5003 for (i
= 0; i
< 3; i
++) {
5004 ctx
->abi
.workgroup_ids
[i
] = NULL
;
5005 if (shader
->selector
->info
.uses_block_id
[i
])
5006 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
5009 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5012 assert(0 && "unimplemented shader");
5016 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5017 si_get_max_workgroup_size(shader
));
5019 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5020 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
5021 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5022 "InitialPSInputAddr",
5023 S_0286D0_PERSP_SAMPLE_ENA(1) |
5024 S_0286D0_PERSP_CENTER_ENA(1) |
5025 S_0286D0_PERSP_CENTROID_ENA(1) |
5026 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5027 S_0286D0_LINEAR_CENTER_ENA(1) |
5028 S_0286D0_LINEAR_CENTROID_ENA(1) |
5029 S_0286D0_FRONT_FACE_ENA(1) |
5030 S_0286D0_ANCILLARY_ENA(1) |
5031 S_0286D0_POS_FIXED_PT_ENA(1));
5034 shader
->info
.num_input_sgprs
= 0;
5035 shader
->info
.num_input_vgprs
= 0;
5037 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5038 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5040 for (; i
< fninfo
.num_params
; ++i
)
5041 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5043 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5044 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5046 if (shader
->key
.as_ls
||
5047 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
5048 /* GFX9 has the ESGS ring buffer in LDS. */
5049 type
== SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
)
5050 ac_declare_lds_as_pointer(&ctx
->ac
);
5054 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5057 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5059 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5061 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5062 ctx
->param_rw_buffers
);
5064 if (ctx
->screen
->info
.chip_class
<= VI
&&
5065 (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
)) {
5067 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5069 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5072 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5075 if (ctx
->shader
->is_gs_copy_shader
) {
5076 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5079 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5080 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5081 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5082 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5083 LLVMValueRef base_ring
;
5085 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5087 /* The conceptual layout of the GSVS ring is
5088 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5089 * but the real memory layout is swizzled across
5091 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5093 * Override the buffer descriptor accordingly.
5095 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5096 uint64_t stream_offset
= 0;
5098 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5099 unsigned num_components
;
5101 unsigned num_records
;
5102 LLVMValueRef ring
, tmp
;
5104 num_components
= sel
->info
.num_stream_output_components
[stream
];
5105 if (!num_components
)
5108 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5110 /* Limit on the stride field for <= CIK. */
5111 assert(stride
< (1 << 14));
5115 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5116 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5117 tmp
= LLVMBuildAdd(builder
, tmp
,
5118 LLVMConstInt(ctx
->i64
,
5119 stream_offset
, 0), "");
5120 stream_offset
+= stride
* 64;
5122 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5123 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5124 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5125 tmp
= LLVMBuildOr(builder
, tmp
,
5126 LLVMConstInt(ctx
->i32
,
5127 S_008F04_STRIDE(stride
) |
5128 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5129 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5130 ring
= LLVMBuildInsertElement(builder
, ring
,
5131 LLVMConstInt(ctx
->i32
, num_records
, 0),
5132 LLVMConstInt(ctx
->i32
, 2, 0), "");
5133 ring
= LLVMBuildInsertElement(builder
, ring
,
5134 LLVMConstInt(ctx
->i32
,
5135 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5136 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5137 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5138 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5139 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5140 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5141 S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */
5142 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5143 S_008F0C_ADD_TID_ENABLE(1),
5145 LLVMConstInt(ctx
->i32
, 3, 0), "");
5147 ctx
->gsvs_ring
[stream
] = ring
;
5149 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5150 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5154 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5155 LLVMValueRef param_rw_buffers
,
5156 unsigned param_pos_fixed_pt
)
5158 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5159 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5161 /* Use the fixed-point gl_FragCoord input.
5162 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5163 * per coordinate to get the repeating effect.
5165 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5166 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5168 /* Load the buffer descriptor. */
5169 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5170 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5172 /* The stipple pattern is 32x32, each row has 32 bits. */
5173 offset
= LLVMBuildMul(builder
, address
[1],
5174 LLVMConstInt(ctx
->i32
, 4, 0), "");
5175 row
= buffer_load_const(ctx
, desc
, offset
);
5176 row
= ac_to_integer(&ctx
->ac
, row
);
5177 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5178 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5179 ac_build_kill_if_false(&ctx
->ac
, bit
);
5182 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
5183 struct si_shader_config
*conf
,
5184 unsigned symbol_offset
)
5187 const unsigned char *config
=
5188 ac_shader_binary_config_start(binary
, symbol_offset
);
5189 bool really_needs_scratch
= false;
5191 /* LLVM adds SGPR spills to the scratch size.
5192 * Find out if we really need the scratch buffer.
5194 for (i
= 0; i
< binary
->reloc_count
; i
++) {
5195 const struct ac_shader_reloc
*reloc
= &binary
->relocs
[i
];
5197 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
) ||
5198 !strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5199 really_needs_scratch
= true;
5204 /* XXX: We may be able to emit some of these values directly rather than
5205 * extracting fields to be emitted later.
5208 for (i
= 0; i
< binary
->config_size_per_symbol
; i
+= 8) {
5209 unsigned reg
= util_le32_to_cpu(*(uint32_t*)(config
+ i
));
5210 unsigned value
= util_le32_to_cpu(*(uint32_t*)(config
+ i
+ 4));
5212 case R_00B028_SPI_SHADER_PGM_RSRC1_PS
:
5213 case R_00B128_SPI_SHADER_PGM_RSRC1_VS
:
5214 case R_00B228_SPI_SHADER_PGM_RSRC1_GS
:
5215 case R_00B428_SPI_SHADER_PGM_RSRC1_HS
:
5216 case R_00B848_COMPUTE_PGM_RSRC1
:
5217 conf
->num_sgprs
= MAX2(conf
->num_sgprs
, (G_00B028_SGPRS(value
) + 1) * 8);
5218 conf
->num_vgprs
= MAX2(conf
->num_vgprs
, (G_00B028_VGPRS(value
) + 1) * 4);
5219 conf
->float_mode
= G_00B028_FLOAT_MODE(value
);
5220 conf
->rsrc1
= value
;
5222 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS
:
5223 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B02C_EXTRA_LDS_SIZE(value
));
5225 case R_00B84C_COMPUTE_PGM_RSRC2
:
5226 conf
->lds_size
= MAX2(conf
->lds_size
, G_00B84C_LDS_SIZE(value
));
5227 conf
->rsrc2
= value
;
5229 case R_0286CC_SPI_PS_INPUT_ENA
:
5230 conf
->spi_ps_input_ena
= value
;
5232 case R_0286D0_SPI_PS_INPUT_ADDR
:
5233 conf
->spi_ps_input_addr
= value
;
5235 case R_0286E8_SPI_TMPRING_SIZE
:
5236 case R_00B860_COMPUTE_TMPRING_SIZE
:
5237 /* WAVESIZE is in units of 256 dwords. */
5238 if (really_needs_scratch
)
5239 conf
->scratch_bytes_per_wave
=
5240 G_00B860_WAVESIZE(value
) * 256 * 4;
5242 case 0x4: /* SPILLED_SGPRS */
5243 conf
->spilled_sgprs
= value
;
5245 case 0x8: /* SPILLED_VGPRS */
5246 conf
->spilled_vgprs
= value
;
5250 static bool printed
;
5253 fprintf(stderr
, "Warning: LLVM emitted unknown "
5254 "config register: 0x%x\n", reg
);
5262 if (!conf
->spi_ps_input_addr
)
5263 conf
->spi_ps_input_addr
= conf
->spi_ps_input_ena
;
5266 void si_shader_apply_scratch_relocs(struct si_shader
*shader
,
5267 uint64_t scratch_va
)
5270 uint32_t scratch_rsrc_dword0
= scratch_va
;
5271 uint32_t scratch_rsrc_dword1
=
5272 S_008F04_BASE_ADDRESS_HI(scratch_va
>> 32);
5274 /* Enable scratch coalescing. */
5275 scratch_rsrc_dword1
|= S_008F04_SWIZZLE_ENABLE(1);
5277 for (i
= 0 ; i
< shader
->binary
.reloc_count
; i
++) {
5278 const struct ac_shader_reloc
*reloc
=
5279 &shader
->binary
.relocs
[i
];
5280 if (!strcmp(scratch_rsrc_dword0_symbol
, reloc
->name
)) {
5281 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5282 &scratch_rsrc_dword0
, 4);
5283 } else if (!strcmp(scratch_rsrc_dword1_symbol
, reloc
->name
)) {
5284 util_memcpy_cpu_to_le32(shader
->binary
.code
+ reloc
->offset
,
5285 &scratch_rsrc_dword1
, 4);
5290 /* For the UMR disassembler. */
5291 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5292 #define DEBUGGER_NUM_MARKERS 5
5294 static unsigned si_get_shader_binary_size(const struct si_shader
*shader
)
5296 unsigned size
= shader
->binary
.code_size
;
5299 size
+= shader
->prolog
->binary
.code_size
;
5300 if (shader
->previous_stage
)
5301 size
+= shader
->previous_stage
->binary
.code_size
;
5302 if (shader
->prolog2
)
5303 size
+= shader
->prolog2
->binary
.code_size
;
5305 size
+= shader
->epilog
->binary
.code_size
;
5306 return size
+ DEBUGGER_NUM_MARKERS
* 4;
5309 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
)
5311 const struct ac_shader_binary
*prolog
=
5312 shader
->prolog
? &shader
->prolog
->binary
: NULL
;
5313 const struct ac_shader_binary
*previous_stage
=
5314 shader
->previous_stage
? &shader
->previous_stage
->binary
: NULL
;
5315 const struct ac_shader_binary
*prolog2
=
5316 shader
->prolog2
? &shader
->prolog2
->binary
: NULL
;
5317 const struct ac_shader_binary
*epilog
=
5318 shader
->epilog
? &shader
->epilog
->binary
: NULL
;
5319 const struct ac_shader_binary
*mainb
= &shader
->binary
;
5320 unsigned bo_size
= si_get_shader_binary_size(shader
) +
5321 (!epilog
? mainb
->rodata_size
: 0);
5324 assert(!prolog
|| !prolog
->rodata_size
);
5325 assert(!previous_stage
|| !previous_stage
->rodata_size
);
5326 assert(!prolog2
|| !prolog2
->rodata_size
);
5327 assert((!prolog
&& !previous_stage
&& !prolog2
&& !epilog
) ||
5328 !mainb
->rodata_size
);
5329 assert(!epilog
|| !epilog
->rodata_size
);
5331 r600_resource_reference(&shader
->bo
, NULL
);
5332 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5333 sscreen
->cpdma_prefetch_writes_memory
?
5334 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5335 PIPE_USAGE_IMMUTABLE
,
5336 align(bo_size
, SI_CPDMA_ALIGNMENT
),
5342 ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5343 PIPE_TRANSFER_READ_WRITE
|
5344 PIPE_TRANSFER_UNSYNCHRONIZED
);
5346 /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are
5347 * endian-independent. */
5349 memcpy(ptr
, prolog
->code
, prolog
->code_size
);
5350 ptr
+= prolog
->code_size
;
5352 if (previous_stage
) {
5353 memcpy(ptr
, previous_stage
->code
, previous_stage
->code_size
);
5354 ptr
+= previous_stage
->code_size
;
5357 memcpy(ptr
, prolog2
->code
, prolog2
->code_size
);
5358 ptr
+= prolog2
->code_size
;
5361 memcpy(ptr
, mainb
->code
, mainb
->code_size
);
5362 ptr
+= mainb
->code_size
;
5365 memcpy(ptr
, epilog
->code
, epilog
->code_size
);
5366 ptr
+= epilog
->code_size
;
5367 } else if (mainb
->rodata_size
> 0) {
5368 memcpy(ptr
, mainb
->rodata
, mainb
->rodata_size
);
5369 ptr
+= mainb
->rodata_size
;
5372 /* Add end-of-code markers for the UMR disassembler. */
5373 uint32_t *ptr32
= (uint32_t*)ptr
;
5374 for (unsigned i
= 0; i
< DEBUGGER_NUM_MARKERS
; i
++)
5375 ptr32
[i
] = DEBUGGER_END_OF_CODE_MARKER
;
5377 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5381 static void si_shader_dump_disassembly(const struct ac_shader_binary
*binary
,
5382 struct pipe_debug_callback
*debug
,
5383 const char *name
, FILE *file
)
5388 if (binary
->disasm_string
) {
5389 fprintf(file
, "Shader %s disassembly:\n", name
);
5390 fprintf(file
, "%s", binary
->disasm_string
);
5392 if (debug
&& debug
->debug_message
) {
5393 /* Very long debug messages are cut off, so send the
5394 * disassembly one line at a time. This causes more
5395 * overhead, but on the plus side it simplifies
5396 * parsing of resulting logs.
5398 pipe_debug_message(debug
, SHADER_INFO
,
5399 "Shader Disassembly Begin");
5401 line
= binary
->disasm_string
;
5403 p
= util_strchrnul(line
, '\n');
5407 pipe_debug_message(debug
, SHADER_INFO
,
5408 "%.*s", count
, line
);
5416 pipe_debug_message(debug
, SHADER_INFO
,
5417 "Shader Disassembly End");
5420 fprintf(file
, "Shader %s binary:\n", name
);
5421 for (i
= 0; i
< binary
->code_size
; i
+= 4) {
5422 fprintf(file
, "@0x%x: %02x%02x%02x%02x\n", i
,
5423 binary
->code
[i
+ 3], binary
->code
[i
+ 2],
5424 binary
->code
[i
+ 1], binary
->code
[i
]);
5429 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5431 struct si_screen
*sscreen
= shader
->selector
->screen
;
5432 struct si_shader_config
*conf
= &shader
->config
;
5433 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5434 unsigned lds_increment
= sscreen
->info
.chip_class
>= CIK
? 512 : 256;
5435 unsigned lds_per_wave
= 0;
5436 unsigned max_simd_waves
;
5438 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5440 /* Compute LDS usage for PS. */
5441 switch (shader
->selector
->type
) {
5442 case PIPE_SHADER_FRAGMENT
:
5443 /* The minimum usage per wave is (num_inputs * 48). The maximum
5444 * usage is (num_inputs * 48 * 16).
5445 * We can get anything in between and it varies between waves.
5447 * The 48 bytes per input for a single primitive is equal to
5448 * 4 bytes/component * 4 components/input * 3 points.
5450 * Other stages don't know the size at compile time or don't
5451 * allocate LDS per wave, but instead they do it per thread group.
5453 lds_per_wave
= conf
->lds_size
* lds_increment
+
5454 align(num_inputs
* 48, lds_increment
);
5456 case PIPE_SHADER_COMPUTE
:
5457 if (shader
->selector
) {
5458 unsigned max_workgroup_size
=
5459 si_get_max_workgroup_size(shader
);
5460 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5461 DIV_ROUND_UP(max_workgroup_size
, 64);
5466 /* Compute the per-SIMD wave counts. */
5467 if (conf
->num_sgprs
) {
5468 if (sscreen
->info
.chip_class
>= VI
)
5469 max_simd_waves
= MIN2(max_simd_waves
, 800 / conf
->num_sgprs
);
5471 max_simd_waves
= MIN2(max_simd_waves
, 512 / conf
->num_sgprs
);
5474 if (conf
->num_vgprs
)
5475 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5477 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5478 * 16KB makes some SIMDs unoccupied). */
5480 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5482 conf
->max_simd_waves
= max_simd_waves
;
5485 void si_shader_dump_stats_for_shader_db(const struct si_shader
*shader
,
5486 struct pipe_debug_callback
*debug
)
5488 const struct si_shader_config
*conf
= &shader
->config
;
5490 pipe_debug_message(debug
, SHADER_INFO
,
5491 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5492 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5493 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5494 conf
->num_sgprs
, conf
->num_vgprs
,
5495 si_get_shader_binary_size(shader
),
5496 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5497 conf
->max_simd_waves
, conf
->spilled_sgprs
,
5498 conf
->spilled_vgprs
, conf
->private_mem_vgprs
);
5501 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5502 const struct si_shader
*shader
,
5505 bool check_debug_option
)
5507 const struct si_shader_config
*conf
= &shader
->config
;
5509 if (!check_debug_option
||
5510 si_can_dump_shader(sscreen
, processor
)) {
5511 if (processor
== PIPE_SHADER_FRAGMENT
) {
5512 fprintf(file
, "*** SHADER CONFIG ***\n"
5513 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5514 "SPI_PS_INPUT_ENA = 0x%04x\n",
5515 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5518 fprintf(file
, "*** SHADER STATS ***\n"
5521 "Spilled SGPRs: %d\n"
5522 "Spilled VGPRs: %d\n"
5523 "Private memory VGPRs: %d\n"
5524 "Code Size: %d bytes\n"
5526 "Scratch: %d bytes per wave\n"
5528 "********************\n\n\n",
5529 conf
->num_sgprs
, conf
->num_vgprs
,
5530 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5531 conf
->private_mem_vgprs
,
5532 si_get_shader_binary_size(shader
),
5533 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5534 conf
->max_simd_waves
);
5538 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5540 switch (processor
) {
5541 case PIPE_SHADER_VERTEX
:
5542 if (shader
->key
.as_es
)
5543 return "Vertex Shader as ES";
5544 else if (shader
->key
.as_ls
)
5545 return "Vertex Shader as LS";
5547 return "Vertex Shader as VS";
5548 case PIPE_SHADER_TESS_CTRL
:
5549 return "Tessellation Control Shader";
5550 case PIPE_SHADER_TESS_EVAL
:
5551 if (shader
->key
.as_es
)
5552 return "Tessellation Evaluation Shader as ES";
5554 return "Tessellation Evaluation Shader as VS";
5555 case PIPE_SHADER_GEOMETRY
:
5556 if (shader
->is_gs_copy_shader
)
5557 return "GS Copy Shader as VS";
5559 return "Geometry Shader";
5560 case PIPE_SHADER_FRAGMENT
:
5561 return "Pixel Shader";
5562 case PIPE_SHADER_COMPUTE
:
5563 return "Compute Shader";
5565 return "Unknown Shader";
5569 void si_shader_dump(struct si_screen
*sscreen
, const struct si_shader
*shader
,
5570 struct pipe_debug_callback
*debug
, unsigned processor
,
5571 FILE *file
, bool check_debug_option
)
5573 if (!check_debug_option
||
5574 si_can_dump_shader(sscreen
, processor
))
5575 si_dump_shader_key(processor
, shader
, file
);
5577 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5578 if (shader
->previous_stage
&&
5579 shader
->previous_stage
->binary
.llvm_ir_string
) {
5580 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5581 si_get_shader_name(shader
, processor
));
5582 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5585 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5586 si_get_shader_name(shader
, processor
));
5587 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5590 if (!check_debug_option
||
5591 (si_can_dump_shader(sscreen
, processor
) &&
5592 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5593 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5596 si_shader_dump_disassembly(&shader
->prolog
->binary
,
5597 debug
, "prolog", file
);
5598 if (shader
->previous_stage
)
5599 si_shader_dump_disassembly(&shader
->previous_stage
->binary
,
5600 debug
, "previous stage", file
);
5601 if (shader
->prolog2
)
5602 si_shader_dump_disassembly(&shader
->prolog2
->binary
,
5603 debug
, "prolog2", file
);
5605 si_shader_dump_disassembly(&shader
->binary
, debug
, "main", file
);
5608 si_shader_dump_disassembly(&shader
->epilog
->binary
,
5609 debug
, "epilog", file
);
5610 fprintf(file
, "\n");
5613 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5614 check_debug_option
);
5617 static int si_compile_llvm(struct si_screen
*sscreen
,
5618 struct ac_shader_binary
*binary
,
5619 struct si_shader_config
*conf
,
5620 struct ac_llvm_compiler
*compiler
,
5622 struct pipe_debug_callback
*debug
,
5625 bool less_optimized
)
5628 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5630 if (si_can_dump_shader(sscreen
, processor
)) {
5631 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5633 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5634 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5635 ac_dump_module(mod
);
5636 fprintf(stderr
, "\n");
5640 if (sscreen
->record_llvm_ir
) {
5641 char *ir
= LLVMPrintModuleToString(mod
);
5642 binary
->llvm_ir_string
= strdup(ir
);
5643 LLVMDisposeMessage(ir
);
5646 if (!si_replace_shader(count
, binary
)) {
5647 r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5653 si_shader_binary_read_config(binary
, conf
, 0);
5655 /* Enable 64-bit and 16-bit denormals, because there is no performance
5658 * If denormals are enabled, all floating-point output modifiers are
5661 * Don't enable denormals for 32-bit floats, because:
5662 * - Floating-point output modifiers would be ignored by the hw.
5663 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5664 * have to stop using those.
5665 * - SI & CI would be very slow.
5667 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5669 FREE(binary
->config
);
5670 FREE(binary
->global_symbol_offsets
);
5671 binary
->config
= NULL
;
5672 binary
->global_symbol_offsets
= NULL
;
5674 /* Some shaders can't have rodata because their binaries can be
5677 if (binary
->rodata_size
&&
5678 (processor
== PIPE_SHADER_VERTEX
||
5679 processor
== PIPE_SHADER_TESS_CTRL
||
5680 processor
== PIPE_SHADER_TESS_EVAL
||
5681 processor
== PIPE_SHADER_FRAGMENT
)) {
5682 fprintf(stderr
, "radeonsi: The shader can't have rodata.");
5689 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5691 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5692 LLVMBuildRetVoid(ctx
->ac
.builder
);
5694 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5697 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5699 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5700 struct ac_llvm_compiler
*compiler
,
5701 struct si_shader_selector
*gs_selector
,
5702 struct pipe_debug_callback
*debug
)
5704 struct si_shader_context ctx
;
5705 struct si_shader
*shader
;
5706 LLVMBuilderRef builder
;
5707 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5708 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5712 shader
= CALLOC_STRUCT(si_shader
);
5716 /* We can leave the fence as permanently signaled because the GS copy
5717 * shader only becomes visible globally after it has been compiled. */
5718 util_queue_fence_init(&shader
->ready
);
5720 shader
->selector
= gs_selector
;
5721 shader
->is_gs_copy_shader
= true;
5723 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5724 ctx
.shader
= shader
;
5725 ctx
.type
= PIPE_SHADER_VERTEX
;
5727 builder
= ctx
.ac
.builder
;
5729 create_function(&ctx
);
5730 preload_ring_buffers(&ctx
);
5732 LLVMValueRef voffset
=
5733 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5734 LLVMConstInt(ctx
.i32
, 4, 0), "");
5736 /* Fetch the vertex stream ID.*/
5737 LLVMValueRef stream_id
;
5739 if (gs_selector
->so
.num_outputs
)
5740 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5742 stream_id
= ctx
.i32_0
;
5744 /* Fill in output information. */
5745 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5746 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5747 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5749 for (int chan
= 0; chan
< 4; chan
++) {
5750 outputs
[i
].vertex_stream
[chan
] =
5751 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5755 LLVMBasicBlockRef end_bb
;
5756 LLVMValueRef switch_inst
;
5758 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5759 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5761 for (int stream
= 0; stream
< 4; stream
++) {
5762 LLVMBasicBlockRef bb
;
5765 if (!gsinfo
->num_stream_output_components
[stream
])
5768 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5771 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5772 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5773 LLVMPositionBuilderAtEnd(builder
, bb
);
5775 /* Fetch vertex data from GSVS ring */
5777 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5778 for (unsigned chan
= 0; chan
< 4; chan
++) {
5779 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5780 outputs
[i
].vertex_stream
[chan
] != stream
) {
5781 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5785 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5786 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5789 outputs
[i
].values
[chan
] =
5790 ac_build_buffer_load(&ctx
.ac
,
5791 ctx
.gsvs_ring
[0], 1,
5798 /* Streamout and exports. */
5799 if (gs_selector
->so
.num_outputs
) {
5800 si_llvm_emit_streamout(&ctx
, outputs
,
5801 gsinfo
->num_outputs
,
5806 /* Vertex color clamping.
5808 * This uses a state constant loaded in a user data SGPR and
5809 * an IF statement is added that clamps all colors if the constant
5812 struct lp_build_if_state if_ctx
;
5813 LLVMValueRef v
[2], cond
= NULL
;
5814 LLVMBasicBlockRef blocks
[2];
5816 for (unsigned i
= 0; i
< gsinfo
->num_outputs
; i
++) {
5817 if (gsinfo
->output_semantic_name
[i
] != TGSI_SEMANTIC_COLOR
&&
5818 gsinfo
->output_semantic_name
[i
] != TGSI_SEMANTIC_BCOLOR
)
5821 /* We've found a color. */
5823 /* The state is in the first bit of the user SGPR. */
5824 cond
= LLVMGetParam(ctx
.main_fn
,
5825 ctx
.param_vs_state_bits
);
5826 cond
= LLVMBuildTrunc(ctx
.ac
.builder
, cond
,
5828 lp_build_if(&if_ctx
, &ctx
.gallivm
, cond
);
5829 /* Remember blocks for Phi. */
5830 blocks
[0] = if_ctx
.true_block
;
5831 blocks
[1] = if_ctx
.entry_block
;
5834 for (unsigned j
= 0; j
< 4; j
++) {
5835 /* Insert clamp into the true block. */
5836 v
[0] = ac_build_clamp(&ctx
.ac
, outputs
[i
].values
[j
]);
5837 v
[1] = outputs
[i
].values
[j
];
5839 /* Insert Phi into the endif block. */
5840 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, if_ctx
.merge_block
);
5841 outputs
[i
].values
[j
] = ac_build_phi(&ctx
.ac
, ctx
.f32
, 2, v
, blocks
);
5842 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, if_ctx
.true_block
);
5846 lp_build_endif(&if_ctx
);
5848 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5851 LLVMBuildBr(builder
, end_bb
);
5854 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5856 LLVMBuildRetVoid(ctx
.ac
.builder
);
5858 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5859 si_llvm_optimize_module(&ctx
);
5861 r
= si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5862 &ctx
.shader
->config
, ctx
.compiler
,
5864 debug
, PIPE_SHADER_GEOMETRY
,
5865 "GS Copy Shader", false);
5867 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5868 fprintf(stderr
, "GS Copy Shader:\n");
5869 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5870 PIPE_SHADER_GEOMETRY
, stderr
, true);
5871 r
= si_shader_binary_upload(sscreen
, ctx
.shader
);
5874 si_llvm_dispose(&ctx
);
5883 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5884 const struct si_vs_prolog_bits
*prolog
,
5885 const char *prefix
, FILE *f
)
5887 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5888 prefix
, prolog
->instance_divisor_is_one
);
5889 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5890 prefix
, prolog
->instance_divisor_is_fetched
);
5891 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5892 prefix
, prolog
->ls_vgpr_fix
);
5894 fprintf(f
, " mono.vs.fix_fetch = {");
5895 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++)
5896 fprintf(f
, !i
? "%u" : ", %u", key
->mono
.vs_fix_fetch
[i
]);
5900 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5903 const struct si_shader_key
*key
= &shader
->key
;
5905 fprintf(f
, "SHADER KEY\n");
5907 switch (processor
) {
5908 case PIPE_SHADER_VERTEX
:
5909 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5910 "part.vs.prolog", f
);
5911 fprintf(f
, " as_es = %u\n", key
->as_es
);
5912 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5913 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5914 key
->mono
.u
.vs_export_prim_id
);
5917 case PIPE_SHADER_TESS_CTRL
:
5918 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5919 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5920 "part.tcs.ls_prolog", f
);
5922 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5923 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5926 case PIPE_SHADER_TESS_EVAL
:
5927 fprintf(f
, " as_es = %u\n", key
->as_es
);
5928 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5929 key
->mono
.u
.vs_export_prim_id
);
5932 case PIPE_SHADER_GEOMETRY
:
5933 if (shader
->is_gs_copy_shader
)
5936 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5937 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5938 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5939 "part.gs.vs_prolog", f
);
5941 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5944 case PIPE_SHADER_COMPUTE
:
5947 case PIPE_SHADER_FRAGMENT
:
5948 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5949 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5950 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5951 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5952 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5953 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5954 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5955 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5956 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5957 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5958 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5959 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5960 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5961 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5962 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5963 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5964 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5971 if ((processor
== PIPE_SHADER_GEOMETRY
||
5972 processor
== PIPE_SHADER_TESS_EVAL
||
5973 processor
== PIPE_SHADER_VERTEX
) &&
5974 !key
->as_es
&& !key
->as_ls
) {
5975 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5976 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5980 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5981 struct si_screen
*sscreen
,
5982 struct ac_llvm_compiler
*compiler
)
5984 struct lp_build_tgsi_context
*bld_base
;
5986 si_llvm_context_init(ctx
, sscreen
, compiler
);
5988 bld_base
= &ctx
->bld_base
;
5989 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5991 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
] = interp_action
;
5992 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
] = interp_action
;
5993 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
] = interp_action
;
5995 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5997 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5999 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6000 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6001 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6002 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6004 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6005 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6006 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6007 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6008 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6009 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6010 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6011 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].fetch_args
= read_invoc_fetch_args
;
6012 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6014 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
6015 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6016 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6019 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6021 struct si_shader
*shader
= ctx
->shader
;
6022 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6024 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6025 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6026 shader
->key
.as_ls
||
6030 ac_optimize_vs_outputs(&ctx
->ac
,
6032 shader
->info
.vs_output_param_offset
,
6034 &shader
->info
.nr_param_exports
);
6037 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6038 unsigned param
, unsigned bitoffset
)
6040 LLVMValueRef args
[] = {
6041 LLVMGetParam(ctx
->main_fn
, param
),
6042 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6044 ac_build_intrinsic(&ctx
->ac
,
6045 "llvm.amdgcn.init.exec.from.input",
6046 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6049 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6050 const struct si_vs_prolog_bits
*key
)
6052 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6054 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6057 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6059 struct si_shader
*shader
= ctx
->shader
;
6060 struct si_shader_selector
*sel
= shader
->selector
;
6061 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6063 // TODO clean all this up!
6064 switch (ctx
->type
) {
6065 case PIPE_SHADER_VERTEX
:
6066 ctx
->load_input
= declare_input_vs
;
6067 if (shader
->key
.as_ls
)
6068 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6069 else if (shader
->key
.as_es
)
6070 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6072 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6073 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6074 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6076 case PIPE_SHADER_TESS_CTRL
:
6077 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6078 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6079 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6080 bld_base
->emit_store
= store_output_tcs
;
6081 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6082 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6083 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6084 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6086 case PIPE_SHADER_TESS_EVAL
:
6087 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6088 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6089 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6090 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6091 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6092 if (shader
->key
.as_es
)
6093 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6095 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6096 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6098 case PIPE_SHADER_GEOMETRY
:
6099 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6100 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6101 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6102 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6103 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6104 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6106 case PIPE_SHADER_FRAGMENT
:
6107 ctx
->load_input
= declare_input_fs
;
6108 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6109 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6110 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6111 ctx
->abi
.load_sample_position
= load_sample_position
;
6112 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6113 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6115 case PIPE_SHADER_COMPUTE
:
6116 ctx
->abi
.load_local_group_size
= get_block_size
;
6119 assert(!"Unsupported shader type");
6123 ctx
->abi
.load_ubo
= load_ubo
;
6124 ctx
->abi
.load_ssbo
= load_ssbo
;
6126 create_function(ctx
);
6127 preload_ring_buffers(ctx
);
6129 /* For GFX9 merged shaders:
6130 * - Set EXEC for the first shader. If the prolog is present, set
6131 * EXEC there instead.
6132 * - Add a barrier before the second shader.
6133 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6134 * an if-statement. This is required for correctness in geometry
6135 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6138 * For monolithic merged shaders, the first shader is wrapped in an
6139 * if-block together with its prolog in si_build_wrapper_function.
6141 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6142 if (!shader
->is_monolithic
&&
6143 sel
->info
.num_instructions
> 1 && /* not empty shader */
6144 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6145 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6146 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6147 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6148 si_init_exec_from_input(ctx
,
6149 ctx
->param_merged_wave_info
, 0);
6150 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6151 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6152 if (!shader
->is_monolithic
)
6153 ac_init_exec_full_mask(&ctx
->ac
);
6155 LLVMValueRef num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6157 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6158 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6159 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6161 /* The barrier must execute for all shaders in a
6164 * Execute the barrier inside the conditional block,
6165 * so that empty waves can jump directly to s_endpgm,
6166 * which will also signal the barrier.
6168 * If the shader is TCS and the TCS epilog is present
6169 * and contains a barrier, it will wait there and then
6172 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6176 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6177 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6178 for (unsigned i
= 0; i
< 6; i
++) {
6179 ctx
->invoc0_tess_factors
[i
] =
6180 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6184 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6186 for (i
= 0; i
< 4; i
++) {
6187 ctx
->gs_next_vertex
[i
] =
6188 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6192 if (sel
->force_correct_derivs_after_kill
) {
6193 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6194 /* true = don't kill. */
6195 LLVMBuildStore(ctx
->ac
.builder
, LLVMConstInt(ctx
->i1
, 1, 0),
6196 ctx
->postponed_kill
);
6200 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6201 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6205 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6206 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6211 si_llvm_build_ret(ctx
, ctx
->return_value
);
6216 * Compute the VS prolog key, which contains all the information needed to
6217 * build the VS prolog function, and set shader->info bits where needed.
6219 * \param info Shader info of the vertex shader.
6220 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6221 * \param prolog_key Key of the VS prolog
6222 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6223 * \param key Output shader part key.
6225 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6226 unsigned num_input_sgprs
,
6227 const struct si_vs_prolog_bits
*prolog_key
,
6228 struct si_shader
*shader_out
,
6229 union si_shader_part_key
*key
)
6231 memset(key
, 0, sizeof(*key
));
6232 key
->vs_prolog
.states
= *prolog_key
;
6233 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6234 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6235 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6236 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6238 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6239 key
->vs_prolog
.as_ls
= 1;
6240 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6241 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6242 key
->vs_prolog
.as_es
= 1;
6243 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6246 /* Enable loading the InstanceID VGPR. */
6247 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6249 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6250 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6251 shader_out
->info
.uses_instanceid
= true;
6255 * Compute the PS prolog key, which contains all the information needed to
6256 * build the PS prolog function, and set related bits in shader->config.
6258 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6259 union si_shader_part_key
*key
,
6260 bool separate_prolog
)
6262 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6264 memset(key
, 0, sizeof(*key
));
6265 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6266 key
->ps_prolog
.colors_read
= info
->colors_read
;
6267 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6268 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6269 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6270 (key
->ps_prolog
.colors_read
||
6271 key
->ps_prolog
.states
.force_persp_sample_interp
||
6272 key
->ps_prolog
.states
.force_linear_sample_interp
||
6273 key
->ps_prolog
.states
.force_persp_center_interp
||
6274 key
->ps_prolog
.states
.force_linear_center_interp
||
6275 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6276 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6277 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6279 if (info
->colors_read
) {
6280 unsigned *color
= shader
->selector
->color_attr_index
;
6282 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6283 /* BCOLORs are stored after the last input. */
6284 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6285 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6286 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6289 for (unsigned i
= 0; i
< 2; i
++) {
6290 unsigned interp
= info
->input_interpolate
[color
[i
]];
6291 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6293 if (!(info
->colors_read
& (0xf << i
*4)))
6296 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6298 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6299 interp
== TGSI_INTERPOLATE_COLOR
)
6300 interp
= TGSI_INTERPOLATE_CONSTANT
;
6303 case TGSI_INTERPOLATE_CONSTANT
:
6304 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6306 case TGSI_INTERPOLATE_PERSPECTIVE
:
6307 case TGSI_INTERPOLATE_COLOR
:
6308 /* Force the interpolation location for colors here. */
6309 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6310 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6311 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6312 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6315 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6316 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6317 shader
->config
.spi_ps_input_ena
|=
6318 S_0286CC_PERSP_SAMPLE_ENA(1);
6320 case TGSI_INTERPOLATE_LOC_CENTER
:
6321 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6322 shader
->config
.spi_ps_input_ena
|=
6323 S_0286CC_PERSP_CENTER_ENA(1);
6325 case TGSI_INTERPOLATE_LOC_CENTROID
:
6326 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6327 shader
->config
.spi_ps_input_ena
|=
6328 S_0286CC_PERSP_CENTROID_ENA(1);
6334 case TGSI_INTERPOLATE_LINEAR
:
6335 /* Force the interpolation location for colors here. */
6336 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6337 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6338 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6339 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6341 /* The VGPR assignment for non-monolithic shaders
6342 * works because InitialPSInputAddr is set on the
6343 * main shader and PERSP_PULL_MODEL is never used.
6346 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6347 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6348 separate_prolog
? 6 : 9;
6349 shader
->config
.spi_ps_input_ena
|=
6350 S_0286CC_LINEAR_SAMPLE_ENA(1);
6352 case TGSI_INTERPOLATE_LOC_CENTER
:
6353 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6354 separate_prolog
? 8 : 11;
6355 shader
->config
.spi_ps_input_ena
|=
6356 S_0286CC_LINEAR_CENTER_ENA(1);
6358 case TGSI_INTERPOLATE_LOC_CENTROID
:
6359 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6360 separate_prolog
? 10 : 13;
6361 shader
->config
.spi_ps_input_ena
|=
6362 S_0286CC_LINEAR_CENTROID_ENA(1);
6376 * Check whether a PS prolog is required based on the key.
6378 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6380 return key
->ps_prolog
.colors_read
||
6381 key
->ps_prolog
.states
.force_persp_sample_interp
||
6382 key
->ps_prolog
.states
.force_linear_sample_interp
||
6383 key
->ps_prolog
.states
.force_persp_center_interp
||
6384 key
->ps_prolog
.states
.force_linear_center_interp
||
6385 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6386 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6387 key
->ps_prolog
.states
.poly_stipple
||
6388 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6392 * Compute the PS epilog key, which contains all the information needed to
6393 * build the PS epilog function.
6395 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6396 union si_shader_part_key
*key
)
6398 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6399 memset(key
, 0, sizeof(*key
));
6400 key
->ps_epilog
.colors_written
= info
->colors_written
;
6401 key
->ps_epilog
.writes_z
= info
->writes_z
;
6402 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6403 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6404 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6408 * Build the GS prolog function. Rotate the input vertices for triangle strips
6411 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6412 union si_shader_part_key
*key
)
6414 unsigned num_sgprs
, num_vgprs
;
6415 struct si_function_info fninfo
;
6416 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6417 LLVMTypeRef returns
[48];
6418 LLVMValueRef func
, ret
;
6420 si_init_function_info(&fninfo
);
6422 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6423 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6424 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6426 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6427 num_vgprs
= 5; /* ES inputs are not needed by GS */
6429 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6433 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6434 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6435 returns
[i
] = ctx
->i32
;
6438 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6439 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6440 returns
[num_sgprs
+ i
] = ctx
->f32
;
6443 /* Create the function. */
6444 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6446 func
= ctx
->main_fn
;
6448 /* Set the full EXEC mask for the prolog, because we are only fiddling
6449 * with registers here. The main shader part will set the correct EXEC
6452 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6453 ac_init_exec_full_mask(&ctx
->ac
);
6455 /* Copy inputs to outputs. This should be no-op, as the registers match,
6456 * but it will prevent the compiler from overwriting them unintentionally.
6458 ret
= ctx
->return_value
;
6459 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6460 LLVMValueRef p
= LLVMGetParam(func
, i
);
6461 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6463 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6464 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6465 p
= ac_to_float(&ctx
->ac
, p
);
6466 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6469 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6470 /* Remap the input vertices for every other primitive. */
6471 const unsigned gfx6_vtx_params
[6] = {
6479 const unsigned gfx9_vtx_params
[3] = {
6484 LLVMValueRef vtx_in
[6], vtx_out
[6];
6485 LLVMValueRef prim_id
, rotate
;
6487 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6488 for (unsigned i
= 0; i
< 3; i
++) {
6489 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6490 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6493 for (unsigned i
= 0; i
< 6; i
++)
6494 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6497 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6498 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6500 for (unsigned i
= 0; i
< 6; ++i
) {
6501 LLVMValueRef base
, rotated
;
6503 rotated
= vtx_in
[(i
+ 4) % 6];
6504 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6507 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6508 for (unsigned i
= 0; i
< 3; i
++) {
6509 LLVMValueRef hi
, out
;
6511 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6512 LLVMConstInt(ctx
->i32
, 16, 0), "");
6513 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6514 out
= ac_to_float(&ctx
->ac
, out
);
6515 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6516 gfx9_vtx_params
[i
], "");
6519 for (unsigned i
= 0; i
< 6; i
++) {
6522 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6523 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6524 gfx6_vtx_params
[i
], "");
6529 LLVMBuildRet(builder
, ret
);
6533 * Given a list of shader part functions, build a wrapper function that
6534 * runs them in sequence to form a monolithic shader.
6536 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6537 LLVMValueRef
*parts
,
6540 unsigned next_shader_first_part
)
6542 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6543 /* PS epilog has one arg per color component; gfx9 merged shader
6544 * prologs need to forward 32 user SGPRs.
6546 struct si_function_info fninfo
;
6547 LLVMValueRef initial
[64], out
[64];
6548 LLVMTypeRef function_type
;
6549 unsigned num_first_params
;
6550 unsigned num_out
, initial_num_out
;
6551 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6552 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6553 unsigned num_sgprs
, num_vgprs
;
6555 struct lp_build_if_state if_state
;
6557 si_init_function_info(&fninfo
);
6559 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6560 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6561 AC_FUNC_ATTR_ALWAYSINLINE
);
6562 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6565 /* The parameters of the wrapper function correspond to those of the
6566 * first part in terms of SGPRs and VGPRs, but we use the types of the
6567 * main part to get the right types. This is relevant for the
6568 * dereferenceable attribute on descriptor table pointers.
6573 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6574 num_first_params
= LLVMCountParamTypes(function_type
);
6576 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6577 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6579 if (ac_is_sgpr_param(param
)) {
6580 assert(num_vgprs
== 0);
6581 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6583 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6588 while (gprs
< num_sgprs
+ num_vgprs
) {
6589 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6590 LLVMTypeRef type
= LLVMTypeOf(param
);
6591 unsigned size
= ac_get_type_size(type
) / 4;
6593 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6595 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6596 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6597 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6602 si_create_function(ctx
, "wrapper", NULL
, 0, &fninfo
,
6603 si_get_max_workgroup_size(ctx
->shader
));
6605 if (is_merged_shader(ctx
->shader
))
6606 ac_init_exec_full_mask(&ctx
->ac
);
6608 /* Record the arguments of the function as if they were an output of
6614 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6615 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6616 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6617 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6618 unsigned size
= ac_get_type_size(param_type
) / 4;
6621 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6622 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6623 param_type
= ctx
->i32
;
6626 if (param_type
!= out_type
)
6627 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6628 out
[num_out
++] = param
;
6630 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6632 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6633 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6634 param_type
= ctx
->i64
;
6637 if (param_type
!= vector_type
)
6638 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6640 for (unsigned j
= 0; j
< size
; ++j
)
6641 out
[num_out
++] = LLVMBuildExtractElement(
6642 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6645 if (i
< fninfo
.num_sgpr_params
)
6646 num_out_sgpr
= num_out
;
6649 memcpy(initial
, out
, sizeof(out
));
6650 initial_num_out
= num_out
;
6651 initial_num_out_sgpr
= num_out_sgpr
;
6653 /* Now chain the parts. */
6654 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6655 LLVMValueRef in
[48];
6657 LLVMTypeRef ret_type
;
6658 unsigned out_idx
= 0;
6659 unsigned num_params
= LLVMCountParams(parts
[part
]);
6661 /* Merged shaders are executed conditionally depending
6662 * on the number of enabled threads passed in the input SGPRs. */
6663 if (is_merged_shader(ctx
->shader
) && part
== 0) {
6664 LLVMValueRef ena
, count
= initial
[3];
6666 count
= LLVMBuildAnd(builder
, count
,
6667 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6668 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6669 ac_get_thread_id(&ctx
->ac
), count
, "");
6670 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6673 /* Derive arguments for the next part from outputs of the
6676 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6678 LLVMTypeRef param_type
;
6680 unsigned param_size
;
6681 LLVMValueRef arg
= NULL
;
6683 param
= LLVMGetParam(parts
[part
], param_idx
);
6684 param_type
= LLVMTypeOf(param
);
6685 param_size
= ac_get_type_size(param_type
) / 4;
6686 is_sgpr
= ac_is_sgpr_param(param
);
6689 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6690 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6691 } else if (out_idx
< num_out_sgpr
) {
6692 /* Skip returned SGPRs the current part doesn't
6693 * declare on the input. */
6694 out_idx
= num_out_sgpr
;
6697 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6699 if (param_size
== 1)
6702 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6704 if (LLVMTypeOf(arg
) != param_type
) {
6705 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6706 if (LLVMGetPointerAddressSpace(param_type
) ==
6707 AC_CONST_32BIT_ADDR_SPACE
) {
6708 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6709 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6711 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6712 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6715 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6719 in
[param_idx
] = arg
;
6720 out_idx
+= param_size
;
6723 ret
= LLVMBuildCall(builder
, parts
[part
], in
, num_params
, "");
6725 if (is_merged_shader(ctx
->shader
) &&
6726 part
+ 1 == next_shader_first_part
) {
6727 lp_build_endif(&if_state
);
6729 /* The second half of the merged shader should use
6730 * the inputs from the toplevel (wrapper) function,
6731 * not the return value from the last call.
6733 * That's because the last call was executed condi-
6734 * tionally, so we can't consume it in the main
6737 memcpy(out
, initial
, sizeof(initial
));
6738 num_out
= initial_num_out
;
6739 num_out_sgpr
= initial_num_out_sgpr
;
6743 /* Extract the returned GPRs. */
6744 ret_type
= LLVMTypeOf(ret
);
6748 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6749 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6751 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6753 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6755 LLVMBuildExtractValue(builder
, ret
, i
, "");
6757 assert(num_out
< ARRAY_SIZE(out
));
6758 out
[num_out
++] = val
;
6760 if (LLVMTypeOf(val
) == ctx
->i32
) {
6761 assert(num_out_sgpr
+ 1 == num_out
);
6762 num_out_sgpr
= num_out
;
6768 LLVMBuildRetVoid(builder
);
6771 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6772 struct si_shader_selector
*sel
)
6774 if (!compiler
->low_opt_passes
)
6777 /* Assume a slow CPU. */
6778 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6779 sel
->screen
->info
.chip_class
<= VI
);
6781 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6783 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6784 sel
->info
.num_memory_instructions
> 1000;
6787 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6788 struct ac_llvm_compiler
*compiler
,
6789 struct si_shader
*shader
,
6790 struct pipe_debug_callback
*debug
)
6792 struct si_shader_selector
*sel
= shader
->selector
;
6793 struct si_shader_context ctx
;
6796 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6797 * conversion fails. */
6798 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6799 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6801 tgsi_dump(sel
->tokens
, 0);
6803 nir_print_shader(sel
->nir
, stderr
);
6804 si_dump_streamout(&sel
->so
);
6807 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6808 si_llvm_context_set_tgsi(&ctx
, shader
);
6810 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6811 sizeof(shader
->info
.vs_output_param_offset
));
6813 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6815 if (!si_compile_tgsi_main(&ctx
)) {
6816 si_llvm_dispose(&ctx
);
6820 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6821 LLVMValueRef parts
[2];
6822 bool need_prolog
= sel
->vs_needs_prolog
;
6824 parts
[1] = ctx
.main_fn
;
6827 union si_shader_part_key prolog_key
;
6828 si_get_vs_prolog_key(&sel
->info
,
6829 shader
->info
.num_input_sgprs
,
6830 &shader
->key
.part
.vs
.prolog
,
6831 shader
, &prolog_key
);
6832 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6833 parts
[0] = ctx
.main_fn
;
6836 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6837 1 + need_prolog
, need_prolog
, 0);
6838 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6839 if (sscreen
->info
.chip_class
>= GFX9
) {
6840 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6841 LLVMValueRef parts
[4];
6842 bool vs_needs_prolog
=
6843 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6846 parts
[2] = ctx
.main_fn
;
6849 union si_shader_part_key tcs_epilog_key
;
6850 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6851 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6852 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6853 parts
[3] = ctx
.main_fn
;
6855 /* VS as LS main part */
6856 struct si_shader shader_ls
= {};
6857 shader_ls
.selector
= ls
;
6858 shader_ls
.key
.as_ls
= 1;
6859 shader_ls
.key
.mono
= shader
->key
.mono
;
6860 shader_ls
.key
.opt
= shader
->key
.opt
;
6861 shader_ls
.is_monolithic
= true;
6862 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6864 if (!si_compile_tgsi_main(&ctx
)) {
6865 si_llvm_dispose(&ctx
);
6868 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6869 parts
[1] = ctx
.main_fn
;
6872 if (vs_needs_prolog
) {
6873 union si_shader_part_key vs_prolog_key
;
6874 si_get_vs_prolog_key(&ls
->info
,
6875 shader_ls
.info
.num_input_sgprs
,
6876 &shader
->key
.part
.tcs
.ls_prolog
,
6877 shader
, &vs_prolog_key
);
6878 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6879 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6880 parts
[0] = ctx
.main_fn
;
6883 /* Reset the shader context. */
6884 ctx
.shader
= shader
;
6885 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6887 si_build_wrapper_function(&ctx
,
6888 parts
+ !vs_needs_prolog
,
6889 4 - !vs_needs_prolog
, vs_needs_prolog
,
6890 vs_needs_prolog
? 2 : 1);
6892 LLVMValueRef parts
[2];
6893 union si_shader_part_key epilog_key
;
6895 parts
[0] = ctx
.main_fn
;
6897 memset(&epilog_key
, 0, sizeof(epilog_key
));
6898 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6899 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6900 parts
[1] = ctx
.main_fn
;
6902 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
6904 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
6905 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
6906 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
6907 LLVMValueRef es_prolog
= NULL
;
6908 LLVMValueRef es_main
= NULL
;
6909 LLVMValueRef gs_prolog
= NULL
;
6910 LLVMValueRef gs_main
= ctx
.main_fn
;
6913 union si_shader_part_key gs_prolog_key
;
6914 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
6915 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6916 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
6917 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
6918 gs_prolog
= ctx
.main_fn
;
6921 struct si_shader shader_es
= {};
6922 shader_es
.selector
= es
;
6923 shader_es
.key
.as_es
= 1;
6924 shader_es
.key
.mono
= shader
->key
.mono
;
6925 shader_es
.key
.opt
= shader
->key
.opt
;
6926 shader_es
.is_monolithic
= true;
6927 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
6929 if (!si_compile_tgsi_main(&ctx
)) {
6930 si_llvm_dispose(&ctx
);
6933 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
6934 es_main
= ctx
.main_fn
;
6937 if (es
->vs_needs_prolog
) {
6938 union si_shader_part_key vs_prolog_key
;
6939 si_get_vs_prolog_key(&es
->info
,
6940 shader_es
.info
.num_input_sgprs
,
6941 &shader
->key
.part
.gs
.vs_prolog
,
6942 shader
, &vs_prolog_key
);
6943 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6944 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6945 es_prolog
= ctx
.main_fn
;
6948 /* Reset the shader context. */
6949 ctx
.shader
= shader
;
6950 ctx
.type
= PIPE_SHADER_GEOMETRY
;
6952 /* Prepare the array of shader parts. */
6953 LLVMValueRef parts
[4];
6954 unsigned num_parts
= 0, main_part
, next_first_part
;
6957 parts
[num_parts
++] = es_prolog
;
6959 parts
[main_part
= num_parts
++] = es_main
;
6960 parts
[next_first_part
= num_parts
++] = gs_prolog
;
6961 parts
[num_parts
++] = gs_main
;
6963 si_build_wrapper_function(&ctx
, parts
, num_parts
,
6964 main_part
, next_first_part
);
6966 LLVMValueRef parts
[2];
6967 union si_shader_part_key prolog_key
;
6969 parts
[1] = ctx
.main_fn
;
6971 memset(&prolog_key
, 0, sizeof(prolog_key
));
6972 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
6973 si_build_gs_prolog_function(&ctx
, &prolog_key
);
6974 parts
[0] = ctx
.main_fn
;
6976 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
6978 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
6979 LLVMValueRef parts
[3];
6980 union si_shader_part_key prolog_key
;
6981 union si_shader_part_key epilog_key
;
6984 si_get_ps_prolog_key(shader
, &prolog_key
, false);
6985 need_prolog
= si_need_ps_prolog(&prolog_key
);
6987 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
6990 si_build_ps_prolog_function(&ctx
, &prolog_key
);
6991 parts
[0] = ctx
.main_fn
;
6994 si_get_ps_epilog_key(shader
, &epilog_key
);
6995 si_build_ps_epilog_function(&ctx
, &epilog_key
);
6996 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
6998 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
6999 need_prolog
? 1 : 0, 0);
7002 si_llvm_optimize_module(&ctx
);
7004 /* Post-optimization transformations and analysis. */
7005 si_optimize_vs_outputs(&ctx
);
7007 if ((debug
&& debug
->debug_message
) ||
7008 si_can_dump_shader(sscreen
, ctx
.type
)) {
7009 ctx
.shader
->config
.private_mem_vgprs
=
7010 ac_count_scratch_private_memory(ctx
.main_fn
);
7013 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7014 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7015 LLVMPointerTypeKind
);
7017 /* Compile to bytecode. */
7018 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7019 ctx
.ac
.module
, debug
, ctx
.type
, "TGSI shader",
7020 si_should_optimize_less(compiler
, shader
->selector
));
7021 si_llvm_dispose(&ctx
);
7023 fprintf(stderr
, "LLVM failed to compile shader\n");
7027 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7028 * LLVM 3.9svn has this bug.
7030 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7031 unsigned wave_size
= 64;
7032 unsigned max_vgprs
= 256;
7033 unsigned max_sgprs
= sscreen
->info
.chip_class
>= VI
? 800 : 512;
7034 unsigned max_sgprs_per_wave
= 128;
7035 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7036 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7037 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7039 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7040 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7042 if (shader
->config
.num_sgprs
> max_sgprs
||
7043 shader
->config
.num_vgprs
> max_vgprs
) {
7044 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7045 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7046 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7047 max_sgprs
, max_vgprs
);
7049 /* Just terminate the process, because dependent
7050 * shaders can hang due to bad input data, but use
7051 * the env var to allow shader-db to work.
7053 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7058 /* Add the scratch offset to input SGPRs. */
7059 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(shader
))
7060 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7062 /* Calculate the number of fragment input VGPRs. */
7063 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7064 shader
->info
.num_input_vgprs
= 0;
7065 shader
->info
.face_vgpr_index
= -1;
7066 shader
->info
.ancillary_vgpr_index
= -1;
7068 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7069 shader
->info
.num_input_vgprs
+= 2;
7070 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7071 shader
->info
.num_input_vgprs
+= 2;
7072 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7073 shader
->info
.num_input_vgprs
+= 2;
7074 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7075 shader
->info
.num_input_vgprs
+= 3;
7076 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7077 shader
->info
.num_input_vgprs
+= 2;
7078 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7079 shader
->info
.num_input_vgprs
+= 2;
7080 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7081 shader
->info
.num_input_vgprs
+= 2;
7082 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7083 shader
->info
.num_input_vgprs
+= 1;
7084 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7085 shader
->info
.num_input_vgprs
+= 1;
7086 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7087 shader
->info
.num_input_vgprs
+= 1;
7088 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7089 shader
->info
.num_input_vgprs
+= 1;
7090 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7091 shader
->info
.num_input_vgprs
+= 1;
7092 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7093 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7094 shader
->info
.num_input_vgprs
+= 1;
7096 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7097 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7098 shader
->info
.num_input_vgprs
+= 1;
7100 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7101 shader
->info
.num_input_vgprs
+= 1;
7102 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7103 shader
->info
.num_input_vgprs
+= 1;
7106 si_calculate_max_simd_waves(shader
);
7107 si_shader_dump_stats_for_shader_db(shader
, debug
);
7112 * Create, compile and return a shader part (prolog or epilog).
7114 * \param sscreen screen
7115 * \param list list of shader parts of the same category
7116 * \param type shader type
7117 * \param key shader part key
7118 * \param prolog whether the part being requested is a prolog
7119 * \param tm LLVM target machine
7120 * \param debug debug callback
7121 * \param build the callback responsible for building the main function
7122 * \return non-NULL on success
7124 static struct si_shader_part
*
7125 si_get_shader_part(struct si_screen
*sscreen
,
7126 struct si_shader_part
**list
,
7127 enum pipe_shader_type type
,
7129 union si_shader_part_key
*key
,
7130 struct ac_llvm_compiler
*compiler
,
7131 struct pipe_debug_callback
*debug
,
7132 void (*build
)(struct si_shader_context
*,
7133 union si_shader_part_key
*),
7136 struct si_shader_part
*result
;
7138 mtx_lock(&sscreen
->shader_parts_mutex
);
7140 /* Find existing. */
7141 for (result
= *list
; result
; result
= result
->next
) {
7142 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7143 mtx_unlock(&sscreen
->shader_parts_mutex
);
7148 /* Compile a new one. */
7149 result
= CALLOC_STRUCT(si_shader_part
);
7152 struct si_shader shader
= {};
7153 struct si_shader_context ctx
;
7155 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
7156 ctx
.shader
= &shader
;
7160 case PIPE_SHADER_VERTEX
:
7161 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7162 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7164 case PIPE_SHADER_TESS_CTRL
:
7166 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7168 case PIPE_SHADER_GEOMETRY
:
7171 case PIPE_SHADER_FRAGMENT
:
7173 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7175 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7178 unreachable("bad shader part");
7184 si_llvm_optimize_module(&ctx
);
7186 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7187 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
7193 result
->next
= *list
;
7197 si_llvm_dispose(&ctx
);
7198 mtx_unlock(&sscreen
->shader_parts_mutex
);
7202 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7204 LLVMValueRef ptr
[2], list
;
7205 bool is_merged_shader
=
7206 ctx
->screen
->info
.chip_class
>= GFX9
&&
7207 (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
7208 ctx
->type
== PIPE_SHADER_GEOMETRY
||
7209 ctx
->shader
->key
.as_ls
|| ctx
->shader
->key
.as_es
);
7211 if (HAVE_32BIT_POINTERS
) {
7212 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7213 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7214 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7218 /* Get the pointer to rw buffers. */
7219 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7220 ptr
[1] = LLVMGetParam(ctx
->main_fn
, (is_merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
+ 1);
7221 list
= ac_build_gather_values(&ctx
->ac
, ptr
, 2);
7222 list
= LLVMBuildBitCast(ctx
->ac
.builder
, list
, ctx
->i64
, "");
7223 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, list
,
7224 ac_array_in_const_addr_space(ctx
->v4i32
), "");
7229 * Build the vertex shader prolog function.
7231 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7232 * All inputs are returned unmodified. The vertex load indices are
7233 * stored after them, which will be used by the API VS for fetching inputs.
7235 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7240 * (VertexID + BaseVertex),
7241 * (InstanceID + StartInstance),
7242 * (InstanceID / 2 + StartInstance)
7244 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7245 union si_shader_part_key
*key
)
7247 struct si_function_info fninfo
;
7248 LLVMTypeRef
*returns
;
7249 LLVMValueRef ret
, func
;
7251 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7252 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7253 LLVMValueRef input_vgprs
[9];
7254 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7256 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7258 si_init_function_info(&fninfo
);
7260 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7261 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7262 sizeof(LLVMTypeRef
));
7265 /* Declare input and output SGPRs. */
7266 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7267 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7268 returns
[num_returns
++] = ctx
->i32
;
7271 /* Preloaded VGPRs (outputs must be floats) */
7272 for (i
= 0; i
< num_input_vgprs
; i
++) {
7273 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7274 returns
[num_returns
++] = ctx
->f32
;
7277 /* Vertex load indices. */
7278 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7279 returns
[num_returns
++] = ctx
->f32
;
7281 /* Create the function. */
7282 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7283 func
= ctx
->main_fn
;
7285 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7286 if (!key
->vs_prolog
.is_monolithic
)
7287 si_init_exec_from_input(ctx
, 3, 0);
7289 if (key
->vs_prolog
.as_ls
&&
7290 ctx
->screen
->has_ls_vgpr_init_bug
) {
7291 /* If there are no HS threads, SPI loads the LS VGPRs
7292 * starting at VGPR 0. Shift them back to where they
7295 LLVMValueRef has_hs_threads
=
7296 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7297 si_unpack_param(ctx
, 3, 8, 8),
7300 for (i
= 4; i
> 0; --i
) {
7301 input_vgprs
[i
+ 1] =
7302 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7304 input_vgprs
[i
- 1], "");
7309 ctx
->abi
.vertex_id
= input_vgprs
[first_vs_vgpr
];
7310 ctx
->abi
.instance_id
= input_vgprs
[first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1)];
7312 /* Copy inputs to outputs. This should be no-op, as the registers match,
7313 * but it will prevent the compiler from overwriting them unintentionally.
7315 ret
= ctx
->return_value
;
7316 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7317 LLVMValueRef p
= LLVMGetParam(func
, i
);
7318 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7320 for (i
= 0; i
< num_input_vgprs
; i
++) {
7321 LLVMValueRef p
= input_vgprs
[i
];
7322 p
= ac_to_float(&ctx
->ac
, p
);
7323 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7324 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7327 /* Compute vertex load indices from instance divisors. */
7328 LLVMValueRef instance_divisor_constbuf
= NULL
;
7330 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7331 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7332 LLVMValueRef buf_index
=
7333 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7334 instance_divisor_constbuf
=
7335 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7338 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7339 bool divisor_is_one
=
7340 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7341 bool divisor_is_fetched
=
7342 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7345 if (divisor_is_one
|| divisor_is_fetched
) {
7346 LLVMValueRef divisor
= ctx
->i32_1
;
7348 if (divisor_is_fetched
) {
7349 divisor
= buffer_load_const(ctx
, instance_divisor_constbuf
,
7350 LLVMConstInt(ctx
->i32
, i
* 4, 0));
7351 divisor
= ac_to_integer(&ctx
->ac
, divisor
);
7354 /* InstanceID / Divisor + StartInstance */
7355 index
= get_instance_index_for_fetch(ctx
,
7357 SI_SGPR_START_INSTANCE
,
7360 /* VertexID + BaseVertex */
7361 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7363 LLVMGetParam(func
, user_sgpr_base
+
7364 SI_SGPR_BASE_VERTEX
), "");
7367 index
= ac_to_float(&ctx
->ac
, index
);
7368 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7369 fninfo
.num_params
+ i
, "");
7372 si_llvm_build_ret(ctx
, ret
);
7375 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7376 struct ac_llvm_compiler
*compiler
,
7377 struct si_shader
*shader
,
7378 struct pipe_debug_callback
*debug
,
7379 struct si_shader
*main_part
,
7380 const struct si_vs_prolog_bits
*key
)
7382 struct si_shader_selector
*vs
= main_part
->selector
;
7384 if (!si_vs_needs_prolog(vs
, key
))
7387 /* Get the prolog. */
7388 union si_shader_part_key prolog_key
;
7389 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7390 key
, shader
, &prolog_key
);
7393 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7394 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7395 debug
, si_build_vs_prolog_function
,
7396 "Vertex Shader Prolog");
7397 return shader
->prolog
!= NULL
;
7401 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7403 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7404 struct ac_llvm_compiler
*compiler
,
7405 struct si_shader
*shader
,
7406 struct pipe_debug_callback
*debug
)
7408 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7409 &shader
->key
.part
.vs
.prolog
);
7413 * Compile the TCS epilog function. This writes tesselation factors to memory
7414 * based on the output primitive type of the tesselator (determined by TES).
7416 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7417 union si_shader_part_key
*key
)
7419 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7420 struct si_function_info fninfo
;
7423 si_init_function_info(&fninfo
);
7425 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7426 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7427 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7428 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7429 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7430 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7431 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7432 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7433 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7434 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7435 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7436 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7437 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7438 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7439 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7440 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7441 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7442 if (!HAVE_32BIT_POINTERS
)
7443 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7444 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7445 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7446 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7448 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7449 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7450 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7451 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7452 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7453 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7454 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7455 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7456 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7457 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7460 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7461 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7462 unsigned tess_factors_idx
=
7463 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7464 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7465 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7467 for (unsigned i
= 0; i
< 6; i
++)
7468 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7470 /* Create the function. */
7471 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7472 ctx
->screen
->info
.chip_class
>= CIK
? 128 : 64);
7473 ac_declare_lds_as_pointer(&ctx
->ac
);
7474 func
= ctx
->main_fn
;
7476 LLVMValueRef invoc0_tess_factors
[6];
7477 for (unsigned i
= 0; i
< 6; i
++)
7478 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7480 si_write_tess_factors(bld_base
,
7481 LLVMGetParam(func
, tess_factors_idx
),
7482 LLVMGetParam(func
, tess_factors_idx
+ 1),
7483 LLVMGetParam(func
, tess_factors_idx
+ 2),
7484 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7486 LLVMBuildRetVoid(ctx
->ac
.builder
);
7490 * Select and compile (or reuse) TCS parts (epilog).
7492 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7493 struct ac_llvm_compiler
*compiler
,
7494 struct si_shader
*shader
,
7495 struct pipe_debug_callback
*debug
)
7497 if (sscreen
->info
.chip_class
>= GFX9
) {
7498 struct si_shader
*ls_main_part
=
7499 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7501 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7502 &shader
->key
.part
.tcs
.ls_prolog
))
7505 shader
->previous_stage
= ls_main_part
;
7508 /* Get the epilog. */
7509 union si_shader_part_key epilog_key
;
7510 memset(&epilog_key
, 0, sizeof(epilog_key
));
7511 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7513 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7514 PIPE_SHADER_TESS_CTRL
, false,
7515 &epilog_key
, compiler
, debug
,
7516 si_build_tcs_epilog_function
,
7517 "Tessellation Control Shader Epilog");
7518 return shader
->epilog
!= NULL
;
7522 * Select and compile (or reuse) GS parts (prolog).
7524 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7525 struct ac_llvm_compiler
*compiler
,
7526 struct si_shader
*shader
,
7527 struct pipe_debug_callback
*debug
)
7529 if (sscreen
->info
.chip_class
>= GFX9
) {
7530 struct si_shader
*es_main_part
=
7531 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7533 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7534 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7535 &shader
->key
.part
.gs
.vs_prolog
))
7538 shader
->previous_stage
= es_main_part
;
7541 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7544 union si_shader_part_key prolog_key
;
7545 memset(&prolog_key
, 0, sizeof(prolog_key
));
7546 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7548 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7549 PIPE_SHADER_GEOMETRY
, true,
7550 &prolog_key
, compiler
, debug
,
7551 si_build_gs_prolog_function
,
7552 "Geometry Shader Prolog");
7553 return shader
->prolog2
!= NULL
;
7557 * Build the pixel shader prolog function. This handles:
7558 * - two-side color selection and interpolation
7559 * - overriding interpolation parameters for the API PS
7560 * - polygon stippling
7562 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7563 * overriden by other states. (e.g. per-sample interpolation)
7564 * Interpolated colors are stored after the preloaded VGPRs.
7566 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7567 union si_shader_part_key
*key
)
7569 struct si_function_info fninfo
;
7570 LLVMValueRef ret
, func
;
7571 int num_returns
, i
, num_color_channels
;
7573 assert(si_need_ps_prolog(key
));
7575 si_init_function_info(&fninfo
);
7577 /* Declare inputs. */
7578 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7579 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7581 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7582 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7584 /* Declare outputs (same as inputs + add colors if needed) */
7585 num_returns
= fninfo
.num_params
;
7586 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7587 for (i
= 0; i
< num_color_channels
; i
++)
7588 fninfo
.types
[num_returns
++] = ctx
->f32
;
7590 /* Create the function. */
7591 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7593 func
= ctx
->main_fn
;
7595 /* Copy inputs to outputs. This should be no-op, as the registers match,
7596 * but it will prevent the compiler from overwriting them unintentionally.
7598 ret
= ctx
->return_value
;
7599 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7600 LLVMValueRef p
= LLVMGetParam(func
, i
);
7601 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7604 /* Polygon stippling. */
7605 if (key
->ps_prolog
.states
.poly_stipple
) {
7606 /* POS_FIXED_PT is always last. */
7607 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7608 key
->ps_prolog
.num_input_vgprs
- 1;
7609 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7611 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7614 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7615 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7616 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7617 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7619 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7620 * The hw doesn't compute CENTROID if the whole wave only
7621 * contains fully-covered quads.
7623 * PRIM_MASK is after user SGPRs.
7625 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7626 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7627 LLVMConstInt(ctx
->i32
, 31, 0), "");
7628 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7631 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7632 /* Read PERSP_CENTER. */
7633 for (i
= 0; i
< 2; i
++)
7634 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7635 /* Read PERSP_CENTROID. */
7636 for (i
= 0; i
< 2; i
++)
7637 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7638 /* Select PERSP_CENTROID. */
7639 for (i
= 0; i
< 2; i
++) {
7640 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7641 center
[i
], centroid
[i
], "");
7642 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7643 tmp
, base
+ 4 + i
, "");
7646 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7647 /* Read LINEAR_CENTER. */
7648 for (i
= 0; i
< 2; i
++)
7649 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7650 /* Read LINEAR_CENTROID. */
7651 for (i
= 0; i
< 2; i
++)
7652 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7653 /* Select LINEAR_CENTROID. */
7654 for (i
= 0; i
< 2; i
++) {
7655 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7656 center
[i
], centroid
[i
], "");
7657 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7658 tmp
, base
+ 10 + i
, "");
7663 /* Force per-sample interpolation. */
7664 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7665 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7666 LLVMValueRef persp_sample
[2];
7668 /* Read PERSP_SAMPLE. */
7669 for (i
= 0; i
< 2; i
++)
7670 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7671 /* Overwrite PERSP_CENTER. */
7672 for (i
= 0; i
< 2; i
++)
7673 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7674 persp_sample
[i
], base
+ 2 + i
, "");
7675 /* Overwrite PERSP_CENTROID. */
7676 for (i
= 0; i
< 2; i
++)
7677 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7678 persp_sample
[i
], base
+ 4 + i
, "");
7680 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7681 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7682 LLVMValueRef linear_sample
[2];
7684 /* Read LINEAR_SAMPLE. */
7685 for (i
= 0; i
< 2; i
++)
7686 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7687 /* Overwrite LINEAR_CENTER. */
7688 for (i
= 0; i
< 2; i
++)
7689 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7690 linear_sample
[i
], base
+ 8 + i
, "");
7691 /* Overwrite LINEAR_CENTROID. */
7692 for (i
= 0; i
< 2; i
++)
7693 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7694 linear_sample
[i
], base
+ 10 + i
, "");
7697 /* Force center interpolation. */
7698 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7699 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7700 LLVMValueRef persp_center
[2];
7702 /* Read PERSP_CENTER. */
7703 for (i
= 0; i
< 2; i
++)
7704 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7705 /* Overwrite PERSP_SAMPLE. */
7706 for (i
= 0; i
< 2; i
++)
7707 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7708 persp_center
[i
], base
+ i
, "");
7709 /* Overwrite PERSP_CENTROID. */
7710 for (i
= 0; i
< 2; i
++)
7711 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7712 persp_center
[i
], base
+ 4 + i
, "");
7714 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7715 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7716 LLVMValueRef linear_center
[2];
7718 /* Read LINEAR_CENTER. */
7719 for (i
= 0; i
< 2; i
++)
7720 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7721 /* Overwrite LINEAR_SAMPLE. */
7722 for (i
= 0; i
< 2; i
++)
7723 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7724 linear_center
[i
], base
+ 6 + i
, "");
7725 /* Overwrite LINEAR_CENTROID. */
7726 for (i
= 0; i
< 2; i
++)
7727 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7728 linear_center
[i
], base
+ 10 + i
, "");
7731 /* Interpolate colors. */
7732 unsigned color_out_idx
= 0;
7733 for (i
= 0; i
< 2; i
++) {
7734 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7735 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7736 key
->ps_prolog
.face_vgpr_index
;
7737 LLVMValueRef interp
[2], color
[4];
7738 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7743 /* If the interpolation qualifier is not CONSTANT (-1). */
7744 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7745 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7746 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7748 /* Get the (i,j) updated by bc_optimize handling. */
7749 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7751 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7752 interp_vgpr
+ 1, "");
7753 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7756 /* Use the absolute location of the input. */
7757 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7759 if (key
->ps_prolog
.states
.color_two_side
) {
7760 face
= LLVMGetParam(func
, face_vgpr
);
7761 face
= ac_to_integer(&ctx
->ac
, face
);
7764 interp_fs_input(ctx
,
7765 key
->ps_prolog
.color_attr_index
[i
],
7766 TGSI_SEMANTIC_COLOR
, i
,
7767 key
->ps_prolog
.num_interp_inputs
,
7768 key
->ps_prolog
.colors_read
, interp_ij
,
7769 prim_mask
, face
, color
);
7772 unsigned chan
= u_bit_scan(&writemask
);
7773 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7774 fninfo
.num_params
+ color_out_idx
++, "");
7778 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7781 * "When per-sample shading is active due to the use of a fragment
7782 * input qualified by sample or due to the use of the gl_SampleID
7783 * or gl_SamplePosition variables, only the bit for the current
7784 * sample is set in gl_SampleMaskIn. When state specifies multiple
7785 * fragment shader invocations for a given fragment, the sample
7786 * mask for any single fragment shader invocation may specify a
7787 * subset of the covered samples for the fragment. In this case,
7788 * the bit corresponding to each covered sample will be set in
7789 * exactly one fragment shader invocation."
7791 * The samplemask loaded by hardware is always the coverage of the
7792 * entire pixel/fragment, so mask bits out based on the sample ID.
7794 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7795 /* The bit pattern matches that used by fixed function fragment
7797 static const uint16_t ps_iter_masks
[] = {
7798 0xffff, /* not used */
7804 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7806 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7807 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7808 key
->ps_prolog
.ancillary_vgpr_index
;
7809 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7810 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7812 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7813 samplemask
= LLVMBuildAnd(
7816 LLVMBuildShl(ctx
->ac
.builder
,
7817 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7820 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7822 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7823 ancillary_vgpr
+ 1, "");
7826 /* Tell LLVM to insert WQM instruction sequence when needed. */
7827 if (key
->ps_prolog
.wqm
) {
7828 LLVMAddTargetDependentFunctionAttr(func
,
7829 "amdgpu-ps-wqm-outputs", "");
7832 si_llvm_build_ret(ctx
, ret
);
7836 * Build the pixel shader epilog function. This handles everything that must be
7837 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7839 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7840 union si_shader_part_key
*key
)
7842 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7843 struct si_function_info fninfo
;
7844 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7846 struct si_ps_exports exp
= {};
7848 si_init_function_info(&fninfo
);
7850 /* Declare input SGPRs. */
7851 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7852 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7853 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7854 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7855 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
7857 /* Declare input VGPRs. */
7858 unsigned required_num_params
=
7859 fninfo
.num_sgpr_params
+
7860 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
7861 key
->ps_epilog
.writes_z
+
7862 key
->ps_epilog
.writes_stencil
+
7863 key
->ps_epilog
.writes_samplemask
;
7865 required_num_params
= MAX2(required_num_params
,
7866 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
7868 while (fninfo
.num_params
< required_num_params
)
7869 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7871 /* Create the function. */
7872 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
7873 /* Disable elimination of unused inputs. */
7874 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
7875 "InitialPSInputAddr", 0xffffff);
7877 /* Process colors. */
7878 unsigned vgpr
= fninfo
.num_sgpr_params
;
7879 unsigned colors_written
= key
->ps_epilog
.colors_written
;
7880 int last_color_export
= -1;
7882 /* Find the last color export. */
7883 if (!key
->ps_epilog
.writes_z
&&
7884 !key
->ps_epilog
.writes_stencil
&&
7885 !key
->ps_epilog
.writes_samplemask
) {
7886 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
7888 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
7889 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
7890 /* Just set this if any of the colorbuffers are enabled. */
7892 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
7893 last_color_export
= 0;
7895 for (i
= 0; i
< 8; i
++)
7896 if (colors_written
& (1 << i
) &&
7897 (spi_format
>> (i
* 4)) & 0xf)
7898 last_color_export
= i
;
7902 while (colors_written
) {
7903 LLVMValueRef color
[4];
7904 int mrt
= u_bit_scan(&colors_written
);
7906 for (i
= 0; i
< 4; i
++)
7907 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
7909 si_export_mrt_color(bld_base
, color
, mrt
,
7910 fninfo
.num_params
- 1,
7911 mrt
== last_color_export
, &exp
);
7914 /* Process depth, stencil, samplemask. */
7915 if (key
->ps_epilog
.writes_z
)
7916 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7917 if (key
->ps_epilog
.writes_stencil
)
7918 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7919 if (key
->ps_epilog
.writes_samplemask
)
7920 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
7922 if (depth
|| stencil
|| samplemask
)
7923 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
7924 else if (last_color_export
== -1)
7925 ac_build_export_null(&ctx
->ac
);
7928 si_emit_ps_exports(ctx
, &exp
);
7931 LLVMBuildRetVoid(ctx
->ac
.builder
);
7935 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
7937 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
7938 struct ac_llvm_compiler
*compiler
,
7939 struct si_shader
*shader
,
7940 struct pipe_debug_callback
*debug
)
7942 union si_shader_part_key prolog_key
;
7943 union si_shader_part_key epilog_key
;
7945 /* Get the prolog. */
7946 si_get_ps_prolog_key(shader
, &prolog_key
, true);
7948 /* The prolog is a no-op if these aren't set. */
7949 if (si_need_ps_prolog(&prolog_key
)) {
7951 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
7952 PIPE_SHADER_FRAGMENT
, true,
7953 &prolog_key
, compiler
, debug
,
7954 si_build_ps_prolog_function
,
7955 "Fragment Shader Prolog");
7956 if (!shader
->prolog
)
7960 /* Get the epilog. */
7961 si_get_ps_epilog_key(shader
, &epilog_key
);
7964 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
7965 PIPE_SHADER_FRAGMENT
, false,
7966 &epilog_key
, compiler
, debug
,
7967 si_build_ps_epilog_function
,
7968 "Fragment Shader Epilog");
7969 if (!shader
->epilog
)
7972 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
7973 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
7974 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
7975 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
7978 /* Set up the enable bits for per-sample shading if needed. */
7979 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
7980 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7981 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7982 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
7983 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7984 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
7986 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
7987 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
7988 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7989 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
7990 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
7991 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
7993 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
7994 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
7995 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
7996 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
7997 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
7998 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8000 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8001 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8002 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8003 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8004 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8005 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8008 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8009 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8010 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8011 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8012 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8015 /* At least one pair of interpolation weights must be enabled. */
8016 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8017 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8018 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8021 /* Samplemask fixup requires the sample ID. */
8022 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8023 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8024 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8027 /* The sample mask input is always enabled, because the API shader always
8028 * passes it through to the epilog. Disable it here if it's unused.
8030 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8031 !shader
->selector
->info
.reads_samplemask
)
8032 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8037 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8040 /* If tessellation is all offchip and on-chip GS isn't used, this
8041 * workaround is not needed.
8045 /* SPI barrier management bug:
8046 * Make sure we have at least 4k of LDS in use to avoid the bug.
8047 * It applies to workgroup sizes of more than one wavefront.
8049 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8050 sscreen
->info
.family
== CHIP_KABINI
||
8051 sscreen
->info
.family
== CHIP_MULLINS
)
8052 *lds_size
= MAX2(*lds_size
, 8);
8055 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8056 struct si_shader
*shader
)
8058 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8060 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8062 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8063 si_get_max_workgroup_size(shader
) > 64) {
8064 si_multiwave_lds_size_workaround(sscreen
,
8065 &shader
->config
.lds_size
);
8069 int si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8070 struct si_shader
*shader
,
8071 struct pipe_debug_callback
*debug
)
8073 struct si_shader_selector
*sel
= shader
->selector
;
8074 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8077 /* LS, ES, VS are compiled on demand if the main part hasn't been
8078 * compiled for that stage.
8080 * Vertex shaders are compiled on demand when a vertex fetch
8081 * workaround must be applied.
8083 if (shader
->is_monolithic
) {
8084 /* Monolithic shader (compiled as a whole, has many variants,
8085 * may take a long time to compile).
8087 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8091 /* The shader consists of several parts:
8093 * - the middle part is the user shader, it has 1 variant only
8094 * and it was compiled during the creation of the shader
8096 * - the prolog part is inserted at the beginning
8097 * - the epilog part is inserted at the end
8099 * The prolog and epilog have many (but simple) variants.
8101 * Starting with gfx9, geometry and tessellation control
8102 * shaders also contain the prolog and user shader parts of
8103 * the previous shader stage.
8109 /* Copy the compiled TGSI shader data over. */
8110 shader
->is_binary_shared
= true;
8111 shader
->binary
= mainp
->binary
;
8112 shader
->config
= mainp
->config
;
8113 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8114 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8115 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8116 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8117 memcpy(shader
->info
.vs_output_param_offset
,
8118 mainp
->info
.vs_output_param_offset
,
8119 sizeof(mainp
->info
.vs_output_param_offset
));
8120 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8121 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8122 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8124 /* Select prologs and/or epilogs. */
8125 switch (sel
->type
) {
8126 case PIPE_SHADER_VERTEX
:
8127 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8130 case PIPE_SHADER_TESS_CTRL
:
8131 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8134 case PIPE_SHADER_TESS_EVAL
:
8136 case PIPE_SHADER_GEOMETRY
:
8137 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8140 case PIPE_SHADER_FRAGMENT
:
8141 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8144 /* Make sure we have at least as many VGPRs as there
8145 * are allocated inputs.
8147 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8148 shader
->info
.num_input_vgprs
);
8152 /* Update SGPR and VGPR counts. */
8153 if (shader
->prolog
) {
8154 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8155 shader
->prolog
->config
.num_sgprs
);
8156 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8157 shader
->prolog
->config
.num_vgprs
);
8159 if (shader
->previous_stage
) {
8160 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8161 shader
->previous_stage
->config
.num_sgprs
);
8162 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8163 shader
->previous_stage
->config
.num_vgprs
);
8164 shader
->config
.spilled_sgprs
=
8165 MAX2(shader
->config
.spilled_sgprs
,
8166 shader
->previous_stage
->config
.spilled_sgprs
);
8167 shader
->config
.spilled_vgprs
=
8168 MAX2(shader
->config
.spilled_vgprs
,
8169 shader
->previous_stage
->config
.spilled_vgprs
);
8170 shader
->config
.private_mem_vgprs
=
8171 MAX2(shader
->config
.private_mem_vgprs
,
8172 shader
->previous_stage
->config
.private_mem_vgprs
);
8173 shader
->config
.scratch_bytes_per_wave
=
8174 MAX2(shader
->config
.scratch_bytes_per_wave
,
8175 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8176 shader
->info
.uses_instanceid
|=
8177 shader
->previous_stage
->info
.uses_instanceid
;
8179 if (shader
->prolog2
) {
8180 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8181 shader
->prolog2
->config
.num_sgprs
);
8182 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8183 shader
->prolog2
->config
.num_vgprs
);
8185 if (shader
->epilog
) {
8186 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8187 shader
->epilog
->config
.num_sgprs
);
8188 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8189 shader
->epilog
->config
.num_vgprs
);
8191 si_calculate_max_simd_waves(shader
);
8194 si_fix_resource_usage(sscreen
, shader
);
8195 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8199 r
= si_shader_binary_upload(sscreen
, shader
);
8201 fprintf(stderr
, "LLVM failed to upload shader\n");
8208 void si_shader_destroy(struct si_shader
*shader
)
8210 if (shader
->scratch_bo
)
8211 r600_resource_reference(&shader
->scratch_bo
, NULL
);
8213 r600_resource_reference(&shader
->bo
, NULL
);
8215 if (!shader
->is_binary_shared
)
8216 ac_shader_binary_clean(&shader
->binary
);
8218 free(shader
->shader_log
);