2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
32 #include <llvm-c/Core.h> /* LLVMModuleRef */
33 #include "tgsi/tgsi_scan.h"
36 struct radeon_shader_binary
;
38 #define SI_SGPR_RW_BUFFERS 0 /* rings (& stream-out, VS only) */
39 #define SI_SGPR_CONST 2
40 #define SI_SGPR_SAMPLER 4
41 #define SI_SGPR_RESOURCE 6
42 #define SI_SGPR_VERTEX_BUFFER 8 /* VS only */
43 #define SI_SGPR_BASE_VERTEX 10 /* VS only */
44 #define SI_SGPR_START_INSTANCE 11 /* VS only */
45 #define SI_SGPR_ALPHA_REF 8 /* PS only */
47 #define SI_VS_NUM_USER_SGPR 12
48 #define SI_GS_NUM_USER_SGPR 8
49 #define SI_GSCOPY_NUM_USER_SGPR 4
50 #define SI_PS_NUM_USER_SGPR 9
52 /* LLVM function parameter indices */
53 #define SI_PARAM_RW_BUFFERS 0
54 #define SI_PARAM_CONST 1
55 #define SI_PARAM_SAMPLER 2
56 #define SI_PARAM_RESOURCE 3
58 /* VS only parameters */
59 #define SI_PARAM_VERTEX_BUFFER 4
60 #define SI_PARAM_BASE_VERTEX 5
61 #define SI_PARAM_START_INSTANCE 6
62 /* the other VS parameters are assigned dynamically */
64 /* ES only parameters */
65 #define SI_PARAM_ES2GS_OFFSET 7
67 /* GS only parameters */
68 #define SI_PARAM_GS2VS_OFFSET 4
69 #define SI_PARAM_GS_WAVE_ID 5
70 #define SI_PARAM_VTX0_OFFSET 6
71 #define SI_PARAM_VTX1_OFFSET 7
72 #define SI_PARAM_PRIMITIVE_ID 8
73 #define SI_PARAM_VTX2_OFFSET 9
74 #define SI_PARAM_VTX3_OFFSET 10
75 #define SI_PARAM_VTX4_OFFSET 11
76 #define SI_PARAM_VTX5_OFFSET 12
77 #define SI_PARAM_GS_INSTANCE_ID 13
79 /* PS only parameters */
80 #define SI_PARAM_ALPHA_REF 4
81 #define SI_PARAM_PRIM_MASK 5
82 #define SI_PARAM_PERSP_SAMPLE 6
83 #define SI_PARAM_PERSP_CENTER 7
84 #define SI_PARAM_PERSP_CENTROID 8
85 #define SI_PARAM_PERSP_PULL_MODEL 9
86 #define SI_PARAM_LINEAR_SAMPLE 10
87 #define SI_PARAM_LINEAR_CENTER 11
88 #define SI_PARAM_LINEAR_CENTROID 12
89 #define SI_PARAM_LINE_STIPPLE_TEX 13
90 #define SI_PARAM_POS_X_FLOAT 14
91 #define SI_PARAM_POS_Y_FLOAT 15
92 #define SI_PARAM_POS_Z_FLOAT 16
93 #define SI_PARAM_POS_W_FLOAT 17
94 #define SI_PARAM_FRONT_FACE 18
95 #define SI_PARAM_ANCILLARY 19
96 #define SI_PARAM_SAMPLE_COVERAGE 20
97 #define SI_PARAM_POS_FIXED_PT 21
99 #define SI_NUM_PARAMS (SI_PARAM_POS_FIXED_PT + 1)
103 struct si_shader_selector
{
104 struct si_shader
*current
;
106 struct tgsi_token
*tokens
;
107 struct pipe_stream_output_info so
;
108 struct tgsi_shader_info info
;
110 unsigned num_shaders
;
112 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
115 unsigned gs_output_prim
;
116 unsigned gs_max_out_vertices
;
117 uint64_t gs_used_inputs
; /* mask of "get_unique_index" bits */
120 union si_shader_key
{
122 unsigned export_16bpc
:8;
123 unsigned last_cbuf
:3;
124 unsigned color_two_side
:1;
125 unsigned alpha_func
:3;
126 unsigned flatshade
:1;
127 unsigned alpha_to_one
:1;
130 unsigned instance_divisors
[SI_NUM_VERTEX_BUFFERS
];
131 /* The mask of "get_unique_index" bits, needed for ES,
132 * it describes how the ES->GS ring buffer is laid out. */
133 uint64_t gs_used_inputs
;
139 struct si_shader_selector
*selector
;
140 struct si_shader
*next_variant
;
142 struct si_shader
*gs_copy_shader
;
143 struct si_pm4_state
*pm4
;
144 struct r600_resource
*bo
;
145 struct r600_resource
*scratch_bo
;
149 unsigned spi_ps_input_ena
;
150 unsigned scratch_bytes_per_wave
;
151 unsigned spi_shader_col_format
;
152 unsigned spi_shader_z_format
;
153 unsigned db_shader_control
;
154 unsigned cb_shader_mask
;
155 union si_shader_key key
;
158 unsigned vs_output_param_offset
[PIPE_MAX_SHADER_OUTPUTS
];
159 unsigned ps_input_param_offset
[PIPE_MAX_SHADER_INPUTS
];
161 bool uses_instanceid
;
162 unsigned nr_pos_exports
;
163 bool is_gs_copy_shader
;
166 static inline struct tgsi_shader_info
*si_get_vs_info(struct si_context
*sctx
)
168 return sctx
->gs_shader
? &sctx
->gs_shader
->info
169 : &sctx
->vs_shader
->info
;
172 static inline struct si_shader
* si_get_vs_state(struct si_context
*sctx
)
175 return sctx
->gs_shader
->current
->gs_copy_shader
;
177 return sctx
->vs_shader
->current
;
180 /* radeonsi_shader.c */
181 int si_shader_create(struct si_screen
*sscreen
, struct si_shader
*shader
);
182 int si_compile_llvm(struct si_screen
*sscreen
, struct si_shader
*shader
,
184 void si_shader_destroy(struct pipe_context
*ctx
, struct si_shader
*shader
);
185 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
);
186 int si_shader_binary_read(struct si_screen
*sscreen
, struct si_shader
*shader
,
187 const struct radeon_shader_binary
*binary
);
188 void si_shader_binary_read_config(const struct radeon_shader_binary
*binary
,
189 struct si_shader
*shader
,
190 unsigned symbol_offset
);