2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
29 /* How linking shader inputs and outputs between vertex, tessellation, and
30 * geometry shaders works.
32 * Inputs and outputs between shaders are stored in a buffer. This buffer
33 * lives in LDS (typical case for tessellation), but it can also live
34 * in memory (ESGS). Each input or output has a fixed location within a vertex.
35 * The highest used input or output determines the stride between vertices.
37 * Since GS and tessellation are only possible in the OpenGL core profile,
38 * only these semantics are valid for per-vertex data:
45 * CULLDIST0..1 (not implemented)
48 * For example, a shader only writing GENERIC0 has the output stride of 5.
50 * Only these semantics are valid for per-patch data:
58 * That's how independent shaders agree on input and output locations.
59 * The si_shader_io_get_unique_index function assigns the locations.
61 * For tessellation, other required information for calculating the input and
62 * output addresses like the vertex stride, the patch stride, and the offsets
63 * where per-vertex and per-patch data start, is passed to the shader via
64 * user data SGPRs. The offsets and strides are calculated at draw time and
65 * aren't available at compile time.
71 #include <llvm-c/Core.h> /* LLVMModuleRef */
72 #include <llvm-c/TargetMachine.h>
73 #include "tgsi/tgsi_scan.h"
74 #include "util/u_queue.h"
77 struct ac_shader_binary
;
79 #define SI_MAX_VS_OUTPUTS 40
81 /* SGPR user data indices */
83 SI_SGPR_RW_BUFFERS
, /* rings (& stream-out, VS only) */
84 SI_SGPR_RW_BUFFERS_HI
,
85 SI_SGPR_CONST_BUFFERS
,
86 SI_SGPR_CONST_BUFFERS_HI
,
87 SI_SGPR_SAMPLERS
, /* images & sampler states interleaved */
91 SI_SGPR_SHADER_BUFFERS
,
92 SI_SGPR_SHADER_BUFFERS_HI
,
93 SI_NUM_RESOURCE_SGPRS
,
96 SI_SGPR_VERTEX_BUFFERS
= SI_NUM_RESOURCE_SGPRS
,
97 SI_SGPR_VERTEX_BUFFERS_HI
,
99 SI_SGPR_START_INSTANCE
,
101 SI_SGPR_VS_STATE_BITS
,
105 SI_SGPR_TES_OFFCHIP_LAYOUT
= SI_NUM_RESOURCE_SGPRS
,
106 SI_TES_NUM_USER_SGPR
,
108 /* GFX6-8: TCS only */
109 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
= SI_NUM_RESOURCE_SGPRS
,
110 GFX6_SGPR_TCS_OUT_OFFSETS
,
111 GFX6_SGPR_TCS_OUT_LAYOUT
,
112 GFX6_SGPR_TCS_IN_LAYOUT
,
113 GFX6_TCS_NUM_USER_SGPR
,
115 /* GFX9: Merged LS-HS (VS-TCS) only. */
116 GFX9_SGPR_TCS_OFFCHIP_LAYOUT
= SI_VS_NUM_USER_SGPR
,
117 GFX9_SGPR_TCS_OUT_OFFSETS
,
118 GFX9_SGPR_TCS_OUT_LAYOUT
,
119 GFX9_SGPR_unused_to_align_the_next_pointer
,
120 GFX9_SGPR_TCS_CONST_BUFFERS
,
121 GFX9_SGPR_TCS_CONST_BUFFERS_HI
,
122 GFX9_SGPR_TCS_SAMPLERS
, /* images & sampler states interleaved */
123 GFX9_SGPR_TCS_SAMPLERS_HI
,
124 GFX9_SGPR_TCS_IMAGES
,
125 GFX9_SGPR_TCS_IMAGES_HI
,
126 GFX9_SGPR_TCS_SHADER_BUFFERS
,
127 GFX9_SGPR_TCS_SHADER_BUFFERS_HI
,
128 GFX9_TCS_NUM_USER_SGPR
,
131 SI_GS_NUM_USER_SGPR
= SI_NUM_RESOURCE_SGPRS
,
132 SI_GSCOPY_NUM_USER_SGPR
= SI_SGPR_RW_BUFFERS_HI
+ 1,
135 SI_SGPR_ALPHA_REF
= SI_NUM_RESOURCE_SGPRS
,
139 SI_SGPR_GRID_SIZE
= SI_NUM_RESOURCE_SGPRS
,
140 SI_SGPR_BLOCK_SIZE
= SI_SGPR_GRID_SIZE
+ 3,
141 SI_CS_NUM_USER_SGPR
= SI_SGPR_BLOCK_SIZE
+ 3
144 /* LLVM function parameter indices */
146 SI_NUM_RESOURCE_PARAMS
= 5,
148 /* PS only parameters */
149 SI_PARAM_ALPHA_REF
= SI_NUM_RESOURCE_PARAMS
,
151 SI_PARAM_PERSP_SAMPLE
,
152 SI_PARAM_PERSP_CENTER
,
153 SI_PARAM_PERSP_CENTROID
,
154 SI_PARAM_PERSP_PULL_MODEL
,
155 SI_PARAM_LINEAR_SAMPLE
,
156 SI_PARAM_LINEAR_CENTER
,
157 SI_PARAM_LINEAR_CENTROID
,
158 SI_PARAM_LINE_STIPPLE_TEX
,
159 SI_PARAM_POS_X_FLOAT
,
160 SI_PARAM_POS_Y_FLOAT
,
161 SI_PARAM_POS_Z_FLOAT
,
162 SI_PARAM_POS_W_FLOAT
,
165 SI_PARAM_SAMPLE_COVERAGE
,
166 SI_PARAM_POS_FIXED_PT
,
168 /* CS only parameters */
169 SI_PARAM_GRID_SIZE
= SI_NUM_RESOURCE_PARAMS
,
174 SI_NUM_PARAMS
= SI_PARAM_POS_FIXED_PT
+ 9, /* +8 for COLOR[0..1] */
177 /* Fields of driver-defined VS state SGPR. */
178 /* Clamp vertex color output (only used in VS as VS). */
179 #define S_VS_STATE_CLAMP_VERTEX_COLOR(x) (((unsigned)(x) & 0x1) << 0)
180 #define C_VS_STATE_CLAMP_VERTEX_COLOR 0xFFFFFFFE
181 #define S_VS_STATE_INDEXED(x) (((unsigned)(x) & 0x1) << 1)
182 #define C_VS_STATE_INDEXED 0xFFFFFFFD
183 #define S_VS_STATE_LS_OUT_PATCH_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8)
184 #define C_VS_STATE_LS_OUT_PATCH_SIZE 0xFFE000FF
185 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x) (((unsigned)(x) & 0xFF) << 24)
186 #define C_VS_STATE_LS_OUT_VERTEX_SIZE 0x00FFFFFF
188 /* SI-specific system values. */
190 TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
= TGSI_SEMANTIC_COUNT
,
191 TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
,
194 /* For VS shader key fix_fetch. */
196 SI_FIX_FETCH_NONE
= 0,
197 SI_FIX_FETCH_A2_SNORM
,
198 SI_FIX_FETCH_A2_SSCALED
,
199 SI_FIX_FETCH_A2_SINT
,
200 SI_FIX_FETCH_RGBA_32_UNORM
,
201 SI_FIX_FETCH_RGBX_32_UNORM
,
202 SI_FIX_FETCH_RGBA_32_SNORM
,
203 SI_FIX_FETCH_RGBX_32_SNORM
,
204 SI_FIX_FETCH_RGBA_32_USCALED
,
205 SI_FIX_FETCH_RGBA_32_SSCALED
,
206 SI_FIX_FETCH_RGBA_32_FIXED
,
207 SI_FIX_FETCH_RGBX_32_FIXED
,
208 SI_FIX_FETCH_RG_64_FLOAT
,
209 SI_FIX_FETCH_RGB_64_FLOAT
,
210 SI_FIX_FETCH_RGBA_64_FLOAT
,
211 SI_FIX_FETCH_RGB_8
, /* A = 1.0 */
212 SI_FIX_FETCH_RGB_8_INT
, /* A = 1 */
214 SI_FIX_FETCH_RGB_16_INT
,
219 /* State of the context creating the shader object. */
220 struct si_compiler_ctx_state
{
221 /* Should only be used by si_init_shader_selector_async and
222 * si_build_shader_variant if thread_index == -1 (non-threaded). */
223 LLVMTargetMachineRef tm
;
225 /* Used if thread_index == -1 or if debug.async is true. */
226 struct pipe_debug_callback debug
;
228 /* Used for creating the log string for gallium/ddebug. */
229 bool is_debug_context
;
232 /* A shader selector is a gallium CSO and contains shader variants and
233 * binaries for one TGSI program. This can be shared by multiple contexts.
235 struct si_shader_selector
{
236 struct si_screen
*screen
;
237 struct util_queue_fence ready
;
238 struct si_compiler_ctx_state compiler_ctx_state
;
241 struct si_shader
*first_variant
; /* immutable after the first variant */
242 struct si_shader
*last_variant
; /* mutable */
244 /* The compiled TGSI shader expecting a prolog and/or epilog (not
245 * uploaded to a buffer).
247 struct si_shader
*main_shader_part
;
248 struct si_shader
*main_shader_part_ls
; /* as_ls is set in the key */
249 struct si_shader
*main_shader_part_es
; /* as_es is set in the key */
251 struct si_shader
*gs_copy_shader
;
253 struct tgsi_token
*tokens
;
254 struct pipe_stream_output_info so
;
255 struct tgsi_shader_info info
;
257 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
259 bool vs_needs_prolog
;
262 unsigned esgs_itemsize
;
263 unsigned gs_input_verts_per_prim
;
264 unsigned gs_output_prim
;
265 unsigned gs_max_out_vertices
;
266 unsigned gs_num_invocations
;
267 unsigned max_gs_stream
; /* count - 1 */
268 unsigned gsvs_vertex_size
;
269 unsigned max_gsvs_emit_size
;
272 unsigned color_attr_index
[2];
273 unsigned db_shader_control
;
274 /* Set 0xf or 0x0 (4 bits) per each written output.
275 * ANDed with spi_shader_col_format.
277 unsigned colors_written_4bit
;
282 uint64_t outputs_written
; /* "get_unique_index" bits */
283 uint32_t patch_outputs_written
; /* "get_unique_index" bits */
284 uint32_t outputs_written2
; /* "get_unique_index2" bits */
286 uint64_t inputs_read
; /* "get_unique_index" bits */
287 uint32_t inputs_read2
; /* "get_unique_index2" bits */
290 /* Valid shader configurations:
292 * API shaders VS | TCS | TES | GS |pass| PS
293 * are compiled as: | | | |thru|
295 * Only VS & PS: VS | | | | | PS
296 * GFX6 - with GS: ES | | | GS | VS | PS
297 * - with tess: LS | HS | VS | | | PS
298 * - with both: LS | HS | ES | GS | VS | PS
299 * GFX9 - with GS: -> | | | GS | VS | PS
300 * - with tess: -> | HS | VS | | | PS
301 * - with both: -> | HS | -> | GS | VS | PS
303 * -> = merged with the next stage
306 /* Common VS bits between the shader key and the prolog key. */
307 struct si_vs_prolog_bits
{
308 unsigned instance_divisors
[SI_MAX_ATTRIBS
];
311 /* Common VS bits between the shader key and the epilog key. */
312 struct si_vs_epilog_bits
{
313 unsigned export_prim_id
:1; /* when PS needs it and GS is disabled */
316 /* Common TCS bits between the shader key and the epilog key. */
317 struct si_tcs_epilog_bits
{
318 unsigned prim_mode
:3;
319 unsigned tes_reads_tess_factors
:1;
322 struct si_gs_prolog_bits
{
323 unsigned tri_strip_adj_fix
:1;
326 /* Common PS bits between the shader key and the prolog key. */
327 struct si_ps_prolog_bits
{
328 unsigned color_two_side
:1;
329 unsigned flatshade_colors
:1;
330 unsigned poly_stipple
:1;
331 unsigned force_persp_sample_interp
:1;
332 unsigned force_linear_sample_interp
:1;
333 unsigned force_persp_center_interp
:1;
334 unsigned force_linear_center_interp
:1;
335 unsigned bc_optimize_for_persp
:1;
336 unsigned bc_optimize_for_linear
:1;
339 /* Common PS bits between the shader key and the epilog key. */
340 struct si_ps_epilog_bits
{
341 unsigned spi_shader_col_format
;
342 unsigned color_is_int8
:8;
343 unsigned color_is_int10
:8;
344 unsigned last_cbuf
:3;
345 unsigned alpha_func
:3;
346 unsigned alpha_to_one
:1;
347 unsigned poly_line_smoothing
:1;
348 unsigned clamp_color
:1;
351 union si_shader_part_key
{
353 struct si_vs_prolog_bits states
;
354 unsigned num_input_sgprs
:6;
355 /* For merged stages such as LS-HS, HS input VGPRs are first. */
356 unsigned num_merged_next_stage_vgprs
:3;
357 unsigned last_input
:4;
358 /* Prologs for monolithic shaders shouldn't set EXEC. */
359 unsigned is_monolithic
:1;
362 struct si_vs_epilog_bits states
;
363 unsigned prim_id_param_offset
:5;
366 struct si_tcs_epilog_bits states
;
369 struct si_gs_prolog_bits states
;
372 struct si_ps_prolog_bits states
;
373 unsigned num_input_sgprs
:6;
374 unsigned num_input_vgprs
:5;
375 /* Color interpolation and two-side color selection. */
376 unsigned colors_read
:8; /* color input components read */
377 unsigned num_interp_inputs
:5; /* BCOLOR is at this location */
378 unsigned face_vgpr_index
:5;
380 char color_attr_index
[2];
381 char color_interp_vgpr_index
[2]; /* -1 == constant */
384 struct si_ps_epilog_bits states
;
385 unsigned colors_written
:8;
387 unsigned writes_stencil
:1;
388 unsigned writes_samplemask
:1;
392 struct si_shader_key
{
393 /* Prolog and epilog flags. */
396 struct si_vs_prolog_bits prolog
;
397 struct si_vs_epilog_bits epilog
;
400 struct si_vs_prolog_bits ls_prolog
; /* for merged LS-HS */
401 struct si_shader_selector
*ls
; /* for merged LS-HS */
402 struct si_tcs_epilog_bits epilog
;
403 } tcs
; /* tessellation control shader */
405 struct si_vs_epilog_bits epilog
; /* same as VS */
406 } tes
; /* tessellation evaluation shader */
408 struct si_gs_prolog_bits prolog
;
411 struct si_ps_prolog_bits prolog
;
412 struct si_ps_epilog_bits epilog
;
416 /* These two are initially set according to the NEXT_SHADER property,
417 * or guessed if the property doesn't seem correct.
419 unsigned as_es
:1; /* export shader, which precedes GS */
420 unsigned as_ls
:1; /* local shader, which precedes TCS */
422 /* Flags for monolithic compilation only. */
424 /* One byte for every input: SI_FIX_FETCH_* enums. */
425 uint8_t vs_fix_fetch
[SI_MAX_ATTRIBS
];
426 uint64_t ff_tcs_inputs_to_copy
; /* for fixed-func TCS */
429 /* Optimization flags for asynchronous compilation only. */
432 uint64_t kill_outputs
; /* "get_unique_index" bits */
433 uint32_t kill_outputs2
; /* "get_unique_index2" bits */
434 unsigned clip_disable
:1;
435 } hw_vs
; /* HW VS (it can be VS, TES, GS) */
439 struct si_shader_config
{
442 unsigned spilled_sgprs
;
443 unsigned spilled_vgprs
;
444 unsigned private_mem_vgprs
;
446 unsigned spi_ps_input_ena
;
447 unsigned spi_ps_input_addr
;
449 unsigned scratch_bytes_per_wave
;
454 /* GCN-specific shader info. */
455 struct si_shader_info
{
456 ubyte vs_output_param_offset
[SI_MAX_VS_OUTPUTS
];
457 ubyte num_input_sgprs
;
458 ubyte num_input_vgprs
;
459 char face_vgpr_index
;
460 bool uses_instanceid
;
461 ubyte nr_pos_exports
;
462 ubyte nr_param_exports
;
466 struct si_compiler_ctx_state compiler_ctx_state
;
468 struct si_shader_selector
*selector
;
469 struct si_shader
*next_variant
;
471 struct si_shader_part
*prolog
;
472 struct si_shader
*previous_stage
; /* for GFX9 */
473 struct si_shader_part
*epilog
;
475 struct si_pm4_state
*pm4
;
476 struct r600_resource
*bo
;
477 struct r600_resource
*scratch_bo
;
478 struct si_shader_key key
;
479 struct util_queue_fence optimized_ready
;
480 bool compilation_failed
;
483 bool is_binary_shared
;
484 bool is_gs_copy_shader
;
486 /* The following data is all that's needed for binary shaders. */
487 struct ac_shader_binary binary
;
488 struct si_shader_config config
;
489 struct si_shader_info info
;
491 /* Shader key + LLVM IR + disassembly + statistics.
492 * Generated for debug contexts only.
495 size_t shader_log_size
;
498 struct si_shader_part
{
499 struct si_shader_part
*next
;
500 union si_shader_part_key key
;
501 struct ac_shader_binary binary
;
502 struct si_shader_config config
;
507 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
508 LLVMTargetMachineRef tm
,
509 struct si_shader_selector
*gs_selector
,
510 struct pipe_debug_callback
*debug
);
511 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
512 LLVMTargetMachineRef tm
,
513 struct si_shader
*shader
,
515 struct pipe_debug_callback
*debug
);
516 int si_shader_create(struct si_screen
*sscreen
, LLVMTargetMachineRef tm
,
517 struct si_shader
*shader
,
518 struct pipe_debug_callback
*debug
);
519 int si_compile_llvm(struct si_screen
*sscreen
,
520 struct ac_shader_binary
*binary
,
521 struct si_shader_config
*conf
,
522 LLVMTargetMachineRef tm
,
524 struct pipe_debug_callback
*debug
,
527 void si_shader_destroy(struct si_shader
*shader
);
528 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
);
529 unsigned si_shader_io_get_unique_index2(unsigned name
, unsigned index
);
530 int si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
);
531 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
532 struct pipe_debug_callback
*debug
, unsigned processor
,
533 FILE *f
, bool check_debug_option
);
534 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
536 void si_shader_apply_scratch_relocs(struct si_context
*sctx
,
537 struct si_shader
*shader
,
538 struct si_shader_config
*config
,
539 uint64_t scratch_va
);
540 void si_shader_binary_read_config(struct ac_shader_binary
*binary
,
541 struct si_shader_config
*conf
,
542 unsigned symbol_offset
);
543 unsigned si_get_spi_shader_z_format(bool writes_z
, bool writes_stencil
,
544 bool writes_samplemask
);
545 const char *si_get_shader_name(struct si_shader
*shader
, unsigned processor
);
547 /* Inline helpers. */
549 /* Return the pointer to the main shader part's pointer. */
550 static inline struct si_shader
**
551 si_get_main_shader_part(struct si_shader_selector
*sel
,
552 struct si_shader_key
*key
)
555 return &sel
->main_shader_part_ls
;
557 return &sel
->main_shader_part_es
;
558 return &sel
->main_shader_part
;