radeonsi/gfx9: add GS user SGPRs
[mesa.git] / src / gallium / drivers / radeonsi / si_shader.h
1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
27 */
28
29 /* How linking shader inputs and outputs between vertex, tessellation, and
30 * geometry shaders works.
31 *
32 * Inputs and outputs between shaders are stored in a buffer. This buffer
33 * lives in LDS (typical case for tessellation), but it can also live
34 * in memory (ESGS). Each input or output has a fixed location within a vertex.
35 * The highest used input or output determines the stride between vertices.
36 *
37 * Since GS and tessellation are only possible in the OpenGL core profile,
38 * only these semantics are valid for per-vertex data:
39 *
40 * Name Location
41 *
42 * POSITION 0
43 * PSIZE 1
44 * CLIPDIST0..1 2..3
45 * CULLDIST0..1 (not implemented)
46 * GENERIC0..31 4..35
47 *
48 * For example, a shader only writing GENERIC0 has the output stride of 5.
49 *
50 * Only these semantics are valid for per-patch data:
51 *
52 * Name Location
53 *
54 * TESSOUTER 0
55 * TESSINNER 1
56 * PATCH0..29 2..31
57 *
58 * That's how independent shaders agree on input and output locations.
59 * The si_shader_io_get_unique_index function assigns the locations.
60 *
61 * For tessellation, other required information for calculating the input and
62 * output addresses like the vertex stride, the patch stride, and the offsets
63 * where per-vertex and per-patch data start, is passed to the shader via
64 * user data SGPRs. The offsets and strides are calculated at draw time and
65 * aren't available at compile time.
66 */
67
68 #ifndef SI_SHADER_H
69 #define SI_SHADER_H
70
71 #include <llvm-c/Core.h> /* LLVMModuleRef */
72 #include <llvm-c/TargetMachine.h>
73 #include "tgsi/tgsi_scan.h"
74 #include "util/u_queue.h"
75 #include "si_state.h"
76
77 struct ac_shader_binary;
78
79 #define SI_MAX_VS_OUTPUTS 40
80
81 /* SGPR user data indices */
82 enum {
83 /* GFX9 merged shaders have RW_BUFFERS among the first 8 system SGPRs,
84 * and these two are used for other purposes.
85 */
86 SI_SGPR_RW_BUFFERS, /* rings (& stream-out, VS only) */
87 SI_SGPR_RW_BUFFERS_HI,
88 SI_SGPR_CONST_BUFFERS,
89 SI_SGPR_CONST_BUFFERS_HI,
90 SI_SGPR_SAMPLERS, /* images & sampler states interleaved */
91 SI_SGPR_SAMPLERS_HI,
92 SI_SGPR_IMAGES,
93 SI_SGPR_IMAGES_HI,
94 SI_SGPR_SHADER_BUFFERS,
95 SI_SGPR_SHADER_BUFFERS_HI,
96 SI_NUM_RESOURCE_SGPRS,
97
98 /* all VS variants */
99 SI_SGPR_VERTEX_BUFFERS = SI_NUM_RESOURCE_SGPRS,
100 SI_SGPR_VERTEX_BUFFERS_HI,
101 SI_SGPR_BASE_VERTEX,
102 SI_SGPR_START_INSTANCE,
103 SI_SGPR_DRAWID,
104 SI_SGPR_VS_STATE_BITS,
105 SI_VS_NUM_USER_SGPR,
106
107 /* TES */
108 SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
109 SI_TES_NUM_USER_SGPR,
110
111 /* GFX6-8: TCS only */
112 GFX6_SGPR_TCS_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
113 GFX6_SGPR_TCS_OUT_OFFSETS,
114 GFX6_SGPR_TCS_OUT_LAYOUT,
115 GFX6_SGPR_TCS_IN_LAYOUT,
116 GFX6_TCS_NUM_USER_SGPR,
117
118 /* GFX9: Merged LS-HS (VS-TCS) only. */
119 GFX9_SGPR_TCS_OFFCHIP_LAYOUT = SI_VS_NUM_USER_SGPR,
120 GFX9_SGPR_TCS_OUT_OFFSETS,
121 GFX9_SGPR_TCS_OUT_LAYOUT,
122 GFX9_SGPR_unused_to_align_the_next_pointer,
123 GFX9_SGPR_TCS_CONST_BUFFERS,
124 GFX9_SGPR_TCS_CONST_BUFFERS_HI,
125 GFX9_SGPR_TCS_SAMPLERS, /* images & sampler states interleaved */
126 GFX9_SGPR_TCS_SAMPLERS_HI,
127 GFX9_SGPR_TCS_IMAGES,
128 GFX9_SGPR_TCS_IMAGES_HI,
129 GFX9_SGPR_TCS_SHADER_BUFFERS,
130 GFX9_SGPR_TCS_SHADER_BUFFERS_HI,
131 GFX9_TCS_NUM_USER_SGPR,
132
133 /* GFX9: Merged ES-GS (VS-GS or TES-GS). */
134 GFX9_SGPR_GS_CONST_BUFFERS = SI_VS_NUM_USER_SGPR,
135 GFX9_SGPR_GS_CONST_BUFFERS_HI,
136 GFX9_SGPR_GS_SAMPLERS,
137 GFX9_SGPR_GS_SAMPLERS_HI,
138 GFX9_SGPR_GS_IMAGES,
139 GFX9_SGPR_GS_IMAGES_HI,
140 GFX9_SGPR_GS_SHADER_BUFFERS,
141 GFX9_SGPR_GS_SHADER_BUFFERS_HI,
142 GFX9_GS_NUM_USER_SGPR,
143
144 /* GS limits */
145 GFX6_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS,
146 SI_GSCOPY_NUM_USER_SGPR = SI_SGPR_RW_BUFFERS_HI + 1,
147
148 /* PS only */
149 SI_SGPR_ALPHA_REF = SI_NUM_RESOURCE_SGPRS,
150 SI_PS_NUM_USER_SGPR,
151
152 /* CS only */
153 SI_SGPR_GRID_SIZE = SI_NUM_RESOURCE_SGPRS,
154 SI_SGPR_BLOCK_SIZE = SI_SGPR_GRID_SIZE + 3,
155 SI_CS_NUM_USER_SGPR = SI_SGPR_BLOCK_SIZE + 3
156 };
157
158 /* LLVM function parameter indices */
159 enum {
160 SI_NUM_RESOURCE_PARAMS = 5,
161
162 /* PS only parameters */
163 SI_PARAM_ALPHA_REF = SI_NUM_RESOURCE_PARAMS,
164 SI_PARAM_PRIM_MASK,
165 SI_PARAM_PERSP_SAMPLE,
166 SI_PARAM_PERSP_CENTER,
167 SI_PARAM_PERSP_CENTROID,
168 SI_PARAM_PERSP_PULL_MODEL,
169 SI_PARAM_LINEAR_SAMPLE,
170 SI_PARAM_LINEAR_CENTER,
171 SI_PARAM_LINEAR_CENTROID,
172 SI_PARAM_LINE_STIPPLE_TEX,
173 SI_PARAM_POS_X_FLOAT,
174 SI_PARAM_POS_Y_FLOAT,
175 SI_PARAM_POS_Z_FLOAT,
176 SI_PARAM_POS_W_FLOAT,
177 SI_PARAM_FRONT_FACE,
178 SI_PARAM_ANCILLARY,
179 SI_PARAM_SAMPLE_COVERAGE,
180 SI_PARAM_POS_FIXED_PT,
181
182 /* CS only parameters */
183 SI_PARAM_GRID_SIZE = SI_NUM_RESOURCE_PARAMS,
184 SI_PARAM_BLOCK_SIZE,
185 SI_PARAM_BLOCK_ID,
186 SI_PARAM_THREAD_ID,
187
188 SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
189 };
190
191 /* Fields of driver-defined VS state SGPR. */
192 /* Clamp vertex color output (only used in VS as VS). */
193 #define S_VS_STATE_CLAMP_VERTEX_COLOR(x) (((unsigned)(x) & 0x1) << 0)
194 #define C_VS_STATE_CLAMP_VERTEX_COLOR 0xFFFFFFFE
195 #define S_VS_STATE_INDEXED(x) (((unsigned)(x) & 0x1) << 1)
196 #define C_VS_STATE_INDEXED 0xFFFFFFFD
197 #define S_VS_STATE_LS_OUT_PATCH_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8)
198 #define C_VS_STATE_LS_OUT_PATCH_SIZE 0xFFE000FF
199 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x) (((unsigned)(x) & 0xFF) << 24)
200 #define C_VS_STATE_LS_OUT_VERTEX_SIZE 0x00FFFFFF
201
202 /* SI-specific system values. */
203 enum {
204 TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
205 TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
206 };
207
208 /* For VS shader key fix_fetch. */
209 enum {
210 SI_FIX_FETCH_NONE = 0,
211 SI_FIX_FETCH_A2_SNORM,
212 SI_FIX_FETCH_A2_SSCALED,
213 SI_FIX_FETCH_A2_SINT,
214 SI_FIX_FETCH_RGBA_32_UNORM,
215 SI_FIX_FETCH_RGBX_32_UNORM,
216 SI_FIX_FETCH_RGBA_32_SNORM,
217 SI_FIX_FETCH_RGBX_32_SNORM,
218 SI_FIX_FETCH_RGBA_32_USCALED,
219 SI_FIX_FETCH_RGBA_32_SSCALED,
220 SI_FIX_FETCH_RGBA_32_FIXED,
221 SI_FIX_FETCH_RGBX_32_FIXED,
222 SI_FIX_FETCH_RG_64_FLOAT,
223 SI_FIX_FETCH_RGB_64_FLOAT,
224 SI_FIX_FETCH_RGBA_64_FLOAT,
225 SI_FIX_FETCH_RGB_8, /* A = 1.0 */
226 SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
227 SI_FIX_FETCH_RGB_16,
228 SI_FIX_FETCH_RGB_16_INT,
229 };
230
231 struct si_shader;
232
233 /* State of the context creating the shader object. */
234 struct si_compiler_ctx_state {
235 /* Should only be used by si_init_shader_selector_async and
236 * si_build_shader_variant if thread_index == -1 (non-threaded). */
237 LLVMTargetMachineRef tm;
238
239 /* Used if thread_index == -1 or if debug.async is true. */
240 struct pipe_debug_callback debug;
241
242 /* Used for creating the log string for gallium/ddebug. */
243 bool is_debug_context;
244 };
245
246 /* A shader selector is a gallium CSO and contains shader variants and
247 * binaries for one TGSI program. This can be shared by multiple contexts.
248 */
249 struct si_shader_selector {
250 struct si_screen *screen;
251 struct util_queue_fence ready;
252 struct si_compiler_ctx_state compiler_ctx_state;
253
254 mtx_t mutex;
255 struct si_shader *first_variant; /* immutable after the first variant */
256 struct si_shader *last_variant; /* mutable */
257
258 /* The compiled TGSI shader expecting a prolog and/or epilog (not
259 * uploaded to a buffer).
260 */
261 struct si_shader *main_shader_part;
262 struct si_shader *main_shader_part_ls; /* as_ls is set in the key */
263 struct si_shader *main_shader_part_es; /* as_es is set in the key */
264
265 struct si_shader *gs_copy_shader;
266
267 struct tgsi_token *tokens;
268 struct pipe_stream_output_info so;
269 struct tgsi_shader_info info;
270
271 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
272 unsigned type;
273 bool vs_needs_prolog;
274
275 /* GS parameters. */
276 unsigned esgs_itemsize;
277 unsigned gs_input_verts_per_prim;
278 unsigned gs_output_prim;
279 unsigned gs_max_out_vertices;
280 unsigned gs_num_invocations;
281 unsigned max_gs_stream; /* count - 1 */
282 unsigned gsvs_vertex_size;
283 unsigned max_gsvs_emit_size;
284
285 /* PS parameters. */
286 unsigned color_attr_index[2];
287 unsigned db_shader_control;
288 /* Set 0xf or 0x0 (4 bits) per each written output.
289 * ANDed with spi_shader_col_format.
290 */
291 unsigned colors_written_4bit;
292
293 /* CS parameters */
294 unsigned local_size;
295
296 uint64_t outputs_written; /* "get_unique_index" bits */
297 uint32_t patch_outputs_written; /* "get_unique_index" bits */
298 uint32_t outputs_written2; /* "get_unique_index2" bits */
299
300 uint64_t inputs_read; /* "get_unique_index" bits */
301 uint32_t inputs_read2; /* "get_unique_index2" bits */
302 };
303
304 /* Valid shader configurations:
305 *
306 * API shaders VS | TCS | TES | GS |pass| PS
307 * are compiled as: | | | |thru|
308 * | | | | |
309 * Only VS & PS: VS | | | | | PS
310 * GFX6 - with GS: ES | | | GS | VS | PS
311 * - with tess: LS | HS | VS | | | PS
312 * - with both: LS | HS | ES | GS | VS | PS
313 * GFX9 - with GS: -> | | | GS | VS | PS
314 * - with tess: -> | HS | VS | | | PS
315 * - with both: -> | HS | -> | GS | VS | PS
316 *
317 * -> = merged with the next stage
318 */
319
320 /* Common VS bits between the shader key and the prolog key. */
321 struct si_vs_prolog_bits {
322 unsigned instance_divisors[SI_MAX_ATTRIBS];
323 };
324
325 /* Common VS bits between the shader key and the epilog key. */
326 struct si_vs_epilog_bits {
327 unsigned export_prim_id:1; /* when PS needs it and GS is disabled */
328 };
329
330 /* Common TCS bits between the shader key and the epilog key. */
331 struct si_tcs_epilog_bits {
332 unsigned prim_mode:3;
333 unsigned tes_reads_tess_factors:1;
334 };
335
336 struct si_gs_prolog_bits {
337 unsigned tri_strip_adj_fix:1;
338 };
339
340 /* Common PS bits between the shader key and the prolog key. */
341 struct si_ps_prolog_bits {
342 unsigned color_two_side:1;
343 unsigned flatshade_colors:1;
344 unsigned poly_stipple:1;
345 unsigned force_persp_sample_interp:1;
346 unsigned force_linear_sample_interp:1;
347 unsigned force_persp_center_interp:1;
348 unsigned force_linear_center_interp:1;
349 unsigned bc_optimize_for_persp:1;
350 unsigned bc_optimize_for_linear:1;
351 };
352
353 /* Common PS bits between the shader key and the epilog key. */
354 struct si_ps_epilog_bits {
355 unsigned spi_shader_col_format;
356 unsigned color_is_int8:8;
357 unsigned color_is_int10:8;
358 unsigned last_cbuf:3;
359 unsigned alpha_func:3;
360 unsigned alpha_to_one:1;
361 unsigned poly_line_smoothing:1;
362 unsigned clamp_color:1;
363 };
364
365 union si_shader_part_key {
366 struct {
367 struct si_vs_prolog_bits states;
368 unsigned num_input_sgprs:6;
369 /* For merged stages such as LS-HS, HS input VGPRs are first. */
370 unsigned num_merged_next_stage_vgprs:3;
371 unsigned last_input:4;
372 /* Prologs for monolithic shaders shouldn't set EXEC. */
373 unsigned is_monolithic:1;
374 } vs_prolog;
375 struct {
376 struct si_vs_epilog_bits states;
377 unsigned prim_id_param_offset:5;
378 } vs_epilog;
379 struct {
380 struct si_tcs_epilog_bits states;
381 } tcs_epilog;
382 struct {
383 struct si_gs_prolog_bits states;
384 } gs_prolog;
385 struct {
386 struct si_ps_prolog_bits states;
387 unsigned num_input_sgprs:6;
388 unsigned num_input_vgprs:5;
389 /* Color interpolation and two-side color selection. */
390 unsigned colors_read:8; /* color input components read */
391 unsigned num_interp_inputs:5; /* BCOLOR is at this location */
392 unsigned face_vgpr_index:5;
393 unsigned wqm:1;
394 char color_attr_index[2];
395 char color_interp_vgpr_index[2]; /* -1 == constant */
396 } ps_prolog;
397 struct {
398 struct si_ps_epilog_bits states;
399 unsigned colors_written:8;
400 unsigned writes_z:1;
401 unsigned writes_stencil:1;
402 unsigned writes_samplemask:1;
403 } ps_epilog;
404 };
405
406 struct si_shader_key {
407 /* Prolog and epilog flags. */
408 union {
409 struct {
410 struct si_vs_prolog_bits prolog;
411 struct si_vs_epilog_bits epilog;
412 } vs;
413 struct {
414 struct si_vs_prolog_bits ls_prolog; /* for merged LS-HS */
415 struct si_shader_selector *ls; /* for merged LS-HS */
416 struct si_tcs_epilog_bits epilog;
417 } tcs; /* tessellation control shader */
418 struct {
419 struct si_vs_epilog_bits epilog; /* same as VS */
420 } tes; /* tessellation evaluation shader */
421 struct {
422 struct si_gs_prolog_bits prolog;
423 } gs;
424 struct {
425 struct si_ps_prolog_bits prolog;
426 struct si_ps_epilog_bits epilog;
427 } ps;
428 } part;
429
430 /* These two are initially set according to the NEXT_SHADER property,
431 * or guessed if the property doesn't seem correct.
432 */
433 unsigned as_es:1; /* export shader, which precedes GS */
434 unsigned as_ls:1; /* local shader, which precedes TCS */
435
436 /* Flags for monolithic compilation only. */
437 struct {
438 /* One byte for every input: SI_FIX_FETCH_* enums. */
439 uint8_t vs_fix_fetch[SI_MAX_ATTRIBS];
440 uint64_t ff_tcs_inputs_to_copy; /* for fixed-func TCS */
441 } mono;
442
443 /* Optimization flags for asynchronous compilation only. */
444 union {
445 struct {
446 uint64_t kill_outputs; /* "get_unique_index" bits */
447 uint32_t kill_outputs2; /* "get_unique_index2" bits */
448 unsigned clip_disable:1;
449 } hw_vs; /* HW VS (it can be VS, TES, GS) */
450 } opt;
451 };
452
453 struct si_shader_config {
454 unsigned num_sgprs;
455 unsigned num_vgprs;
456 unsigned spilled_sgprs;
457 unsigned spilled_vgprs;
458 unsigned private_mem_vgprs;
459 unsigned lds_size;
460 unsigned spi_ps_input_ena;
461 unsigned spi_ps_input_addr;
462 unsigned float_mode;
463 unsigned scratch_bytes_per_wave;
464 unsigned rsrc1;
465 unsigned rsrc2;
466 };
467
468 /* GCN-specific shader info. */
469 struct si_shader_info {
470 ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS];
471 ubyte num_input_sgprs;
472 ubyte num_input_vgprs;
473 char face_vgpr_index;
474 bool uses_instanceid;
475 ubyte nr_pos_exports;
476 ubyte nr_param_exports;
477 };
478
479 struct si_shader {
480 struct si_compiler_ctx_state compiler_ctx_state;
481
482 struct si_shader_selector *selector;
483 struct si_shader *next_variant;
484
485 struct si_shader_part *prolog;
486 struct si_shader *previous_stage; /* for GFX9 */
487 struct si_shader_part *prolog2;
488 struct si_shader_part *epilog;
489
490 struct si_pm4_state *pm4;
491 struct r600_resource *bo;
492 struct r600_resource *scratch_bo;
493 struct si_shader_key key;
494 struct util_queue_fence optimized_ready;
495 bool compilation_failed;
496 bool is_monolithic;
497 bool is_optimized;
498 bool is_binary_shared;
499 bool is_gs_copy_shader;
500
501 /* The following data is all that's needed for binary shaders. */
502 struct ac_shader_binary binary;
503 struct si_shader_config config;
504 struct si_shader_info info;
505
506 /* Shader key + LLVM IR + disassembly + statistics.
507 * Generated for debug contexts only.
508 */
509 char *shader_log;
510 size_t shader_log_size;
511 };
512
513 struct si_shader_part {
514 struct si_shader_part *next;
515 union si_shader_part_key key;
516 struct ac_shader_binary binary;
517 struct si_shader_config config;
518 };
519
520 /* si_shader.c */
521 struct si_shader *
522 si_generate_gs_copy_shader(struct si_screen *sscreen,
523 LLVMTargetMachineRef tm,
524 struct si_shader_selector *gs_selector,
525 struct pipe_debug_callback *debug);
526 int si_compile_tgsi_shader(struct si_screen *sscreen,
527 LLVMTargetMachineRef tm,
528 struct si_shader *shader,
529 bool is_monolithic,
530 struct pipe_debug_callback *debug);
531 int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
532 struct si_shader *shader,
533 struct pipe_debug_callback *debug);
534 int si_compile_llvm(struct si_screen *sscreen,
535 struct ac_shader_binary *binary,
536 struct si_shader_config *conf,
537 LLVMTargetMachineRef tm,
538 LLVMModuleRef mod,
539 struct pipe_debug_callback *debug,
540 unsigned processor,
541 const char *name);
542 void si_shader_destroy(struct si_shader *shader);
543 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
544 unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index);
545 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
546 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
547 struct pipe_debug_callback *debug, unsigned processor,
548 FILE *f, bool check_debug_option);
549 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
550 unsigned *lds_size);
551 void si_shader_apply_scratch_relocs(struct si_context *sctx,
552 struct si_shader *shader,
553 struct si_shader_config *config,
554 uint64_t scratch_va);
555 void si_shader_binary_read_config(struct ac_shader_binary *binary,
556 struct si_shader_config *conf,
557 unsigned symbol_offset);
558 unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
559 bool writes_samplemask);
560 const char *si_get_shader_name(struct si_shader *shader, unsigned processor);
561
562 /* Inline helpers. */
563
564 /* Return the pointer to the main shader part's pointer. */
565 static inline struct si_shader **
566 si_get_main_shader_part(struct si_shader_selector *sel,
567 struct si_shader_key *key)
568 {
569 if (key->as_ls)
570 return &sel->main_shader_part_ls;
571 if (key->as_es)
572 return &sel->main_shader_part_es;
573 return &sel->main_shader_part;
574 }
575
576 #endif