2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
32 #include <llvm-c/Core.h> /* LLVMModuleRef */
34 #define SI_SGPR_CONST 0
35 #define SI_SGPR_SAMPLER 2
36 #define SI_SGPR_RESOURCE 4
37 #define SI_SGPR_VERTEX_BUFFER 6 /* VS only */
38 #define SI_SGPR_SO_BUFFER 8 /* VS only, stream-out */
39 #define SI_SGPR_START_INSTANCE 10 /* VS only */
40 #define SI_SGPR_ALPHA_REF 6 /* PS only */
42 #define SI_VS_NUM_USER_SGPR 11
43 #define SI_GS_NUM_USER_SGPR 6
44 #define SI_PS_NUM_USER_SGPR 7
46 /* LLVM function parameter indices */
47 #define SI_PARAM_CONST 0
48 #define SI_PARAM_SAMPLER 1
49 #define SI_PARAM_RESOURCE 2
51 /* VS only parameters */
52 #define SI_PARAM_VERTEX_BUFFER 3
53 #define SI_PARAM_SO_BUFFER 4
54 #define SI_PARAM_START_INSTANCE 5
55 /* the other VS parameters are assigned dynamically */
57 /* ES only parameters */
58 #define SI_PARAM_ES2GS_OFFSET 6
60 /* GS only parameters */
61 #define SI_PARAM_GS2VS_OFFSET 3
62 #define SI_PARAM_GS_WAVE_ID 4
63 #define SI_PARAM_VTX0_OFFSET 5
64 #define SI_PARAM_VTX1_OFFSET 6
65 #define SI_PARAM_PRIMITIVE_ID 7
66 #define SI_PARAM_VTX2_OFFSET 8
67 #define SI_PARAM_VTX3_OFFSET 9
68 #define SI_PARAM_VTX4_OFFSET 10
69 #define SI_PARAM_VTX5_OFFSET 11
70 #define SI_PARAM_GS_INSTANCE_ID 12
72 /* PS only parameters */
73 #define SI_PARAM_ALPHA_REF 3
74 #define SI_PARAM_PRIM_MASK 4
75 #define SI_PARAM_PERSP_SAMPLE 5
76 #define SI_PARAM_PERSP_CENTER 6
77 #define SI_PARAM_PERSP_CENTROID 7
78 #define SI_PARAM_PERSP_PULL_MODEL 8
79 #define SI_PARAM_LINEAR_SAMPLE 9
80 #define SI_PARAM_LINEAR_CENTER 10
81 #define SI_PARAM_LINEAR_CENTROID 11
82 #define SI_PARAM_LINE_STIPPLE_TEX 12
83 #define SI_PARAM_POS_X_FLOAT 13
84 #define SI_PARAM_POS_Y_FLOAT 14
85 #define SI_PARAM_POS_Z_FLOAT 15
86 #define SI_PARAM_POS_W_FLOAT 16
87 #define SI_PARAM_FRONT_FACE 17
88 #define SI_PARAM_ANCILLARY 18
89 #define SI_PARAM_SAMPLE_COVERAGE 19
90 #define SI_PARAM_POS_FIXED_PT 20
92 struct si_shader_input
{
95 unsigned param_offset
;
101 struct si_shader_output
{
104 unsigned param_offset
;
109 struct si_pipe_shader
;
111 struct si_pipe_shader_selector
{
112 struct si_pipe_shader
*current
;
114 struct tgsi_token
*tokens
;
115 struct pipe_stream_output_info so
;
117 unsigned num_shaders
;
119 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
122 /* 1 when the shader contains
123 * TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS, otherwise it's 0.
124 * Used to determine whether we need to include nr_cbufs in the key */
125 unsigned fs_write_all
;
130 struct si_shader_input input
[40];
133 struct si_shader_output output
[40];
135 /* geometry shader properties */
136 unsigned gs_input_prim
;
137 unsigned gs_output_prim
;
138 unsigned gs_max_out_vertices
;
142 bool uses_instanceid
;
144 bool vs_out_misc_write
;
145 bool vs_out_point_size
;
146 bool vs_out_edgeflag
;
148 unsigned nr_pos_exports
;
149 unsigned clip_dist_write
;
152 union si_shader_key
{
154 unsigned export_16bpc
:8;
156 unsigned color_two_side
:1;
157 unsigned alpha_func
:3;
158 unsigned flatshade
:1;
159 unsigned alpha_to_one
:1;
162 unsigned instance_divisors
[PIPE_MAX_ATTRIBS
];
163 unsigned ucps_enabled
:2;
168 struct si_pipe_shader
{
169 struct si_pipe_shader_selector
*selector
;
170 struct si_pipe_shader
*next_variant
;
171 struct si_pipe_shader
*gs_copy_shader
;
172 struct si_shader shader
;
173 struct si_pm4_state
*pm4
;
174 struct r600_resource
*bo
;
178 unsigned spi_ps_input_ena
;
179 unsigned spi_shader_col_format
;
180 unsigned cb_shader_mask
;
182 unsigned sprite_coord_enable
;
183 union si_shader_key key
;
186 /* radeonsi_shader.c */
187 int si_pipe_shader_create(struct pipe_context
*ctx
, struct si_pipe_shader
*shader
);
188 int si_pipe_shader_create(struct pipe_context
*ctx
, struct si_pipe_shader
*shader
);
189 int si_compile_llvm(struct si_context
*sctx
, struct si_pipe_shader
*shader
,
191 void si_pipe_shader_destroy(struct pipe_context
*ctx
, struct si_pipe_shader
*shader
);