src/gallium/drivers/radeonsi/si_shader.h

   1 /*
   2  * Copyright 2012 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Tom Stellard <thomas.stellard@amd.com>
  25  *      Michel Dänzer <michel.daenzer@amd.com>
  26  *      Christian König <christian.koenig@amd.com>
  27  */
  28
  29 /* How linking shader inputs and outputs between vertex, tessellation, and
  30  * geometry shaders works.
  31  *
  32  * Inputs and outputs between shaders are stored in a buffer. This buffer
  33  * lives in LDS (typical case for tessellation), but it can also live
  34  * in memory (ESGS). Each input or output has a fixed location within a vertex.
  35  * The highest used input or output determines the stride between vertices.
  36  *
  37  * Since GS and tessellation are only possible in the OpenGL core profile,
  38  * only these semantics are valid for per-vertex data:
  39  *
  40  *   Name             Location
  41  *
  42  *   POSITION         0
  43  *   PSIZE            1
  44  *   CLIPDIST0..1     2..3
  45  *   CULLDIST0..1     (not implemented)
  46  *   GENERIC0..31     4..35
  47  *
  48  * For example, a shader only writing GENERIC0 has the output stride of 5.
  49  *
  50  * Only these semantics are valid for per-patch data:
  51  *
  52  *   Name             Location
  53  *
  54  *   TESSOUTER        0
  55  *   TESSINNER        1
  56  *   PATCH0..29       2..31
  57  *
  58  * That's how independent shaders agree on input and output locations.
  59  * The si_shader_io_get_unique_index function assigns the locations.
  60  *
  61  * For tessellation, other required information for calculating the input and
  62  * output addresses like the vertex stride, the patch stride, and the offsets
  63  * where per-vertex and per-patch data start, is passed to the shader via
  64  * user data SGPRs. The offsets and strides are calculated at draw time and
  65  * aren't available at compile time.
  66  */
  67
  68 #ifndef SI_SHADER_H
  69 #define SI_SHADER_H
  70
  71 #include <llvm-c/Core.h> /* LLVMModuleRef */
  72 #include <llvm-c/TargetMachine.h>
  73 #include "tgsi/tgsi_scan.h"
  74 #include "util/u_queue.h"
  75 #include "si_state.h"
  76
  77 struct ac_shader_binary;
  78
  79 #define SI_MAX_VS_OUTPUTS       40
  80
  81 /* SGPR user data indices */
  82 enum {
  83         SI_SGPR_RW_BUFFERS,  /* rings (& stream-out, VS only) */
  84         SI_SGPR_RW_BUFFERS_HI,
  85         SI_SGPR_CONST_BUFFERS,
  86         SI_SGPR_CONST_BUFFERS_HI,
  87         SI_SGPR_SAMPLERS,  /* images & sampler states interleaved */
  88         SI_SGPR_SAMPLERS_HI,
  89         SI_SGPR_IMAGES,
  90         SI_SGPR_IMAGES_HI,
  91         SI_SGPR_SHADER_BUFFERS,
  92         SI_SGPR_SHADER_BUFFERS_HI,
  93         SI_NUM_RESOURCE_SGPRS,
  94
  95         /* all VS variants */
  96         SI_SGPR_VERTEX_BUFFERS  = SI_NUM_RESOURCE_SGPRS,
  97         SI_SGPR_VERTEX_BUFFERS_HI,
  98         SI_SGPR_BASE_VERTEX,
  99         SI_SGPR_START_INSTANCE,
 100         SI_SGPR_DRAWID,
 101         SI_SGPR_VS_STATE_BITS,
 102         SI_VS_NUM_USER_SGPR,
 103
 104         /* TES */
 105         SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
 106         SI_TES_NUM_USER_SGPR,
 107
 108         /* GFX6-8: TCS only */
 109         GFX6_SGPR_TCS_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
 110         GFX6_SGPR_TCS_OUT_OFFSETS,
 111         GFX6_SGPR_TCS_OUT_LAYOUT,
 112         GFX6_SGPR_TCS_IN_LAYOUT,
 113         GFX6_TCS_NUM_USER_SGPR,
 114
 115         /* GFX9: Merged LS-HS (VS-TCS) only. */
 116         GFX9_SGPR_TCS_OFFCHIP_LAYOUT = SI_VS_NUM_USER_SGPR,
 117         GFX9_SGPR_TCS_OUT_OFFSETS,
 118         GFX9_SGPR_TCS_OUT_LAYOUT,
 119         GFX9_SGPR_unused_to_align_the_next_pointer,
 120         GFX9_SGPR_TCS_CONST_BUFFERS,
 121         GFX9_SGPR_TCS_CONST_BUFFERS_HI,
 122         GFX9_SGPR_TCS_SAMPLERS,  /* images & sampler states interleaved */
 123         GFX9_SGPR_TCS_SAMPLERS_HI,
 124         GFX9_SGPR_TCS_IMAGES,
 125         GFX9_SGPR_TCS_IMAGES_HI,
 126         GFX9_SGPR_TCS_SHADER_BUFFERS,
 127         GFX9_SGPR_TCS_SHADER_BUFFERS_HI,
 128         GFX9_TCS_NUM_USER_SGPR,
 129
 130         /* GS limits */
 131         SI_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS,
 132         SI_GSCOPY_NUM_USER_SGPR = SI_SGPR_RW_BUFFERS_HI + 1,
 133
 134         /* PS only */
 135         SI_SGPR_ALPHA_REF       = SI_NUM_RESOURCE_SGPRS,
 136         SI_PS_NUM_USER_SGPR,
 137
 138         /* CS only */
 139         SI_SGPR_GRID_SIZE = SI_NUM_RESOURCE_SGPRS,
 140         SI_SGPR_BLOCK_SIZE = SI_SGPR_GRID_SIZE + 3,
 141         SI_CS_NUM_USER_SGPR = SI_SGPR_BLOCK_SIZE + 3
 142 };
 143
 144 /* LLVM function parameter indices */
 145 enum {
 146         SI_NUM_RESOURCE_PARAMS = 5,
 147
 148         /* PS only parameters */
 149         SI_PARAM_ALPHA_REF = SI_NUM_RESOURCE_PARAMS,
 150         SI_PARAM_PRIM_MASK,
 151         SI_PARAM_PERSP_SAMPLE,
 152         SI_PARAM_PERSP_CENTER,
 153         SI_PARAM_PERSP_CENTROID,
 154         SI_PARAM_PERSP_PULL_MODEL,
 155         SI_PARAM_LINEAR_SAMPLE,
 156         SI_PARAM_LINEAR_CENTER,
 157         SI_PARAM_LINEAR_CENTROID,
 158         SI_PARAM_LINE_STIPPLE_TEX,
 159         SI_PARAM_POS_X_FLOAT,
 160         SI_PARAM_POS_Y_FLOAT,
 161         SI_PARAM_POS_Z_FLOAT,
 162         SI_PARAM_POS_W_FLOAT,
 163         SI_PARAM_FRONT_FACE,
 164         SI_PARAM_ANCILLARY,
 165         SI_PARAM_SAMPLE_COVERAGE,
 166         SI_PARAM_POS_FIXED_PT,
 167
 168         /* CS only parameters */
 169         SI_PARAM_GRID_SIZE = SI_NUM_RESOURCE_PARAMS,
 170         SI_PARAM_BLOCK_SIZE,
 171         SI_PARAM_BLOCK_ID,
 172         SI_PARAM_THREAD_ID,
 173
 174         SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
 175 };
 176
 177 /* Fields of driver-defined VS state SGPR. */
 178 /* Clamp vertex color output (only used in VS as VS). */
 179 #define S_VS_STATE_CLAMP_VERTEX_COLOR(x)        (((unsigned)(x) & 0x1) << 0)
 180 #define C_VS_STATE_CLAMP_VERTEX_COLOR           0xFFFFFFFE
 181 #define S_VS_STATE_INDEXED(x)                   (((unsigned)(x) & 0x1) << 1)
 182 #define C_VS_STATE_INDEXED                      0xFFFFFFFD
 183 #define S_VS_STATE_LS_OUT_PATCH_SIZE(x)         (((unsigned)(x) & 0x1FFF) << 8)
 184 #define C_VS_STATE_LS_OUT_PATCH_SIZE            0xFFE000FF
 185 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x)        (((unsigned)(x) & 0xFF) << 24)
 186 #define C_VS_STATE_LS_OUT_VERTEX_SIZE           0x00FFFFFF
 187
 188 /* SI-specific system values. */
 189 enum {
 190         TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
 191         TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
 192 };
 193
 194 /* For VS shader key fix_fetch. */
 195 enum {
 196         SI_FIX_FETCH_NONE = 0,
 197         SI_FIX_FETCH_A2_SNORM,
 198         SI_FIX_FETCH_A2_SSCALED,
 199         SI_FIX_FETCH_A2_SINT,
 200         SI_FIX_FETCH_RGBA_32_UNORM,
 201         SI_FIX_FETCH_RGBX_32_UNORM,
 202         SI_FIX_FETCH_RGBA_32_SNORM,
 203         SI_FIX_FETCH_RGBX_32_SNORM,
 204         SI_FIX_FETCH_RGBA_32_USCALED,
 205         SI_FIX_FETCH_RGBA_32_SSCALED,
 206         SI_FIX_FETCH_RGBA_32_FIXED,
 207         SI_FIX_FETCH_RGBX_32_FIXED,
 208         SI_FIX_FETCH_RG_64_FLOAT,
 209         SI_FIX_FETCH_RGB_64_FLOAT,
 210         SI_FIX_FETCH_RGBA_64_FLOAT,
 211         SI_FIX_FETCH_RGB_8,     /* A = 1.0 */
 212         SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
 213         SI_FIX_FETCH_RGB_16,
 214         SI_FIX_FETCH_RGB_16_INT,
 215 };
 216
 217 struct si_shader;
 218
 219 /* State of the context creating the shader object. */
 220 struct si_compiler_ctx_state {
 221         /* Should only be used by si_init_shader_selector_async and
 222          * si_build_shader_variant if thread_index == -1 (non-threaded). */
 223         LLVMTargetMachineRef            tm;
 224
 225         /* Used if thread_index == -1 or if debug.async is true. */
 226         struct pipe_debug_callback      debug;
 227
 228         /* Used for creating the log string for gallium/ddebug. */
 229         bool                            is_debug_context;
 230 };
 231
 232 /* A shader selector is a gallium CSO and contains shader variants and
 233  * binaries for one TGSI program. This can be shared by multiple contexts.
 234  */
 235 struct si_shader_selector {
 236         struct si_screen        *screen;
 237         struct util_queue_fence ready;
 238         struct si_compiler_ctx_state compiler_ctx_state;
 239
 240         mtx_t           mutex;
 241         struct si_shader        *first_variant; /* immutable after the first variant */
 242         struct si_shader        *last_variant; /* mutable */
 243
 244         /* The compiled TGSI shader expecting a prolog and/or epilog (not
 245          * uploaded to a buffer).
 246          */
 247         struct si_shader        *main_shader_part;
 248         struct si_shader        *main_shader_part_ls; /* as_ls is set in the key */
 249         struct si_shader        *main_shader_part_es; /* as_es is set in the key */
 250
 251         struct si_shader        *gs_copy_shader;
 252
 253         struct tgsi_token       *tokens;
 254         struct pipe_stream_output_info  so;
 255         struct tgsi_shader_info         info;
 256
 257         /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
 258         unsigned        type;
 259         bool            vs_needs_prolog;
 260
 261         /* GS parameters. */
 262         unsigned        esgs_itemsize;
 263         unsigned        gs_input_verts_per_prim;
 264         unsigned        gs_output_prim;
 265         unsigned        gs_max_out_vertices;
 266         unsigned        gs_num_invocations;
 267         unsigned        max_gs_stream; /* count - 1 */
 268         unsigned        gsvs_vertex_size;
 269         unsigned        max_gsvs_emit_size;
 270
 271         /* PS parameters. */
 272         unsigned        color_attr_index[2];
 273         unsigned        db_shader_control;
 274         /* Set 0xf or 0x0 (4 bits) per each written output.
 275          * ANDed with spi_shader_col_format.
 276          */
 277         unsigned        colors_written_4bit;
 278
 279         /* CS parameters */
 280         unsigned local_size;
 281
 282         uint64_t        outputs_written;        /* "get_unique_index" bits */
 283         uint32_t        patch_outputs_written;  /* "get_unique_index" bits */
 284         uint32_t        outputs_written2;       /* "get_unique_index2" bits */
 285
 286         uint64_t        inputs_read;            /* "get_unique_index" bits */
 287         uint32_t        inputs_read2;           /* "get_unique_index2" bits */
 288 };
 289
 290 /* Valid shader configurations:
 291  *
 292  * API shaders       VS | TCS | TES | GS |pass| PS
 293  * are compiled as:     |     |     |    |thru|
 294  *                      |     |     |    |    |
 295  * Only VS & PS:     VS |     |     |    |    | PS
 296  * GFX6 - with GS:   ES |     |     | GS | VS | PS
 297  *      - with tess: LS | HS  | VS  |    |    | PS
 298  *      - with both: LS | HS  | ES  | GS | VS | PS
 299  * GFX9 - with GS:   -> |     |     | GS | VS | PS
 300  *      - with tess: -> | HS  | VS  |    |    | PS
 301  *      - with both: -> | HS  | ->  | GS | VS | PS
 302  *
 303  * -> = merged with the next stage
 304  */
 305
 306 /* Common VS bits between the shader key and the prolog key. */
 307 struct si_vs_prolog_bits {
 308         unsigned        instance_divisors[SI_MAX_ATTRIBS];
 309 };
 310
 311 /* Common VS bits between the shader key and the epilog key. */
 312 struct si_vs_epilog_bits {
 313         unsigned        export_prim_id:1; /* when PS needs it and GS is disabled */
 314 };
 315
 316 /* Common TCS bits between the shader key and the epilog key. */
 317 struct si_tcs_epilog_bits {
 318         unsigned        prim_mode:3;
 319         unsigned        tes_reads_tess_factors:1;
 320 };
 321
 322 struct si_gs_prolog_bits {
 323         unsigned        tri_strip_adj_fix:1;
 324 };
 325
 326 /* Common PS bits between the shader key and the prolog key. */
 327 struct si_ps_prolog_bits {
 328         unsigned        color_two_side:1;
 329         unsigned        flatshade_colors:1;
 330         unsigned        poly_stipple:1;
 331         unsigned        force_persp_sample_interp:1;
 332         unsigned        force_linear_sample_interp:1;
 333         unsigned        force_persp_center_interp:1;
 334         unsigned        force_linear_center_interp:1;
 335         unsigned        bc_optimize_for_persp:1;
 336         unsigned        bc_optimize_for_linear:1;
 337 };
 338
 339 /* Common PS bits between the shader key and the epilog key. */
 340 struct si_ps_epilog_bits {
 341         unsigned        spi_shader_col_format;
 342         unsigned        color_is_int8:8;
 343         unsigned        color_is_int10:8;
 344         unsigned        last_cbuf:3;
 345         unsigned        alpha_func:3;
 346         unsigned        alpha_to_one:1;
 347         unsigned        poly_line_smoothing:1;
 348         unsigned        clamp_color:1;
 349 };
 350
 351 union si_shader_part_key {
 352         struct {
 353                 struct si_vs_prolog_bits states;
 354                 unsigned        num_input_sgprs:6;
 355                 /* For merged stages such as LS-HS, HS input VGPRs are first. */
 356                 unsigned        num_merged_next_stage_vgprs:3;
 357                 unsigned        last_input:4;
 358         } vs_prolog;
 359         struct {
 360                 struct si_vs_epilog_bits states;
 361                 unsigned        prim_id_param_offset:5;
 362         } vs_epilog;
 363         struct {
 364                 struct si_tcs_epilog_bits states;
 365         } tcs_epilog;
 366         struct {
 367                 struct si_gs_prolog_bits states;
 368         } gs_prolog;
 369         struct {
 370                 struct si_ps_prolog_bits states;
 371                 unsigned        num_input_sgprs:6;
 372                 unsigned        num_input_vgprs:5;
 373                 /* Color interpolation and two-side color selection. */
 374                 unsigned        colors_read:8; /* color input components read */
 375                 unsigned        num_interp_inputs:5; /* BCOLOR is at this location */
 376                 unsigned        face_vgpr_index:5;
 377                 unsigned        wqm:1;
 378                 char            color_attr_index[2];
 379                 char            color_interp_vgpr_index[2]; /* -1 == constant */
 380         } ps_prolog;
 381         struct {
 382                 struct si_ps_epilog_bits states;
 383                 unsigned        colors_written:8;
 384                 unsigned        writes_z:1;
 385                 unsigned        writes_stencil:1;
 386                 unsigned        writes_samplemask:1;
 387         } ps_epilog;
 388 };
 389
 390 struct si_shader_key {
 391         /* Prolog and epilog flags. */
 392         union {
 393                 struct {
 394                         struct si_vs_prolog_bits prolog;
 395                         struct si_vs_epilog_bits epilog;
 396                 } vs;
 397                 struct {
 398                         struct si_vs_prolog_bits ls_prolog; /* for merged LS-HS */
 399                         struct si_shader_selector *ls;   /* for merged LS-HS */
 400                         struct si_tcs_epilog_bits epilog;
 401                 } tcs; /* tessellation control shader */
 402                 struct {
 403                         struct si_vs_epilog_bits epilog; /* same as VS */
 404                 } tes; /* tessellation evaluation shader */
 405                 struct {
 406                         struct si_gs_prolog_bits prolog;
 407                 } gs;
 408                 struct {
 409                         struct si_ps_prolog_bits prolog;
 410                         struct si_ps_epilog_bits epilog;
 411                 } ps;
 412         } part;
 413
 414         /* These two are initially set according to the NEXT_SHADER property,
 415          * or guessed if the property doesn't seem correct.
 416          */
 417         unsigned as_es:1; /* export shader, which precedes GS */
 418         unsigned as_ls:1; /* local shader, which precedes TCS */
 419
 420         /* Flags for monolithic compilation only. */
 421         struct {
 422                 /* One byte for every input: SI_FIX_FETCH_* enums. */
 423                 uint8_t         vs_fix_fetch[SI_MAX_ATTRIBS];
 424                 uint64_t        ff_tcs_inputs_to_copy; /* for fixed-func TCS */
 425         } mono;
 426
 427         /* Optimization flags for asynchronous compilation only. */
 428         union {
 429                 struct {
 430                         uint64_t        kill_outputs; /* "get_unique_index" bits */
 431                         uint32_t        kill_outputs2; /* "get_unique_index2" bits */
 432                         unsigned        clip_disable:1;
 433                 } hw_vs; /* HW VS (it can be VS, TES, GS) */
 434         } opt;
 435 };
 436
 437 struct si_shader_config {
 438         unsigned                        num_sgprs;
 439         unsigned                        num_vgprs;
 440         unsigned                        spilled_sgprs;
 441         unsigned                        spilled_vgprs;
 442         unsigned                        private_mem_vgprs;
 443         unsigned                        lds_size;
 444         unsigned                        spi_ps_input_ena;
 445         unsigned                        spi_ps_input_addr;
 446         unsigned                        float_mode;
 447         unsigned                        scratch_bytes_per_wave;
 448         unsigned                        rsrc1;
 449         unsigned                        rsrc2;
 450 };
 451
 452 /* GCN-specific shader info. */
 453 struct si_shader_info {
 454         ubyte                   vs_output_param_offset[SI_MAX_VS_OUTPUTS];
 455         ubyte                   num_input_sgprs;
 456         ubyte                   num_input_vgprs;
 457         char                    face_vgpr_index;
 458         bool                    uses_instanceid;
 459         ubyte                   nr_pos_exports;
 460         ubyte                   nr_param_exports;
 461 };
 462
 463 struct si_shader {
 464         struct si_compiler_ctx_state    compiler_ctx_state;
 465
 466         struct si_shader_selector       *selector;
 467         struct si_shader                *next_variant;
 468
 469         struct si_shader_part           *prolog;
 470         struct si_shader                *previous_stage; /* for GFX9 */
 471         struct si_shader_part           *epilog;
 472
 473         struct si_pm4_state             *pm4;
 474         struct r600_resource            *bo;
 475         struct r600_resource            *scratch_bo;
 476         struct si_shader_key            key;
 477         struct util_queue_fence         optimized_ready;
 478         bool                            compilation_failed;
 479         bool                            is_monolithic;
 480         bool                            is_optimized;
 481         bool                            is_binary_shared;
 482         bool                            is_gs_copy_shader;
 483
 484         /* The following data is all that's needed for binary shaders. */
 485         struct ac_shader_binary binary;
 486         struct si_shader_config         config;
 487         struct si_shader_info           info;
 488
 489         /* Shader key + LLVM IR + disassembly + statistics.
 490          * Generated for debug contexts only.
 491          */
 492         char                            *shader_log;
 493         size_t                          shader_log_size;
 494 };
 495
 496 struct si_shader_part {
 497         struct si_shader_part *next;
 498         union si_shader_part_key key;
 499         struct ac_shader_binary binary;
 500         struct si_shader_config config;
 501 };
 502
 503 /* si_shader.c */
 504 struct si_shader *
 505 si_generate_gs_copy_shader(struct si_screen *sscreen,
 506                            LLVMTargetMachineRef tm,
 507                            struct si_shader_selector *gs_selector,
 508                            struct pipe_debug_callback *debug);
 509 int si_compile_tgsi_shader(struct si_screen *sscreen,
 510                            LLVMTargetMachineRef tm,
 511                            struct si_shader *shader,
 512                            bool is_monolithic,
 513                            struct pipe_debug_callback *debug);
 514 int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
 515                      struct si_shader *shader,
 516                      struct pipe_debug_callback *debug);
 517 int si_compile_llvm(struct si_screen *sscreen,
 518                     struct ac_shader_binary *binary,
 519                     struct si_shader_config *conf,
 520                     LLVMTargetMachineRef tm,
 521                     LLVMModuleRef mod,
 522                     struct pipe_debug_callback *debug,
 523                     unsigned processor,
 524                     const char *name);
 525 void si_shader_destroy(struct si_shader *shader);
 526 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
 527 unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index);
 528 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
 529 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
 530                     struct pipe_debug_callback *debug, unsigned processor,
 531                     FILE *f, bool check_debug_option);
 532 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
 533                                       unsigned *lds_size);
 534 void si_shader_apply_scratch_relocs(struct si_context *sctx,
 535                         struct si_shader *shader,
 536                         struct si_shader_config *config,
 537                         uint64_t scratch_va);
 538 void si_shader_binary_read_config(struct ac_shader_binary *binary,
 539                                   struct si_shader_config *conf,
 540                                   unsigned symbol_offset);
 541 unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
 542                                     bool writes_samplemask);
 543 const char *si_get_shader_name(struct si_shader *shader, unsigned processor);
 544
 545 /* Inline helpers. */
 546
 547 /* Return the pointer to the main shader part's pointer. */
 548 static inline struct si_shader **
 549 si_get_main_shader_part(struct si_shader_selector *sel,
 550                         struct si_shader_key *key)
 551 {
 552         if (key->as_ls)
 553                 return &sel->main_shader_part_ls;
 554         if (key->as_es)
 555                 return &sel->main_shader_part_es;
 556         return &sel->main_shader_part;
 557 }
 558
 559 #endif