radeonsi: clean up passing the is_monolithic flag for compilation
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_init.h"
31 #include "gallivm/lp_bld_tgsi.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "ac_shader_abi.h"
34 #include "ac_llvm_util.h"
35 #include "ac_llvm_build.h"
36
37 #include <llvm-c/Core.h>
38 #include <llvm-c/TargetMachine.h>
39
40 struct pipe_debug_callback;
41 struct ac_shader_binary;
42
43 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
44 #define RADEON_LLVM_MAX_INPUTS 32 * 4
45 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
46
47 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
48 #define RADEON_LLVM_MAX_ADDRS 16
49
50 struct si_shader_context {
51 struct lp_build_tgsi_context bld_base;
52 struct gallivm_state gallivm;
53 struct ac_llvm_context ac;
54 struct si_shader *shader;
55 struct si_screen *screen;
56
57 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
58
59 /* For clamping the non-constant index in resource indexing: */
60 unsigned num_const_buffers;
61 unsigned num_shader_buffers;
62 unsigned num_images;
63 unsigned num_samplers;
64
65 struct ac_shader_abi abi;
66
67 /** This function is responsible for initilizing the inputs array and will be
68 * called once for each input declared in the TGSI shader.
69 */
70 void (*load_input)(struct si_shader_context *,
71 unsigned input_index,
72 const struct tgsi_full_declaration *decl,
73 LLVMValueRef out[4]);
74
75 /** This array contains the input values for the shader. Typically these
76 * values will be in the form of a target intrinsic that will inform the
77 * backend how to load the actual inputs to the shader.
78 */
79 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
80 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
81 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
82 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
83
84 /** This pointer is used to contain the temporary values.
85 * The amount of temporary used in tgsi can't be bound to a max value and
86 * thus we must allocate this array at runtime.
87 */
88 LLVMValueRef *temps;
89 unsigned temps_count;
90 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
91
92 LLVMValueRef *imms;
93 unsigned imms_num;
94
95 struct lp_build_if_state merged_wrap_if_state;
96
97 struct tgsi_array_info *temp_arrays;
98 LLVMValueRef *temp_array_allocas;
99
100 LLVMValueRef undef_alloca;
101
102 LLVMValueRef main_fn;
103 LLVMTypeRef return_type;
104
105 /* Parameter indices for LLVMGetParam. */
106 int param_rw_buffers;
107 int param_const_and_shader_buffers;
108 int param_samplers_and_images;
109 int param_bindless_samplers_and_images;
110 /* Common inputs for merged shaders. */
111 int param_merged_wave_info;
112 int param_merged_scratch_offset;
113 /* API VS */
114 int param_vertex_buffers;
115 int param_rel_auto_id;
116 int param_vs_prim_id;
117 int param_vertex_index0;
118 /* VS states and layout of LS outputs / TCS inputs at the end
119 * [0] = clamp vertex color
120 * [1] = indexed
121 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
122 * max = 32*32*4 + 32*4
123 * [24:31] = stride between vertices in DW = num_inputs * 4
124 * max = 32*4
125 */
126 int param_vs_state_bits;
127 int param_vs_blit_inputs;
128 /* HW VS */
129 int param_streamout_config;
130 int param_streamout_write_index;
131 int param_streamout_offset[4];
132
133 /* API TCS & TES */
134 /* Layout of TCS outputs in the offchip buffer
135 * # 6 bits
136 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
137 * # 6 bits
138 * [6:11] = the number of output vertices per patch, max = 32
139 * # 20 bits
140 * [12:31] = the offset of per patch attributes in the buffer in bytes.
141 * max = NUM_PATCHES*32*32*16
142 */
143 int param_tcs_offchip_layout;
144
145 /* API TCS */
146 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
147 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
148 * [16:31] = TCS output patch0 offset for per-patch / 16
149 * max = (NUM_PATCHES + 1) * 32*32
150 */
151 int param_tcs_out_lds_offsets;
152 /* Layout of TCS outputs / TES inputs:
153 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
154 * max = 32*32*4 + 32*4
155 * [13:18] = gl_PatchVerticesIn, max = 32
156 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
157 */
158 int param_tcs_out_lds_layout;
159 int param_tcs_offchip_offset;
160 int param_tcs_factor_offset;
161
162 /* API TES */
163 int param_tes_offchip_addr;
164 int param_tes_u;
165 int param_tes_v;
166 int param_tes_rel_patch_id;
167 /* HW ES */
168 int param_es2gs_offset;
169 /* API GS */
170 int param_gs2vs_offset;
171 int param_gs_wave_id; /* GFX6 */
172 LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
173 int param_gs_vtx01_offset; /* in dwords (GFX9) */
174 int param_gs_vtx23_offset; /* in dwords (GFX9) */
175 int param_gs_vtx45_offset; /* in dwords (GFX9) */
176 /* CS */
177 int param_block_size;
178
179 struct si_compiler *compiler;
180
181 /* Preloaded descriptors. */
182 LLVMValueRef esgs_ring;
183 LLVMValueRef gsvs_ring[4];
184 LLVMValueRef tess_offchip_ring;
185
186 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
187 LLVMValueRef gs_next_vertex[4];
188 LLVMValueRef postponed_kill;
189 LLVMValueRef return_value;
190
191 LLVMTypeRef voidt;
192 LLVMTypeRef i1;
193 LLVMTypeRef i8;
194 LLVMTypeRef i32;
195 LLVMTypeRef i64;
196 LLVMTypeRef i128;
197 LLVMTypeRef f32;
198 LLVMTypeRef v2i32;
199 LLVMTypeRef v4i32;
200 LLVMTypeRef v4f32;
201 LLVMTypeRef v8i32;
202
203 LLVMValueRef i32_0;
204 LLVMValueRef i32_1;
205 };
206
207 static inline struct si_shader_context *
208 si_shader_context(struct lp_build_tgsi_context *bld_base)
209 {
210 return (struct si_shader_context*)bld_base;
211 }
212
213 static inline struct si_shader_context *
214 si_shader_context_from_abi(struct ac_shader_abi *abi)
215 {
216 struct si_shader_context *ctx = NULL;
217 return container_of(abi, ctx, abi);
218 }
219
220 unsigned si_llvm_compile(LLVMModuleRef M, struct ac_shader_binary *binary,
221 struct si_compiler *compiler,
222 struct pipe_debug_callback *debug);
223
224 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
225 enum tgsi_opcode_type type);
226
227 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
228 enum tgsi_opcode_type type, LLVMValueRef value);
229
230 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
231 LLVMValueRef index,
232 unsigned num);
233
234 void si_llvm_context_init(struct si_shader_context *ctx,
235 struct si_screen *sscreen,
236 struct si_compiler *compiler);
237 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
238 struct si_shader *shader);
239
240 void si_llvm_create_func(struct si_shader_context *ctx,
241 const char *name,
242 LLVMTypeRef *return_types, unsigned num_return_elems,
243 LLVMTypeRef *ParamTypes, unsigned ParamCount);
244
245 void si_llvm_dispose(struct si_shader_context *ctx);
246
247 void si_llvm_optimize_module(struct si_shader_context *ctx);
248
249 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
250 LLVMTypeRef type,
251 LLVMValueRef ptr,
252 LLVMValueRef ptr2);
253
254 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
255 const struct tgsi_full_src_register *reg,
256 enum tgsi_opcode_type type,
257 unsigned swizzle);
258
259 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
260
261 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
262 LLVMTypeRef type,
263 LLVMValueRef vertex_index,
264 LLVMValueRef param_index,
265 unsigned const_index,
266 unsigned location,
267 unsigned driver_location,
268 unsigned component,
269 unsigned num_components,
270 bool is_patch,
271 bool is_compact,
272 bool load_input);
273
274 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
275 unsigned input_index,
276 unsigned vtx_offset_param,
277 LLVMTypeRef type,
278 unsigned swizzle);
279
280 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
281 enum glsl_interp_mode interp,
282 unsigned location);
283
284 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
285 const struct tgsi_full_instruction *inst,
286 const struct tgsi_opcode_info *info,
287 unsigned index,
288 LLVMValueRef dst[4]);
289
290 /* Combine these with & instead of |. */
291 #define NOOP_WAITCNT 0xf7f
292 #define LGKM_CNT 0x07f
293 #define VM_CNT 0xf70
294
295 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
296 const struct tgsi_ind_register *ind,
297 unsigned addr_mul, int rel_index);
298 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
299 const struct tgsi_ind_register *ind,
300 int rel_index, unsigned num);
301 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
302
303 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
304 void si_shader_context_init_mem(struct si_shader_context *ctx);
305
306 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
307 LLVMValueRef list, LLVMValueRef index,
308 enum ac_descriptor_type type);
309 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
310 LLVMValueRef list, LLVMValueRef index,
311 enum ac_descriptor_type desc_type, bool dcc_off);
312
313 void si_load_system_value(struct si_shader_context *ctx,
314 unsigned index,
315 const struct tgsi_full_declaration *decl);
316 void si_declare_compute_memory(struct si_shader_context *ctx);
317 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
318 const struct tgsi_full_declaration *decl);
319
320 void si_llvm_load_input_vs(
321 struct si_shader_context *ctx,
322 unsigned input_index,
323 LLVMValueRef out[4]);
324 void si_llvm_load_input_fs(
325 struct si_shader_context *ctx,
326 unsigned input_index,
327 LLVMValueRef out[4]);
328
329 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
330
331 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
332 unsigned param, unsigned rshift,
333 unsigned bitwidth);
334
335 #endif