2 * Copyright 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "si_shader.h"
25 #include "si_shader_internal.h"
27 #include "ac_nir_to_llvm.h"
29 #include "tgsi/tgsi_from_mesa.h"
31 #include "compiler/nir/nir.h"
32 #include "compiler/nir_types.h"
36 type_size(const struct glsl_type
*type
)
38 return glsl_count_attribute_slots(type
, false);
41 static void scan_instruction(struct tgsi_shader_info
*info
,
44 if (instr
->type
== nir_instr_type_alu
) {
45 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
50 case nir_op_fddx_fine
:
51 case nir_op_fddy_fine
:
52 case nir_op_fddx_coarse
:
53 case nir_op_fddy_coarse
:
54 info
->uses_derivatives
= true;
59 } else if (instr
->type
== nir_instr_type_tex
) {
60 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
63 info
->samplers_declared
|=
64 u_bit_consecutive(tex
->sampler_index
, 1);
71 info
->uses_derivatives
= true;
76 } else if (instr
->type
== nir_instr_type_intrinsic
) {
77 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
79 switch (intr
->intrinsic
) {
80 case nir_intrinsic_load_front_face
:
81 info
->uses_frontface
= 1;
83 case nir_intrinsic_load_instance_id
:
84 info
->uses_instanceid
= 1;
86 case nir_intrinsic_load_vertex_id
:
87 info
->uses_vertexid
= 1;
89 case nir_intrinsic_load_vertex_id_zero_base
:
90 info
->uses_vertexid_nobase
= 1;
92 case nir_intrinsic_load_base_vertex
:
93 info
->uses_basevertex
= 1;
95 case nir_intrinsic_load_primitive_id
:
96 info
->uses_primid
= 1;
98 case nir_intrinsic_image_store
:
99 case nir_intrinsic_image_atomic_add
:
100 case nir_intrinsic_image_atomic_min
:
101 case nir_intrinsic_image_atomic_max
:
102 case nir_intrinsic_image_atomic_and
:
103 case nir_intrinsic_image_atomic_or
:
104 case nir_intrinsic_image_atomic_xor
:
105 case nir_intrinsic_image_atomic_exchange
:
106 case nir_intrinsic_image_atomic_comp_swap
:
107 case nir_intrinsic_store_ssbo
:
108 case nir_intrinsic_ssbo_atomic_add
:
109 case nir_intrinsic_ssbo_atomic_imin
:
110 case nir_intrinsic_ssbo_atomic_umin
:
111 case nir_intrinsic_ssbo_atomic_imax
:
112 case nir_intrinsic_ssbo_atomic_umax
:
113 case nir_intrinsic_ssbo_atomic_and
:
114 case nir_intrinsic_ssbo_atomic_or
:
115 case nir_intrinsic_ssbo_atomic_xor
:
116 case nir_intrinsic_ssbo_atomic_exchange
:
117 case nir_intrinsic_ssbo_atomic_comp_swap
:
118 info
->writes_memory
= true;
126 void si_nir_scan_shader(const struct nir_shader
*nir
,
127 struct tgsi_shader_info
*info
)
132 assert(nir
->info
.stage
== MESA_SHADER_VERTEX
||
133 nir
->info
.stage
== MESA_SHADER_FRAGMENT
);
135 info
->processor
= pipe_shader_type_from_mesa(nir
->info
.stage
);
136 info
->num_tokens
= 2; /* indicate that the shader is non-empty */
137 info
->num_instructions
= 2;
139 info
->num_inputs
= nir
->num_inputs
;
140 info
->num_outputs
= nir
->num_outputs
;
143 nir_foreach_variable(variable
, &nir
->inputs
) {
144 unsigned semantic_name
, semantic_index
;
145 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
146 nir
->info
.stage
== MESA_SHADER_VERTEX
);
148 assert(attrib_count
== 1 && "not implemented");
150 /* Vertex shader inputs don't have semantics. The state
151 * tracker has already mapped them to attributes via
152 * variable->data.driver_location.
154 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
157 /* Fragment shader position is a system value. */
158 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
&&
159 variable
->data
.location
== VARYING_SLOT_POS
) {
160 if (variable
->data
.pixel_center_integer
)
161 info
->properties
[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
] =
162 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
;
166 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
167 &semantic_name
, &semantic_index
);
169 info
->input_semantic_name
[i
] = semantic_name
;
170 info
->input_semantic_index
[i
] = semantic_index
;
172 if (variable
->data
.sample
)
173 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_SAMPLE
;
174 else if (variable
->data
.centroid
)
175 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTROID
;
177 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTER
;
179 enum glsl_base_type base_type
=
180 glsl_get_base_type(glsl_without_array(variable
->type
));
182 switch (variable
->data
.interpolation
) {
183 case INTERP_MODE_NONE
:
184 if (glsl_base_type_is_integer(base_type
)) {
185 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
189 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
190 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_COLOR
;
191 goto persp_locations
;
194 case INTERP_MODE_SMOOTH
:
195 assert(!glsl_base_type_is_integer(base_type
));
197 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_PERSPECTIVE
;
200 if (variable
->data
.sample
)
201 info
->uses_persp_sample
= true;
202 else if (variable
->data
.centroid
)
203 info
->uses_persp_centroid
= true;
205 info
->uses_persp_center
= true;
208 case INTERP_MODE_NOPERSPECTIVE
:
209 assert(!glsl_base_type_is_integer(base_type
));
211 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_LINEAR
;
213 if (variable
->data
.sample
)
214 info
->uses_linear_sample
= true;
215 else if (variable
->data
.centroid
)
216 info
->uses_linear_centroid
= true;
218 info
->uses_linear_center
= true;
221 case INTERP_MODE_FLAT
:
222 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
226 /* TODO make this more precise */
227 if (variable
->data
.location
== VARYING_SLOT_COL0
)
228 info
->colors_read
|= 0x0f;
229 else if (variable
->data
.location
== VARYING_SLOT_COL1
)
230 info
->colors_read
|= 0xf0;
236 nir_foreach_variable(variable
, &nir
->outputs
) {
237 unsigned semantic_name
, semantic_index
;
239 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
240 tgsi_get_gl_frag_result_semantic(variable
->data
.location
,
241 &semantic_name
, &semantic_index
);
243 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
244 &semantic_name
, &semantic_index
);
247 info
->output_semantic_name
[i
] = semantic_name
;
248 info
->output_semantic_index
[i
] = semantic_index
;
249 info
->output_usagemask
[i
] = TGSI_WRITEMASK_XYZW
;
251 switch (semantic_name
) {
252 case TGSI_SEMANTIC_PRIMID
:
253 info
->writes_primid
= true;
255 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
256 info
->writes_viewport_index
= true;
258 case TGSI_SEMANTIC_LAYER
:
259 info
->writes_layer
= true;
261 case TGSI_SEMANTIC_PSIZE
:
262 info
->writes_psize
= true;
264 case TGSI_SEMANTIC_CLIPVERTEX
:
265 info
->writes_clipvertex
= true;
267 case TGSI_SEMANTIC_COLOR
:
268 info
->colors_written
|= 1 << semantic_index
;
270 case TGSI_SEMANTIC_STENCIL
:
271 info
->writes_stencil
= true;
273 case TGSI_SEMANTIC_SAMPLEMASK
:
274 info
->writes_samplemask
= true;
276 case TGSI_SEMANTIC_EDGEFLAG
:
277 info
->writes_edgeflag
= true;
279 case TGSI_SEMANTIC_POSITION
:
280 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
281 info
->writes_z
= true;
283 info
->writes_position
= true;
290 nir_foreach_variable(variable
, &nir
->uniforms
) {
291 const struct glsl_type
*type
= variable
->type
;
292 enum glsl_base_type base_type
=
293 glsl_get_base_type(glsl_without_array(type
));
294 unsigned aoa_size
= MAX2(1, glsl_get_aoa_size(type
));
296 /* We rely on the fact that nir_lower_samplers_as_deref has
297 * eliminated struct dereferences.
299 if (base_type
== GLSL_TYPE_SAMPLER
)
300 info
->samplers_declared
|=
301 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
302 else if (base_type
== GLSL_TYPE_IMAGE
)
303 info
->images_declared
|=
304 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
307 info
->num_written_clipdistance
= nir
->info
.clip_distance_array_size
;
308 info
->num_written_culldistance
= nir
->info
.cull_distance_array_size
;
309 info
->clipdist_writemask
= u_bit_consecutive(0, info
->num_written_clipdistance
);
310 info
->culldist_writemask
= u_bit_consecutive(0, info
->num_written_culldistance
);
312 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
313 info
->uses_kill
= nir
->info
.fs
.uses_discard
;
315 /* TODO make this more accurate */
316 info
->const_buffers_declared
= u_bit_consecutive(0, SI_NUM_CONST_BUFFERS
);
317 info
->shader_buffers_declared
= u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS
);
319 func
= (struct nir_function
*)exec_list_get_head_const(&nir
->functions
);
320 nir_foreach_block(block
, func
->impl
) {
321 nir_foreach_instr(instr
, block
)
322 scan_instruction(info
, instr
);
327 * Perform "lowering" operations on the NIR that are run once when the shader
328 * selector is created.
331 si_lower_nir(struct si_shader_selector
* sel
)
333 /* Adjust the driver location of inputs and outputs. The state tracker
334 * interprets them as slots, while the ac/nir backend interprets them
335 * as individual components.
337 nir_foreach_variable(variable
, &sel
->nir
->inputs
)
338 variable
->data
.driver_location
*= 4;
340 nir_foreach_variable(variable
, &sel
->nir
->outputs
) {
341 variable
->data
.driver_location
*= 4;
343 if (sel
->nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
344 if (variable
->data
.location
== FRAG_RESULT_DEPTH
)
345 variable
->data
.driver_location
+= 2;
346 else if (variable
->data
.location
== FRAG_RESULT_STENCIL
)
347 variable
->data
.driver_location
+= 1;
351 /* Perform lowerings (and optimizations) of code.
353 * Performance considerations aside, we must:
354 * - lower certain ALU operations
355 * - ensure constant offsets for texture instructions are folded
356 * and copy-propagated
358 NIR_PASS_V(sel
->nir
, nir_lower_io
, nir_var_uniform
, type_size
,
359 (nir_lower_io_options
)0);
360 NIR_PASS_V(sel
->nir
, nir_lower_uniforms_to_ubo
);
362 NIR_PASS_V(sel
->nir
, nir_lower_returns
);
363 NIR_PASS_V(sel
->nir
, nir_lower_vars_to_ssa
);
364 NIR_PASS_V(sel
->nir
, nir_lower_alu_to_scalar
);
365 NIR_PASS_V(sel
->nir
, nir_lower_phis_to_scalar
);
367 static const struct nir_lower_tex_options lower_tex_options
= {
370 NIR_PASS_V(sel
->nir
, nir_lower_tex
, &lower_tex_options
);
376 /* (Constant) copy propagation is needed for txf with offsets. */
377 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
378 NIR_PASS(progress
, sel
->nir
, nir_opt_remove_phis
);
379 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
380 if (nir_opt_trivial_continues(sel
->nir
)) {
382 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
383 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
385 NIR_PASS(progress
, sel
->nir
, nir_opt_if
);
386 NIR_PASS(progress
, sel
->nir
, nir_opt_dead_cf
);
387 NIR_PASS(progress
, sel
->nir
, nir_opt_cse
);
388 NIR_PASS(progress
, sel
->nir
, nir_opt_peephole_select
, 8);
390 /* Needed for algebraic lowering */
391 NIR_PASS(progress
, sel
->nir
, nir_opt_algebraic
);
392 NIR_PASS(progress
, sel
->nir
, nir_opt_constant_folding
);
394 NIR_PASS(progress
, sel
->nir
, nir_opt_undef
);
395 NIR_PASS(progress
, sel
->nir
, nir_opt_conditional_discard
);
396 if (sel
->nir
->options
->max_unroll_iterations
) {
397 NIR_PASS(progress
, sel
->nir
, nir_opt_loop_unroll
, 0);
402 static void declare_nir_input_vs(struct si_shader_context
*ctx
,
403 struct nir_variable
*variable
, unsigned rel
,
406 si_llvm_load_input_vs(ctx
, variable
->data
.driver_location
/ 4 + rel
, out
);
409 static void declare_nir_input_fs(struct si_shader_context
*ctx
,
410 struct nir_variable
*variable
, unsigned rel
,
411 unsigned *fs_attr_idx
,
414 unsigned slot
= variable
->data
.location
+ rel
;
416 assert(variable
->data
.location
>= VARYING_SLOT_VAR0
|| rel
== 0);
418 if (slot
== VARYING_SLOT_POS
) {
419 out
[0] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
);
420 out
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
);
421 out
[2] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
);
422 out
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
423 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
));
427 si_llvm_load_input_fs(ctx
, *fs_attr_idx
, out
);
432 si_nir_load_sampler_desc(struct ac_shader_abi
*abi
,
433 unsigned descriptor_set
, unsigned base_index
,
434 unsigned constant_index
, LLVMValueRef dynamic_index
,
435 enum ac_descriptor_type desc_type
, bool image
,
438 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
439 LLVMBuilderRef builder
= ctx
->ac
.builder
;
440 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, ctx
->param_samplers_and_images
);
441 LLVMValueRef index
= dynamic_index
;
443 assert(!descriptor_set
);
446 index
= ctx
->ac
.i32_0
;
448 index
= LLVMBuildAdd(builder
, index
,
449 LLVMConstInt(ctx
->ac
.i32
, base_index
+ constant_index
, false),
453 assert(desc_type
== AC_DESC_IMAGE
|| desc_type
== AC_DESC_BUFFER
);
454 assert(base_index
+ constant_index
< ctx
->num_images
);
457 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_images
);
459 index
= LLVMBuildSub(ctx
->gallivm
.builder
,
460 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
- 1, 0),
463 /* TODO: be smarter about when we use dcc_off */
464 return si_load_image_desc(ctx
, list
, index
, desc_type
, write
);
467 assert(base_index
+ constant_index
< ctx
->num_samplers
);
470 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_samplers
);
472 index
= LLVMBuildAdd(ctx
->gallivm
.builder
, index
,
473 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
/ 2, 0), "");
475 return si_load_sampler_desc(ctx
, list
, index
, desc_type
);
478 bool si_nir_build_llvm(struct si_shader_context
*ctx
, struct nir_shader
*nir
)
480 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
482 unsigned fs_attr_idx
= 0;
483 nir_foreach_variable(variable
, &nir
->inputs
) {
484 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
485 nir
->info
.stage
== MESA_SHADER_VERTEX
);
486 unsigned input_idx
= variable
->data
.driver_location
;
488 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
489 LLVMValueRef data
[4];
491 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
492 declare_nir_input_vs(ctx
, variable
, i
, data
);
493 else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
)
494 declare_nir_input_fs(ctx
, variable
, i
, &fs_attr_idx
, data
);
496 for (unsigned chan
= 0; chan
< 4; chan
++) {
497 ctx
->inputs
[input_idx
+ chan
] =
498 LLVMBuildBitCast(ctx
->ac
.builder
, data
[chan
], ctx
->ac
.i32
, "");
503 ctx
->abi
.inputs
= &ctx
->inputs
[0];
504 ctx
->abi
.load_sampler_desc
= si_nir_load_sampler_desc
;
505 ctx
->abi
.clamp_shadow_reference
= true;
507 ctx
->num_samplers
= util_last_bit(info
->samplers_declared
);
508 ctx
->num_images
= util_last_bit(info
->images_declared
);
510 ac_nir_translate(&ctx
->ac
, &ctx
->abi
, nir
, NULL
);