src/gallium/drivers/radeonsi/si_shader_nir.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "si_shader.h"
  25 #include "si_shader_internal.h"
  26
  27 #include "ac_nir_to_llvm.h"
  28
  29 #include "tgsi/tgsi_from_mesa.h"
  30
  31 #include "compiler/nir/nir.h"
  32 #include "compiler/nir_types.h"
  33
  34
  35 static int
  36 type_size(const struct glsl_type *type)
  37 {
  38    return glsl_count_attribute_slots(type, false);
  39 }
  40
  41 static void scan_instruction(struct tgsi_shader_info *info,
  42                              nir_instr *instr)
  43 {
  44         if (instr->type == nir_instr_type_alu) {
  45                 nir_alu_instr *alu = nir_instr_as_alu(instr);
  46
  47                 switch (alu->op) {
  48                 case nir_op_fddx:
  49                 case nir_op_fddy:
  50                 case nir_op_fddx_fine:
  51                 case nir_op_fddy_fine:
  52                 case nir_op_fddx_coarse:
  53                 case nir_op_fddy_coarse:
  54                         info->uses_derivatives = true;
  55                         break;
  56                 default:
  57                         break;
  58                 }
  59         } else if (instr->type == nir_instr_type_tex) {
  60                 nir_tex_instr *tex = nir_instr_as_tex(instr);
  61
  62                 if (!tex->texture) {
  63                         info->samplers_declared |=
  64                                 u_bit_consecutive(tex->sampler_index, 1);
  65                 }
  66
  67                 switch (tex->op) {
  68                 case nir_texop_tex:
  69                 case nir_texop_txb:
  70                 case nir_texop_lod:
  71                         info->uses_derivatives = true;
  72                         break;
  73                 default:
  74                         break;
  75                 }
  76         } else if (instr->type == nir_instr_type_intrinsic) {
  77                 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
  78
  79                 switch (intr->intrinsic) {
  80                 case nir_intrinsic_load_front_face:
  81                         info->uses_frontface = 1;
  82                         break;
  83                 case nir_intrinsic_load_instance_id:
  84                         info->uses_instanceid = 1;
  85                         break;
  86                 case nir_intrinsic_load_vertex_id:
  87                         info->uses_vertexid = 1;
  88                         break;
  89                 case nir_intrinsic_load_vertex_id_zero_base:
  90                         info->uses_vertexid_nobase = 1;
  91                         break;
  92                 case nir_intrinsic_load_base_vertex:
  93                         info->uses_basevertex = 1;
  94                         break;
  95                 case nir_intrinsic_load_primitive_id:
  96                         info->uses_primid = 1;
  97                         break;
  98                 case nir_intrinsic_image_store:
  99                 case nir_intrinsic_image_atomic_add:
 100                 case nir_intrinsic_image_atomic_min:
 101                 case nir_intrinsic_image_atomic_max:
 102                 case nir_intrinsic_image_atomic_and:
 103                 case nir_intrinsic_image_atomic_or:
 104                 case nir_intrinsic_image_atomic_xor:
 105                 case nir_intrinsic_image_atomic_exchange:
 106                 case nir_intrinsic_image_atomic_comp_swap:
 107                 case nir_intrinsic_store_ssbo:
 108                 case nir_intrinsic_ssbo_atomic_add:
 109                 case nir_intrinsic_ssbo_atomic_imin:
 110                 case nir_intrinsic_ssbo_atomic_umin:
 111                 case nir_intrinsic_ssbo_atomic_imax:
 112                 case nir_intrinsic_ssbo_atomic_umax:
 113                 case nir_intrinsic_ssbo_atomic_and:
 114                 case nir_intrinsic_ssbo_atomic_or:
 115                 case nir_intrinsic_ssbo_atomic_xor:
 116                 case nir_intrinsic_ssbo_atomic_exchange:
 117                 case nir_intrinsic_ssbo_atomic_comp_swap:
 118                         info->writes_memory = true;
 119                         break;
 120                 default:
 121                         break;
 122                 }
 123         }
 124 }
 125
 126 void si_nir_scan_shader(const struct nir_shader *nir,
 127                         struct tgsi_shader_info *info)
 128 {
 129         nir_function *func;
 130         unsigned i;
 131
 132         assert(nir->info.stage == MESA_SHADER_VERTEX ||
 133                nir->info.stage == MESA_SHADER_GEOMETRY ||
 134                nir->info.stage == MESA_SHADER_FRAGMENT);
 135
 136         info->processor = pipe_shader_type_from_mesa(nir->info.stage);
 137         info->num_tokens = 2; /* indicate that the shader is non-empty */
 138         info->num_instructions = 2;
 139
 140         if (nir->info.stage == MESA_SHADER_GEOMETRY) {
 141                 info->properties[TGSI_PROPERTY_GS_INPUT_PRIM] = nir->info.gs.input_primitive;
 142                 info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM] = nir->info.gs.output_primitive;
 143                 info->properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES] = nir->info.gs.vertices_out;
 144                 info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = nir->info.gs.invocations;
 145         }
 146
 147         i = 0;
 148         uint64_t processed_inputs = 0;
 149         unsigned num_inputs = 0;
 150         nir_foreach_variable(variable, &nir->inputs) {
 151                 unsigned semantic_name, semantic_index;
 152                 unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 153                                                                    nir->info.stage == MESA_SHADER_VERTEX);
 154
 155                 /* Vertex shader inputs don't have semantics. The state
 156                  * tracker has already mapped them to attributes via
 157                  * variable->data.driver_location.
 158                  */
 159                 if (nir->info.stage == MESA_SHADER_VERTEX)
 160                         continue;
 161
 162                 assert(nir->info.stage != MESA_SHADER_FRAGMENT ||
 163                        (attrib_count == 1 && "not implemented"));
 164
 165                 /* Fragment shader position is a system value. */
 166                 if (nir->info.stage == MESA_SHADER_FRAGMENT &&
 167                     variable->data.location == VARYING_SLOT_POS) {
 168                         if (variable->data.pixel_center_integer)
 169                                 info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
 170                                         TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
 171
 172                         num_inputs++;
 173                         continue;
 174                 }
 175
 176                 i = variable->data.driver_location;
 177                 if (processed_inputs & ((uint64_t)1 << i))
 178                         continue;
 179
 180                 processed_inputs |= ((uint64_t)1 << i);
 181                 num_inputs++;
 182
 183                 tgsi_get_gl_varying_semantic(variable->data.location, true,
 184                                              &semantic_name, &semantic_index);
 185
 186                 info->input_semantic_name[i] = semantic_name;
 187                 info->input_semantic_index[i] = semantic_index;
 188
 189                 if (variable->data.sample)
 190                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_SAMPLE;
 191                 else if (variable->data.centroid)
 192                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTROID;
 193                 else
 194                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTER;
 195
 196                 enum glsl_base_type base_type =
 197                         glsl_get_base_type(glsl_without_array(variable->type));
 198
 199                 switch (variable->data.interpolation) {
 200                 case INTERP_MODE_NONE:
 201                         if (glsl_base_type_is_integer(base_type)) {
 202                                 info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 203                                 break;
 204                         }
 205
 206                         if (semantic_name == TGSI_SEMANTIC_COLOR) {
 207                                 info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
 208                                 goto persp_locations;
 209                         }
 210                         /* fall-through */
 211                 case INTERP_MODE_SMOOTH:
 212                         assert(!glsl_base_type_is_integer(base_type));
 213
 214                         info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
 215
 216                 persp_locations:
 217                         if (variable->data.sample)
 218                                 info->uses_persp_sample = true;
 219                         else if (variable->data.centroid)
 220                                 info->uses_persp_centroid = true;
 221                         else
 222                                 info->uses_persp_center = true;
 223                         break;
 224
 225                 case INTERP_MODE_NOPERSPECTIVE:
 226                         assert(!glsl_base_type_is_integer(base_type));
 227
 228                         info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
 229
 230                         if (variable->data.sample)
 231                                 info->uses_linear_sample = true;
 232                         else if (variable->data.centroid)
 233                                 info->uses_linear_centroid = true;
 234                         else
 235                                 info->uses_linear_center = true;
 236                         break;
 237
 238                 case INTERP_MODE_FLAT:
 239                         info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 240                         break;
 241                 }
 242
 243                 /* TODO make this more precise */
 244                 if (variable->data.location == VARYING_SLOT_COL0)
 245                         info->colors_read |= 0x0f;
 246                 else if (variable->data.location == VARYING_SLOT_COL1)
 247                         info->colors_read |= 0xf0;
 248         }
 249
 250         if (nir->info.stage != MESA_SHADER_VERTEX)
 251                 info->num_inputs = num_inputs;
 252         else
 253                 info->num_inputs = nir->num_inputs;
 254
 255         i = 0;
 256         uint64_t processed_outputs = 0;
 257         unsigned num_outputs = 0;
 258         nir_foreach_variable(variable, &nir->outputs) {
 259                 unsigned semantic_name, semantic_index;
 260
 261                 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
 262                         tgsi_get_gl_frag_result_semantic(variable->data.location,
 263                                 &semantic_name, &semantic_index);
 264                 } else {
 265                         tgsi_get_gl_varying_semantic(variable->data.location, true,
 266                                                      &semantic_name, &semantic_index);
 267                 }
 268
 269                 i = variable->data.driver_location;
 270                 if (processed_outputs & ((uint64_t)1 << i))
 271                         continue;
 272
 273                 processed_outputs |= ((uint64_t)1 << i);
 274                 num_outputs++;
 275
 276                 info->output_semantic_name[i] = semantic_name;
 277                 info->output_semantic_index[i] = semantic_index;
 278                 info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
 279
 280                 unsigned num_components = 4;
 281                 unsigned vector_elements = glsl_get_vector_elements(glsl_without_array(variable->type));
 282                 if (vector_elements)
 283                         num_components = vector_elements;
 284
 285                 unsigned gs_out_streams;
 286                 if (variable->data.stream & (1u << 31)) {
 287                         gs_out_streams = variable->data.stream & ~(1u << 31);
 288                 } else {
 289                         assert(variable->data.stream < 4);
 290                         gs_out_streams = 0;
 291                         for (unsigned j = 0; j < num_components; ++j)
 292                                 gs_out_streams |= variable->data.stream << (2 * (variable->data.location_frac + j));
 293                 }
 294
 295                 unsigned streamx = gs_out_streams & 3;
 296                 unsigned streamy = (gs_out_streams >> 2) & 3;
 297                 unsigned streamz = (gs_out_streams >> 4) & 3;
 298                 unsigned streamw = (gs_out_streams >> 6) & 3;
 299
 300                 if (info->output_usagemask[i] & TGSI_WRITEMASK_X) {
 301                         info->output_streams[i] |= streamx;
 302                         info->num_stream_output_components[streamx]++;
 303                 }
 304                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Y) {
 305                         info->output_streams[i] |= streamy << 2;
 306                         info->num_stream_output_components[streamy]++;
 307                 }
 308                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Z) {
 309                         info->output_streams[i] |= streamz << 4;
 310                         info->num_stream_output_components[streamz]++;
 311                 }
 312                 if (info->output_usagemask[i] & TGSI_WRITEMASK_W) {
 313                         info->output_streams[i] |= streamw << 6;
 314                         info->num_stream_output_components[streamw]++;
 315                 }
 316
 317                 switch (semantic_name) {
 318                 case TGSI_SEMANTIC_PRIMID:
 319                         info->writes_primid = true;
 320                         break;
 321                 case TGSI_SEMANTIC_VIEWPORT_INDEX:
 322                         info->writes_viewport_index = true;
 323                         break;
 324                 case TGSI_SEMANTIC_LAYER:
 325                         info->writes_layer = true;
 326                         break;
 327                 case TGSI_SEMANTIC_PSIZE:
 328                         info->writes_psize = true;
 329                         break;
 330                 case TGSI_SEMANTIC_CLIPVERTEX:
 331                         info->writes_clipvertex = true;
 332                         break;
 333                 case TGSI_SEMANTIC_COLOR:
 334                         info->colors_written |= 1 << semantic_index;
 335                         break;
 336                 case TGSI_SEMANTIC_STENCIL:
 337                         info->writes_stencil = true;
 338                         break;
 339                 case TGSI_SEMANTIC_SAMPLEMASK:
 340                         info->writes_samplemask = true;
 341                         break;
 342                 case TGSI_SEMANTIC_EDGEFLAG:
 343                         info->writes_edgeflag = true;
 344                         break;
 345                 case TGSI_SEMANTIC_POSITION:
 346                         if (info->processor == PIPE_SHADER_FRAGMENT)
 347                                 info->writes_z = true;
 348                         else
 349                                 info->writes_position = true;
 350                         break;
 351                 }
 352         }
 353
 354         info->num_outputs = num_outputs;
 355
 356         nir_foreach_variable(variable, &nir->uniforms) {
 357                 const struct glsl_type *type = variable->type;
 358                 enum glsl_base_type base_type =
 359                         glsl_get_base_type(glsl_without_array(type));
 360                 unsigned aoa_size = MAX2(1, glsl_get_aoa_size(type));
 361
 362                 /* We rely on the fact that nir_lower_samplers_as_deref has
 363                  * eliminated struct dereferences.
 364                  */
 365                 if (base_type == GLSL_TYPE_SAMPLER)
 366                         info->samplers_declared |=
 367                                 u_bit_consecutive(variable->data.binding, aoa_size);
 368                 else if (base_type == GLSL_TYPE_IMAGE)
 369                         info->images_declared |=
 370                                 u_bit_consecutive(variable->data.binding, aoa_size);
 371         }
 372
 373         info->num_written_clipdistance = nir->info.clip_distance_array_size;
 374         info->num_written_culldistance = nir->info.cull_distance_array_size;
 375         info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
 376         info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance);
 377
 378         if (info->processor == PIPE_SHADER_FRAGMENT)
 379                 info->uses_kill = nir->info.fs.uses_discard;
 380
 381         /* TODO make this more accurate */
 382         info->const_buffers_declared = u_bit_consecutive(0, SI_NUM_CONST_BUFFERS);
 383         info->shader_buffers_declared = u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
 384
 385         func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
 386         nir_foreach_block(block, func->impl) {
 387                 nir_foreach_instr(instr, block)
 388                         scan_instruction(info, instr);
 389         }
 390 }
 391
 392 /**
 393  * Perform "lowering" operations on the NIR that are run once when the shader
 394  * selector is created.
 395  */
 396 void
 397 si_lower_nir(struct si_shader_selector* sel)
 398 {
 399         /* Adjust the driver location of inputs and outputs. The state tracker
 400          * interprets them as slots, while the ac/nir backend interprets them
 401          * as individual components.
 402          */
 403         nir_foreach_variable(variable, &sel->nir->inputs)
 404                 variable->data.driver_location *= 4;
 405
 406         nir_foreach_variable(variable, &sel->nir->outputs) {
 407                 variable->data.driver_location *= 4;
 408
 409                 if (sel->nir->info.stage == MESA_SHADER_FRAGMENT) {
 410                         if (variable->data.location == FRAG_RESULT_DEPTH)
 411                                 variable->data.driver_location += 2;
 412                         else if (variable->data.location == FRAG_RESULT_STENCIL)
 413                                 variable->data.driver_location += 1;
 414                 }
 415         }
 416
 417         /* Perform lowerings (and optimizations) of code.
 418          *
 419          * Performance considerations aside, we must:
 420          * - lower certain ALU operations
 421          * - ensure constant offsets for texture instructions are folded
 422          *   and copy-propagated
 423          */
 424         NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
 425                    (nir_lower_io_options)0);
 426         NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
 427
 428         NIR_PASS_V(sel->nir, nir_lower_returns);
 429         NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
 430         NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);
 431         NIR_PASS_V(sel->nir, nir_lower_phis_to_scalar);
 432
 433         static const struct nir_lower_tex_options lower_tex_options = {
 434                 .lower_txp = ~0u,
 435         };
 436         NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options);
 437
 438         bool progress;
 439         do {
 440                 progress = false;
 441
 442                 /* (Constant) copy propagation is needed for txf with offsets. */
 443                 NIR_PASS(progress, sel->nir, nir_copy_prop);
 444                 NIR_PASS(progress, sel->nir, nir_opt_remove_phis);
 445                 NIR_PASS(progress, sel->nir, nir_opt_dce);
 446                 if (nir_opt_trivial_continues(sel->nir)) {
 447                         progress = true;
 448                         NIR_PASS(progress, sel->nir, nir_copy_prop);
 449                         NIR_PASS(progress, sel->nir, nir_opt_dce);
 450                 }
 451                 NIR_PASS(progress, sel->nir, nir_opt_if);
 452                 NIR_PASS(progress, sel->nir, nir_opt_dead_cf);
 453                 NIR_PASS(progress, sel->nir, nir_opt_cse);
 454                 NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8);
 455
 456                 /* Needed for algebraic lowering */
 457                 NIR_PASS(progress, sel->nir, nir_opt_algebraic);
 458                 NIR_PASS(progress, sel->nir, nir_opt_constant_folding);
 459
 460                 NIR_PASS(progress, sel->nir, nir_opt_undef);
 461                 NIR_PASS(progress, sel->nir, nir_opt_conditional_discard);
 462                 if (sel->nir->options->max_unroll_iterations) {
 463                         NIR_PASS(progress, sel->nir, nir_opt_loop_unroll, 0);
 464                 }
 465         } while (progress);
 466 }
 467
 468 static void declare_nir_input_vs(struct si_shader_context *ctx,
 469                                  struct nir_variable *variable,
 470                                  LLVMValueRef out[4])
 471 {
 472         si_llvm_load_input_vs(ctx, variable->data.driver_location / 4, out);
 473 }
 474
 475 static void declare_nir_input_fs(struct si_shader_context *ctx,
 476                                  struct nir_variable *variable,
 477                                  unsigned input_index,
 478                                  LLVMValueRef out[4])
 479 {
 480         unsigned slot = variable->data.location;
 481         if (slot == VARYING_SLOT_POS) {
 482                 out[0] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT);
 483                 out[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT);
 484                 out[2] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT);
 485                 out[3] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
 486                                 LLVMGetParam(ctx->main_fn, SI_PARAM_POS_W_FLOAT));
 487                 return;
 488         }
 489
 490         si_llvm_load_input_fs(ctx, input_index, out);
 491 }
 492
 493 LLVMValueRef si_nir_load_input_gs(struct ac_shader_abi *abi,
 494                                   unsigned location,
 495                                   unsigned driver_location,
 496                                   unsigned component,
 497                                   unsigned num_components,
 498                                   unsigned vertex_index,
 499                                   unsigned const_index,
 500                                   LLVMTypeRef type)
 501 {
 502         struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 503
 504         LLVMValueRef value[4];
 505         for (unsigned i = component; i < num_components + component; i++) {
 506                 value[i] = si_llvm_load_input_gs(&ctx->abi, driver_location  / 4,
 507                                                  vertex_index, type, i);
 508         }
 509
 510         return ac_build_varying_gather_values(&ctx->ac, value, num_components, component);
 511 }
 512
 513 static LLVMValueRef
 514 si_nir_load_sampler_desc(struct ac_shader_abi *abi,
 515                          unsigned descriptor_set, unsigned base_index,
 516                          unsigned constant_index, LLVMValueRef dynamic_index,
 517                          enum ac_descriptor_type desc_type, bool image,
 518                          bool write)
 519 {
 520         struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 521         LLVMBuilderRef builder = ctx->ac.builder;
 522         LLVMValueRef list = LLVMGetParam(ctx->main_fn, ctx->param_samplers_and_images);
 523         LLVMValueRef index = dynamic_index;
 524
 525         assert(!descriptor_set);
 526
 527         if (!index)
 528                 index = ctx->ac.i32_0;
 529
 530         index = LLVMBuildAdd(builder, index,
 531                              LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
 532                              "");
 533
 534         if (image) {
 535                 assert(desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
 536                 assert(base_index + constant_index < ctx->num_images);
 537
 538                 if (dynamic_index)
 539                         index = si_llvm_bound_index(ctx, index, ctx->num_images);
 540
 541                 index = LLVMBuildSub(ctx->gallivm.builder,
 542                                      LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
 543                                      index, "");
 544
 545                 /* TODO: be smarter about when we use dcc_off */
 546                 return si_load_image_desc(ctx, list, index, desc_type, write);
 547         }
 548
 549         assert(base_index + constant_index < ctx->num_samplers);
 550
 551         if (dynamic_index)
 552                 index = si_llvm_bound_index(ctx, index, ctx->num_samplers);
 553
 554         index = LLVMBuildAdd(ctx->gallivm.builder, index,
 555                              LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
 556
 557         return si_load_sampler_desc(ctx, list, index, desc_type);
 558 }
 559
 560 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
 561 {
 562         struct tgsi_shader_info *info = &ctx->shader->selector->info;
 563
 564         if (nir->info.stage == MESA_SHADER_VERTEX ||
 565             nir->info.stage == MESA_SHADER_FRAGMENT) {
 566                 uint64_t processed_inputs = 0;
 567                 nir_foreach_variable(variable, &nir->inputs) {
 568                         unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 569                                                                            nir->info.stage == MESA_SHADER_VERTEX);
 570                         unsigned input_idx = variable->data.driver_location;
 571
 572                         assert(attrib_count == 1);
 573
 574                         LLVMValueRef data[4];
 575                         unsigned loc = variable->data.location;
 576
 577                         /* Packed components share the same location so skip
 578                          * them if we have already processed the location.
 579                          */
 580                         if (processed_inputs & ((uint64_t)1 << loc))
 581                                 continue;
 582
 583                         if (nir->info.stage == MESA_SHADER_VERTEX)
 584                                 declare_nir_input_vs(ctx, variable, data);
 585                         else if (nir->info.stage == MESA_SHADER_FRAGMENT)
 586                                 declare_nir_input_fs(ctx, variable, input_idx / 4, data);
 587
 588                         for (unsigned chan = 0; chan < 4; chan++) {
 589                                 ctx->inputs[input_idx + chan] =
 590                                         LLVMBuildBitCast(ctx->ac.builder, data[chan], ctx->ac.i32, "");
 591                         }
 592                         processed_inputs |= ((uint64_t)1 << loc);
 593                 }
 594         }
 595
 596         ctx->abi.inputs = &ctx->inputs[0];
 597         ctx->abi.load_sampler_desc = si_nir_load_sampler_desc;
 598         ctx->abi.clamp_shadow_reference = true;
 599
 600         ctx->num_samplers = util_last_bit(info->samplers_declared);
 601         ctx->num_images = util_last_bit(info->images_declared);
 602
 603         ac_nir_translate(&ctx->ac, &ctx->abi, nir, NULL);
 604
 605         return true;
 606 }