2 * Copyright 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "si_shader.h"
25 #include "si_shader_internal.h"
27 #include "ac_nir_to_llvm.h"
29 #include "tgsi/tgsi_from_mesa.h"
31 #include "compiler/nir/nir.h"
32 #include "compiler/nir_types.h"
36 type_size(const struct glsl_type
*type
)
38 return glsl_count_attribute_slots(type
, false);
41 static void scan_instruction(struct tgsi_shader_info
*info
,
44 if (instr
->type
== nir_instr_type_alu
) {
45 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
50 case nir_op_fddx_fine
:
51 case nir_op_fddy_fine
:
52 case nir_op_fddx_coarse
:
53 case nir_op_fddy_coarse
:
54 info
->uses_derivatives
= true;
59 } else if (instr
->type
== nir_instr_type_tex
) {
60 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
66 info
->uses_derivatives
= true;
71 } else if (instr
->type
== nir_instr_type_intrinsic
) {
72 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
74 switch (intr
->intrinsic
) {
75 case nir_intrinsic_load_front_face
:
76 info
->uses_frontface
= 1;
78 case nir_intrinsic_load_instance_id
:
79 info
->uses_instanceid
= 1;
81 case nir_intrinsic_load_vertex_id
:
82 info
->uses_vertexid
= 1;
84 case nir_intrinsic_load_vertex_id_zero_base
:
85 info
->uses_vertexid_nobase
= 1;
87 case nir_intrinsic_load_base_vertex
:
88 info
->uses_basevertex
= 1;
90 case nir_intrinsic_load_primitive_id
:
91 info
->uses_primid
= 1;
93 case nir_intrinsic_image_store
:
94 case nir_intrinsic_image_atomic_add
:
95 case nir_intrinsic_image_atomic_min
:
96 case nir_intrinsic_image_atomic_max
:
97 case nir_intrinsic_image_atomic_and
:
98 case nir_intrinsic_image_atomic_or
:
99 case nir_intrinsic_image_atomic_xor
:
100 case nir_intrinsic_image_atomic_exchange
:
101 case nir_intrinsic_image_atomic_comp_swap
:
102 case nir_intrinsic_store_ssbo
:
103 case nir_intrinsic_ssbo_atomic_add
:
104 case nir_intrinsic_ssbo_atomic_imin
:
105 case nir_intrinsic_ssbo_atomic_umin
:
106 case nir_intrinsic_ssbo_atomic_imax
:
107 case nir_intrinsic_ssbo_atomic_umax
:
108 case nir_intrinsic_ssbo_atomic_and
:
109 case nir_intrinsic_ssbo_atomic_or
:
110 case nir_intrinsic_ssbo_atomic_xor
:
111 case nir_intrinsic_ssbo_atomic_exchange
:
112 case nir_intrinsic_ssbo_atomic_comp_swap
:
113 info
->writes_memory
= true;
121 void si_nir_scan_shader(const struct nir_shader
*nir
,
122 struct tgsi_shader_info
*info
)
127 assert(nir
->info
.stage
== MESA_SHADER_VERTEX
||
128 nir
->info
.stage
== MESA_SHADER_FRAGMENT
);
130 info
->processor
= pipe_shader_type_from_mesa(nir
->info
.stage
);
131 info
->num_tokens
= 2; /* indicate that the shader is non-empty */
132 info
->num_instructions
= 2;
134 info
->num_inputs
= nir
->num_inputs
;
135 info
->num_outputs
= nir
->num_outputs
;
138 nir_foreach_variable(variable
, &nir
->inputs
) {
139 unsigned semantic_name
, semantic_index
;
140 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
141 nir
->info
.stage
== MESA_SHADER_VERTEX
);
143 assert(attrib_count
== 1 && "not implemented");
145 /* Vertex shader inputs don't have semantics. The state
146 * tracker has already mapped them to attributes via
147 * variable->data.driver_location.
149 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
152 /* Fragment shader position is a system value. */
153 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
&&
154 variable
->data
.location
== VARYING_SLOT_POS
) {
155 if (variable
->data
.pixel_center_integer
)
156 info
->properties
[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
] =
157 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
;
161 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
162 &semantic_name
, &semantic_index
);
164 info
->input_semantic_name
[i
] = semantic_name
;
165 info
->input_semantic_index
[i
] = semantic_index
;
167 if (variable
->data
.sample
)
168 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_SAMPLE
;
169 else if (variable
->data
.centroid
)
170 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTROID
;
172 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTER
;
174 enum glsl_base_type base_type
=
175 glsl_get_base_type(glsl_without_array(variable
->type
));
177 switch (variable
->data
.interpolation
) {
178 case INTERP_MODE_NONE
:
179 if (glsl_base_type_is_integer(base_type
)) {
180 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
184 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
185 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_COLOR
;
186 goto persp_locations
;
189 case INTERP_MODE_SMOOTH
:
190 assert(!glsl_base_type_is_integer(base_type
));
192 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_PERSPECTIVE
;
195 if (variable
->data
.sample
)
196 info
->uses_persp_sample
= true;
197 else if (variable
->data
.centroid
)
198 info
->uses_persp_centroid
= true;
200 info
->uses_persp_center
= true;
203 case INTERP_MODE_NOPERSPECTIVE
:
204 assert(!glsl_base_type_is_integer(base_type
));
206 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_LINEAR
;
208 if (variable
->data
.sample
)
209 info
->uses_linear_sample
= true;
210 else if (variable
->data
.centroid
)
211 info
->uses_linear_centroid
= true;
213 info
->uses_linear_center
= true;
216 case INTERP_MODE_FLAT
:
217 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
221 /* TODO make this more precise */
222 if (variable
->data
.location
== VARYING_SLOT_COL0
)
223 info
->colors_read
|= 0x0f;
224 else if (variable
->data
.location
== VARYING_SLOT_COL1
)
225 info
->colors_read
|= 0xf0;
231 nir_foreach_variable(variable
, &nir
->outputs
) {
232 unsigned semantic_name
, semantic_index
;
234 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
235 tgsi_get_gl_frag_result_semantic(variable
->data
.location
,
236 &semantic_name
, &semantic_index
);
238 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
239 &semantic_name
, &semantic_index
);
242 info
->output_semantic_name
[i
] = semantic_name
;
243 info
->output_semantic_index
[i
] = semantic_index
;
244 info
->output_usagemask
[i
] = TGSI_WRITEMASK_XYZW
;
246 switch (semantic_name
) {
247 case TGSI_SEMANTIC_PRIMID
:
248 info
->writes_primid
= true;
250 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
251 info
->writes_viewport_index
= true;
253 case TGSI_SEMANTIC_LAYER
:
254 info
->writes_layer
= true;
256 case TGSI_SEMANTIC_PSIZE
:
257 info
->writes_psize
= true;
259 case TGSI_SEMANTIC_CLIPVERTEX
:
260 info
->writes_clipvertex
= true;
262 case TGSI_SEMANTIC_COLOR
:
263 info
->colors_written
|= 1 << semantic_index
;
265 case TGSI_SEMANTIC_STENCIL
:
266 info
->writes_stencil
= true;
268 case TGSI_SEMANTIC_SAMPLEMASK
:
269 info
->writes_samplemask
= true;
271 case TGSI_SEMANTIC_EDGEFLAG
:
272 info
->writes_edgeflag
= true;
274 case TGSI_SEMANTIC_POSITION
:
275 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
276 info
->writes_z
= true;
278 info
->writes_position
= true;
285 nir_foreach_variable(variable
, &nir
->uniforms
) {
286 const struct glsl_type
*type
= variable
->type
;
287 enum glsl_base_type base_type
=
288 glsl_get_base_type(glsl_without_array(type
));
289 unsigned aoa_size
= MAX2(1, glsl_get_aoa_size(type
));
291 /* We rely on the fact that nir_lower_samplers_as_deref has
292 * eliminated struct dereferences.
294 if (base_type
== GLSL_TYPE_SAMPLER
)
295 info
->samplers_declared
|=
296 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
297 else if (base_type
== GLSL_TYPE_IMAGE
)
298 info
->images_declared
|=
299 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
302 info
->num_written_clipdistance
= nir
->info
.clip_distance_array_size
;
303 info
->num_written_culldistance
= nir
->info
.cull_distance_array_size
;
304 info
->clipdist_writemask
= u_bit_consecutive(0, info
->num_written_clipdistance
);
305 info
->culldist_writemask
= u_bit_consecutive(info
->num_written_clipdistance
,
306 info
->num_written_culldistance
);
308 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
309 info
->uses_kill
= nir
->info
.fs
.uses_discard
;
311 /* TODO make this more accurate */
312 info
->const_buffers_declared
= u_bit_consecutive(0, SI_NUM_CONST_BUFFERS
);
313 info
->shader_buffers_declared
= u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS
);
315 func
= (struct nir_function
*)exec_list_get_head_const(&nir
->functions
);
316 nir_foreach_block(block
, func
->impl
) {
317 nir_foreach_instr(instr
, block
)
318 scan_instruction(info
, instr
);
323 * Perform "lowering" operations on the NIR that are run once when the shader
324 * selector is created.
327 si_lower_nir(struct si_shader_selector
* sel
)
329 /* Adjust the driver location of inputs and outputs. The state tracker
330 * interprets them as slots, while the ac/nir backend interprets them
331 * as individual components.
333 nir_foreach_variable(variable
, &sel
->nir
->inputs
)
334 variable
->data
.driver_location
*= 4;
336 nir_foreach_variable(variable
, &sel
->nir
->outputs
) {
337 variable
->data
.driver_location
*= 4;
339 if (sel
->nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
340 if (variable
->data
.location
== FRAG_RESULT_DEPTH
)
341 variable
->data
.driver_location
+= 2;
342 else if (variable
->data
.location
== FRAG_RESULT_STENCIL
)
343 variable
->data
.driver_location
+= 1;
347 /* Perform lowerings (and optimizations) of code.
349 * Performance considerations aside, we must:
350 * - lower certain ALU operations
351 * - ensure constant offsets for texture instructions are folded
352 * and copy-propagated
354 NIR_PASS_V(sel
->nir
, nir_lower_io
, nir_var_uniform
, type_size
,
355 (nir_lower_io_options
)0);
356 NIR_PASS_V(sel
->nir
, nir_lower_uniforms_to_ubo
);
358 NIR_PASS_V(sel
->nir
, nir_lower_returns
);
359 NIR_PASS_V(sel
->nir
, nir_lower_vars_to_ssa
);
360 NIR_PASS_V(sel
->nir
, nir_lower_alu_to_scalar
);
361 NIR_PASS_V(sel
->nir
, nir_lower_phis_to_scalar
);
363 static const struct nir_lower_tex_options lower_tex_options
= {
366 NIR_PASS_V(sel
->nir
, nir_lower_tex
, &lower_tex_options
);
372 /* (Constant) copy propagation is needed for txf with offsets. */
373 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
374 NIR_PASS(progress
, sel
->nir
, nir_opt_remove_phis
);
375 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
376 if (nir_opt_trivial_continues(sel
->nir
)) {
378 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
379 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
381 NIR_PASS(progress
, sel
->nir
, nir_opt_if
);
382 NIR_PASS(progress
, sel
->nir
, nir_opt_dead_cf
);
383 NIR_PASS(progress
, sel
->nir
, nir_opt_cse
);
384 NIR_PASS(progress
, sel
->nir
, nir_opt_peephole_select
, 8);
386 /* Needed for algebraic lowering */
387 NIR_PASS(progress
, sel
->nir
, nir_opt_algebraic
);
388 NIR_PASS(progress
, sel
->nir
, nir_opt_constant_folding
);
390 NIR_PASS(progress
, sel
->nir
, nir_opt_undef
);
391 NIR_PASS(progress
, sel
->nir
, nir_opt_conditional_discard
);
392 if (sel
->nir
->options
->max_unroll_iterations
) {
393 NIR_PASS(progress
, sel
->nir
, nir_opt_loop_unroll
, 0);
398 static void declare_nir_input_vs(struct si_shader_context
*ctx
,
399 struct nir_variable
*variable
, unsigned rel
,
402 si_llvm_load_input_vs(ctx
, variable
->data
.driver_location
/ 4 + rel
, out
);
405 static void declare_nir_input_fs(struct si_shader_context
*ctx
,
406 struct nir_variable
*variable
, unsigned rel
,
407 unsigned *fs_attr_idx
,
410 unsigned slot
= variable
->data
.location
+ rel
;
412 assert(variable
->data
.location
>= VARYING_SLOT_VAR0
|| rel
== 0);
414 if (slot
== VARYING_SLOT_POS
) {
415 out
[0] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
);
416 out
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
);
417 out
[2] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
);
418 out
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
419 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
));
423 si_llvm_load_input_fs(ctx
, *fs_attr_idx
, out
);
428 si_nir_load_sampler_desc(struct ac_shader_abi
*abi
,
429 unsigned descriptor_set
, unsigned base_index
,
430 unsigned constant_index
, LLVMValueRef dynamic_index
,
431 enum ac_descriptor_type desc_type
, bool image
,
434 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
435 LLVMBuilderRef builder
= ctx
->ac
.builder
;
436 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, ctx
->param_samplers_and_images
);
437 LLVMValueRef index
= dynamic_index
;
439 assert(!descriptor_set
);
442 index
= ctx
->ac
.i32_0
;
444 index
= LLVMBuildAdd(builder
, index
,
445 LLVMConstInt(ctx
->ac
.i32
, base_index
+ constant_index
, false),
449 assert(desc_type
== AC_DESC_IMAGE
|| desc_type
== AC_DESC_BUFFER
);
450 assert(base_index
+ constant_index
< ctx
->num_images
);
453 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_images
);
455 index
= LLVMBuildSub(ctx
->gallivm
.builder
,
456 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
- 1, 0),
459 /* TODO: be smarter about when we use dcc_off */
460 return si_load_image_desc(ctx
, list
, index
, desc_type
, write
);
463 assert(base_index
+ constant_index
< ctx
->num_samplers
);
466 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_samplers
);
468 index
= LLVMBuildAdd(ctx
->gallivm
.builder
, index
,
469 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
/ 2, 0), "");
471 return si_load_sampler_desc(ctx
, list
, index
, desc_type
);
474 bool si_nir_build_llvm(struct si_shader_context
*ctx
, struct nir_shader
*nir
)
476 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
478 unsigned fs_attr_idx
= 0;
479 nir_foreach_variable(variable
, &nir
->inputs
) {
480 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
481 nir
->info
.stage
== MESA_SHADER_VERTEX
);
482 unsigned input_idx
= variable
->data
.driver_location
;
484 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
485 LLVMValueRef data
[4];
487 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
488 declare_nir_input_vs(ctx
, variable
, i
, data
);
489 else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
)
490 declare_nir_input_fs(ctx
, variable
, i
, &fs_attr_idx
, data
);
492 for (unsigned chan
= 0; chan
< 4; chan
++) {
493 ctx
->inputs
[input_idx
+ chan
] =
494 LLVMBuildBitCast(ctx
->ac
.builder
, data
[chan
], ctx
->ac
.i32
, "");
499 ctx
->abi
.inputs
= &ctx
->inputs
[0];
500 ctx
->abi
.load_sampler_desc
= si_nir_load_sampler_desc
;
501 ctx
->abi
.clamp_shadow_reference
= true;
503 ctx
->num_samplers
= util_last_bit(info
->samplers_declared
);
504 ctx
->num_images
= util_last_bit(info
->images_declared
);
506 ac_nir_translate(&ctx
->ac
, &ctx
->abi
, nir
, NULL
);