2 * Copyright 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "si_shader.h"
25 #include "si_shader_internal.h"
27 #include "ac_nir_to_llvm.h"
29 #include "tgsi/tgsi_from_mesa.h"
31 #include "compiler/nir/nir.h"
32 #include "compiler/nir_types.h"
36 type_size(const struct glsl_type
*type
)
38 return glsl_count_attribute_slots(type
, false);
41 static void scan_instruction(struct tgsi_shader_info
*info
,
44 if (instr
->type
== nir_instr_type_alu
) {
45 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
50 case nir_op_fddx_fine
:
51 case nir_op_fddy_fine
:
52 case nir_op_fddx_coarse
:
53 case nir_op_fddy_coarse
:
54 info
->uses_derivatives
= true;
59 } else if (instr
->type
== nir_instr_type_tex
) {
60 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
63 info
->samplers_declared
|=
64 u_bit_consecutive(tex
->sampler_index
, 1);
71 info
->uses_derivatives
= true;
76 } else if (instr
->type
== nir_instr_type_intrinsic
) {
77 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
79 switch (intr
->intrinsic
) {
80 case nir_intrinsic_load_front_face
:
81 info
->uses_frontface
= 1;
83 case nir_intrinsic_load_instance_id
:
84 info
->uses_instanceid
= 1;
86 case nir_intrinsic_load_vertex_id
:
87 info
->uses_vertexid
= 1;
89 case nir_intrinsic_load_vertex_id_zero_base
:
90 info
->uses_vertexid_nobase
= 1;
92 case nir_intrinsic_load_base_vertex
:
93 info
->uses_basevertex
= 1;
95 case nir_intrinsic_load_primitive_id
:
96 info
->uses_primid
= 1;
98 case nir_intrinsic_image_store
:
99 case nir_intrinsic_image_atomic_add
:
100 case nir_intrinsic_image_atomic_min
:
101 case nir_intrinsic_image_atomic_max
:
102 case nir_intrinsic_image_atomic_and
:
103 case nir_intrinsic_image_atomic_or
:
104 case nir_intrinsic_image_atomic_xor
:
105 case nir_intrinsic_image_atomic_exchange
:
106 case nir_intrinsic_image_atomic_comp_swap
:
107 case nir_intrinsic_store_ssbo
:
108 case nir_intrinsic_ssbo_atomic_add
:
109 case nir_intrinsic_ssbo_atomic_imin
:
110 case nir_intrinsic_ssbo_atomic_umin
:
111 case nir_intrinsic_ssbo_atomic_imax
:
112 case nir_intrinsic_ssbo_atomic_umax
:
113 case nir_intrinsic_ssbo_atomic_and
:
114 case nir_intrinsic_ssbo_atomic_or
:
115 case nir_intrinsic_ssbo_atomic_xor
:
116 case nir_intrinsic_ssbo_atomic_exchange
:
117 case nir_intrinsic_ssbo_atomic_comp_swap
:
118 info
->writes_memory
= true;
126 void si_nir_scan_shader(const struct nir_shader
*nir
,
127 struct tgsi_shader_info
*info
)
132 assert(nir
->info
.stage
== MESA_SHADER_VERTEX
||
133 nir
->info
.stage
== MESA_SHADER_FRAGMENT
);
135 info
->processor
= pipe_shader_type_from_mesa(nir
->info
.stage
);
136 info
->num_tokens
= 2; /* indicate that the shader is non-empty */
137 info
->num_instructions
= 2;
139 info
->num_inputs
= nir
->num_inputs
;
140 info
->num_outputs
= nir
->num_outputs
;
143 nir_foreach_variable(variable
, &nir
->inputs
) {
144 unsigned semantic_name
, semantic_index
;
145 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
146 nir
->info
.stage
== MESA_SHADER_VERTEX
);
148 assert(attrib_count
== 1 && "not implemented");
150 /* Vertex shader inputs don't have semantics. The state
151 * tracker has already mapped them to attributes via
152 * variable->data.driver_location.
154 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
157 /* Fragment shader position is a system value. */
158 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
&&
159 variable
->data
.location
== VARYING_SLOT_POS
) {
160 if (variable
->data
.pixel_center_integer
)
161 info
->properties
[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
] =
162 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
;
166 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
167 &semantic_name
, &semantic_index
);
169 info
->input_semantic_name
[i
] = semantic_name
;
170 info
->input_semantic_index
[i
] = semantic_index
;
172 if (variable
->data
.sample
)
173 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_SAMPLE
;
174 else if (variable
->data
.centroid
)
175 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTROID
;
177 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTER
;
179 enum glsl_base_type base_type
=
180 glsl_get_base_type(glsl_without_array(variable
->type
));
182 switch (variable
->data
.interpolation
) {
183 case INTERP_MODE_NONE
:
184 if (glsl_base_type_is_integer(base_type
)) {
185 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
189 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
190 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_COLOR
;
191 goto persp_locations
;
194 case INTERP_MODE_SMOOTH
:
195 assert(!glsl_base_type_is_integer(base_type
));
197 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_PERSPECTIVE
;
200 if (variable
->data
.sample
)
201 info
->uses_persp_sample
= true;
202 else if (variable
->data
.centroid
)
203 info
->uses_persp_centroid
= true;
205 info
->uses_persp_center
= true;
208 case INTERP_MODE_NOPERSPECTIVE
:
209 assert(!glsl_base_type_is_integer(base_type
));
211 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_LINEAR
;
213 if (variable
->data
.sample
)
214 info
->uses_linear_sample
= true;
215 else if (variable
->data
.centroid
)
216 info
->uses_linear_centroid
= true;
218 info
->uses_linear_center
= true;
221 case INTERP_MODE_FLAT
:
222 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
226 /* TODO make this more precise */
227 if (variable
->data
.location
== VARYING_SLOT_COL0
)
228 info
->colors_read
|= 0x0f;
229 else if (variable
->data
.location
== VARYING_SLOT_COL1
)
230 info
->colors_read
|= 0xf0;
236 nir_foreach_variable(variable
, &nir
->outputs
) {
237 unsigned semantic_name
, semantic_index
;
239 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
240 tgsi_get_gl_frag_result_semantic(variable
->data
.location
,
241 &semantic_name
, &semantic_index
);
243 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
244 &semantic_name
, &semantic_index
);
247 info
->output_semantic_name
[i
] = semantic_name
;
248 info
->output_semantic_index
[i
] = semantic_index
;
249 info
->output_usagemask
[i
] = TGSI_WRITEMASK_XYZW
;
251 unsigned num_components
= 4;
252 unsigned vector_elements
= glsl_get_vector_elements(glsl_without_array(variable
->type
));
254 num_components
= vector_elements
;
256 unsigned gs_out_streams
;
257 if (variable
->data
.stream
& (1u << 31)) {
258 gs_out_streams
= variable
->data
.stream
& ~(1u << 31);
260 assert(variable
->data
.stream
< 4);
262 for (unsigned j
= 0; j
< num_components
; ++j
)
263 gs_out_streams
|= variable
->data
.stream
<< (2 * (variable
->data
.location_frac
+ j
));
266 unsigned streamx
= gs_out_streams
& 3;
267 unsigned streamy
= (gs_out_streams
>> 2) & 3;
268 unsigned streamz
= (gs_out_streams
>> 4) & 3;
269 unsigned streamw
= (gs_out_streams
>> 6) & 3;
271 if (info
->output_usagemask
[i
] & TGSI_WRITEMASK_X
) {
272 info
->output_streams
[i
] |= streamx
;
273 info
->num_stream_output_components
[streamx
]++;
275 if (info
->output_usagemask
[i
] & TGSI_WRITEMASK_Y
) {
276 info
->output_streams
[i
] |= streamy
<< 2;
277 info
->num_stream_output_components
[streamy
]++;
279 if (info
->output_usagemask
[i
] & TGSI_WRITEMASK_Z
) {
280 info
->output_streams
[i
] |= streamz
<< 4;
281 info
->num_stream_output_components
[streamz
]++;
283 if (info
->output_usagemask
[i
] & TGSI_WRITEMASK_W
) {
284 info
->output_streams
[i
] |= streamw
<< 6;
285 info
->num_stream_output_components
[streamw
]++;
288 switch (semantic_name
) {
289 case TGSI_SEMANTIC_PRIMID
:
290 info
->writes_primid
= true;
292 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
293 info
->writes_viewport_index
= true;
295 case TGSI_SEMANTIC_LAYER
:
296 info
->writes_layer
= true;
298 case TGSI_SEMANTIC_PSIZE
:
299 info
->writes_psize
= true;
301 case TGSI_SEMANTIC_CLIPVERTEX
:
302 info
->writes_clipvertex
= true;
304 case TGSI_SEMANTIC_COLOR
:
305 info
->colors_written
|= 1 << semantic_index
;
307 case TGSI_SEMANTIC_STENCIL
:
308 info
->writes_stencil
= true;
310 case TGSI_SEMANTIC_SAMPLEMASK
:
311 info
->writes_samplemask
= true;
313 case TGSI_SEMANTIC_EDGEFLAG
:
314 info
->writes_edgeflag
= true;
316 case TGSI_SEMANTIC_POSITION
:
317 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
318 info
->writes_z
= true;
320 info
->writes_position
= true;
327 nir_foreach_variable(variable
, &nir
->uniforms
) {
328 const struct glsl_type
*type
= variable
->type
;
329 enum glsl_base_type base_type
=
330 glsl_get_base_type(glsl_without_array(type
));
331 unsigned aoa_size
= MAX2(1, glsl_get_aoa_size(type
));
333 /* We rely on the fact that nir_lower_samplers_as_deref has
334 * eliminated struct dereferences.
336 if (base_type
== GLSL_TYPE_SAMPLER
)
337 info
->samplers_declared
|=
338 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
339 else if (base_type
== GLSL_TYPE_IMAGE
)
340 info
->images_declared
|=
341 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
344 info
->num_written_clipdistance
= nir
->info
.clip_distance_array_size
;
345 info
->num_written_culldistance
= nir
->info
.cull_distance_array_size
;
346 info
->clipdist_writemask
= u_bit_consecutive(0, info
->num_written_clipdistance
);
347 info
->culldist_writemask
= u_bit_consecutive(0, info
->num_written_culldistance
);
349 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
350 info
->uses_kill
= nir
->info
.fs
.uses_discard
;
352 /* TODO make this more accurate */
353 info
->const_buffers_declared
= u_bit_consecutive(0, SI_NUM_CONST_BUFFERS
);
354 info
->shader_buffers_declared
= u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS
);
356 func
= (struct nir_function
*)exec_list_get_head_const(&nir
->functions
);
357 nir_foreach_block(block
, func
->impl
) {
358 nir_foreach_instr(instr
, block
)
359 scan_instruction(info
, instr
);
364 * Perform "lowering" operations on the NIR that are run once when the shader
365 * selector is created.
368 si_lower_nir(struct si_shader_selector
* sel
)
370 /* Adjust the driver location of inputs and outputs. The state tracker
371 * interprets them as slots, while the ac/nir backend interprets them
372 * as individual components.
374 nir_foreach_variable(variable
, &sel
->nir
->inputs
)
375 variable
->data
.driver_location
*= 4;
377 nir_foreach_variable(variable
, &sel
->nir
->outputs
) {
378 variable
->data
.driver_location
*= 4;
380 if (sel
->nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
381 if (variable
->data
.location
== FRAG_RESULT_DEPTH
)
382 variable
->data
.driver_location
+= 2;
383 else if (variable
->data
.location
== FRAG_RESULT_STENCIL
)
384 variable
->data
.driver_location
+= 1;
388 /* Perform lowerings (and optimizations) of code.
390 * Performance considerations aside, we must:
391 * - lower certain ALU operations
392 * - ensure constant offsets for texture instructions are folded
393 * and copy-propagated
395 NIR_PASS_V(sel
->nir
, nir_lower_io
, nir_var_uniform
, type_size
,
396 (nir_lower_io_options
)0);
397 NIR_PASS_V(sel
->nir
, nir_lower_uniforms_to_ubo
);
399 NIR_PASS_V(sel
->nir
, nir_lower_returns
);
400 NIR_PASS_V(sel
->nir
, nir_lower_vars_to_ssa
);
401 NIR_PASS_V(sel
->nir
, nir_lower_alu_to_scalar
);
402 NIR_PASS_V(sel
->nir
, nir_lower_phis_to_scalar
);
404 static const struct nir_lower_tex_options lower_tex_options
= {
407 NIR_PASS_V(sel
->nir
, nir_lower_tex
, &lower_tex_options
);
413 /* (Constant) copy propagation is needed for txf with offsets. */
414 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
415 NIR_PASS(progress
, sel
->nir
, nir_opt_remove_phis
);
416 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
417 if (nir_opt_trivial_continues(sel
->nir
)) {
419 NIR_PASS(progress
, sel
->nir
, nir_copy_prop
);
420 NIR_PASS(progress
, sel
->nir
, nir_opt_dce
);
422 NIR_PASS(progress
, sel
->nir
, nir_opt_if
);
423 NIR_PASS(progress
, sel
->nir
, nir_opt_dead_cf
);
424 NIR_PASS(progress
, sel
->nir
, nir_opt_cse
);
425 NIR_PASS(progress
, sel
->nir
, nir_opt_peephole_select
, 8);
427 /* Needed for algebraic lowering */
428 NIR_PASS(progress
, sel
->nir
, nir_opt_algebraic
);
429 NIR_PASS(progress
, sel
->nir
, nir_opt_constant_folding
);
431 NIR_PASS(progress
, sel
->nir
, nir_opt_undef
);
432 NIR_PASS(progress
, sel
->nir
, nir_opt_conditional_discard
);
433 if (sel
->nir
->options
->max_unroll_iterations
) {
434 NIR_PASS(progress
, sel
->nir
, nir_opt_loop_unroll
, 0);
439 static void declare_nir_input_vs(struct si_shader_context
*ctx
,
440 struct nir_variable
*variable
, unsigned rel
,
443 si_llvm_load_input_vs(ctx
, variable
->data
.driver_location
/ 4 + rel
, out
);
446 static void declare_nir_input_fs(struct si_shader_context
*ctx
,
447 struct nir_variable
*variable
, unsigned rel
,
448 unsigned *fs_attr_idx
,
451 unsigned slot
= variable
->data
.location
+ rel
;
453 assert(variable
->data
.location
>= VARYING_SLOT_VAR0
|| rel
== 0);
455 if (slot
== VARYING_SLOT_POS
) {
456 out
[0] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
);
457 out
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
);
458 out
[2] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
);
459 out
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
460 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
));
464 si_llvm_load_input_fs(ctx
, *fs_attr_idx
, out
);
469 si_nir_load_sampler_desc(struct ac_shader_abi
*abi
,
470 unsigned descriptor_set
, unsigned base_index
,
471 unsigned constant_index
, LLVMValueRef dynamic_index
,
472 enum ac_descriptor_type desc_type
, bool image
,
475 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
476 LLVMBuilderRef builder
= ctx
->ac
.builder
;
477 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, ctx
->param_samplers_and_images
);
478 LLVMValueRef index
= dynamic_index
;
480 assert(!descriptor_set
);
483 index
= ctx
->ac
.i32_0
;
485 index
= LLVMBuildAdd(builder
, index
,
486 LLVMConstInt(ctx
->ac
.i32
, base_index
+ constant_index
, false),
490 assert(desc_type
== AC_DESC_IMAGE
|| desc_type
== AC_DESC_BUFFER
);
491 assert(base_index
+ constant_index
< ctx
->num_images
);
494 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_images
);
496 index
= LLVMBuildSub(ctx
->gallivm
.builder
,
497 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
- 1, 0),
500 /* TODO: be smarter about when we use dcc_off */
501 return si_load_image_desc(ctx
, list
, index
, desc_type
, write
);
504 assert(base_index
+ constant_index
< ctx
->num_samplers
);
507 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_samplers
);
509 index
= LLVMBuildAdd(ctx
->gallivm
.builder
, index
,
510 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
/ 2, 0), "");
512 return si_load_sampler_desc(ctx
, list
, index
, desc_type
);
515 bool si_nir_build_llvm(struct si_shader_context
*ctx
, struct nir_shader
*nir
)
517 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
519 unsigned fs_attr_idx
= 0;
520 nir_foreach_variable(variable
, &nir
->inputs
) {
521 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
522 nir
->info
.stage
== MESA_SHADER_VERTEX
);
523 unsigned input_idx
= variable
->data
.driver_location
;
525 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
526 LLVMValueRef data
[4];
528 if (nir
->info
.stage
== MESA_SHADER_VERTEX
)
529 declare_nir_input_vs(ctx
, variable
, i
, data
);
530 else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
)
531 declare_nir_input_fs(ctx
, variable
, i
, &fs_attr_idx
, data
);
533 for (unsigned chan
= 0; chan
< 4; chan
++) {
534 ctx
->inputs
[input_idx
+ chan
] =
535 LLVMBuildBitCast(ctx
->ac
.builder
, data
[chan
], ctx
->ac
.i32
, "");
540 ctx
->abi
.inputs
= &ctx
->inputs
[0];
541 ctx
->abi
.load_sampler_desc
= si_nir_load_sampler_desc
;
542 ctx
->abi
.clamp_shadow_reference
= true;
544 ctx
->num_samplers
= util_last_bit(info
->samplers_declared
);
545 ctx
->num_images
= util_last_bit(info
->images_declared
);
547 ac_nir_translate(&ctx
->ac
, &ctx
->abi
, nir
, NULL
);