src/gallium/drivers/radeonsi/si_shader_nir.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "si_shader.h"
  25 #include "si_shader_internal.h"
  26
  27 #include "ac_nir_to_llvm.h"
  28
  29 #include "tgsi/tgsi_from_mesa.h"
  30
  31 #include "compiler/nir/nir.h"
  32 #include "compiler/nir_types.h"
  33
  34
  35 static int
  36 type_size(const struct glsl_type *type)
  37 {
  38    return glsl_count_attribute_slots(type, false);
  39 }
  40
  41 static void scan_instruction(struct tgsi_shader_info *info,
  42                              nir_instr *instr)
  43 {
  44         if (instr->type == nir_instr_type_alu) {
  45                 nir_alu_instr *alu = nir_instr_as_alu(instr);
  46
  47                 switch (alu->op) {
  48                 case nir_op_fddx:
  49                 case nir_op_fddy:
  50                 case nir_op_fddx_fine:
  51                 case nir_op_fddy_fine:
  52                 case nir_op_fddx_coarse:
  53                 case nir_op_fddy_coarse:
  54                         info->uses_derivatives = true;
  55                         break;
  56                 default:
  57                         break;
  58                 }
  59         } else if (instr->type == nir_instr_type_tex) {
  60                 nir_tex_instr *tex = nir_instr_as_tex(instr);
  61
  62                 if (!tex->texture) {
  63                         info->samplers_declared |=
  64                                 u_bit_consecutive(tex->sampler_index, 1);
  65                 }
  66
  67                 switch (tex->op) {
  68                 case nir_texop_tex:
  69                 case nir_texop_txb:
  70                 case nir_texop_lod:
  71                         info->uses_derivatives = true;
  72                         break;
  73                 default:
  74                         break;
  75                 }
  76         } else if (instr->type == nir_instr_type_intrinsic) {
  77                 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
  78
  79                 switch (intr->intrinsic) {
  80                 case nir_intrinsic_load_front_face:
  81                         info->uses_frontface = 1;
  82                         break;
  83                 case nir_intrinsic_load_instance_id:
  84                         info->uses_instanceid = 1;
  85                         break;
  86                 case nir_intrinsic_load_invocation_id:
  87                         info->uses_invocationid = true;
  88                         break;
  89                 case nir_intrinsic_load_vertex_id:
  90                         info->uses_vertexid = 1;
  91                         break;
  92                 case nir_intrinsic_load_vertex_id_zero_base:
  93                         info->uses_vertexid_nobase = 1;
  94                         break;
  95                 case nir_intrinsic_load_base_vertex:
  96                         info->uses_basevertex = 1;
  97                         break;
  98                 case nir_intrinsic_load_primitive_id:
  99                         info->uses_primid = 1;
 100                         break;
 101                 case nir_intrinsic_load_tess_level_inner:
 102                 case nir_intrinsic_load_tess_level_outer:
 103                         info->reads_tess_factors = true;
 104                         break;
 105                 case nir_intrinsic_image_store:
 106                 case nir_intrinsic_image_atomic_add:
 107                 case nir_intrinsic_image_atomic_min:
 108                 case nir_intrinsic_image_atomic_max:
 109                 case nir_intrinsic_image_atomic_and:
 110                 case nir_intrinsic_image_atomic_or:
 111                 case nir_intrinsic_image_atomic_xor:
 112                 case nir_intrinsic_image_atomic_exchange:
 113                 case nir_intrinsic_image_atomic_comp_swap:
 114                 case nir_intrinsic_store_ssbo:
 115                 case nir_intrinsic_ssbo_atomic_add:
 116                 case nir_intrinsic_ssbo_atomic_imin:
 117                 case nir_intrinsic_ssbo_atomic_umin:
 118                 case nir_intrinsic_ssbo_atomic_imax:
 119                 case nir_intrinsic_ssbo_atomic_umax:
 120                 case nir_intrinsic_ssbo_atomic_and:
 121                 case nir_intrinsic_ssbo_atomic_or:
 122                 case nir_intrinsic_ssbo_atomic_xor:
 123                 case nir_intrinsic_ssbo_atomic_exchange:
 124                 case nir_intrinsic_ssbo_atomic_comp_swap:
 125                         info->writes_memory = true;
 126                         break;
 127                 default:
 128                         break;
 129                 }
 130         }
 131 }
 132
 133 void si_nir_scan_shader(const struct nir_shader *nir,
 134                         struct tgsi_shader_info *info)
 135 {
 136         nir_function *func;
 137         unsigned i;
 138
 139         assert(nir->info.stage == MESA_SHADER_VERTEX ||
 140                nir->info.stage == MESA_SHADER_GEOMETRY ||
 141                nir->info.stage == MESA_SHADER_FRAGMENT);
 142
 143         info->processor = pipe_shader_type_from_mesa(nir->info.stage);
 144         info->num_tokens = 2; /* indicate that the shader is non-empty */
 145         info->num_instructions = 2;
 146
 147         if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
 148                 info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT] =
 149                         nir->info.tess.tcs_vertices_out;
 150         }
 151
 152         if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
 153                 if (nir->info.tess.primitive_mode == GL_ISOLINES)
 154                         info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = PIPE_PRIM_LINES;
 155                 else
 156                         info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = nir->info.tess.primitive_mode;
 157
 158                 STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL);
 159                 STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 ==
 160                               PIPE_TESS_SPACING_FRACTIONAL_ODD);
 161                 STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 ==
 162                               PIPE_TESS_SPACING_FRACTIONAL_EVEN);
 163
 164                 info->properties[TGSI_PROPERTY_TES_SPACING] = (nir->info.tess.spacing + 1) % 3;
 165                 info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW] = !nir->info.tess.ccw;
 166                 info->properties[TGSI_PROPERTY_TES_POINT_MODE] = nir->info.tess.point_mode;
 167         }
 168
 169         if (nir->info.stage == MESA_SHADER_GEOMETRY) {
 170                 info->properties[TGSI_PROPERTY_GS_INPUT_PRIM] = nir->info.gs.input_primitive;
 171                 info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM] = nir->info.gs.output_primitive;
 172                 info->properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES] = nir->info.gs.vertices_out;
 173                 info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = nir->info.gs.invocations;
 174         }
 175
 176         i = 0;
 177         uint64_t processed_inputs = 0;
 178         unsigned num_inputs = 0;
 179         nir_foreach_variable(variable, &nir->inputs) {
 180                 unsigned semantic_name, semantic_index;
 181                 unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 182                                                                    nir->info.stage == MESA_SHADER_VERTEX);
 183
 184                 /* Vertex shader inputs don't have semantics. The state
 185                  * tracker has already mapped them to attributes via
 186                  * variable->data.driver_location.
 187                  */
 188                 if (nir->info.stage == MESA_SHADER_VERTEX)
 189                         continue;
 190
 191                 assert(nir->info.stage != MESA_SHADER_FRAGMENT ||
 192                        (attrib_count == 1 && "not implemented"));
 193
 194                 /* Fragment shader position is a system value. */
 195                 if (nir->info.stage == MESA_SHADER_FRAGMENT &&
 196                     variable->data.location == VARYING_SLOT_POS) {
 197                         if (variable->data.pixel_center_integer)
 198                                 info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
 199                                         TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
 200
 201                         num_inputs++;
 202                         continue;
 203                 }
 204
 205                 i = variable->data.driver_location;
 206                 if (processed_inputs & ((uint64_t)1 << i))
 207                         continue;
 208
 209                 processed_inputs |= ((uint64_t)1 << i);
 210                 num_inputs++;
 211
 212                 tgsi_get_gl_varying_semantic(variable->data.location, true,
 213                                              &semantic_name, &semantic_index);
 214
 215                 info->input_semantic_name[i] = semantic_name;
 216                 info->input_semantic_index[i] = semantic_index;
 217
 218                 if (variable->data.sample)
 219                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_SAMPLE;
 220                 else if (variable->data.centroid)
 221                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTROID;
 222                 else
 223                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTER;
 224
 225                 enum glsl_base_type base_type =
 226                         glsl_get_base_type(glsl_without_array(variable->type));
 227
 228                 switch (variable->data.interpolation) {
 229                 case INTERP_MODE_NONE:
 230                         if (glsl_base_type_is_integer(base_type)) {
 231                                 info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 232                                 break;
 233                         }
 234
 235                         if (semantic_name == TGSI_SEMANTIC_COLOR) {
 236                                 info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
 237                                 goto persp_locations;
 238                         }
 239                         /* fall-through */
 240                 case INTERP_MODE_SMOOTH:
 241                         assert(!glsl_base_type_is_integer(base_type));
 242
 243                         info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
 244
 245                 persp_locations:
 246                         if (variable->data.sample)
 247                                 info->uses_persp_sample = true;
 248                         else if (variable->data.centroid)
 249                                 info->uses_persp_centroid = true;
 250                         else
 251                                 info->uses_persp_center = true;
 252                         break;
 253
 254                 case INTERP_MODE_NOPERSPECTIVE:
 255                         assert(!glsl_base_type_is_integer(base_type));
 256
 257                         info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
 258
 259                         if (variable->data.sample)
 260                                 info->uses_linear_sample = true;
 261                         else if (variable->data.centroid)
 262                                 info->uses_linear_centroid = true;
 263                         else
 264                                 info->uses_linear_center = true;
 265                         break;
 266
 267                 case INTERP_MODE_FLAT:
 268                         info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 269                         break;
 270                 }
 271
 272                 /* TODO make this more precise */
 273                 if (variable->data.location == VARYING_SLOT_COL0)
 274                         info->colors_read |= 0x0f;
 275                 else if (variable->data.location == VARYING_SLOT_COL1)
 276                         info->colors_read |= 0xf0;
 277         }
 278
 279         if (nir->info.stage != MESA_SHADER_VERTEX)
 280                 info->num_inputs = num_inputs;
 281         else
 282                 info->num_inputs = nir->num_inputs;
 283
 284         i = 0;
 285         uint64_t processed_outputs = 0;
 286         unsigned num_outputs = 0;
 287         nir_foreach_variable(variable, &nir->outputs) {
 288                 unsigned semantic_name, semantic_index;
 289
 290                 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
 291                         tgsi_get_gl_frag_result_semantic(variable->data.location,
 292                                 &semantic_name, &semantic_index);
 293                 } else {
 294                         tgsi_get_gl_varying_semantic(variable->data.location, true,
 295                                                      &semantic_name, &semantic_index);
 296                 }
 297
 298                 i = variable->data.driver_location;
 299                 if (processed_outputs & ((uint64_t)1 << i))
 300                         continue;
 301
 302                 processed_outputs |= ((uint64_t)1 << i);
 303                 num_outputs++;
 304
 305                 info->output_semantic_name[i] = semantic_name;
 306                 info->output_semantic_index[i] = semantic_index;
 307                 info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
 308
 309                 unsigned num_components = 4;
 310                 unsigned vector_elements = glsl_get_vector_elements(glsl_without_array(variable->type));
 311                 if (vector_elements)
 312                         num_components = vector_elements;
 313
 314                 unsigned gs_out_streams;
 315                 if (variable->data.stream & (1u << 31)) {
 316                         gs_out_streams = variable->data.stream & ~(1u << 31);
 317                 } else {
 318                         assert(variable->data.stream < 4);
 319                         gs_out_streams = 0;
 320                         for (unsigned j = 0; j < num_components; ++j)
 321                                 gs_out_streams |= variable->data.stream << (2 * (variable->data.location_frac + j));
 322                 }
 323
 324                 unsigned streamx = gs_out_streams & 3;
 325                 unsigned streamy = (gs_out_streams >> 2) & 3;
 326                 unsigned streamz = (gs_out_streams >> 4) & 3;
 327                 unsigned streamw = (gs_out_streams >> 6) & 3;
 328
 329                 if (info->output_usagemask[i] & TGSI_WRITEMASK_X) {
 330                         info->output_streams[i] |= streamx;
 331                         info->num_stream_output_components[streamx]++;
 332                 }
 333                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Y) {
 334                         info->output_streams[i] |= streamy << 2;
 335                         info->num_stream_output_components[streamy]++;
 336                 }
 337                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Z) {
 338                         info->output_streams[i] |= streamz << 4;
 339                         info->num_stream_output_components[streamz]++;
 340                 }
 341                 if (info->output_usagemask[i] & TGSI_WRITEMASK_W) {
 342                         info->output_streams[i] |= streamw << 6;
 343                         info->num_stream_output_components[streamw]++;
 344                 }
 345
 346                 switch (semantic_name) {
 347                 case TGSI_SEMANTIC_PRIMID:
 348                         info->writes_primid = true;
 349                         break;
 350                 case TGSI_SEMANTIC_VIEWPORT_INDEX:
 351                         info->writes_viewport_index = true;
 352                         break;
 353                 case TGSI_SEMANTIC_LAYER:
 354                         info->writes_layer = true;
 355                         break;
 356                 case TGSI_SEMANTIC_PSIZE:
 357                         info->writes_psize = true;
 358                         break;
 359                 case TGSI_SEMANTIC_CLIPVERTEX:
 360                         info->writes_clipvertex = true;
 361                         break;
 362                 case TGSI_SEMANTIC_COLOR:
 363                         info->colors_written |= 1 << semantic_index;
 364                         break;
 365                 case TGSI_SEMANTIC_STENCIL:
 366                         info->writes_stencil = true;
 367                         break;
 368                 case TGSI_SEMANTIC_SAMPLEMASK:
 369                         info->writes_samplemask = true;
 370                         break;
 371                 case TGSI_SEMANTIC_EDGEFLAG:
 372                         info->writes_edgeflag = true;
 373                         break;
 374                 case TGSI_SEMANTIC_POSITION:
 375                         if (info->processor == PIPE_SHADER_FRAGMENT)
 376                                 info->writes_z = true;
 377                         else
 378                                 info->writes_position = true;
 379                         break;
 380                 }
 381         }
 382
 383         info->num_outputs = num_outputs;
 384
 385         nir_foreach_variable(variable, &nir->uniforms) {
 386                 const struct glsl_type *type = variable->type;
 387                 enum glsl_base_type base_type =
 388                         glsl_get_base_type(glsl_without_array(type));
 389                 unsigned aoa_size = MAX2(1, glsl_get_aoa_size(type));
 390
 391                 /* We rely on the fact that nir_lower_samplers_as_deref has
 392                  * eliminated struct dereferences.
 393                  */
 394                 if (base_type == GLSL_TYPE_SAMPLER)
 395                         info->samplers_declared |=
 396                                 u_bit_consecutive(variable->data.binding, aoa_size);
 397                 else if (base_type == GLSL_TYPE_IMAGE)
 398                         info->images_declared |=
 399                                 u_bit_consecutive(variable->data.binding, aoa_size);
 400         }
 401
 402         info->num_written_clipdistance = nir->info.clip_distance_array_size;
 403         info->num_written_culldistance = nir->info.cull_distance_array_size;
 404         info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
 405         info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance);
 406
 407         if (info->processor == PIPE_SHADER_FRAGMENT)
 408                 info->uses_kill = nir->info.fs.uses_discard;
 409
 410         /* TODO make this more accurate */
 411         info->const_buffers_declared = u_bit_consecutive(0, SI_NUM_CONST_BUFFERS);
 412         info->shader_buffers_declared = u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
 413
 414         func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
 415         nir_foreach_block(block, func->impl) {
 416                 nir_foreach_instr(instr, block)
 417                         scan_instruction(info, instr);
 418         }
 419 }
 420
 421 /**
 422  * Perform "lowering" operations on the NIR that are run once when the shader
 423  * selector is created.
 424  */
 425 void
 426 si_lower_nir(struct si_shader_selector* sel)
 427 {
 428         /* Adjust the driver location of inputs and outputs. The state tracker
 429          * interprets them as slots, while the ac/nir backend interprets them
 430          * as individual components.
 431          */
 432         nir_foreach_variable(variable, &sel->nir->inputs)
 433                 variable->data.driver_location *= 4;
 434
 435         nir_foreach_variable(variable, &sel->nir->outputs) {
 436                 variable->data.driver_location *= 4;
 437
 438                 if (sel->nir->info.stage == MESA_SHADER_FRAGMENT) {
 439                         if (variable->data.location == FRAG_RESULT_DEPTH)
 440                                 variable->data.driver_location += 2;
 441                         else if (variable->data.location == FRAG_RESULT_STENCIL)
 442                                 variable->data.driver_location += 1;
 443                 }
 444         }
 445
 446         /* Perform lowerings (and optimizations) of code.
 447          *
 448          * Performance considerations aside, we must:
 449          * - lower certain ALU operations
 450          * - ensure constant offsets for texture instructions are folded
 451          *   and copy-propagated
 452          */
 453         NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
 454                    (nir_lower_io_options)0);
 455         NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
 456
 457         NIR_PASS_V(sel->nir, nir_lower_returns);
 458         NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
 459         NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);
 460         NIR_PASS_V(sel->nir, nir_lower_phis_to_scalar);
 461
 462         static const struct nir_lower_tex_options lower_tex_options = {
 463                 .lower_txp = ~0u,
 464         };
 465         NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options);
 466
 467         bool progress;
 468         do {
 469                 progress = false;
 470
 471                 /* (Constant) copy propagation is needed for txf with offsets. */
 472                 NIR_PASS(progress, sel->nir, nir_copy_prop);
 473                 NIR_PASS(progress, sel->nir, nir_opt_remove_phis);
 474                 NIR_PASS(progress, sel->nir, nir_opt_dce);
 475                 if (nir_opt_trivial_continues(sel->nir)) {
 476                         progress = true;
 477                         NIR_PASS(progress, sel->nir, nir_copy_prop);
 478                         NIR_PASS(progress, sel->nir, nir_opt_dce);
 479                 }
 480                 NIR_PASS(progress, sel->nir, nir_opt_if);
 481                 NIR_PASS(progress, sel->nir, nir_opt_dead_cf);
 482                 NIR_PASS(progress, sel->nir, nir_opt_cse);
 483                 NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8);
 484
 485                 /* Needed for algebraic lowering */
 486                 NIR_PASS(progress, sel->nir, nir_opt_algebraic);
 487                 NIR_PASS(progress, sel->nir, nir_opt_constant_folding);
 488
 489                 NIR_PASS(progress, sel->nir, nir_opt_undef);
 490                 NIR_PASS(progress, sel->nir, nir_opt_conditional_discard);
 491                 if (sel->nir->options->max_unroll_iterations) {
 492                         NIR_PASS(progress, sel->nir, nir_opt_loop_unroll, 0);
 493                 }
 494         } while (progress);
 495 }
 496
 497 static void declare_nir_input_vs(struct si_shader_context *ctx,
 498                                  struct nir_variable *variable,
 499                                  LLVMValueRef out[4])
 500 {
 501         si_llvm_load_input_vs(ctx, variable->data.driver_location / 4, out);
 502 }
 503
 504 static void declare_nir_input_fs(struct si_shader_context *ctx,
 505                                  struct nir_variable *variable,
 506                                  unsigned input_index,
 507                                  LLVMValueRef out[4])
 508 {
 509         unsigned slot = variable->data.location;
 510         if (slot == VARYING_SLOT_POS) {
 511                 out[0] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT);
 512                 out[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT);
 513                 out[2] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT);
 514                 out[3] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
 515                                 LLVMGetParam(ctx->main_fn, SI_PARAM_POS_W_FLOAT));
 516                 return;
 517         }
 518
 519         si_llvm_load_input_fs(ctx, input_index, out);
 520 }
 521
 522 LLVMValueRef si_nir_load_input_gs(struct ac_shader_abi *abi,
 523                                   unsigned location,
 524                                   unsigned driver_location,
 525                                   unsigned component,
 526                                   unsigned num_components,
 527                                   unsigned vertex_index,
 528                                   unsigned const_index,
 529                                   LLVMTypeRef type)
 530 {
 531         struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 532
 533         LLVMValueRef value[4];
 534         for (unsigned i = component; i < num_components + component; i++) {
 535                 value[i] = si_llvm_load_input_gs(&ctx->abi, driver_location  / 4,
 536                                                  vertex_index, type, i);
 537         }
 538
 539         return ac_build_varying_gather_values(&ctx->ac, value, num_components, component);
 540 }
 541
 542 static LLVMValueRef
 543 si_nir_load_sampler_desc(struct ac_shader_abi *abi,
 544                          unsigned descriptor_set, unsigned base_index,
 545                          unsigned constant_index, LLVMValueRef dynamic_index,
 546                          enum ac_descriptor_type desc_type, bool image,
 547                          bool write)
 548 {
 549         struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 550         LLVMBuilderRef builder = ctx->ac.builder;
 551         LLVMValueRef list = LLVMGetParam(ctx->main_fn, ctx->param_samplers_and_images);
 552         LLVMValueRef index = dynamic_index;
 553
 554         assert(!descriptor_set);
 555
 556         if (!index)
 557                 index = ctx->ac.i32_0;
 558
 559         index = LLVMBuildAdd(builder, index,
 560                              LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
 561                              "");
 562
 563         if (image) {
 564                 assert(desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
 565                 assert(base_index + constant_index < ctx->num_images);
 566
 567                 if (dynamic_index)
 568                         index = si_llvm_bound_index(ctx, index, ctx->num_images);
 569
 570                 index = LLVMBuildSub(ctx->gallivm.builder,
 571                                      LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
 572                                      index, "");
 573
 574                 /* TODO: be smarter about when we use dcc_off */
 575                 return si_load_image_desc(ctx, list, index, desc_type, write);
 576         }
 577
 578         assert(base_index + constant_index < ctx->num_samplers);
 579
 580         if (dynamic_index)
 581                 index = si_llvm_bound_index(ctx, index, ctx->num_samplers);
 582
 583         index = LLVMBuildAdd(ctx->gallivm.builder, index,
 584                              LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
 585
 586         return si_load_sampler_desc(ctx, list, index, desc_type);
 587 }
 588
 589 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
 590 {
 591         struct tgsi_shader_info *info = &ctx->shader->selector->info;
 592
 593         if (nir->info.stage == MESA_SHADER_VERTEX ||
 594             nir->info.stage == MESA_SHADER_FRAGMENT) {
 595                 uint64_t processed_inputs = 0;
 596                 nir_foreach_variable(variable, &nir->inputs) {
 597                         unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 598                                                                            nir->info.stage == MESA_SHADER_VERTEX);
 599                         unsigned input_idx = variable->data.driver_location;
 600
 601                         assert(attrib_count == 1);
 602
 603                         LLVMValueRef data[4];
 604                         unsigned loc = variable->data.location;
 605
 606                         /* Packed components share the same location so skip
 607                          * them if we have already processed the location.
 608                          */
 609                         if (processed_inputs & ((uint64_t)1 << loc))
 610                                 continue;
 611
 612                         if (nir->info.stage == MESA_SHADER_VERTEX)
 613                                 declare_nir_input_vs(ctx, variable, data);
 614                         else if (nir->info.stage == MESA_SHADER_FRAGMENT)
 615                                 declare_nir_input_fs(ctx, variable, input_idx / 4, data);
 616
 617                         for (unsigned chan = 0; chan < 4; chan++) {
 618                                 ctx->inputs[input_idx + chan] =
 619                                         LLVMBuildBitCast(ctx->ac.builder, data[chan], ctx->ac.i32, "");
 620                         }
 621                         processed_inputs |= ((uint64_t)1 << loc);
 622                 }
 623         }
 624
 625         ctx->abi.inputs = &ctx->inputs[0];
 626         ctx->abi.load_sampler_desc = si_nir_load_sampler_desc;
 627         ctx->abi.clamp_shadow_reference = true;
 628
 629         ctx->num_samplers = util_last_bit(info->samplers_declared);
 630         ctx->num_images = util_last_bit(info->images_declared);
 631
 632         ac_nir_translate(&ctx->ac, &ctx->abi, nir, NULL);
 633
 634         return true;
 635 }