2 * Copyright 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "si_shader.h"
25 #include "si_shader_internal.h"
27 #include "ac_nir_to_llvm.h"
29 #include "tgsi/tgsi_from_mesa.h"
31 #include "compiler/nir/nir.h"
32 #include "compiler/nir_types.h"
35 static void scan_instruction(struct tgsi_shader_info
*info
,
38 if (instr
->type
== nir_instr_type_alu
) {
39 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
44 case nir_op_fddx_fine
:
45 case nir_op_fddy_fine
:
46 case nir_op_fddx_coarse
:
47 case nir_op_fddy_coarse
:
48 info
->uses_derivatives
= true;
53 } else if (instr
->type
== nir_instr_type_tex
) {
54 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
60 info
->uses_derivatives
= true;
65 } else if (instr
->type
== nir_instr_type_intrinsic
) {
66 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
68 switch (intr
->intrinsic
) {
69 case nir_intrinsic_load_front_face
:
70 info
->uses_frontface
= 1;
72 case nir_intrinsic_load_instance_id
:
73 info
->uses_instanceid
= 1;
75 case nir_intrinsic_load_vertex_id
:
76 info
->uses_vertexid
= 1;
78 case nir_intrinsic_load_vertex_id_zero_base
:
79 info
->uses_vertexid_nobase
= 1;
81 case nir_intrinsic_load_base_vertex
:
82 info
->uses_basevertex
= 1;
84 case nir_intrinsic_load_primitive_id
:
85 info
->uses_primid
= 1;
87 case nir_intrinsic_image_store
:
88 case nir_intrinsic_image_atomic_add
:
89 case nir_intrinsic_image_atomic_min
:
90 case nir_intrinsic_image_atomic_max
:
91 case nir_intrinsic_image_atomic_and
:
92 case nir_intrinsic_image_atomic_or
:
93 case nir_intrinsic_image_atomic_xor
:
94 case nir_intrinsic_image_atomic_exchange
:
95 case nir_intrinsic_image_atomic_comp_swap
:
96 case nir_intrinsic_store_ssbo
:
97 case nir_intrinsic_ssbo_atomic_add
:
98 case nir_intrinsic_ssbo_atomic_imin
:
99 case nir_intrinsic_ssbo_atomic_umin
:
100 case nir_intrinsic_ssbo_atomic_imax
:
101 case nir_intrinsic_ssbo_atomic_umax
:
102 case nir_intrinsic_ssbo_atomic_and
:
103 case nir_intrinsic_ssbo_atomic_or
:
104 case nir_intrinsic_ssbo_atomic_xor
:
105 case nir_intrinsic_ssbo_atomic_exchange
:
106 case nir_intrinsic_ssbo_atomic_comp_swap
:
107 info
->writes_memory
= true;
115 void si_nir_scan_shader(const struct nir_shader
*nir
,
116 struct tgsi_shader_info
*info
)
121 assert(nir
->stage
== MESA_SHADER_VERTEX
||
122 nir
->stage
== MESA_SHADER_FRAGMENT
);
124 info
->processor
= pipe_shader_type_from_mesa(nir
->stage
);
125 info
->num_tokens
= 2; /* indicate that the shader is non-empty */
126 info
->num_instructions
= 2;
128 info
->num_inputs
= nir
->num_inputs
;
129 info
->num_outputs
= nir
->num_outputs
;
132 nir_foreach_variable(variable
, &nir
->inputs
) {
133 unsigned semantic_name
, semantic_index
;
134 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
135 nir
->stage
== MESA_SHADER_VERTEX
);
137 assert(attrib_count
== 1 && "not implemented");
139 /* Vertex shader inputs don't have semantics. The state
140 * tracker has already mapped them to attributes via
141 * variable->data.driver_location.
143 if (nir
->stage
== MESA_SHADER_VERTEX
)
146 /* Fragment shader position is a system value. */
147 if (nir
->stage
== MESA_SHADER_FRAGMENT
&&
148 variable
->data
.location
== VARYING_SLOT_POS
) {
149 if (variable
->data
.pixel_center_integer
)
150 info
->properties
[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
] =
151 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
;
155 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
156 &semantic_name
, &semantic_index
);
158 info
->input_semantic_name
[i
] = semantic_name
;
159 info
->input_semantic_index
[i
] = semantic_index
;
161 if (variable
->data
.sample
)
162 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_SAMPLE
;
163 else if (variable
->data
.centroid
)
164 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTROID
;
166 info
->input_interpolate_loc
[i
] = TGSI_INTERPOLATE_LOC_CENTER
;
168 enum glsl_base_type base_type
=
169 glsl_get_base_type(glsl_without_array(variable
->type
));
171 switch (variable
->data
.interpolation
) {
172 case INTERP_MODE_NONE
:
173 if (glsl_base_type_is_integer(base_type
)) {
174 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
178 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
179 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_COLOR
;
180 goto persp_locations
;
183 case INTERP_MODE_SMOOTH
:
184 assert(!glsl_base_type_is_integer(base_type
));
186 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_PERSPECTIVE
;
189 if (variable
->data
.sample
)
190 info
->uses_persp_sample
= true;
191 else if (variable
->data
.centroid
)
192 info
->uses_persp_centroid
= true;
194 info
->uses_persp_center
= true;
197 case INTERP_MODE_NOPERSPECTIVE
:
198 assert(!glsl_base_type_is_integer(base_type
));
200 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_LINEAR
;
202 if (variable
->data
.sample
)
203 info
->uses_linear_sample
= true;
204 else if (variable
->data
.centroid
)
205 info
->uses_linear_centroid
= true;
207 info
->uses_linear_center
= true;
210 case INTERP_MODE_FLAT
:
211 info
->input_interpolate
[i
] = TGSI_INTERPOLATE_CONSTANT
;
215 /* TODO make this more precise */
216 if (variable
->data
.location
== VARYING_SLOT_COL0
)
217 info
->colors_read
|= 0x0f;
218 else if (variable
->data
.location
== VARYING_SLOT_COL1
)
219 info
->colors_read
|= 0xf0;
225 nir_foreach_variable(variable
, &nir
->outputs
) {
226 unsigned semantic_name
, semantic_index
;
228 if (nir
->stage
== MESA_SHADER_FRAGMENT
) {
229 tgsi_get_gl_frag_result_semantic(variable
->data
.location
,
230 &semantic_name
, &semantic_index
);
232 tgsi_get_gl_varying_semantic(variable
->data
.location
, true,
233 &semantic_name
, &semantic_index
);
236 info
->output_semantic_name
[i
] = semantic_name
;
237 info
->output_semantic_index
[i
] = semantic_index
;
238 info
->output_usagemask
[i
] = TGSI_WRITEMASK_XYZW
;
240 switch (semantic_name
) {
241 case TGSI_SEMANTIC_PRIMID
:
242 info
->writes_primid
= true;
244 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
245 info
->writes_viewport_index
= true;
247 case TGSI_SEMANTIC_LAYER
:
248 info
->writes_layer
= true;
250 case TGSI_SEMANTIC_PSIZE
:
251 info
->writes_psize
= true;
253 case TGSI_SEMANTIC_CLIPVERTEX
:
254 info
->writes_clipvertex
= true;
256 case TGSI_SEMANTIC_COLOR
:
257 info
->colors_written
|= 1 << semantic_index
;
259 case TGSI_SEMANTIC_STENCIL
:
260 info
->writes_stencil
= true;
262 case TGSI_SEMANTIC_SAMPLEMASK
:
263 info
->writes_samplemask
= true;
265 case TGSI_SEMANTIC_EDGEFLAG
:
266 info
->writes_edgeflag
= true;
268 case TGSI_SEMANTIC_POSITION
:
269 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
270 info
->writes_z
= true;
272 info
->writes_position
= true;
279 nir_foreach_variable(variable
, &nir
->uniforms
) {
280 const struct glsl_type
*type
= variable
->type
;
281 enum glsl_base_type base_type
=
282 glsl_get_base_type(glsl_without_array(type
));
283 unsigned aoa_size
= MAX2(1, glsl_get_aoa_size(type
));
285 /* We rely on the fact that nir_lower_samplers_as_deref has
286 * eliminated struct dereferences.
288 if (base_type
== GLSL_TYPE_SAMPLER
)
289 info
->samplers_declared
|=
290 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
291 else if (base_type
== GLSL_TYPE_IMAGE
)
292 info
->images_declared
|=
293 u_bit_consecutive(variable
->data
.binding
, aoa_size
);
296 info
->num_written_clipdistance
= nir
->info
.clip_distance_array_size
;
297 info
->num_written_culldistance
= nir
->info
.cull_distance_array_size
;
298 info
->clipdist_writemask
= u_bit_consecutive(0, info
->num_written_clipdistance
);
299 info
->culldist_writemask
= u_bit_consecutive(info
->num_written_clipdistance
,
300 info
->num_written_culldistance
);
302 if (info
->processor
== PIPE_SHADER_FRAGMENT
)
303 info
->uses_kill
= nir
->info
.fs
.uses_discard
;
305 /* TODO make this more accurate */
306 info
->const_buffers_declared
= u_bit_consecutive(0, SI_NUM_CONST_BUFFERS
);
307 info
->shader_buffers_declared
= u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS
);
309 func
= (struct nir_function
*)exec_list_get_head_const(&nir
->functions
);
310 nir_foreach_block(block
, func
->impl
) {
311 nir_foreach_instr(instr
, block
)
312 scan_instruction(info
, instr
);
317 * Perform "lowering" operations on the NIR that are run once when the shader
318 * selector is created.
321 si_lower_nir(struct si_shader_selector
* sel
)
323 /* Adjust the driver location of inputs and outputs. The state tracker
324 * interprets them as slots, while the ac/nir backend interprets them
325 * as individual components.
327 nir_foreach_variable(variable
, &sel
->nir
->inputs
)
328 variable
->data
.driver_location
*= 4;
330 nir_foreach_variable(variable
, &sel
->nir
->outputs
) {
331 variable
->data
.driver_location
*= 4;
333 if (sel
->nir
->stage
== MESA_SHADER_FRAGMENT
) {
334 if (variable
->data
.location
== FRAG_RESULT_DEPTH
)
335 variable
->data
.driver_location
+= 2;
336 else if (variable
->data
.location
== FRAG_RESULT_STENCIL
)
337 variable
->data
.driver_location
+= 1;
342 static void declare_nir_input_vs(struct si_shader_context
*ctx
,
343 struct nir_variable
*variable
, unsigned rel
,
346 si_llvm_load_input_vs(ctx
, variable
->data
.driver_location
/ 4 + rel
, out
);
349 static void declare_nir_input_fs(struct si_shader_context
*ctx
,
350 struct nir_variable
*variable
, unsigned rel
,
351 unsigned *fs_attr_idx
,
354 unsigned slot
= variable
->data
.location
+ rel
;
356 assert(variable
->data
.location
>= VARYING_SLOT_VAR0
|| rel
== 0);
358 if (slot
== VARYING_SLOT_POS
) {
359 out
[0] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
);
360 out
[1] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
);
361 out
[2] = LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
);
362 out
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
363 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
));
367 si_llvm_load_input_fs(ctx
, *fs_attr_idx
, out
);
372 si_nir_load_sampler_desc(struct ac_shader_abi
*abi
,
373 unsigned descriptor_set
, unsigned base_index
,
374 unsigned constant_index
, LLVMValueRef dynamic_index
,
375 enum ac_descriptor_type desc_type
, bool image
,
378 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
379 LLVMBuilderRef builder
= ctx
->ac
.builder
;
380 LLVMValueRef list
= LLVMGetParam(ctx
->main_fn
, ctx
->param_samplers_and_images
);
381 LLVMValueRef index
= dynamic_index
;
383 assert(!descriptor_set
);
386 index
= ctx
->ac
.i32_0
;
388 index
= LLVMBuildAdd(builder
, index
,
389 LLVMConstInt(ctx
->ac
.i32
, base_index
+ constant_index
, false),
393 assert(desc_type
== AC_DESC_IMAGE
|| desc_type
== AC_DESC_BUFFER
);
394 assert(base_index
+ constant_index
< ctx
->num_images
);
397 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_images
);
399 index
= LLVMBuildSub(ctx
->gallivm
.builder
,
400 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
- 1, 0),
403 /* TODO: be smarter about when we use dcc_off */
404 return si_load_image_desc(ctx
, list
, index
, desc_type
, write
);
407 assert(base_index
+ constant_index
< ctx
->num_samplers
);
410 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_samplers
);
412 index
= LLVMBuildAdd(ctx
->gallivm
.builder
, index
,
413 LLVMConstInt(ctx
->i32
, SI_NUM_IMAGES
/ 2, 0), "");
415 return si_load_sampler_desc(ctx
, list
, index
, desc_type
);
418 bool si_nir_build_llvm(struct si_shader_context
*ctx
, struct nir_shader
*nir
)
420 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
422 unsigned fs_attr_idx
= 0;
423 nir_foreach_variable(variable
, &nir
->inputs
) {
424 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
,
425 nir
->stage
== MESA_SHADER_VERTEX
);
426 unsigned input_idx
= variable
->data
.driver_location
;
428 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
429 LLVMValueRef data
[4];
431 if (nir
->stage
== MESA_SHADER_VERTEX
)
432 declare_nir_input_vs(ctx
, variable
, i
, data
);
433 else if (nir
->stage
== MESA_SHADER_FRAGMENT
)
434 declare_nir_input_fs(ctx
, variable
, i
, &fs_attr_idx
, data
);
436 for (unsigned chan
= 0; chan
< 4; chan
++) {
437 ctx
->inputs
[input_idx
+ chan
] =
438 LLVMBuildBitCast(ctx
->ac
.builder
, data
[chan
], ctx
->ac
.i32
, "");
443 ctx
->abi
.inputs
= &ctx
->inputs
[0];
444 ctx
->abi
.load_sampler_desc
= si_nir_load_sampler_desc
;
446 ctx
->num_samplers
= util_last_bit(info
->samplers_declared
);
447 ctx
->num_images
= util_last_bit(info
->images_declared
);
449 ac_nir_translate(&ctx
->ac
, &ctx
->abi
, nir
, NULL
);