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1e2d75d4bd67ff21af0e43c8d2a1a889f19d435b
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_alu.c
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_shader_internal.h"
25 #include "gallivm/lp_bld_const.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_gather.h"
28 #include "tgsi/tgsi_parse.h"
29 #include "amd/common/ac_llvm_build.h"
30
31 static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
32 struct lp_build_emit_data *emit_data)
33 {
34 const struct tgsi_full_instruction *inst = emit_data->inst;
35 struct gallivm_state *gallivm = bld_base->base.gallivm;
36 LLVMBuilderRef builder = gallivm->builder;
37 unsigned i;
38 LLVMValueRef conds[TGSI_NUM_CHANNELS];
39
40 for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
41 LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
42 conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value,
43 bld_base->base.zero, "");
44 }
45
46 /* Or the conditions together */
47 for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
48 conds[i - 1] = LLVMBuildOr(builder, conds[i], conds[i - 1], "");
49 }
50
51 emit_data->dst_type = LLVMVoidTypeInContext(gallivm->context);
52 emit_data->arg_count = 1;
53 emit_data->args[0] = LLVMBuildSelect(builder, conds[0],
54 lp_build_const_float(gallivm, -1.0f),
55 bld_base->base.zero, "");
56 }
57
58 static void kil_emit(const struct lp_build_tgsi_action *action,
59 struct lp_build_tgsi_context *bld_base,
60 struct lp_build_emit_data *emit_data)
61 {
62 struct si_shader_context *ctx = si_shader_context(bld_base);
63
64 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF)
65 ac_build_kill(&ctx->ac, emit_data->args[0]);
66 else
67 ac_build_kill(&ctx->ac, NULL);
68 }
69
70 static void emit_icmp(const struct lp_build_tgsi_action *action,
71 struct lp_build_tgsi_context *bld_base,
72 struct lp_build_emit_data *emit_data)
73 {
74 unsigned pred;
75 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
76 LLVMContextRef context = bld_base->base.gallivm->context;
77
78 switch (emit_data->inst->Instruction.Opcode) {
79 case TGSI_OPCODE_USEQ:
80 case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break;
81 case TGSI_OPCODE_USNE:
82 case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break;
83 case TGSI_OPCODE_USGE:
84 case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break;
85 case TGSI_OPCODE_USLT:
86 case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break;
87 case TGSI_OPCODE_ISGE:
88 case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break;
89 case TGSI_OPCODE_ISLT:
90 case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break;
91 default:
92 assert(!"unknown instruction");
93 pred = 0;
94 break;
95 }
96
97 LLVMValueRef v = LLVMBuildICmp(builder, pred,
98 emit_data->args[0], emit_data->args[1],"");
99
100 v = LLVMBuildSExtOrBitCast(builder, v,
101 LLVMInt32TypeInContext(context), "");
102
103 emit_data->output[emit_data->chan] = v;
104 }
105
106 static void emit_ucmp(const struct lp_build_tgsi_action *action,
107 struct lp_build_tgsi_context *bld_base,
108 struct lp_build_emit_data *emit_data)
109 {
110 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
111
112 LLVMValueRef arg0 = LLVMBuildBitCast(builder, emit_data->args[0],
113 bld_base->uint_bld.elem_type, "");
114
115 LLVMValueRef v = LLVMBuildICmp(builder, LLVMIntNE, arg0,
116 bld_base->uint_bld.zero, "");
117
118 emit_data->output[emit_data->chan] =
119 LLVMBuildSelect(builder, v, emit_data->args[1], emit_data->args[2], "");
120 }
121
122 static void emit_cmp(const struct lp_build_tgsi_action *action,
123 struct lp_build_tgsi_context *bld_base,
124 struct lp_build_emit_data *emit_data)
125 {
126 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
127 LLVMValueRef cond, *args = emit_data->args;
128
129 cond = LLVMBuildFCmp(builder, LLVMRealOLT, args[0],
130 bld_base->base.zero, "");
131
132 emit_data->output[emit_data->chan] =
133 LLVMBuildSelect(builder, cond, args[1], args[2], "");
134 }
135
136 static void emit_set_cond(const struct lp_build_tgsi_action *action,
137 struct lp_build_tgsi_context *bld_base,
138 struct lp_build_emit_data *emit_data)
139 {
140 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
141 LLVMRealPredicate pred;
142 LLVMValueRef cond;
143
144 /* Use ordered for everything but NE (which is usual for
145 * float comparisons)
146 */
147 switch (emit_data->inst->Instruction.Opcode) {
148 case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break;
149 case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break;
150 case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break;
151 case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break;
152 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break;
153 case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break;
154 default: assert(!"unknown instruction"); pred = 0; break;
155 }
156
157 cond = LLVMBuildFCmp(builder,
158 pred, emit_data->args[0], emit_data->args[1], "");
159
160 emit_data->output[emit_data->chan] = LLVMBuildSelect(builder,
161 cond, bld_base->base.one, bld_base->base.zero, "");
162 }
163
164 static void emit_fcmp(const struct lp_build_tgsi_action *action,
165 struct lp_build_tgsi_context *bld_base,
166 struct lp_build_emit_data *emit_data)
167 {
168 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
169 LLVMContextRef context = bld_base->base.gallivm->context;
170 LLVMRealPredicate pred;
171
172 /* Use ordered for everything but NE (which is usual for
173 * float comparisons)
174 */
175 switch (emit_data->inst->Instruction.Opcode) {
176 case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break;
177 case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break;
178 case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break;
179 case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break;
180 default: assert(!"unknown instruction"); pred = 0; break;
181 }
182
183 LLVMValueRef v = LLVMBuildFCmp(builder, pred,
184 emit_data->args[0], emit_data->args[1],"");
185
186 v = LLVMBuildSExtOrBitCast(builder, v,
187 LLVMInt32TypeInContext(context), "");
188
189 emit_data->output[emit_data->chan] = v;
190 }
191
192 static void emit_dcmp(const struct lp_build_tgsi_action *action,
193 struct lp_build_tgsi_context *bld_base,
194 struct lp_build_emit_data *emit_data)
195 {
196 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
197 LLVMContextRef context = bld_base->base.gallivm->context;
198 LLVMRealPredicate pred;
199
200 /* Use ordered for everything but NE (which is usual for
201 * float comparisons)
202 */
203 switch (emit_data->inst->Instruction.Opcode) {
204 case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break;
205 case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break;
206 case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break;
207 case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break;
208 default: assert(!"unknown instruction"); pred = 0; break;
209 }
210
211 LLVMValueRef v = LLVMBuildFCmp(builder, pred,
212 emit_data->args[0], emit_data->args[1],"");
213
214 v = LLVMBuildSExtOrBitCast(builder, v,
215 LLVMInt32TypeInContext(context), "");
216
217 emit_data->output[emit_data->chan] = v;
218 }
219
220 static void emit_not(const struct lp_build_tgsi_action *action,
221 struct lp_build_tgsi_context *bld_base,
222 struct lp_build_emit_data *emit_data)
223 {
224 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
225 LLVMValueRef v = bitcast(bld_base, TGSI_TYPE_UNSIGNED,
226 emit_data->args[0]);
227 emit_data->output[emit_data->chan] = LLVMBuildNot(builder, v, "");
228 }
229
230 static void emit_arl(const struct lp_build_tgsi_action *action,
231 struct lp_build_tgsi_context *bld_base,
232 struct lp_build_emit_data *emit_data)
233 {
234 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
235 LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]);
236 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder,
237 floor_index, bld_base->base.int_elem_type , "");
238 }
239
240 static void emit_and(const struct lp_build_tgsi_action *action,
241 struct lp_build_tgsi_context *bld_base,
242 struct lp_build_emit_data *emit_data)
243 {
244 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
245 emit_data->output[emit_data->chan] = LLVMBuildAnd(builder,
246 emit_data->args[0], emit_data->args[1], "");
247 }
248
249 static void emit_or(const struct lp_build_tgsi_action *action,
250 struct lp_build_tgsi_context *bld_base,
251 struct lp_build_emit_data *emit_data)
252 {
253 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
254 emit_data->output[emit_data->chan] = LLVMBuildOr(builder,
255 emit_data->args[0], emit_data->args[1], "");
256 }
257
258 static void emit_uadd(const struct lp_build_tgsi_action *action,
259 struct lp_build_tgsi_context *bld_base,
260 struct lp_build_emit_data *emit_data)
261 {
262 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
263 emit_data->output[emit_data->chan] = LLVMBuildAdd(builder,
264 emit_data->args[0], emit_data->args[1], "");
265 }
266
267 static void emit_udiv(const struct lp_build_tgsi_action *action,
268 struct lp_build_tgsi_context *bld_base,
269 struct lp_build_emit_data *emit_data)
270 {
271 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
272 emit_data->output[emit_data->chan] = LLVMBuildUDiv(builder,
273 emit_data->args[0], emit_data->args[1], "");
274 }
275
276 static void emit_idiv(const struct lp_build_tgsi_action *action,
277 struct lp_build_tgsi_context *bld_base,
278 struct lp_build_emit_data *emit_data)
279 {
280 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
281 emit_data->output[emit_data->chan] = LLVMBuildSDiv(builder,
282 emit_data->args[0], emit_data->args[1], "");
283 }
284
285 static void emit_mod(const struct lp_build_tgsi_action *action,
286 struct lp_build_tgsi_context *bld_base,
287 struct lp_build_emit_data *emit_data)
288 {
289 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
290 emit_data->output[emit_data->chan] = LLVMBuildSRem(builder,
291 emit_data->args[0], emit_data->args[1], "");
292 }
293
294 static void emit_umod(const struct lp_build_tgsi_action *action,
295 struct lp_build_tgsi_context *bld_base,
296 struct lp_build_emit_data *emit_data)
297 {
298 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
299 emit_data->output[emit_data->chan] = LLVMBuildURem(builder,
300 emit_data->args[0], emit_data->args[1], "");
301 }
302
303 static void emit_shl(const struct lp_build_tgsi_action *action,
304 struct lp_build_tgsi_context *bld_base,
305 struct lp_build_emit_data *emit_data)
306 {
307 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
308 emit_data->output[emit_data->chan] = LLVMBuildShl(builder,
309 emit_data->args[0], emit_data->args[1], "");
310 }
311
312 static void emit_ushr(const struct lp_build_tgsi_action *action,
313 struct lp_build_tgsi_context *bld_base,
314 struct lp_build_emit_data *emit_data)
315 {
316 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
317 emit_data->output[emit_data->chan] = LLVMBuildLShr(builder,
318 emit_data->args[0], emit_data->args[1], "");
319 }
320 static void emit_ishr(const struct lp_build_tgsi_action *action,
321 struct lp_build_tgsi_context *bld_base,
322 struct lp_build_emit_data *emit_data)
323 {
324 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
325 emit_data->output[emit_data->chan] = LLVMBuildAShr(builder,
326 emit_data->args[0], emit_data->args[1], "");
327 }
328
329 static void emit_xor(const struct lp_build_tgsi_action *action,
330 struct lp_build_tgsi_context *bld_base,
331 struct lp_build_emit_data *emit_data)
332 {
333 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
334 emit_data->output[emit_data->chan] = LLVMBuildXor(builder,
335 emit_data->args[0], emit_data->args[1], "");
336 }
337
338 static void emit_ssg(const struct lp_build_tgsi_action *action,
339 struct lp_build_tgsi_context *bld_base,
340 struct lp_build_emit_data *emit_data)
341 {
342 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
343
344 LLVMValueRef cmp, val;
345
346 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) {
347 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int64_bld.zero, "");
348 val = LLVMBuildSelect(builder, cmp, bld_base->int64_bld.one, emit_data->args[0], "");
349 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, "");
350 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int64_bld.elem_type, -1, true), "");
351 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
352 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int_bld.zero, "");
353 val = LLVMBuildSelect(builder, cmp, bld_base->int_bld.one, emit_data->args[0], "");
354 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int_bld.zero, "");
355 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int_bld.elem_type, -1, true), "");
356 } else { // float SSG
357 cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->base.zero, "");
358 val = LLVMBuildSelect(builder, cmp, bld_base->base.one, emit_data->args[0], "");
359 cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->base.zero, "");
360 val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->base.elem_type, -1), "");
361 }
362
363 emit_data->output[emit_data->chan] = val;
364 }
365
366 static void emit_ineg(const struct lp_build_tgsi_action *action,
367 struct lp_build_tgsi_context *bld_base,
368 struct lp_build_emit_data *emit_data)
369 {
370 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
371 emit_data->output[emit_data->chan] = LLVMBuildNeg(builder,
372 emit_data->args[0], "");
373 }
374
375 static void emit_dneg(const struct lp_build_tgsi_action *action,
376 struct lp_build_tgsi_context *bld_base,
377 struct lp_build_emit_data *emit_data)
378 {
379 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
380 emit_data->output[emit_data->chan] = LLVMBuildFNeg(builder,
381 emit_data->args[0], "");
382 }
383
384 static void emit_frac(const struct lp_build_tgsi_action *action,
385 struct lp_build_tgsi_context *bld_base,
386 struct lp_build_emit_data *emit_data)
387 {
388 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
389 char *intr;
390
391 if (emit_data->info->opcode == TGSI_OPCODE_FRC)
392 intr = "llvm.floor.f32";
393 else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC)
394 intr = "llvm.floor.f64";
395 else {
396 assert(0);
397 return;
398 }
399
400 LLVMValueRef floor = lp_build_intrinsic(builder, intr, emit_data->dst_type,
401 &emit_data->args[0], 1,
402 LP_FUNC_ATTR_READNONE);
403 emit_data->output[emit_data->chan] = LLVMBuildFSub(builder,
404 emit_data->args[0], floor, "");
405 }
406
407 static void emit_f2i(const struct lp_build_tgsi_action *action,
408 struct lp_build_tgsi_context *bld_base,
409 struct lp_build_emit_data *emit_data)
410 {
411 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
412 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder,
413 emit_data->args[0], bld_base->int_bld.elem_type, "");
414 }
415
416 static void emit_f2u(const struct lp_build_tgsi_action *action,
417 struct lp_build_tgsi_context *bld_base,
418 struct lp_build_emit_data *emit_data)
419 {
420 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
421 emit_data->output[emit_data->chan] = LLVMBuildFPToUI(builder,
422 emit_data->args[0], bld_base->uint_bld.elem_type, "");
423 }
424
425 static void emit_i2f(const struct lp_build_tgsi_action *action,
426 struct lp_build_tgsi_context *bld_base,
427 struct lp_build_emit_data *emit_data)
428 {
429 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
430 emit_data->output[emit_data->chan] = LLVMBuildSIToFP(builder,
431 emit_data->args[0], bld_base->base.elem_type, "");
432 }
433
434 static void emit_u2f(const struct lp_build_tgsi_action *action,
435 struct lp_build_tgsi_context *bld_base,
436 struct lp_build_emit_data *emit_data)
437 {
438 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
439 emit_data->output[emit_data->chan] = LLVMBuildUIToFP(builder,
440 emit_data->args[0], bld_base->base.elem_type, "");
441 }
442
443 static void
444 build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
445 struct lp_build_tgsi_context *bld_base,
446 struct lp_build_emit_data *emit_data)
447 {
448 struct lp_build_context *base = &bld_base->base;
449 emit_data->output[emit_data->chan] =
450 lp_build_intrinsic(base->gallivm->builder, action->intr_name,
451 emit_data->dst_type, emit_data->args,
452 emit_data->arg_count, LP_FUNC_ATTR_READNONE);
453 }
454
455 static void emit_bfi(const struct lp_build_tgsi_action *action,
456 struct lp_build_tgsi_context *bld_base,
457 struct lp_build_emit_data *emit_data)
458 {
459 struct gallivm_state *gallivm = bld_base->base.gallivm;
460 LLVMBuilderRef builder = gallivm->builder;
461 LLVMValueRef bfi_args[3];
462 LLVMValueRef bfi_sm5;
463 LLVMValueRef cond;
464
465 // Calculate the bitmask: (((1 << src3) - 1) << src2
466 bfi_args[0] = LLVMBuildShl(builder,
467 LLVMBuildSub(builder,
468 LLVMBuildShl(builder,
469 bld_base->int_bld.one,
470 emit_data->args[3], ""),
471 bld_base->int_bld.one, ""),
472 emit_data->args[2], "");
473
474 bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
475 emit_data->args[2], "");
476
477 bfi_args[2] = emit_data->args[0];
478
479 /* Calculate:
480 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
481 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
482 */
483 bfi_sm5 =
484 LLVMBuildXor(builder, bfi_args[2],
485 LLVMBuildAnd(builder, bfi_args[0],
486 LLVMBuildXor(builder, bfi_args[1], bfi_args[2],
487 ""), ""), "");
488
489 /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend
490 * uses the convenient V_BFI lowering for the above, which follows SM5
491 * and disagrees with GLSL semantics when bits (src3) is 32.
492 */
493 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
494 lp_build_const_int32(gallivm, 32), "");
495 emit_data->output[emit_data->chan] =
496 LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
497 }
498
499 static void emit_bfe(const struct lp_build_tgsi_action *action,
500 struct lp_build_tgsi_context *bld_base,
501 struct lp_build_emit_data *emit_data)
502 {
503 struct si_shader_context *ctx = si_shader_context(bld_base);
504 struct gallivm_state *gallivm = &ctx->gallivm;
505 LLVMBuilderRef builder = gallivm->builder;
506 LLVMValueRef bfe_sm5;
507 LLVMValueRef cond;
508
509 bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
510 emit_data->args[1], emit_data->args[2],
511 emit_data->info->opcode == TGSI_OPCODE_IBFE);
512
513 /* Correct for GLSL semantics. */
514 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2],
515 LLVMConstInt(ctx->i32, 32, 0), "");
516 emit_data->output[emit_data->chan] =
517 LLVMBuildSelect(builder, cond, emit_data->args[0], bfe_sm5, "");
518 }
519
520 /* this is ffs in C */
521 static void emit_lsb(const struct lp_build_tgsi_action *action,
522 struct lp_build_tgsi_context *bld_base,
523 struct lp_build_emit_data *emit_data)
524 {
525 struct gallivm_state *gallivm = bld_base->base.gallivm;
526 LLVMBuilderRef builder = gallivm->builder;
527 LLVMValueRef args[2] = {
528 emit_data->args[0],
529
530 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
531 * add special code to check for x=0. The reason is that
532 * the LLVM behavior for x=0 is different from what we
533 * need here. However, LLVM also assumes that ffs(x) is
534 * in [0, 31], but GLSL expects that ffs(0) = -1, so
535 * a conditional assignment to handle 0 is still required.
536 */
537 LLVMConstInt(LLVMInt1TypeInContext(gallivm->context), 1, 0)
538 };
539
540 LLVMValueRef lsb =
541 lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32",
542 emit_data->dst_type, args, ARRAY_SIZE(args),
543 LP_FUNC_ATTR_READNONE);
544
545 /* TODO: We need an intrinsic to skip this conditional. */
546 /* Check for zero: */
547 emit_data->output[emit_data->chan] =
548 LLVMBuildSelect(builder,
549 LLVMBuildICmp(builder, LLVMIntEQ, args[0],
550 bld_base->uint_bld.zero, ""),
551 lp_build_const_int32(gallivm, -1), lsb, "");
552 }
553
554 /* Find the last bit set. */
555 static void emit_umsb(const struct lp_build_tgsi_action *action,
556 struct lp_build_tgsi_context *bld_base,
557 struct lp_build_emit_data *emit_data)
558 {
559 struct si_shader_context *ctx = si_shader_context(bld_base);
560
561 emit_data->output[emit_data->chan] =
562 ac_build_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
563 }
564
565 /* Find the last bit opposite of the sign bit. */
566 static void emit_imsb(const struct lp_build_tgsi_action *action,
567 struct lp_build_tgsi_context *bld_base,
568 struct lp_build_emit_data *emit_data)
569 {
570 struct si_shader_context *ctx = si_shader_context(bld_base);
571 emit_data->output[emit_data->chan] =
572 ac_build_imsb(&ctx->ac, emit_data->args[0],
573 emit_data->dst_type);
574 }
575
576 static void emit_iabs(const struct lp_build_tgsi_action *action,
577 struct lp_build_tgsi_context *bld_base,
578 struct lp_build_emit_data *emit_data)
579 {
580 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
581
582 emit_data->output[emit_data->chan] =
583 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX,
584 emit_data->args[0],
585 LLVMBuildNeg(builder,
586 emit_data->args[0], ""));
587 }
588
589 static void emit_minmax_int(const struct lp_build_tgsi_action *action,
590 struct lp_build_tgsi_context *bld_base,
591 struct lp_build_emit_data *emit_data)
592 {
593 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
594 LLVMIntPredicate op;
595
596 switch (emit_data->info->opcode) {
597 default:
598 assert(0);
599 case TGSI_OPCODE_IMAX:
600 case TGSI_OPCODE_I64MAX:
601 op = LLVMIntSGT;
602 break;
603 case TGSI_OPCODE_IMIN:
604 case TGSI_OPCODE_I64MIN:
605 op = LLVMIntSLT;
606 break;
607 case TGSI_OPCODE_UMAX:
608 case TGSI_OPCODE_U64MAX:
609 op = LLVMIntUGT;
610 break;
611 case TGSI_OPCODE_UMIN:
612 case TGSI_OPCODE_U64MIN:
613 op = LLVMIntULT;
614 break;
615 }
616
617 emit_data->output[emit_data->chan] =
618 LLVMBuildSelect(builder,
619 LLVMBuildICmp(builder, op, emit_data->args[0],
620 emit_data->args[1], ""),
621 emit_data->args[0],
622 emit_data->args[1], "");
623 }
624
625 static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base,
626 struct lp_build_emit_data *emit_data)
627 {
628 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
629 0, TGSI_CHAN_X);
630 emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
631 0, TGSI_CHAN_Y);
632 }
633
634 static void emit_pk2h(const struct lp_build_tgsi_action *action,
635 struct lp_build_tgsi_context *bld_base,
636 struct lp_build_emit_data *emit_data)
637 {
638 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
639 LLVMContextRef context = bld_base->base.gallivm->context;
640 struct lp_build_context *uint_bld = &bld_base->uint_bld;
641 LLVMTypeRef fp16, i16;
642 LLVMValueRef const16, comp[2];
643 unsigned i;
644
645 fp16 = LLVMHalfTypeInContext(context);
646 i16 = LLVMInt16TypeInContext(context);
647 const16 = lp_build_const_int32(uint_bld->gallivm, 16);
648
649 for (i = 0; i < 2; i++) {
650 comp[i] = LLVMBuildFPTrunc(builder, emit_data->args[i], fp16, "");
651 comp[i] = LLVMBuildBitCast(builder, comp[i], i16, "");
652 comp[i] = LLVMBuildZExt(builder, comp[i], uint_bld->elem_type, "");
653 }
654
655 comp[1] = LLVMBuildShl(builder, comp[1], const16, "");
656 comp[0] = LLVMBuildOr(builder, comp[0], comp[1], "");
657
658 emit_data->output[emit_data->chan] = comp[0];
659 }
660
661 static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base,
662 struct lp_build_emit_data *emit_data)
663 {
664 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
665 0, TGSI_CHAN_X);
666 }
667
668 static void emit_up2h(const struct lp_build_tgsi_action *action,
669 struct lp_build_tgsi_context *bld_base,
670 struct lp_build_emit_data *emit_data)
671 {
672 LLVMBuilderRef builder = bld_base->base.gallivm->builder;
673 LLVMContextRef context = bld_base->base.gallivm->context;
674 struct lp_build_context *uint_bld = &bld_base->uint_bld;
675 LLVMTypeRef fp16, i16;
676 LLVMValueRef const16, input, val;
677 unsigned i;
678
679 fp16 = LLVMHalfTypeInContext(context);
680 i16 = LLVMInt16TypeInContext(context);
681 const16 = lp_build_const_int32(uint_bld->gallivm, 16);
682 input = emit_data->args[0];
683
684 for (i = 0; i < 2; i++) {
685 val = i == 1 ? LLVMBuildLShr(builder, input, const16, "") : input;
686 val = LLVMBuildTrunc(builder, val, i16, "");
687 val = LLVMBuildBitCast(builder, val, fp16, "");
688 emit_data->output[i] =
689 LLVMBuildFPExt(builder, val, bld_base->base.elem_type, "");
690 }
691 }
692
693 static void emit_fdiv(const struct lp_build_tgsi_action *action,
694 struct lp_build_tgsi_context *bld_base,
695 struct lp_build_emit_data *emit_data)
696 {
697 struct si_shader_context *ctx = si_shader_context(bld_base);
698
699 emit_data->output[emit_data->chan] =
700 LLVMBuildFDiv(ctx->gallivm.builder,
701 emit_data->args[0], emit_data->args[1], "");
702
703 /* Use v_rcp_f32 instead of precise division. */
704 if (HAVE_LLVM >= 0x0309 &&
705 !LLVMIsConstant(emit_data->output[emit_data->chan]))
706 LLVMSetMetadata(emit_data->output[emit_data->chan],
707 ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
708 }
709
710 /* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
711 * the target machine. f64 needs global unsafe math flags to get rsq. */
712 static void emit_rsq(const struct lp_build_tgsi_action *action,
713 struct lp_build_tgsi_context *bld_base,
714 struct lp_build_emit_data *emit_data)
715 {
716 LLVMValueRef sqrt =
717 lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT,
718 emit_data->args[0]);
719
720 emit_data->output[emit_data->chan] =
721 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV,
722 bld_base->base.one, sqrt);
723 }
724
725 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
726 {
727 lp_set_default_actions(bld_base);
728
729 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
730 bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
731 bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
732 bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
733 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
734 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
735 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
736 bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
737 bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem;
738 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32";
739 bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem;
740 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64";
741 bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem;
742 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64";
743 bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac;
744 bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv;
745 bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg;
746 bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp;
747 bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
748 bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
749 bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
750 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem;
751 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name =
752 HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.rsq.f64" : "llvm.AMDGPU.rsq.f64";
753 bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
754 bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
755 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
756 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
757 bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
758 bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
759 bld_base->op_actions[TGSI_OPCODE_FMA].emit =
760 bld_base->op_actions[TGSI_OPCODE_MAD].emit;
761 bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
762 bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i;
763 bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u;
764 bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp;
765 bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp;
766 bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp;
767 bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
768 bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
769 bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
770 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
771 bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
772 bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
773 bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
774 bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
775 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
776 bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
777 bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
778 bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
779 bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
780 bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
781 bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
782 bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
783 bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
784 bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
785 bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
786 bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
787 bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
788 bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
789 bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
790 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
791 bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
792 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
793 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
794 bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args;
795 bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
796 bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem;
797 bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
798 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
799 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
800 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem;
801 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
802 bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
803 bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
804 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
805 bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl;
806 bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond;
807 bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond;
808 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond;
809 bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond;
810 bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
811 bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
812 bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
813 bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
814 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
815 bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem;
816 bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
817 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
818 bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
819 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
820 bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
821 bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
822 bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
823 bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
824 bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
825 bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
826 bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
827 bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
828 bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
829 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
830 bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
831 bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args;
832 bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
833
834 bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
835 bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
836 bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
837 bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
838 bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
839 bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
840 bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
841
842 bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp;
843 bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
844 bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
845 bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
846 bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
847 bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
848
849 bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
850 bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
851 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
852 bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
853
854 bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
855 bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
856 bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
857 bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
858 }