projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
radeonsi: make use of ac_build_fdiv()
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_alu.c
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_shader_internal.h"
25 #include "gallivm/lp_bld_const.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_gather.h"
28 #include "tgsi/tgsi_parse.h"
29 #include "amd/common/ac_llvm_build.h"
30
31 static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
32 struct lp_build_emit_data *emit_data)
33 {
34 const struct tgsi_full_instruction *inst = emit_data->inst;
35 struct si_shader_context *ctx = si_shader_context(bld_base);
36 LLVMBuilderRef builder = ctx->ac.builder;
37 unsigned i;
38 LLVMValueRef conds[TGSI_NUM_CHANNELS];
39
40 for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
41 LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
42 conds[i] = LLVMBuildFCmp(builder, LLVMRealOGE, value,
43 ctx->ac.f32_0, "");
44 }
45
46 /* And the conditions together */
47 for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
48 conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1], "");
49 }
50
51 emit_data->dst_type = ctx->voidt;
52 emit_data->arg_count = 1;
53 emit_data->args[0] = conds[0];
54 }
55
56 static void kil_emit(const struct lp_build_tgsi_action *action,
57 struct lp_build_tgsi_context *bld_base,
58 struct lp_build_emit_data *emit_data)
59 {
60 struct si_shader_context *ctx = si_shader_context(bld_base);
61 LLVMBuilderRef builder = ctx->ac.builder;
62 LLVMValueRef visible;
63
64 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
65 visible = emit_data->args[0];
66 } else {
67 assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
68 visible = LLVMConstInt(ctx->i1, false, 0);
69 }
70
71 if (ctx->shader->selector->force_correct_derivs_after_kill) {
72 /* LLVM 6.0 can kill immediately while maintaining WQM. */
73 if (HAVE_LLVM >= 0x0600) {
74 ac_build_kill_if_false(&ctx->ac,
75 ac_build_wqm_vote(&ctx->ac, visible));
76 }
77
78 LLVMValueRef mask = LLVMBuildLoad(builder, ctx->postponed_kill, "");
79 mask = LLVMBuildAnd(builder, mask, visible, "");
80 LLVMBuildStore(builder, mask, ctx->postponed_kill);
81 return;
82 }
83
84 ac_build_kill_if_false(&ctx->ac, visible);
85 }
86
87 static void emit_icmp(const struct lp_build_tgsi_action *action,
88 struct lp_build_tgsi_context *bld_base,
89 struct lp_build_emit_data *emit_data)
90 {
91 unsigned pred;
92 struct si_shader_context *ctx = si_shader_context(bld_base);
93
94 switch (emit_data->inst->Instruction.Opcode) {
95 case TGSI_OPCODE_USEQ:
96 case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break;
97 case TGSI_OPCODE_USNE:
98 case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break;
99 case TGSI_OPCODE_USGE:
100 case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break;
101 case TGSI_OPCODE_USLT:
102 case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break;
103 case TGSI_OPCODE_ISGE:
104 case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break;
105 case TGSI_OPCODE_ISLT:
106 case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break;
107 default:
108 assert(!"unknown instruction");
109 pred = 0;
110 break;
111 }
112
113 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, pred,
114 emit_data->args[0], emit_data->args[1],"");
115
116 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
117
118 emit_data->output[emit_data->chan] = v;
119 }
120
121 static void emit_ucmp(const struct lp_build_tgsi_action *action,
122 struct lp_build_tgsi_context *bld_base,
123 struct lp_build_emit_data *emit_data)
124 {
125 struct si_shader_context *ctx = si_shader_context(bld_base);
126 LLVMValueRef arg0 = ac_to_integer(&ctx->ac, emit_data->args[0]);
127
128 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, arg0,
129 ctx->i32_0, "");
130
131 emit_data->output[emit_data->chan] =
132 LLVMBuildSelect(ctx->ac.builder, v, emit_data->args[1], emit_data->args[2], "");
133 }
134
135 static void emit_cmp(const struct lp_build_tgsi_action *action,
136 struct lp_build_tgsi_context *bld_base,
137 struct lp_build_emit_data *emit_data)
138 {
139 struct si_shader_context *ctx = si_shader_context(bld_base);
140 LLVMValueRef cond, *args = emit_data->args;
141
142 cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealOLT, args[0],
143 ctx->ac.f32_0, "");
144
145 emit_data->output[emit_data->chan] =
146 LLVMBuildSelect(ctx->ac.builder, cond, args[1], args[2], "");
147 }
148
149 static void emit_set_cond(const struct lp_build_tgsi_action *action,
150 struct lp_build_tgsi_context *bld_base,
151 struct lp_build_emit_data *emit_data)
152 {
153 struct si_shader_context *ctx = si_shader_context(bld_base);
154 LLVMRealPredicate pred;
155 LLVMValueRef cond;
156
157 /* Use ordered for everything but NE (which is usual for
158 * float comparisons)
159 */
160 switch (emit_data->inst->Instruction.Opcode) {
161 case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break;
162 case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break;
163 case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break;
164 case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break;
165 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break;
166 case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break;
167 default: assert(!"unknown instruction"); pred = 0; break;
168 }
169
170 cond = LLVMBuildFCmp(ctx->ac.builder,
171 pred, emit_data->args[0], emit_data->args[1], "");
172
173 emit_data->output[emit_data->chan] = LLVMBuildSelect(ctx->ac.builder,
174 cond, ctx->ac.f32_1, ctx->ac.f32_0, "");
175 }
176
177 static void emit_fcmp(const struct lp_build_tgsi_action *action,
178 struct lp_build_tgsi_context *bld_base,
179 struct lp_build_emit_data *emit_data)
180 {
181 struct si_shader_context *ctx = si_shader_context(bld_base);
182 LLVMRealPredicate pred;
183
184 /* Use ordered for everything but NE (which is usual for
185 * float comparisons)
186 */
187 switch (emit_data->inst->Instruction.Opcode) {
188 case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break;
189 case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break;
190 case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break;
191 case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break;
192 default: assert(!"unknown instruction"); pred = 0; break;
193 }
194
195 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
196 emit_data->args[0], emit_data->args[1],"");
197
198 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
199
200 emit_data->output[emit_data->chan] = v;
201 }
202
203 static void emit_dcmp(const struct lp_build_tgsi_action *action,
204 struct lp_build_tgsi_context *bld_base,
205 struct lp_build_emit_data *emit_data)
206 {
207 struct si_shader_context *ctx = si_shader_context(bld_base);
208 LLVMRealPredicate pred;
209
210 /* Use ordered for everything but NE (which is usual for
211 * float comparisons)
212 */
213 switch (emit_data->inst->Instruction.Opcode) {
214 case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break;
215 case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break;
216 case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break;
217 case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break;
218 default: assert(!"unknown instruction"); pred = 0; break;
219 }
220
221 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
222 emit_data->args[0], emit_data->args[1],"");
223
224 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
225
226 emit_data->output[emit_data->chan] = v;
227 }
228
229 static void emit_not(const struct lp_build_tgsi_action *action,
230 struct lp_build_tgsi_context *bld_base,
231 struct lp_build_emit_data *emit_data)
232 {
233 struct si_shader_context *ctx = si_shader_context(bld_base);
234 LLVMValueRef v = ac_to_integer(&ctx->ac, emit_data->args[0]);
235 emit_data->output[emit_data->chan] = LLVMBuildNot(ctx->ac.builder, v, "");
236 }
237
238 static void emit_arl(const struct lp_build_tgsi_action *action,
239 struct lp_build_tgsi_context *bld_base,
240 struct lp_build_emit_data *emit_data)
241 {
242 struct si_shader_context *ctx = si_shader_context(bld_base);
243 LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]);
244 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
245 floor_index, ctx->i32, "");
246 }
247
248 static void emit_and(const struct lp_build_tgsi_action *action,
249 struct lp_build_tgsi_context *bld_base,
250 struct lp_build_emit_data *emit_data)
251 {
252 struct si_shader_context *ctx = si_shader_context(bld_base);
253 emit_data->output[emit_data->chan] = LLVMBuildAnd(ctx->ac.builder,
254 emit_data->args[0], emit_data->args[1], "");
255 }
256
257 static void emit_or(const struct lp_build_tgsi_action *action,
258 struct lp_build_tgsi_context *bld_base,
259 struct lp_build_emit_data *emit_data)
260 {
261 struct si_shader_context *ctx = si_shader_context(bld_base);
262 emit_data->output[emit_data->chan] = LLVMBuildOr(ctx->ac.builder,
263 emit_data->args[0], emit_data->args[1], "");
264 }
265
266 static void emit_uadd(const struct lp_build_tgsi_action *action,
267 struct lp_build_tgsi_context *bld_base,
268 struct lp_build_emit_data *emit_data)
269 {
270 struct si_shader_context *ctx = si_shader_context(bld_base);
271 emit_data->output[emit_data->chan] = LLVMBuildAdd(ctx->ac.builder,
272 emit_data->args[0], emit_data->args[1], "");
273 }
274
275 static void emit_udiv(const struct lp_build_tgsi_action *action,
276 struct lp_build_tgsi_context *bld_base,
277 struct lp_build_emit_data *emit_data)
278 {
279 struct si_shader_context *ctx = si_shader_context(bld_base);
280 emit_data->output[emit_data->chan] = LLVMBuildUDiv(ctx->ac.builder,
281 emit_data->args[0], emit_data->args[1], "");
282 }
283
284 static void emit_idiv(const struct lp_build_tgsi_action *action,
285 struct lp_build_tgsi_context *bld_base,
286 struct lp_build_emit_data *emit_data)
287 {
288 struct si_shader_context *ctx = si_shader_context(bld_base);
289 emit_data->output[emit_data->chan] = LLVMBuildSDiv(ctx->ac.builder,
290 emit_data->args[0], emit_data->args[1], "");
291 }
292
293 static void emit_mod(const struct lp_build_tgsi_action *action,
294 struct lp_build_tgsi_context *bld_base,
295 struct lp_build_emit_data *emit_data)
296 {
297 struct si_shader_context *ctx = si_shader_context(bld_base);
298 emit_data->output[emit_data->chan] = LLVMBuildSRem(ctx->ac.builder,
299 emit_data->args[0], emit_data->args[1], "");
300 }
301
302 static void emit_umod(const struct lp_build_tgsi_action *action,
303 struct lp_build_tgsi_context *bld_base,
304 struct lp_build_emit_data *emit_data)
305 {
306 struct si_shader_context *ctx = si_shader_context(bld_base);
307 emit_data->output[emit_data->chan] = LLVMBuildURem(ctx->ac.builder,
308 emit_data->args[0], emit_data->args[1], "");
309 }
310
311 static void emit_shl(const struct lp_build_tgsi_action *action,
312 struct lp_build_tgsi_context *bld_base,
313 struct lp_build_emit_data *emit_data)
314 {
315 struct si_shader_context *ctx = si_shader_context(bld_base);
316 emit_data->output[emit_data->chan] = LLVMBuildShl(ctx->ac.builder,
317 emit_data->args[0], emit_data->args[1], "");
318 }
319
320 static void emit_ushr(const struct lp_build_tgsi_action *action,
321 struct lp_build_tgsi_context *bld_base,
322 struct lp_build_emit_data *emit_data)
323 {
324 struct si_shader_context *ctx = si_shader_context(bld_base);
325 emit_data->output[emit_data->chan] = LLVMBuildLShr(ctx->ac.builder,
326 emit_data->args[0], emit_data->args[1], "");
327 }
328 static void emit_ishr(const struct lp_build_tgsi_action *action,
329 struct lp_build_tgsi_context *bld_base,
330 struct lp_build_emit_data *emit_data)
331 {
332 struct si_shader_context *ctx = si_shader_context(bld_base);
333 emit_data->output[emit_data->chan] = LLVMBuildAShr(ctx->ac.builder,
334 emit_data->args[0], emit_data->args[1], "");
335 }
336
337 static void emit_xor(const struct lp_build_tgsi_action *action,
338 struct lp_build_tgsi_context *bld_base,
339 struct lp_build_emit_data *emit_data)
340 {
341 struct si_shader_context *ctx = si_shader_context(bld_base);
342 emit_data->output[emit_data->chan] = LLVMBuildXor(ctx->ac.builder,
343 emit_data->args[0], emit_data->args[1], "");
344 }
345
346 static void emit_ssg(const struct lp_build_tgsi_action *action,
347 struct lp_build_tgsi_context *bld_base,
348 struct lp_build_emit_data *emit_data)
349 {
350 struct si_shader_context *ctx = si_shader_context(bld_base);
351 LLVMBuilderRef builder = ctx->ac.builder;
352
353 LLVMValueRef cmp, val;
354
355 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) {
356 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int64_bld.zero, "");
357 val = LLVMBuildSelect(builder, cmp, bld_base->int64_bld.one, emit_data->args[0], "");
358 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, "");
359 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i64, -1, true), "");
360 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
361 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], ctx->i32_0, "");
362 val = LLVMBuildSelect(builder, cmp, ctx->i32_1, emit_data->args[0], "");
363 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, ctx->i32_0, "");
364 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
365 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) {
366 cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->dbl_bld.zero, "");
367 val = LLVMBuildSelect(builder, cmp, bld_base->dbl_bld.one, emit_data->args[0], "");
368 cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->dbl_bld.zero, "");
369 val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->dbl_bld.elem_type, -1), "");
370 } else { // float SSG
371 cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], ctx->ac.f32_0, "");
372 val = LLVMBuildSelect(builder, cmp, ctx->ac.f32_1, emit_data->args[0], "");
373 cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, ctx->ac.f32_0, "");
374 val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(ctx->f32, -1), "");
375 }
376
377 emit_data->output[emit_data->chan] = val;
378 }
379
380 static void emit_ineg(const struct lp_build_tgsi_action *action,
381 struct lp_build_tgsi_context *bld_base,
382 struct lp_build_emit_data *emit_data)
383 {
384 struct si_shader_context *ctx = si_shader_context(bld_base);
385 emit_data->output[emit_data->chan] = LLVMBuildNeg(ctx->ac.builder,
386 emit_data->args[0], "");
387 }
388
389 static void emit_dneg(const struct lp_build_tgsi_action *action,
390 struct lp_build_tgsi_context *bld_base,
391 struct lp_build_emit_data *emit_data)
392 {
393 struct si_shader_context *ctx = si_shader_context(bld_base);
394 emit_data->output[emit_data->chan] = LLVMBuildFNeg(ctx->ac.builder,
395 emit_data->args[0], "");
396 }
397
398 static void emit_frac(const struct lp_build_tgsi_action *action,
399 struct lp_build_tgsi_context *bld_base,
400 struct lp_build_emit_data *emit_data)
401 {
402 struct si_shader_context *ctx = si_shader_context(bld_base);
403 char *intr;
404
405 if (emit_data->info->opcode == TGSI_OPCODE_FRC)
406 intr = "llvm.floor.f32";
407 else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC)
408 intr = "llvm.floor.f64";
409 else {
410 assert(0);
411 return;
412 }
413
414 LLVMValueRef floor = lp_build_intrinsic(ctx->ac.builder, intr, emit_data->dst_type,
415 &emit_data->args[0], 1,
416 LP_FUNC_ATTR_READNONE);
417 emit_data->output[emit_data->chan] = LLVMBuildFSub(ctx->ac.builder,
418 emit_data->args[0], floor, "");
419 }
420
421 static void emit_f2i(const struct lp_build_tgsi_action *action,
422 struct lp_build_tgsi_context *bld_base,
423 struct lp_build_emit_data *emit_data)
424 {
425 struct si_shader_context *ctx = si_shader_context(bld_base);
426 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
427 emit_data->args[0], ctx->i32, "");
428 }
429
430 static void emit_f2u(const struct lp_build_tgsi_action *action,
431 struct lp_build_tgsi_context *bld_base,
432 struct lp_build_emit_data *emit_data)
433 {
434 struct si_shader_context *ctx = si_shader_context(bld_base);
435 emit_data->output[emit_data->chan] = LLVMBuildFPToUI(ctx->ac.builder,
436 emit_data->args[0], ctx->i32, "");
437 }
438
439 static void emit_i2f(const struct lp_build_tgsi_action *action,
440 struct lp_build_tgsi_context *bld_base,
441 struct lp_build_emit_data *emit_data)
442 {
443 struct si_shader_context *ctx = si_shader_context(bld_base);
444 emit_data->output[emit_data->chan] = LLVMBuildSIToFP(ctx->ac.builder,
445 emit_data->args[0], ctx->f32, "");
446 }
447
448 static void emit_u2f(const struct lp_build_tgsi_action *action,
449 struct lp_build_tgsi_context *bld_base,
450 struct lp_build_emit_data *emit_data)
451 {
452 struct si_shader_context *ctx = si_shader_context(bld_base);
453 emit_data->output[emit_data->chan] = LLVMBuildUIToFP(ctx->ac.builder,
454 emit_data->args[0], ctx->f32, "");
455 }
456
457 static void
458 build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
459 struct lp_build_tgsi_context *bld_base,
460 struct lp_build_emit_data *emit_data)
461 {
462 struct si_shader_context *ctx = si_shader_context(bld_base);
463 emit_data->output[emit_data->chan] =
464 lp_build_intrinsic(ctx->ac.builder, action->intr_name,
465 emit_data->dst_type, emit_data->args,
466 emit_data->arg_count, LP_FUNC_ATTR_READNONE);
467 }
468
469 static void emit_bfi(const struct lp_build_tgsi_action *action,
470 struct lp_build_tgsi_context *bld_base,
471 struct lp_build_emit_data *emit_data)
472 {
473 struct si_shader_context *ctx = si_shader_context(bld_base);
474 LLVMBuilderRef builder = ctx->ac.builder;
475 LLVMValueRef bfi_args[3];
476 LLVMValueRef bfi_sm5;
477 LLVMValueRef cond;
478
479 // Calculate the bitmask: (((1 << src3) - 1) << src2
480 bfi_args[0] = LLVMBuildShl(builder,
481 LLVMBuildSub(builder,
482 LLVMBuildShl(builder,
483 ctx->i32_1,
484 emit_data->args[3], ""),
485 ctx->i32_1, ""),
486 emit_data->args[2], "");
487
488 bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
489 emit_data->args[2], "");
490
491 bfi_args[2] = emit_data->args[0];
492
493 /* Calculate:
494 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
495 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
496 */
497 bfi_sm5 =
498 LLVMBuildXor(builder, bfi_args[2],
499 LLVMBuildAnd(builder, bfi_args[0],
500 LLVMBuildXor(builder, bfi_args[1], bfi_args[2],
501 ""), ""), "");
502
503 /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend
504 * uses the convenient V_BFI lowering for the above, which follows SM5
505 * and disagrees with GLSL semantics when bits (src3) is 32.
506 */
507 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
508 LLVMConstInt(ctx->i32, 32, 0), "");
509 emit_data->output[emit_data->chan] =
510 LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
511 }
512
513 static void emit_bfe(const struct lp_build_tgsi_action *action,
514 struct lp_build_tgsi_context *bld_base,
515 struct lp_build_emit_data *emit_data)
516 {
517 struct si_shader_context *ctx = si_shader_context(bld_base);
518 LLVMValueRef bfe_sm5;
519 LLVMValueRef cond;
520
521 bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
522 emit_data->args[1], emit_data->args[2],
523 emit_data->info->opcode == TGSI_OPCODE_IBFE);
524
525 /* Correct for GLSL semantics. */
526 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntUGE, emit_data->args[2],
527 LLVMConstInt(ctx->i32, 32, 0), "");
528 emit_data->output[emit_data->chan] =
529 LLVMBuildSelect(ctx->ac.builder, cond, emit_data->args[0], bfe_sm5, "");
530 }
531
532 /* this is ffs in C */
533 static void emit_lsb(const struct lp_build_tgsi_action *action,
534 struct lp_build_tgsi_context *bld_base,
535 struct lp_build_emit_data *emit_data)
536 {
537 struct si_shader_context *ctx = si_shader_context(bld_base);
538
539 emit_data->output[emit_data->chan] = ac_find_lsb(&ctx->ac, emit_data->dst_type, emit_data->args[0]);
540 }
541
542 /* Find the last bit set. */
543 static void emit_umsb(const struct lp_build_tgsi_action *action,
544 struct lp_build_tgsi_context *bld_base,
545 struct lp_build_emit_data *emit_data)
546 {
547 struct si_shader_context *ctx = si_shader_context(bld_base);
548
549 emit_data->output[emit_data->chan] =
550 ac_build_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
551 }
552
553 /* Find the last bit opposite of the sign bit. */
554 static void emit_imsb(const struct lp_build_tgsi_action *action,
555 struct lp_build_tgsi_context *bld_base,
556 struct lp_build_emit_data *emit_data)
557 {
558 struct si_shader_context *ctx = si_shader_context(bld_base);
559 emit_data->output[emit_data->chan] =
560 ac_build_imsb(&ctx->ac, emit_data->args[0],
561 emit_data->dst_type);
562 }
563
564 static void emit_iabs(const struct lp_build_tgsi_action *action,
565 struct lp_build_tgsi_context *bld_base,
566 struct lp_build_emit_data *emit_data)
567 {
568 struct si_shader_context *ctx = si_shader_context(bld_base);
569
570 emit_data->output[emit_data->chan] =
571 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX,
572 emit_data->args[0],
573 LLVMBuildNeg(ctx->ac.builder,
574 emit_data->args[0], ""));
575 }
576
577 static void emit_minmax_int(const struct lp_build_tgsi_action *action,
578 struct lp_build_tgsi_context *bld_base,
579 struct lp_build_emit_data *emit_data)
580 {
581 struct si_shader_context *ctx = si_shader_context(bld_base);
582 LLVMIntPredicate op;
583
584 switch (emit_data->info->opcode) {
585 default:
586 assert(0);
587 case TGSI_OPCODE_IMAX:
588 case TGSI_OPCODE_I64MAX:
589 op = LLVMIntSGT;
590 break;
591 case TGSI_OPCODE_IMIN:
592 case TGSI_OPCODE_I64MIN:
593 op = LLVMIntSLT;
594 break;
595 case TGSI_OPCODE_UMAX:
596 case TGSI_OPCODE_U64MAX:
597 op = LLVMIntUGT;
598 break;
599 case TGSI_OPCODE_UMIN:
600 case TGSI_OPCODE_U64MIN:
601 op = LLVMIntULT;
602 break;
603 }
604
605 emit_data->output[emit_data->chan] =
606 LLVMBuildSelect(ctx->ac.builder,
607 LLVMBuildICmp(ctx->ac.builder, op, emit_data->args[0],
608 emit_data->args[1], ""),
609 emit_data->args[0],
610 emit_data->args[1], "");
611 }
612
613 static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base,
614 struct lp_build_emit_data *emit_data)
615 {
616 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
617 0, TGSI_CHAN_X);
618 emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
619 0, TGSI_CHAN_Y);
620 }
621
622 static void emit_pk2h(const struct lp_build_tgsi_action *action,
623 struct lp_build_tgsi_context *bld_base,
624 struct lp_build_emit_data *emit_data)
625 {
626 /* From the GLSL 4.50 spec:
627 * "The rounding mode cannot be set and is undefined."
628 *
629 * v_cvt_pkrtz_f16 rounds to zero, but it's fastest.
630 */
631 emit_data->output[emit_data->chan] =
632 ac_build_cvt_pkrtz_f16(&si_shader_context(bld_base)->ac,
633 emit_data->args);
634 }
635
636 static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base,
637 struct lp_build_emit_data *emit_data)
638 {
639 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
640 0, TGSI_CHAN_X);
641 }
642
643 static void emit_up2h(const struct lp_build_tgsi_action *action,
644 struct lp_build_tgsi_context *bld_base,
645 struct lp_build_emit_data *emit_data)
646 {
647 struct si_shader_context *ctx = si_shader_context(bld_base);
648 LLVMTypeRef i16;
649 LLVMValueRef const16, input, val;
650 unsigned i;
651
652 i16 = LLVMInt16TypeInContext(ctx->ac.context);
653 const16 = LLVMConstInt(ctx->i32, 16, 0);
654 input = emit_data->args[0];
655
656 for (i = 0; i < 2; i++) {
657 val = i == 1 ? LLVMBuildLShr(ctx->ac.builder, input, const16, "") : input;
658 val = LLVMBuildTrunc(ctx->ac.builder, val, i16, "");
659 val = ac_to_float(&ctx->ac, val);
660 emit_data->output[i] = LLVMBuildFPExt(ctx->ac.builder, val, ctx->f32, "");
661 }
662 }
663
664 static void emit_fdiv(const struct lp_build_tgsi_action *action,
665 struct lp_build_tgsi_context *bld_base,
666 struct lp_build_emit_data *emit_data)
667 {
668 struct si_shader_context *ctx = si_shader_context(bld_base);
669
670 emit_data->output[emit_data->chan] =
671 ac_build_fdiv(&ctx->ac, emit_data->args[0], emit_data->args[1]);
672 }
673
674 /* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
675 * the target machine. f64 needs global unsafe math flags to get rsq. */
676 static void emit_rsq(const struct lp_build_tgsi_action *action,
677 struct lp_build_tgsi_context *bld_base,
678 struct lp_build_emit_data *emit_data)
679 {
680 struct si_shader_context *ctx = si_shader_context(bld_base);
681
682 LLVMValueRef sqrt =
683 lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT,
684 emit_data->args[0]);
685
686 emit_data->output[emit_data->chan] =
687 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV,
688 ctx->ac.f32_1, sqrt);
689 }
690
691 static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
692 struct lp_build_emit_data *emit_data)
693 {
694 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
695 emit_data->arg_count = 1;
696 }
697
698 static void dfracexp_emit(const struct lp_build_tgsi_action *action,
699 struct lp_build_tgsi_context *bld_base,
700 struct lp_build_emit_data *emit_data)
701 {
702 struct si_shader_context *ctx = si_shader_context(bld_base);
703
704 emit_data->output[emit_data->chan] =
705 lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.mant.f64",
706 ctx->ac.f64, &emit_data->args[0], 1, 0);
707 emit_data->output1[emit_data->chan] =
708 lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.exp.i32.f64",
709 ctx->ac.i32, &emit_data->args[0], 1, 0);
710 }
711
712 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
713 {
714 lp_set_default_actions(bld_base);
715
716 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
717 bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
718 bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
719 bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
720 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
721 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
722 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
723 bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
724 bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem;
725 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32";
726 bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem;
727 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64";
728 bld_base->op_actions[TGSI_OPCODE_DCEIL].emit = build_tgsi_intrinsic_nomem;
729 bld_base->op_actions[TGSI_OPCODE_DCEIL].intr_name = "llvm.ceil.f64";
730 bld_base->op_actions[TGSI_OPCODE_DFLR].emit = build_tgsi_intrinsic_nomem;
731 bld_base->op_actions[TGSI_OPCODE_DFLR].intr_name = "llvm.floor.f64";
732 bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem;
733 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64";
734 bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac;
735 bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv;
736 bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg;
737 bld_base->op_actions[TGSI_OPCODE_DROUND].emit = build_tgsi_intrinsic_nomem;
738 bld_base->op_actions[TGSI_OPCODE_DROUND].intr_name = "llvm.rint.f64";
739 bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp;
740 bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
741 bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
742 bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
743 bld_base->op_actions[TGSI_OPCODE_DSSG].emit = emit_ssg;
744 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem;
745 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64";
746 bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
747 bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
748 bld_base->op_actions[TGSI_OPCODE_DTRUNC].emit = build_tgsi_intrinsic_nomem;
749 bld_base->op_actions[TGSI_OPCODE_DTRUNC].intr_name = "llvm.trunc.f64";
750 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].fetch_args = dfracexp_fetch_args;
751 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].emit = dfracexp_emit;
752 bld_base->op_actions[TGSI_OPCODE_DLDEXP].emit = build_tgsi_intrinsic_nomem;
753 bld_base->op_actions[TGSI_OPCODE_DLDEXP].intr_name = "llvm.amdgcn.ldexp.f64";
754 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
755 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
756 bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
757 bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
758 bld_base->op_actions[TGSI_OPCODE_FMA].emit =
759 bld_base->op_actions[TGSI_OPCODE_MAD].emit;
760 bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
761 bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i;
762 bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u;
763 bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp;
764 bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp;
765 bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp;
766 bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
767 bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
768 bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
769 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
770 bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
771 bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
772 bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
773 bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
774 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
775 bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
776 bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
777 bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
778 bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
779 bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
780 bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
781 bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
782 bld_base->op_actions[TGSI_OPCODE_LDEXP].emit = build_tgsi_intrinsic_nomem;
783 bld_base->op_actions[TGSI_OPCODE_LDEXP].intr_name = "llvm.amdgcn.ldexp.f32";
784 bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
785 bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
786 bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
787 bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
788 bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
789 bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
790 bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
791 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
792 bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
793 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
794 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
795 bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args;
796 bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
797 bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem;
798 bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
799 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
800 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
801 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem;
802 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
803 bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
804 bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
805 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
806 bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl;
807 bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond;
808 bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond;
809 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond;
810 bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond;
811 bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
812 bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
813 bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
814 bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
815 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
816 bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem;
817 bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
818 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
819 bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
820 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
821 bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
822 bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
823 bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
824 bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
825 bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
826 bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
827 bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
828 bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
829 bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
830 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
831 bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
832 bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args;
833 bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
834
835 bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
836 bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
837 bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
838 bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
839 bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
840 bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
841 bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
842
843 bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp;
844 bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
845 bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
846 bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
847 bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
848 bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
849
850 bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
851 bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
852 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
853 bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
854
855 bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
856 bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
857 bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
858 bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
859 }