src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #include "si_pipe.h"
  26 #include "tgsi/tgsi_text.h"
  27 #include "tgsi/tgsi_ureg.h"
  28
  29 void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
  30                         unsigned num_layers)
  31 {
  32         unsigned vs_blit_property;
  33         void **vs;
  34
  35         switch (type) {
  36         case UTIL_BLITTER_ATTRIB_NONE:
  37                 vs = num_layers > 1 ? &sctx->vs_blit_pos_layered :
  38                                       &sctx->vs_blit_pos;
  39                 vs_blit_property = SI_VS_BLIT_SGPRS_POS;
  40                 break;
  41         case UTIL_BLITTER_ATTRIB_COLOR:
  42                 vs = num_layers > 1 ? &sctx->vs_blit_color_layered :
  43                                       &sctx->vs_blit_color;
  44                 vs_blit_property = SI_VS_BLIT_SGPRS_POS_COLOR;
  45                 break;
  46         case UTIL_BLITTER_ATTRIB_TEXCOORD_XY:
  47         case UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW:
  48                 assert(num_layers == 1);
  49                 vs = &sctx->vs_blit_texcoord;
  50                 vs_blit_property = SI_VS_BLIT_SGPRS_POS_TEXCOORD;
  51                 break;
  52         default:
  53                 assert(0);
  54                 return NULL;
  55         }
  56         if (*vs)
  57                 return *vs;
  58
  59         struct ureg_program *ureg = ureg_create(PIPE_SHADER_VERTEX);
  60         if (!ureg)
  61                 return NULL;
  62
  63         /* Tell the shader to load VS inputs from SGPRs: */
  64         ureg_property(ureg, TGSI_PROPERTY_VS_BLIT_SGPRS, vs_blit_property);
  65         ureg_property(ureg, TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, true);
  66
  67         /* This is just a pass-through shader with 1-3 MOV instructions. */
  68         ureg_MOV(ureg,
  69                  ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0),
  70                  ureg_DECL_vs_input(ureg, 0));
  71
  72         if (type != UTIL_BLITTER_ATTRIB_NONE) {
  73                 ureg_MOV(ureg,
  74                          ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, 0),
  75                          ureg_DECL_vs_input(ureg, 1));
  76         }
  77
  78         if (num_layers > 1) {
  79                 struct ureg_src instance_id =
  80                         ureg_DECL_system_value(ureg, TGSI_SEMANTIC_INSTANCEID, 0);
  81                 struct ureg_dst layer =
  82                         ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0);
  83
  84                 ureg_MOV(ureg, ureg_writemask(layer, TGSI_WRITEMASK_X),
  85                          ureg_scalar(instance_id, TGSI_SWIZZLE_X));
  86         }
  87         ureg_END(ureg);
  88
  89         *vs = ureg_create_shader_and_destroy(ureg, &sctx->b);
  90         return *vs;
  91 }
  92
  93 /**
  94  * This is used when TCS is NULL in the VS->TCS->TES chain. In this case,
  95  * VS passes its outputs to TES directly, so the fixed-function shader only
  96  * has to write TESSOUTER and TESSINNER.
  97  */
  98 void *si_create_fixed_func_tcs(struct si_context *sctx)
  99 {
 100         struct ureg_src outer, inner;
 101         struct ureg_dst tessouter, tessinner;
 102         struct ureg_program *ureg = ureg_create(PIPE_SHADER_TESS_CTRL);
 103
 104         if (!ureg)
 105                 return NULL;
 106
 107         outer = ureg_DECL_system_value(ureg,
 108                                        TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI, 0);
 109         inner = ureg_DECL_system_value(ureg,
 110                                        TGSI_SEMANTIC_DEFAULT_TESSINNER_SI, 0);
 111
 112         tessouter = ureg_DECL_output(ureg, TGSI_SEMANTIC_TESSOUTER, 0);
 113         tessinner = ureg_DECL_output(ureg, TGSI_SEMANTIC_TESSINNER, 0);
 114
 115         ureg_MOV(ureg, tessouter, outer);
 116         ureg_MOV(ureg, tessinner, inner);
 117         ureg_END(ureg);
 118
 119         return ureg_create_shader_and_destroy(ureg, &sctx->b);
 120 }
 121
 122 /* Create the compute shader that is used to collect the results.
 123  *
 124  * One compute grid with a single thread is launched for every query result
 125  * buffer. The thread (optionally) reads a previous summary buffer, then
 126  * accumulates data from the query result buffer, and writes the result either
 127  * to a summary buffer to be consumed by the next grid invocation or to the
 128  * user-supplied buffer.
 129  *
 130  * Data layout:
 131  *
 132  * CONST
 133  *  0.x = end_offset
 134  *  0.y = result_stride
 135  *  0.z = result_count
 136  *  0.w = bit field:
 137  *          1: read previously accumulated values
 138  *          2: write accumulated values for chaining
 139  *          4: write result available
 140  *          8: convert result to boolean (0/1)
 141  *         16: only read one dword and use that as result
 142  *         32: apply timestamp conversion
 143  *         64: store full 64 bits result
 144  *        128: store signed 32 bits result
 145  *        256: SO_OVERFLOW mode: take the difference of two successive half-pairs
 146  *  1.x = fence_offset
 147  *  1.y = pair_stride
 148  *  1.z = pair_count
 149  *
 150  * BUFFER[0] = query result buffer
 151  * BUFFER[1] = previous summary buffer
 152  * BUFFER[2] = next summary buffer or user-supplied buffer
 153  */
 154 void *si_create_query_result_cs(struct si_context *sctx)
 155 {
 156         /* TEMP[0].xy = accumulated result so far
 157          * TEMP[0].z = result not available
 158          *
 159          * TEMP[1].x = current result index
 160          * TEMP[1].y = current pair index
 161          */
 162         static const char text_tmpl[] =
 163                 "COMP\n"
 164                 "PROPERTY CS_FIXED_BLOCK_WIDTH 1\n"
 165                 "PROPERTY CS_FIXED_BLOCK_HEIGHT 1\n"
 166                 "PROPERTY CS_FIXED_BLOCK_DEPTH 1\n"
 167                 "DCL BUFFER[0]\n"
 168                 "DCL BUFFER[1]\n"
 169                 "DCL BUFFER[2]\n"
 170                 "DCL CONST[0][0..1]\n"
 171                 "DCL TEMP[0..5]\n"
 172                 "IMM[0] UINT32 {0, 31, 2147483647, 4294967295}\n"
 173                 "IMM[1] UINT32 {1, 2, 4, 8}\n"
 174                 "IMM[2] UINT32 {16, 32, 64, 128}\n"
 175                 "IMM[3] UINT32 {1000000, 0, %u, 0}\n" /* for timestamp conversion */
 176                 "IMM[4] UINT32 {256, 0, 0, 0}\n"
 177
 178                 "AND TEMP[5], CONST[0][0].wwww, IMM[2].xxxx\n"
 179                 "UIF TEMP[5]\n"
 180                         /* Check result availability. */
 181                         "LOAD TEMP[1].x, BUFFER[0], CONST[0][1].xxxx\n"
 182                         "ISHR TEMP[0].z, TEMP[1].xxxx, IMM[0].yyyy\n"
 183                         "MOV TEMP[1], TEMP[0].zzzz\n"
 184                         "NOT TEMP[0].z, TEMP[0].zzzz\n"
 185
 186                         /* Load result if available. */
 187                         "UIF TEMP[1]\n"
 188                                 "LOAD TEMP[0].xy, BUFFER[0], IMM[0].xxxx\n"
 189                         "ENDIF\n"
 190                 "ELSE\n"
 191                         /* Load previously accumulated result if requested. */
 192                         "MOV TEMP[0], IMM[0].xxxx\n"
 193                         "AND TEMP[4], CONST[0][0].wwww, IMM[1].xxxx\n"
 194                         "UIF TEMP[4]\n"
 195                                 "LOAD TEMP[0].xyz, BUFFER[1], IMM[0].xxxx\n"
 196                         "ENDIF\n"
 197
 198                         "MOV TEMP[1].x, IMM[0].xxxx\n"
 199                         "BGNLOOP\n"
 200                                 /* Break if accumulated result so far is not available. */
 201                                 "UIF TEMP[0].zzzz\n"
 202                                         "BRK\n"
 203                                 "ENDIF\n"
 204
 205                                 /* Break if result_index >= result_count. */
 206                                 "USGE TEMP[5], TEMP[1].xxxx, CONST[0][0].zzzz\n"
 207                                 "UIF TEMP[5]\n"
 208                                         "BRK\n"
 209                                 "ENDIF\n"
 210
 211                                 /* Load fence and check result availability */
 212                                 "UMAD TEMP[5].x, TEMP[1].xxxx, CONST[0][0].yyyy, CONST[0][1].xxxx\n"
 213                                 "LOAD TEMP[5].x, BUFFER[0], TEMP[5].xxxx\n"
 214                                 "ISHR TEMP[0].z, TEMP[5].xxxx, IMM[0].yyyy\n"
 215                                 "NOT TEMP[0].z, TEMP[0].zzzz\n"
 216                                 "UIF TEMP[0].zzzz\n"
 217                                         "BRK\n"
 218                                 "ENDIF\n"
 219
 220                                 "MOV TEMP[1].y, IMM[0].xxxx\n"
 221                                 "BGNLOOP\n"
 222                                         /* Load start and end. */
 223                                         "UMUL TEMP[5].x, TEMP[1].xxxx, CONST[0][0].yyyy\n"
 224                                         "UMAD TEMP[5].x, TEMP[1].yyyy, CONST[0][1].yyyy, TEMP[5].xxxx\n"
 225                                         "LOAD TEMP[2].xy, BUFFER[0], TEMP[5].xxxx\n"
 226
 227                                         "UADD TEMP[5].y, TEMP[5].xxxx, CONST[0][0].xxxx\n"
 228                                         "LOAD TEMP[3].xy, BUFFER[0], TEMP[5].yyyy\n"
 229
 230                                         "U64ADD TEMP[4].xy, TEMP[3], -TEMP[2]\n"
 231
 232                                         "AND TEMP[5].z, CONST[0][0].wwww, IMM[4].xxxx\n"
 233                                         "UIF TEMP[5].zzzz\n"
 234                                                 /* Load second start/end half-pair and
 235                                                  * take the difference
 236                                                  */
 237                                                 "UADD TEMP[5].xy, TEMP[5], IMM[1].wwww\n"
 238                                                 "LOAD TEMP[2].xy, BUFFER[0], TEMP[5].xxxx\n"
 239                                                 "LOAD TEMP[3].xy, BUFFER[0], TEMP[5].yyyy\n"
 240
 241                                                 "U64ADD TEMP[3].xy, TEMP[3], -TEMP[2]\n"
 242                                                 "U64ADD TEMP[4].xy, TEMP[4], -TEMP[3]\n"
 243                                         "ENDIF\n"
 244
 245                                         "U64ADD TEMP[0].xy, TEMP[0], TEMP[4]\n"
 246
 247                                         /* Increment pair index */
 248                                         "UADD TEMP[1].y, TEMP[1].yyyy, IMM[1].xxxx\n"
 249                                         "USGE TEMP[5], TEMP[1].yyyy, CONST[0][1].zzzz\n"
 250                                         "UIF TEMP[5]\n"
 251                                                 "BRK\n"
 252                                         "ENDIF\n"
 253                                 "ENDLOOP\n"
 254
 255                                 /* Increment result index */
 256                                 "UADD TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx\n"
 257                         "ENDLOOP\n"
 258                 "ENDIF\n"
 259
 260                 "AND TEMP[4], CONST[0][0].wwww, IMM[1].yyyy\n"
 261                 "UIF TEMP[4]\n"
 262                         /* Store accumulated data for chaining. */
 263                         "STORE BUFFER[2].xyz, IMM[0].xxxx, TEMP[0]\n"
 264                 "ELSE\n"
 265                         "AND TEMP[4], CONST[0][0].wwww, IMM[1].zzzz\n"
 266                         "UIF TEMP[4]\n"
 267                                 /* Store result availability. */
 268                                 "NOT TEMP[0].z, TEMP[0]\n"
 269                                 "AND TEMP[0].z, TEMP[0].zzzz, IMM[1].xxxx\n"
 270                                 "STORE BUFFER[2].x, IMM[0].xxxx, TEMP[0].zzzz\n"
 271
 272                                 "AND TEMP[4], CONST[0][0].wwww, IMM[2].zzzz\n"
 273                                 "UIF TEMP[4]\n"
 274                                         "STORE BUFFER[2].y, IMM[0].xxxx, IMM[0].xxxx\n"
 275                                 "ENDIF\n"
 276                         "ELSE\n"
 277                                 /* Store result if it is available. */
 278                                 "NOT TEMP[4], TEMP[0].zzzz\n"
 279                                 "UIF TEMP[4]\n"
 280                                         /* Apply timestamp conversion */
 281                                         "AND TEMP[4], CONST[0][0].wwww, IMM[2].yyyy\n"
 282                                         "UIF TEMP[4]\n"
 283                                                 "U64MUL TEMP[0].xy, TEMP[0], IMM[3].xyxy\n"
 284                                                 "U64DIV TEMP[0].xy, TEMP[0], IMM[3].zwzw\n"
 285                                         "ENDIF\n"
 286
 287                                         /* Convert to boolean */
 288                                         "AND TEMP[4], CONST[0][0].wwww, IMM[1].wwww\n"
 289                                         "UIF TEMP[4]\n"
 290                                                 "U64SNE TEMP[0].x, TEMP[0].xyxy, IMM[4].zwzw\n"
 291                                                 "AND TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx\n"
 292                                                 "MOV TEMP[0].y, IMM[0].xxxx\n"
 293                                         "ENDIF\n"
 294
 295                                         "AND TEMP[4], CONST[0][0].wwww, IMM[2].zzzz\n"
 296                                         "UIF TEMP[4]\n"
 297                                                 "STORE BUFFER[2].xy, IMM[0].xxxx, TEMP[0].xyxy\n"
 298                                         "ELSE\n"
 299                                                 /* Clamping */
 300                                                 "UIF TEMP[0].yyyy\n"
 301                                                         "MOV TEMP[0].x, IMM[0].wwww\n"
 302                                                 "ENDIF\n"
 303
 304                                                 "AND TEMP[4], CONST[0][0].wwww, IMM[2].wwww\n"
 305                                                 "UIF TEMP[4]\n"
 306                                                         "UMIN TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz\n"
 307                                                 "ENDIF\n"
 308
 309                                                 "STORE BUFFER[2].x, IMM[0].xxxx, TEMP[0].xxxx\n"
 310                                         "ENDIF\n"
 311                                 "ENDIF\n"
 312                         "ENDIF\n"
 313                 "ENDIF\n"
 314
 315                 "END\n";
 316
 317         char text[sizeof(text_tmpl) + 32];
 318         struct tgsi_token tokens[1024];
 319         struct pipe_compute_state state = {};
 320
 321         /* Hard code the frequency into the shader so that the backend can
 322          * use the full range of optimizations for divide-by-constant.
 323          */
 324         snprintf(text, sizeof(text), text_tmpl,
 325                  sctx->screen->info.clock_crystal_freq);
 326
 327         if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens))) {
 328                 assert(false);
 329                 return NULL;
 330         }
 331
 332         state.ir_type = PIPE_SHADER_IR_TGSI;
 333         state.prog = tokens;
 334
 335         return sctx->b.create_compute_state(&sctx->b, &state);
 336 }