radeonsi: update copyrights
[mesa.git] / src / gallium / drivers / radeonsi / si_state_msaa.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "si_pipe.h"
26 #include "sid.h"
27 #include "radeon/r600_cs.h"
28
29 /* For MSAA sample positions. */
30 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
31 (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \
32 (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
33 (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
34 (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
35
36 /* 2xMSAA
37 * There are two locations (4, 4), (-4, -4). */
38 static const uint32_t sample_locs_2x[4] = {
39 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
40 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
41 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
42 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
43 };
44 /* 4xMSAA
45 * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
46 static const uint32_t sample_locs_4x[4] = {
47 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
48 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
49 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
50 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
51 };
52
53 /* Cayman 8xMSAA */
54 static const uint32_t sample_locs_8x[] = {
55 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
56 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
57 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
58 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
59 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
60 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
61 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
62 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
63 };
64 /* Cayman 16xMSAA */
65 static const uint32_t sample_locs_16x[] = {
66 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
67 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
68 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
69 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
70 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
71 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
72 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
73 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
74 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
75 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
76 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
77 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
78 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
79 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
80 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
81 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
82 };
83
84 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
85 unsigned sample_index, float *out_value)
86 {
87 int offset, index;
88 struct {
89 int idx:4;
90 } val;
91
92 switch (sample_count) {
93 case 1:
94 default:
95 out_value[0] = out_value[1] = 0.5;
96 break;
97 case 2:
98 offset = 4 * (sample_index * 2);
99 val.idx = (sample_locs_2x[0] >> offset) & 0xf;
100 out_value[0] = (float)(val.idx + 8) / 16.0f;
101 val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf;
102 out_value[1] = (float)(val.idx + 8) / 16.0f;
103 break;
104 case 4:
105 offset = 4 * (sample_index * 2);
106 val.idx = (sample_locs_4x[0] >> offset) & 0xf;
107 out_value[0] = (float)(val.idx + 8) / 16.0f;
108 val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf;
109 out_value[1] = (float)(val.idx + 8) / 16.0f;
110 break;
111 case 8:
112 offset = 4 * (sample_index % 4 * 2);
113 index = (sample_index / 4) * 4;
114 val.idx = (sample_locs_8x[index] >> offset) & 0xf;
115 out_value[0] = (float)(val.idx + 8) / 16.0f;
116 val.idx = (sample_locs_8x[index] >> (offset + 4)) & 0xf;
117 out_value[1] = (float)(val.idx + 8) / 16.0f;
118 break;
119 case 16:
120 offset = 4 * (sample_index % 4 * 2);
121 index = (sample_index / 4) * 4;
122 val.idx = (sample_locs_16x[index] >> offset) & 0xf;
123 out_value[0] = (float)(val.idx + 8) / 16.0f;
124 val.idx = (sample_locs_16x[index] >> (offset + 4)) & 0xf;
125 out_value[1] = (float)(val.idx + 8) / 16.0f;
126 break;
127 }
128 }
129
130 void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
131 {
132 switch (nr_samples) {
133 default:
134 case 1:
135 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
136 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
137 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
138 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
139 break;
140 case 2:
141 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x[0]);
142 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x[1]);
143 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x[2]);
144 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x[3]);
145 break;
146 case 4:
147 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x[0]);
148 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x[1]);
149 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x[2]);
150 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x[3]);
151 break;
152 case 8:
153 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
154 radeon_emit(cs, sample_locs_8x[0]);
155 radeon_emit(cs, sample_locs_8x[4]);
156 radeon_emit(cs, 0);
157 radeon_emit(cs, 0);
158 radeon_emit(cs, sample_locs_8x[1]);
159 radeon_emit(cs, sample_locs_8x[5]);
160 radeon_emit(cs, 0);
161 radeon_emit(cs, 0);
162 radeon_emit(cs, sample_locs_8x[2]);
163 radeon_emit(cs, sample_locs_8x[6]);
164 radeon_emit(cs, 0);
165 radeon_emit(cs, 0);
166 radeon_emit(cs, sample_locs_8x[3]);
167 radeon_emit(cs, sample_locs_8x[7]);
168 break;
169 case 16:
170 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
171 radeon_emit(cs, sample_locs_16x[0]);
172 radeon_emit(cs, sample_locs_16x[4]);
173 radeon_emit(cs, sample_locs_16x[8]);
174 radeon_emit(cs, sample_locs_16x[12]);
175 radeon_emit(cs, sample_locs_16x[1]);
176 radeon_emit(cs, sample_locs_16x[5]);
177 radeon_emit(cs, sample_locs_16x[9]);
178 radeon_emit(cs, sample_locs_16x[13]);
179 radeon_emit(cs, sample_locs_16x[2]);
180 radeon_emit(cs, sample_locs_16x[6]);
181 radeon_emit(cs, sample_locs_16x[10]);
182 radeon_emit(cs, sample_locs_16x[14]);
183 radeon_emit(cs, sample_locs_16x[3]);
184 radeon_emit(cs, sample_locs_16x[7]);
185 radeon_emit(cs, sample_locs_16x[11]);
186 radeon_emit(cs, sample_locs_16x[15]);
187 break;
188 }
189 }
190
191 void si_init_msaa_functions(struct si_context *sctx)
192 {
193 int i;
194
195 sctx->b.b.get_sample_position = si_get_sample_position;
196
197 si_get_sample_position(&sctx->b.b, 1, 0, sctx->sample_locations_1x[0]);
198
199 for (i = 0; i < 2; i++)
200 si_get_sample_position(&sctx->b.b, 2, i, sctx->sample_locations_2x[i]);
201 for (i = 0; i < 4; i++)
202 si_get_sample_position(&sctx->b.b, 4, i, sctx->sample_locations_4x[i]);
203 for (i = 0; i < 8; i++)
204 si_get_sample_position(&sctx->b.b, 8, i, sctx->sample_locations_8x[i]);
205 for (i = 0; i < 16; i++)
206 si_get_sample_position(&sctx->b.b, 16, i, sctx->sample_locations_16x[i]);
207 }