2 * Copyright 2014 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "radeon/r600_cs.h"
28 /* For MSAA sample positions. */
29 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
30 (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \
31 (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
32 (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
33 (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
36 * There are two locations (4, 4), (-4, -4). */
37 static const uint32_t sample_locs_2x
[4] = {
38 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
39 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
40 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
41 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
44 * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
45 static const uint32_t sample_locs_4x
[4] = {
46 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
47 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
48 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
49 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
53 static const uint32_t sample_locs_8x
[] = {
54 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
55 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
56 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
57 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
58 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
59 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
60 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
61 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
64 static const uint32_t sample_locs_16x
[] = {
65 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
66 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
67 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
68 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
69 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
70 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
71 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
72 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
73 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
74 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
75 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
76 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
77 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
78 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
79 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
80 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
83 static void si_get_sample_position(struct pipe_context
*ctx
, unsigned sample_count
,
84 unsigned sample_index
, float *out_value
)
91 switch (sample_count
) {
94 out_value
[0] = out_value
[1] = 0.5;
97 offset
= 4 * (sample_index
* 2);
98 val
.idx
= (sample_locs_2x
[0] >> offset
) & 0xf;
99 out_value
[0] = (float)(val
.idx
+ 8) / 16.0f
;
100 val
.idx
= (sample_locs_2x
[0] >> (offset
+ 4)) & 0xf;
101 out_value
[1] = (float)(val
.idx
+ 8) / 16.0f
;
104 offset
= 4 * (sample_index
* 2);
105 val
.idx
= (sample_locs_4x
[0] >> offset
) & 0xf;
106 out_value
[0] = (float)(val
.idx
+ 8) / 16.0f
;
107 val
.idx
= (sample_locs_4x
[0] >> (offset
+ 4)) & 0xf;
108 out_value
[1] = (float)(val
.idx
+ 8) / 16.0f
;
111 offset
= 4 * (sample_index
% 4 * 2);
112 index
= (sample_index
/ 4) * 4;
113 val
.idx
= (sample_locs_8x
[index
] >> offset
) & 0xf;
114 out_value
[0] = (float)(val
.idx
+ 8) / 16.0f
;
115 val
.idx
= (sample_locs_8x
[index
] >> (offset
+ 4)) & 0xf;
116 out_value
[1] = (float)(val
.idx
+ 8) / 16.0f
;
119 offset
= 4 * (sample_index
% 4 * 2);
120 index
= (sample_index
/ 4) * 4;
121 val
.idx
= (sample_locs_16x
[index
] >> offset
) & 0xf;
122 out_value
[0] = (float)(val
.idx
+ 8) / 16.0f
;
123 val
.idx
= (sample_locs_16x
[index
] >> (offset
+ 4)) & 0xf;
124 out_value
[1] = (float)(val
.idx
+ 8) / 16.0f
;
129 void si_emit_sample_locations(struct radeon_winsys_cs
*cs
, int nr_samples
)
131 switch (nr_samples
) {
134 radeon_set_context_reg(cs
, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0
, 0);
135 radeon_set_context_reg(cs
, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0
, 0);
136 radeon_set_context_reg(cs
, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0
, 0);
137 radeon_set_context_reg(cs
, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0
, 0);
140 radeon_set_context_reg(cs
, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0
, sample_locs_2x
[0]);
141 radeon_set_context_reg(cs
, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0
, sample_locs_2x
[1]);
142 radeon_set_context_reg(cs
, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0
, sample_locs_2x
[2]);
143 radeon_set_context_reg(cs
, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0
, sample_locs_2x
[3]);
146 radeon_set_context_reg(cs
, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0
, sample_locs_4x
[0]);
147 radeon_set_context_reg(cs
, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0
, sample_locs_4x
[1]);
148 radeon_set_context_reg(cs
, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0
, sample_locs_4x
[2]);
149 radeon_set_context_reg(cs
, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0
, sample_locs_4x
[3]);
152 radeon_set_context_reg_seq(cs
, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0
, 14);
153 radeon_emit(cs
, sample_locs_8x
[0]);
154 radeon_emit(cs
, sample_locs_8x
[4]);
157 radeon_emit(cs
, sample_locs_8x
[1]);
158 radeon_emit(cs
, sample_locs_8x
[5]);
161 radeon_emit(cs
, sample_locs_8x
[2]);
162 radeon_emit(cs
, sample_locs_8x
[6]);
165 radeon_emit(cs
, sample_locs_8x
[3]);
166 radeon_emit(cs
, sample_locs_8x
[7]);
169 radeon_set_context_reg_seq(cs
, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0
, 16);
170 radeon_emit(cs
, sample_locs_16x
[0]);
171 radeon_emit(cs
, sample_locs_16x
[4]);
172 radeon_emit(cs
, sample_locs_16x
[8]);
173 radeon_emit(cs
, sample_locs_16x
[12]);
174 radeon_emit(cs
, sample_locs_16x
[1]);
175 radeon_emit(cs
, sample_locs_16x
[5]);
176 radeon_emit(cs
, sample_locs_16x
[9]);
177 radeon_emit(cs
, sample_locs_16x
[13]);
178 radeon_emit(cs
, sample_locs_16x
[2]);
179 radeon_emit(cs
, sample_locs_16x
[6]);
180 radeon_emit(cs
, sample_locs_16x
[10]);
181 radeon_emit(cs
, sample_locs_16x
[14]);
182 radeon_emit(cs
, sample_locs_16x
[3]);
183 radeon_emit(cs
, sample_locs_16x
[7]);
184 radeon_emit(cs
, sample_locs_16x
[11]);
185 radeon_emit(cs
, sample_locs_16x
[15]);
190 void si_init_msaa_functions(struct si_context
*sctx
)
194 sctx
->b
.b
.get_sample_position
= si_get_sample_position
;
196 si_get_sample_position(&sctx
->b
.b
, 1, 0, sctx
->sample_locations_1x
[0]);
198 for (i
= 0; i
< 2; i
++)
199 si_get_sample_position(&sctx
->b
.b
, 2, i
, sctx
->sample_locations_2x
[i
]);
200 for (i
= 0; i
< 4; i
++)
201 si_get_sample_position(&sctx
->b
.b
, 4, i
, sctx
->sample_locations_4x
[i
]);
202 for (i
= 0; i
< 8; i
++)
203 si_get_sample_position(&sctx
->b
.b
, 8, i
, sctx
->sample_locations_8x
[i
]);
204 for (i
= 0; i
< 16; i
++)
205 si_get_sample_position(&sctx
->b
.b
, 16, i
, sctx
->sample_locations_16x
[i
]);