radeonsi: simplify si_get_sample_position
[mesa.git] / src / gallium / drivers / radeonsi / si_state_msaa.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "si_build_pm4.h"
26
27 /* For MSAA sample positions. */
28 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
29 ((((unsigned)(s0x) & 0xf) << 0) | (((unsigned)(s0y) & 0xf) << 4) | \
30 (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
31 (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
32 (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
33
34 /* For obtaining location coordinates from registers */
35 #define SEXT4(x) ((int)((x) | ((x) & 0x8 ? 0xfffffff0 : 0)))
36 #define GET_SFIELD(reg, index) SEXT4(((reg) >> ((index) * 4)) & 0xf)
37 #define GET_SX(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
38 #define GET_SY(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
39
40 /* 1x MSAA */
41 static const uint32_t sample_locs_1x =
42 FILL_SREG( 0, 0, 0, 0, 0, 0, 0, 0); /* S1, S2, S3 fields are not used by 1x */
43
44 /* 2x MSAA */
45 static const uint32_t sample_locs_2x =
46 FILL_SREG(4, 4, -4, -4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
47
48 /* 4xMSAA
49 * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
50 static const uint32_t sample_locs_4x =
51 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6);
52
53 /* Cayman 8xMSAA */
54 static const uint32_t sample_locs_8x[] = {
55 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
56 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
57 };
58 /* Cayman 16xMSAA */
59 static const uint32_t sample_locs_16x[] = {
60 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
61 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
62 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
63 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
64 };
65
66 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
67 unsigned sample_index, float *out_value)
68 {
69 const uint32_t *sample_locs;
70
71 switch (sample_count) {
72 case 1:
73 default:
74 sample_locs = &sample_locs_1x;
75 break;
76 case 2:
77 sample_locs = &sample_locs_2x;
78 break;
79 case 4:
80 sample_locs = &sample_locs_4x;
81 break;
82 case 8:
83 sample_locs = sample_locs_8x;
84 break;
85 case 16:
86 sample_locs = sample_locs_16x;
87 break;
88 }
89
90 out_value[0] = (GET_SX(sample_locs, sample_index) + 8) / 16.0f;
91 out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
92 }
93
94 void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
95 {
96 switch (nr_samples) {
97 default:
98 case 1:
99 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
100 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
101 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
102 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
103 break;
104 case 2:
105 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x);
106 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x);
107 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x);
108 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x);
109 break;
110 case 4:
111 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x);
112 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x);
113 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x);
114 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x);
115 break;
116 case 8:
117 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
118 radeon_emit(cs, sample_locs_8x[0]);
119 radeon_emit(cs, sample_locs_8x[1]);
120 radeon_emit(cs, 0);
121 radeon_emit(cs, 0);
122 radeon_emit(cs, sample_locs_8x[0]);
123 radeon_emit(cs, sample_locs_8x[1]);
124 radeon_emit(cs, 0);
125 radeon_emit(cs, 0);
126 radeon_emit(cs, sample_locs_8x[0]);
127 radeon_emit(cs, sample_locs_8x[1]);
128 radeon_emit(cs, 0);
129 radeon_emit(cs, 0);
130 radeon_emit(cs, sample_locs_8x[0]);
131 radeon_emit(cs, sample_locs_8x[1]);
132 break;
133 case 16:
134 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
135 radeon_emit(cs, sample_locs_16x[0]);
136 radeon_emit(cs, sample_locs_16x[1]);
137 radeon_emit(cs, sample_locs_16x[2]);
138 radeon_emit(cs, sample_locs_16x[3]);
139 radeon_emit(cs, sample_locs_16x[0]);
140 radeon_emit(cs, sample_locs_16x[1]);
141 radeon_emit(cs, sample_locs_16x[2]);
142 radeon_emit(cs, sample_locs_16x[3]);
143 radeon_emit(cs, sample_locs_16x[0]);
144 radeon_emit(cs, sample_locs_16x[1]);
145 radeon_emit(cs, sample_locs_16x[2]);
146 radeon_emit(cs, sample_locs_16x[3]);
147 radeon_emit(cs, sample_locs_16x[0]);
148 radeon_emit(cs, sample_locs_16x[1]);
149 radeon_emit(cs, sample_locs_16x[2]);
150 radeon_emit(cs, sample_locs_16x[3]);
151 break;
152 }
153 }
154
155 void si_init_msaa_functions(struct si_context *sctx)
156 {
157 int i;
158
159 sctx->b.get_sample_position = si_get_sample_position;
160
161 si_get_sample_position(&sctx->b, 1, 0, sctx->sample_locations_1x[0]);
162
163 for (i = 0; i < 2; i++)
164 si_get_sample_position(&sctx->b, 2, i, sctx->sample_locations_2x[i]);
165 for (i = 0; i < 4; i++)
166 si_get_sample_position(&sctx->b, 4, i, sctx->sample_locations_4x[i]);
167 for (i = 0; i < 8; i++)
168 si_get_sample_position(&sctx->b, 8, i, sctx->sample_locations_8x[i]);
169 for (i = 0; i < 16; i++)
170 si_get_sample_position(&sctx->b, 16, i, sctx->sample_locations_16x[i]);
171 }