radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h
[mesa.git] / src / gallium / drivers / radeonsi / si_state_msaa.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "si_build_pm4.h"
26
27 /* For MSAA sample positions. */
28 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
29 (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \
30 (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
31 (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
32 (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
33
34 /* 2xMSAA
35 * There are two locations (4, 4), (-4, -4). */
36 static const uint32_t sample_locs_2x[4] = {
37 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
38 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
39 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
40 FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
41 };
42 /* 4xMSAA
43 * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
44 static const uint32_t sample_locs_4x[4] = {
45 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
46 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
47 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
48 FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
49 };
50
51 /* Cayman 8xMSAA */
52 static const uint32_t sample_locs_8x[] = {
53 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
54 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
55 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
56 FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
57 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
58 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
59 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
60 FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
61 };
62 /* Cayman 16xMSAA */
63 static const uint32_t sample_locs_16x[] = {
64 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
65 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
66 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
67 FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
68 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
69 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
70 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
71 FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
72 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
73 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
74 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
75 FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
76 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
77 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
78 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
79 FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
80 };
81
82 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
83 unsigned sample_index, float *out_value)
84 {
85 int offset, index;
86 struct {
87 int idx:4;
88 } val;
89
90 switch (sample_count) {
91 case 1:
92 default:
93 out_value[0] = out_value[1] = 0.5;
94 break;
95 case 2:
96 offset = 4 * (sample_index * 2);
97 val.idx = (sample_locs_2x[0] >> offset) & 0xf;
98 out_value[0] = (float)(val.idx + 8) / 16.0f;
99 val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf;
100 out_value[1] = (float)(val.idx + 8) / 16.0f;
101 break;
102 case 4:
103 offset = 4 * (sample_index * 2);
104 val.idx = (sample_locs_4x[0] >> offset) & 0xf;
105 out_value[0] = (float)(val.idx + 8) / 16.0f;
106 val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf;
107 out_value[1] = (float)(val.idx + 8) / 16.0f;
108 break;
109 case 8:
110 offset = 4 * (sample_index % 4 * 2);
111 index = (sample_index / 4) * 4;
112 val.idx = (sample_locs_8x[index] >> offset) & 0xf;
113 out_value[0] = (float)(val.idx + 8) / 16.0f;
114 val.idx = (sample_locs_8x[index] >> (offset + 4)) & 0xf;
115 out_value[1] = (float)(val.idx + 8) / 16.0f;
116 break;
117 case 16:
118 offset = 4 * (sample_index % 4 * 2);
119 index = (sample_index / 4) * 4;
120 val.idx = (sample_locs_16x[index] >> offset) & 0xf;
121 out_value[0] = (float)(val.idx + 8) / 16.0f;
122 val.idx = (sample_locs_16x[index] >> (offset + 4)) & 0xf;
123 out_value[1] = (float)(val.idx + 8) / 16.0f;
124 break;
125 }
126 }
127
128 void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
129 {
130 switch (nr_samples) {
131 default:
132 case 1:
133 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
134 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
135 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
136 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
137 break;
138 case 2:
139 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x[0]);
140 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x[1]);
141 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x[2]);
142 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x[3]);
143 break;
144 case 4:
145 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x[0]);
146 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x[1]);
147 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x[2]);
148 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x[3]);
149 break;
150 case 8:
151 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
152 radeon_emit(cs, sample_locs_8x[0]);
153 radeon_emit(cs, sample_locs_8x[4]);
154 radeon_emit(cs, 0);
155 radeon_emit(cs, 0);
156 radeon_emit(cs, sample_locs_8x[1]);
157 radeon_emit(cs, sample_locs_8x[5]);
158 radeon_emit(cs, 0);
159 radeon_emit(cs, 0);
160 radeon_emit(cs, sample_locs_8x[2]);
161 radeon_emit(cs, sample_locs_8x[6]);
162 radeon_emit(cs, 0);
163 radeon_emit(cs, 0);
164 radeon_emit(cs, sample_locs_8x[3]);
165 radeon_emit(cs, sample_locs_8x[7]);
166 break;
167 case 16:
168 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
169 radeon_emit(cs, sample_locs_16x[0]);
170 radeon_emit(cs, sample_locs_16x[4]);
171 radeon_emit(cs, sample_locs_16x[8]);
172 radeon_emit(cs, sample_locs_16x[12]);
173 radeon_emit(cs, sample_locs_16x[1]);
174 radeon_emit(cs, sample_locs_16x[5]);
175 radeon_emit(cs, sample_locs_16x[9]);
176 radeon_emit(cs, sample_locs_16x[13]);
177 radeon_emit(cs, sample_locs_16x[2]);
178 radeon_emit(cs, sample_locs_16x[6]);
179 radeon_emit(cs, sample_locs_16x[10]);
180 radeon_emit(cs, sample_locs_16x[14]);
181 radeon_emit(cs, sample_locs_16x[3]);
182 radeon_emit(cs, sample_locs_16x[7]);
183 radeon_emit(cs, sample_locs_16x[11]);
184 radeon_emit(cs, sample_locs_16x[15]);
185 break;
186 }
187 }
188
189 void si_init_msaa_functions(struct si_context *sctx)
190 {
191 int i;
192
193 sctx->b.b.get_sample_position = si_get_sample_position;
194
195 si_get_sample_position(&sctx->b.b, 1, 0, sctx->sample_locations_1x[0]);
196
197 for (i = 0; i < 2; i++)
198 si_get_sample_position(&sctx->b.b, 2, i, sctx->sample_locations_2x[i]);
199 for (i = 0; i < 4; i++)
200 si_get_sample_position(&sctx->b.b, 4, i, sctx->sample_locations_4x[i]);
201 for (i = 0; i < 8; i++)
202 si_get_sample_position(&sctx->b.b, 8, i, sctx->sample_locations_8x[i]);
203 for (i = 0; i < 16; i++)
204 si_get_sample_position(&sctx->b.b, 16, i, sctx->sample_locations_16x[i]);
205 }