src/gallium/drivers/radeonsi/si_state_msaa.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  */
  24
  25 #include "si_build_pm4.h"
  26
  27 /* For MSAA sample positions. */
  28 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y)  \
  29         ((((unsigned)(s0x) & 0xf) << 0)  | (((unsigned)(s0y) & 0xf) << 4)  | \
  30          (((unsigned)(s1x) & 0xf) << 8)  | (((unsigned)(s1y) & 0xf) << 12) | \
  31          (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
  32          (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
  33
  34 /* 2xMSAA
  35  * There are two locations (4, 4), (-4, -4). */
  36 static const uint32_t sample_locs_2x =
  37         FILL_SREG(4, 4, -4, -4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
  38
  39 /* 4xMSAA
  40  * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
  41 static const uint32_t sample_locs_4x =
  42         FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6);
  43
  44 /* Cayman 8xMSAA */
  45 static const uint32_t sample_locs_8x[] = {
  46         FILL_SREG( 1, -3, -1,  3, 5,  1, -3, -5),
  47         FILL_SREG(-5,  5, -7, -1, 3,  7,  7, -7),
  48 };
  49 /* Cayman 16xMSAA */
  50 static const uint32_t sample_locs_16x[] = {
  51         FILL_SREG( 1,  1, -1, -3, -3,  2,  4, -1),
  52         FILL_SREG(-5, -2,  2,  5,  5,  3,  3, -5),
  53         FILL_SREG(-2,  6,  0, -7, -4, -6, -6,  4),
  54         FILL_SREG(-8,  0,  7, -4,  6,  7, -7, -8),
  55 };
  56
  57 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
  58                                    unsigned sample_index, float *out_value)
  59 {
  60         int offset, index;
  61         struct {
  62                 int idx:4;
  63         } val;
  64
  65         switch (sample_count) {
  66         case 1:
  67         default:
  68                 out_value[0] = out_value[1] = 0.5;
  69                 break;
  70         case 2:
  71                 offset = 4 * (sample_index * 2);
  72                 val.idx = (sample_locs_2x >> offset) & 0xf;
  73                 out_value[0] = (float)(val.idx + 8) / 16.0f;
  74                 val.idx = (sample_locs_2x >> (offset + 4)) & 0xf;
  75                 out_value[1] = (float)(val.idx + 8) / 16.0f;
  76                 break;
  77         case 4:
  78                 offset = 4 * (sample_index * 2);
  79                 val.idx = (sample_locs_4x >> offset) & 0xf;
  80                 out_value[0] = (float)(val.idx + 8) / 16.0f;
  81                 val.idx = (sample_locs_4x >> (offset + 4)) & 0xf;
  82                 out_value[1] = (float)(val.idx + 8) / 16.0f;
  83                 break;
  84         case 8:
  85                 offset = 4 * (sample_index % 4 * 2);
  86                 index = sample_index / 4;
  87                 val.idx = (sample_locs_8x[index] >> offset) & 0xf;
  88                 out_value[0] = (float)(val.idx + 8) / 16.0f;
  89                 val.idx = (sample_locs_8x[index] >> (offset + 4)) & 0xf;
  90                 out_value[1] = (float)(val.idx + 8) / 16.0f;
  91                 break;
  92         case 16:
  93                 offset = 4 * (sample_index % 4 * 2);
  94                 index = sample_index / 4;
  95                 val.idx = (sample_locs_16x[index] >> offset) & 0xf;
  96                 out_value[0] = (float)(val.idx + 8) / 16.0f;
  97                 val.idx = (sample_locs_16x[index] >> (offset + 4)) & 0xf;
  98                 out_value[1] = (float)(val.idx + 8) / 16.0f;
  99                 break;
 100         }
 101 }
 102
 103 void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
 104 {
 105         switch (nr_samples) {
 106         default:
 107         case 1:
 108                 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
 109                 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
 110                 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
 111                 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
 112                 break;
 113         case 2:
 114                 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x);
 115                 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x);
 116                 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x);
 117                 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x);
 118                 break;
 119         case 4:
 120                 radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x);
 121                 radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x);
 122                 radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x);
 123                 radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x);
 124                 break;
 125         case 8:
 126                 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
 127                 radeon_emit(cs, sample_locs_8x[0]);
 128                 radeon_emit(cs, sample_locs_8x[1]);
 129                 radeon_emit(cs, 0);
 130                 radeon_emit(cs, 0);
 131                 radeon_emit(cs, sample_locs_8x[0]);
 132                 radeon_emit(cs, sample_locs_8x[1]);
 133                 radeon_emit(cs, 0);
 134                 radeon_emit(cs, 0);
 135                 radeon_emit(cs, sample_locs_8x[0]);
 136                 radeon_emit(cs, sample_locs_8x[1]);
 137                 radeon_emit(cs, 0);
 138                 radeon_emit(cs, 0);
 139                 radeon_emit(cs, sample_locs_8x[0]);
 140                 radeon_emit(cs, sample_locs_8x[1]);
 141                 break;
 142         case 16:
 143                 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
 144                 radeon_emit(cs, sample_locs_16x[0]);
 145                 radeon_emit(cs, sample_locs_16x[1]);
 146                 radeon_emit(cs, sample_locs_16x[2]);
 147                 radeon_emit(cs, sample_locs_16x[3]);
 148                 radeon_emit(cs, sample_locs_16x[0]);
 149                 radeon_emit(cs, sample_locs_16x[1]);
 150                 radeon_emit(cs, sample_locs_16x[2]);
 151                 radeon_emit(cs, sample_locs_16x[3]);
 152                 radeon_emit(cs, sample_locs_16x[0]);
 153                 radeon_emit(cs, sample_locs_16x[1]);
 154                 radeon_emit(cs, sample_locs_16x[2]);
 155                 radeon_emit(cs, sample_locs_16x[3]);
 156                 radeon_emit(cs, sample_locs_16x[0]);
 157                 radeon_emit(cs, sample_locs_16x[1]);
 158                 radeon_emit(cs, sample_locs_16x[2]);
 159                 radeon_emit(cs, sample_locs_16x[3]);
 160                 break;
 161         }
 162 }
 163
 164 void si_init_msaa_functions(struct si_context *sctx)
 165 {
 166         int i;
 167
 168         sctx->b.get_sample_position = si_get_sample_position;
 169
 170         si_get_sample_position(&sctx->b, 1, 0, sctx->sample_locations_1x[0]);
 171
 172         for (i = 0; i < 2; i++)
 173                 si_get_sample_position(&sctx->b, 2, i, sctx->sample_locations_2x[i]);
 174         for (i = 0; i < 4; i++)
 175                 si_get_sample_position(&sctx->b, 4, i, sctx->sample_locations_4x[i]);
 176         for (i = 0; i < 8; i++)
 177                 si_get_sample_position(&sctx->b, 8, i, sctx->sample_locations_8x[i]);
 178         for (i = 0; i < 16; i++)
 179                 si_get_sample_position(&sctx->b, 16, i, sctx->sample_locations_16x[i]);
 180 }