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softpipe: add support for vertex streams (v2)
[mesa.git] / src / gallium / drivers / radeonsi / si_test_dma_perf.c
1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 */
25
26 /* This file implements tests on the si_clearbuffer function. */
27
28 #include "si_pipe.h"
29 #include "si_query.h"
30
31 #define MIN_SIZE 512
32 #define MAX_SIZE (128 * 1024 * 1024)
33 #define SIZE_SHIFT 1
34 #define NUM_RUNS 128
35
36 static double get_MBps_rate(unsigned num_bytes, unsigned ns)
37 {
38 return (num_bytes / (1024.0 * 1024.0)) / (ns / 1000000000.0);
39 }
40
41 void si_test_dma_perf(struct si_screen *sscreen)
42 {
43 struct pipe_screen *screen = &sscreen->b;
44 struct pipe_context *ctx = screen->context_create(screen, NULL, 0);
45 struct si_context *sctx = (struct si_context*)ctx;
46 const uint32_t clear_value = 0x12345678;
47 static const unsigned cs_dwords_per_thread_list[] = {64, 32, 16, 8, 4, 2, 1};
48 static const unsigned cs_waves_per_sh_list[] = {1, 2, 4, 8, 16, 0};
49
50 #define NUM_SHADERS ARRAY_SIZE(cs_dwords_per_thread_list)
51 #define NUM_METHODS (4 + 2*NUM_SHADERS * ARRAY_SIZE(cs_waves_per_sh_list))
52
53 static const char *method_str[] = {
54 "CP MC ",
55 "CP L2 ",
56 "CP L2 ",
57 "SDMA ",
58 };
59 static const char *placement_str[] = {
60 /* Clear */
61 "fill->VRAM",
62 "fill->GTT ",
63 /* Copy */
64 "VRAM->VRAM",
65 "VRAM->GTT ",
66 "GTT ->VRAM",
67 };
68
69 printf("DMA rate is in MB/s for each size. Slow cases are skipped and print 0.\n");
70 printf("Heap ,Method ,L2p,Wa,");
71 for (unsigned size = MIN_SIZE; size <= MAX_SIZE; size <<= SIZE_SHIFT) {
72 if (size >= 1024)
73 printf("%6uKB,", size / 1024);
74 else
75 printf(" %6uB,", size);
76 }
77 printf("\n");
78
79 /* results[log2(size)][placement][method][] */
80 struct si_result {
81 bool is_valid;
82 bool is_cp;
83 bool is_sdma;
84 bool is_cs;
85 unsigned cache_policy;
86 unsigned dwords_per_thread;
87 unsigned waves_per_sh;
88 unsigned score;
89 unsigned index; /* index in results[x][y][index] */
90 } results[32][ARRAY_SIZE(placement_str)][NUM_METHODS] = {};
91
92 /* Run benchmarks. */
93 for (unsigned placement = 0; placement < ARRAY_SIZE(placement_str); placement++) {
94 bool is_copy = placement >= 2;
95
96 printf("-----------,--------,---,--,");
97 for (unsigned size = MIN_SIZE; size <= MAX_SIZE; size <<= SIZE_SHIFT)
98 printf("--------,");
99 printf("\n");
100
101 for (unsigned method = 0; method < NUM_METHODS; method++) {
102 bool test_cp = method <= 2;
103 bool test_sdma = method == 3;
104 bool test_cs = method >= 4;
105 unsigned cs_method = method - 4;
106 STATIC_ASSERT(L2_STREAM + 1 == L2_LRU);
107 unsigned cs_waves_per_sh =
108 test_cs ? cs_waves_per_sh_list[cs_method / (2*NUM_SHADERS)] : 0;
109 cs_method %= 2*NUM_SHADERS;
110 unsigned cache_policy = test_cp ? method % 3 :
111 test_cs ? L2_STREAM + (cs_method / NUM_SHADERS) : 0;
112 unsigned cs_dwords_per_thread =
113 test_cs ? cs_dwords_per_thread_list[cs_method % NUM_SHADERS] : 0;
114
115 if (sctx->chip_class == SI) {
116 /* SI doesn't support CP DMA operations through L2. */
117 if (test_cp && cache_policy != L2_BYPASS)
118 continue;
119 /* WAVES_PER_SH is in multiples of 16 on SI. */
120 if (test_cs && cs_waves_per_sh % 16 != 0)
121 continue;
122 }
123
124 printf("%s ,", placement_str[placement]);
125 if (test_cs) {
126 printf("CS x%-4u,%3s,", cs_dwords_per_thread,
127 cache_policy == L2_LRU ? "LRU" :
128 cache_policy == L2_STREAM ? "Str" : "");
129 } else {
130 printf("%s,%3s,", method_str[method],
131 method == L2_LRU ? "LRU" :
132 method == L2_STREAM ? "Str" : "");
133 }
134 if (test_cs && cs_waves_per_sh)
135 printf("%2u,", cs_waves_per_sh);
136 else
137 printf(" ,");
138
139 double score = 0;
140 for (unsigned size = MIN_SIZE; size <= MAX_SIZE; size <<= SIZE_SHIFT) {
141 /* Don't test bigger sizes if it's too slow. Print 0. */
142 if (size >= 512*1024 &&
143 score < 400 * (size / (4*1024*1024))) {
144 printf("%7.0f ,", 0.0);
145 continue;
146 }
147
148 enum pipe_resource_usage dst_usage, src_usage;
149 struct pipe_resource *dst, *src;
150 struct pipe_query *q[NUM_RUNS];
151 unsigned query_type = PIPE_QUERY_TIME_ELAPSED;
152
153 if (test_sdma) {
154 if (sctx->chip_class == SI)
155 query_type = SI_QUERY_TIME_ELAPSED_SDMA_SI;
156 else
157 query_type = SI_QUERY_TIME_ELAPSED_SDMA;
158 }
159
160 if (placement == 0 || placement == 2 || placement == 4)
161 dst_usage = PIPE_USAGE_DEFAULT;
162 else
163 dst_usage = PIPE_USAGE_STREAM;
164
165 if (placement == 2 || placement == 3)
166 src_usage = PIPE_USAGE_DEFAULT;
167 else
168 src_usage = PIPE_USAGE_STREAM;
169
170 dst = pipe_buffer_create(screen, 0, dst_usage, size);
171 src = is_copy ? pipe_buffer_create(screen, 0, src_usage, size) : NULL;
172
173 /* Run tests. */
174 for (unsigned iter = 0; iter < NUM_RUNS; iter++) {
175 q[iter] = ctx->create_query(ctx, query_type, 0);
176 ctx->begin_query(ctx, q[iter]);
177
178 if (test_cp) {
179 /* CP DMA */
180 if (is_copy) {
181 si_cp_dma_copy_buffer(sctx, dst, src, 0, 0, size, 0,
182 SI_COHERENCY_NONE, cache_policy);
183 } else {
184 si_cp_dma_clear_buffer(sctx, sctx->gfx_cs, dst, 0, size,
185 clear_value, 0,
186 SI_COHERENCY_NONE, cache_policy);
187 }
188 } else if (test_sdma) {
189 /* SDMA */
190 if (is_copy) {
191 struct pipe_box box;
192 u_box_1d(0, size, &box);
193 sctx->dma_copy(ctx, dst, 0, 0, 0, 0, src, 0, &box);
194 } else {
195 si_sdma_clear_buffer(sctx, dst, 0, size, clear_value);
196 }
197 } else {
198 /* Compute */
199 /* The memory accesses are coalesced, meaning that the 1st instruction writes
200 * the 1st contiguous block of data for the whole wave, the 2nd instruction
201 * writes the 2nd contiguous block of data, etc.
202 */
203 unsigned instructions_per_thread = MAX2(1, cs_dwords_per_thread / 4);
204 unsigned dwords_per_instruction = cs_dwords_per_thread / instructions_per_thread;
205 unsigned dwords_per_wave = cs_dwords_per_thread * 64;
206
207 unsigned num_dwords = size / 4;
208 unsigned num_instructions = DIV_ROUND_UP(num_dwords, dwords_per_instruction);
209
210 void *cs = si_create_dma_compute_shader(ctx, cs_dwords_per_thread,
211 cache_policy == L2_STREAM, is_copy);
212
213 struct pipe_grid_info info = {};
214 info.block[0] = MIN2(64, num_instructions);
215 info.block[1] = 1;
216 info.block[2] = 1;
217 info.grid[0] = DIV_ROUND_UP(num_dwords, dwords_per_wave);
218 info.grid[1] = 1;
219 info.grid[2] = 1;
220
221 struct pipe_shader_buffer sb[2] = {};
222 sb[0].buffer = dst;
223 sb[0].buffer_size = size;
224
225 if (is_copy) {
226 sb[1].buffer = src;
227 sb[1].buffer_size = size;
228 } else {
229 for (unsigned i = 0; i < 4; i++)
230 sctx->cs_user_data[i] = clear_value;
231 }
232
233 sctx->flags |= SI_CONTEXT_INV_VMEM_L1 |
234 SI_CONTEXT_INV_SMEM_L1;
235
236 ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0,
237 is_copy ? 2 : 1, sb, 0x1);
238 ctx->bind_compute_state(ctx, cs);
239 sctx->cs_max_waves_per_sh = cs_waves_per_sh;
240
241 ctx->launch_grid(ctx, &info);
242
243 ctx->bind_compute_state(ctx, NULL);
244 ctx->delete_compute_state(ctx, cs);
245 sctx->cs_max_waves_per_sh = 0; /* disable the limit */
246
247 sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH;
248 }
249
250 /* Flush L2, so that we don't just test L2 cache performance. */
251 if (!test_sdma) {
252 sctx->flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
253 si_emit_cache_flush(sctx);
254 }
255
256 ctx->end_query(ctx, q[iter]);
257 ctx->flush(ctx, NULL, PIPE_FLUSH_ASYNC);
258 }
259 pipe_resource_reference(&dst, NULL);
260 pipe_resource_reference(&src, NULL);
261
262 /* Get results. */
263 uint64_t min = ~0ull, max = 0, total = 0;
264
265 for (unsigned iter = 0; iter < NUM_RUNS; iter++) {
266 union pipe_query_result result;
267
268 ctx->get_query_result(ctx, q[iter], true, &result);
269 ctx->destroy_query(ctx, q[iter]);
270
271 min = MIN2(min, result.u64);
272 max = MAX2(max, result.u64);
273 total += result.u64;
274 }
275
276 score = get_MBps_rate(size, total / (double)NUM_RUNS);
277 printf("%7.0f ,", score);
278 fflush(stdout);
279
280 struct si_result *r = &results[util_logbase2(size)][placement][method];
281 r->is_valid = true;
282 r->is_cp = test_cp;
283 r->is_sdma = test_sdma;
284 r->is_cs = test_cs;
285 r->cache_policy = cache_policy;
286 r->dwords_per_thread = cs_dwords_per_thread;
287 r->waves_per_sh = cs_waves_per_sh;
288 r->score = score;
289 r->index = method;
290 }
291 puts("");
292 }
293 }
294
295 puts("");
296 puts("static struct si_method");
297 printf("get_best_clear_for_%s(enum radeon_bo_domain dst, uint64_t size64, bool async, bool cached)\n",
298 sctx->screen->info.name);
299 puts("{");
300 puts(" unsigned size = MIN2(size64, UINT_MAX);\n");
301
302 /* Analyze results and find the best methods. */
303 for (unsigned placement = 0; placement < ARRAY_SIZE(placement_str); placement++) {
304 if (placement == 0)
305 puts(" if (dst == RADEON_DOMAIN_VRAM) {");
306 else if (placement == 1)
307 puts(" } else { /* GTT */");
308 else if (placement == 2) {
309 puts("}");
310 puts("");
311 puts("static struct si_method");
312 printf("get_best_copy_for_%s(enum radeon_bo_domain dst, enum radeon_bo_domain src,\n",
313 sctx->screen->info.name);
314 printf(" uint64_t size64, bool async, bool cached)\n");
315 puts("{");
316 puts(" unsigned size = MIN2(size64, UINT_MAX);\n");
317 puts(" if (src == RADEON_DOMAIN_VRAM && dst == RADEON_DOMAIN_VRAM) {");
318 } else if (placement == 3)
319 puts(" } else if (src == RADEON_DOMAIN_VRAM && dst == RADEON_DOMAIN_GTT) {");
320 else
321 puts(" } else { /* GTT -> VRAM */");
322
323 for (unsigned mode = 0; mode < 3; mode++) {
324 bool async = mode == 0;
325 bool cached = mode == 1;
326
327 if (async)
328 puts(" if (async) { /* SDMA or async compute */");
329 else if (cached)
330 puts(" if (cached) { /* gfx ring */");
331 else
332 puts(" } else { /* gfx ring - uncached */");
333
334 /* The list of best chosen methods. */
335 struct si_result *methods[32];
336 unsigned method_max_size[32];
337 unsigned num_methods = 0;
338
339 for (unsigned size = MIN_SIZE; size <= MAX_SIZE; size <<= SIZE_SHIFT) {
340 /* Find the best method. */
341 struct si_result *best = NULL;
342
343 for (unsigned i = 0; i < NUM_METHODS; i++) {
344 struct si_result *r = &results[util_logbase2(size)][placement][i];
345
346 if (!r->is_valid)
347 continue;
348
349 /* Ban CP DMA clears via MC on <= VI. They are super slow
350 * on GTT, which we can get due to BO evictions.
351 */
352 if (sctx->chip_class <= VI && placement == 1 &&
353 r->is_cp && r->cache_policy == L2_BYPASS)
354 continue;
355
356 if (async) {
357 /* The following constraints for compute IBs try to limit
358 * resource usage so as not to decrease the performance
359 * of gfx IBs too much.
360 */
361
362 /* Don't use CP DMA on asynchronous rings, because
363 * the engine is shared with gfx IBs.
364 */
365 if (r->is_cp)
366 continue;
367
368 /* Don't use L2 caching on asynchronous rings to minimize
369 * L2 usage.
370 */
371 if (r->cache_policy == L2_LRU)
372 continue;
373
374 /* Asynchronous compute recommends waves_per_sh != 0
375 * to limit CU usage. */
376 if (r->is_cs && r->waves_per_sh == 0)
377 continue;
378 } else {
379 /* SDMA is always asynchronous */
380 if (r->is_sdma)
381 continue;
382
383 if (cached && r->cache_policy == L2_BYPASS)
384 continue;
385 if (!cached && r->cache_policy == L2_LRU)
386 continue;
387 }
388
389 if (!best) {
390 best = r;
391 continue;
392 }
393
394 /* Assume some measurement error. Earlier methods occupy fewer
395 * resources, so the next method is always more greedy, and we
396 * don't want to select it due to a measurement error.
397 */
398 double min_improvement = 1.03;
399
400 if (best->score * min_improvement < r->score)
401 best = r;
402 }
403
404 if (num_methods > 0) {
405 unsigned prev_index = num_methods - 1;
406 struct si_result *prev = methods[prev_index];
407 struct si_result *prev_this_size = &results[util_logbase2(size)][placement][prev->index];
408
409 /* If the best one is also the best for the previous size,
410 * just bump the size for the previous one.
411 *
412 * If there is no best, it means all methods were too slow
413 * for this size and were not tested. Use the best one for
414 * the previous size.
415 */
416 if (!best ||
417 /* If it's the same method as for the previous size: */
418 (prev->is_cp == best->is_cp &&
419 prev->is_sdma == best->is_sdma &&
420 prev->is_cs == best->is_cs &&
421 prev->cache_policy == best->cache_policy &&
422 prev->dwords_per_thread == best->dwords_per_thread &&
423 prev->waves_per_sh == best->waves_per_sh) ||
424 /* If the method for the previous size is also the best
425 * for this size: */
426 (prev_this_size->is_valid &&
427 prev_this_size->score * 1.03 > best->score)) {
428 method_max_size[prev_index] = size;
429 continue;
430 }
431 }
432
433 /* Add it to the list. */
434 assert(num_methods < ARRAY_SIZE(methods));
435 methods[num_methods] = best;
436 method_max_size[num_methods] = size;
437 num_methods++;
438 }
439
440 for (unsigned i = 0; i < num_methods; i++) {
441 struct si_result *best = methods[i];
442 unsigned size = method_max_size[i];
443
444 /* The size threshold is between the current benchmarked
445 * size and the next benchmarked size. */
446 if (i < num_methods - 1)
447 printf(" if (size <= %9u) ", (size + (size << SIZE_SHIFT)) / 2);
448 else if (i > 0)
449 printf(" else ");
450 else
451 printf(" ");
452 printf("return ");
453
454 assert(best);
455 if (best->is_cp) {
456 printf("CP_DMA(%s);\n",
457 best->cache_policy == L2_BYPASS ? "L2_BYPASS" :
458 best->cache_policy == L2_LRU ? "L2_LRU " : "L2_STREAM");
459 }
460 if (best->is_sdma)
461 printf("SDMA;\n");
462 if (best->is_cs) {
463 printf("COMPUTE(%s, %u, %u);\n",
464 best->cache_policy == L2_LRU ? "L2_LRU " : "L2_STREAM",
465 best->dwords_per_thread,
466 best->waves_per_sh);
467 }
468 }
469 }
470 puts(" }");
471 }
472 puts(" }");
473 puts("}");
474
475 ctx->destroy(ctx);
476 exit(0);
477 }