0ba3b125351a8c073603bc43498288d6dbf2a50c
[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include "si_pipe.h"
35 #include "radeon/radeon_video.h"
36 #include "radeon/radeon_uvd.h"
37 #include "radeon/radeon_vce.h"
38
39 /**
40 * creates an video buffer with an UVD compatible memory layout
41 */
42 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
43 const struct pipe_video_buffer *tmpl)
44 {
45 struct si_context *ctx = (struct si_context *)pipe;
46 struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
47 struct radeon_surface *surfaces[VL_NUM_COMPONENTS] = {};
48 struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
49 const enum pipe_format *resource_formats;
50 struct pipe_video_buffer template;
51 struct pipe_resource templ;
52 unsigned i, array_size;
53
54 assert(pipe);
55
56 /* first create the needed resources as "normal" textures */
57 resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
58 if (!resource_formats)
59 return NULL;
60
61 array_size = tmpl->interlaced ? 2 : 1;
62 template = *tmpl;
63 template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
64 template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
65
66 vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
67 /* TODO: get tiling working */
68 templ.bind = PIPE_BIND_LINEAR;
69 resources[0] = (struct r600_texture *)
70 pipe->screen->resource_create(pipe->screen, &templ);
71 if (!resources[0])
72 goto error;
73
74 if (resource_formats[1] != PIPE_FORMAT_NONE) {
75 vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
76 templ.bind = PIPE_BIND_LINEAR;
77 resources[1] = (struct r600_texture *)
78 pipe->screen->resource_create(pipe->screen, &templ);
79 if (!resources[1])
80 goto error;
81 }
82
83 if (resource_formats[2] != PIPE_FORMAT_NONE) {
84 vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
85 templ.bind = PIPE_BIND_LINEAR;
86 resources[2] = (struct r600_texture *)
87 pipe->screen->resource_create(pipe->screen, &templ);
88 if (!resources[2])
89 goto error;
90 }
91
92 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
93 if (!resources[i])
94 continue;
95
96 surfaces[i] = & resources[i]->surface;
97 pbs[i] = &resources[i]->resource.buf;
98 }
99
100 rvid_join_surfaces(ctx->b.ws, templ.bind, pbs, surfaces);
101
102 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
103 if (!resources[i])
104 continue;
105
106 /* recreate the CS handle */
107 resources[i]->resource.cs_buf = ctx->b.ws->buffer_get_cs_handle(
108 resources[i]->resource.buf);
109 resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
110 resources[i]->resource.cs_buf);
111 }
112
113 template.height *= array_size;
114 return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
115
116 error:
117 for (i = 0; i < VL_NUM_COMPONENTS; ++i)
118 pipe_resource_reference((struct pipe_resource **)&resources[i], NULL);
119
120 return NULL;
121 }
122
123 /* set the decoding target buffer offsets */
124 static struct radeon_winsys_cs_handle* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
125 {
126 struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
127 struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
128
129 msg->body.decode.dt_field_mode = buf->base.interlaced;
130
131 ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface);
132
133 return luma->resource.cs_buf;
134 }
135
136 /* get the radeon resources for VCE */
137 static void si_vce_get_buffer(struct pipe_resource *resource,
138 struct radeon_winsys_cs_handle **handle,
139 struct radeon_surface **surface)
140 {
141 struct r600_texture *res = (struct r600_texture *)resource;
142
143 if (handle)
144 *handle = res->resource.cs_buf;
145
146 if (surface)
147 *surface = &res->surface;
148 }
149
150 /**
151 * creates an UVD compatible decoder
152 */
153 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
154 const struct pipe_video_codec *templ)
155 {
156 struct si_context *ctx = (struct si_context *)context;
157
158 if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
159 return rvce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
160
161 return ruvd_create_decoder(context, templ, si_uvd_set_dtb);
162 }