radeonsi: move VS_STATE.LS_OUT_PATCH_SIZE a few bits higher to make space there
[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "si_pipe.h"
29 #include "radeon/radeon_video.h"
30 #include "radeon/radeon_uvd.h"
31 #include "radeon/radeon_vce.h"
32 #include "radeon/radeon_vcn_dec.h"
33 #include "radeon/radeon_vcn_enc.h"
34 #include "radeon/radeon_uvd_enc.h"
35 #include "util/u_video.h"
36
37 /**
38 * creates an video buffer with an UVD compatible memory layout
39 */
40 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
41 const struct pipe_video_buffer *tmpl)
42 {
43 struct pipe_video_buffer vidbuf = *tmpl;
44 /* TODO: get tiling working */
45 vidbuf.bind |= PIPE_BIND_LINEAR;
46
47 return vl_video_buffer_create_as_resource(pipe, &vidbuf);
48 }
49
50 /* set the decoding target buffer offsets */
51 static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
52 {
53 struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
54 struct si_texture *luma = (struct si_texture *)buf->resources[0];
55 struct si_texture *chroma = (struct si_texture *)buf->resources[1];
56 enum ruvd_surface_type type = (sscreen->info.chip_class >= GFX9) ?
57 RUVD_SURFACE_TYPE_GFX9 :
58 RUVD_SURFACE_TYPE_LEGACY;
59
60 msg->body.decode.dt_field_mode = buf->base.interlaced;
61
62 si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
63
64 return luma->buffer.buf;
65 }
66
67 /* get the radeon resources for VCE */
68 static void si_vce_get_buffer(struct pipe_resource *resource,
69 struct pb_buffer **handle,
70 struct radeon_surf **surface)
71 {
72 struct si_texture *res = (struct si_texture *)resource;
73
74 if (handle)
75 *handle = res->buffer.buf;
76
77 if (surface)
78 *surface = &res->surface;
79 }
80
81 /**
82 * creates an UVD compatible decoder
83 */
84 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
85 const struct pipe_video_codec *templ)
86 {
87 struct si_context *ctx = (struct si_context *)context;
88 bool vcn = ctx->family >= CHIP_RAVEN;
89
90 if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
91 if (vcn) {
92 return radeon_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
93 } else {
94 if (u_reduce_video_profile(templ->profile) == PIPE_VIDEO_FORMAT_HEVC)
95 return radeon_uvd_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
96 else
97 return si_vce_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
98 }
99 }
100
101 return (vcn) ? radeon_create_decoder(context, templ) :
102 si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
103 }