src/gallium/drivers/radeonsi/si_uvd.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2011 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include "si_pipe.h"
  35 #include "radeon/radeon_video.h"
  36 #include "radeon/radeon_uvd.h"
  37 #include "radeon/radeon_vce.h"
  38 #include "radeon/radeon_vcn_dec.h"
  39
  40 /**
  41  * creates an video buffer with an UVD compatible memory layout
  42  */
  43 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
  44                                                  const struct pipe_video_buffer *tmpl)
  45 {
  46         struct si_context *ctx = (struct si_context *)pipe;
  47         struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
  48         struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
  49         struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
  50         const enum pipe_format *resource_formats;
  51         struct pipe_video_buffer vidtemplate;
  52         struct pipe_resource templ;
  53         unsigned i, array_size;
  54
  55         assert(pipe);
  56
  57         /* first create the needed resources as "normal" textures */
  58         resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
  59         if (!resource_formats)
  60                 return NULL;
  61
  62         array_size = tmpl->interlaced ? 2 : 1;
  63         vidtemplate = *tmpl;
  64         vidtemplate.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
  65         vidtemplate.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
  66
  67         assert(resource_formats[0] != PIPE_FORMAT_NONE);
  68
  69         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  70                 if (resource_formats[i] != PIPE_FORMAT_NONE) {
  71                         vl_video_buffer_template(&templ, &vidtemplate,
  72                                                  resource_formats[i], 1,
  73                                                  array_size, PIPE_USAGE_DEFAULT, i);
  74                         /* Set PIPE_BIND_SHARED to avoid reallocation in r600_texture_get_handle,
  75                          * which can't handle joined surfaces. */
  76                         /* TODO: get tiling working */
  77                         templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
  78                         resources[i] = (struct r600_texture *)
  79                                         pipe->screen->resource_create(pipe->screen, &templ);
  80                         if (!resources[i])
  81                                 goto error;
  82                 }
  83         }
  84
  85         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  86                 if (!resources[i])
  87                         continue;
  88
  89                 surfaces[i] = & resources[i]->surface;
  90                 pbs[i] = &resources[i]->resource.buf;
  91         }
  92
  93         si_vid_join_surfaces(&ctx->b, pbs, surfaces);
  94
  95         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  96                 if (!resources[i])
  97                         continue;
  98
  99                 /* reset the address */
 100                 resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
 101                         resources[i]->resource.buf);
 102         }
 103
 104         vidtemplate.height *= array_size;
 105         return vl_video_buffer_create_ex2(pipe, &vidtemplate, (struct pipe_resource **)resources);
 106
 107 error:
 108         for (i = 0; i < VL_NUM_COMPONENTS; ++i)
 109                 r600_texture_reference(&resources[i], NULL);
 110
 111         return NULL;
 112 }
 113
 114 /* set the decoding target buffer offsets */
 115 static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
 116 {
 117         struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
 118         struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
 119         struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
 120         enum ruvd_surface_type type =  (sscreen->b.chip_class >= GFX9) ?
 121                                         RUVD_SURFACE_TYPE_GFX9 :
 122                                         RUVD_SURFACE_TYPE_LEGACY;
 123
 124         msg->body.decode.dt_field_mode = buf->base.interlaced;
 125
 126         si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
 127
 128         return luma->resource.buf;
 129 }
 130
 131 /* get the radeon resources for VCE */
 132 static void si_vce_get_buffer(struct pipe_resource *resource,
 133                               struct pb_buffer **handle,
 134                               struct radeon_surf **surface)
 135 {
 136         struct r600_texture *res = (struct r600_texture *)resource;
 137
 138         if (handle)
 139                 *handle = res->resource.buf;
 140
 141         if (surface)
 142                 *surface = &res->surface;
 143 }
 144
 145 /**
 146  * creates an UVD compatible decoder
 147  */
 148 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
 149                                                const struct pipe_video_codec *templ)
 150 {
 151         struct si_context *ctx = (struct si_context *)context;
 152         bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;
 153
 154         if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
 155                 return si_vce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
 156
 157         return (vcn) ?  radeon_create_decoder(context, templ) :
 158                 si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
 159 }