radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb
[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include "si_pipe.h"
35 #include "radeon/radeon_video.h"
36 #include "radeon/radeon_uvd.h"
37 #include "radeon/radeon_vce.h"
38 #include "radeon/radeon_vcn_dec.h"
39
40 /**
41 * creates an video buffer with an UVD compatible memory layout
42 */
43 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
44 const struct pipe_video_buffer *tmpl)
45 {
46 struct si_context *ctx = (struct si_context *)pipe;
47 struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
48 struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
49 struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
50 const enum pipe_format *resource_formats;
51 struct pipe_video_buffer template;
52 struct pipe_resource templ;
53 unsigned i, array_size;
54
55 assert(pipe);
56
57 /* first create the needed resources as "normal" textures */
58 resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
59 if (!resource_formats)
60 return NULL;
61
62 array_size = tmpl->interlaced ? 2 : 1;
63 template = *tmpl;
64 template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
65 template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
66
67 vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
68
69 /* TODO: get tiling working */
70 /* Set PIPE_BIND_SHARED to avoid reallocation in r600_texture_get_handle,
71 * which can't handle joined surfaces. */
72 unsigned bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
73
74 templ.bind = bind;
75 resources[0] = (struct r600_texture *)
76 pipe->screen->resource_create(pipe->screen, &templ);
77 if (!resources[0])
78 goto error;
79
80 if (resource_formats[1] != PIPE_FORMAT_NONE) {
81 vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
82 templ.bind = bind;
83 resources[1] = (struct r600_texture *)
84 pipe->screen->resource_create(pipe->screen, &templ);
85 if (!resources[1])
86 goto error;
87 }
88
89 if (resource_formats[2] != PIPE_FORMAT_NONE) {
90 vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
91 templ.bind = bind;
92 resources[2] = (struct r600_texture *)
93 pipe->screen->resource_create(pipe->screen, &templ);
94 if (!resources[2])
95 goto error;
96 }
97
98 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
99 if (!resources[i])
100 continue;
101
102 surfaces[i] = & resources[i]->surface;
103 pbs[i] = &resources[i]->resource.buf;
104 }
105
106 si_vid_join_surfaces(&ctx->b, pbs, surfaces);
107
108 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
109 if (!resources[i])
110 continue;
111
112 /* reset the address */
113 resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
114 resources[i]->resource.buf);
115 }
116
117 template.height *= array_size;
118 return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
119
120 error:
121 for (i = 0; i < VL_NUM_COMPONENTS; ++i)
122 r600_texture_reference(&resources[i], NULL);
123
124 return NULL;
125 }
126
127 /* set the decoding target buffer offsets */
128 static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
129 {
130 struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
131 struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
132 struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
133 enum ruvd_surface_type type = (sscreen->b.chip_class >= GFX9) ?
134 RUVD_SURFACE_TYPE_GFX9 :
135 RUVD_SURFACE_TYPE_LEGACY;
136
137 msg->body.decode.dt_field_mode = buf->base.interlaced;
138
139 si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
140
141 return luma->resource.buf;
142 }
143
144 /* get the radeon resources for VCE */
145 static void si_vce_get_buffer(struct pipe_resource *resource,
146 struct pb_buffer **handle,
147 struct radeon_surf **surface)
148 {
149 struct r600_texture *res = (struct r600_texture *)resource;
150
151 if (handle)
152 *handle = res->resource.buf;
153
154 if (surface)
155 *surface = &res->surface;
156 }
157
158 /**
159 * creates an UVD compatible decoder
160 */
161 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
162 const struct pipe_video_codec *templ)
163 {
164 struct si_context *ctx = (struct si_context *)context;
165 bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;
166
167 if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
168 return si_vce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
169
170 return (vcn) ? radeon_create_decoder(context, templ) :
171 si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
172 }