2 * Southern Islands Register documentation
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
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7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
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10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #define SI_CONFIG_REG_OFFSET 0x00008000
29 #define SI_CONFIG_REG_END 0x0000B000
30 #define SI_SH_REG_OFFSET 0x0000B000
31 #define SI_SH_REG_END 0x0000C000
32 #define SI_CONTEXT_REG_OFFSET 0x00028000
33 #define SI_CONTEXT_REG_END 0x00029000
34 #define CIK_UCONFIG_REG_OFFSET 0x00030000
35 #define CIK_UCONFIG_REG_END 0x00038000
37 #define EVENT_TYPE_CACHE_FLUSH 0x6
38 #define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10
39 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
40 #define EVENT_TYPE_ZPASS_DONE 0x15
41 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16
42 #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f
43 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20
44 #define EVENT_TYPE(x) ((x) << 0)
45 #define EVENT_INDEX(x) ((x) << 8)
46 /* 0 - any non-TS event
48 * 2 - SAMPLE_PIPELINESTAT
49 * 3 - SAMPLE_STREAMOUTSTAT*
50 * 4 - *S_PARTIAL_FLUSH
53 #define EVENT_WRITE_INV_L2 0x100000
56 #define PREDICATION_OP_CLEAR 0x0
57 #define PREDICATION_OP_ZPASS 0x1
58 #define PREDICATION_OP_PRIMCOUNT 0x2
60 #define PRED_OP(x) ((x) << 16)
62 #define PREDICATION_CONTINUE (1 << 31)
64 #define PREDICATION_HINT_WAIT (0 << 12)
65 #define PREDICATION_HINT_NOWAIT_DRAW (1 << 12)
67 #define PREDICATION_DRAW_NOT_VISIBLE (0 << 8)
68 #define PREDICATION_DRAW_VISIBLE (1 << 8)
70 #define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7
72 /* All registers defined in this packet section don't exist and the only
73 * purpose of these definitions is to define packet encoding that
74 * the IB parser understands, and also to have an accurate documentation.
77 #define PKT3_SET_BASE 0x11
78 #define PKT3_CLEAR_STATE 0x12
79 #define PKT3_INDEX_BUFFER_SIZE 0x13
80 #define PKT3_DISPATCH_DIRECT 0x15
81 #define PKT3_DISPATCH_INDIRECT 0x16
82 #define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */
83 #define PKT3_SET_PREDICATION 0x20
84 #define PKT3_COND_EXEC 0x22
85 #define PKT3_PRED_EXEC 0x23
86 #define PKT3_DRAW_INDIRECT 0x24
87 #define PKT3_DRAW_INDEX_INDIRECT 0x25
88 #define PKT3_INDEX_BASE 0x26
89 #define PKT3_DRAW_INDEX_2 0x27
90 #define PKT3_CONTEXT_CONTROL 0x28
91 #define PKT3_INDEX_TYPE 0x2A
92 #define PKT3_DRAW_INDIRECT_MULTI 0x2C
93 #define PKT3_DRAW_INDEX_AUTO 0x2D
94 #define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */
95 #define PKT3_NUM_INSTANCES 0x2F
96 #define PKT3_DRAW_INDEX_MULTI_AUTO 0x30
97 #define PKT3_INDIRECT_BUFFER_SI 0x32 /* not on CIK */
98 #define PKT3_STRMOUT_BUFFER_UPDATE 0x34
99 #define PKT3_DRAW_INDEX_OFFSET_2 0x35
100 #define PKT3_DRAW_PREAMBLE 0x36 /* new on CIK, required on GFX7.2 and later */
101 #define PKT3_WRITE_DATA 0x37
102 #define R_370_CONTROL 0x370 /* 0x[packet number][word index] */
103 #define S_370_ENGINE_SEL(x) (((x) & 0x3) << 30)
108 #define S_370_WR_CONFIRM(x) (((x) & 0x1) << 20)
109 #define S_370_WR_ONE_ADDR(x) (((x) & 0x1) << 16)
110 #define S_370_DST_SEL(x) (((x) & 0xf) << 8)
111 #define V_370_MEM_MAPPED_REGISTER 0
112 #define V_370_MEMORY_SYNC 1
113 #define V_370_TC_L2 2
115 #define V_370_RESERVED 4
116 #define V_370_MEM_ASYNC 5
117 #define R_371_DST_ADDR_LO 0x371
118 #define R_372_DST_ADDR_HI 0x372
119 #define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38
120 #define PKT3_MEM_SEMAPHORE 0x39
121 #define PKT3_MPEG_INDEX 0x3A /* not on CIK */
122 #define PKT3_WAIT_REG_MEM 0x3C
123 #define WAIT_REG_MEM_EQUAL 3
124 #define PKT3_MEM_WRITE 0x3D /* not on CIK */
125 #define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */
126 #define PKT3_COPY_DATA 0x40
127 #define COPY_DATA_SRC_SEL(x) ((x) & 0xf)
128 #define COPY_DATA_REG 0
129 #define COPY_DATA_MEM 1
130 #define COPY_DATA_PERF 4
131 #define COPY_DATA_IMM 5
132 #define COPY_DATA_DST_SEL(x) (((x) & 0xf) << 8)
133 #define COPY_DATA_COUNT_SEL (1 << 16)
134 #define COPY_DATA_WR_CONFIRM (1 << 20)
135 #define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */
136 #define PKT3_ME_INITIALIZE 0x44 /* not on CIK */
137 #define PKT3_COND_WRITE 0x45
138 #define PKT3_EVENT_WRITE 0x46
139 #define PKT3_EVENT_WRITE_EOP 0x47
140 #define PKT3_EVENT_WRITE_EOS 0x48
141 #define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */
142 #define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */
143 #define PKT3_SET_CONFIG_REG 0x68
144 #define PKT3_SET_CONTEXT_REG 0x69
145 #define PKT3_SET_SH_REG 0x76
146 #define PKT3_SET_SH_REG_OFFSET 0x77
147 #define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */
149 #define PKT_TYPE_S(x) (((x) & 0x3) << 30)
150 #define PKT_TYPE_G(x) (((x) >> 30) & 0x3)
151 #define PKT_TYPE_C 0x3FFFFFFF
152 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
153 #define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF)
154 #define PKT_COUNT_C 0xC000FFFF
155 #define PKT0_BASE_INDEX_S(x) (((x) & 0xFFFF) << 0)
156 #define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
157 #define PKT0_BASE_INDEX_C 0xFFFF0000
158 #define PKT3_IT_OPCODE_S(x) (((x) & 0xFF) << 8)
159 #define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF)
160 #define PKT3_IT_OPCODE_C 0xFFFF00FF
161 #define PKT3_PREDICATE(x) (((x) >> 0) & 0x1)
162 #define PKT3_SHADER_TYPE_S(x) (((x) & 0x1) << 1)
163 #define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count))
164 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate))
166 #define PKT3_CP_DMA 0x41
168 * 2. SRC_ADDR_LO [31:0] or DATA [31:0]
169 * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [15:0]
170 * 4. DST_ADDR_LO [31:0]
171 * 5. DST_ADDR_HI [15:0]
172 * 6. COMMAND [29:22] | BYTE_COUNT [20:0]
174 #define R_410_CP_DMA_WORD0 0x410 /* 0x[packet number][word index] */
175 #define S_410_SRC_ADDR_LO(x) ((x) & 0xffffffff)
176 #define R_411_CP_DMA_WORD1 0x411
177 #define S_411_CP_SYNC(x) (((x) & 0x1) << 31)
178 #define S_411_SRC_SEL(x) (((x) & 0x3) << 29)
179 #define V_411_SRC_ADDR 0
180 #define V_411_GDS 1 /* program SAS to 1 as well */
182 #define V_411_SRC_ADDR_TC_L2 3 /* new for CIK */
183 #define S_411_ENGINE(x) (((x) & 0x1) << 27)
186 #define S_411_DSL_SEL(x) (((x) & 0x3) << 20)
187 #define V_411_DST_ADDR 0
188 #define V_411_GDS 1 /* program DAS to 1 as well */
189 #define V_411_DST_ADDR_TC_L2 3 /* new for CIK */
190 #define S_411_SRC_ADDR_HI(x) ((x) & 0xffff)
191 #define R_412_CP_DMA_WORD2 0x412 /* 0x[packet number][word index] */
192 #define S_412_DST_ADDR_LO(x) ((x) & 0xffffffff)
193 #define R_413_CP_DMA_WORD3 0x413 /* 0x[packet number][word index] */
194 #define S_413_DST_ADDR_HI(x) ((x) & 0xffff)
195 #define R_414_COMMAND 0x414
196 #define S_414_BYTE_COUNT(x) ((x) & 0x1fffff)
197 #define S_414_DISABLE_WR_CONFIRM(x) (((x) & 0x1) << 21)
198 #define S_414_SRC_SWAP(x) (((x) & 0x3) << 22)
200 #define V_414_8_IN_16 1
201 #define V_414_8_IN_32 2
202 #define V_414_8_IN_64 3
203 #define S_414_DST_SWAP(x) (((x) & 0x3) << 24)
205 #define V_414_8_IN_16 1
206 #define V_414_8_IN_32 2
207 #define V_414_8_IN_64 3
208 #define S_414_SAS(x) (((x) & 0x1) << 26)
209 #define V_414_MEMORY 0
210 #define V_414_REGISTER 1
211 #define S_414_DAS(x) (((x) & 0x1) << 27)
212 #define V_414_MEMORY 0
213 #define V_414_REGISTER 1
214 #define S_414_SAIC(x) (((x) & 0x1) << 28)
215 #define V_414_INCREMENT 0
216 #define V_414_NO_INCREMENT 1
217 #define S_414_DAIC(x) (((x) & 0x1) << 29)
218 #define V_414_INCREMENT 0
219 #define V_414_NO_INCREMENT 1
220 #define S_414_RAW_WAIT(x) (((x) & 0x1) << 30)
222 #define PKT3_DMA_DATA 0x50 /* new for CIK */
224 * 2. CP_SYNC [31] | SRC_SEL [30:29] | DST_SEL [21:20] | ENGINE [0]
225 * 2. SRC_ADDR_LO [31:0] or DATA [31:0]
226 * 3. SRC_ADDR_HI [31:0]
227 * 4. DST_ADDR_LO [31:0]
228 * 5. DST_ADDR_HI [31:0]
229 * 6. COMMAND [29:22] | BYTE_COUNT [20:0]
231 #define R_500_DMA_DATA_WORD0 0x500 /* 0x[packet number][word index] */
232 #define S_500_CP_SYNC(x) (((x) & 0x1) << 31)
233 #define S_500_SRC_SEL(x) (((x) & 0x3) << 29)
234 #define V_500_SRC_ADDR 0
235 #define V_500_GDS 1 /* program SAS to 1 as well */
237 #define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */
238 #define S_500_DSL_SEL(x) (((x) & 0x3) << 20)
239 #define V_500_DST_ADDR 0
240 #define V_500_GDS 1 /* program DAS to 1 as well */
241 #define V_500_DST_ADDR_TC_L2 3 /* new for CIK */
242 #define S_500_ENGINE(x) ((x) & 0x1)
245 #define R_501_SRC_ADDR_LO 0x501
246 #define R_502_SRC_ADDR_HI 0x502
247 #define R_503_DST_ADDR_LO 0x503
248 #define R_504_DST_ADDR_HI 0x504
250 #define R_000E4C_SRBM_STATUS2 0x000E4C
251 #define S_000E4C_SDMA_RQ_PENDING(x) (((x) & 0x1) << 0)
252 #define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1)
253 #define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE
254 #define S_000E4C_TST_RQ_PENDING(x) (((x) & 0x1) << 1)
255 #define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1)
256 #define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD
257 #define S_000E4C_SDMA1_RQ_PENDING(x) (((x) & 0x1) << 2)
258 #define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1)
259 #define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB
260 #define S_000E4C_VCE0_RQ_PENDING(x) (((x) & 0x1) << 3)
261 #define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1)
262 #define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7
263 #define S_000E4C_VP8_BUSY(x) (((x) & 0x1) << 4)
264 #define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1)
265 #define C_000E4C_VP8_BUSY 0xFFFFFFEF
266 #define S_000E4C_SDMA_BUSY(x) (((x) & 0x1) << 5)
267 #define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1)
268 #define C_000E4C_SDMA_BUSY 0xFFFFFFDF
269 #define S_000E4C_SDMA1_BUSY(x) (((x) & 0x1) << 6)
270 #define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1)
271 #define C_000E4C_SDMA1_BUSY 0xFFFFFFBF
272 #define S_000E4C_VCE0_BUSY(x) (((x) & 0x1) << 7)
273 #define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1)
274 #define C_000E4C_VCE0_BUSY 0xFFFFFF7F
275 #define S_000E4C_XDMA_BUSY(x) (((x) & 0x1) << 8)
276 #define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1)
277 #define C_000E4C_XDMA_BUSY 0xFFFFFEFF
278 #define S_000E4C_CHUB_BUSY(x) (((x) & 0x1) << 9)
279 #define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1)
280 #define C_000E4C_CHUB_BUSY 0xFFFFFDFF
281 #define S_000E4C_SDMA2_BUSY(x) (((x) & 0x1) << 10)
282 #define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1)
283 #define C_000E4C_SDMA2_BUSY 0xFFFFFBFF
284 #define S_000E4C_SDMA3_BUSY(x) (((x) & 0x1) << 11)
285 #define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1)
286 #define C_000E4C_SDMA3_BUSY 0xFFFFF7FF
287 #define S_000E4C_SAMSCP_BUSY(x) (((x) & 0x1) << 12)
288 #define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1)
289 #define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF
290 #define S_000E4C_ISP_BUSY(x) (((x) & 0x1) << 13)
291 #define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1)
292 #define C_000E4C_ISP_BUSY 0xFFFFDFFF
293 #define S_000E4C_VCE1_BUSY(x) (((x) & 0x1) << 14)
294 #define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1)
295 #define C_000E4C_VCE1_BUSY 0xFFFFBFFF
296 #define S_000E4C_ODE_BUSY(x) (((x) & 0x1) << 15)
297 #define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1)
298 #define C_000E4C_ODE_BUSY 0xFFFF7FFF
299 #define S_000E4C_SDMA2_RQ_PENDING(x) (((x) & 0x1) << 16)
300 #define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1)
301 #define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF
302 #define S_000E4C_SDMA3_RQ_PENDING(x) (((x) & 0x1) << 17)
303 #define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1)
304 #define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF
305 #define S_000E4C_SAMSCP_RQ_PENDING(x) (((x) & 0x1) << 18)
306 #define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1)
307 #define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF
308 #define S_000E4C_ISP_RQ_PENDING(x) (((x) & 0x1) << 19)
309 #define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1)
310 #define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF
311 #define S_000E4C_VCE1_RQ_PENDING(x) (((x) & 0x1) << 20)
312 #define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1)
313 #define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF
314 #define R_000E50_SRBM_STATUS 0x000E50
315 #define S_000E50_UVD_RQ_PENDING(x) (((x) & 0x1) << 1)
316 #define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1)
317 #define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD
318 #define S_000E50_SAMMSP_RQ_PENDING(x) (((x) & 0x1) << 2)
319 #define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1)
320 #define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB
321 #define S_000E50_ACP_RQ_PENDING(x) (((x) & 0x1) << 3)
322 #define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1)
323 #define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7
324 #define S_000E50_SMU_RQ_PENDING(x) (((x) & 0x1) << 4)
325 #define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1)
326 #define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF
327 #define S_000E50_GRBM_RQ_PENDING(x) (((x) & 0x1) << 5)
328 #define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1)
329 #define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF
330 #define S_000E50_HI_RQ_PENDING(x) (((x) & 0x1) << 6)
331 #define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1)
332 #define C_000E50_HI_RQ_PENDING 0xFFFFFFBF
333 #define S_000E50_VMC_BUSY(x) (((x) & 0x1) << 8)
334 #define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1)
335 #define C_000E50_VMC_BUSY 0xFFFFFEFF
336 #define S_000E50_MCB_BUSY(x) (((x) & 0x1) << 9)
337 #define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1)
338 #define C_000E50_MCB_BUSY 0xFFFFFDFF
339 #define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) & 0x1) << 10)
340 #define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1)
341 #define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF
342 #define S_000E50_MCC_BUSY(x) (((x) & 0x1) << 11)
343 #define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1)
344 #define C_000E50_MCC_BUSY 0xFFFFF7FF
345 #define S_000E50_MCD_BUSY(x) (((x) & 0x1) << 12)
346 #define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1)
347 #define C_000E50_MCD_BUSY 0xFFFFEFFF
348 #define S_000E50_VMC1_BUSY(x) (((x) & 0x1) << 13)
349 #define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1)
350 #define C_000E50_VMC1_BUSY 0xFFFFDFFF
351 #define S_000E50_SEM_BUSY(x) (((x) & 0x1) << 14)
352 #define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1)
353 #define C_000E50_SEM_BUSY 0xFFFFBFFF
354 #define S_000E50_ACP_BUSY(x) (((x) & 0x1) << 16)
355 #define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1)
356 #define C_000E50_ACP_BUSY 0xFFFEFFFF
357 #define S_000E50_IH_BUSY(x) (((x) & 0x1) << 17)
358 #define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1)
359 #define C_000E50_IH_BUSY 0xFFFDFFFF
360 #define S_000E50_UVD_BUSY(x) (((x) & 0x1) << 19)
361 #define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1)
362 #define C_000E50_UVD_BUSY 0xFFF7FFFF
363 #define S_000E50_SAMMSP_BUSY(x) (((x) & 0x1) << 20)
364 #define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1)
365 #define C_000E50_SAMMSP_BUSY 0xFFEFFFFF
366 #define S_000E50_GCATCL2_BUSY(x) (((x) & 0x1) << 21)
367 #define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1)
368 #define C_000E50_GCATCL2_BUSY 0xFFDFFFFF
369 #define S_000E50_OSATCL2_BUSY(x) (((x) & 0x1) << 22)
370 #define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1)
371 #define C_000E50_OSATCL2_BUSY 0xFFBFFFFF
372 #define S_000E50_BIF_BUSY(x) (((x) & 0x1) << 29)
373 #define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1)
374 #define C_000E50_BIF_BUSY 0xDFFFFFFF
375 #define R_000E54_SRBM_STATUS3 0x000E54
376 #define S_000E54_MCC0_BUSY(x) (((x) & 0x1) << 0)
377 #define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1)
378 #define C_000E54_MCC0_BUSY 0xFFFFFFFE
379 #define S_000E54_MCC1_BUSY(x) (((x) & 0x1) << 1)
380 #define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1)
381 #define C_000E54_MCC1_BUSY 0xFFFFFFFD
382 #define S_000E54_MCC2_BUSY(x) (((x) & 0x1) << 2)
383 #define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1)
384 #define C_000E54_MCC2_BUSY 0xFFFFFFFB
385 #define S_000E54_MCC3_BUSY(x) (((x) & 0x1) << 3)
386 #define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1)
387 #define C_000E54_MCC3_BUSY 0xFFFFFFF7
388 #define S_000E54_MCC4_BUSY(x) (((x) & 0x1) << 4)
389 #define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1)
390 #define C_000E54_MCC4_BUSY 0xFFFFFFEF
391 #define S_000E54_MCC5_BUSY(x) (((x) & 0x1) << 5)
392 #define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1)
393 #define C_000E54_MCC5_BUSY 0xFFFFFFDF
394 #define S_000E54_MCC6_BUSY(x) (((x) & 0x1) << 6)
395 #define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1)
396 #define C_000E54_MCC6_BUSY 0xFFFFFFBF
397 #define S_000E54_MCC7_BUSY(x) (((x) & 0x1) << 7)
398 #define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1)
399 #define C_000E54_MCC7_BUSY 0xFFFFFF7F
400 #define S_000E54_MCD0_BUSY(x) (((x) & 0x1) << 8)
401 #define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1)
402 #define C_000E54_MCD0_BUSY 0xFFFFFEFF
403 #define S_000E54_MCD1_BUSY(x) (((x) & 0x1) << 9)
404 #define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1)
405 #define C_000E54_MCD1_BUSY 0xFFFFFDFF
406 #define S_000E54_MCD2_BUSY(x) (((x) & 0x1) << 10)
407 #define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1)
408 #define C_000E54_MCD2_BUSY 0xFFFFFBFF
409 #define S_000E54_MCD3_BUSY(x) (((x) & 0x1) << 11)
410 #define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1)
411 #define C_000E54_MCD3_BUSY 0xFFFFF7FF
412 #define S_000E54_MCD4_BUSY(x) (((x) & 0x1) << 12)
413 #define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1)
414 #define C_000E54_MCD4_BUSY 0xFFFFEFFF
415 #define S_000E54_MCD5_BUSY(x) (((x) & 0x1) << 13)
416 #define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1)
417 #define C_000E54_MCD5_BUSY 0xFFFFDFFF
418 #define S_000E54_MCD6_BUSY(x) (((x) & 0x1) << 14)
419 #define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1)
420 #define C_000E54_MCD6_BUSY 0xFFFFBFFF
421 #define S_000E54_MCD7_BUSY(x) (((x) & 0x1) << 15)
422 #define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1)
423 #define C_000E54_MCD7_BUSY 0xFFFF7FFF
424 #define R_00D034_SDMA0_STATUS_REG 0x00D034
425 #define S_00D034_IDLE(x) (((x) & 0x1) << 0)
426 #define G_00D034_IDLE(x) (((x) >> 0) & 0x1)
427 #define C_00D034_IDLE 0xFFFFFFFE
428 #define S_00D034_REG_IDLE(x) (((x) & 0x1) << 1)
429 #define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1)
430 #define C_00D034_REG_IDLE 0xFFFFFFFD
431 #define S_00D034_RB_EMPTY(x) (((x) & 0x1) << 2)
432 #define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1)
433 #define C_00D034_RB_EMPTY 0xFFFFFFFB
434 #define S_00D034_RB_FULL(x) (((x) & 0x1) << 3)
435 #define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1)
436 #define C_00D034_RB_FULL 0xFFFFFFF7
437 #define S_00D034_RB_CMD_IDLE(x) (((x) & 0x1) << 4)
438 #define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1)
439 #define C_00D034_RB_CMD_IDLE 0xFFFFFFEF
440 #define S_00D034_RB_CMD_FULL(x) (((x) & 0x1) << 5)
441 #define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1)
442 #define C_00D034_RB_CMD_FULL 0xFFFFFFDF
443 #define S_00D034_IB_CMD_IDLE(x) (((x) & 0x1) << 6)
444 #define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1)
445 #define C_00D034_IB_CMD_IDLE 0xFFFFFFBF
446 #define S_00D034_IB_CMD_FULL(x) (((x) & 0x1) << 7)
447 #define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1)
448 #define C_00D034_IB_CMD_FULL 0xFFFFFF7F
449 #define S_00D034_BLOCK_IDLE(x) (((x) & 0x1) << 8)
450 #define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1)
451 #define C_00D034_BLOCK_IDLE 0xFFFFFEFF
452 #define S_00D034_INSIDE_IB(x) (((x) & 0x1) << 9)
453 #define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1)
454 #define C_00D034_INSIDE_IB 0xFFFFFDFF
455 #define S_00D034_EX_IDLE(x) (((x) & 0x1) << 10)
456 #define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1)
457 #define C_00D034_EX_IDLE 0xFFFFFBFF
458 #define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) & 0x1) << 11)
459 #define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1)
460 #define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF
461 #define S_00D034_PACKET_READY(x) (((x) & 0x1) << 12)
462 #define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1)
463 #define C_00D034_PACKET_READY 0xFFFFEFFF
464 #define S_00D034_MC_WR_IDLE(x) (((x) & 0x1) << 13)
465 #define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1)
466 #define C_00D034_MC_WR_IDLE 0xFFFFDFFF
467 #define S_00D034_SRBM_IDLE(x) (((x) & 0x1) << 14)
468 #define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1)
469 #define C_00D034_SRBM_IDLE 0xFFFFBFFF
470 #define S_00D034_CONTEXT_EMPTY(x) (((x) & 0x1) << 15)
471 #define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1)
472 #define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF
473 #define S_00D034_DELTA_RPTR_FULL(x) (((x) & 0x1) << 16)
474 #define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1)
475 #define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF
476 #define S_00D034_RB_MC_RREQ_IDLE(x) (((x) & 0x1) << 17)
477 #define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1)
478 #define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF
479 #define S_00D034_IB_MC_RREQ_IDLE(x) (((x) & 0x1) << 18)
480 #define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1)
481 #define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF
482 #define S_00D034_MC_RD_IDLE(x) (((x) & 0x1) << 19)
483 #define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1)
484 #define C_00D034_MC_RD_IDLE 0xFFF7FFFF
485 #define S_00D034_DELTA_RPTR_EMPTY(x) (((x) & 0x1) << 20)
486 #define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1)
487 #define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF
488 #define S_00D034_MC_RD_RET_STALL(x) (((x) & 0x1) << 21)
489 #define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1)
490 #define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF
491 #define S_00D034_MC_RD_NO_POLL_IDLE(x) (((x) & 0x1) << 22)
492 #define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1)
493 #define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF
494 #define S_00D034_PREV_CMD_IDLE(x) (((x) & 0x1) << 25)
495 #define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1)
496 #define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF
497 #define S_00D034_SEM_IDLE(x) (((x) & 0x1) << 26)
498 #define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1)
499 #define C_00D034_SEM_IDLE 0xFBFFFFFF
500 #define S_00D034_SEM_REQ_STALL(x) (((x) & 0x1) << 27)
501 #define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1)
502 #define C_00D034_SEM_REQ_STALL 0xF7FFFFFF
503 #define S_00D034_SEM_RESP_STATE(x) (((x) & 0x03) << 28)
504 #define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x03)
505 #define C_00D034_SEM_RESP_STATE 0xCFFFFFFF
506 #define S_00D034_INT_IDLE(x) (((x) & 0x1) << 30)
507 #define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1)
508 #define C_00D034_INT_IDLE 0xBFFFFFFF
509 #define S_00D034_INT_REQ_STALL(x) (((x) & 0x1) << 31)
510 #define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1)
511 #define C_00D034_INT_REQ_STALL 0x7FFFFFFF
512 #define R_00D834_SDMA1_STATUS_REG 0x00D834
513 #define R_008008_GRBM_STATUS2 0x008008
514 #define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) & 0x0F) << 0)
515 #define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F)
516 #define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0
517 #define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) & 0x1) << 4)
518 #define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1)
519 #define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF
520 #define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) & 0x1) << 5)
521 #define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1)
522 #define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF
523 #define S_008008_ME1PIPE0_RQ_PENDING(x) (((x) & 0x1) << 6)
524 #define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1)
525 #define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF
526 #define S_008008_ME1PIPE1_RQ_PENDING(x) (((x) & 0x1) << 7)
527 #define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1)
528 #define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F
529 #define S_008008_ME1PIPE2_RQ_PENDING(x) (((x) & 0x1) << 8)
530 #define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1)
531 #define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF
532 #define S_008008_ME1PIPE3_RQ_PENDING(x) (((x) & 0x1) << 9)
533 #define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1)
534 #define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF
535 #define S_008008_ME2PIPE0_RQ_PENDING(x) (((x) & 0x1) << 10)
536 #define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1)
537 #define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF
538 #define S_008008_ME2PIPE1_RQ_PENDING(x) (((x) & 0x1) << 11)
539 #define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1)
540 #define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF
541 #define S_008008_ME2PIPE2_RQ_PENDING(x) (((x) & 0x1) << 12)
542 #define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1)
543 #define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF
544 #define S_008008_ME2PIPE3_RQ_PENDING(x) (((x) & 0x1) << 13)
545 #define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1)
546 #define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF
547 #define S_008008_RLC_RQ_PENDING(x) (((x) & 0x1) << 14)
548 #define G_008008_RLC_RQ_PENDING(x) (((x) >> 14) & 0x1)
549 #define C_008008_RLC_RQ_PENDING 0xFFFFBFFF
550 #define S_008008_RLC_BUSY(x) (((x) & 0x1) << 24)
551 #define G_008008_RLC_BUSY(x) (((x) >> 24) & 0x1)
552 #define C_008008_RLC_BUSY 0xFEFFFFFF
553 #define S_008008_TC_BUSY(x) (((x) & 0x1) << 25)
554 #define G_008008_TC_BUSY(x) (((x) >> 25) & 0x1)
555 #define C_008008_TC_BUSY 0xFDFFFFFF
556 #define S_008008_TCC_CC_RESIDENT(x) (((x) & 0x1) << 26)
557 #define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1)
558 #define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF
559 #define S_008008_CPF_BUSY(x) (((x) & 0x1) << 28)
560 #define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1)
561 #define C_008008_CPF_BUSY 0xEFFFFFFF
562 #define S_008008_CPC_BUSY(x) (((x) & 0x1) << 29)
563 #define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1)
564 #define C_008008_CPC_BUSY 0xDFFFFFFF
565 #define S_008008_CPG_BUSY(x) (((x) & 0x1) << 30)
566 #define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1)
567 #define C_008008_CPG_BUSY 0xBFFFFFFF
568 #define R_008010_GRBM_STATUS 0x008010
569 #define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) & 0x0F) << 0)
570 #define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F)
571 #define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0
572 #define S_008010_SRBM_RQ_PENDING(x) (((x) & 0x1) << 5)
573 #define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1)
574 #define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF
575 #define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) & 0x1) << 7)
576 #define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1)
577 #define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F
578 #define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) & 0x1) << 8)
579 #define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1)
580 #define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF
581 #define S_008010_GDS_DMA_RQ_PENDING(x) (((x) & 0x1) << 9)
582 #define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1)
583 #define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF
584 #define S_008010_DB_CLEAN(x) (((x) & 0x1) << 12)
585 #define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1)
586 #define C_008010_DB_CLEAN 0xFFFFEFFF
587 #define S_008010_CB_CLEAN(x) (((x) & 0x1) << 13)
588 #define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1)
589 #define C_008010_CB_CLEAN 0xFFFFDFFF
590 #define S_008010_TA_BUSY(x) (((x) & 0x1) << 14)
591 #define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1)
592 #define C_008010_TA_BUSY 0xFFFFBFFF
593 #define S_008010_GDS_BUSY(x) (((x) & 0x1) << 15)
594 #define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1)
595 #define C_008010_GDS_BUSY 0xFFFF7FFF
596 #define S_008010_WD_BUSY_NO_DMA(x) (((x) & 0x1) << 16)
597 #define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1)
598 #define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF
599 #define S_008010_VGT_BUSY(x) (((x) & 0x1) << 17)
600 #define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1)
601 #define C_008010_VGT_BUSY 0xFFFDFFFF
602 #define S_008010_IA_BUSY_NO_DMA(x) (((x) & 0x1) << 18)
603 #define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1)
604 #define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF
605 #define S_008010_IA_BUSY(x) (((x) & 0x1) << 19)
606 #define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1)
607 #define C_008010_IA_BUSY 0xFFF7FFFF
608 #define S_008010_SX_BUSY(x) (((x) & 0x1) << 20)
609 #define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1)
610 #define C_008010_SX_BUSY 0xFFEFFFFF
611 #define S_008010_WD_BUSY(x) (((x) & 0x1) << 21)
612 #define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1)
613 #define C_008010_WD_BUSY 0xFFDFFFFF
614 #define S_008010_SPI_BUSY(x) (((x) & 0x1) << 22)
615 #define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1)
616 #define C_008010_SPI_BUSY 0xFFBFFFFF
617 #define S_008010_BCI_BUSY(x) (((x) & 0x1) << 23)
618 #define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1)
619 #define C_008010_BCI_BUSY 0xFF7FFFFF
620 #define S_008010_SC_BUSY(x) (((x) & 0x1) << 24)
621 #define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1)
622 #define C_008010_SC_BUSY 0xFEFFFFFF
623 #define S_008010_PA_BUSY(x) (((x) & 0x1) << 25)
624 #define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1)
625 #define C_008010_PA_BUSY 0xFDFFFFFF
626 #define S_008010_DB_BUSY(x) (((x) & 0x1) << 26)
627 #define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1)
628 #define C_008010_DB_BUSY 0xFBFFFFFF
629 #define S_008010_CP_COHERENCY_BUSY(x) (((x) & 0x1) << 28)
630 #define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1)
631 #define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF
632 #define S_008010_CP_BUSY(x) (((x) & 0x1) << 29)
633 #define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1)
634 #define C_008010_CP_BUSY 0xDFFFFFFF
635 #define S_008010_CB_BUSY(x) (((x) & 0x1) << 30)
636 #define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1)
637 #define C_008010_CB_BUSY 0xBFFFFFFF
638 #define S_008010_GUI_ACTIVE(x) (((x) & 0x1) << 31)
639 #define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
640 #define C_008010_GUI_ACTIVE 0x7FFFFFFF
641 #define GRBM_GFX_INDEX 0x802C
642 #define INSTANCE_INDEX(x) ((x) << 0)
643 #define SH_INDEX(x) ((x) << 8)
644 #define SE_INDEX(x) ((x) << 16)
645 #define SH_BROADCAST_WRITES (1 << 29)
646 #define INSTANCE_BROADCAST_WRITES (1 << 30)
647 #define SE_BROADCAST_WRITES (1 << 31)
648 #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC
649 #define S_0084FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0)
650 #define R_0085F0_CP_COHER_CNTL 0x0085F0
651 #define S_0085F0_DEST_BASE_0_ENA(x) (((x) & 0x1) << 0)
652 #define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1)
653 #define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE
654 #define S_0085F0_DEST_BASE_1_ENA(x) (((x) & 0x1) << 1)
655 #define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1)
656 #define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD
657 #define S_0085F0_CB0_DEST_BASE_ENA(x) (((x) & 0x1) << 6)
658 #define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1)
659 #define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF
660 #define S_0085F0_CB1_DEST_BASE_ENA(x) (((x) & 0x1) << 7)
661 #define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1)
662 #define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F
663 #define S_0085F0_CB2_DEST_BASE_ENA(x) (((x) & 0x1) << 8)
664 #define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1)
665 #define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF
666 #define S_0085F0_CB3_DEST_BASE_ENA(x) (((x) & 0x1) << 9)
667 #define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1)
668 #define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF
669 #define S_0085F0_CB4_DEST_BASE_ENA(x) (((x) & 0x1) << 10)
670 #define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1)
671 #define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF
672 #define S_0085F0_CB5_DEST_BASE_ENA(x) (((x) & 0x1) << 11)
673 #define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1)
674 #define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF
675 #define S_0085F0_CB6_DEST_BASE_ENA(x) (((x) & 0x1) << 12)
676 #define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1)
677 #define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF
678 #define S_0085F0_CB7_DEST_BASE_ENA(x) (((x) & 0x1) << 13)
679 #define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1)
680 #define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF
681 #define S_0085F0_DB_DEST_BASE_ENA(x) (((x) & 0x1) << 14)
682 #define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1)
683 #define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF
684 #define S_0085F0_DEST_BASE_2_ENA(x) (((x) & 0x1) << 19)
685 #define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1)
686 #define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF
687 #define S_0085F0_DEST_BASE_3_ENA(x) (((x) & 0x1) << 21)
688 #define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1)
689 #define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF
690 #define S_0085F0_TCL1_ACTION_ENA(x) (((x) & 0x1) << 22)
691 #define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1)
692 #define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF
693 #define S_0085F0_TC_ACTION_ENA(x) (((x) & 0x1) << 23)
694 #define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1)
695 #define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF
696 #define S_0085F0_CB_ACTION_ENA(x) (((x) & 0x1) << 25)
697 #define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1)
698 #define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF
699 #define S_0085F0_DB_ACTION_ENA(x) (((x) & 0x1) << 26)
700 #define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1)
701 #define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF
702 #define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) & 0x1) << 27)
703 #define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1)
704 #define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF
705 #define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) & 0x1) << 29)
706 #define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1)
707 #define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF
708 #define R_0085F4_CP_COHER_SIZE 0x0085F4
709 #define R_0085F8_CP_COHER_BASE 0x0085F8
710 #define R_008014_GRBM_STATUS_SE0 0x008014
711 #define S_008014_DB_CLEAN(x) (((x) & 0x1) << 1)
712 #define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1)
713 #define C_008014_DB_CLEAN 0xFFFFFFFD
714 #define S_008014_CB_CLEAN(x) (((x) & 0x1) << 2)
715 #define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1)
716 #define C_008014_CB_CLEAN 0xFFFFFFFB
717 #define S_008014_BCI_BUSY(x) (((x) & 0x1) << 22)
718 #define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1)
719 #define C_008014_BCI_BUSY 0xFFBFFFFF
720 #define S_008014_VGT_BUSY(x) (((x) & 0x1) << 23)
721 #define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1)
722 #define C_008014_VGT_BUSY 0xFF7FFFFF
723 #define S_008014_PA_BUSY(x) (((x) & 0x1) << 24)
724 #define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1)
725 #define C_008014_PA_BUSY 0xFEFFFFFF
726 #define S_008014_TA_BUSY(x) (((x) & 0x1) << 25)
727 #define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1)
728 #define C_008014_TA_BUSY 0xFDFFFFFF
729 #define S_008014_SX_BUSY(x) (((x) & 0x1) << 26)
730 #define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1)
731 #define C_008014_SX_BUSY 0xFBFFFFFF
732 #define S_008014_SPI_BUSY(x) (((x) & 0x1) << 27)
733 #define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1)
734 #define C_008014_SPI_BUSY 0xF7FFFFFF
735 #define S_008014_SC_BUSY(x) (((x) & 0x1) << 29)
736 #define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1)
737 #define C_008014_SC_BUSY 0xDFFFFFFF
738 #define S_008014_DB_BUSY(x) (((x) & 0x1) << 30)
739 #define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1)
740 #define C_008014_DB_BUSY 0xBFFFFFFF
741 #define S_008014_CB_BUSY(x) (((x) & 0x1) << 31)
742 #define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1)
743 #define C_008014_CB_BUSY 0x7FFFFFFF
744 #define R_008018_GRBM_STATUS_SE1 0x008018
745 #define S_008018_DB_CLEAN(x) (((x) & 0x1) << 1)
746 #define G_008018_DB_CLEAN(x) (((x) >> 1) & 0x1)
747 #define C_008018_DB_CLEAN 0xFFFFFFFD
748 #define S_008018_CB_CLEAN(x) (((x) & 0x1) << 2)
749 #define G_008018_CB_CLEAN(x) (((x) >> 2) & 0x1)
750 #define C_008018_CB_CLEAN 0xFFFFFFFB
751 #define S_008018_BCI_BUSY(x) (((x) & 0x1) << 22)
752 #define G_008018_BCI_BUSY(x) (((x) >> 22) & 0x1)
753 #define C_008018_BCI_BUSY 0xFFBFFFFF
754 #define S_008018_VGT_BUSY(x) (((x) & 0x1) << 23)
755 #define G_008018_VGT_BUSY(x) (((x) >> 23) & 0x1)
756 #define C_008018_VGT_BUSY 0xFF7FFFFF
757 #define S_008018_PA_BUSY(x) (((x) & 0x1) << 24)
758 #define G_008018_PA_BUSY(x) (((x) >> 24) & 0x1)
759 #define C_008018_PA_BUSY 0xFEFFFFFF
760 #define S_008018_TA_BUSY(x) (((x) & 0x1) << 25)
761 #define G_008018_TA_BUSY(x) (((x) >> 25) & 0x1)
762 #define C_008018_TA_BUSY 0xFDFFFFFF
763 #define S_008018_SX_BUSY(x) (((x) & 0x1) << 26)
764 #define G_008018_SX_BUSY(x) (((x) >> 26) & 0x1)
765 #define C_008018_SX_BUSY 0xFBFFFFFF
766 #define S_008018_SPI_BUSY(x) (((x) & 0x1) << 27)
767 #define G_008018_SPI_BUSY(x) (((x) >> 27) & 0x1)
768 #define C_008018_SPI_BUSY 0xF7FFFFFF
769 #define S_008018_SC_BUSY(x) (((x) & 0x1) << 29)
770 #define G_008018_SC_BUSY(x) (((x) >> 29) & 0x1)
771 #define C_008018_SC_BUSY 0xDFFFFFFF
772 #define S_008018_DB_BUSY(x) (((x) & 0x1) << 30)
773 #define G_008018_DB_BUSY(x) (((x) >> 30) & 0x1)
774 #define C_008018_DB_BUSY 0xBFFFFFFF
775 #define S_008018_CB_BUSY(x) (((x) & 0x1) << 31)
776 #define G_008018_CB_BUSY(x) (((x) >> 31) & 0x1)
777 #define C_008018_CB_BUSY 0x7FFFFFFF
778 #define R_008038_GRBM_STATUS_SE2 0x008038
779 #define S_008038_DB_CLEAN(x) (((x) & 0x1) << 1)
780 #define G_008038_DB_CLEAN(x) (((x) >> 1) & 0x1)
781 #define C_008038_DB_CLEAN 0xFFFFFFFD
782 #define S_008038_CB_CLEAN(x) (((x) & 0x1) << 2)
783 #define G_008038_CB_CLEAN(x) (((x) >> 2) & 0x1)
784 #define C_008038_CB_CLEAN 0xFFFFFFFB
785 #define S_008038_BCI_BUSY(x) (((x) & 0x1) << 22)
786 #define G_008038_BCI_BUSY(x) (((x) >> 22) & 0x1)
787 #define C_008038_BCI_BUSY 0xFFBFFFFF
788 #define S_008038_VGT_BUSY(x) (((x) & 0x1) << 23)
789 #define G_008038_VGT_BUSY(x) (((x) >> 23) & 0x1)
790 #define C_008038_VGT_BUSY 0xFF7FFFFF
791 #define S_008038_PA_BUSY(x) (((x) & 0x1) << 24)
792 #define G_008038_PA_BUSY(x) (((x) >> 24) & 0x1)
793 #define C_008038_PA_BUSY 0xFEFFFFFF
794 #define S_008038_TA_BUSY(x) (((x) & 0x1) << 25)
795 #define G_008038_TA_BUSY(x) (((x) >> 25) & 0x1)
796 #define C_008038_TA_BUSY 0xFDFFFFFF
797 #define S_008038_SX_BUSY(x) (((x) & 0x1) << 26)
798 #define G_008038_SX_BUSY(x) (((x) >> 26) & 0x1)
799 #define C_008038_SX_BUSY 0xFBFFFFFF
800 #define S_008038_SPI_BUSY(x) (((x) & 0x1) << 27)
801 #define G_008038_SPI_BUSY(x) (((x) >> 27) & 0x1)
802 #define C_008038_SPI_BUSY 0xF7FFFFFF
803 #define S_008038_SC_BUSY(x) (((x) & 0x1) << 29)
804 #define G_008038_SC_BUSY(x) (((x) >> 29) & 0x1)
805 #define C_008038_SC_BUSY 0xDFFFFFFF
806 #define S_008038_DB_BUSY(x) (((x) & 0x1) << 30)
807 #define G_008038_DB_BUSY(x) (((x) >> 30) & 0x1)
808 #define C_008038_DB_BUSY 0xBFFFFFFF
809 #define S_008038_CB_BUSY(x) (((x) & 0x1) << 31)
810 #define G_008038_CB_BUSY(x) (((x) >> 31) & 0x1)
811 #define C_008038_CB_BUSY 0x7FFFFFFF
812 #define R_00803C_GRBM_STATUS_SE3 0x00803C
813 #define S_00803C_DB_CLEAN(x) (((x) & 0x1) << 1)
814 #define G_00803C_DB_CLEAN(x) (((x) >> 1) & 0x1)
815 #define C_00803C_DB_CLEAN 0xFFFFFFFD
816 #define S_00803C_CB_CLEAN(x) (((x) & 0x1) << 2)
817 #define G_00803C_CB_CLEAN(x) (((x) >> 2) & 0x1)
818 #define C_00803C_CB_CLEAN 0xFFFFFFFB
819 #define S_00803C_BCI_BUSY(x) (((x) & 0x1) << 22)
820 #define G_00803C_BCI_BUSY(x) (((x) >> 22) & 0x1)
821 #define C_00803C_BCI_BUSY 0xFFBFFFFF
822 #define S_00803C_VGT_BUSY(x) (((x) & 0x1) << 23)
823 #define G_00803C_VGT_BUSY(x) (((x) >> 23) & 0x1)
824 #define C_00803C_VGT_BUSY 0xFF7FFFFF
825 #define S_00803C_PA_BUSY(x) (((x) & 0x1) << 24)
826 #define G_00803C_PA_BUSY(x) (((x) >> 24) & 0x1)
827 #define C_00803C_PA_BUSY 0xFEFFFFFF
828 #define S_00803C_TA_BUSY(x) (((x) & 0x1) << 25)
829 #define G_00803C_TA_BUSY(x) (((x) >> 25) & 0x1)
830 #define C_00803C_TA_BUSY 0xFDFFFFFF
831 #define S_00803C_SX_BUSY(x) (((x) & 0x1) << 26)
832 #define G_00803C_SX_BUSY(x) (((x) >> 26) & 0x1)
833 #define C_00803C_SX_BUSY 0xFBFFFFFF
834 #define S_00803C_SPI_BUSY(x) (((x) & 0x1) << 27)
835 #define G_00803C_SPI_BUSY(x) (((x) >> 27) & 0x1)
836 #define C_00803C_SPI_BUSY 0xF7FFFFFF
837 #define S_00803C_SC_BUSY(x) (((x) & 0x1) << 29)
838 #define G_00803C_SC_BUSY(x) (((x) >> 29) & 0x1)
839 #define C_00803C_SC_BUSY 0xDFFFFFFF
840 #define S_00803C_DB_BUSY(x) (((x) & 0x1) << 30)
841 #define G_00803C_DB_BUSY(x) (((x) >> 30) & 0x1)
842 #define C_00803C_DB_BUSY 0xBFFFFFFF
843 #define S_00803C_CB_BUSY(x) (((x) & 0x1) << 31)
844 #define G_00803C_CB_BUSY(x) (((x) >> 31) & 0x1)
845 #define C_00803C_CB_BUSY 0x7FFFFFFF
847 #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC
848 #define S_0300FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0)
849 #define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1)
850 #define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE
851 #define R_0301E4_CP_COHER_BASE_HI 0x0301E4
852 #define S_0301E4_COHER_BASE_HI_256B(x) (((x) & 0xFF) << 0)
853 #define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF)
854 #define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00
855 #define R_0301EC_CP_COHER_START_DELAY 0x0301EC
856 #define S_0301EC_START_DELAY_COUNT(x) (((x) & 0x3F) << 0)
857 #define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F)
858 #define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0
859 #define R_0301F0_CP_COHER_CNTL 0x0301F0
860 #define S_0301F0_DEST_BASE_0_ENA(x) (((x) & 0x1) << 0)
861 #define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1)
862 #define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE
863 #define S_0301F0_DEST_BASE_1_ENA(x) (((x) & 0x1) << 1)
864 #define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1)
865 #define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD
867 #define S_0301F0_TC_SD_ACTION_ENA(x) (((x) & 0x1) << 2)
868 #define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1)
869 #define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB
870 #define S_0301F0_TC_NC_ACTION_ENA(x) (((x) & 0x1) << 3)
871 #define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1)
872 #define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7
874 #define S_0301F0_CB0_DEST_BASE_ENA(x) (((x) & 0x1) << 6)
875 #define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1)
876 #define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF
877 #define S_0301F0_CB1_DEST_BASE_ENA(x) (((x) & 0x1) << 7)
878 #define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1)
879 #define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F
880 #define S_0301F0_CB2_DEST_BASE_ENA(x) (((x) & 0x1) << 8)
881 #define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1)
882 #define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF
883 #define S_0301F0_CB3_DEST_BASE_ENA(x) (((x) & 0x1) << 9)
884 #define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1)
885 #define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF
886 #define S_0301F0_CB4_DEST_BASE_ENA(x) (((x) & 0x1) << 10)
887 #define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1)
888 #define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF
889 #define S_0301F0_CB5_DEST_BASE_ENA(x) (((x) & 0x1) << 11)
890 #define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1)
891 #define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF
892 #define S_0301F0_CB6_DEST_BASE_ENA(x) (((x) & 0x1) << 12)
893 #define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1)
894 #define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF
895 #define S_0301F0_CB7_DEST_BASE_ENA(x) (((x) & 0x1) << 13)
896 #define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1)
897 #define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF
898 #define S_0301F0_DB_DEST_BASE_ENA(x) (((x) & 0x1) << 14)
899 #define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1)
900 #define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF
901 #define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) & 0x1) << 15)
902 #define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1)
903 #define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF
904 #define S_0301F0_TC_VOL_ACTION_ENA(x) (((x) & 0x1) << 16) /* not on VI */
905 #define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1)
906 #define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF
907 #define S_0301F0_TC_WB_ACTION_ENA(x) (((x) & 0x1) << 18)
908 #define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1)
909 #define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF
910 #define S_0301F0_DEST_BASE_2_ENA(x) (((x) & 0x1) << 19)
911 #define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1)
912 #define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF
913 #define S_0301F0_DEST_BASE_3_ENA(x) (((x) & 0x1) << 21)
914 #define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1)
915 #define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF
916 #define S_0301F0_TCL1_ACTION_ENA(x) (((x) & 0x1) << 22)
917 #define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1)
918 #define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF
919 #define S_0301F0_TC_ACTION_ENA(x) (((x) & 0x1) << 23)
920 #define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1)
921 #define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF
922 #define S_0301F0_CB_ACTION_ENA(x) (((x) & 0x1) << 25)
923 #define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1)
924 #define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF
925 #define S_0301F0_DB_ACTION_ENA(x) (((x) & 0x1) << 26)
926 #define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1)
927 #define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF
928 #define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) & 0x1) << 27)
929 #define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1)
930 #define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF
931 #define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) & 0x1) << 28)
932 #define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1)
933 #define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF
934 #define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) & 0x1) << 29)
935 #define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1)
936 #define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF
938 #define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) & 0x1) << 30)
939 #define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1)
940 #define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF
941 #define S_0301F0_SH_SD_ACTION_ENA(x) (((x) & 0x1) << 31)
942 #define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1)
943 #define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF
945 #define R_0301F4_CP_COHER_SIZE 0x0301F4
946 #define R_0301F8_CP_COHER_BASE 0x0301F8
947 #define R_0301FC_CP_COHER_STATUS 0x0301FC
948 #define S_0301FC_MATCHING_GFX_CNTX(x) (((x) & 0xFF) << 0)
949 #define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF)
950 #define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00
951 #define S_0301FC_MEID(x) (((x) & 0x03) << 24)
952 #define G_0301FC_MEID(x) (((x) >> 24) & 0x03)
953 #define C_0301FC_MEID 0xFCFFFFFF
954 #define S_0301FC_PHASE1_STATUS(x) (((x) & 0x1) << 30)
955 #define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1)
956 #define C_0301FC_PHASE1_STATUS 0xBFFFFFFF
957 #define S_0301FC_STATUS(x) (((x) & 0x1) << 31)
958 #define G_0301FC_STATUS(x) (((x) >> 31) & 0x1)
959 #define C_0301FC_STATUS 0x7FFFFFFF
960 #define R_008210_CP_CPC_STATUS 0x008210
961 #define S_008210_MEC1_BUSY(x) (((x) & 0x1) << 0)
962 #define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1)
963 #define C_008210_MEC1_BUSY 0xFFFFFFFE
964 #define S_008210_MEC2_BUSY(x) (((x) & 0x1) << 1)
965 #define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1)
966 #define C_008210_MEC2_BUSY 0xFFFFFFFD
967 #define S_008210_DC0_BUSY(x) (((x) & 0x1) << 2)
968 #define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1)
969 #define C_008210_DC0_BUSY 0xFFFFFFFB
970 #define S_008210_DC1_BUSY(x) (((x) & 0x1) << 3)
971 #define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1)
972 #define C_008210_DC1_BUSY 0xFFFFFFF7
973 #define S_008210_RCIU1_BUSY(x) (((x) & 0x1) << 4)
974 #define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1)
975 #define C_008210_RCIU1_BUSY 0xFFFFFFEF
976 #define S_008210_RCIU2_BUSY(x) (((x) & 0x1) << 5)
977 #define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1)
978 #define C_008210_RCIU2_BUSY 0xFFFFFFDF
979 #define S_008210_ROQ1_BUSY(x) (((x) & 0x1) << 6)
980 #define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1)
981 #define C_008210_ROQ1_BUSY 0xFFFFFFBF
982 #define S_008210_ROQ2_BUSY(x) (((x) & 0x1) << 7)
983 #define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1)
984 #define C_008210_ROQ2_BUSY 0xFFFFFF7F
985 #define S_008210_TCIU_BUSY(x) (((x) & 0x1) << 10)
986 #define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1)
987 #define C_008210_TCIU_BUSY 0xFFFFFBFF
988 #define S_008210_SCRATCH_RAM_BUSY(x) (((x) & 0x1) << 11)
989 #define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1)
990 #define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF
991 #define S_008210_QU_BUSY(x) (((x) & 0x1) << 12)
992 #define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1)
993 #define C_008210_QU_BUSY 0xFFFFEFFF
994 #define S_008210_ATCL2IU_BUSY(x) (((x) & 0x1) << 13)
995 #define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1)
996 #define C_008210_ATCL2IU_BUSY 0xFFFFDFFF
997 #define S_008210_CPG_CPC_BUSY(x) (((x) & 0x1) << 29)
998 #define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1)
999 #define C_008210_CPG_CPC_BUSY 0xDFFFFFFF
1000 #define S_008210_CPF_CPC_BUSY(x) (((x) & 0x1) << 30)
1001 #define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1)
1002 #define C_008210_CPF_CPC_BUSY 0xBFFFFFFF
1003 #define S_008210_CPC_BUSY(x) (((x) & 0x1) << 31)
1004 #define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1)
1005 #define C_008210_CPC_BUSY 0x7FFFFFFF
1006 #define R_008214_CP_CPC_BUSY_STAT 0x008214
1007 #define S_008214_MEC1_LOAD_BUSY(x) (((x) & 0x1) << 0)
1008 #define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1)
1009 #define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE
1010 #define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) & 0x1) << 1)
1011 #define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1)
1012 #define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD
1013 #define S_008214_MEC1_MUTEX_BUSY(x) (((x) & 0x1) << 2)
1014 #define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1)
1015 #define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB
1016 #define S_008214_MEC1_MESSAGE_BUSY(x) (((x) & 0x1) << 3)
1017 #define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1)
1018 #define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7
1019 #define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) & 0x1) << 4)
1020 #define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1)
1021 #define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF
1022 #define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) & 0x1) << 5)
1023 #define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1)
1024 #define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF
1025 #define S_008214_MEC1_IB_QUEUE_BUSY(x) (((x) & 0x1) << 6)
1026 #define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1)
1027 #define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF
1028 #define S_008214_MEC1_TC_BUSY(x) (((x) & 0x1) << 7)
1029 #define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1)
1030 #define C_008214_MEC1_TC_BUSY 0xFFFFFF7F
1031 #define S_008214_MEC1_DMA_BUSY(x) (((x) & 0x1) << 8)
1032 #define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1)
1033 #define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF
1034 #define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) & 0x1) << 9)
1035 #define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1)
1036 #define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF
1037 #define S_008214_MEC1_PIPE0_BUSY(x) (((x) & 0x1) << 10)
1038 #define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1)
1039 #define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF
1040 #define S_008214_MEC1_PIPE1_BUSY(x) (((x) & 0x1) << 11)
1041 #define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1)
1042 #define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF
1043 #define S_008214_MEC1_PIPE2_BUSY(x) (((x) & 0x1) << 12)
1044 #define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1)
1045 #define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF
1046 #define S_008214_MEC1_PIPE3_BUSY(x) (((x) & 0x1) << 13)
1047 #define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1)
1048 #define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF
1049 #define S_008214_MEC2_LOAD_BUSY(x) (((x) & 0x1) << 16)
1050 #define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1)
1051 #define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF
1052 #define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) & 0x1) << 17)
1053 #define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1)
1054 #define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF
1055 #define S_008214_MEC2_MUTEX_BUSY(x) (((x) & 0x1) << 18)
1056 #define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1)
1057 #define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF
1058 #define S_008214_MEC2_MESSAGE_BUSY(x) (((x) & 0x1) << 19)
1059 #define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1)
1060 #define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF
1061 #define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) & 0x1) << 20)
1062 #define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1)
1063 #define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF
1064 #define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) & 0x1) << 21)
1065 #define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1)
1066 #define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF
1067 #define S_008214_MEC2_IB_QUEUE_BUSY(x) (((x) & 0x1) << 22)
1068 #define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1)
1069 #define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF
1070 #define S_008214_MEC2_TC_BUSY(x) (((x) & 0x1) << 23)
1071 #define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1)
1072 #define C_008214_MEC2_TC_BUSY 0xFF7FFFFF
1073 #define S_008214_MEC2_DMA_BUSY(x) (((x) & 0x1) << 24)
1074 #define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1)
1075 #define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF
1076 #define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) & 0x1) << 25)
1077 #define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1)
1078 #define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF
1079 #define S_008214_MEC2_PIPE0_BUSY(x) (((x) & 0x1) << 26)
1080 #define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1)
1081 #define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF
1082 #define S_008214_MEC2_PIPE1_BUSY(x) (((x) & 0x1) << 27)
1083 #define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1)
1084 #define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF
1085 #define S_008214_MEC2_PIPE2_BUSY(x) (((x) & 0x1) << 28)
1086 #define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1)
1087 #define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF
1088 #define S_008214_MEC2_PIPE3_BUSY(x) (((x) & 0x1) << 29)
1089 #define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1)
1090 #define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF
1091 #define R_008218_CP_CPC_STALLED_STAT1 0x008218
1092 #define S_008218_RCIU_TX_FREE_STALL(x) (((x) & 0x1) << 3)
1093 #define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1)
1094 #define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7
1095 #define S_008218_RCIU_PRIV_VIOLATION(x) (((x) & 0x1) << 4)
1096 #define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1)
1097 #define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF
1098 #define S_008218_TCIU_TX_FREE_STALL(x) (((x) & 0x1) << 6)
1099 #define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1)
1100 #define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF
1101 #define S_008218_MEC1_DECODING_PACKET(x) (((x) & 0x1) << 8)
1102 #define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1)
1103 #define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF
1104 #define S_008218_MEC1_WAIT_ON_RCIU(x) (((x) & 0x1) << 9)
1105 #define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1)
1106 #define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF
1107 #define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) & 0x1) << 10)
1108 #define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1)
1109 #define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF
1110 #define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) & 0x1) << 13)
1111 #define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1)
1112 #define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF
1113 #define S_008218_MEC2_DECODING_PACKET(x) (((x) & 0x1) << 16)
1114 #define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1)
1115 #define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF
1116 #define S_008218_MEC2_WAIT_ON_RCIU(x) (((x) & 0x1) << 17)
1117 #define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1)
1118 #define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF
1119 #define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) & 0x1) << 18)
1120 #define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1)
1121 #define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF
1122 #define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) & 0x1) << 21)
1123 #define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1)
1124 #define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF
1125 #define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) & 0x1) << 22)
1126 #define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1)
1127 #define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF
1128 #define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) & 0x1) << 23)
1129 #define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1)
1130 #define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF
1131 #define S_008218_ATCL1_WAITING_ON_TRANS(x) (((x) & 0x1) << 24)
1132 #define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1)
1133 #define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF
1134 #define R_00821C_CP_CPF_STATUS 0x00821C
1135 #define S_00821C_POST_WPTR_GFX_BUSY(x) (((x) & 0x1) << 0)
1136 #define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1)
1137 #define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE
1138 #define S_00821C_CSF_BUSY(x) (((x) & 0x1) << 1)
1139 #define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1)
1140 #define C_00821C_CSF_BUSY 0xFFFFFFFD
1141 #define S_00821C_ROQ_ALIGN_BUSY(x) (((x) & 0x1) << 4)
1142 #define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1)
1143 #define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF
1144 #define S_00821C_ROQ_RING_BUSY(x) (((x) & 0x1) << 5)
1145 #define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1)
1146 #define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF
1147 #define S_00821C_ROQ_INDIRECT1_BUSY(x) (((x) & 0x1) << 6)
1148 #define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1)
1149 #define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF
1150 #define S_00821C_ROQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 7)
1151 #define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1)
1152 #define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F
1153 #define S_00821C_ROQ_STATE_BUSY(x) (((x) & 0x1) << 8)
1154 #define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1)
1155 #define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF
1156 #define S_00821C_ROQ_CE_RING_BUSY(x) (((x) & 0x1) << 9)
1157 #define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1)
1158 #define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF
1159 #define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) & 0x1) << 10)
1160 #define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1)
1161 #define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF
1162 #define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) & 0x1) << 11)
1163 #define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1)
1164 #define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF
1165 #define S_00821C_SEMAPHORE_BUSY(x) (((x) & 0x1) << 12)
1166 #define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1)
1167 #define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF
1168 #define S_00821C_INTERRUPT_BUSY(x) (((x) & 0x1) << 13)
1169 #define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1)
1170 #define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF
1171 #define S_00821C_TCIU_BUSY(x) (((x) & 0x1) << 14)
1172 #define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1)
1173 #define C_00821C_TCIU_BUSY 0xFFFFBFFF
1174 #define S_00821C_HQD_BUSY(x) (((x) & 0x1) << 15)
1175 #define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1)
1176 #define C_00821C_HQD_BUSY 0xFFFF7FFF
1177 #define S_00821C_PRT_BUSY(x) (((x) & 0x1) << 16)
1178 #define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1)
1179 #define C_00821C_PRT_BUSY 0xFFFEFFFF
1180 #define S_00821C_ATCL2IU_BUSY(x) (((x) & 0x1) << 17)
1181 #define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1)
1182 #define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF
1183 #define S_00821C_CPF_GFX_BUSY(x) (((x) & 0x1) << 26)
1184 #define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1)
1185 #define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF
1186 #define S_00821C_CPF_CMP_BUSY(x) (((x) & 0x1) << 27)
1187 #define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1)
1188 #define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF
1189 #define S_00821C_GRBM_CPF_STAT_BUSY(x) (((x) & 0x03) << 28)
1190 #define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x03)
1191 #define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF
1192 #define S_00821C_CPC_CPF_BUSY(x) (((x) & 0x1) << 30)
1193 #define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1)
1194 #define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF
1195 #define S_00821C_CPF_BUSY(x) (((x) & 0x1) << 31)
1196 #define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1)
1197 #define C_00821C_CPF_BUSY 0x7FFFFFFF
1198 #define R_008220_CP_CPF_BUSY_STAT 0x008220
1199 #define S_008220_REG_BUS_FIFO_BUSY(x) (((x) & 0x1) << 0)
1200 #define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1)
1201 #define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE
1202 #define S_008220_CSF_RING_BUSY(x) (((x) & 0x1) << 1)
1203 #define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1)
1204 #define C_008220_CSF_RING_BUSY 0xFFFFFFFD
1205 #define S_008220_CSF_INDIRECT1_BUSY(x) (((x) & 0x1) << 2)
1206 #define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1)
1207 #define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB
1208 #define S_008220_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 3)
1209 #define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1)
1210 #define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7
1211 #define S_008220_CSF_STATE_BUSY(x) (((x) & 0x1) << 4)
1212 #define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1)
1213 #define C_008220_CSF_STATE_BUSY 0xFFFFFFEF
1214 #define S_008220_CSF_CE_INDR1_BUSY(x) (((x) & 0x1) << 5)
1215 #define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1)
1216 #define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF
1217 #define S_008220_CSF_CE_INDR2_BUSY(x) (((x) & 0x1) << 6)
1218 #define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1)
1219 #define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF
1220 #define S_008220_CSF_ARBITER_BUSY(x) (((x) & 0x1) << 7)
1221 #define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1)
1222 #define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F
1223 #define S_008220_CSF_INPUT_BUSY(x) (((x) & 0x1) << 8)
1224 #define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1)
1225 #define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF
1226 #define S_008220_OUTSTANDING_READ_TAGS(x) (((x) & 0x1) << 9)
1227 #define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1)
1228 #define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF
1229 #define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) & 0x1) << 11)
1230 #define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1)
1231 #define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF
1232 #define S_008220_HQD_DISPATCH_BUSY(x) (((x) & 0x1) << 12)
1233 #define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1)
1234 #define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF
1235 #define S_008220_HQD_IQ_TIMER_BUSY(x) (((x) & 0x1) << 13)
1236 #define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1)
1237 #define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF
1238 #define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) & 0x1) << 14)
1239 #define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1)
1240 #define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF
1241 #define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) & 0x1) << 15)
1242 #define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1)
1243 #define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF
1244 #define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) & 0x1) << 16)
1245 #define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1)
1246 #define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF
1247 #define S_008220_HQD_MESSAGE_BUSY(x) (((x) & 0x1) << 17)
1248 #define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1)
1249 #define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF
1250 #define S_008220_HQD_PQ_FETCHER_BUSY(x) (((x) & 0x1) << 18)
1251 #define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1)
1252 #define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF
1253 #define S_008220_HQD_IB_FETCHER_BUSY(x) (((x) & 0x1) << 19)
1254 #define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1)
1255 #define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF
1256 #define S_008220_HQD_IQ_FETCHER_BUSY(x) (((x) & 0x1) << 20)
1257 #define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1)
1258 #define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF
1259 #define S_008220_HQD_EOP_FETCHER_BUSY(x) (((x) & 0x1) << 21)
1260 #define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1)
1261 #define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF
1262 #define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) & 0x1) << 22)
1263 #define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1)
1264 #define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF
1265 #define S_008220_HQD_FETCHER_ARB_BUSY(x) (((x) & 0x1) << 23)
1266 #define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1)
1267 #define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF
1268 #define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) & 0x1) << 24)
1269 #define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1)
1270 #define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF
1271 #define S_008220_HQD_ROQ_EOP_BUSY(x) (((x) & 0x1) << 25)
1272 #define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1)
1273 #define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF
1274 #define S_008220_HQD_ROQ_IQ_BUSY(x) (((x) & 0x1) << 26)
1275 #define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1)
1276 #define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF
1277 #define S_008220_HQD_ROQ_PQ_BUSY(x) (((x) & 0x1) << 27)
1278 #define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1)
1279 #define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF
1280 #define S_008220_HQD_ROQ_IB_BUSY(x) (((x) & 0x1) << 28)
1281 #define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1)
1282 #define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF
1283 #define S_008220_HQD_WPTR_POLL_BUSY(x) (((x) & 0x1) << 29)
1284 #define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1)
1285 #define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF
1286 #define S_008220_HQD_PQ_BUSY(x) (((x) & 0x1) << 30)
1287 #define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1)
1288 #define C_008220_HQD_PQ_BUSY 0xBFFFFFFF
1289 #define S_008220_HQD_IB_BUSY(x) (((x) & 0x1) << 31)
1290 #define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1)
1291 #define C_008220_HQD_IB_BUSY 0x7FFFFFFF
1292 #define R_008224_CP_CPF_STALLED_STAT1 0x008224
1293 #define S_008224_RING_FETCHING_DATA(x) (((x) & 0x1) << 0)
1294 #define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1)
1295 #define C_008224_RING_FETCHING_DATA 0xFFFFFFFE
1296 #define S_008224_INDR1_FETCHING_DATA(x) (((x) & 0x1) << 1)
1297 #define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1)
1298 #define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD
1299 #define S_008224_INDR2_FETCHING_DATA(x) (((x) & 0x1) << 2)
1300 #define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1)
1301 #define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB
1302 #define S_008224_STATE_FETCHING_DATA(x) (((x) & 0x1) << 3)
1303 #define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1)
1304 #define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7
1305 #define S_008224_TCIU_WAITING_ON_FREE(x) (((x) & 0x1) << 5)
1306 #define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1)
1307 #define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF
1308 #define S_008224_TCIU_WAITING_ON_TAGS(x) (((x) & 0x1) << 6)
1309 #define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1)
1310 #define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF
1311 #define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) & 0x1) << 7)
1312 #define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1)
1313 #define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F
1314 #define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) & 0x1) << 8)
1315 #define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1)
1316 #define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF
1317 #define S_008224_ATCL1_WAITING_ON_TRANS(x) (((x) & 0x1) << 9)
1318 #define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1)
1319 #define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF
1320 #define R_030230_CP_COHER_SIZE_HI 0x030230
1321 #define S_030230_COHER_SIZE_HI_256B(x) (((x) & 0xFF) << 0)
1322 #define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF)
1323 #define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00
1325 #define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0
1326 #define S_0088B0_PRIM_COUNT(x) (((x) & 0x3FF) << 0)
1327 #define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF)
1328 #define C_0088B0_PRIM_COUNT 0xFFFFFC00
1329 #define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4
1330 #define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) & 0x1) << 5)
1331 #define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1)
1332 #define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF
1333 #define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) & 0x1) << 13)
1334 #define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1)
1335 #define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF
1336 #define S_0088C4_ES_LIMIT(x) (((x) & 0x1F) << 16)
1337 #define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F)
1338 #define C_0088C4_ES_LIMIT 0xFFE0FFFF
1339 #define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8
1340 #define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC
1341 #define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4
1342 #define S_0088D4_VERT_REUSE(x) (((x) & 0x1F) << 0)
1343 #define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F)
1344 #define C_0088D4_VERT_REUSE 0xFFFFFFE0
1345 #define R_008958_VGT_PRIMITIVE_TYPE 0x008958
1346 #define S_008958_PRIM_TYPE(x) (((x) & 0x3F) << 0)
1347 #define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F)
1348 #define C_008958_PRIM_TYPE 0xFFFFFFC0
1349 #define V_008958_DI_PT_NONE 0x00
1350 #define V_008958_DI_PT_POINTLIST 0x01
1351 #define V_008958_DI_PT_LINELIST 0x02
1352 #define V_008958_DI_PT_LINESTRIP 0x03
1353 #define V_008958_DI_PT_TRILIST 0x04
1354 #define V_008958_DI_PT_TRIFAN 0x05
1355 #define V_008958_DI_PT_TRISTRIP 0x06
1356 #define V_008958_DI_PT_UNUSED_0 0x07
1357 #define V_008958_DI_PT_UNUSED_1 0x08
1358 #define V_008958_DI_PT_PATCH 0x09
1359 #define V_008958_DI_PT_LINELIST_ADJ 0x0A
1360 #define V_008958_DI_PT_LINESTRIP_ADJ 0x0B
1361 #define V_008958_DI_PT_TRILIST_ADJ 0x0C
1362 #define V_008958_DI_PT_TRISTRIP_ADJ 0x0D
1363 #define V_008958_DI_PT_UNUSED_3 0x0E
1364 #define V_008958_DI_PT_UNUSED_4 0x0F
1365 #define V_008958_DI_PT_TRI_WITH_WFLAGS 0x10
1366 #define V_008958_DI_PT_RECTLIST 0x11
1367 #define V_008958_DI_PT_LINELOOP 0x12
1368 #define V_008958_DI_PT_QUADLIST 0x13
1369 #define V_008958_DI_PT_QUADSTRIP 0x14
1370 #define V_008958_DI_PT_POLYGON 0x15
1371 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x16
1372 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x17
1373 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x18
1374 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x19
1375 #define V_008958_DI_PT_2D_FILL_RECT_LIST 0x1A
1376 #define V_008958_DI_PT_2D_LINE_STRIP 0x1B
1377 #define V_008958_DI_PT_2D_TRI_STRIP 0x1C
1378 #define R_00895C_VGT_INDEX_TYPE 0x00895C
1379 #define S_00895C_INDEX_TYPE(x) (((x) & 0x03) << 0)
1380 #define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x03)
1381 #define C_00895C_INDEX_TYPE 0xFFFFFFFC
1382 #define V_00895C_DI_INDEX_SIZE_16_BIT 0x00
1383 #define V_00895C_DI_INDEX_SIZE_32_BIT 0x01
1384 #define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960
1385 #define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964
1386 #define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968
1387 #define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C
1388 #define R_008970_VGT_NUM_INDICES 0x008970
1389 #define R_008974_VGT_NUM_INSTANCES 0x008974
1390 #define R_008988_VGT_TF_RING_SIZE 0x008988
1391 #define S_008988_SIZE(x) (((x) & 0xFFFF) << 0)
1392 #define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF)
1393 #define C_008988_SIZE 0xFFFF0000
1394 #define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0
1395 #define S_0089B0_OFFCHIP_BUFFERING(x) (((x) & 0x7F) << 0)
1396 #define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F)
1397 #define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80
1398 #define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8
1399 #define R_008A14_PA_CL_ENHANCE 0x008A14
1400 #define S_008A14_CLIP_VTX_REORDER_ENA(x) (((x) & 0x1) << 0)
1401 #define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1)
1402 #define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE
1403 #define S_008A14_NUM_CLIP_SEQ(x) (((x) & 0x03) << 1)
1404 #define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x03)
1405 #define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9
1406 #define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) & 0x1) << 3)
1407 #define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1)
1408 #define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7
1409 #define S_008A14_VE_NAN_PROC_DISABLE(x) (((x) & 0x1) << 4)
1410 #define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1)
1411 #define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF
1412 #define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60
1413 #define S_008A60_LINE_STIPPLE_VALUE(x) (((x) & 0xFFFFFF) << 0)
1414 #define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF)
1415 #define C_008A60_LINE_STIPPLE_VALUE 0xFF000000
1416 #define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10
1417 #define S_008B10_CURRENT_PTR(x) (((x) & 0x0F) << 0)
1418 #define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0x0F)
1419 #define C_008B10_CURRENT_PTR 0xFFFFFFF0
1420 #define S_008B10_CURRENT_COUNT(x) (((x) & 0xFF) << 8)
1421 #define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF)
1422 #define C_008B10_CURRENT_COUNT 0xFFFF00FF
1423 #define R_008670_CP_STALLED_STAT3 0x008670
1424 #define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 0)
1425 #define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1)
1426 #define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE
1427 #define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 1)
1428 #define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1)
1429 #define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD
1430 #define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) & 0x1) << 2)
1431 #define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1)
1432 #define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB
1433 #define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) & 0x1) << 3)
1434 #define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1)
1435 #define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7
1436 #define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) & 0x1) << 4)
1437 #define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1)
1438 #define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF
1439 #define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) & 0x1) << 5)
1440 #define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1)
1441 #define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF
1442 #define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 6)
1443 #define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1)
1444 #define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF
1445 #define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 7)
1446 #define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1)
1447 #define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F
1448 #define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) & 0x1) << 10)
1449 #define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1)
1450 #define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF
1451 #define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) & 0x1) << 11)
1452 #define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1)
1453 #define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF
1454 #define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) & 0x1) << 12)
1455 #define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1)
1456 #define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF
1457 #define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) & 0x1) << 13)
1458 #define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1)
1459 #define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF
1460 #define S_008670_TCIU_WAITING_ON_FREE(x) (((x) & 0x1) << 14)
1461 #define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1)
1462 #define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF
1463 #define S_008670_TCIU_WAITING_ON_TAGS(x) (((x) & 0x1) << 15)
1464 #define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1)
1465 #define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF
1466 #define S_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) & 0x1) << 16)
1467 #define G_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 16) & 0x1)
1468 #define C_008670_CE_STALLED_ON_TC_WR_CONFIRM 0xFFFEFFFF
1469 #define S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) & 0x1) << 17)
1470 #define G_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 17) & 0x1)
1471 #define C_008670_CE_STALLED_ON_ATOMIC_RTN_DATA 0xFFFDFFFF
1472 #define S_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) & 0x1) << 18)
1473 #define G_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 18) & 0x1)
1474 #define C_008670_ATCL2IU_WAITING_ON_FREE 0xFFFBFFFF
1475 #define S_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) & 0x1) << 19)
1476 #define G_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 19) & 0x1)
1477 #define C_008670_ATCL2IU_WAITING_ON_TAGS 0xFFF7FFFF
1478 #define S_008670_ATCL1_WAITING_ON_TRANS(x) (((x) & 0x1) << 20)
1479 #define G_008670_ATCL1_WAITING_ON_TRANS(x) (((x) >> 20) & 0x1)
1480 #define C_008670_ATCL1_WAITING_ON_TRANS 0xFFEFFFFF
1481 #define R_008674_CP_STALLED_STAT1 0x008674
1482 #define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 0)
1483 #define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1)
1484 #define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE
1485 #define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 2)
1486 #define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1)
1487 #define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB
1488 #define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 4)
1489 #define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1)
1490 #define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF
1491 #define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) & 0x1) << 10)
1492 #define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1)
1493 #define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF
1494 #define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) & 0x1) << 11)
1495 #define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1)
1496 #define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF
1497 #define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) & 0x1) << 12)
1498 #define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1)
1499 #define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF
1500 #define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) & 0x1) << 13)
1501 #define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1)
1502 #define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF
1503 #define S_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) & 0x1) << 14)
1504 #define G_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) >> 14) & 0x1)
1505 #define C_008674_ME_WAITING_ON_TC_READ_DATA 0xFFFFBFFF
1506 #define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) & 0x1) << 15)
1507 #define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1)
1508 #define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF
1509 #define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) & 0x1) << 23)
1510 #define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1)
1511 #define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF
1512 #define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) & 0x1) << 24)
1513 #define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1)
1514 #define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF
1515 #define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) & 0x1) << 25)
1516 #define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1)
1517 #define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF
1518 #define S_008674_RCIU_STALLED_ON_ME_READ(x) (((x) & 0x1) << 26)
1519 #define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1)
1520 #define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF
1521 #define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) & 0x1) << 27)
1522 #define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1)
1523 #define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF
1524 #define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) & 0x1) << 28)
1525 #define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1)
1526 #define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF
1527 #define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) & 0x1) << 29)
1528 #define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 29) & 0x1)
1529 #define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xDFFFFFFF
1530 #define R_008678_CP_STALLED_STAT2 0x008678
1531 #define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 0)
1532 #define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1)
1533 #define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE
1534 #define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 1)
1535 #define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1)
1536 #define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD
1537 #define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 2)
1538 #define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1)
1539 #define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB
1540 #define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) & 0x1) << 4)
1541 #define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1)
1542 #define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF
1543 #define S_008678_PFP_RCIU_READ_PENDING(x) (((x) & 0x1) << 5)
1544 #define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1)
1545 #define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF
1546 #define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) & 0x1) << 8)
1547 #define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1)
1548 #define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF
1549 #define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) & 0x1) << 9)
1550 #define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1)
1551 #define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF
1552 #define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) & 0x1) << 10)
1553 #define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1)
1554 #define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF
1555 #define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) & 0x1) << 11)
1556 #define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1)
1557 #define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF
1558 #define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 12)
1559 #define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1)
1560 #define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF
1561 #define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 13)
1562 #define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1)
1563 #define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF
1564 #define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) & 0x1) << 14)
1565 #define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1)
1566 #define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF
1567 #define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) & 0x1) << 15)
1568 #define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1)
1569 #define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF
1570 #define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 16)
1571 #define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1)
1572 #define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF
1573 #define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) & 0x1) << 17)
1574 #define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1)
1575 #define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF
1576 #define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) & 0x1) << 18)
1577 #define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1)
1578 #define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF
1579 #define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) & 0x1) << 19)
1580 #define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1)
1581 #define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF
1582 #define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) & 0x1) << 20)
1583 #define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1)
1584 #define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF
1585 #define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) & 0x1) << 21)
1586 #define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1)
1587 #define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF
1588 #define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) & 0x1) << 22)
1589 #define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1)
1590 #define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF
1591 #define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) & 0x1) << 23)
1592 #define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1)
1593 #define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF
1594 #define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) & 0x1) << 24)
1595 #define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1)
1596 #define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF
1597 #define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) & 0x1) << 25)
1598 #define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1)
1599 #define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF
1600 #define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) & 0x1) << 26)
1601 #define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1)
1602 #define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF
1603 #define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) & 0x1) << 27)
1604 #define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1)
1605 #define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF
1606 #define S_008678_APPEND_ACTIVE_PARTITION(x) (((x) & 0x1) << 28)
1607 #define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1)
1608 #define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF
1609 #define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) & 0x1) << 29)
1610 #define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1)
1611 #define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF
1612 #define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) & 0x1) << 30)
1613 #define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1)
1614 #define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF
1615 #define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) & 0x1) << 31)
1616 #define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1)
1617 #define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF
1618 #define R_008680_CP_STAT 0x008680
1619 #define S_008680_ROQ_RING_BUSY(x) (((x) & 0x1) << 9)
1620 #define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1)
1621 #define C_008680_ROQ_RING_BUSY 0xFFFFFDFF
1622 #define S_008680_ROQ_INDIRECT1_BUSY(x) (((x) & 0x1) << 10)
1623 #define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1)
1624 #define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF
1625 #define S_008680_ROQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 11)
1626 #define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1)
1627 #define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF
1628 #define S_008680_ROQ_STATE_BUSY(x) (((x) & 0x1) << 12)
1629 #define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1)
1630 #define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF
1631 #define S_008680_DC_BUSY(x) (((x) & 0x1) << 13)
1632 #define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1)
1633 #define C_008680_DC_BUSY 0xFFFFDFFF
1634 #define S_008680_ATCL2IU_BUSY(x) (((x) & 0x1) << 14)
1635 #define G_008680_ATCL2IU_BUSY(x) (((x) >> 14) & 0x1)
1636 #define C_008680_ATCL2IU_BUSY 0xFFFFBFFF
1637 #define S_008680_PFP_BUSY(x) (((x) & 0x1) << 15)
1638 #define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1)
1639 #define C_008680_PFP_BUSY 0xFFFF7FFF
1640 #define S_008680_MEQ_BUSY(x) (((x) & 0x1) << 16)
1641 #define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1)
1642 #define C_008680_MEQ_BUSY 0xFFFEFFFF
1643 #define S_008680_ME_BUSY(x) (((x) & 0x1) << 17)
1644 #define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1)
1645 #define C_008680_ME_BUSY 0xFFFDFFFF
1646 #define S_008680_QUERY_BUSY(x) (((x) & 0x1) << 18)
1647 #define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1)
1648 #define C_008680_QUERY_BUSY 0xFFFBFFFF
1649 #define S_008680_SEMAPHORE_BUSY(x) (((x) & 0x1) << 19)
1650 #define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1)
1651 #define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF
1652 #define S_008680_INTERRUPT_BUSY(x) (((x) & 0x1) << 20)
1653 #define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1)
1654 #define C_008680_INTERRUPT_BUSY 0xFFEFFFFF
1655 #define S_008680_SURFACE_SYNC_BUSY(x) (((x) & 0x1) << 21)
1656 #define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1)
1657 #define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF
1658 #define S_008680_DMA_BUSY(x) (((x) & 0x1) << 22)
1659 #define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1)
1660 #define C_008680_DMA_BUSY 0xFFBFFFFF
1661 #define S_008680_RCIU_BUSY(x) (((x) & 0x1) << 23)
1662 #define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1)
1663 #define C_008680_RCIU_BUSY 0xFF7FFFFF
1664 #define S_008680_SCRATCH_RAM_BUSY(x) (((x) & 0x1) << 24)
1665 #define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1)
1666 #define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF
1667 #define S_008680_CPC_CPG_BUSY(x) (((x) & 0x1) << 25)
1668 #define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1)
1669 #define C_008680_CPC_CPG_BUSY 0xFDFFFFFF
1670 #define S_008680_CE_BUSY(x) (((x) & 0x1) << 26)
1671 #define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1)
1672 #define C_008680_CE_BUSY 0xFBFFFFFF
1673 #define S_008680_TCIU_BUSY(x) (((x) & 0x1) << 27)
1674 #define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1)
1675 #define C_008680_TCIU_BUSY 0xF7FFFFFF
1676 #define S_008680_ROQ_CE_RING_BUSY(x) (((x) & 0x1) << 28)
1677 #define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1)
1678 #define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF
1679 #define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) & 0x1) << 29)
1680 #define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1)
1681 #define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF
1682 #define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) & 0x1) << 30)
1683 #define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1)
1684 #define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF
1685 #define S_008680_CP_BUSY(x) (((x) & 0x1) << 31)
1686 #define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1)
1687 #define C_008680_CP_BUSY 0x7FFFFFFF
1689 #define R_030800_GRBM_GFX_INDEX 0x030800
1690 #define S_030800_INSTANCE_INDEX(x) (((x) & 0xFF) << 0)
1691 #define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF)
1692 #define C_030800_INSTANCE_INDEX 0xFFFFFF00
1693 #define S_030800_SH_INDEX(x) (((x) & 0xFF) << 8)
1694 #define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF)
1695 #define C_030800_SH_INDEX 0xFFFF00FF
1696 #define S_030800_SE_INDEX(x) (((x) & 0xFF) << 16)
1697 #define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF)
1698 #define C_030800_SE_INDEX 0xFF00FFFF
1699 #define S_030800_SH_BROADCAST_WRITES(x) (((x) & 0x1) << 29)
1700 #define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1)
1701 #define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF
1702 #define S_030800_INSTANCE_BROADCAST_WRITES(x) (((x) & 0x1) << 30)
1703 #define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1)
1704 #define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF
1705 #define S_030800_SE_BROADCAST_WRITES(x) (((x) & 0x1) << 31)
1706 #define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1)
1707 #define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF
1708 #define R_030900_VGT_ESGS_RING_SIZE 0x030900
1709 #define R_030904_VGT_GSVS_RING_SIZE 0x030904
1710 #define R_030908_VGT_PRIMITIVE_TYPE 0x030908
1711 #define S_030908_PRIM_TYPE(x) (((x) & 0x3F) << 0)
1712 #define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F)
1713 #define C_030908_PRIM_TYPE 0xFFFFFFC0
1714 #define V_030908_DI_PT_NONE 0x00
1715 #define V_030908_DI_PT_POINTLIST 0x01
1716 #define V_030908_DI_PT_LINELIST 0x02
1717 #define V_030908_DI_PT_LINESTRIP 0x03
1718 #define V_030908_DI_PT_TRILIST 0x04
1719 #define V_030908_DI_PT_TRIFAN 0x05
1720 #define V_030908_DI_PT_TRISTRIP 0x06
1721 #define V_030908_DI_PT_PATCH 0x09
1722 #define V_030908_DI_PT_LINELIST_ADJ 0x0A
1723 #define V_030908_DI_PT_LINESTRIP_ADJ 0x0B
1724 #define V_030908_DI_PT_TRILIST_ADJ 0x0C
1725 #define V_030908_DI_PT_TRISTRIP_ADJ 0x0D
1726 #define V_030908_DI_PT_TRI_WITH_WFLAGS 0x10
1727 #define V_030908_DI_PT_RECTLIST 0x11
1728 #define V_030908_DI_PT_LINELOOP 0x12
1729 #define V_030908_DI_PT_QUADLIST 0x13
1730 #define V_030908_DI_PT_QUADSTRIP 0x14
1731 #define V_030908_DI_PT_POLYGON 0x15
1732 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 0x16
1733 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 0x17
1734 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 0x18
1735 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 0x19
1736 #define V_030908_DI_PT_2D_FILL_RECT_LIST 0x1A
1737 #define V_030908_DI_PT_2D_LINE_STRIP 0x1B
1738 #define V_030908_DI_PT_2D_TRI_STRIP 0x1C
1739 #define R_03090C_VGT_INDEX_TYPE 0x03090C
1740 #define S_03090C_INDEX_TYPE(x) (((x) & 0x03) << 0)
1741 #define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x03)
1742 #define C_03090C_INDEX_TYPE 0xFFFFFFFC
1743 #define V_03090C_DI_INDEX_SIZE_16_BIT 0x00
1744 #define V_03090C_DI_INDEX_SIZE_32_BIT 0x01
1745 #define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910
1746 #define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914
1747 #define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918
1748 #define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C
1749 #define R_030930_VGT_NUM_INDICES 0x030930
1750 #define R_030934_VGT_NUM_INSTANCES 0x030934
1751 #define R_030938_VGT_TF_RING_SIZE 0x030938
1752 #define S_030938_SIZE(x) (((x) & 0xFFFF) << 0)
1753 #define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF)
1754 #define C_030938_SIZE 0xFFFF0000
1755 #define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C
1756 #define S_03093C_OFFCHIP_BUFFERING(x) (((x) & 0x1FF) << 0)
1757 #define G_03093C_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x1FF)
1758 #define C_03093C_OFFCHIP_BUFFERING 0xFFFFFE00
1759 #define S_03093C_OFFCHIP_GRANULARITY(x) (((x) & 0x03) << 9)
1760 #define G_03093C_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x03)
1761 #define C_03093C_OFFCHIP_GRANULARITY 0xFFFFF9FF
1762 #define V_03093C_X_8K_DWORDS 0x00
1763 #define V_03093C_X_4K_DWORDS 0x01
1764 #define V_03093C_X_2K_DWORDS 0x02
1765 #define V_03093C_X_1K_DWORDS 0x03
1766 #define R_030940_VGT_TF_MEMORY_BASE 0x030940
1767 #define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00
1768 #define S_030A00_LINE_STIPPLE_VALUE(x) (((x) & 0xFFFFFF) << 0)
1769 #define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF)
1770 #define C_030A00_LINE_STIPPLE_VALUE 0xFF000000
1771 #define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04
1772 #define S_030A04_CURRENT_PTR(x) (((x) & 0x0F) << 0)
1773 #define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0x0F)
1774 #define C_030A04_CURRENT_PTR 0xFFFFFFF0
1775 #define S_030A04_CURRENT_COUNT(x) (((x) & 0xFF) << 8)
1776 #define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF)
1777 #define C_030A04_CURRENT_COUNT 0xFFFF00FF
1778 #define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10
1779 #define S_030A10_X(x) (((x) & 0xFFFF) << 0)
1780 #define G_030A10_X(x) (((x) >> 0) & 0xFFFF)
1781 #define C_030A10_X 0xFFFF0000
1782 #define S_030A10_Y(x) (((x) & 0xFFFF) << 16)
1783 #define G_030A10_Y(x) (((x) >> 16) & 0xFFFF)
1784 #define C_030A10_Y 0x0000FFFF
1785 #define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14
1786 #define S_030A14_X(x) (((x) & 0xFFFF) << 0)
1787 #define G_030A14_X(x) (((x) >> 0) & 0xFFFF)
1788 #define C_030A14_X 0xFFFF0000
1789 #define S_030A14_Y(x) (((x) & 0xFFFF) << 16)
1790 #define G_030A14_Y(x) (((x) >> 16) & 0xFFFF)
1791 #define C_030A14_Y 0x0000FFFF
1792 #define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18
1793 #define S_030A18_X(x) (((x) & 0xFFFF) << 0)
1794 #define G_030A18_X(x) (((x) >> 0) & 0xFFFF)
1795 #define C_030A18_X 0xFFFF0000
1796 #define S_030A18_Y(x) (((x) & 0xFFFF) << 16)
1797 #define G_030A18_Y(x) (((x) >> 16) & 0xFFFF)
1798 #define C_030A18_Y 0x0000FFFF
1799 #define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C
1800 #define S_030A2C_X(x) (((x) & 0xFFFF) << 0)
1801 #define G_030A2C_X(x) (((x) >> 0) & 0xFFFF)
1802 #define C_030A2C_X 0xFFFF0000
1803 #define S_030A2C_Y(x) (((x) & 0xFFFF) << 16)
1804 #define G_030A2C_Y(x) (((x) >> 16) & 0xFFFF)
1805 #define C_030A2C_Y 0x0000FFFF
1807 #define R_008BF0_PA_SC_ENHANCE 0x008BF0
1808 #define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) & 0x1) << 0)
1809 #define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1)
1810 #define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE
1811 #define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) & 0x1) << 1)
1812 #define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1)
1813 #define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD
1814 #define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) & 0x1) << 2)
1815 #define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1)
1816 #define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB
1817 #define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) & 0x1) << 3)
1818 #define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1)
1819 #define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7
1820 #define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) & 0x1) << 4)
1821 #define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1)
1822 #define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF
1823 #define S_008BF0_DISABLE_SCISSOR_FIX(x) (((x) & 0x1) << 5)
1824 #define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1)
1825 #define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF
1826 #define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) & 0x03) << 6)
1827 #define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x03)
1828 #define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F
1829 #define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) & 0x1) << 8)
1830 #define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1)
1831 #define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF
1832 #define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) & 0x1) << 9)
1833 #define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1)
1834 #define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF
1835 #define R_008C08_SQC_CACHES 0x008C08
1836 #define S_008C08_INST_INVALIDATE(x) (((x) & 0x1) << 0)
1837 #define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1)
1838 #define C_008C08_INST_INVALIDATE 0xFFFFFFFE
1839 #define S_008C08_DATA_INVALIDATE(x) (((x) & 0x1) << 1)
1840 #define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1)
1841 #define C_008C08_DATA_INVALIDATE 0xFFFFFFFD
1843 #define R_030D20_SQC_CACHES 0x030D20
1844 #define S_030D20_INST_INVALIDATE(x) (((x) & 0x1) << 0)
1845 #define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1)
1846 #define C_030D20_INST_INVALIDATE 0xFFFFFFFE
1847 #define S_030D20_DATA_INVALIDATE(x) (((x) & 0x1) << 1)
1848 #define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1)
1849 #define C_030D20_DATA_INVALIDATE 0xFFFFFFFD
1850 #define S_030D20_INVALIDATE_VOLATILE(x) (((x) & 0x1) << 2)
1851 #define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1)
1852 #define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB
1854 #define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C
1855 #define S_008C0C_RET(x) (((x) & 0x7F) << 0)
1856 #define G_008C0C_RET(x) (((x) >> 0) & 0x7F)
1857 #define C_008C0C_RET 0xFFFFFF80
1858 #define S_008C0C_RUI(x) (((x) & 0x07) << 7)
1859 #define G_008C0C_RUI(x) (((x) >> 7) & 0x07)
1860 #define C_008C0C_RUI 0xFFFFFC7F
1861 #define S_008C0C_RNG(x) (((x) & 0x7FF) << 10)
1862 #define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF)
1863 #define C_008C0C_RNG 0xFFE003FF
1864 #define R_008DFC_SQ_EXP_0 0x008DFC
1865 #define S_008DFC_EN(x) (((x) & 0x0F) << 0)
1866 #define G_008DFC_EN(x) (((x) >> 0) & 0x0F)
1867 #define C_008DFC_EN 0xFFFFFFF0
1868 #define S_008DFC_TGT(x) (((x) & 0x3F) << 4)
1869 #define G_008DFC_TGT(x) (((x) >> 4) & 0x3F)
1870 #define C_008DFC_TGT 0xFFFFFC0F
1871 #define V_008DFC_SQ_EXP_MRT 0x00
1872 #define V_008DFC_SQ_EXP_MRTZ 0x08
1873 #define V_008DFC_SQ_EXP_NULL 0x09
1874 #define V_008DFC_SQ_EXP_POS 0x0C
1875 #define V_008DFC_SQ_EXP_PARAM 0x20
1876 #define S_008DFC_COMPR(x) (((x) & 0x1) << 10)
1877 #define G_008DFC_COMPR(x) (((x) >> 10) & 0x1)
1878 #define C_008DFC_COMPR 0xFFFFFBFF
1879 #define S_008DFC_DONE(x) (((x) & 0x1) << 11)
1880 #define G_008DFC_DONE(x) (((x) >> 11) & 0x1)
1881 #define C_008DFC_DONE 0xFFFFF7FF
1882 #define S_008DFC_VM(x) (((x) & 0x1) << 12)
1883 #define G_008DFC_VM(x) (((x) >> 12) & 0x1)
1884 #define C_008DFC_VM 0xFFFFEFFF
1885 #define S_008DFC_ENCODING(x) (((x) & 0x3F) << 26)
1886 #define G_008DFC_ENCODING(x) (((x) >> 26) & 0x3F)
1887 #define C_008DFC_ENCODING 0x03FFFFFF
1888 #define V_008DFC_SQ_ENC_EXP_FIELD 0x3E
1889 #define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00
1890 #define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04
1891 #define S_030E04_ADDRESS(x) (((x) & 0xFF) << 0)
1892 #define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF)
1893 #define C_030E04_ADDRESS 0xFFFFFF00
1894 #define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00
1895 #define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00
1896 #define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04
1897 #define S_030F04_COUNT_HI(x) (((x) & 0x7FFFFFFF) << 0)
1898 #define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF)
1899 #define C_030F04_COUNT_HI 0x80000000
1900 #define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04
1901 #define S_008F04_BASE_ADDRESS_HI(x) (((x) & 0xFFFF) << 0)
1902 #define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF)
1903 #define C_008F04_BASE_ADDRESS_HI 0xFFFF0000
1904 #define S_008F04_STRIDE(x) (((x) & 0x3FFF) << 16)
1905 #define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF)
1906 #define C_008F04_STRIDE 0xC000FFFF
1907 #define S_008F04_CACHE_SWIZZLE(x) (((x) & 0x1) << 30)
1908 #define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1)
1909 #define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF
1910 #define S_008F04_SWIZZLE_ENABLE(x) (((x) & 0x1) << 31)
1911 #define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1)
1912 #define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF
1913 #define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08
1914 #define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08
1915 #define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C
1916 #define S_030F0C_COUNT_HI(x) (((x) & 0x7FFFFFFF) << 0)
1917 #define G_030F0C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF)
1918 #define C_030F0C_COUNT_HI 0x80000000
1919 #define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C
1920 #define S_008F0C_DST_SEL_X(x) (((x) & 0x07) << 0)
1921 #define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x07)
1922 #define C_008F0C_DST_SEL_X 0xFFFFFFF8
1923 #define V_008F0C_SQ_SEL_0 0x00
1924 #define V_008F0C_SQ_SEL_1 0x01
1925 #define V_008F0C_SQ_SEL_RESERVED_0 0x02
1926 #define V_008F0C_SQ_SEL_RESERVED_1 0x03
1927 #define V_008F0C_SQ_SEL_X 0x04
1928 #define V_008F0C_SQ_SEL_Y 0x05
1929 #define V_008F0C_SQ_SEL_Z 0x06
1930 #define V_008F0C_SQ_SEL_W 0x07
1931 #define S_008F0C_DST_SEL_Y(x) (((x) & 0x07) << 3)
1932 #define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x07)
1933 #define C_008F0C_DST_SEL_Y 0xFFFFFFC7
1934 #define V_008F0C_SQ_SEL_0 0x00
1935 #define V_008F0C_SQ_SEL_1 0x01
1936 #define V_008F0C_SQ_SEL_RESERVED_0 0x02
1937 #define V_008F0C_SQ_SEL_RESERVED_1 0x03
1938 #define V_008F0C_SQ_SEL_X 0x04
1939 #define V_008F0C_SQ_SEL_Y 0x05
1940 #define V_008F0C_SQ_SEL_Z 0x06
1941 #define V_008F0C_SQ_SEL_W 0x07
1942 #define S_008F0C_DST_SEL_Z(x) (((x) & 0x07) << 6)
1943 #define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x07)
1944 #define C_008F0C_DST_SEL_Z 0xFFFFFE3F
1945 #define V_008F0C_SQ_SEL_0 0x00
1946 #define V_008F0C_SQ_SEL_1 0x01
1947 #define V_008F0C_SQ_SEL_RESERVED_0 0x02
1948 #define V_008F0C_SQ_SEL_RESERVED_1 0x03
1949 #define V_008F0C_SQ_SEL_X 0x04
1950 #define V_008F0C_SQ_SEL_Y 0x05
1951 #define V_008F0C_SQ_SEL_Z 0x06
1952 #define V_008F0C_SQ_SEL_W 0x07
1953 #define S_008F0C_DST_SEL_W(x) (((x) & 0x07) << 9)
1954 #define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x07)
1955 #define C_008F0C_DST_SEL_W 0xFFFFF1FF
1956 #define V_008F0C_SQ_SEL_0 0x00
1957 #define V_008F0C_SQ_SEL_1 0x01
1958 #define V_008F0C_SQ_SEL_RESERVED_0 0x02
1959 #define V_008F0C_SQ_SEL_RESERVED_1 0x03
1960 #define V_008F0C_SQ_SEL_X 0x04
1961 #define V_008F0C_SQ_SEL_Y 0x05
1962 #define V_008F0C_SQ_SEL_Z 0x06
1963 #define V_008F0C_SQ_SEL_W 0x07
1964 #define S_008F0C_NUM_FORMAT(x) (((x) & 0x07) << 12)
1965 #define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x07)
1966 #define C_008F0C_NUM_FORMAT 0xFFFF8FFF
1967 #define V_008F0C_BUF_NUM_FORMAT_UNORM 0x00
1968 #define V_008F0C_BUF_NUM_FORMAT_SNORM 0x01
1969 #define V_008F0C_BUF_NUM_FORMAT_USCALED 0x02
1970 #define V_008F0C_BUF_NUM_FORMAT_SSCALED 0x03
1971 #define V_008F0C_BUF_NUM_FORMAT_UINT 0x04
1972 #define V_008F0C_BUF_NUM_FORMAT_SINT 0x05
1973 #define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 0x06
1974 #define V_008F0C_BUF_NUM_FORMAT_FLOAT 0x07
1975 #define S_008F0C_DATA_FORMAT(x) (((x) & 0x0F) << 15)
1976 #define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0x0F)
1977 #define C_008F0C_DATA_FORMAT 0xFFF87FFF
1978 #define V_008F0C_BUF_DATA_FORMAT_INVALID 0x00
1979 #define V_008F0C_BUF_DATA_FORMAT_8 0x01
1980 #define V_008F0C_BUF_DATA_FORMAT_16 0x02
1981 #define V_008F0C_BUF_DATA_FORMAT_8_8 0x03
1982 #define V_008F0C_BUF_DATA_FORMAT_32 0x04
1983 #define V_008F0C_BUF_DATA_FORMAT_16_16 0x05
1984 #define V_008F0C_BUF_DATA_FORMAT_10_11_11 0x06
1985 #define V_008F0C_BUF_DATA_FORMAT_11_11_10 0x07
1986 #define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 0x08
1987 #define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 0x09
1988 #define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 0x0A
1989 #define V_008F0C_BUF_DATA_FORMAT_32_32 0x0B
1990 #define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 0x0C
1991 #define V_008F0C_BUF_DATA_FORMAT_32_32_32 0x0D
1992 #define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 0x0E
1993 #define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 0x0F
1994 #define S_008F0C_ELEMENT_SIZE(x) (((x) & 0x03) << 19)
1995 #define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x03)
1996 #define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF
1997 #define S_008F0C_INDEX_STRIDE(x) (((x) & 0x03) << 21)
1998 #define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x03)
1999 #define C_008F0C_INDEX_STRIDE 0xFF9FFFFF
2000 #define S_008F0C_ADD_TID_ENABLE(x) (((x) & 0x1) << 23)
2001 #define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1)
2002 #define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF
2004 #define S_008F0C_ATC(x) (((x) & 0x1) << 24)
2005 #define G_008F0C_ATC(x) (((x) >> 24) & 0x1)
2006 #define C_008F0C_ATC 0xFEFFFFFF
2008 #define S_008F0C_HASH_ENABLE(x) (((x) & 0x1) << 25)
2009 #define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1)
2010 #define C_008F0C_HASH_ENABLE 0xFDFFFFFF
2011 #define S_008F0C_HEAP(x) (((x) & 0x1) << 26)
2012 #define G_008F0C_HEAP(x) (((x) >> 26) & 0x1)
2013 #define C_008F0C_HEAP 0xFBFFFFFF
2015 #define S_008F0C_MTYPE(x) (((x) & 0x07) << 27)
2016 #define G_008F0C_MTYPE(x) (((x) >> 27) & 0x07)
2017 #define C_008F0C_MTYPE 0xC7FFFFFF
2019 #define S_008F0C_TYPE(x) (((x) & 0x03) << 30)
2020 #define G_008F0C_TYPE(x) (((x) >> 30) & 0x03)
2021 #define C_008F0C_TYPE 0x3FFFFFFF
2022 #define V_008F0C_SQ_RSRC_BUF 0x00
2023 #define V_008F0C_SQ_RSRC_BUF_RSVD_1 0x01
2024 #define V_008F0C_SQ_RSRC_BUF_RSVD_2 0x02
2025 #define V_008F0C_SQ_RSRC_BUF_RSVD_3 0x03
2026 #define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10
2027 #define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10
2028 #define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14
2029 #define S_030F14_COUNT_HI(x) (((x) & 0x7FFFFFFF) << 0)
2030 #define G_030F14_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF)
2031 #define C_030F14_COUNT_HI 0x80000000
2032 #define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14
2033 #define S_008F14_BASE_ADDRESS_HI(x) (((x) & 0xFF) << 0)
2034 #define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF)
2035 #define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00
2036 #define S_008F14_MIN_LOD(x) (((x) & 0xFFF) << 8)
2037 #define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF)
2038 #define C_008F14_MIN_LOD 0xFFF000FF
2039 #define S_008F14_DATA_FORMAT(x) (((x) & 0x3F) << 20)
2040 #define G_008F14_DATA_FORMAT(x) (((x) >> 20) & 0x3F)
2041 #define C_008F14_DATA_FORMAT 0xFC0FFFFF
2042 #define V_008F14_IMG_DATA_FORMAT_INVALID 0x00
2043 #define V_008F14_IMG_DATA_FORMAT_8 0x01
2044 #define V_008F14_IMG_DATA_FORMAT_16 0x02
2045 #define V_008F14_IMG_DATA_FORMAT_8_8 0x03
2046 #define V_008F14_IMG_DATA_FORMAT_32 0x04
2047 #define V_008F14_IMG_DATA_FORMAT_16_16 0x05
2048 #define V_008F14_IMG_DATA_FORMAT_10_11_11 0x06
2049 #define V_008F14_IMG_DATA_FORMAT_11_11_10 0x07
2050 #define V_008F14_IMG_DATA_FORMAT_10_10_10_2 0x08
2051 #define V_008F14_IMG_DATA_FORMAT_2_10_10_10 0x09
2052 #define V_008F14_IMG_DATA_FORMAT_8_8_8_8 0x0A
2053 #define V_008F14_IMG_DATA_FORMAT_32_32 0x0B
2054 #define V_008F14_IMG_DATA_FORMAT_16_16_16_16 0x0C
2055 #define V_008F14_IMG_DATA_FORMAT_32_32_32 0x0D
2056 #define V_008F14_IMG_DATA_FORMAT_32_32_32_32 0x0E
2057 #define V_008F14_IMG_DATA_FORMAT_RESERVED_15 0x0F
2058 #define V_008F14_IMG_DATA_FORMAT_5_6_5 0x10
2059 #define V_008F14_IMG_DATA_FORMAT_1_5_5_5 0x11
2060 #define V_008F14_IMG_DATA_FORMAT_5_5_5_1 0x12
2061 #define V_008F14_IMG_DATA_FORMAT_4_4_4_4 0x13
2062 #define V_008F14_IMG_DATA_FORMAT_8_24 0x14
2063 #define V_008F14_IMG_DATA_FORMAT_24_8 0x15
2064 #define V_008F14_IMG_DATA_FORMAT_X24_8_32 0x16
2065 #define V_008F14_IMG_DATA_FORMAT_RESERVED_23 0x17
2066 #define V_008F14_IMG_DATA_FORMAT_RESERVED_24 0x18
2067 #define V_008F14_IMG_DATA_FORMAT_RESERVED_25 0x19
2068 #define V_008F14_IMG_DATA_FORMAT_RESERVED_26 0x1A
2069 #define V_008F14_IMG_DATA_FORMAT_RESERVED_27 0x1B
2070 #define V_008F14_IMG_DATA_FORMAT_RESERVED_28 0x1C
2071 #define V_008F14_IMG_DATA_FORMAT_RESERVED_29 0x1D
2072 #define V_008F14_IMG_DATA_FORMAT_RESERVED_30 0x1E
2073 #define V_008F14_IMG_DATA_FORMAT_RESERVED_31 0x1F
2074 #define V_008F14_IMG_DATA_FORMAT_GB_GR 0x20
2075 #define V_008F14_IMG_DATA_FORMAT_BG_RG 0x21
2076 #define V_008F14_IMG_DATA_FORMAT_5_9_9_9 0x22
2077 #define V_008F14_IMG_DATA_FORMAT_BC1 0x23
2078 #define V_008F14_IMG_DATA_FORMAT_BC2 0x24
2079 #define V_008F14_IMG_DATA_FORMAT_BC3 0x25
2080 #define V_008F14_IMG_DATA_FORMAT_BC4 0x26
2081 #define V_008F14_IMG_DATA_FORMAT_BC5 0x27
2082 #define V_008F14_IMG_DATA_FORMAT_BC6 0x28
2083 #define V_008F14_IMG_DATA_FORMAT_BC7 0x29
2084 #define V_008F14_IMG_DATA_FORMAT_RESERVED_42 0x2A
2085 #define V_008F14_IMG_DATA_FORMAT_RESERVED_43 0x2B
2086 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 0x2C
2087 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 0x2D
2088 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 0x2E
2089 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 0x2F
2090 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 0x30
2091 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 0x31
2092 #define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 0x32
2093 #define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 0x33
2094 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 0x34
2095 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 0x35
2096 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 0x36
2097 #define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 0x37
2098 #define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 0x38
2099 #define V_008F14_IMG_DATA_FORMAT_4_4 0x39
2100 #define V_008F14_IMG_DATA_FORMAT_6_5_5 0x3A
2101 #define V_008F14_IMG_DATA_FORMAT_1 0x3B
2102 #define V_008F14_IMG_DATA_FORMAT_1_REVERSED 0x3C
2103 #define V_008F14_IMG_DATA_FORMAT_32_AS_8 0x3D
2104 #define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 0x3E
2105 #define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 0x3F
2106 #define S_008F14_NUM_FORMAT(x) (((x) & 0x0F) << 26)
2107 #define G_008F14_NUM_FORMAT(x) (((x) >> 26) & 0x0F)
2108 #define C_008F14_NUM_FORMAT 0xC3FFFFFF
2109 #define V_008F14_IMG_NUM_FORMAT_UNORM 0x00
2110 #define V_008F14_IMG_NUM_FORMAT_SNORM 0x01
2111 #define V_008F14_IMG_NUM_FORMAT_USCALED 0x02
2112 #define V_008F14_IMG_NUM_FORMAT_SSCALED 0x03
2113 #define V_008F14_IMG_NUM_FORMAT_UINT 0x04
2114 #define V_008F14_IMG_NUM_FORMAT_SINT 0x05
2115 #define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 0x06
2116 #define V_008F14_IMG_NUM_FORMAT_FLOAT 0x07
2117 #define V_008F14_IMG_NUM_FORMAT_RESERVED_8 0x08
2118 #define V_008F14_IMG_NUM_FORMAT_SRGB 0x09
2119 #define V_008F14_IMG_NUM_FORMAT_UBNORM 0x0A
2120 #define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 0x0B
2121 #define V_008F14_IMG_NUM_FORMAT_UBINT 0x0C
2122 #define V_008F14_IMG_NUM_FORMAT_UBSCALED 0x0D
2123 #define V_008F14_IMG_NUM_FORMAT_RESERVED_14 0x0E
2124 #define V_008F14_IMG_NUM_FORMAT_RESERVED_15 0x0F
2126 #define S_008F14_MTYPE(x) (((x) & 0x03) << 30)
2127 #define G_008F14_MTYPE(x) (((x) >> 30) & 0x03)
2128 #define C_008F14_MTYPE 0x3FFFFFFF
2130 #define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18
2131 #define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18
2132 #define S_008F18_WIDTH(x) (((x) & 0x3FFF) << 0)
2133 #define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF)
2134 #define C_008F18_WIDTH 0xFFFFC000
2135 #define S_008F18_HEIGHT(x) (((x) & 0x3FFF) << 14)
2136 #define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF)
2137 #define C_008F18_HEIGHT 0xF0003FFF
2138 #define S_008F18_PERF_MOD(x) (((x) & 0x07) << 28)
2139 #define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x07)
2140 #define C_008F18_PERF_MOD 0x8FFFFFFF
2141 #define S_008F18_INTERLACED(x) (((x) & 0x1) << 31)
2142 #define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1)
2143 #define C_008F18_INTERLACED 0x7FFFFFFF
2144 #define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C
2145 #define S_030F1C_COUNT_HI(x) (((x) & 0x7FFFFFFF) << 0)
2146 #define G_030F1C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF)
2147 #define C_030F1C_COUNT_HI 0x80000000
2148 #define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C
2149 #define S_008F1C_DST_SEL_X(x) (((x) & 0x07) << 0)
2150 #define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x07)
2151 #define C_008F1C_DST_SEL_X 0xFFFFFFF8
2152 #define V_008F1C_SQ_SEL_0 0x00
2153 #define V_008F1C_SQ_SEL_1 0x01
2154 #define V_008F1C_SQ_SEL_RESERVED_0 0x02
2155 #define V_008F1C_SQ_SEL_RESERVED_1 0x03
2156 #define V_008F1C_SQ_SEL_X 0x04
2157 #define V_008F1C_SQ_SEL_Y 0x05
2158 #define V_008F1C_SQ_SEL_Z 0x06
2159 #define V_008F1C_SQ_SEL_W 0x07
2160 #define S_008F1C_DST_SEL_Y(x) (((x) & 0x07) << 3)
2161 #define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x07)
2162 #define C_008F1C_DST_SEL_Y 0xFFFFFFC7
2163 #define V_008F1C_SQ_SEL_0 0x00
2164 #define V_008F1C_SQ_SEL_1 0x01
2165 #define V_008F1C_SQ_SEL_RESERVED_0 0x02
2166 #define V_008F1C_SQ_SEL_RESERVED_1 0x03
2167 #define V_008F1C_SQ_SEL_X 0x04
2168 #define V_008F1C_SQ_SEL_Y 0x05
2169 #define V_008F1C_SQ_SEL_Z 0x06
2170 #define V_008F1C_SQ_SEL_W 0x07
2171 #define S_008F1C_DST_SEL_Z(x) (((x) & 0x07) << 6)
2172 #define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x07)
2173 #define C_008F1C_DST_SEL_Z 0xFFFFFE3F
2174 #define V_008F1C_SQ_SEL_0 0x00
2175 #define V_008F1C_SQ_SEL_1 0x01
2176 #define V_008F1C_SQ_SEL_RESERVED_0 0x02
2177 #define V_008F1C_SQ_SEL_RESERVED_1 0x03
2178 #define V_008F1C_SQ_SEL_X 0x04
2179 #define V_008F1C_SQ_SEL_Y 0x05
2180 #define V_008F1C_SQ_SEL_Z 0x06
2181 #define V_008F1C_SQ_SEL_W 0x07
2182 #define S_008F1C_DST_SEL_W(x) (((x) & 0x07) << 9)
2183 #define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x07)
2184 #define C_008F1C_DST_SEL_W 0xFFFFF1FF
2185 #define V_008F1C_SQ_SEL_0 0x00
2186 #define V_008F1C_SQ_SEL_1 0x01
2187 #define V_008F1C_SQ_SEL_RESERVED_0 0x02
2188 #define V_008F1C_SQ_SEL_RESERVED_1 0x03
2189 #define V_008F1C_SQ_SEL_X 0x04
2190 #define V_008F1C_SQ_SEL_Y 0x05
2191 #define V_008F1C_SQ_SEL_Z 0x06
2192 #define V_008F1C_SQ_SEL_W 0x07
2193 #define S_008F1C_BASE_LEVEL(x) (((x) & 0x0F) << 12)
2194 #define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0x0F)
2195 #define C_008F1C_BASE_LEVEL 0xFFFF0FFF
2196 #define S_008F1C_LAST_LEVEL(x) (((x) & 0x0F) << 16)
2197 #define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0x0F)
2198 #define C_008F1C_LAST_LEVEL 0xFFF0FFFF
2199 #define S_008F1C_TILING_INDEX(x) (((x) & 0x1F) << 20)
2200 #define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F)
2201 #define C_008F1C_TILING_INDEX 0xFE0FFFFF
2202 #define S_008F1C_POW2_PAD(x) (((x) & 0x1) << 25)
2203 #define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1)
2204 #define C_008F1C_POW2_PAD 0xFDFFFFFF
2206 #define S_008F1C_MTYPE(x) (((x) & 0x1) << 26)
2207 #define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1)
2208 #define C_008F1C_MTYPE 0xFBFFFFFF
2209 #define S_008F1C_ATC(x) (((x) & 0x1) << 27)
2210 #define G_008F1C_ATC(x) (((x) >> 27) & 0x1)
2211 #define C_008F1C_ATC 0xF7FFFFFF
2213 #define S_008F1C_TYPE(x) (((x) & 0x0F) << 28)
2214 #define G_008F1C_TYPE(x) (((x) >> 28) & 0x0F)
2215 #define C_008F1C_TYPE 0x0FFFFFFF
2216 #define V_008F1C_SQ_RSRC_IMG_RSVD_0 0x00
2217 #define V_008F1C_SQ_RSRC_IMG_RSVD_1 0x01
2218 #define V_008F1C_SQ_RSRC_IMG_RSVD_2 0x02
2219 #define V_008F1C_SQ_RSRC_IMG_RSVD_3 0x03
2220 #define V_008F1C_SQ_RSRC_IMG_RSVD_4 0x04
2221 #define V_008F1C_SQ_RSRC_IMG_RSVD_5 0x05
2222 #define V_008F1C_SQ_RSRC_IMG_RSVD_6 0x06
2223 #define V_008F1C_SQ_RSRC_IMG_RSVD_7 0x07
2224 #define V_008F1C_SQ_RSRC_IMG_1D 0x08
2225 #define V_008F1C_SQ_RSRC_IMG_2D 0x09
2226 #define V_008F1C_SQ_RSRC_IMG_3D 0x0A
2227 #define V_008F1C_SQ_RSRC_IMG_CUBE 0x0B
2228 #define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 0x0C
2229 #define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 0x0D
2230 #define V_008F1C_SQ_RSRC_IMG_2D_MSAA 0x0E
2231 #define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 0x0F
2232 #define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20
2233 #define S_008F20_DEPTH(x) (((x) & 0x1FFF) << 0)
2234 #define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF)
2235 #define C_008F20_DEPTH 0xFFFFE000
2236 #define S_008F20_PITCH(x) (((x) & 0x3FFF) << 13)
2237 #define G_008F20_PITCH(x) (((x) >> 13) & 0x3FFF)
2238 #define C_008F20_PITCH 0xF8001FFF
2239 #define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24
2240 #define S_008F24_BASE_ARRAY(x) (((x) & 0x1FFF) << 0)
2241 #define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF)
2242 #define C_008F24_BASE_ARRAY 0xFFFFE000
2243 #define S_008F24_LAST_ARRAY(x) (((x) & 0x1FFF) << 13)
2244 #define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF)
2245 #define C_008F24_LAST_ARRAY 0xFC001FFF
2246 #define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28
2247 #define S_008F28_MIN_LOD_WARN(x) (((x) & 0xFFF) << 0)
2248 #define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF)
2249 #define C_008F28_MIN_LOD_WARN 0xFFFFF000
2251 #define S_008F28_COUNTER_BANK_ID(x) (((x) & 0xFF) << 12)
2252 #define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF)
2253 #define C_008F28_COUNTER_BANK_ID 0xFFF00FFF
2254 #define S_008F28_LOD_HDW_CNT_EN(x) (((x) & 0x1) << 20)
2255 #define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1)
2256 #define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF
2259 #define S_008F28_COMPRESSION_EN(x) (((x) & 0x1) << 21)
2260 #define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1)
2261 #define C_008F28_COMPRESSION_EN 0xFFDFFFFF
2262 #define S_008F28_ALPHA_IS_ON_MSB(x) (((x) & 0x1) << 22)
2263 #define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1)
2264 #define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF
2265 #define S_008F28_COLOR_TRANSFORM(x) (((x) & 0x1) << 23)
2266 #define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1)
2267 #define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF
2268 #define S_008F28_LOST_ALPHA_BITS(x) (((x) & 0x0F) << 24)
2269 #define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0x0F)
2270 #define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF
2271 #define S_008F28_LOST_COLOR_BITS(x) (((x) & 0x0F) << 28)
2272 #define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0x0F)
2273 #define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF
2275 #define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C
2276 #define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30
2277 #define S_008F30_CLAMP_X(x) (((x) & 0x07) << 0)
2278 #define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x07)
2279 #define C_008F30_CLAMP_X 0xFFFFFFF8
2280 #define V_008F30_SQ_TEX_WRAP 0x00
2281 #define V_008F30_SQ_TEX_MIRROR 0x01
2282 #define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02
2283 #define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03
2284 #define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04
2285 #define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05
2286 #define V_008F30_SQ_TEX_CLAMP_BORDER 0x06
2287 #define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07
2288 #define S_008F30_CLAMP_Y(x) (((x) & 0x07) << 3)
2289 #define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x07)
2290 #define C_008F30_CLAMP_Y 0xFFFFFFC7
2291 #define V_008F30_SQ_TEX_WRAP 0x00
2292 #define V_008F30_SQ_TEX_MIRROR 0x01
2293 #define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02
2294 #define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03
2295 #define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04
2296 #define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05
2297 #define V_008F30_SQ_TEX_CLAMP_BORDER 0x06
2298 #define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07
2299 #define S_008F30_CLAMP_Z(x) (((x) & 0x07) << 6)
2300 #define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x07)
2301 #define C_008F30_CLAMP_Z 0xFFFFFE3F
2302 #define V_008F30_SQ_TEX_WRAP 0x00
2303 #define V_008F30_SQ_TEX_MIRROR 0x01
2304 #define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02
2305 #define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03
2306 #define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04
2307 #define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05
2308 #define V_008F30_SQ_TEX_CLAMP_BORDER 0x06
2309 #define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07
2310 #define S_008F30_DEPTH_COMPARE_FUNC(x) (((x) & 0x07) << 12)
2311 #define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x07)
2312 #define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF
2313 #define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0x00
2314 #define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 0x01
2315 #define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 0x02
2316 #define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x03
2317 #define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 0x04
2318 #define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x05
2319 #define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x06
2320 #define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x07
2321 #define S_008F30_FORCE_UNNORMALIZED(x) (((x) & 0x1) << 15)
2322 #define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1)
2323 #define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF
2324 #define S_008F30_MC_COORD_TRUNC(x) (((x) & 0x1) << 19)
2325 #define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1)
2326 #define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF
2327 #define S_008F30_FORCE_DEGAMMA(x) (((x) & 0x1) << 20)
2328 #define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1)
2329 #define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF
2330 #define S_008F30_TRUNC_COORD(x) (((x) & 0x1) << 27)
2331 #define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1)
2332 #define C_008F30_TRUNC_COORD 0xF7FFFFFF
2333 #define S_008F30_DISABLE_CUBE_WRAP(x) (((x) & 0x1) << 28)
2334 #define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1)
2335 #define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF
2336 #define S_008F30_FILTER_MODE(x) (((x) & 0x03) << 29)
2337 #define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x03)
2338 #define C_008F30_FILTER_MODE 0x9FFFFFFF
2340 #define S_008F30_COMPAT_MODE(x) (((x) & 0x1) << 31)
2341 #define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1)
2342 #define C_008F30_COMPAT_MODE 0x7FFFFFFF
2344 #define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34
2345 #define S_008F34_MIN_LOD(x) (((x) & 0xFFF) << 0)
2346 #define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF)
2347 #define C_008F34_MIN_LOD 0xFFFFF000
2348 #define S_008F34_MAX_LOD(x) (((x) & 0xFFF) << 12)
2349 #define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF)
2350 #define C_008F34_MAX_LOD 0xFF000FFF
2351 #define S_008F34_PERF_MIP(x) (((x) & 0x0F) << 24)
2352 #define G_008F34_PERF_MIP(x) (((x) >> 24) & 0x0F)
2353 #define C_008F34_PERF_MIP 0xF0FFFFFF
2354 #define S_008F34_PERF_Z(x) (((x) & 0x0F) << 28)
2355 #define G_008F34_PERF_Z(x) (((x) >> 28) & 0x0F)
2356 #define C_008F34_PERF_Z 0x0FFFFFFF
2357 #define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38
2358 #define S_008F38_LOD_BIAS(x) (((x) & 0x3FFF) << 0)
2359 #define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF)
2360 #define C_008F38_LOD_BIAS 0xFFFFC000
2361 #define S_008F38_LOD_BIAS_SEC(x) (((x) & 0x3F) << 14)
2362 #define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F)
2363 #define C_008F38_LOD_BIAS_SEC 0xFFF03FFF
2364 #define S_008F38_XY_MAG_FILTER(x) (((x) & 0x03) << 20)
2365 #define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x03)
2366 #define C_008F38_XY_MAG_FILTER 0xFFCFFFFF
2367 #define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00
2368 #define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01
2369 #define S_008F38_XY_MIN_FILTER(x) (((x) & 0x03) << 22)
2370 #define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x03)
2371 #define C_008F38_XY_MIN_FILTER 0xFF3FFFFF
2372 #define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00
2373 #define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01
2374 #define S_008F38_Z_FILTER(x) (((x) & 0x03) << 24)
2375 #define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x03)
2376 #define C_008F38_Z_FILTER 0xFCFFFFFF
2377 #define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00
2378 #define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01
2379 #define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02
2380 #define S_008F38_MIP_FILTER(x) (((x) & 0x03) << 26)
2381 #define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x03)
2382 #define C_008F38_MIP_FILTER 0xF3FFFFFF
2383 #define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00
2384 #define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01
2385 #define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02
2386 #define S_008F38_MIP_POINT_PRECLAMP(x) (((x) & 0x1) << 28)
2387 #define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1)
2388 #define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF
2389 #define S_008F38_DISABLE_LSB_CEIL(x) (((x) & 0x1) << 29)
2390 #define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1)
2391 #define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF
2392 #define S_008F38_FILTER_PREC_FIX(x) (((x) & 0x1) << 30)
2393 #define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1)
2394 #define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF
2395 #define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C
2396 #define S_008F3C_BORDER_COLOR_PTR(x) (((x) & 0xFFF) << 0)
2397 #define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF)
2398 #define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000
2399 #define S_008F3C_BORDER_COLOR_TYPE(x) (((x) & 0x03) << 30)
2400 #define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03)
2401 #define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF
2402 #define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00
2403 #define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x01
2404 #define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x02
2405 #define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 0x03
2406 #define R_0090DC_SPI_DYN_GPR_LOCK_EN 0x0090DC /* not on CIK */
2407 #define S_0090DC_VS_LOW_THRESHOLD(x) (((x) & 0x0F) << 0)
2408 #define G_0090DC_VS_LOW_THRESHOLD(x) (((x) >> 0) & 0x0F)
2409 #define C_0090DC_VS_LOW_THRESHOLD 0xFFFFFFF0
2410 #define S_0090DC_GS_LOW_THRESHOLD(x) (((x) & 0x0F) << 4)
2411 #define G_0090DC_GS_LOW_THRESHOLD(x) (((x) >> 4) & 0x0F)
2412 #define C_0090DC_GS_LOW_THRESHOLD 0xFFFFFF0F
2413 #define S_0090DC_ES_LOW_THRESHOLD(x) (((x) & 0x0F) << 8)
2414 #define G_0090DC_ES_LOW_THRESHOLD(x) (((x) >> 8) & 0x0F)
2415 #define C_0090DC_ES_LOW_THRESHOLD 0xFFFFF0FF
2416 #define S_0090DC_HS_LOW_THRESHOLD(x) (((x) & 0x0F) << 12)
2417 #define G_0090DC_HS_LOW_THRESHOLD(x) (((x) >> 12) & 0x0F)
2418 #define C_0090DC_HS_LOW_THRESHOLD 0xFFFF0FFF
2419 #define S_0090DC_LS_LOW_THRESHOLD(x) (((x) & 0x0F) << 16)
2420 #define G_0090DC_LS_LOW_THRESHOLD(x) (((x) >> 16) & 0x0F)
2421 #define C_0090DC_LS_LOW_THRESHOLD 0xFFF0FFFF
2422 #define R_0090E0_SPI_STATIC_THREAD_MGMT_1 0x0090E0 /* not on CIK */
2423 #define S_0090E0_PS_CU_EN(x) (((x) & 0xFFFF) << 0)
2424 #define G_0090E0_PS_CU_EN(x) (((x) >> 0) & 0xFFFF)
2425 #define C_0090E0_PS_CU_EN 0xFFFF0000
2426 #define S_0090E0_VS_CU_EN(x) (((x) & 0xFFFF) << 16)
2427 #define G_0090E0_VS_CU_EN(x) (((x) >> 16) & 0xFFFF)
2428 #define C_0090E0_VS_CU_EN 0x0000FFFF
2429 #define R_0090E4_SPI_STATIC_THREAD_MGMT_2 0x0090E4 /* not on CIK */
2430 #define S_0090E4_GS_CU_EN(x) (((x) & 0xFFFF) << 0)
2431 #define G_0090E4_GS_CU_EN(x) (((x) >> 0) & 0xFFFF)
2432 #define C_0090E4_GS_CU_EN 0xFFFF0000
2433 #define S_0090E4_ES_CU_EN(x) (((x) & 0xFFFF) << 16)
2434 #define G_0090E4_ES_CU_EN(x) (((x) >> 16) & 0xFFFF)
2435 #define C_0090E4_ES_CU_EN 0x0000FFFF
2436 #define R_0090E8_SPI_STATIC_THREAD_MGMT_3 0x0090E8 /* not on CIK */
2437 #define S_0090E8_LSHS_CU_EN(x) (((x) & 0xFFFF) << 0)
2438 #define G_0090E8_LSHS_CU_EN(x) (((x) >> 0) & 0xFFFF)
2439 #define C_0090E8_LSHS_CU_EN 0xFFFF0000
2440 #define R_0090EC_SPI_PS_MAX_WAVE_ID 0x0090EC
2441 #define S_0090EC_MAX_WAVE_ID(x) (((x) & 0xFFF) << 0)
2442 #define G_0090EC_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF)
2443 #define C_0090EC_MAX_WAVE_ID 0xFFFFF000
2445 #define R_0090E8_SPI_PS_MAX_WAVE_ID 0x0090E8
2446 #define S_0090E8_MAX_WAVE_ID(x) (((x) & 0xFFF) << 0)
2447 #define G_0090E8_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF)
2448 #define C_0090E8_MAX_WAVE_ID 0xFFFFF000
2450 #define R_0090F0_SPI_ARB_PRIORITY 0x0090F0
2451 #define S_0090F0_RING_ORDER_TS0(x) (((x) & 0x07) << 0)
2452 #define G_0090F0_RING_ORDER_TS0(x) (((x) >> 0) & 0x07)
2453 #define C_0090F0_RING_ORDER_TS0 0xFFFFFFF8
2454 #define V_0090F0_X_R0 0x00
2455 #define S_0090F0_RING_ORDER_TS1(x) (((x) & 0x07) << 3)
2456 #define G_0090F0_RING_ORDER_TS1(x) (((x) >> 3) & 0x07)
2457 #define C_0090F0_RING_ORDER_TS1 0xFFFFFFC7
2458 #define S_0090F0_RING_ORDER_TS2(x) (((x) & 0x07) << 6)
2459 #define G_0090F0_RING_ORDER_TS2(x) (((x) >> 6) & 0x07)
2460 #define C_0090F0_RING_ORDER_TS2 0xFFFFFE3F
2462 #define R_00C700_SPI_ARB_PRIORITY 0x00C700
2463 #define S_00C700_PIPE_ORDER_TS0(x) (((x) & 0x07) << 0)
2464 #define G_00C700_PIPE_ORDER_TS0(x) (((x) >> 0) & 0x07)
2465 #define C_00C700_PIPE_ORDER_TS0 0xFFFFFFF8
2466 #define S_00C700_PIPE_ORDER_TS1(x) (((x) & 0x07) << 3)
2467 #define G_00C700_PIPE_ORDER_TS1(x) (((x) >> 3) & 0x07)
2468 #define C_00C700_PIPE_ORDER_TS1 0xFFFFFFC7
2469 #define S_00C700_PIPE_ORDER_TS2(x) (((x) & 0x07) << 6)
2470 #define G_00C700_PIPE_ORDER_TS2(x) (((x) >> 6) & 0x07)
2471 #define C_00C700_PIPE_ORDER_TS2 0xFFFFFE3F
2472 #define S_00C700_PIPE_ORDER_TS3(x) (((x) & 0x07) << 9)
2473 #define G_00C700_PIPE_ORDER_TS3(x) (((x) >> 9) & 0x07)
2474 #define C_00C700_PIPE_ORDER_TS3 0xFFFFF1FF
2475 #define S_00C700_TS0_DUR_MULT(x) (((x) & 0x03) << 12)
2476 #define G_00C700_TS0_DUR_MULT(x) (((x) >> 12) & 0x03)
2477 #define C_00C700_TS0_DUR_MULT 0xFFFFCFFF
2478 #define S_00C700_TS1_DUR_MULT(x) (((x) & 0x03) << 14)
2479 #define G_00C700_TS1_DUR_MULT(x) (((x) >> 14) & 0x03)
2480 #define C_00C700_TS1_DUR_MULT 0xFFFF3FFF
2481 #define S_00C700_TS2_DUR_MULT(x) (((x) & 0x03) << 16)
2482 #define G_00C700_TS2_DUR_MULT(x) (((x) >> 16) & 0x03)
2483 #define C_00C700_TS2_DUR_MULT 0xFFFCFFFF
2484 #define S_00C700_TS3_DUR_MULT(x) (((x) & 0x03) << 18)
2485 #define G_00C700_TS3_DUR_MULT(x) (((x) >> 18) & 0x03)
2486 #define C_00C700_TS3_DUR_MULT 0xFFF3FFFF
2488 #define R_0090F4_SPI_ARB_CYCLES_0 0x0090F4 /* moved to 0xC704 on CIK */
2489 #define S_0090F4_TS0_DURATION(x) (((x) & 0xFFFF) << 0)
2490 #define G_0090F4_TS0_DURATION(x) (((x) >> 0) & 0xFFFF)
2491 #define C_0090F4_TS0_DURATION 0xFFFF0000
2492 #define S_0090F4_TS1_DURATION(x) (((x) & 0xFFFF) << 16)
2493 #define G_0090F4_TS1_DURATION(x) (((x) >> 16) & 0xFFFF)
2494 #define C_0090F4_TS1_DURATION 0x0000FFFF
2495 #define R_0090F8_SPI_ARB_CYCLES_1 0x0090F8 /* moved to 0xC708 on CIK */
2496 #define S_0090F8_TS2_DURATION(x) (((x) & 0xFFFF) << 0)
2497 #define G_0090F8_TS2_DURATION(x) (((x) >> 0) & 0xFFFF)
2498 #define C_0090F8_TS2_DURATION 0xFFFF0000
2500 #define R_008F40_SQ_FLAT_SCRATCH_WORD0 0x008F40
2501 #define S_008F40_SIZE(x) (((x) & 0x7FFFF) << 0)
2502 #define G_008F40_SIZE(x) (((x) >> 0) & 0x7FFFF)
2503 #define C_008F40_SIZE 0xFFF80000
2504 #define R_008F44_SQ_FLAT_SCRATCH_WORD1 0x008F44
2505 #define S_008F44_OFFSET(x) (((x) & 0xFFFFFF) << 0)
2506 #define G_008F44_OFFSET(x) (((x) >> 0) & 0xFFFFFF)
2507 #define C_008F44_OFFSET 0xFF000000
2509 #define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8
2510 #define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC
2511 #define S_030FFC_COUNT_HI(x) (((x) & 0x7FFFFFFF) << 0)
2512 #define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF)
2513 #define C_030FFC_COUNT_HI 0x80000000
2514 #define R_009100_SPI_CONFIG_CNTL 0x009100
2515 #define S_009100_GPR_WRITE_PRIORITY(x) (((x) & 0x1FFFFF) << 0)
2516 #define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF)
2517 #define C_009100_GPR_WRITE_PRIORITY 0xFFE00000
2518 #define S_009100_EXP_PRIORITY_ORDER(x) (((x) & 0x07) << 21)
2519 #define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x07)
2520 #define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF
2521 #define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) & 0x1) << 24)
2522 #define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1)
2523 #define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF
2524 #define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) & 0x1) << 25)
2525 #define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1)
2526 #define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF
2527 #define S_009100_RSRC_MGMT_RESET(x) (((x) & 0x1) << 26)
2528 #define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1)
2529 #define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF
2530 #define R_00913C_SPI_CONFIG_CNTL_1 0x00913C
2531 #define S_00913C_VTX_DONE_DELAY(x) (((x) & 0x0F) << 0)
2532 #define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0x0F)
2533 #define C_00913C_VTX_DONE_DELAY 0xFFFFFFF0
2534 #define V_00913C_X_DELAY_14_CLKS 0x00
2535 #define V_00913C_X_DELAY_16_CLKS 0x01
2536 #define V_00913C_X_DELAY_18_CLKS 0x02
2537 #define V_00913C_X_DELAY_20_CLKS 0x03
2538 #define V_00913C_X_DELAY_22_CLKS 0x04
2539 #define V_00913C_X_DELAY_24_CLKS 0x05
2540 #define V_00913C_X_DELAY_26_CLKS 0x06
2541 #define V_00913C_X_DELAY_28_CLKS 0x07
2542 #define V_00913C_X_DELAY_30_CLKS 0x08
2543 #define V_00913C_X_DELAY_32_CLKS 0x09
2544 #define V_00913C_X_DELAY_34_CLKS 0x0A
2545 #define V_00913C_X_DELAY_4_CLKS 0x0B
2546 #define V_00913C_X_DELAY_6_CLKS 0x0C
2547 #define V_00913C_X_DELAY_8_CLKS 0x0D
2548 #define V_00913C_X_DELAY_10_CLKS 0x0E
2549 #define V_00913C_X_DELAY_12_CLKS 0x0F
2550 #define S_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) & 0x1) << 4)
2551 #define G_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1)
2552 #define C_00913C_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF
2553 #define S_00913C_PC_LIMIT_ENABLE(x) (((x) & 0x1) << 6)
2554 #define G_00913C_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1)
2555 #define C_00913C_PC_LIMIT_ENABLE 0xFFFFFFBF
2556 #define S_00913C_PC_LIMIT_STRICT(x) (((x) & 0x1) << 7)
2557 #define G_00913C_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1)
2558 #define C_00913C_PC_LIMIT_STRICT 0xFFFFFF7F
2559 #define S_00913C_PC_LIMIT_SIZE(x) (((x) & 0xFFFF) << 16)
2560 #define G_00913C_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF)
2561 #define C_00913C_PC_LIMIT_SIZE 0x0000FFFF
2562 #define R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0 0x00936C
2563 #define S_00936C_TYPE_A(x) (((x) & 0x0F) << 0)
2564 #define G_00936C_TYPE_A(x) (((x) >> 0) & 0x0F)
2565 #define C_00936C_TYPE_A 0xFFFFFFF0
2566 #define S_00936C_VGPR_A(x) (((x) & 0x07) << 4)
2567 #define G_00936C_VGPR_A(x) (((x) >> 4) & 0x07)
2568 #define C_00936C_VGPR_A 0xFFFFFF8F
2569 #define S_00936C_SGPR_A(x) (((x) & 0x07) << 7)
2570 #define G_00936C_SGPR_A(x) (((x) >> 7) & 0x07)
2571 #define C_00936C_SGPR_A 0xFFFFFC7F
2572 #define S_00936C_LDS_A(x) (((x) & 0x07) << 10)
2573 #define G_00936C_LDS_A(x) (((x) >> 10) & 0x07)
2574 #define C_00936C_LDS_A 0xFFFFE3FF
2575 #define S_00936C_WAVES_A(x) (((x) & 0x03) << 13)
2576 #define G_00936C_WAVES_A(x) (((x) >> 13) & 0x03)
2577 #define C_00936C_WAVES_A 0xFFFF9FFF
2578 #define S_00936C_EN_A(x) (((x) & 0x1) << 15)
2579 #define G_00936C_EN_A(x) (((x) >> 15) & 0x1)
2580 #define C_00936C_EN_A 0xFFFF7FFF
2581 #define S_00936C_TYPE_B(x) (((x) & 0x0F) << 16)
2582 #define G_00936C_TYPE_B(x) (((x) >> 16) & 0x0F)
2583 #define C_00936C_TYPE_B 0xFFF0FFFF
2584 #define S_00936C_VGPR_B(x) (((x) & 0x07) << 20)
2585 #define G_00936C_VGPR_B(x) (((x) >> 20) & 0x07)
2586 #define C_00936C_VGPR_B 0xFF8FFFFF
2587 #define S_00936C_SGPR_B(x) (((x) & 0x07) << 23)
2588 #define G_00936C_SGPR_B(x) (((x) >> 23) & 0x07)
2589 #define C_00936C_SGPR_B 0xFC7FFFFF
2590 #define S_00936C_LDS_B(x) (((x) & 0x07) << 26)
2591 #define G_00936C_LDS_B(x) (((x) >> 26) & 0x07)
2592 #define C_00936C_LDS_B 0xE3FFFFFF
2593 #define S_00936C_WAVES_B(x) (((x) & 0x03) << 29)
2594 #define G_00936C_WAVES_B(x) (((x) >> 29) & 0x03)
2595 #define C_00936C_WAVES_B 0x9FFFFFFF
2596 #define S_00936C_EN_B(x) (((x) & 0x1) << 31)
2597 #define G_00936C_EN_B(x) (((x) >> 31) & 0x1)
2598 #define C_00936C_EN_B 0x7FFFFFFF
2599 #define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C
2600 #define R_009858_DB_SUBTILE_CONTROL 0x009858
2601 #define S_009858_MSAA1_X(x) (((x) & 0x03) << 0)
2602 #define G_009858_MSAA1_X(x) (((x) >> 0) & 0x03)
2603 #define C_009858_MSAA1_X 0xFFFFFFFC
2604 #define S_009858_MSAA1_Y(x) (((x) & 0x03) << 2)
2605 #define G_009858_MSAA1_Y(x) (((x) >> 2) & 0x03)
2606 #define C_009858_MSAA1_Y 0xFFFFFFF3
2607 #define S_009858_MSAA2_X(x) (((x) & 0x03) << 4)
2608 #define G_009858_MSAA2_X(x) (((x) >> 4) & 0x03)
2609 #define C_009858_MSAA2_X 0xFFFFFFCF
2610 #define S_009858_MSAA2_Y(x) (((x) & 0x03) << 6)
2611 #define G_009858_MSAA2_Y(x) (((x) >> 6) & 0x03)
2612 #define C_009858_MSAA2_Y 0xFFFFFF3F
2613 #define S_009858_MSAA4_X(x) (((x) & 0x03) << 8)
2614 #define G_009858_MSAA4_X(x) (((x) >> 8) & 0x03)
2615 #define C_009858_MSAA4_X 0xFFFFFCFF
2616 #define S_009858_MSAA4_Y(x) (((x) & 0x03) << 10)
2617 #define G_009858_MSAA4_Y(x) (((x) >> 10) & 0x03)
2618 #define C_009858_MSAA4_Y 0xFFFFF3FF
2619 #define S_009858_MSAA8_X(x) (((x) & 0x03) << 12)
2620 #define G_009858_MSAA8_X(x) (((x) >> 12) & 0x03)
2621 #define C_009858_MSAA8_X 0xFFFFCFFF
2622 #define S_009858_MSAA8_Y(x) (((x) & 0x03) << 14)
2623 #define G_009858_MSAA8_Y(x) (((x) >> 14) & 0x03)
2624 #define C_009858_MSAA8_Y 0xFFFF3FFF
2625 #define S_009858_MSAA16_X(x) (((x) & 0x03) << 16)
2626 #define G_009858_MSAA16_X(x) (((x) >> 16) & 0x03)
2627 #define C_009858_MSAA16_X 0xFFFCFFFF
2628 #define S_009858_MSAA16_Y(x) (((x) & 0x03) << 18)
2629 #define G_009858_MSAA16_Y(x) (((x) >> 18) & 0x03)
2630 #define C_009858_MSAA16_Y 0xFFF3FFFF
2631 #define R_0098F8_GB_ADDR_CONFIG 0x0098F8
2632 #define S_0098F8_NUM_PIPES(x) (((x) & 0x07) << 0)
2633 #define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x07)
2634 #define C_0098F8_NUM_PIPES 0xFFFFFFF8
2635 #define S_0098F8_PIPE_INTERLEAVE_SIZE(x) (((x) & 0x07) << 4)
2636 #define G_0098F8_PIPE_INTERLEAVE_SIZE(x) (((x) >> 4) & 0x07)
2637 #define C_0098F8_PIPE_INTERLEAVE_SIZE 0xFFFFFF8F
2638 #define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) & 0x07) << 8)
2639 #define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x07)
2640 #define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF
2641 #define S_0098F8_NUM_SHADER_ENGINES(x) (((x) & 0x03) << 12)
2642 #define G_0098F8_NUM_SHADER_ENGINES(x) (((x) >> 12) & 0x03)
2643 #define C_0098F8_NUM_SHADER_ENGINES 0xFFFFCFFF
2644 #define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) & 0x07) << 16)
2645 #define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x07)
2646 #define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF
2647 #define S_0098F8_NUM_GPUS(x) (((x) & 0x07) << 20)
2648 #define G_0098F8_NUM_GPUS(x) (((x) >> 20) & 0x07)
2649 #define C_0098F8_NUM_GPUS 0xFF8FFFFF
2650 #define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) & 0x03) << 24)
2651 #define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x03)
2652 #define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF
2653 #define S_0098F8_ROW_SIZE(x) (((x) & 0x03) << 28)
2654 #define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x03)
2655 #define C_0098F8_ROW_SIZE 0xCFFFFFFF
2656 #define S_0098F8_NUM_LOWER_PIPES(x) (((x) & 0x1) << 30)
2657 #define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1)
2658 #define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF
2659 #define R_009910_GB_TILE_MODE0 0x009910
2660 #define S_009910_MICRO_TILE_MODE(x) (((x) & 0x03) << 0)
2661 #define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03)
2662 #define C_009910_MICRO_TILE_MODE 0xFFFFFFFC
2663 #define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00
2664 #define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01
2665 #define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02
2666 #define V_009910_ADDR_SURF_THICK_MICRO_TILING 0x03
2667 #define S_009910_ARRAY_MODE(x) (((x) & 0x0F) << 2)
2668 #define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0x0F)
2669 #define C_009910_ARRAY_MODE 0xFFFFFFC3
2670 #define V_009910_ARRAY_LINEAR_GENERAL 0x00
2671 #define V_009910_ARRAY_LINEAR_ALIGNED 0x01
2672 #define V_009910_ARRAY_1D_TILED_THIN1 0x02
2673 #define V_009910_ARRAY_1D_TILED_THICK 0x03
2674 #define V_009910_ARRAY_2D_TILED_THIN1 0x04
2675 #define V_009910_ARRAY_2D_TILED_THICK 0x07
2676 #define V_009910_ARRAY_2D_TILED_XTHICK 0x08
2677 #define V_009910_ARRAY_3D_TILED_THIN1 0x0C
2678 #define V_009910_ARRAY_3D_TILED_THICK 0x0D
2679 #define V_009910_ARRAY_3D_TILED_XTHICK 0x0E
2680 #define V_009910_ARRAY_POWER_SAVE 0x0F
2681 #define S_009910_PIPE_CONFIG(x) (((x) & 0x1F) << 6)
2682 #define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F)
2683 #define C_009910_PIPE_CONFIG 0xFFFFF83F
2684 #define V_009910_ADDR_SURF_P2 0x00
2685 #define V_009910_ADDR_SURF_P2_RESERVED0 0x01
2686 #define V_009910_ADDR_SURF_P2_RESERVED1 0x02
2687 #define V_009910_ADDR_SURF_P2_RESERVED2 0x03
2688 #define V_009910_X_ADDR_SURF_P4_8X16 0x04
2689 #define V_009910_X_ADDR_SURF_P4_16X16 0x05
2690 #define V_009910_X_ADDR_SURF_P4_16X32 0x06
2691 #define V_009910_X_ADDR_SURF_P4_32X32 0x07
2692 #define V_009910_X_ADDR_SURF_P8_16X16_8X16 0x08
2693 #define V_009910_X_ADDR_SURF_P8_16X32_8X16 0x09
2694 #define V_009910_X_ADDR_SURF_P8_32X32_8X16 0x0A
2695 #define V_009910_X_ADDR_SURF_P8_16X32_16X16 0x0B
2696 #define V_009910_X_ADDR_SURF_P8_32X32_16X16 0x0C
2697 #define V_009910_X_ADDR_SURF_P8_32X32_16X32 0x0D
2698 #define V_009910_X_ADDR_SURF_P8_32X64_32X32 0x0E
2699 #define S_009910_TILE_SPLIT(x) (((x) & 0x07) << 11)
2700 #define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x07)
2701 #define C_009910_TILE_SPLIT 0xFFFFC7FF
2702 #define V_009910_ADDR_SURF_TILE_SPLIT_64B 0x00
2703 #define V_009910_ADDR_SURF_TILE_SPLIT_128B 0x01
2704 #define V_009910_ADDR_SURF_TILE_SPLIT_256B 0x02
2705 #define V_009910_ADDR_SURF_TILE_SPLIT_512B 0x03
2706 #define V_009910_ADDR_SURF_TILE_SPLIT_1KB 0x04
2707 #define V_009910_ADDR_SURF_TILE_SPLIT_2KB 0x05
2708 #define V_009910_ADDR_SURF_TILE_SPLIT_4KB 0x06
2709 #define S_009910_BANK_WIDTH(x) (((x) & 0x03) << 14)
2710 #define G_009910_BANK_WIDTH(x) (((x) >> 14) & 0x03)
2711 #define C_009910_BANK_WIDTH 0xFFFF3FFF
2712 #define V_009910_ADDR_SURF_BANK_WIDTH_1 0x00
2713 #define V_009910_ADDR_SURF_BANK_WIDTH_2 0x01
2714 #define V_009910_ADDR_SURF_BANK_WIDTH_4 0x02
2715 #define V_009910_ADDR_SURF_BANK_WIDTH_8 0x03
2716 #define S_009910_BANK_HEIGHT(x) (((x) & 0x03) << 16)
2717 #define G_009910_BANK_HEIGHT(x) (((x) >> 16) & 0x03)
2718 #define C_009910_BANK_HEIGHT 0xFFFCFFFF
2719 #define V_009910_ADDR_SURF_BANK_HEIGHT_1 0x00
2720 #define V_009910_ADDR_SURF_BANK_HEIGHT_2 0x01
2721 #define V_009910_ADDR_SURF_BANK_HEIGHT_4 0x02
2722 #define V_009910_ADDR_SURF_BANK_HEIGHT_8 0x03
2723 #define S_009910_MACRO_TILE_ASPECT(x) (((x) & 0x03) << 18)
2724 #define G_009910_MACRO_TILE_ASPECT(x) (((x) >> 18) & 0x03)
2725 #define C_009910_MACRO_TILE_ASPECT 0xFFF3FFFF
2726 #define V_009910_ADDR_SURF_MACRO_ASPECT_1 0x00
2727 #define V_009910_ADDR_SURF_MACRO_ASPECT_2 0x01
2728 #define V_009910_ADDR_SURF_MACRO_ASPECT_4 0x02
2729 #define V_009910_ADDR_SURF_MACRO_ASPECT_8 0x03
2730 #define S_009910_NUM_BANKS(x) (((x) & 0x03) << 20)
2731 #define G_009910_NUM_BANKS(x) (((x) >> 20) & 0x03)
2732 #define C_009910_NUM_BANKS 0xFFCFFFFF
2733 #define V_009910_ADDR_SURF_2_BANK 0x00
2734 #define V_009910_ADDR_SURF_4_BANK 0x01
2735 #define V_009910_ADDR_SURF_8_BANK 0x02
2736 #define V_009910_ADDR_SURF_16_BANK 0x03
2737 #define S_009910_MICRO_TILE_MODE_NEW(x) (((x) & 0x07) << 22)
2738 #define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07)
2739 #define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF
2740 #define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00
2741 #define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01
2742 #define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02
2743 #define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 0x03
2744 #define S_009910_SAMPLE_SPLIT(x) (((x) & 0x03) << 25)
2745 #define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x03)
2746 #define C_009910_SAMPLE_SPLIT 0xF9FFFFFF
2747 #define R_009914_GB_TILE_MODE1 0x009914
2748 #define R_009918_GB_TILE_MODE2 0x009918
2749 #define R_00991C_GB_TILE_MODE3 0x00991C
2750 #define R_009920_GB_TILE_MODE4 0x009920
2751 #define R_009924_GB_TILE_MODE5 0x009924
2752 #define R_009928_GB_TILE_MODE6 0x009928
2753 #define R_00992C_GB_TILE_MODE7 0x00992C
2754 #define R_009930_GB_TILE_MODE8 0x009930
2755 #define R_009934_GB_TILE_MODE9 0x009934
2756 #define R_009938_GB_TILE_MODE10 0x009938
2757 #define R_00993C_GB_TILE_MODE11 0x00993C
2758 #define R_009940_GB_TILE_MODE12 0x009940
2759 #define R_009944_GB_TILE_MODE13 0x009944
2760 #define R_009948_GB_TILE_MODE14 0x009948
2761 #define R_00994C_GB_TILE_MODE15 0x00994C
2762 #define R_009950_GB_TILE_MODE16 0x009950
2763 #define R_009954_GB_TILE_MODE17 0x009954
2764 #define R_009958_GB_TILE_MODE18 0x009958
2765 #define R_00995C_GB_TILE_MODE19 0x00995C
2766 #define R_009960_GB_TILE_MODE20 0x009960
2767 #define R_009964_GB_TILE_MODE21 0x009964
2768 #define R_009968_GB_TILE_MODE22 0x009968
2769 #define R_00996C_GB_TILE_MODE23 0x00996C
2770 #define R_009970_GB_TILE_MODE24 0x009970
2771 #define R_009974_GB_TILE_MODE25 0x009974
2772 #define R_009978_GB_TILE_MODE26 0x009978
2773 #define R_00997C_GB_TILE_MODE27 0x00997C
2774 #define R_009980_GB_TILE_MODE28 0x009980
2775 #define R_009984_GB_TILE_MODE29 0x009984
2776 #define R_009988_GB_TILE_MODE30 0x009988
2777 #define R_00998C_GB_TILE_MODE31 0x00998C
2779 #define R_009990_GB_MACROTILE_MODE0 0x009990
2780 #define S_009990_BANK_WIDTH(x) (((x) & 0x03) << 0)
2781 #define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x03)
2782 #define C_009990_BANK_WIDTH 0xFFFFFFFC
2783 #define S_009990_BANK_HEIGHT(x) (((x) & 0x03) << 2)
2784 #define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x03)
2785 #define C_009990_BANK_HEIGHT 0xFFFFFFF3
2786 #define S_009990_MACRO_TILE_ASPECT(x) (((x) & 0x03) << 4)
2787 #define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x03)
2788 #define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF
2789 #define S_009990_NUM_BANKS(x) (((x) & 0x03) << 6)
2790 #define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x03)
2791 #define C_009990_NUM_BANKS 0xFFFFFF3F
2792 #define R_009994_GB_MACROTILE_MODE1 0x009994
2793 #define R_009998_GB_MACROTILE_MODE2 0x009998
2794 #define R_00999C_GB_MACROTILE_MODE3 0x00999C
2795 #define R_0099A0_GB_MACROTILE_MODE4 0x0099A0
2796 #define R_0099A4_GB_MACROTILE_MODE5 0x0099A4
2797 #define R_0099A8_GB_MACROTILE_MODE6 0x0099A8
2798 #define R_0099AC_GB_MACROTILE_MODE7 0x0099AC
2799 #define R_0099B0_GB_MACROTILE_MODE8 0x0099B0
2800 #define R_0099B4_GB_MACROTILE_MODE9 0x0099B4
2801 #define R_0099B8_GB_MACROTILE_MODE10 0x0099B8
2802 #define R_0099BC_GB_MACROTILE_MODE11 0x0099BC
2803 #define R_0099C0_GB_MACROTILE_MODE12 0x0099C0
2804 #define R_0099C4_GB_MACROTILE_MODE13 0x0099C4
2805 #define R_0099C8_GB_MACROTILE_MODE14 0x0099C8
2806 #define R_0099CC_GB_MACROTILE_MODE15 0x0099CC
2808 #define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000
2809 #define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004
2810 #define S_00B004_MEM_BASE(x) (((x) & 0xFF) << 0)
2811 #define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF)
2812 #define C_00B004_MEM_BASE 0xFFFFFF00
2813 #define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008
2814 #define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C
2815 #define S_00B00C_MEM_BASE(x) (((x) & 0xFF) << 0)
2816 #define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF)
2817 #define C_00B00C_MEM_BASE 0xFFFFFF00
2819 #define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C
2820 #define S_00B01C_CU_EN(x) (((x) & 0xFFFF) << 0)
2821 #define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF)
2822 #define C_00B01C_CU_EN 0xFFFF0000
2823 #define S_00B01C_WAVE_LIMIT(x) (((x) & 0x3F) << 16)
2824 #define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F)
2825 #define C_00B01C_WAVE_LIMIT 0xFFC0FFFF
2826 #define S_00B01C_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 22)
2827 #define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F)
2828 #define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF
2830 #define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020
2831 #define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024
2832 #define S_00B024_MEM_BASE(x) (((x) & 0xFF) << 0)
2833 #define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF)
2834 #define C_00B024_MEM_BASE 0xFFFFFF00
2835 #define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
2836 #define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
2837 #define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F)
2838 #define C_00B028_VGPRS 0xFFFFFFC0
2839 #define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
2840 #define G_00B028_SGPRS(x) (((x) >> 6) & 0x0F)
2841 #define C_00B028_SGPRS 0xFFFFFC3F
2842 #define S_00B028_PRIORITY(x) (((x) & 0x03) << 10)
2843 #define G_00B028_PRIORITY(x) (((x) >> 10) & 0x03)
2844 #define C_00B028_PRIORITY 0xFFFFF3FF
2845 #define S_00B028_FLOAT_MODE(x) (((x) & 0xFF) << 12)
2846 #define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
2847 #define C_00B028_FLOAT_MODE 0xFFF00FFF
2848 #define S_00B028_PRIV(x) (((x) & 0x1) << 20)
2849 #define G_00B028_PRIV(x) (((x) >> 20) & 0x1)
2850 #define C_00B028_PRIV 0xFFEFFFFF
2851 #define S_00B028_DX10_CLAMP(x) (((x) & 0x1) << 21)
2852 #define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1)
2853 #define C_00B028_DX10_CLAMP 0xFFDFFFFF
2854 #define S_00B028_DEBUG_MODE(x) (((x) & 0x1) << 22)
2855 #define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1)
2856 #define C_00B028_DEBUG_MODE 0xFFBFFFFF
2857 #define S_00B028_IEEE_MODE(x) (((x) & 0x1) << 23)
2858 #define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1)
2859 #define C_00B028_IEEE_MODE 0xFF7FFFFF
2860 #define S_00B028_CU_GROUP_DISABLE(x) (((x) & 0x1) << 24)
2861 #define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1)
2862 #define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF
2864 #define S_00B028_CACHE_CTL(x) (((x) & 0x07) << 25)
2865 #define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x07)
2866 #define C_00B028_CACHE_CTL 0xF1FFFFFF
2867 #define S_00B028_CDBG_USER(x) (((x) & 0x1) << 28)
2868 #define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1)
2869 #define C_00B028_CDBG_USER 0xEFFFFFFF
2871 #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
2872 #define S_00B02C_SCRATCH_EN(x) (((x) & 0x1) << 0)
2873 #define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
2874 #define C_00B02C_SCRATCH_EN 0xFFFFFFFE
2875 #define S_00B02C_USER_SGPR(x) (((x) & 0x1F) << 1)
2876 #define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F)
2877 #define C_00B02C_USER_SGPR 0xFFFFFFC1
2878 #define S_00B02C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
2879 #define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
2880 #define C_00B02C_TRAP_PRESENT 0xFFFFFFBF
2881 #define S_00B02C_WAVE_CNT_EN(x) (((x) & 0x1) << 7)
2882 #define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1)
2883 #define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F
2884 #define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
2885 #define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF)
2886 #define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF
2887 #define S_00B02C_EXCP_EN(x) (((x) & 0x7F) << 16) /* mask is 0x1FF on CIK */
2888 #define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */
2889 #define C_00B02C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */
2890 #define S_00B02C_EXCP_EN_CIK(x) (((x) & 0x1FF) << 16)
2891 #define G_00B02C_EXCP_EN_CIK(x) (((x) >> 16) & 0x1FF)
2892 #define C_00B02C_EXCP_EN_CIK 0xFE00FFFF
2893 #define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030
2894 #define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034
2895 #define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038
2896 #define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C
2897 #define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040
2898 #define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044
2899 #define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048
2900 #define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C
2901 #define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050
2902 #define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054
2903 #define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058
2904 #define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C
2905 #define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060
2906 #define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064
2907 #define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068
2908 #define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C
2909 #define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100
2910 #define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104
2911 #define S_00B104_MEM_BASE(x) (((x) & 0xFF) << 0)
2912 #define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF)
2913 #define C_00B104_MEM_BASE 0xFFFFFF00
2914 #define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108
2915 #define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C
2916 #define S_00B10C_MEM_BASE(x) (((x) & 0xFF) << 0)
2917 #define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF)
2918 #define C_00B10C_MEM_BASE 0xFFFFFF00
2920 #define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118
2921 #define S_00B118_CU_EN(x) (((x) & 0xFFFF) << 0)
2922 #define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF)
2923 #define C_00B118_CU_EN 0xFFFF0000
2924 #define S_00B118_WAVE_LIMIT(x) (((x) & 0x3F) << 16)
2925 #define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F)
2926 #define C_00B118_WAVE_LIMIT 0xFFC0FFFF
2927 #define S_00B118_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 22)
2928 #define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F)
2929 #define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF
2930 #define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C
2931 #define S_00B11C_LIMIT(x) (((x) & 0x3F) << 0)
2932 #define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F)
2933 #define C_00B11C_LIMIT 0xFFFFFFC0
2935 #define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120
2936 #define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124
2937 #define S_00B124_MEM_BASE(x) (((x) & 0xFF) << 0)
2938 #define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF)
2939 #define C_00B124_MEM_BASE 0xFFFFFF00
2940 #define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
2941 #define S_00B128_VGPRS(x) (((x) & 0x3F) << 0)
2942 #define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F)
2943 #define C_00B128_VGPRS 0xFFFFFFC0
2944 #define S_00B128_SGPRS(x) (((x) & 0x0F) << 6)
2945 #define G_00B128_SGPRS(x) (((x) >> 6) & 0x0F)
2946 #define C_00B128_SGPRS 0xFFFFFC3F
2947 #define S_00B128_PRIORITY(x) (((x) & 0x03) << 10)
2948 #define G_00B128_PRIORITY(x) (((x) >> 10) & 0x03)
2949 #define C_00B128_PRIORITY 0xFFFFF3FF
2950 #define S_00B128_FLOAT_MODE(x) (((x) & 0xFF) << 12)
2951 #define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
2952 #define C_00B128_FLOAT_MODE 0xFFF00FFF
2953 #define S_00B128_PRIV(x) (((x) & 0x1) << 20)
2954 #define G_00B128_PRIV(x) (((x) >> 20) & 0x1)
2955 #define C_00B128_PRIV 0xFFEFFFFF
2956 #define S_00B128_DX10_CLAMP(x) (((x) & 0x1) << 21)
2957 #define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1)
2958 #define C_00B128_DX10_CLAMP 0xFFDFFFFF
2959 #define S_00B128_DEBUG_MODE(x) (((x) & 0x1) << 22)
2960 #define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1)
2961 #define C_00B128_DEBUG_MODE 0xFFBFFFFF
2962 #define S_00B128_IEEE_MODE(x) (((x) & 0x1) << 23)
2963 #define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1)
2964 #define C_00B128_IEEE_MODE 0xFF7FFFFF
2965 #define S_00B128_VGPR_COMP_CNT(x) (((x) & 0x03) << 24)
2966 #define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03)
2967 #define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF
2968 #define S_00B128_CU_GROUP_ENABLE(x) (((x) & 0x1) << 26)
2969 #define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1)
2970 #define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF
2972 #define S_00B128_CACHE_CTL(x) (((x) & 0x07) << 27)
2973 #define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x07)
2974 #define C_00B128_CACHE_CTL 0xC7FFFFFF
2975 #define S_00B128_CDBG_USER(x) (((x) & 0x1) << 30)
2976 #define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1)
2977 #define C_00B128_CDBG_USER 0xBFFFFFFF
2979 #define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C
2980 #define S_00B12C_SCRATCH_EN(x) (((x) & 0x1) << 0)
2981 #define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
2982 #define C_00B12C_SCRATCH_EN 0xFFFFFFFE
2983 #define S_00B12C_USER_SGPR(x) (((x) & 0x1F) << 1)
2984 #define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F)
2985 #define C_00B12C_USER_SGPR 0xFFFFFFC1
2986 #define S_00B12C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
2987 #define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
2988 #define C_00B12C_TRAP_PRESENT 0xFFFFFFBF
2989 #define S_00B12C_OC_LDS_EN(x) (((x) & 0x1) << 7)
2990 #define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1)
2991 #define C_00B12C_OC_LDS_EN 0xFFFFFF7F
2992 #define S_00B12C_SO_BASE0_EN(x) (((x) & 0x1) << 8)
2993 #define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1)
2994 #define C_00B12C_SO_BASE0_EN 0xFFFFFEFF
2995 #define S_00B12C_SO_BASE1_EN(x) (((x) & 0x1) << 9)
2996 #define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1)
2997 #define C_00B12C_SO_BASE1_EN 0xFFFFFDFF
2998 #define S_00B12C_SO_BASE2_EN(x) (((x) & 0x1) << 10)
2999 #define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1)
3000 #define C_00B12C_SO_BASE2_EN 0xFFFFFBFF
3001 #define S_00B12C_SO_BASE3_EN(x) (((x) & 0x1) << 11)
3002 #define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1)
3003 #define C_00B12C_SO_BASE3_EN 0xFFFFF7FF
3004 #define S_00B12C_SO_EN(x) (((x) & 0x1) << 12)
3005 #define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1)
3006 #define C_00B12C_SO_EN 0xFFFFEFFF
3007 #define S_00B12C_EXCP_EN(x) (((x) & 0x7F) << 13) /* mask is 0x1FF on CIK */
3008 #define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x7F) /* mask is 0x1FF on CIK */
3009 #define C_00B12C_EXCP_EN 0xFFF01FFF /* mask is 0x1FF on CIK */
3010 #define S_00B12C_EXCP_EN_CIK(x) (((x) & 0x1FF) << 13)
3011 #define G_00B12C_EXCP_EN_CIK(x) (((x) >> 13) & 0x1FF)
3012 #define C_00B12C_EXCP_EN_CIK 0xFFC01FFF
3014 #define S_00B12C_DISPATCH_DRAW_EN(x) (((x) & 0x1) << 24)
3015 #define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1)
3016 #define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF
3018 #define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130
3019 #define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134
3020 #define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138
3021 #define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C
3022 #define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140
3023 #define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144
3024 #define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148
3025 #define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C
3026 #define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150
3027 #define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154
3028 #define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158
3029 #define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C
3030 #define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160
3031 #define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164
3032 #define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168
3033 #define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C
3034 #define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200
3035 #define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204
3036 #define S_00B204_MEM_BASE(x) (((x) & 0xFF) << 0)
3037 #define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF)
3038 #define C_00B204_MEM_BASE 0xFFFFFF00
3039 #define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208
3040 #define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C
3041 #define S_00B20C_MEM_BASE(x) (((x) & 0xFF) << 0)
3042 #define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF)
3043 #define C_00B20C_MEM_BASE 0xFFFFFF00
3045 #define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C
3046 #define S_00B21C_CU_EN(x) (((x) & 0xFFFF) << 0)
3047 #define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF)
3048 #define C_00B21C_CU_EN 0xFFFF0000
3049 #define S_00B21C_WAVE_LIMIT(x) (((x) & 0x3F) << 16)
3050 #define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F)
3051 #define C_00B21C_WAVE_LIMIT 0xFFC0FFFF
3052 #define S_00B21C_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 22)
3053 #define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F)
3054 #define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF
3057 #define S_00B21C_GROUP_FIFO_DEPTH(x) (((x) & 0x3F) << 26)
3058 #define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F)
3059 #define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF
3061 #define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220
3062 #define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224
3063 #define S_00B224_MEM_BASE(x) (((x) & 0xFF) << 0)
3064 #define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF)
3065 #define C_00B224_MEM_BASE 0xFFFFFF00
3066 #define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
3067 #define S_00B228_VGPRS(x) (((x) & 0x3F) << 0)
3068 #define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F)
3069 #define C_00B228_VGPRS 0xFFFFFFC0
3070 #define S_00B228_SGPRS(x) (((x) & 0x0F) << 6)
3071 #define G_00B228_SGPRS(x) (((x) >> 6) & 0x0F)
3072 #define C_00B228_SGPRS 0xFFFFFC3F
3073 #define S_00B228_PRIORITY(x) (((x) & 0x03) << 10)
3074 #define G_00B228_PRIORITY(x) (((x) >> 10) & 0x03)
3075 #define C_00B228_PRIORITY 0xFFFFF3FF
3076 #define S_00B228_FLOAT_MODE(x) (((x) & 0xFF) << 12)
3077 #define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
3078 #define C_00B228_FLOAT_MODE 0xFFF00FFF
3079 #define S_00B228_PRIV(x) (((x) & 0x1) << 20)
3080 #define G_00B228_PRIV(x) (((x) >> 20) & 0x1)
3081 #define C_00B228_PRIV 0xFFEFFFFF
3082 #define S_00B228_DX10_CLAMP(x) (((x) & 0x1) << 21)
3083 #define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1)
3084 #define C_00B228_DX10_CLAMP 0xFFDFFFFF
3085 #define S_00B228_DEBUG_MODE(x) (((x) & 0x1) << 22)
3086 #define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1)
3087 #define C_00B228_DEBUG_MODE 0xFFBFFFFF
3088 #define S_00B228_IEEE_MODE(x) (((x) & 0x1) << 23)
3089 #define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1)
3090 #define C_00B228_IEEE_MODE 0xFF7FFFFF
3091 #define S_00B228_CU_GROUP_ENABLE(x) (((x) & 0x1) << 24)
3092 #define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1)
3093 #define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF
3095 #define S_00B228_CACHE_CTL(x) (((x) & 0x07) << 25)
3096 #define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x07)
3097 #define C_00B228_CACHE_CTL 0xF1FFFFFF
3098 #define S_00B228_CDBG_USER(x) (((x) & 0x1) << 28)
3099 #define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1)
3100 #define C_00B228_CDBG_USER 0xEFFFFFFF
3102 #define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C
3103 #define S_00B22C_SCRATCH_EN(x) (((x) & 0x1) << 0)
3104 #define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
3105 #define C_00B22C_SCRATCH_EN 0xFFFFFFFE
3106 #define S_00B22C_USER_SGPR(x) (((x) & 0x1F) << 1)
3107 #define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F)
3108 #define C_00B22C_USER_SGPR 0xFFFFFFC1
3109 #define S_00B22C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
3110 #define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
3111 #define C_00B22C_TRAP_PRESENT 0xFFFFFFBF
3112 #define S_00B22C_EXCP_EN(x) (((x) & 0x7F) << 7) /* mask is 0x1FF on CIK */
3113 #define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x7F) /* mask is 0x1FF on CIK */
3114 #define C_00B22C_EXCP_EN 0xFFFFC07F /* mask is 0x1FF on CIK */
3115 #define S_00B22C_EXCP_EN_CIK(x) (((x) & 0x1FF) << 7)
3116 #define G_00B22C_EXCP_EN_CIK(x) (((x) >> 7) & 0x1FF)
3117 #define C_00B22C_EXCP_EN_CIK 0xFFFF007F
3118 #define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230
3119 #define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234
3120 #define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238
3121 #define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C
3122 #define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240
3123 #define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244
3124 #define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248
3125 #define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C
3126 #define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250
3127 #define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254
3128 #define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258
3129 #define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C
3130 #define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260
3131 #define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264
3132 #define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268
3133 #define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C
3134 #define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300
3135 #define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304
3136 #define S_00B304_MEM_BASE(x) (((x) & 0xFF) << 0)
3137 #define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF)
3138 #define C_00B304_MEM_BASE 0xFFFFFF00
3139 #define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308
3140 #define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C
3141 #define S_00B30C_MEM_BASE(x) (((x) & 0xFF) << 0)
3142 #define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF)
3143 #define C_00B30C_MEM_BASE 0xFFFFFF00
3145 #define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C
3146 #define S_00B31C_CU_EN(x) (((x) & 0xFFFF) << 0)
3147 #define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF)
3148 #define C_00B31C_CU_EN 0xFFFF0000
3149 #define S_00B31C_WAVE_LIMIT(x) (((x) & 0x3F) << 16)
3150 #define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F)
3151 #define C_00B31C_WAVE_LIMIT 0xFFC0FFFF
3152 #define S_00B31C_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 22)
3153 #define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F)
3154 #define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF
3157 #define S_00B31C_GROUP_FIFO_DEPTH(x) (((x) & 0x3F) << 26)
3158 #define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F)
3159 #define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF
3161 #define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320
3162 #define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324
3163 #define S_00B324_MEM_BASE(x) (((x) & 0xFF) << 0)
3164 #define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF)
3165 #define C_00B324_MEM_BASE 0xFFFFFF00
3166 #define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328
3167 #define S_00B328_VGPRS(x) (((x) & 0x3F) << 0)
3168 #define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F)
3169 #define C_00B328_VGPRS 0xFFFFFFC0
3170 #define S_00B328_SGPRS(x) (((x) & 0x0F) << 6)
3171 #define G_00B328_SGPRS(x) (((x) >> 6) & 0x0F)
3172 #define C_00B328_SGPRS 0xFFFFFC3F
3173 #define S_00B328_PRIORITY(x) (((x) & 0x03) << 10)
3174 #define G_00B328_PRIORITY(x) (((x) >> 10) & 0x03)
3175 #define C_00B328_PRIORITY 0xFFFFF3FF
3176 #define S_00B328_FLOAT_MODE(x) (((x) & 0xFF) << 12)
3177 #define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
3178 #define C_00B328_FLOAT_MODE 0xFFF00FFF
3179 #define S_00B328_PRIV(x) (((x) & 0x1) << 20)
3180 #define G_00B328_PRIV(x) (((x) >> 20) & 0x1)
3181 #define C_00B328_PRIV 0xFFEFFFFF
3182 #define S_00B328_DX10_CLAMP(x) (((x) & 0x1) << 21)
3183 #define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1)
3184 #define C_00B328_DX10_CLAMP 0xFFDFFFFF
3185 #define S_00B328_DEBUG_MODE(x) (((x) & 0x1) << 22)
3186 #define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1)
3187 #define C_00B328_DEBUG_MODE 0xFFBFFFFF
3188 #define S_00B328_IEEE_MODE(x) (((x) & 0x1) << 23)
3189 #define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1)
3190 #define C_00B328_IEEE_MODE 0xFF7FFFFF
3191 #define S_00B328_VGPR_COMP_CNT(x) (((x) & 0x03) << 24)
3192 #define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03)
3193 #define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF
3194 #define S_00B328_CU_GROUP_ENABLE(x) (((x) & 0x1) << 26)
3195 #define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1)
3196 #define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF
3198 #define S_00B328_CACHE_CTL(x) (((x) & 0x07) << 27)
3199 #define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x07)
3200 #define C_00B328_CACHE_CTL 0xC7FFFFFF
3201 #define S_00B328_CDBG_USER(x) (((x) & 0x1) << 30)
3202 #define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1)
3203 #define C_00B328_CDBG_USER 0xBFFFFFFF
3205 #define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C
3206 #define S_00B32C_SCRATCH_EN(x) (((x) & 0x1) << 0)
3207 #define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
3208 #define C_00B32C_SCRATCH_EN 0xFFFFFFFE
3209 #define S_00B32C_USER_SGPR(x) (((x) & 0x1F) << 1)
3210 #define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F)
3211 #define C_00B32C_USER_SGPR 0xFFFFFFC1
3212 #define S_00B32C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
3213 #define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
3214 #define C_00B32C_TRAP_PRESENT 0xFFFFFFBF
3215 #define S_00B32C_OC_LDS_EN(x) (((x) & 0x1) << 7)
3216 #define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1)
3217 #define C_00B32C_OC_LDS_EN 0xFFFFFF7F
3218 #define S_00B32C_EXCP_EN(x) (((x) & 0x7F) << 8) /* mask is 0x1FF on CIK */
3219 #define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x7F) /* mask is 0x1FF on CIK */
3220 #define C_00B32C_EXCP_EN 0xFFFF80FF /* mask is 0x1FF on CIK */
3221 #define S_00B32C_LDS_SIZE(x) (((x) & 0x1FF) << 20) /* CIK, for on-chip GS */
3222 #define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */
3223 #define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */
3224 #define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330
3225 #define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334
3226 #define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338
3227 #define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C
3228 #define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340
3229 #define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344
3230 #define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348
3231 #define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C
3232 #define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350
3233 #define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354
3234 #define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358
3235 #define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C
3236 #define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360
3237 #define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364
3238 #define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368
3239 #define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C
3240 #define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400
3241 #define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404
3242 #define S_00B404_MEM_BASE(x) (((x) & 0xFF) << 0)
3243 #define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF)
3244 #define C_00B404_MEM_BASE 0xFFFFFF00
3245 #define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408
3246 #define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C
3247 #define S_00B40C_MEM_BASE(x) (((x) & 0xFF) << 0)
3248 #define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF)
3249 #define C_00B40C_MEM_BASE 0xFFFFFF00
3251 #define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C
3252 #define S_00B41C_WAVE_LIMIT(x) (((x) & 0x3F) << 0)
3253 #define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F)
3254 #define C_00B41C_WAVE_LIMIT 0xFFFFFFC0
3255 #define S_00B41C_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 6)
3256 #define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0x0F)
3257 #define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F
3260 #define S_00B41C_GROUP_FIFO_DEPTH(x) (((x) & 0x3F) << 10)
3261 #define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F)
3262 #define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF
3264 #define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420
3265 #define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424
3266 #define S_00B424_MEM_BASE(x) (((x) & 0xFF) << 0)
3267 #define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF)
3268 #define C_00B424_MEM_BASE 0xFFFFFF00
3269 #define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428
3270 #define S_00B428_VGPRS(x) (((x) & 0x3F) << 0)
3271 #define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F)
3272 #define C_00B428_VGPRS 0xFFFFFFC0
3273 #define S_00B428_SGPRS(x) (((x) & 0x0F) << 6)
3274 #define G_00B428_SGPRS(x) (((x) >> 6) & 0x0F)
3275 #define C_00B428_SGPRS 0xFFFFFC3F
3276 #define S_00B428_PRIORITY(x) (((x) & 0x03) << 10)
3277 #define G_00B428_PRIORITY(x) (((x) >> 10) & 0x03)
3278 #define C_00B428_PRIORITY 0xFFFFF3FF
3279 #define S_00B428_FLOAT_MODE(x) (((x) & 0xFF) << 12)
3280 #define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
3281 #define C_00B428_FLOAT_MODE 0xFFF00FFF
3282 #define S_00B428_PRIV(x) (((x) & 0x1) << 20)
3283 #define G_00B428_PRIV(x) (((x) >> 20) & 0x1)
3284 #define C_00B428_PRIV 0xFFEFFFFF
3285 #define S_00B428_DX10_CLAMP(x) (((x) & 0x1) << 21)
3286 #define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1)
3287 #define C_00B428_DX10_CLAMP 0xFFDFFFFF
3288 #define S_00B428_DEBUG_MODE(x) (((x) & 0x1) << 22)
3289 #define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1)
3290 #define C_00B428_DEBUG_MODE 0xFFBFFFFF
3291 #define S_00B428_IEEE_MODE(x) (((x) & 0x1) << 23)
3292 #define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1)
3293 #define C_00B428_IEEE_MODE 0xFF7FFFFF
3295 #define S_00B428_CACHE_CTL(x) (((x) & 0x07) << 24)
3296 #define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x07)
3297 #define C_00B428_CACHE_CTL 0xF8FFFFFF
3298 #define S_00B428_CDBG_USER(x) (((x) & 0x1) << 27)
3299 #define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1)
3300 #define C_00B428_CDBG_USER 0xF7FFFFFF
3302 #define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C
3303 #define S_00B42C_SCRATCH_EN(x) (((x) & 0x1) << 0)
3304 #define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
3305 #define C_00B42C_SCRATCH_EN 0xFFFFFFFE
3306 #define S_00B42C_USER_SGPR(x) (((x) & 0x1F) << 1)
3307 #define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F)
3308 #define C_00B42C_USER_SGPR 0xFFFFFFC1
3309 #define S_00B42C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
3310 #define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
3311 #define C_00B42C_TRAP_PRESENT 0xFFFFFFBF
3312 #define S_00B42C_OC_LDS_EN(x) (((x) & 0x1) << 7)
3313 #define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1)
3314 #define C_00B42C_OC_LDS_EN 0xFFFFFF7F
3315 #define S_00B42C_TG_SIZE_EN(x) (((x) & 0x1) << 8)
3316 #define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1)
3317 #define C_00B42C_TG_SIZE_EN 0xFFFFFEFF
3318 #define S_00B42C_EXCP_EN(x) (((x) & 0x7F) << 9) /* mask is 0x1FF on CIK */
3319 #define G_00B42C_EXCP_EN(x) (((x) >> 9) & 0x7F) /* mask is 0x1FF on CIK */
3320 #define C_00B42C_EXCP_EN 0xFFFF01FF /* mask is 0x1FF on CIK */
3321 #define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430
3322 #define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434
3323 #define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438
3324 #define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C
3325 #define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440
3326 #define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444
3327 #define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448
3328 #define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C
3329 #define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450
3330 #define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454
3331 #define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458
3332 #define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C
3333 #define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460
3334 #define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464
3335 #define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468
3336 #define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C
3337 #define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500
3338 #define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504
3339 #define S_00B504_MEM_BASE(x) (((x) & 0xFF) << 0)
3340 #define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF)
3341 #define C_00B504_MEM_BASE 0xFFFFFF00
3342 #define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508
3343 #define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C
3344 #define S_00B50C_MEM_BASE(x) (((x) & 0xFF) << 0)
3345 #define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF)
3346 #define C_00B50C_MEM_BASE 0xFFFFFF00
3348 #define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C
3349 #define S_00B51C_CU_EN(x) (((x) & 0xFFFF) << 0)
3350 #define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF)
3351 #define C_00B51C_CU_EN 0xFFFF0000
3352 #define S_00B51C_WAVE_LIMIT(x) (((x) & 0x3F) << 16)
3353 #define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F)
3354 #define C_00B51C_WAVE_LIMIT 0xFFC0FFFF
3355 #define S_00B51C_LOCK_LOW_THRESHOLD(x) (((x) & 0x0F) << 22)
3356 #define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F)
3357 #define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF
3360 #define S_00B51C_GROUP_FIFO_DEPTH(x) (((x) & 0x3F) << 26)
3361 #define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F)
3362 #define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF
3364 #define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520
3365 #define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524
3366 #define S_00B524_MEM_BASE(x) (((x) & 0xFF) << 0)
3367 #define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF)
3368 #define C_00B524_MEM_BASE 0xFFFFFF00
3369 #define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528
3370 #define S_00B528_VGPRS(x) (((x) & 0x3F) << 0)
3371 #define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F)
3372 #define C_00B528_VGPRS 0xFFFFFFC0
3373 #define S_00B528_SGPRS(x) (((x) & 0x0F) << 6)
3374 #define G_00B528_SGPRS(x) (((x) >> 6) & 0x0F)
3375 #define C_00B528_SGPRS 0xFFFFFC3F
3376 #define S_00B528_PRIORITY(x) (((x) & 0x03) << 10)
3377 #define G_00B528_PRIORITY(x) (((x) >> 10) & 0x03)
3378 #define C_00B528_PRIORITY 0xFFFFF3FF
3379 #define S_00B528_FLOAT_MODE(x) (((x) & 0xFF) << 12)
3380 #define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
3381 #define C_00B528_FLOAT_MODE 0xFFF00FFF
3382 #define S_00B528_PRIV(x) (((x) & 0x1) << 20)
3383 #define G_00B528_PRIV(x) (((x) >> 20) & 0x1)
3384 #define C_00B528_PRIV 0xFFEFFFFF
3385 #define S_00B528_DX10_CLAMP(x) (((x) & 0x1) << 21)
3386 #define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1)
3387 #define C_00B528_DX10_CLAMP 0xFFDFFFFF
3388 #define S_00B528_DEBUG_MODE(x) (((x) & 0x1) << 22)
3389 #define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1)
3390 #define C_00B528_DEBUG_MODE 0xFFBFFFFF
3391 #define S_00B528_IEEE_MODE(x) (((x) & 0x1) << 23)
3392 #define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1)
3393 #define C_00B528_IEEE_MODE 0xFF7FFFFF
3394 #define S_00B528_VGPR_COMP_CNT(x) (((x) & 0x03) << 24)
3395 #define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03)
3396 #define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF
3398 #define S_00B528_CACHE_CTL(x) (((x) & 0x07) << 26)
3399 #define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x07)
3400 #define C_00B528_CACHE_CTL 0xE3FFFFFF
3401 #define S_00B528_CDBG_USER(x) (((x) & 0x1) << 29)
3402 #define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1)
3403 #define C_00B528_CDBG_USER 0xDFFFFFFF
3405 #define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C
3406 #define S_00B52C_SCRATCH_EN(x) (((x) & 0x1) << 0)
3407 #define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
3408 #define C_00B52C_SCRATCH_EN 0xFFFFFFFE
3409 #define S_00B52C_USER_SGPR(x) (((x) & 0x1F) << 1)
3410 #define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F)
3411 #define C_00B52C_USER_SGPR 0xFFFFFFC1
3412 #define S_00B52C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
3413 #define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
3414 #define C_00B52C_TRAP_PRESENT 0xFFFFFFBF
3415 #define S_00B52C_LDS_SIZE(x) (((x) & 0x1FF) << 7)
3416 #define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF)
3417 #define C_00B52C_LDS_SIZE 0xFFFF007F
3418 #define S_00B52C_EXCP_EN(x) (((x) & 0x7F) << 16) /* mask is 0x1FF on CIK */
3419 #define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */
3420 #define C_00B52C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */
3421 #define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530
3422 #define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534
3423 #define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538
3424 #define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C
3425 #define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540
3426 #define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544
3427 #define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548
3428 #define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C
3429 #define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550
3430 #define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554
3431 #define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558
3432 #define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C
3433 #define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560
3434 #define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564
3435 #define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568
3436 #define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C
3437 #define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800
3438 #define S_00B800_COMPUTE_SHADER_EN(x) (((x) & 0x1) << 0)
3439 #define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1)
3440 #define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE
3441 #define S_00B800_PARTIAL_TG_EN(x) (((x) & 0x1) << 1)
3442 #define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1)
3443 #define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD
3444 #define S_00B800_FORCE_START_AT_000(x) (((x) & 0x1) << 2)
3445 #define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1)
3446 #define C_00B800_FORCE_START_AT_000 0xFFFFFFFB
3447 #define S_00B800_ORDERED_APPEND_ENBL(x) (((x) & 0x1) << 3)
3448 #define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1)
3449 #define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7
3451 #define S_00B800_ORDERED_APPEND_MODE(x) (((x) & 0x1) << 4)
3452 #define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1)
3453 #define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF
3454 #define S_00B800_USE_THREAD_DIMENSIONS(x) (((x) & 0x1) << 5)
3455 #define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1)
3456 #define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF
3457 #define S_00B800_ORDER_MODE(x) (((x) & 0x1) << 6)
3458 #define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1)
3459 #define C_00B800_ORDER_MODE 0xFFFFFFBF
3460 #define S_00B800_DISPATCH_CACHE_CNTL(x) (((x) & 0x07) << 7)
3461 #define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x07)
3462 #define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F
3463 #define S_00B800_SCALAR_L1_INV_VOL(x) (((x) & 0x1) << 10)
3464 #define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1)
3465 #define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF
3466 #define S_00B800_VECTOR_L1_INV_VOL(x) (((x) & 0x1) << 11)
3467 #define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1)
3468 #define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF
3469 #define S_00B800_DATA_ATC(x) (((x) & 0x1) << 12)
3470 #define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1)
3471 #define C_00B800_DATA_ATC 0xFFFFEFFF
3472 #define S_00B800_RESTORE(x) (((x) & 0x1) << 14)
3473 #define G_00B800_RESTORE(x) (((x) >> 14) & 0x1)
3474 #define C_00B800_RESTORE 0xFFFFBFFF
3476 #define R_00B804_COMPUTE_DIM_X 0x00B804
3477 #define R_00B808_COMPUTE_DIM_Y 0x00B808
3478 #define R_00B80C_COMPUTE_DIM_Z 0x00B80C
3479 #define R_00B810_COMPUTE_START_X 0x00B810
3480 #define R_00B814_COMPUTE_START_Y 0x00B814
3481 #define R_00B818_COMPUTE_START_Z 0x00B818
3482 #define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C
3483 #define S_00B81C_NUM_THREAD_FULL(x) (((x) & 0xFFFF) << 0)
3484 #define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF)
3485 #define C_00B81C_NUM_THREAD_FULL 0xFFFF0000
3486 #define S_00B81C_NUM_THREAD_PARTIAL(x) (((x) & 0xFFFF) << 16)
3487 #define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF)
3488 #define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF
3489 #define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820
3490 #define S_00B820_NUM_THREAD_FULL(x) (((x) & 0xFFFF) << 0)
3491 #define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF)
3492 #define C_00B820_NUM_THREAD_FULL 0xFFFF0000
3493 #define S_00B820_NUM_THREAD_PARTIAL(x) (((x) & 0xFFFF) << 16)
3494 #define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF)
3495 #define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF
3496 #define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824
3497 #define S_00B824_NUM_THREAD_FULL(x) (((x) & 0xFFFF) << 0)
3498 #define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF)
3499 #define C_00B824_NUM_THREAD_FULL 0xFFFF0000
3500 #define S_00B824_NUM_THREAD_PARTIAL(x) (((x) & 0xFFFF) << 16)
3501 #define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF)
3502 #define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF
3503 #define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* moved to 0xCD20 on CIK */
3504 #define S_00B82C_MAX_WAVE_ID(x) (((x) & 0xFFF) << 0)
3505 #define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF)
3506 #define C_00B82C_MAX_WAVE_ID 0xFFFFF000
3508 #define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828
3509 #define S_00B828_PIPELINESTAT_ENABLE(x) (((x) & 0x1) << 0)
3510 #define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1)
3511 #define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE
3512 #define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C
3513 #define S_00B82C_PERFCOUNT_ENABLE(x) (((x) & 0x1) << 0)
3514 #define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1)
3515 #define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE
3517 #define R_00B830_COMPUTE_PGM_LO 0x00B830
3518 #define R_00B834_COMPUTE_PGM_HI 0x00B834
3519 #define S_00B834_DATA(x) (((x) & 0xFF) << 0)
3520 #define G_00B834_DATA(x) (((x) >> 0) & 0xFF)
3521 #define C_00B834_DATA 0xFFFFFF00
3523 #define S_00B834_INST_ATC(x) (((x) & 0x1) << 8)
3524 #define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1)
3525 #define C_00B834_INST_ATC 0xFFFFFEFF
3527 #define R_00B838_COMPUTE_TBA_LO 0x00B838
3528 #define R_00B83C_COMPUTE_TBA_HI 0x00B83C
3529 #define S_00B83C_DATA(x) (((x) & 0xFF) << 0)
3530 #define G_00B83C_DATA(x) (((x) >> 0) & 0xFF)
3531 #define C_00B83C_DATA 0xFFFFFF00
3532 #define R_00B840_COMPUTE_TMA_LO 0x00B840
3533 #define R_00B844_COMPUTE_TMA_HI 0x00B844
3534 #define S_00B844_DATA(x) (((x) & 0xFF) << 0)
3535 #define G_00B844_DATA(x) (((x) >> 0) & 0xFF)
3536 #define C_00B844_DATA 0xFFFFFF00
3537 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
3538 #define S_00B848_VGPRS(x) (((x) & 0x3F) << 0)
3539 #define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F)
3540 #define C_00B848_VGPRS 0xFFFFFFC0
3541 #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6)
3542 #define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F)
3543 #define C_00B848_SGPRS 0xFFFFFC3F
3544 #define S_00B848_PRIORITY(x) (((x) & 0x03) << 10)
3545 #define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03)
3546 #define C_00B848_PRIORITY 0xFFFFF3FF
3547 #define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12)
3548 #define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
3549 #define C_00B848_FLOAT_MODE 0xFFF00FFF
3550 #define S_00B848_PRIV(x) (((x) & 0x1) << 20)
3551 #define G_00B848_PRIV(x) (((x) >> 20) & 0x1)
3552 #define C_00B848_PRIV 0xFFEFFFFF
3553 #define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21)
3554 #define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1)
3555 #define C_00B848_DX10_CLAMP 0xFFDFFFFF
3556 #define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22)
3557 #define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1)
3558 #define C_00B848_DEBUG_MODE 0xFFBFFFFF
3559 #define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23)
3560 #define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1)
3561 #define C_00B848_IEEE_MODE 0xFF7FFFFF
3563 #define S_00B848_BULKY(x) (((x) & 0x1) << 24)
3564 #define G_00B848_BULKY(x) (((x) >> 24) & 0x1)
3565 #define C_00B848_BULKY 0xFEFFFFFF
3566 #define S_00B848_CDBG_USER(x) (((x) & 0x1) << 25)
3567 #define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1)
3568 #define C_00B848_CDBG_USER 0xFDFFFFFF
3570 #define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
3571 #define S_00B84C_SCRATCH_EN(x) (((x) & 0x1) << 0)
3572 #define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
3573 #define C_00B84C_SCRATCH_EN 0xFFFFFFFE
3574 #define S_00B84C_USER_SGPR(x) (((x) & 0x1F) << 1)
3575 #define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F)
3576 #define C_00B84C_USER_SGPR 0xFFFFFFC1
3577 #define S_00B84C_TRAP_PRESENT(x) (((x) & 0x1) << 6)
3578 #define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1)
3579 #define C_00B84C_TRAP_PRESENT 0xFFFFFFBF
3580 #define S_00B84C_TGID_X_EN(x) (((x) & 0x1) << 7)
3581 #define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1)
3582 #define C_00B84C_TGID_X_EN 0xFFFFFF7F
3583 #define S_00B84C_TGID_Y_EN(x) (((x) & 0x1) << 8)
3584 #define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1)
3585 #define C_00B84C_TGID_Y_EN 0xFFFFFEFF
3586 #define S_00B84C_TGID_Z_EN(x) (((x) & 0x1) << 9)
3587 #define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1)
3588 #define C_00B84C_TGID_Z_EN 0xFFFFFDFF
3589 #define S_00B84C_TG_SIZE_EN(x) (((x) & 0x1) << 10)
3590 #define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1)
3591 #define C_00B84C_TG_SIZE_EN 0xFFFFFBFF
3592 #define S_00B84C_TIDIG_COMP_CNT(x) (((x) & 0x03) << 11)
3593 #define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03)
3594 #define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF
3596 #define S_00B84C_EXCP_EN_MSB(x) (((x) & 0x03) << 13)
3597 #define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03)
3598 #define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF
3600 #define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
3601 #define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF)
3602 #define C_00B84C_LDS_SIZE 0xFF007FFF
3603 #define S_00B84C_EXCP_EN(x) (((x) & 0x7F) << 24)
3604 #define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F)
3605 #define C_00B84C_EXCP_EN 0x80FFFFFF
3606 #define R_00B850_COMPUTE_VMID 0x00B850
3607 #define S_00B850_DATA(x) (((x) & 0x0F) << 0)
3608 #define G_00B850_DATA(x) (((x) >> 0) & 0x0F)
3609 #define C_00B850_DATA 0xFFFFFFF0
3610 #define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854
3611 #define S_00B854_WAVES_PER_SH(x) (((x) & 0x3F) << 0) /* mask is 0x3FF on CIK */
3612 #define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3F) /* mask is 0x3FF on CIK */
3613 #define C_00B854_WAVES_PER_SH 0xFFFFFFC0 /* mask is 0x3FF on CIK */
3614 #define S_00B854_WAVES_PER_SH_CIK(x) (((x) & 0x3FF) << 0)
3615 #define G_00B854_WAVES_PER_SH_CIK(x) (((x) >> 0) & 0x3FF)
3616 #define C_00B854_WAVES_PER_SH_CIK 0xFFFFFC00
3617 #define S_00B854_TG_PER_CU(x) (((x) & 0x0F) << 12)
3618 #define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0x0F)
3619 #define C_00B854_TG_PER_CU 0xFFFF0FFF
3620 #define S_00B854_LOCK_THRESHOLD(x) (((x) & 0x3F) << 16)
3621 #define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F)
3622 #define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF
3623 #define S_00B854_SIMD_DEST_CNTL(x) (((x) & 0x1) << 22)
3624 #define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1)
3625 #define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF
3627 #define S_00B854_FORCE_SIMD_DIST(x) (((x) & 0x1) << 23)
3628 #define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1)
3629 #define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF
3630 #define S_00B854_CU_GROUP_COUNT(x) (((x) & 0x07) << 24)
3631 #define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x07)
3632 #define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF
3634 #define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858
3635 #define S_00B858_SH0_CU_EN(x) (((x) & 0xFFFF) << 0)
3636 #define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF)
3637 #define C_00B858_SH0_CU_EN 0xFFFF0000
3638 #define S_00B858_SH1_CU_EN(x) (((x) & 0xFFFF) << 16)
3639 #define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF)
3640 #define C_00B858_SH1_CU_EN 0x0000FFFF
3641 #define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C
3642 #define S_00B85C_SH0_CU_EN(x) (((x) & 0xFFFF) << 0)
3643 #define G_00B85C_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF)
3644 #define C_00B85C_SH0_CU_EN 0xFFFF0000
3645 #define S_00B85C_SH1_CU_EN(x) (((x) & 0xFFFF) << 16)
3646 #define G_00B85C_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF)
3647 #define C_00B85C_SH1_CU_EN 0x0000FFFF
3648 #define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860
3649 #define S_00B860_WAVES(x) (((x) & 0xFFF) << 0)
3650 #define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF)
3651 #define C_00B860_WAVES 0xFFFFF000
3652 #define S_00B860_WAVESIZE(x) (((x) & 0x1FFF) << 12)
3653 #define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF)
3654 #define C_00B860_WAVESIZE 0xFE000FFF
3656 #define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864
3657 #define S_00B864_SH0_CU_EN(x) (((x) & 0xFFFF) << 0)
3658 #define G_00B864_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF)
3659 #define C_00B864_SH0_CU_EN 0xFFFF0000
3660 #define S_00B864_SH1_CU_EN(x) (((x) & 0xFFFF) << 16)
3661 #define G_00B864_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF)
3662 #define C_00B864_SH1_CU_EN 0x0000FFFF
3663 #define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868
3664 #define S_00B868_SH0_CU_EN(x) (((x) & 0xFFFF) << 0)
3665 #define G_00B868_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF)
3666 #define C_00B868_SH0_CU_EN 0xFFFF0000
3667 #define S_00B868_SH1_CU_EN(x) (((x) & 0xFFFF) << 16)
3668 #define G_00B868_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF)
3669 #define C_00B868_SH1_CU_EN 0x0000FFFF
3670 #define R_00B86C_COMPUTE_RESTART_X 0x00B86C
3671 #define R_00B870_COMPUTE_RESTART_Y 0x00B870
3672 #define R_00B874_COMPUTE_RESTART_Z 0x00B874
3673 #define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C
3674 #define S_00B87C_SEND_SEID(x) (((x) & 0x03) << 0)
3675 #define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x03)
3676 #define C_00B87C_SEND_SEID 0xFFFFFFFC
3677 #define S_00B87C_RESERVED2(x) (((x) & 0x1) << 2)
3678 #define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1)
3679 #define C_00B87C_RESERVED2 0xFFFFFFFB
3680 #define S_00B87C_RESERVED3(x) (((x) & 0x1) << 3)
3681 #define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1)
3682 #define C_00B87C_RESERVED3 0xFFFFFFF7
3683 #define S_00B87C_RESERVED4(x) (((x) & 0x1) << 4)
3684 #define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1)
3685 #define C_00B87C_RESERVED4 0xFFFFFFEF
3687 #define S_00B87C_WAVE_ID_BASE(x) (((x) & 0xFFF) << 5)
3688 #define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF)
3689 #define C_00B87C_WAVE_ID_BASE 0xFFFE001F
3690 #define R_00B880_COMPUTE_DISPATCH_ID 0x00B880
3691 #define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884
3692 #define R_00B888_COMPUTE_RELAUNCH 0x00B888
3693 #define S_00B888_PAYLOAD(x) (((x) & 0x3FFFFFFF) << 0)
3694 #define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF)
3695 #define C_00B888_PAYLOAD 0xC0000000
3696 #define S_00B888_IS_EVENT(x) (((x) & 0x1) << 30)
3697 #define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1)
3698 #define C_00B888_IS_EVENT 0xBFFFFFFF
3699 #define S_00B888_IS_STATE(x) (((x) & 0x1) << 31)
3700 #define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1)
3701 #define C_00B888_IS_STATE 0x7FFFFFFF
3702 #define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C
3703 #define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890
3704 #define S_00B890_ADDR(x) (((x) & 0xFFFF) << 0)
3705 #define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF)
3706 #define C_00B890_ADDR 0xFFFF0000
3707 #define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894
3708 #define S_00B894_ATC(x) (((x) & 0x1) << 0)
3709 #define G_00B894_ATC(x) (((x) >> 0) & 0x1)
3710 #define C_00B894_ATC 0xFFFFFFFE
3711 #define S_00B894_MTYPE(x) (((x) & 0x03) << 1)
3712 #define G_00B894_MTYPE(x) (((x) >> 1) & 0x03)
3713 #define C_00B894_MTYPE 0xFFFFFFF9
3716 #define R_00B900_COMPUTE_USER_DATA_0 0x00B900
3717 #define R_00B904_COMPUTE_USER_DATA_1 0x00B904
3718 #define R_00B908_COMPUTE_USER_DATA_2 0x00B908
3719 #define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C
3720 #define R_00B910_COMPUTE_USER_DATA_4 0x00B910
3721 #define R_00B914_COMPUTE_USER_DATA_5 0x00B914
3722 #define R_00B918_COMPUTE_USER_DATA_6 0x00B918
3723 #define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C
3724 #define R_00B920_COMPUTE_USER_DATA_8 0x00B920
3725 #define R_00B924_COMPUTE_USER_DATA_9 0x00B924
3726 #define R_00B928_COMPUTE_USER_DATA_10 0x00B928
3727 #define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C
3728 #define R_00B930_COMPUTE_USER_DATA_12 0x00B930
3729 #define R_00B934_COMPUTE_USER_DATA_13 0x00B934
3730 #define R_00B938_COMPUTE_USER_DATA_14 0x00B938
3731 #define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C
3732 #define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC
3733 #define R_034000_CPG_PERFCOUNTER1_LO 0x034000
3734 #define R_034004_CPG_PERFCOUNTER1_HI 0x034004
3735 #define R_034008_CPG_PERFCOUNTER0_LO 0x034008
3736 #define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C
3737 #define R_034010_CPC_PERFCOUNTER1_LO 0x034010
3738 #define R_034014_CPC_PERFCOUNTER1_HI 0x034014
3739 #define R_034018_CPC_PERFCOUNTER0_LO 0x034018
3740 #define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C
3741 #define R_034020_CPF_PERFCOUNTER1_LO 0x034020
3742 #define R_034024_CPF_PERFCOUNTER1_HI 0x034024
3743 #define R_034028_CPF_PERFCOUNTER0_LO 0x034028
3744 #define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C
3745 #define R_034100_GRBM_PERFCOUNTER0_LO 0x034100
3746 #define R_034104_GRBM_PERFCOUNTER0_HI 0x034104
3747 #define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C
3748 #define R_034110_GRBM_PERFCOUNTER1_HI 0x034110
3749 #define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114
3750 #define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118
3751 #define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C
3752 #define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120
3753 #define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124
3754 #define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128
3755 #define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C
3756 #define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130
3757 #define R_034200_WD_PERFCOUNTER0_LO 0x034200
3758 #define R_034204_WD_PERFCOUNTER0_HI 0x034204
3759 #define R_034208_WD_PERFCOUNTER1_LO 0x034208
3760 #define R_03420C_WD_PERFCOUNTER1_HI 0x03420C
3761 #define R_034210_WD_PERFCOUNTER2_LO 0x034210
3762 #define R_034214_WD_PERFCOUNTER2_HI 0x034214
3763 #define R_034218_WD_PERFCOUNTER3_LO 0x034218
3764 #define R_03421C_WD_PERFCOUNTER3_HI 0x03421C
3765 #define R_034220_IA_PERFCOUNTER0_LO 0x034220
3766 #define R_034224_IA_PERFCOUNTER0_HI 0x034224
3767 #define R_034228_IA_PERFCOUNTER1_LO 0x034228
3768 #define R_03422C_IA_PERFCOUNTER1_HI 0x03422C
3769 #define R_034230_IA_PERFCOUNTER2_LO 0x034230
3770 #define R_034234_IA_PERFCOUNTER2_HI 0x034234
3771 #define R_034238_IA_PERFCOUNTER3_LO 0x034238
3772 #define R_03423C_IA_PERFCOUNTER3_HI 0x03423C
3773 #define R_034240_VGT_PERFCOUNTER0_LO 0x034240
3774 #define R_034244_VGT_PERFCOUNTER0_HI 0x034244
3775 #define R_034248_VGT_PERFCOUNTER1_LO 0x034248
3776 #define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C
3777 #define R_034250_VGT_PERFCOUNTER2_LO 0x034250
3778 #define R_034254_VGT_PERFCOUNTER2_HI 0x034254
3779 #define R_034258_VGT_PERFCOUNTER3_LO 0x034258
3780 #define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C
3781 #define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400
3782 #define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404
3783 #define S_034404_PERFCOUNTER_HI(x) (((x) & 0xFFFF) << 0)
3784 #define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF)
3785 #define C_034404_PERFCOUNTER_HI 0xFFFF0000
3786 #define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408
3787 #define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C
3788 #define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410
3789 #define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414
3790 #define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418
3791 #define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C
3792 #define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500
3793 #define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504
3794 #define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508
3795 #define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C
3796 #define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510
3797 #define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514
3798 #define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518
3799 #define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C
3800 #define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520
3801 #define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524
3802 #define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528
3803 #define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C
3804 #define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530
3805 #define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534
3806 #define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538
3807 #define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C
3808 #define R_034600_SPI_PERFCOUNTER0_HI 0x034600
3809 #define R_034604_SPI_PERFCOUNTER0_LO 0x034604
3810 #define R_034608_SPI_PERFCOUNTER1_HI 0x034608
3811 #define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C
3812 #define R_034610_SPI_PERFCOUNTER2_HI 0x034610
3813 #define R_034614_SPI_PERFCOUNTER2_LO 0x034614
3814 #define R_034618_SPI_PERFCOUNTER3_HI 0x034618
3815 #define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C
3816 #define R_034620_SPI_PERFCOUNTER4_HI 0x034620
3817 #define R_034624_SPI_PERFCOUNTER4_LO 0x034624
3818 #define R_034628_SPI_PERFCOUNTER5_HI 0x034628
3819 #define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C
3820 #define R_034700_SQ_PERFCOUNTER0_LO 0x034700
3821 #define R_034704_SQ_PERFCOUNTER0_HI 0x034704
3822 #define R_034708_SQ_PERFCOUNTER1_LO 0x034708
3823 #define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C
3824 #define R_034710_SQ_PERFCOUNTER2_LO 0x034710
3825 #define R_034714_SQ_PERFCOUNTER2_HI 0x034714
3826 #define R_034718_SQ_PERFCOUNTER3_LO 0x034718
3827 #define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C
3828 #define R_034720_SQ_PERFCOUNTER4_LO 0x034720
3829 #define R_034724_SQ_PERFCOUNTER4_HI 0x034724
3830 #define R_034728_SQ_PERFCOUNTER5_LO 0x034728
3831 #define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C
3832 #define R_034730_SQ_PERFCOUNTER6_LO 0x034730
3833 #define R_034734_SQ_PERFCOUNTER6_HI 0x034734
3834 #define R_034738_SQ_PERFCOUNTER7_LO 0x034738
3835 #define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C
3836 #define R_034740_SQ_PERFCOUNTER8_LO 0x034740
3837 #define R_034744_SQ_PERFCOUNTER8_HI 0x034744
3838 #define R_034748_SQ_PERFCOUNTER9_LO 0x034748
3839 #define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C
3840 #define R_034750_SQ_PERFCOUNTER10_LO 0x034750
3841 #define R_034754_SQ_PERFCOUNTER10_HI 0x034754
3842 #define R_034758_SQ_PERFCOUNTER11_LO 0x034758
3843 #define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C
3844 #define R_034760_SQ_PERFCOUNTER12_LO 0x034760
3845 #define R_034764_SQ_PERFCOUNTER12_HI 0x034764
3846 #define R_034768_SQ_PERFCOUNTER13_LO 0x034768
3847 #define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C
3848 #define R_034770_SQ_PERFCOUNTER14_LO 0x034770
3849 #define R_034774_SQ_PERFCOUNTER14_HI 0x034774
3850 #define R_034778_SQ_PERFCOUNTER15_LO 0x034778
3851 #define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C
3852 #define R_034900_SX_PERFCOUNTER0_LO 0x034900
3853 #define R_034904_SX_PERFCOUNTER0_HI 0x034904
3854 #define R_034908_SX_PERFCOUNTER1_LO 0x034908
3855 #define R_03490C_SX_PERFCOUNTER1_HI 0x03490C
3856 #define R_034910_SX_PERFCOUNTER2_LO 0x034910
3857 #define R_034914_SX_PERFCOUNTER2_HI 0x034914
3858 #define R_034918_SX_PERFCOUNTER3_LO 0x034918
3859 #define R_03491C_SX_PERFCOUNTER3_HI 0x03491C
3860 #define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00
3861 #define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04
3862 #define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08
3863 #define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C
3864 #define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10
3865 #define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14
3866 #define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18
3867 #define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C
3868 #define R_034B00_TA_PERFCOUNTER0_LO 0x034B00
3869 #define R_034B04_TA_PERFCOUNTER0_HI 0x034B04
3870 #define R_034B08_TA_PERFCOUNTER1_LO 0x034B08
3871 #define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C
3872 #define R_034C00_TD_PERFCOUNTER0_LO 0x034C00
3873 #define R_034C04_TD_PERFCOUNTER0_HI 0x034C04
3874 #define R_034C08_TD_PERFCOUNTER1_LO 0x034C08
3875 #define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C
3876 #define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00
3877 #define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04
3878 #define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08
3879 #define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C
3880 #define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10
3881 #define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14
3882 #define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18
3883 #define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C
3884 #define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00
3885 #define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04
3886 #define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08
3887 #define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C
3888 #define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10
3889 #define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14
3890 #define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18
3891 #define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C
3892 #define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40
3893 #define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44
3894 #define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48
3895 #define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C
3896 #define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50
3897 #define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54
3898 #define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58
3899 #define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C
3900 #define R_035018_CB_PERFCOUNTER0_LO 0x035018
3901 #define R_03501C_CB_PERFCOUNTER0_HI 0x03501C
3902 #define R_035020_CB_PERFCOUNTER1_LO 0x035020
3903 #define R_035024_CB_PERFCOUNTER1_HI 0x035024
3904 #define R_035028_CB_PERFCOUNTER2_LO 0x035028
3905 #define R_03502C_CB_PERFCOUNTER2_HI 0x03502C
3906 #define R_035030_CB_PERFCOUNTER3_LO 0x035030
3907 #define R_035034_CB_PERFCOUNTER3_HI 0x035034
3908 #define R_035100_DB_PERFCOUNTER0_LO 0x035100
3909 #define R_035104_DB_PERFCOUNTER0_HI 0x035104
3910 #define R_035108_DB_PERFCOUNTER1_LO 0x035108
3911 #define R_03510C_DB_PERFCOUNTER1_HI 0x03510C
3912 #define R_035110_DB_PERFCOUNTER2_LO 0x035110
3913 #define R_035114_DB_PERFCOUNTER2_HI 0x035114
3914 #define R_035118_DB_PERFCOUNTER3_LO 0x035118
3915 #define R_03511C_DB_PERFCOUNTER3_HI 0x03511C
3916 #define R_035200_RLC_PERFCOUNTER0_LO 0x035200
3917 #define R_035204_RLC_PERFCOUNTER0_HI 0x035204
3918 #define R_035208_RLC_PERFCOUNTER1_LO 0x035208
3919 #define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C
3920 #define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000
3921 #define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004
3922 #define S_036004_PERF_SEL2(x) (((x) & 0x3F) << 0)
3923 #define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3F)
3924 #define C_036004_PERF_SEL2 0xFFFFFFC0
3925 #define S_036004_PERF_SEL3(x) (((x) & 0x3F) << 10)
3926 #define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3F)
3927 #define C_036004_PERF_SEL3 0xFFFF03FF
3928 #define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008
3929 #define S_036008_PERF_SEL(x) (((x) & 0x3F) << 0)
3930 #define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F)
3931 #define C_036008_PERF_SEL 0xFFFFFFC0
3932 #define S_036008_PERF_SEL1(x) (((x) & 0x3F) << 10)
3933 #define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F)
3934 #define C_036008_PERF_SEL1 0xFFFF03FF
3935 #define S_036008_CNTR_MODE(x) (((x) & 0x0F) << 20)
3936 #define G_036008_CNTR_MODE(x) (((x) >> 20) & 0x0F)
3937 #define C_036008_CNTR_MODE 0xFF0FFFFF
3938 #define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C
3939 #define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010
3940 #define S_036010_PERF_SEL2(x) (((x) & 0x3F) << 0)
3941 #define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3F)
3942 #define C_036010_PERF_SEL2 0xFFFFFFC0
3943 #define S_036010_PERF_SEL3(x) (((x) & 0x3F) << 10)
3944 #define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3F)
3945 #define C_036010_PERF_SEL3 0xFFFF03FF
3946 #define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014
3947 #define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018
3948 #define S_036018_PERF_SEL2(x) (((x) & 0x3F) << 0)
3949 #define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3F)
3950 #define C_036018_PERF_SEL2 0xFFFFFFC0
3951 #define S_036018_PERF_SEL3(x) (((x) & 0x3F) << 10)
3952 #define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3F)
3953 #define C_036018_PERF_SEL3 0xFFFF03FF
3954 #define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C
3955 #define S_03601C_PERF_SEL(x) (((x) & 0x3F) << 0)
3956 #define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F)
3957 #define C_03601C_PERF_SEL 0xFFFFFFC0
3958 #define S_03601C_PERF_SEL1(x) (((x) & 0x3F) << 10)
3959 #define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F)
3960 #define C_03601C_PERF_SEL1 0xFFFF03FF
3961 #define S_03601C_CNTR_MODE(x) (((x) & 0x0F) << 20)
3962 #define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0x0F)
3963 #define C_03601C_CNTR_MODE 0xFF0FFFFF
3964 #define R_036020_CP_PERFMON_CNTL 0x036020
3965 #define S_036020_PERFMON_STATE(x) (((x) & 0x0F) << 0)
3966 #define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0x0F)
3967 #define C_036020_PERFMON_STATE 0xFFFFFFF0
3968 #define V_036020_DISABLE_AND_RESET 0x00
3969 #define V_036020_START_COUNTING 0x01
3970 #define V_036020_STOP_COUNTING 0x02
3971 #define S_036020_SPM_PERFMON_STATE(x) (((x) & 0x0F) << 4)
3972 #define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0x0F)
3973 #define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F
3974 #define S_036020_PERFMON_ENABLE_MODE(x) (((x) & 0x03) << 8)
3975 #define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x03)
3976 #define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF
3977 #define S_036020_PERFMON_SAMPLE_ENABLE(x) (((x) & 0x1) << 10)
3978 #define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1)
3979 #define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF
3980 #define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024
3981 #define S_036024_PERF_SEL(x) (((x) & 0x3F) << 0)
3982 #define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F)
3983 #define C_036024_PERF_SEL 0xFFFFFFC0
3984 #define S_036024_PERF_SEL1(x) (((x) & 0x3F) << 10)
3985 #define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F)
3986 #define C_036024_PERF_SEL1 0xFFFF03FF
3987 #define S_036024_CNTR_MODE(x) (((x) & 0x0F) << 20)
3988 #define G_036024_CNTR_MODE(x) (((x) >> 20) & 0x0F)
3989 #define C_036024_CNTR_MODE 0xFF0FFFFF
3990 #define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100
3991 #define S_036100_PERF_SEL(x) (((x) & 0x3F) << 0)
3992 #define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F)
3993 #define C_036100_PERF_SEL 0xFFFFFFC0
3994 #define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 10)
3995 #define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1)
3996 #define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF
3997 #define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 11)
3998 #define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1)
3999 #define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF
4000 #define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 12)
4001 #define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1)
4002 #define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF
4003 #define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 13)
4004 #define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1)
4005 #define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF
4006 #define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 14)
4007 #define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1)
4008 #define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF
4009 #define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 16)
4010 #define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1)
4011 #define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF
4012 #define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 17)
4013 #define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1)
4014 #define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF
4015 #define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 18)
4016 #define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1)
4017 #define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF
4018 #define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 19)
4019 #define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1)
4020 #define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF
4021 #define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 20)
4022 #define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1)
4023 #define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF
4024 #define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 21)
4025 #define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1)
4026 #define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF
4027 #define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 22)
4028 #define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1)
4029 #define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF
4030 #define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 23)
4031 #define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1)
4032 #define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF
4033 #define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 24)
4034 #define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1)
4035 #define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF
4036 #define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 25)
4037 #define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1)
4038 #define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF
4039 #define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 26)
4040 #define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1)
4041 #define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF
4042 #define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 27)
4043 #define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1)
4044 #define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF
4045 #define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 28)
4046 #define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1)
4047 #define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF
4048 #define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104
4049 #define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108
4050 #define S_036108_PERF_SEL(x) (((x) & 0x3F) << 0)
4051 #define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F)
4052 #define C_036108_PERF_SEL 0xFFFFFFC0
4053 #define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 10)
4054 #define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1)
4055 #define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF
4056 #define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 11)
4057 #define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1)
4058 #define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF
4059 #define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 12)
4060 #define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1)
4061 #define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF
4062 #define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 13)
4063 #define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1)
4064 #define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF
4065 #define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 15)
4066 #define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1)
4067 #define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF
4068 #define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 16)
4069 #define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1)
4070 #define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF
4071 #define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 17)
4072 #define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1)
4073 #define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF
4074 #define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 18)
4075 #define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1)
4076 #define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF
4077 #define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 19)
4078 #define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1)
4079 #define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF
4080 #define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 20)
4081 #define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1)
4082 #define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF
4083 #define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 21)
4084 #define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1)
4085 #define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF
4086 #define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C
4087 #define S_03610C_PERF_SEL(x) (((x) & 0x3F) << 0)
4088 #define G_03610C_PERF_SEL(x) (((x) >> 0) & 0x3F)
4089 #define C_03610C_PERF_SEL 0xFFFFFFC0
4090 #define S_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 10)
4091 #define G_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1)
4092 #define C_03610C_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF
4093 #define S_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 11)
4094 #define G_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1)
4095 #define C_03610C_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF
4096 #define S_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 12)
4097 #define G_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1)
4098 #define C_03610C_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF
4099 #define S_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 13)
4100 #define G_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1)
4101 #define C_03610C_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF
4102 #define S_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 15)
4103 #define G_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1)
4104 #define C_03610C_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF
4105 #define S_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 16)
4106 #define G_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1)
4107 #define C_03610C_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF
4108 #define S_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 17)
4109 #define G_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1)
4110 #define C_03610C_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF
4111 #define S_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 18)
4112 #define G_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1)
4113 #define C_03610C_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF
4114 #define S_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 19)
4115 #define G_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1)
4116 #define C_03610C_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF
4117 #define S_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 20)
4118 #define G_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1)
4119 #define C_03610C_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF
4120 #define S_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 21)
4121 #define G_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1)
4122 #define C_03610C_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF
4123 #define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110
4124 #define S_036110_PERF_SEL(x) (((x) & 0x3F) << 0)
4125 #define G_036110_PERF_SEL(x) (((x) >> 0) & 0x3F)
4126 #define C_036110_PERF_SEL 0xFFFFFFC0
4127 #define S_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 10)
4128 #define G_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1)
4129 #define C_036110_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF
4130 #define S_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 11)
4131 #define G_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1)
4132 #define C_036110_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF
4133 #define S_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 12)
4134 #define G_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1)
4135 #define C_036110_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF
4136 #define S_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 13)
4137 #define G_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1)
4138 #define C_036110_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF
4139 #define S_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 15)
4140 #define G_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1)
4141 #define C_036110_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF
4142 #define S_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 16)
4143 #define G_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1)
4144 #define C_036110_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF
4145 #define S_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 17)
4146 #define G_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1)
4147 #define C_036110_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF
4148 #define S_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 18)
4149 #define G_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1)
4150 #define C_036110_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF
4151 #define S_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 19)
4152 #define G_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1)
4153 #define C_036110_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF
4154 #define S_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 20)
4155 #define G_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1)
4156 #define C_036110_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF
4157 #define S_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 21)
4158 #define G_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1)
4159 #define C_036110_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF
4160 #define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114
4161 #define S_036114_PERF_SEL(x) (((x) & 0x3F) << 0)
4162 #define G_036114_PERF_SEL(x) (((x) >> 0) & 0x3F)
4163 #define C_036114_PERF_SEL 0xFFFFFFC0
4164 #define S_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 10)
4165 #define G_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1)
4166 #define C_036114_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF
4167 #define S_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) & 0x1) << 11)
4168 #define G_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1)
4169 #define C_036114_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF
4170 #define S_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 12)
4171 #define G_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1)
4172 #define C_036114_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF
4173 #define S_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 13)
4174 #define G_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1)
4175 #define C_036114_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF
4176 #define S_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 15)
4177 #define G_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1)
4178 #define C_036114_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF
4179 #define S_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 16)
4180 #define G_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1)
4181 #define C_036114_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF
4182 #define S_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 17)
4183 #define G_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1)
4184 #define C_036114_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF
4185 #define S_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 18)
4186 #define G_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1)
4187 #define C_036114_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF
4188 #define S_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 19)
4189 #define G_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1)
4190 #define C_036114_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF
4191 #define S_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 20)
4192 #define G_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1)
4193 #define C_036114_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF
4194 #define S_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) & 0x1) << 21)
4195 #define G_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1)
4196 #define C_036114_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF
4197 #define R_036200_WD_PERFCOUNTER0_SELECT 0x036200
4198 #define S_036200_PERF_SEL(x) (((x) & 0xFF) << 0)
4199 #define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF)
4200 #define C_036200_PERF_SEL 0xFFFFFF00
4201 #define S_036200_PERF_MODE(x) (((x) & 0x0F) << 28)
4202 #define G_036200_PERF_MODE(x) (((x) >> 28) & 0x0F)
4203 #define C_036200_PERF_MODE 0x0FFFFFFF
4204 #define R_036204_WD_PERFCOUNTER1_SELECT 0x036204
4205 #define R_036208_WD_PERFCOUNTER2_SELECT 0x036208
4206 #define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C
4207 #define R_036210_IA_PERFCOUNTER0_SELECT 0x036210
4208 #define S_036210_PERF_SEL(x) (((x) & 0x3FF) << 0)
4209 #define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4210 #define C_036210_PERF_SEL 0xFFFFFC00
4211 #define S_036210_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4212 #define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4213 #define C_036210_PERF_SEL1 0xFFF003FF
4214 #define S_036210_CNTR_MODE(x) (((x) & 0x0F) << 20)
4215 #define G_036210_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4216 #define C_036210_CNTR_MODE 0xFF0FFFFF
4217 #define S_036210_PERF_MODE1(x) (((x) & 0x0F) << 24)
4218 #define G_036210_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4219 #define C_036210_PERF_MODE1 0xF0FFFFFF
4220 #define S_036210_PERF_MODE(x) (((x) & 0x0F) << 28)
4221 #define G_036210_PERF_MODE(x) (((x) >> 28) & 0x0F)
4222 #define C_036210_PERF_MODE 0x0FFFFFFF
4223 #define R_036214_IA_PERFCOUNTER1_SELECT 0x036214
4224 #define R_036218_IA_PERFCOUNTER2_SELECT 0x036218
4225 #define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C
4226 #define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220
4227 #define S_036220_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4228 #define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4229 #define C_036220_PERF_SEL2 0xFFFFFC00
4230 #define S_036220_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4231 #define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4232 #define C_036220_PERF_SEL3 0xFFF003FF
4233 #define S_036220_PERF_MODE3(x) (((x) & 0x0F) << 24)
4234 #define G_036220_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4235 #define C_036220_PERF_MODE3 0xF0FFFFFF
4236 #define S_036220_PERF_MODE2(x) (((x) & 0x0F) << 28)
4237 #define G_036220_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4238 #define C_036220_PERF_MODE2 0x0FFFFFFF
4239 #define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230
4240 #define S_036230_PERF_SEL(x) (((x) & 0x3FF) << 0)
4241 #define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4242 #define C_036230_PERF_SEL 0xFFFFFC00
4243 #define S_036230_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4244 #define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4245 #define C_036230_PERF_SEL1 0xFFF003FF
4246 #define S_036230_CNTR_MODE(x) (((x) & 0x0F) << 20)
4247 #define G_036230_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4248 #define C_036230_CNTR_MODE 0xFF0FFFFF
4249 #define S_036230_PERF_MODE1(x) (((x) & 0x0F) << 24)
4250 #define G_036230_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4251 #define C_036230_PERF_MODE1 0xF0FFFFFF
4252 #define S_036230_PERF_MODE(x) (((x) & 0x0F) << 28)
4253 #define G_036230_PERF_MODE(x) (((x) >> 28) & 0x0F)
4254 #define C_036230_PERF_MODE 0x0FFFFFFF
4255 #define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234
4256 #define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238
4257 #define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C
4258 #define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240
4259 #define S_036240_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4260 #define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4261 #define C_036240_PERF_SEL2 0xFFFFFC00
4262 #define S_036240_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4263 #define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4264 #define C_036240_PERF_SEL3 0xFFF003FF
4265 #define S_036240_PERF_MODE3(x) (((x) & 0x0F) << 24)
4266 #define G_036240_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4267 #define C_036240_PERF_MODE3 0xF0FFFFFF
4268 #define S_036240_PERF_MODE2(x) (((x) & 0x0F) << 28)
4269 #define G_036240_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4270 #define C_036240_PERF_MODE2 0x0FFFFFFF
4271 #define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244
4272 #define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250
4273 #define S_036250_PERF_SEID_IGNORE_MASK(x) (((x) & 0xFF) << 0)
4274 #define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF)
4275 #define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00
4276 #define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400
4277 #define S_036400_PERF_SEL(x) (((x) & 0x3FF) << 0)
4278 #define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4279 #define C_036400_PERF_SEL 0xFFFFFC00
4280 #define S_036400_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4281 #define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4282 #define C_036400_PERF_SEL1 0xFFF003FF
4283 #define S_036400_CNTR_MODE(x) (((x) & 0x0F) << 20)
4284 #define G_036400_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4285 #define C_036400_CNTR_MODE 0xFF0FFFFF
4286 #define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404
4287 #define S_036404_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4288 #define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4289 #define C_036404_PERF_SEL2 0xFFFFFC00
4290 #define S_036404_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4291 #define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4292 #define C_036404_PERF_SEL3 0xFFF003FF
4293 #define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408
4294 #define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C
4295 #define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410
4296 #define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414
4297 #define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500
4298 #define S_036500_PERF_SEL(x) (((x) & 0x3FF) << 0)
4299 #define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4300 #define C_036500_PERF_SEL 0xFFFFFC00
4301 #define S_036500_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4302 #define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4303 #define C_036500_PERF_SEL1 0xFFF003FF
4304 #define S_036500_CNTR_MODE(x) (((x) & 0x0F) << 20)
4305 #define G_036500_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4306 #define C_036500_CNTR_MODE 0xFF0FFFFF
4307 #define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504
4308 #define S_036504_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4309 #define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4310 #define C_036504_PERF_SEL2 0xFFFFFC00
4311 #define S_036504_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4312 #define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4313 #define C_036504_PERF_SEL3 0xFFF003FF
4314 #define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508
4315 #define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C
4316 #define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510
4317 #define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514
4318 #define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518
4319 #define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C
4320 #define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520
4321 #define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600
4322 #define S_036600_PERF_SEL(x) (((x) & 0x3FF) << 0)
4323 #define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4324 #define C_036600_PERF_SEL 0xFFFFFC00
4325 #define S_036600_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4326 #define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4327 #define C_036600_PERF_SEL1 0xFFF003FF
4328 #define S_036600_CNTR_MODE(x) (((x) & 0x0F) << 20)
4329 #define G_036600_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4330 #define C_036600_CNTR_MODE 0xFF0FFFFF
4331 #define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604
4332 #define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608
4333 #define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C
4334 #define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610
4335 #define S_036610_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4336 #define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4337 #define C_036610_PERF_SEL2 0xFFFFFC00
4338 #define S_036610_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4339 #define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4340 #define C_036610_PERF_SEL3 0xFFF003FF
4341 #define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614
4342 #define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618
4343 #define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C
4344 #define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620
4345 #define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624
4346 #define R_036628_SPI_PERFCOUNTER_BINS 0x036628
4347 #define S_036628_BIN0_MIN(x) (((x) & 0x0F) << 0)
4348 #define G_036628_BIN0_MIN(x) (((x) >> 0) & 0x0F)
4349 #define C_036628_BIN0_MIN 0xFFFFFFF0
4350 #define S_036628_BIN0_MAX(x) (((x) & 0x0F) << 4)
4351 #define G_036628_BIN0_MAX(x) (((x) >> 4) & 0x0F)
4352 #define C_036628_BIN0_MAX 0xFFFFFF0F
4353 #define S_036628_BIN1_MIN(x) (((x) & 0x0F) << 8)
4354 #define G_036628_BIN1_MIN(x) (((x) >> 8) & 0x0F)
4355 #define C_036628_BIN1_MIN 0xFFFFF0FF
4356 #define S_036628_BIN1_MAX(x) (((x) & 0x0F) << 12)
4357 #define G_036628_BIN1_MAX(x) (((x) >> 12) & 0x0F)
4358 #define C_036628_BIN1_MAX 0xFFFF0FFF
4359 #define S_036628_BIN2_MIN(x) (((x) & 0x0F) << 16)
4360 #define G_036628_BIN2_MIN(x) (((x) >> 16) & 0x0F)
4361 #define C_036628_BIN2_MIN 0xFFF0FFFF
4362 #define S_036628_BIN2_MAX(x) (((x) & 0x0F) << 20)
4363 #define G_036628_BIN2_MAX(x) (((x) >> 20) & 0x0F)
4364 #define C_036628_BIN2_MAX 0xFF0FFFFF
4365 #define S_036628_BIN3_MIN(x) (((x) & 0x0F) << 24)
4366 #define G_036628_BIN3_MIN(x) (((x) >> 24) & 0x0F)
4367 #define C_036628_BIN3_MIN 0xF0FFFFFF
4368 #define S_036628_BIN3_MAX(x) (((x) & 0x0F) << 28)
4369 #define G_036628_BIN3_MAX(x) (((x) >> 28) & 0x0F)
4370 #define C_036628_BIN3_MAX 0x0FFFFFFF
4371 #define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700
4372 #define S_036700_PERF_SEL(x) (((x) & 0x1FF) << 0)
4373 #define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF)
4374 #define C_036700_PERF_SEL 0xFFFFFE00
4375 #define S_036700_SQC_BANK_MASK(x) (((x) & 0x0F) << 12)
4376 #define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0x0F)
4377 #define C_036700_SQC_BANK_MASK 0xFFFF0FFF
4378 #define S_036700_SQC_CLIENT_MASK(x) (((x) & 0x0F) << 16)
4379 #define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0x0F)
4380 #define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF
4381 #define S_036700_SPM_MODE(x) (((x) & 0x0F) << 20)
4382 #define G_036700_SPM_MODE(x) (((x) >> 20) & 0x0F)
4383 #define C_036700_SPM_MODE 0xFF0FFFFF
4384 #define S_036700_SIMD_MASK(x) (((x) & 0x0F) << 24)
4385 #define G_036700_SIMD_MASK(x) (((x) >> 24) & 0x0F)
4386 #define C_036700_SIMD_MASK 0xF0FFFFFF
4387 #define S_036700_PERF_MODE(x) (((x) & 0x0F) << 28)
4388 #define G_036700_PERF_MODE(x) (((x) >> 28) & 0x0F)
4389 #define C_036700_PERF_MODE 0x0FFFFFFF
4390 #define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704
4391 #define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708
4392 #define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C
4393 #define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710
4394 #define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714
4395 #define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718
4396 #define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C
4397 #define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720
4398 #define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724
4399 #define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728
4400 #define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C
4401 #define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730
4402 #define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734
4403 #define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738
4404 #define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C
4405 #define R_036780_SQ_PERFCOUNTER_CTRL 0x036780
4406 #define S_036780_PS_EN(x) (((x) & 0x1) << 0)
4407 #define G_036780_PS_EN(x) (((x) >> 0) & 0x1)
4408 #define C_036780_PS_EN 0xFFFFFFFE
4409 #define S_036780_VS_EN(x) (((x) & 0x1) << 1)
4410 #define G_036780_VS_EN(x) (((x) >> 1) & 0x1)
4411 #define C_036780_VS_EN 0xFFFFFFFD
4412 #define S_036780_GS_EN(x) (((x) & 0x1) << 2)
4413 #define G_036780_GS_EN(x) (((x) >> 2) & 0x1)
4414 #define C_036780_GS_EN 0xFFFFFFFB
4415 #define S_036780_ES_EN(x) (((x) & 0x1) << 3)
4416 #define G_036780_ES_EN(x) (((x) >> 3) & 0x1)
4417 #define C_036780_ES_EN 0xFFFFFFF7
4418 #define S_036780_HS_EN(x) (((x) & 0x1) << 4)
4419 #define G_036780_HS_EN(x) (((x) >> 4) & 0x1)
4420 #define C_036780_HS_EN 0xFFFFFFEF
4421 #define S_036780_LS_EN(x) (((x) & 0x1) << 5)
4422 #define G_036780_LS_EN(x) (((x) >> 5) & 0x1)
4423 #define C_036780_LS_EN 0xFFFFFFDF
4424 #define S_036780_CS_EN(x) (((x) & 0x1) << 6)
4425 #define G_036780_CS_EN(x) (((x) >> 6) & 0x1)
4426 #define C_036780_CS_EN 0xFFFFFFBF
4427 #define S_036780_CNTR_RATE(x) (((x) & 0x1F) << 8)
4428 #define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F)
4429 #define C_036780_CNTR_RATE 0xFFFFE0FF
4430 #define S_036780_DISABLE_FLUSH(x) (((x) & 0x1) << 13)
4431 #define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1)
4432 #define C_036780_DISABLE_FLUSH 0xFFFFDFFF
4433 #define R_036784_SQ_PERFCOUNTER_MASK 0x036784
4434 #define S_036784_SH0_MASK(x) (((x) & 0xFFFF) << 0)
4435 #define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF)
4436 #define C_036784_SH0_MASK 0xFFFF0000
4437 #define S_036784_SH1_MASK(x) (((x) & 0xFFFF) << 16)
4438 #define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF)
4439 #define C_036784_SH1_MASK 0x0000FFFF
4440 #define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788
4441 #define S_036788_FORCE_EN(x) (((x) & 0x1) << 0)
4442 #define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1)
4443 #define C_036788_FORCE_EN 0xFFFFFFFE
4444 #define R_036900_SX_PERFCOUNTER0_SELECT 0x036900
4445 #define S_036900_PERFCOUNTER_SELECT(x) (((x) & 0x3FF) << 0)
4446 #define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF)
4447 #define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00
4448 #define S_036900_PERFCOUNTER_SELECT1(x) (((x) & 0x3FF) << 10)
4449 #define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF)
4450 #define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF
4451 #define S_036900_CNTR_MODE(x) (((x) & 0x0F) << 20)
4452 #define G_036900_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4453 #define C_036900_CNTR_MODE 0xFF0FFFFF
4454 #define R_036904_SX_PERFCOUNTER1_SELECT 0x036904
4455 #define R_036908_SX_PERFCOUNTER2_SELECT 0x036908
4456 #define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C
4457 #define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910
4458 #define S_036910_PERFCOUNTER_SELECT2(x) (((x) & 0x3FF) << 0)
4459 #define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF)
4460 #define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00
4461 #define S_036910_PERFCOUNTER_SELECT3(x) (((x) & 0x3FF) << 10)
4462 #define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF)
4463 #define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF
4464 #define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914
4465 #define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00
4466 #define S_036A00_PERFCOUNTER_SELECT(x) (((x) & 0x3FF) << 0)
4467 #define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF)
4468 #define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00
4469 #define S_036A00_PERFCOUNTER_SELECT1(x) (((x) & 0x3FF) << 10)
4470 #define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF)
4471 #define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF
4472 #define S_036A00_CNTR_MODE(x) (((x) & 0x0F) << 20)
4473 #define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4474 #define C_036A00_CNTR_MODE 0xFF0FFFFF
4475 #define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04
4476 #define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08
4477 #define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C
4478 #define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10
4479 #define S_036A10_PERFCOUNTER_SELECT2(x) (((x) & 0x3FF) << 0)
4480 #define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF)
4481 #define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00
4482 #define S_036A10_PERFCOUNTER_SELECT3(x) (((x) & 0x3FF) << 10)
4483 #define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF)
4484 #define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF
4485 #define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00
4486 #define S_036B00_PERF_SEL(x) (((x) & 0xFF) << 0)
4487 #define G_036B00_PERF_SEL(x) (((x) >> 0) & 0xFF)
4488 #define C_036B00_PERF_SEL 0xFFFFFF00
4489 #define S_036B00_PERF_SEL1(x) (((x) & 0xFF) << 10)
4490 #define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0xFF)
4491 #define C_036B00_PERF_SEL1 0xFFFC03FF
4492 #define S_036B00_CNTR_MODE(x) (((x) & 0x0F) << 20)
4493 #define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4494 #define C_036B00_CNTR_MODE 0xFF0FFFFF
4495 #define S_036B00_PERF_MODE1(x) (((x) & 0x0F) << 24)
4496 #define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4497 #define C_036B00_PERF_MODE1 0xF0FFFFFF
4498 #define S_036B00_PERF_MODE(x) (((x) & 0x0F) << 28)
4499 #define G_036B00_PERF_MODE(x) (((x) >> 28) & 0x0F)
4500 #define C_036B00_PERF_MODE 0x0FFFFFFF
4501 #define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04
4502 #define S_036B04_PERF_SEL2(x) (((x) & 0xFF) << 0)
4503 #define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0xFF)
4504 #define C_036B04_PERF_SEL2 0xFFFFFF00
4505 #define S_036B04_PERF_SEL3(x) (((x) & 0xFF) << 10)
4506 #define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0xFF)
4507 #define C_036B04_PERF_SEL3 0xFFFC03FF
4508 #define S_036B04_PERF_MODE3(x) (((x) & 0x0F) << 24)
4509 #define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4510 #define C_036B04_PERF_MODE3 0xF0FFFFFF
4511 #define S_036B04_PERF_MODE2(x) (((x) & 0x0F) << 28)
4512 #define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4513 #define C_036B04_PERF_MODE2 0x0FFFFFFF
4514 #define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08
4515 #define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00
4516 #define S_036C00_PERF_SEL(x) (((x) & 0xFF) << 0)
4517 #define G_036C00_PERF_SEL(x) (((x) >> 0) & 0xFF)
4518 #define C_036C00_PERF_SEL 0xFFFFFF00
4519 #define S_036C00_PERF_SEL1(x) (((x) & 0xFF) << 10)
4520 #define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0xFF)
4521 #define C_036C00_PERF_SEL1 0xFFFC03FF
4522 #define S_036C00_CNTR_MODE(x) (((x) & 0x0F) << 20)
4523 #define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4524 #define C_036C00_CNTR_MODE 0xFF0FFFFF
4525 #define S_036C00_PERF_MODE1(x) (((x) & 0x0F) << 24)
4526 #define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4527 #define C_036C00_PERF_MODE1 0xF0FFFFFF
4528 #define S_036C00_PERF_MODE(x) (((x) & 0x0F) << 28)
4529 #define G_036C00_PERF_MODE(x) (((x) >> 28) & 0x0F)
4530 #define C_036C00_PERF_MODE 0x0FFFFFFF
4531 #define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04
4532 #define S_036C04_PERF_SEL2(x) (((x) & 0xFF) << 0)
4533 #define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0xFF)
4534 #define C_036C04_PERF_SEL2 0xFFFFFF00
4535 #define S_036C04_PERF_SEL3(x) (((x) & 0xFF) << 10)
4536 #define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0xFF)
4537 #define C_036C04_PERF_SEL3 0xFFFC03FF
4538 #define S_036C04_PERF_MODE3(x) (((x) & 0x0F) << 24)
4539 #define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4540 #define C_036C04_PERF_MODE3 0xF0FFFFFF
4541 #define S_036C04_PERF_MODE2(x) (((x) & 0x0F) << 28)
4542 #define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4543 #define C_036C04_PERF_MODE2 0x0FFFFFFF
4544 #define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08
4545 #define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00
4546 #define S_036D00_PERF_SEL(x) (((x) & 0x3FF) << 0)
4547 #define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4548 #define C_036D00_PERF_SEL 0xFFFFFC00
4549 #define S_036D00_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4550 #define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4551 #define C_036D00_PERF_SEL1 0xFFF003FF
4552 #define S_036D00_CNTR_MODE(x) (((x) & 0x0F) << 20)
4553 #define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4554 #define C_036D00_CNTR_MODE 0xFF0FFFFF
4555 #define S_036D00_PERF_MODE1(x) (((x) & 0x0F) << 24)
4556 #define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4557 #define C_036D00_PERF_MODE1 0xF0FFFFFF
4558 #define S_036D00_PERF_MODE(x) (((x) & 0x0F) << 28)
4559 #define G_036D00_PERF_MODE(x) (((x) >> 28) & 0x0F)
4560 #define C_036D00_PERF_MODE 0x0FFFFFFF
4561 #define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04
4562 #define S_036D04_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4563 #define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4564 #define C_036D04_PERF_SEL2 0xFFFFFC00
4565 #define S_036D04_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4566 #define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4567 #define C_036D04_PERF_SEL3 0xFFF003FF
4568 #define S_036D04_PERF_MODE3(x) (((x) & 0x0F) << 24)
4569 #define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4570 #define C_036D04_PERF_MODE3 0xF0FFFFFF
4571 #define S_036D04_PERF_MODE2(x) (((x) & 0x0F) << 28)
4572 #define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4573 #define C_036D04_PERF_MODE2 0x0FFFFFFF
4574 #define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08
4575 #define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C
4576 #define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10
4577 #define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14
4578 #define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00
4579 #define S_036E00_PERF_SEL(x) (((x) & 0x3FF) << 0)
4580 #define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4581 #define C_036E00_PERF_SEL 0xFFFFFC00
4582 #define S_036E00_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4583 #define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4584 #define C_036E00_PERF_SEL1 0xFFF003FF
4585 #define S_036E00_CNTR_MODE(x) (((x) & 0x0F) << 20)
4586 #define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4587 #define C_036E00_CNTR_MODE 0xFF0FFFFF
4588 #define S_036E00_PERF_MODE1(x) (((x) & 0x0F) << 24)
4589 #define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4590 #define C_036E00_PERF_MODE1 0xF0FFFFFF
4591 #define S_036E00_PERF_MODE(x) (((x) & 0x0F) << 28)
4592 #define G_036E00_PERF_MODE(x) (((x) >> 28) & 0x0F)
4593 #define C_036E00_PERF_MODE 0x0FFFFFFF
4594 #define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04
4595 #define S_036E04_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4596 #define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4597 #define C_036E04_PERF_SEL2 0xFFFFFC00
4598 #define S_036E04_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4599 #define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4600 #define C_036E04_PERF_SEL3 0xFFF003FF
4601 #define S_036E04_PERF_MODE2(x) (((x) & 0x0F) << 24)
4602 #define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0x0F)
4603 #define C_036E04_PERF_MODE2 0xF0FFFFFF
4604 #define S_036E04_PERF_MODE3(x) (((x) & 0x0F) << 28)
4605 #define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0x0F)
4606 #define C_036E04_PERF_MODE3 0x0FFFFFFF
4607 #define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08
4608 #define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C
4609 #define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10
4610 #define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14
4611 #define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40
4612 #define S_036E40_PERF_SEL(x) (((x) & 0x3FF) << 0)
4613 #define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4614 #define C_036E40_PERF_SEL 0xFFFFFC00
4615 #define S_036E40_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4616 #define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4617 #define C_036E40_PERF_SEL1 0xFFF003FF
4618 #define S_036E40_CNTR_MODE(x) (((x) & 0x0F) << 20)
4619 #define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4620 #define C_036E40_CNTR_MODE 0xFF0FFFFF
4621 #define S_036E40_PERF_MODE1(x) (((x) & 0x0F) << 24)
4622 #define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4623 #define C_036E40_PERF_MODE1 0xF0FFFFFF
4624 #define S_036E40_PERF_MODE(x) (((x) & 0x0F) << 28)
4625 #define G_036E40_PERF_MODE(x) (((x) >> 28) & 0x0F)
4626 #define C_036E40_PERF_MODE 0x0FFFFFFF
4627 #define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44
4628 #define S_036E44_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4629 #define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4630 #define C_036E44_PERF_SEL2 0xFFFFFC00
4631 #define S_036E44_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4632 #define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4633 #define C_036E44_PERF_SEL3 0xFFF003FF
4634 #define S_036E44_PERF_MODE2(x) (((x) & 0x0F) << 24)
4635 #define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0x0F)
4636 #define C_036E44_PERF_MODE2 0xF0FFFFFF
4637 #define S_036E44_PERF_MODE3(x) (((x) & 0x0F) << 28)
4638 #define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0x0F)
4639 #define C_036E44_PERF_MODE3 0x0FFFFFFF
4640 #define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48
4641 #define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C
4642 #define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50
4643 #define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54
4644 #define R_037000_CB_PERFCOUNTER_FILTER 0x037000
4645 #define S_037000_OP_FILTER_ENABLE(x) (((x) & 0x1) << 0)
4646 #define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1)
4647 #define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE
4648 #define S_037000_OP_FILTER_SEL(x) (((x) & 0x07) << 1)
4649 #define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x07)
4650 #define C_037000_OP_FILTER_SEL 0xFFFFFFF1
4651 #define S_037000_FORMAT_FILTER_ENABLE(x) (((x) & 0x1) << 4)
4652 #define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1)
4653 #define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF
4654 #define S_037000_FORMAT_FILTER_SEL(x) (((x) & 0x1F) << 5)
4655 #define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F)
4656 #define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F
4657 #define S_037000_CLEAR_FILTER_ENABLE(x) (((x) & 0x1) << 10)
4658 #define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1)
4659 #define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF
4660 #define S_037000_CLEAR_FILTER_SEL(x) (((x) & 0x1) << 11)
4661 #define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1)
4662 #define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF
4663 #define S_037000_MRT_FILTER_ENABLE(x) (((x) & 0x1) << 12)
4664 #define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1)
4665 #define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF
4666 #define S_037000_MRT_FILTER_SEL(x) (((x) & 0x07) << 13)
4667 #define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x07)
4668 #define C_037000_MRT_FILTER_SEL 0xFFFF1FFF
4669 #define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) & 0x1) << 17)
4670 #define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1)
4671 #define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF
4672 #define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) & 0x07) << 18)
4673 #define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x07)
4674 #define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF
4675 #define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) & 0x1) << 21)
4676 #define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1)
4677 #define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF
4678 #define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) & 0x03) << 22)
4679 #define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x03)
4680 #define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF
4681 #define R_037004_CB_PERFCOUNTER0_SELECT 0x037004
4682 #define S_037004_PERF_SEL(x) (((x) & 0x1FF) << 0)
4683 #define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF)
4684 #define C_037004_PERF_SEL 0xFFFFFE00
4685 #define S_037004_PERF_SEL1(x) (((x) & 0x1FF) << 10)
4686 #define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF)
4687 #define C_037004_PERF_SEL1 0xFFF803FF
4688 #define S_037004_CNTR_MODE(x) (((x) & 0x0F) << 20)
4689 #define G_037004_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4690 #define C_037004_CNTR_MODE 0xFF0FFFFF
4691 #define S_037004_PERF_MODE1(x) (((x) & 0x0F) << 24)
4692 #define G_037004_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4693 #define C_037004_PERF_MODE1 0xF0FFFFFF
4694 #define S_037004_PERF_MODE(x) (((x) & 0x0F) << 28)
4695 #define G_037004_PERF_MODE(x) (((x) >> 28) & 0x0F)
4696 #define C_037004_PERF_MODE 0x0FFFFFFF
4697 #define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008
4698 #define S_037008_PERF_SEL2(x) (((x) & 0x1FF) << 0)
4699 #define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF)
4700 #define C_037008_PERF_SEL2 0xFFFFFE00
4701 #define S_037008_PERF_SEL3(x) (((x) & 0x1FF) << 10)
4702 #define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF)
4703 #define C_037008_PERF_SEL3 0xFFF803FF
4704 #define S_037008_PERF_MODE3(x) (((x) & 0x0F) << 24)
4705 #define G_037008_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4706 #define C_037008_PERF_MODE3 0xF0FFFFFF
4707 #define S_037008_PERF_MODE2(x) (((x) & 0x0F) << 28)
4708 #define G_037008_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4709 #define C_037008_PERF_MODE2 0x0FFFFFFF
4710 #define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C
4711 #define R_037010_CB_PERFCOUNTER2_SELECT 0x037010
4712 #define R_037014_CB_PERFCOUNTER3_SELECT 0x037014
4713 #define R_037100_DB_PERFCOUNTER0_SELECT 0x037100
4714 #define S_037100_PERF_SEL(x) (((x) & 0x3FF) << 0)
4715 #define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF)
4716 #define C_037100_PERF_SEL 0xFFFFFC00
4717 #define S_037100_PERF_SEL1(x) (((x) & 0x3FF) << 10)
4718 #define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF)
4719 #define C_037100_PERF_SEL1 0xFFF003FF
4720 #define S_037100_CNTR_MODE(x) (((x) & 0x0F) << 20)
4721 #define G_037100_CNTR_MODE(x) (((x) >> 20) & 0x0F)
4722 #define C_037100_CNTR_MODE 0xFF0FFFFF
4723 #define S_037100_PERF_MODE1(x) (((x) & 0x0F) << 24)
4724 #define G_037100_PERF_MODE1(x) (((x) >> 24) & 0x0F)
4725 #define C_037100_PERF_MODE1 0xF0FFFFFF
4726 #define S_037100_PERF_MODE(x) (((x) & 0x0F) << 28)
4727 #define G_037100_PERF_MODE(x) (((x) >> 28) & 0x0F)
4728 #define C_037100_PERF_MODE 0x0FFFFFFF
4729 #define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104
4730 #define S_037104_PERF_SEL2(x) (((x) & 0x3FF) << 0)
4731 #define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF)
4732 #define C_037104_PERF_SEL2 0xFFFFFC00
4733 #define S_037104_PERF_SEL3(x) (((x) & 0x3FF) << 10)
4734 #define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF)
4735 #define C_037104_PERF_SEL3 0xFFF003FF
4736 #define S_037104_PERF_MODE3(x) (((x) & 0x0F) << 24)
4737 #define G_037104_PERF_MODE3(x) (((x) >> 24) & 0x0F)
4738 #define C_037104_PERF_MODE3 0xF0FFFFFF
4739 #define S_037104_PERF_MODE2(x) (((x) & 0x0F) << 28)
4740 #define G_037104_PERF_MODE2(x) (((x) >> 28) & 0x0F)
4741 #define C_037104_PERF_MODE2 0x0FFFFFFF
4742 #define R_037108_DB_PERFCOUNTER1_SELECT 0x037108
4743 #define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C
4744 #define R_037110_DB_PERFCOUNTER2_SELECT 0x037110
4745 #define R_037118_DB_PERFCOUNTER3_SELECT 0x037118
4746 #define R_028000_DB_RENDER_CONTROL 0x028000
4747 #define S_028000_DEPTH_CLEAR_ENABLE(x) (((x) & 0x1) << 0)
4748 #define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1)
4749 #define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE
4750 #define S_028000_STENCIL_CLEAR_ENABLE(x) (((x) & 0x1) << 1)
4751 #define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1)
4752 #define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD
4753 #define S_028000_DEPTH_COPY(x) (((x) & 0x1) << 2)
4754 #define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1)
4755 #define C_028000_DEPTH_COPY 0xFFFFFFFB
4756 #define S_028000_STENCIL_COPY(x) (((x) & 0x1) << 3)
4757 #define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1)
4758 #define C_028000_STENCIL_COPY 0xFFFFFFF7
4759 #define S_028000_RESUMMARIZE_ENABLE(x) (((x) & 0x1) << 4)
4760 #define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1)
4761 #define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF
4762 #define S_028000_STENCIL_COMPRESS_DISABLE(x) (((x) & 0x1) << 5)
4763 #define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1)
4764 #define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF
4765 #define S_028000_DEPTH_COMPRESS_DISABLE(x) (((x) & 0x1) << 6)
4766 #define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1)
4767 #define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF
4768 #define S_028000_COPY_CENTROID(x) (((x) & 0x1) << 7)
4769 #define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1)
4770 #define C_028000_COPY_CENTROID 0xFFFFFF7F
4771 #define S_028000_COPY_SAMPLE(x) (((x) & 0x0F) << 8)
4772 #define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0x0F)
4773 #define C_028000_COPY_SAMPLE 0xFFFFF0FF
4775 #define S_028000_DECOMPRESS_ENABLE(x) (((x) & 0x1) << 12)
4776 #define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1)
4777 #define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF
4779 #define R_028004_DB_COUNT_CONTROL 0x028004
4780 #define S_028004_ZPASS_INCREMENT_DISABLE(x) (((x) & 0x1) << 0)
4781 #define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1)
4782 #define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE
4783 #define S_028004_PERFECT_ZPASS_COUNTS(x) (((x) & 0x1) << 1)
4784 #define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1)
4785 #define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD
4786 #define S_028004_SAMPLE_RATE(x) (((x) & 0x07) << 4)
4787 #define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x07)
4788 #define C_028004_SAMPLE_RATE 0xFFFFFF8F
4790 #define S_028004_ZPASS_ENABLE(x) (((x) & 0x0F) << 8)
4791 #define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0x0F)
4792 #define C_028004_ZPASS_ENABLE 0xFFFFF0FF
4793 #define S_028004_ZFAIL_ENABLE(x) (((x) & 0x0F) << 12)
4794 #define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0x0F)
4795 #define C_028004_ZFAIL_ENABLE 0xFFFF0FFF
4796 #define S_028004_SFAIL_ENABLE(x) (((x) & 0x0F) << 16)
4797 #define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0x0F)
4798 #define C_028004_SFAIL_ENABLE 0xFFF0FFFF
4799 #define S_028004_DBFAIL_ENABLE(x) (((x) & 0x0F) << 20)
4800 #define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0x0F)
4801 #define C_028004_DBFAIL_ENABLE 0xFF0FFFFF
4802 #define S_028004_SLICE_EVEN_ENABLE(x) (((x) & 0x0F) << 24)
4803 #define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0x0F)
4804 #define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF
4805 #define S_028004_SLICE_ODD_ENABLE(x) (((x) & 0x0F) << 28)
4806 #define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0x0F)
4807 #define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF
4809 #define R_028008_DB_DEPTH_VIEW 0x028008
4810 #define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0)
4811 #define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF)
4812 #define C_028008_SLICE_START 0xFFFFF800
4813 #define S_028008_SLICE_MAX(x) (((x) & 0x7FF) << 13)
4814 #define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
4815 #define C_028008_SLICE_MAX 0xFF001FFF
4816 #define S_028008_Z_READ_ONLY(x) (((x) & 0x1) << 24)
4817 #define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1)
4818 #define C_028008_Z_READ_ONLY 0xFEFFFFFF
4819 #define S_028008_STENCIL_READ_ONLY(x) (((x) & 0x1) << 25)
4820 #define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1)
4821 #define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF
4822 #define R_02800C_DB_RENDER_OVERRIDE 0x02800C
4823 #define S_02800C_FORCE_HIZ_ENABLE(x) (((x) & 0x03) << 0)
4824 #define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x03)
4825 #define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC
4826 #define V_02800C_FORCE_OFF 0x00
4827 #define V_02800C_FORCE_ENABLE 0x01
4828 #define V_02800C_FORCE_DISABLE 0x02
4829 #define V_02800C_FORCE_RESERVED 0x03
4830 #define S_02800C_FORCE_HIS_ENABLE0(x) (((x) & 0x03) << 2)
4831 #define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x03)
4832 #define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3
4833 #define V_02800C_FORCE_OFF 0x00
4834 #define V_02800C_FORCE_ENABLE 0x01
4835 #define V_02800C_FORCE_DISABLE 0x02
4836 #define V_02800C_FORCE_RESERVED 0x03
4837 #define S_02800C_FORCE_HIS_ENABLE1(x) (((x) & 0x03) << 4)
4838 #define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x03)
4839 #define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF
4840 #define V_02800C_FORCE_OFF 0x00
4841 #define V_02800C_FORCE_ENABLE 0x01
4842 #define V_02800C_FORCE_DISABLE 0x02
4843 #define V_02800C_FORCE_RESERVED 0x03
4844 #define S_02800C_FORCE_SHADER_Z_ORDER(x) (((x) & 0x1) << 6)
4845 #define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1)
4846 #define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF
4847 #define S_02800C_FAST_Z_DISABLE(x) (((x) & 0x1) << 7)
4848 #define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1)
4849 #define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F
4850 #define S_02800C_FAST_STENCIL_DISABLE(x) (((x) & 0x1) << 8)
4851 #define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1)
4852 #define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF
4853 #define S_02800C_NOOP_CULL_DISABLE(x) (((x) & 0x1) << 9)
4854 #define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1)
4855 #define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF
4856 #define S_02800C_FORCE_COLOR_KILL(x) (((x) & 0x1) << 10)
4857 #define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1)
4858 #define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF
4859 #define S_02800C_FORCE_Z_READ(x) (((x) & 0x1) << 11)
4860 #define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1)
4861 #define C_02800C_FORCE_Z_READ 0xFFFFF7FF
4862 #define S_02800C_FORCE_STENCIL_READ(x) (((x) & 0x1) << 12)
4863 #define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1)
4864 #define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF
4865 #define S_02800C_FORCE_FULL_Z_RANGE(x) (((x) & 0x03) << 13)
4866 #define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x03)
4867 #define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF
4868 #define V_02800C_FORCE_OFF 0x00
4869 #define V_02800C_FORCE_ENABLE 0x01
4870 #define V_02800C_FORCE_DISABLE 0x02
4871 #define V_02800C_FORCE_RESERVED 0x03
4872 #define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) & 0x1) << 15)
4873 #define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1)
4874 #define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF
4875 #define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) & 0x1) << 16)
4876 #define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1)
4877 #define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF
4878 #define S_02800C_IGNORE_SC_ZRANGE(x) (((x) & 0x1) << 17)
4879 #define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1)
4880 #define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF
4881 #define S_02800C_DISABLE_FULLY_COVERED(x) (((x) & 0x1) << 18)
4882 #define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1)
4883 #define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF
4884 #define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) & 0x03) << 19)
4885 #define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x03)
4886 #define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF
4887 #define V_02800C_FORCE_SUMM_OFF 0x00
4888 #define V_02800C_FORCE_SUMM_MINZ 0x01
4889 #define V_02800C_FORCE_SUMM_MAXZ 0x02
4890 #define V_02800C_FORCE_SUMM_BOTH 0x03
4891 #define S_02800C_MAX_TILES_IN_DTT(x) (((x) & 0x1F) << 21)
4892 #define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F)
4893 #define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF
4894 #define S_02800C_DISABLE_TILE_RATE_TILES(x) (((x) & 0x1) << 26)
4895 #define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1)
4896 #define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF
4897 #define S_02800C_FORCE_Z_DIRTY(x) (((x) & 0x1) << 27)
4898 #define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1)
4899 #define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF
4900 #define S_02800C_FORCE_STENCIL_DIRTY(x) (((x) & 0x1) << 28)
4901 #define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1)
4902 #define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF
4903 #define S_02800C_FORCE_Z_VALID(x) (((x) & 0x1) << 29)
4904 #define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1)
4905 #define C_02800C_FORCE_Z_VALID 0xDFFFFFFF
4906 #define S_02800C_FORCE_STENCIL_VALID(x) (((x) & 0x1) << 30)
4907 #define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1)
4908 #define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF
4909 #define S_02800C_PRESERVE_COMPRESSION(x) (((x) & 0x1) << 31)
4910 #define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1)
4911 #define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF
4912 #define R_028010_DB_RENDER_OVERRIDE2 0x028010
4913 #define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) & 0x03) << 0)
4914 #define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x03)
4915 #define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC
4916 #define V_028010_PSLC_AUTO 0x00
4917 #define V_028010_PSLC_ON_HANG_ONLY 0x01
4918 #define V_028010_PSLC_ASAP 0x02
4919 #define V_028010_PSLC_COUNTDOWN 0x03
4920 #define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) & 0x07) << 2)
4921 #define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x07)
4922 #define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3
4923 #define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) & 0x1) << 5)
4924 #define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1)
4925 #define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF
4926 #define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) & 0x1) << 6)
4927 #define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1)
4928 #define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF
4929 #define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) & 0x1) << 7)
4930 #define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1)
4931 #define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F
4932 #define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) & 0x1) << 8)
4933 #define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1)
4934 #define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF
4935 #define S_028010_DISABLE_REG_SNOOP(x) (((x) & 0x1) << 9)
4936 #define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1)
4937 #define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF
4938 #define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) & 0x1) << 10)
4939 #define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1)
4940 #define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF
4942 #define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) & 0x1) << 11)
4943 #define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1)
4944 #define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF
4945 #define S_028010_HIZ_ZFUNC(x) (((x) & 0x07) << 12)
4946 #define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x07)
4947 #define C_028010_HIZ_ZFUNC 0xFFFF8FFF
4948 #define S_028010_HIS_SFUNC_FF(x) (((x) & 0x07) << 15)
4949 #define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x07)
4950 #define C_028010_HIS_SFUNC_FF 0xFFFC7FFF
4951 #define S_028010_HIS_SFUNC_BF(x) (((x) & 0x07) << 18)
4952 #define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x07)
4953 #define C_028010_HIS_SFUNC_BF 0xFFE3FFFF
4954 #define S_028010_PRESERVE_ZRANGE(x) (((x) & 0x1) << 21)
4955 #define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1)
4956 #define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF
4957 #define S_028010_PRESERVE_SRESULTS(x) (((x) & 0x1) << 22)
4958 #define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1)
4959 #define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF
4960 #define S_028010_DISABLE_FAST_PASS(x) (((x) & 0x1) << 23)
4961 #define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1)
4962 #define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF
4964 #define R_028014_DB_HTILE_DATA_BASE 0x028014
4965 #define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020
4966 #define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024
4967 #define R_028028_DB_STENCIL_CLEAR 0x028028
4968 #define S_028028_CLEAR(x) (((x) & 0xFF) << 0)
4969 #define G_028028_CLEAR(x) (((x) >> 0) & 0xFF)
4970 #define C_028028_CLEAR 0xFFFFFF00
4971 #define R_02802C_DB_DEPTH_CLEAR 0x02802C
4972 #define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030
4973 #define S_028030_TL_X(x) (((x) & 0xFFFF) << 0)
4974 #define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF)
4975 #define C_028030_TL_X 0xFFFF0000
4976 #define S_028030_TL_Y(x) (((x) & 0xFFFF) << 16)
4977 #define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF)
4978 #define C_028030_TL_Y 0x0000FFFF
4979 #define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034
4980 #define S_028034_BR_X(x) (((x) & 0xFFFF) << 0)
4981 #define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF)
4982 #define C_028034_BR_X 0xFFFF0000
4983 #define S_028034_BR_Y(x) (((x) & 0xFFFF) << 16)
4984 #define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF)
4985 #define C_028034_BR_Y 0x0000FFFF
4986 #define R_02803C_DB_DEPTH_INFO 0x02803C
4987 #define S_02803C_ADDR5_SWIZZLE_MASK(x) (((x) & 0x0F) << 0)
4988 #define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0x0F)
4989 #define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0
4991 #define S_02803C_ARRAY_MODE(x) (((x) & 0x0F) << 4)
4992 #define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0x0F)
4993 #define C_02803C_ARRAY_MODE 0xFFFFFF0F
4994 #define V_02803C_ARRAY_LINEAR_GENERAL 0x00
4995 #define V_02803C_ARRAY_LINEAR_ALIGNED 0x01
4996 #define V_02803C_ARRAY_1D_TILED_THIN1 0x02
4997 #define V_02803C_ARRAY_2D_TILED_THIN1 0x04
4998 #define V_02803C_ARRAY_PRT_TILED_THIN1 0x05
4999 #define V_02803C_ARRAY_PRT_2D_TILED_THIN1 0x06
5000 #define S_02803C_PIPE_CONFIG(x) (((x) & 0x1F) << 8)
5001 #define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F)
5002 #define C_02803C_PIPE_CONFIG 0xFFFFE0FF
5003 #define V_02803C_ADDR_SURF_P2 0x00
5004 #define V_02803C_X_ADDR_SURF_P4_8X16 0x04
5005 #define V_02803C_X_ADDR_SURF_P4_16X16 0x05
5006 #define V_02803C_X_ADDR_SURF_P4_16X32 0x06
5007 #define V_02803C_X_ADDR_SURF_P4_32X32 0x07
5008 #define V_02803C_X_ADDR_SURF_P8_16X16_8X16 0x08
5009 #define V_02803C_X_ADDR_SURF_P8_16X32_8X16 0x09
5010 #define V_02803C_X_ADDR_SURF_P8_32X32_8X16 0x0A
5011 #define V_02803C_X_ADDR_SURF_P8_16X32_16X16 0x0B
5012 #define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C
5013 #define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D
5014 #define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E
5015 #define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10
5016 #define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11
5017 #define S_02803C_BANK_WIDTH(x) (((x) & 0x03) << 13)
5018 #define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03)
5019 #define C_02803C_BANK_WIDTH 0xFFFF9FFF
5020 #define V_02803C_ADDR_SURF_BANK_WIDTH_1 0x00
5021 #define V_02803C_ADDR_SURF_BANK_WIDTH_2 0x01
5022 #define V_02803C_ADDR_SURF_BANK_WIDTH_4 0x02
5023 #define V_02803C_ADDR_SURF_BANK_WIDTH_8 0x03
5024 #define S_02803C_BANK_HEIGHT(x) (((x) & 0x03) << 15)
5025 #define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x03)
5026 #define C_02803C_BANK_HEIGHT 0xFFFE7FFF
5027 #define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0x00
5028 #define V_02803C_ADDR_SURF_BANK_HEIGHT_2 0x01
5029 #define V_02803C_ADDR_SURF_BANK_HEIGHT_4 0x02
5030 #define V_02803C_ADDR_SURF_BANK_HEIGHT_8 0x03
5031 #define S_02803C_MACRO_TILE_ASPECT(x) (((x) & 0x03) << 17)
5032 #define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x03)
5033 #define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF
5034 #define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0x00
5035 #define V_02803C_ADDR_SURF_MACRO_ASPECT_2 0x01
5036 #define V_02803C_ADDR_SURF_MACRO_ASPECT_4 0x02
5037 #define V_02803C_ADDR_SURF_MACRO_ASPECT_8 0x03
5038 #define S_02803C_NUM_BANKS(x) (((x) & 0x03) << 19)
5039 #define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x03)
5040 #define C_02803C_NUM_BANKS 0xFFE7FFFF
5041 #define V_02803C_ADDR_SURF_2_BANK 0x00
5042 #define V_02803C_ADDR_SURF_4_BANK 0x01
5043 #define V_02803C_ADDR_SURF_8_BANK 0x02
5044 #define V_02803C_ADDR_SURF_16_BANK 0x03
5046 #define R_028040_DB_Z_INFO 0x028040
5047 #define S_028040_FORMAT(x) (((x) & 0x03) << 0)
5048 #define G_028040_FORMAT(x) (((x) >> 0) & 0x03)
5049 #define C_028040_FORMAT 0xFFFFFFFC
5050 #define V_028040_Z_INVALID 0x00
5051 #define V_028040_Z_16 0x01
5052 #define V_028040_Z_24 0x02 /* deprecated */
5053 #define V_028040_Z_32_FLOAT 0x03
5054 #define S_028040_NUM_SAMPLES(x) (((x) & 0x03) << 2)
5055 #define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x03)
5056 #define C_028040_NUM_SAMPLES 0xFFFFFFF3
5058 #define S_028040_TILE_SPLIT(x) (((x) & 0x07) << 13)
5059 #define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x07)
5060 #define C_028040_TILE_SPLIT 0xFFFF1FFF
5061 #define V_028040_ADDR_SURF_TILE_SPLIT_64B 0x00
5062 #define V_028040_ADDR_SURF_TILE_SPLIT_128B 0x01
5063 #define V_028040_ADDR_SURF_TILE_SPLIT_256B 0x02
5064 #define V_028040_ADDR_SURF_TILE_SPLIT_512B 0x03
5065 #define V_028040_ADDR_SURF_TILE_SPLIT_1KB 0x04
5066 #define V_028040_ADDR_SURF_TILE_SPLIT_2KB 0x05
5067 #define V_028040_ADDR_SURF_TILE_SPLIT_4KB 0x06
5069 #define S_028040_TILE_MODE_INDEX(x) (((x) & 0x07) << 20) /* not on CIK */
5070 #define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */
5071 #define C_028040_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */
5073 #define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) & 0x0F) << 23)
5074 #define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0x0F)
5075 #define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF
5077 #define S_028040_ALLOW_EXPCLEAR(x) (((x) & 0x1) << 27)
5078 #define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1)
5079 #define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF
5080 #define S_028040_READ_SIZE(x) (((x) & 0x1) << 28)
5081 #define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1)
5082 #define C_028040_READ_SIZE 0xEFFFFFFF
5083 #define S_028040_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 29)
5084 #define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1)
5085 #define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF
5087 #define S_028040_CLEAR_DISALLOWED(x) (((x) & 0x1) << 30)
5088 #define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1)
5089 #define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF
5091 #define S_028040_ZRANGE_PRECISION(x) (((x) & 0x1) << 31)
5092 #define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1)
5093 #define C_028040_ZRANGE_PRECISION 0x7FFFFFFF
5094 #define R_028044_DB_STENCIL_INFO 0x028044
5095 #define S_028044_FORMAT(x) (((x) & 0x1) << 0)
5096 #define G_028044_FORMAT(x) (((x) >> 0) & 0x1)
5097 #define C_028044_FORMAT 0xFFFFFFFE
5098 #define V_028044_STENCIL_INVALID 0x00
5099 #define V_028044_STENCIL_8 0x01
5101 #define S_028044_TILE_SPLIT(x) (((x) & 0x07) << 13)
5102 #define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x07)
5103 #define C_028044_TILE_SPLIT 0xFFFF1FFF
5104 #define V_028044_ADDR_SURF_TILE_SPLIT_64B 0x00
5105 #define V_028044_ADDR_SURF_TILE_SPLIT_128B 0x01
5106 #define V_028044_ADDR_SURF_TILE_SPLIT_256B 0x02
5107 #define V_028044_ADDR_SURF_TILE_SPLIT_512B 0x03
5108 #define V_028044_ADDR_SURF_TILE_SPLIT_1KB 0x04
5109 #define V_028044_ADDR_SURF_TILE_SPLIT_2KB 0x05
5110 #define V_028044_ADDR_SURF_TILE_SPLIT_4KB 0x06
5112 #define S_028044_TILE_MODE_INDEX(x) (((x) & 0x07) << 20) /* not on CIK */
5113 #define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */
5114 #define C_028044_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */
5115 #define S_028044_ALLOW_EXPCLEAR(x) (((x) & 0x1) << 27)
5116 #define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1)
5117 #define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF
5118 #define S_028044_TILE_STENCIL_DISABLE(x) (((x) & 0x1) << 29)
5119 #define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1)
5120 #define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF
5122 #define S_028044_CLEAR_DISALLOWED(x) (((x) & 0x1) << 30)
5123 #define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1)
5124 #define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF
5126 #define R_028048_DB_Z_READ_BASE 0x028048
5127 #define R_02804C_DB_STENCIL_READ_BASE 0x02804C
5128 #define R_028050_DB_Z_WRITE_BASE 0x028050
5129 #define R_028054_DB_STENCIL_WRITE_BASE 0x028054
5130 #define R_028058_DB_DEPTH_SIZE 0x028058
5131 #define S_028058_PITCH_TILE_MAX(x) (((x) & 0x7FF) << 0)
5132 #define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF)
5133 #define C_028058_PITCH_TILE_MAX 0xFFFFF800
5134 #define S_028058_HEIGHT_TILE_MAX(x) (((x) & 0x7FF) << 11)
5135 #define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF)
5136 #define C_028058_HEIGHT_TILE_MAX 0xFFC007FF
5137 #define R_02805C_DB_DEPTH_SLICE 0x02805C
5138 #define S_02805C_SLICE_TILE_MAX(x) (((x) & 0x3FFFFF) << 0)
5139 #define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF)
5140 #define C_02805C_SLICE_TILE_MAX 0xFFC00000
5141 #define R_028080_TA_BC_BASE_ADDR 0x028080
5143 #define R_028084_TA_BC_BASE_ADDR_HI 0x028084
5144 #define S_028084_ADDRESS(x) (((x) & 0xFF) << 0)
5145 #define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF)
5146 #define C_028084_ADDRESS 0xFFFFFF00
5147 #define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8
5148 #define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC
5149 #define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0
5150 #define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4
5152 #define R_0281F8_COHER_DEST_BASE_2 0x0281F8
5153 #define R_0281FC_COHER_DEST_BASE_3 0x0281FC
5154 #define R_028200_PA_SC_WINDOW_OFFSET 0x028200
5155 #define S_028200_WINDOW_X_OFFSET(x) (((x) & 0xFFFF) << 0)
5156 #define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF)
5157 #define C_028200_WINDOW_X_OFFSET 0xFFFF0000
5158 #define S_028200_WINDOW_Y_OFFSET(x) (((x) & 0xFFFF) << 16)
5159 #define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF)
5160 #define C_028200_WINDOW_Y_OFFSET 0x0000FFFF
5161 #define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204
5162 #define S_028204_TL_X(x) (((x) & 0x7FFF) << 0)
5163 #define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF)
5164 #define C_028204_TL_X 0xFFFF8000
5165 #define S_028204_TL_Y(x) (((x) & 0x7FFF) << 16)
5166 #define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF)
5167 #define C_028204_TL_Y 0x8000FFFF
5168 #define S_028204_WINDOW_OFFSET_DISABLE(x) (((x) & 0x1) << 31)
5169 #define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1)
5170 #define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF
5171 #define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208
5172 #define S_028208_BR_X(x) (((x) & 0x7FFF) << 0)
5173 #define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF)
5174 #define C_028208_BR_X 0xFFFF8000
5175 #define S_028208_BR_Y(x) (((x) & 0x7FFF) << 16)
5176 #define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF)
5177 #define C_028208_BR_Y 0x8000FFFF
5178 #define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C
5179 #define S_02820C_CLIP_RULE(x) (((x) & 0xFFFF) << 0)
5180 #define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF)
5181 #define C_02820C_CLIP_RULE 0xFFFF0000
5182 #define R_028210_PA_SC_CLIPRECT_0_TL 0x028210
5183 #define S_028210_TL_X(x) (((x) & 0x7FFF) << 0)
5184 #define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF)
5185 #define C_028210_TL_X 0xFFFF8000
5186 #define S_028210_TL_Y(x) (((x) & 0x7FFF) << 16)
5187 #define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF)
5188 #define C_028210_TL_Y 0x8000FFFF
5189 #define R_028214_PA_SC_CLIPRECT_0_BR 0x028214
5190 #define S_028214_BR_X(x) (((x) & 0x7FFF) << 0)
5191 #define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF)
5192 #define C_028214_BR_X 0xFFFF8000
5193 #define S_028214_BR_Y(x) (((x) & 0x7FFF) << 16)
5194 #define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF)
5195 #define C_028214_BR_Y 0x8000FFFF
5196 #define R_028218_PA_SC_CLIPRECT_1_TL 0x028218
5197 #define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C
5198 #define R_028220_PA_SC_CLIPRECT_2_TL 0x028220
5199 #define R_028224_PA_SC_CLIPRECT_2_BR 0x028224
5200 #define R_028228_PA_SC_CLIPRECT_3_TL 0x028228
5201 #define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C
5202 #define R_028230_PA_SC_EDGERULE 0x028230
5203 #define S_028230_ER_TRI(x) (((x) & 0x0F) << 0)
5204 #define G_028230_ER_TRI(x) (((x) >> 0) & 0x0F)
5205 #define C_028230_ER_TRI 0xFFFFFFF0
5206 #define S_028230_ER_POINT(x) (((x) & 0x0F) << 4)
5207 #define G_028230_ER_POINT(x) (((x) >> 4) & 0x0F)
5208 #define C_028230_ER_POINT 0xFFFFFF0F
5209 #define S_028230_ER_RECT(x) (((x) & 0x0F) << 8)
5210 #define G_028230_ER_RECT(x) (((x) >> 8) & 0x0F)
5211 #define C_028230_ER_RECT 0xFFFFF0FF
5212 #define S_028230_ER_LINE_LR(x) (((x) & 0x3F) << 12)
5213 #define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F)
5214 #define C_028230_ER_LINE_LR 0xFFFC0FFF
5215 #define S_028230_ER_LINE_RL(x) (((x) & 0x3F) << 18)
5216 #define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F)
5217 #define C_028230_ER_LINE_RL 0xFF03FFFF
5218 #define S_028230_ER_LINE_TB(x) (((x) & 0x0F) << 24)
5219 #define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0x0F)
5220 #define C_028230_ER_LINE_TB 0xF0FFFFFF
5221 #define S_028230_ER_LINE_BT(x) (((x) & 0x0F) << 28)
5222 #define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0x0F)
5223 #define C_028230_ER_LINE_BT 0x0FFFFFFF
5224 #define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234
5225 #define S_028234_HW_SCREEN_OFFSET_X(x) (((x) & 0x1FF) << 0)
5226 #define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF)
5227 #define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00
5228 #define S_028234_HW_SCREEN_OFFSET_Y(x) (((x) & 0x1FF) << 16)
5229 #define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF)
5230 #define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF
5231 #define R_028238_CB_TARGET_MASK 0x028238
5232 #define S_028238_TARGET0_ENABLE(x) (((x) & 0x0F) << 0)
5233 #define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0x0F)
5234 #define C_028238_TARGET0_ENABLE 0xFFFFFFF0
5235 #define S_028238_TARGET1_ENABLE(x) (((x) & 0x0F) << 4)
5236 #define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0x0F)
5237 #define C_028238_TARGET1_ENABLE 0xFFFFFF0F
5238 #define S_028238_TARGET2_ENABLE(x) (((x) & 0x0F) << 8)
5239 #define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0x0F)
5240 #define C_028238_TARGET2_ENABLE 0xFFFFF0FF
5241 #define S_028238_TARGET3_ENABLE(x) (((x) & 0x0F) << 12)
5242 #define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0x0F)
5243 #define C_028238_TARGET3_ENABLE 0xFFFF0FFF
5244 #define S_028238_TARGET4_ENABLE(x) (((x) & 0x0F) << 16)
5245 #define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0x0F)
5246 #define C_028238_TARGET4_ENABLE 0xFFF0FFFF
5247 #define S_028238_TARGET5_ENABLE(x) (((x) & 0x0F) << 20)
5248 #define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0x0F)
5249 #define C_028238_TARGET5_ENABLE 0xFF0FFFFF
5250 #define S_028238_TARGET6_ENABLE(x) (((x) & 0x0F) << 24)
5251 #define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0x0F)
5252 #define C_028238_TARGET6_ENABLE 0xF0FFFFFF
5253 #define S_028238_TARGET7_ENABLE(x) (((x) & 0x0F) << 28)
5254 #define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0x0F)
5255 #define C_028238_TARGET7_ENABLE 0x0FFFFFFF
5256 #define R_02823C_CB_SHADER_MASK 0x02823C
5257 #define S_02823C_OUTPUT0_ENABLE(x) (((x) & 0x0F) << 0)
5258 #define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0x0F)
5259 #define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0
5260 #define S_02823C_OUTPUT1_ENABLE(x) (((x) & 0x0F) << 4)
5261 #define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0x0F)
5262 #define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F
5263 #define S_02823C_OUTPUT2_ENABLE(x) (((x) & 0x0F) << 8)
5264 #define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0x0F)
5265 #define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF
5266 #define S_02823C_OUTPUT3_ENABLE(x) (((x) & 0x0F) << 12)
5267 #define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0x0F)
5268 #define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF
5269 #define S_02823C_OUTPUT4_ENABLE(x) (((x) & 0x0F) << 16)
5270 #define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0x0F)
5271 #define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF
5272 #define S_02823C_OUTPUT5_ENABLE(x) (((x) & 0x0F) << 20)
5273 #define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0x0F)
5274 #define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF
5275 #define S_02823C_OUTPUT6_ENABLE(x) (((x) & 0x0F) << 24)
5276 #define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0x0F)
5277 #define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF
5278 #define S_02823C_OUTPUT7_ENABLE(x) (((x) & 0x0F) << 28)
5279 #define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0x0F)
5280 #define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF
5281 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240
5282 #define S_028240_TL_X(x) (((x) & 0x7FFF) << 0)
5283 #define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF)
5284 #define C_028240_TL_X 0xFFFF8000
5285 #define S_028240_TL_Y(x) (((x) & 0x7FFF) << 16)
5286 #define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF)
5287 #define C_028240_TL_Y 0x8000FFFF
5288 #define S_028240_WINDOW_OFFSET_DISABLE(x) (((x) & 0x1) << 31)
5289 #define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1)
5290 #define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF
5291 #define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244
5292 #define S_028244_BR_X(x) (((x) & 0x7FFF) << 0)
5293 #define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF)
5294 #define C_028244_BR_X 0xFFFF8000
5295 #define S_028244_BR_Y(x) (((x) & 0x7FFF) << 16)
5296 #define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF)
5297 #define C_028244_BR_Y 0x8000FFFF
5298 #define R_028248_COHER_DEST_BASE_0 0x028248
5299 #define R_02824C_COHER_DEST_BASE_1 0x02824C
5300 #define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250
5301 #define S_028250_TL_X(x) (((x) & 0x7FFF) << 0)
5302 #define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF)
5303 #define C_028250_TL_X 0xFFFF8000
5304 #define S_028250_TL_Y(x) (((x) & 0x7FFF) << 16)
5305 #define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF)
5306 #define C_028250_TL_Y 0x8000FFFF
5307 #define S_028250_WINDOW_OFFSET_DISABLE(x) (((x) & 0x1) << 31)
5308 #define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1)
5309 #define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF
5310 #define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254
5311 #define S_028254_BR_X(x) (((x) & 0x7FFF) << 0)
5312 #define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF)
5313 #define C_028254_BR_X 0xFFFF8000
5314 #define S_028254_BR_Y(x) (((x) & 0x7FFF) << 16)
5315 #define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF)
5316 #define C_028254_BR_Y 0x8000FFFF
5317 #define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258
5318 #define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C
5319 #define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260
5320 #define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264
5321 #define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268
5322 #define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C
5323 #define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270
5324 #define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274
5325 #define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278
5326 #define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C
5327 #define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280
5328 #define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284
5329 #define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288
5330 #define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C
5331 #define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290
5332 #define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294
5333 #define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298
5334 #define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C
5335 #define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0
5336 #define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4
5337 #define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8
5338 #define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC
5339 #define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0
5340 #define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4
5341 #define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8
5342 #define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC
5343 #define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0
5344 #define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4
5345 #define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8
5346 #define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC
5347 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0
5348 #define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4
5349 #define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8
5350 #define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC
5351 #define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0
5352 #define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4
5353 #define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8
5354 #define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC
5355 #define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0
5356 #define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4
5357 #define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8
5358 #define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC
5359 #define R_028300_PA_SC_VPORT_ZMIN_6 0x028300
5360 #define R_028304_PA_SC_VPORT_ZMAX_6 0x028304
5361 #define R_028308_PA_SC_VPORT_ZMIN_7 0x028308
5362 #define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C
5363 #define R_028310_PA_SC_VPORT_ZMIN_8 0x028310
5364 #define R_028314_PA_SC_VPORT_ZMAX_8 0x028314
5365 #define R_028318_PA_SC_VPORT_ZMIN_9 0x028318
5366 #define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C
5367 #define R_028320_PA_SC_VPORT_ZMIN_10 0x028320
5368 #define R_028324_PA_SC_VPORT_ZMAX_10 0x028324
5369 #define R_028328_PA_SC_VPORT_ZMIN_11 0x028328
5370 #define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C
5371 #define R_028330_PA_SC_VPORT_ZMIN_12 0x028330
5372 #define R_028334_PA_SC_VPORT_ZMAX_12 0x028334
5373 #define R_028338_PA_SC_VPORT_ZMIN_13 0x028338
5374 #define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C
5375 #define R_028340_PA_SC_VPORT_ZMIN_14 0x028340
5376 #define R_028344_PA_SC_VPORT_ZMAX_14 0x028344
5377 #define R_028348_PA_SC_VPORT_ZMIN_15 0x028348
5378 #define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C
5379 #define R_028350_PA_SC_RASTER_CONFIG 0x028350
5380 #define S_028350_RB_MAP_PKR0(x) (((x) & 0x03) << 0)
5381 #define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x03)
5382 #define C_028350_RB_MAP_PKR0 0xFFFFFFFC
5383 #define V_028350_RASTER_CONFIG_RB_MAP_0 0x00
5384 #define V_028350_RASTER_CONFIG_RB_MAP_1 0x01
5385 #define V_028350_RASTER_CONFIG_RB_MAP_2 0x02
5386 #define V_028350_RASTER_CONFIG_RB_MAP_3 0x03
5387 #define S_028350_RB_MAP_PKR1(x) (((x) & 0x03) << 2)
5388 #define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x03)
5389 #define C_028350_RB_MAP_PKR1 0xFFFFFFF3
5390 #define V_028350_RASTER_CONFIG_RB_MAP_0 0x00
5391 #define V_028350_RASTER_CONFIG_RB_MAP_1 0x01
5392 #define V_028350_RASTER_CONFIG_RB_MAP_2 0x02
5393 #define V_028350_RASTER_CONFIG_RB_MAP_3 0x03
5394 #define S_028350_RB_XSEL2(x) (((x) & 0x03) << 4)
5395 #define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x03)
5396 #define C_028350_RB_XSEL2 0xFFFFFFCF
5397 #define V_028350_RASTER_CONFIG_RB_XSEL2_0 0x00
5398 #define V_028350_RASTER_CONFIG_RB_XSEL2_1 0x01
5399 #define V_028350_RASTER_CONFIG_RB_XSEL2_2 0x02
5400 #define V_028350_RASTER_CONFIG_RB_XSEL2_3 0x03
5401 #define S_028350_RB_XSEL(x) (((x) & 0x1) << 6)
5402 #define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1)
5403 #define C_028350_RB_XSEL 0xFFFFFFBF
5404 #define S_028350_RB_YSEL(x) (((x) & 0x1) << 7)
5405 #define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1)
5406 #define C_028350_RB_YSEL 0xFFFFFF7F
5407 #define S_028350_PKR_MAP(x) (((x) & 0x03) << 8)
5408 #define G_028350_PKR_MAP(x) (((x) >> 8) & 0x03)
5409 #define C_028350_PKR_MAP 0xFFFFFCFF
5410 #define V_028350_RASTER_CONFIG_PKR_MAP_0 0x00
5411 #define V_028350_RASTER_CONFIG_PKR_MAP_1 0x01
5412 #define V_028350_RASTER_CONFIG_PKR_MAP_2 0x02
5413 #define V_028350_RASTER_CONFIG_PKR_MAP_3 0x03
5414 #define S_028350_PKR_XSEL(x) (((x) & 0x03) << 10)
5415 #define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x03)
5416 #define C_028350_PKR_XSEL 0xFFFFF3FF
5417 #define V_028350_RASTER_CONFIG_PKR_XSEL_0 0x00
5418 #define V_028350_RASTER_CONFIG_PKR_XSEL_1 0x01
5419 #define V_028350_RASTER_CONFIG_PKR_XSEL_2 0x02
5420 #define V_028350_RASTER_CONFIG_PKR_XSEL_3 0x03
5421 #define S_028350_PKR_YSEL(x) (((x) & 0x03) << 12)
5422 #define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x03)
5423 #define C_028350_PKR_YSEL 0xFFFFCFFF
5424 #define V_028350_RASTER_CONFIG_PKR_YSEL_0 0x00
5425 #define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01
5426 #define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02
5427 #define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03
5428 #define S_028350_PKR_XSEL2(x) (((x) & 0x03) << 14)
5429 #define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03)
5430 #define C_028350_PKR_XSEL2 0xFFFF3FFF
5431 #define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00
5432 #define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01
5433 #define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02
5434 #define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03
5435 #define S_028350_SC_MAP(x) (((x) & 0x03) << 16)
5436 #define G_028350_SC_MAP(x) (((x) >> 16) & 0x03)
5437 #define C_028350_SC_MAP 0xFFFCFFFF
5438 #define V_028350_RASTER_CONFIG_SC_MAP_0 0x00
5439 #define V_028350_RASTER_CONFIG_SC_MAP_1 0x01
5440 #define V_028350_RASTER_CONFIG_SC_MAP_2 0x02
5441 #define V_028350_RASTER_CONFIG_SC_MAP_3 0x03
5442 #define S_028350_SC_XSEL(x) (((x) & 0x03) << 18)
5443 #define G_028350_SC_XSEL(x) (((x) >> 18) & 0x03)
5444 #define C_028350_SC_XSEL 0xFFF3FFFF
5445 #define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0x00
5446 #define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 0x01
5447 #define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 0x02
5448 #define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 0x03
5449 #define S_028350_SC_YSEL(x) (((x) & 0x03) << 20)
5450 #define G_028350_SC_YSEL(x) (((x) >> 20) & 0x03)
5451 #define C_028350_SC_YSEL 0xFFCFFFFF
5452 #define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0x00
5453 #define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 0x01
5454 #define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 0x02
5455 #define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 0x03
5456 #define S_028350_SE_MAP(x) (((x) & 0x03) << 24)
5457 #define G_028350_SE_MAP(x) (((x) >> 24) & 0x03)
5458 #define C_028350_SE_MAP 0xFCFFFFFF
5459 #define V_028350_RASTER_CONFIG_SE_MAP_0 0x00
5460 #define V_028350_RASTER_CONFIG_SE_MAP_1 0x01
5461 #define V_028350_RASTER_CONFIG_SE_MAP_2 0x02
5462 #define V_028350_RASTER_CONFIG_SE_MAP_3 0x03
5463 #define S_028350_SE_XSEL(x) (((x) & 0x03) << 26)
5464 #define G_028350_SE_XSEL(x) (((x) >> 26) & 0x03)
5465 #define C_028350_SE_XSEL 0xF3FFFFFF
5466 #define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0x00
5467 #define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 0x01
5468 #define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 0x02
5469 #define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 0x03
5470 #define S_028350_SE_YSEL(x) (((x) & 0x03) << 28)
5471 #define G_028350_SE_YSEL(x) (((x) >> 28) & 0x03)
5472 #define C_028350_SE_YSEL 0xCFFFFFFF
5473 #define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0x00
5474 #define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 0x01
5475 #define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 0x02
5476 #define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 0x03
5478 #define R_028354_PA_SC_RASTER_CONFIG_1 0x028354
5479 #define S_028354_SE_PAIR_MAP(x) (((x) & 0x03) << 0)
5480 #define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x03)
5481 #define C_028354_SE_PAIR_MAP 0xFFFFFFFC
5482 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0x00
5483 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 0x01
5484 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 0x02
5485 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 0x03
5486 #define S_028354_SE_PAIR_XSEL(x) (((x) & 0x03) << 2)
5487 #define G_028354_SE_PAIR_XSEL(x) (((x) >> 2) & 0x03)
5488 #define C_028354_SE_PAIR_XSEL 0xFFFFFFF3
5489 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0x00
5490 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 0x01
5491 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 0x02
5492 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 0x03
5493 #define S_028354_SE_PAIR_YSEL(x) (((x) & 0x03) << 4)
5494 #define G_028354_SE_PAIR_YSEL(x) (((x) >> 4) & 0x03)
5495 #define C_028354_SE_PAIR_YSEL 0xFFFFFFCF
5496 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0x00
5497 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 0x01
5498 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 0x02
5499 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 0x03
5500 #define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358
5501 #define S_028358_SLICE_EVEN_ENABLE(x) (((x) & 0x03) << 0)
5502 #define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x03)
5503 #define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC
5504 #define S_028358_SLICE_ODD_ENABLE(x) (((x) & 0x03) << 2)
5505 #define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x03)
5506 #define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3
5508 #define R_028400_VGT_MAX_VTX_INDX 0x028400
5509 #define R_028404_VGT_MIN_VTX_INDX 0x028404
5510 #define R_028408_VGT_INDX_OFFSET 0x028408
5511 #define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C
5512 #define R_028414_CB_BLEND_RED 0x028414
5513 #define R_028418_CB_BLEND_GREEN 0x028418
5514 #define R_02841C_CB_BLEND_BLUE 0x02841C
5515 #define R_028420_CB_BLEND_ALPHA 0x028420
5517 #define R_028424_CB_DCC_CONTROL 0x028424
5518 #define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) & 0x1) << 0)
5519 #define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1)
5520 #define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE
5521 #define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) & 0x1) << 1)
5522 #define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1)
5523 #define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD
5524 #define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) & 0x1F) << 2)
5525 #define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F)
5526 #define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83
5528 #define R_02842C_DB_STENCIL_CONTROL 0x02842C
5529 #define S_02842C_STENCILFAIL(x) (((x) & 0x0F) << 0)
5530 #define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F)
5531 #define C_02842C_STENCILFAIL 0xFFFFFFF0
5532 #define V_02842C_STENCIL_KEEP 0x00
5533 #define V_02842C_STENCIL_ZERO 0x01
5534 #define V_02842C_STENCIL_ONES 0x02
5535 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5536 #define V_02842C_STENCIL_REPLACE_OP 0x04
5537 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5538 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5539 #define V_02842C_STENCIL_INVERT 0x07
5540 #define V_02842C_STENCIL_ADD_WRAP 0x08
5541 #define V_02842C_STENCIL_SUB_WRAP 0x09
5542 #define V_02842C_STENCIL_AND 0x0A
5543 #define V_02842C_STENCIL_OR 0x0B
5544 #define V_02842C_STENCIL_XOR 0x0C
5545 #define V_02842C_STENCIL_NAND 0x0D
5546 #define V_02842C_STENCIL_NOR 0x0E
5547 #define V_02842C_STENCIL_XNOR 0x0F
5548 #define S_02842C_STENCILZPASS(x) (((x) & 0x0F) << 4)
5549 #define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0x0F)
5550 #define C_02842C_STENCILZPASS 0xFFFFFF0F
5551 #define V_02842C_STENCIL_KEEP 0x00
5552 #define V_02842C_STENCIL_ZERO 0x01
5553 #define V_02842C_STENCIL_ONES 0x02
5554 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5555 #define V_02842C_STENCIL_REPLACE_OP 0x04
5556 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5557 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5558 #define V_02842C_STENCIL_INVERT 0x07
5559 #define V_02842C_STENCIL_ADD_WRAP 0x08
5560 #define V_02842C_STENCIL_SUB_WRAP 0x09
5561 #define V_02842C_STENCIL_AND 0x0A
5562 #define V_02842C_STENCIL_OR 0x0B
5563 #define V_02842C_STENCIL_XOR 0x0C
5564 #define V_02842C_STENCIL_NAND 0x0D
5565 #define V_02842C_STENCIL_NOR 0x0E
5566 #define V_02842C_STENCIL_XNOR 0x0F
5567 #define S_02842C_STENCILZFAIL(x) (((x) & 0x0F) << 8)
5568 #define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0x0F)
5569 #define C_02842C_STENCILZFAIL 0xFFFFF0FF
5570 #define V_02842C_STENCIL_KEEP 0x00
5571 #define V_02842C_STENCIL_ZERO 0x01
5572 #define V_02842C_STENCIL_ONES 0x02
5573 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5574 #define V_02842C_STENCIL_REPLACE_OP 0x04
5575 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5576 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5577 #define V_02842C_STENCIL_INVERT 0x07
5578 #define V_02842C_STENCIL_ADD_WRAP 0x08
5579 #define V_02842C_STENCIL_SUB_WRAP 0x09
5580 #define V_02842C_STENCIL_AND 0x0A
5581 #define V_02842C_STENCIL_OR 0x0B
5582 #define V_02842C_STENCIL_XOR 0x0C
5583 #define V_02842C_STENCIL_NAND 0x0D
5584 #define V_02842C_STENCIL_NOR 0x0E
5585 #define V_02842C_STENCIL_XNOR 0x0F
5586 #define S_02842C_STENCILFAIL_BF(x) (((x) & 0x0F) << 12)
5587 #define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0x0F)
5588 #define C_02842C_STENCILFAIL_BF 0xFFFF0FFF
5589 #define V_02842C_STENCIL_KEEP 0x00
5590 #define V_02842C_STENCIL_ZERO 0x01
5591 #define V_02842C_STENCIL_ONES 0x02
5592 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5593 #define V_02842C_STENCIL_REPLACE_OP 0x04
5594 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5595 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5596 #define V_02842C_STENCIL_INVERT 0x07
5597 #define V_02842C_STENCIL_ADD_WRAP 0x08
5598 #define V_02842C_STENCIL_SUB_WRAP 0x09
5599 #define V_02842C_STENCIL_AND 0x0A
5600 #define V_02842C_STENCIL_OR 0x0B
5601 #define V_02842C_STENCIL_XOR 0x0C
5602 #define V_02842C_STENCIL_NAND 0x0D
5603 #define V_02842C_STENCIL_NOR 0x0E
5604 #define V_02842C_STENCIL_XNOR 0x0F
5605 #define S_02842C_STENCILZPASS_BF(x) (((x) & 0x0F) << 16)
5606 #define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0x0F)
5607 #define C_02842C_STENCILZPASS_BF 0xFFF0FFFF
5608 #define V_02842C_STENCIL_KEEP 0x00
5609 #define V_02842C_STENCIL_ZERO 0x01
5610 #define V_02842C_STENCIL_ONES 0x02
5611 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5612 #define V_02842C_STENCIL_REPLACE_OP 0x04
5613 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5614 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5615 #define V_02842C_STENCIL_INVERT 0x07
5616 #define V_02842C_STENCIL_ADD_WRAP 0x08
5617 #define V_02842C_STENCIL_SUB_WRAP 0x09
5618 #define V_02842C_STENCIL_AND 0x0A
5619 #define V_02842C_STENCIL_OR 0x0B
5620 #define V_02842C_STENCIL_XOR 0x0C
5621 #define V_02842C_STENCIL_NAND 0x0D
5622 #define V_02842C_STENCIL_NOR 0x0E
5623 #define V_02842C_STENCIL_XNOR 0x0F
5624 #define S_02842C_STENCILZFAIL_BF(x) (((x) & 0x0F) << 20)
5625 #define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0x0F)
5626 #define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF
5627 #define V_02842C_STENCIL_KEEP 0x00
5628 #define V_02842C_STENCIL_ZERO 0x01
5629 #define V_02842C_STENCIL_ONES 0x02
5630 #define V_02842C_STENCIL_REPLACE_TEST 0x03
5631 #define V_02842C_STENCIL_REPLACE_OP 0x04
5632 #define V_02842C_STENCIL_ADD_CLAMP 0x05
5633 #define V_02842C_STENCIL_SUB_CLAMP 0x06
5634 #define V_02842C_STENCIL_INVERT 0x07
5635 #define V_02842C_STENCIL_ADD_WRAP 0x08
5636 #define V_02842C_STENCIL_SUB_WRAP 0x09
5637 #define V_02842C_STENCIL_AND 0x0A
5638 #define V_02842C_STENCIL_OR 0x0B
5639 #define V_02842C_STENCIL_XOR 0x0C
5640 #define V_02842C_STENCIL_NAND 0x0D
5641 #define V_02842C_STENCIL_NOR 0x0E
5642 #define V_02842C_STENCIL_XNOR 0x0F
5643 #define R_028430_DB_STENCILREFMASK 0x028430
5644 #define S_028430_STENCILTESTVAL(x) (((x) & 0xFF) << 0)
5645 #define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF)
5646 #define C_028430_STENCILTESTVAL 0xFFFFFF00
5647 #define S_028430_STENCILMASK(x) (((x) & 0xFF) << 8)
5648 #define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF)
5649 #define C_028430_STENCILMASK 0xFFFF00FF
5650 #define S_028430_STENCILWRITEMASK(x) (((x) & 0xFF) << 16)
5651 #define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF)
5652 #define C_028430_STENCILWRITEMASK 0xFF00FFFF
5653 #define S_028430_STENCILOPVAL(x) (((x) & 0xFF) << 24)
5654 #define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF)
5655 #define C_028430_STENCILOPVAL 0x00FFFFFF
5656 #define R_028434_DB_STENCILREFMASK_BF 0x028434
5657 #define S_028434_STENCILTESTVAL_BF(x) (((x) & 0xFF) << 0)
5658 #define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF)
5659 #define C_028434_STENCILTESTVAL_BF 0xFFFFFF00
5660 #define S_028434_STENCILMASK_BF(x) (((x) & 0xFF) << 8)
5661 #define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF)
5662 #define C_028434_STENCILMASK_BF 0xFFFF00FF
5663 #define S_028434_STENCILWRITEMASK_BF(x) (((x) & 0xFF) << 16)
5664 #define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF)
5665 #define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF
5666 #define S_028434_STENCILOPVAL_BF(x) (((x) & 0xFF) << 24)
5667 #define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF)
5668 #define C_028434_STENCILOPVAL_BF 0x00FFFFFF
5669 #define R_02843C_PA_CL_VPORT_XSCALE 0x02843C
5670 #define R_028440_PA_CL_VPORT_XOFFSET 0x028440
5671 #define R_028444_PA_CL_VPORT_YSCALE 0x028444
5672 #define R_028448_PA_CL_VPORT_YOFFSET 0x028448
5673 #define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C
5674 #define R_028450_PA_CL_VPORT_ZOFFSET 0x028450
5675 #define R_028454_PA_CL_VPORT_XSCALE_1 0x028454
5676 #define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458
5677 #define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C
5678 #define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460
5679 #define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464
5680 #define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468
5681 #define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C
5682 #define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470
5683 #define R_028474_PA_CL_VPORT_YSCALE_2 0x028474
5684 #define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478
5685 #define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C
5686 #define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480
5687 #define R_028484_PA_CL_VPORT_XSCALE_3 0x028484
5688 #define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488
5689 #define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C
5690 #define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490
5691 #define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494
5692 #define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498
5693 #define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C
5694 #define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0
5695 #define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4
5696 #define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8
5697 #define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC
5698 #define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0
5699 #define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4
5700 #define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8
5701 #define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC
5702 #define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0
5703 #define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4
5704 #define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8
5705 #define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC
5706 #define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0
5707 #define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4
5708 #define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8
5709 #define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC
5710 #define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0
5711 #define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4
5712 #define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8
5713 #define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC
5714 #define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0
5715 #define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4
5716 #define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8
5717 #define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC
5718 #define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500
5719 #define R_028504_PA_CL_VPORT_YSCALE_8 0x028504
5720 #define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508
5721 #define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C
5722 #define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510
5723 #define R_028514_PA_CL_VPORT_XSCALE_9 0x028514
5724 #define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518
5725 #define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C
5726 #define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520
5727 #define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524
5728 #define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528
5729 #define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C
5730 #define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530
5731 #define R_028534_PA_CL_VPORT_YSCALE_10 0x028534
5732 #define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538
5733 #define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C
5734 #define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540
5735 #define R_028544_PA_CL_VPORT_XSCALE_11 0x028544
5736 #define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548
5737 #define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C
5738 #define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550
5739 #define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554
5740 #define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558
5741 #define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C
5742 #define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560
5743 #define R_028564_PA_CL_VPORT_YSCALE_12 0x028564
5744 #define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568
5745 #define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C
5746 #define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570
5747 #define R_028574_PA_CL_VPORT_XSCALE_13 0x028574
5748 #define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578
5749 #define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C
5750 #define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580
5751 #define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584
5752 #define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588
5753 #define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C
5754 #define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590
5755 #define R_028594_PA_CL_VPORT_YSCALE_14 0x028594
5756 #define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598
5757 #define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C
5758 #define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0
5759 #define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4
5760 #define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8
5761 #define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC
5762 #define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0
5763 #define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4
5764 #define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8
5765 #define R_0285BC_PA_CL_UCP_0_X 0x0285BC
5766 #define R_0285C0_PA_CL_UCP_0_Y 0x0285C0
5767 #define R_0285C4_PA_CL_UCP_0_Z 0x0285C4
5768 #define R_0285C8_PA_CL_UCP_0_W 0x0285C8
5769 #define R_0285CC_PA_CL_UCP_1_X 0x0285CC
5770 #define R_0285D0_PA_CL_UCP_1_Y 0x0285D0
5771 #define R_0285D4_PA_CL_UCP_1_Z 0x0285D4
5772 #define R_0285D8_PA_CL_UCP_1_W 0x0285D8
5773 #define R_0285DC_PA_CL_UCP_2_X 0x0285DC
5774 #define R_0285E0_PA_CL_UCP_2_Y 0x0285E0
5775 #define R_0285E4_PA_CL_UCP_2_Z 0x0285E4
5776 #define R_0285E8_PA_CL_UCP_2_W 0x0285E8
5777 #define R_0285EC_PA_CL_UCP_3_X 0x0285EC
5778 #define R_0285F0_PA_CL_UCP_3_Y 0x0285F0
5779 #define R_0285F4_PA_CL_UCP_3_Z 0x0285F4
5780 #define R_0285F8_PA_CL_UCP_3_W 0x0285F8
5781 #define R_0285FC_PA_CL_UCP_4_X 0x0285FC
5782 #define R_028600_PA_CL_UCP_4_Y 0x028600
5783 #define R_028604_PA_CL_UCP_4_Z 0x028604
5784 #define R_028608_PA_CL_UCP_4_W 0x028608
5785 #define R_02860C_PA_CL_UCP_5_X 0x02860C
5786 #define R_028610_PA_CL_UCP_5_Y 0x028610
5787 #define R_028614_PA_CL_UCP_5_Z 0x028614
5788 #define R_028618_PA_CL_UCP_5_W 0x028618
5789 #define R_028644_SPI_PS_INPUT_CNTL_0 0x028644
5790 #define S_028644_OFFSET(x) (((x) & 0x3F) << 0)
5791 #define G_028644_OFFSET(x) (((x) >> 0) & 0x3F)
5792 #define C_028644_OFFSET 0xFFFFFFC0
5793 #define S_028644_DEFAULT_VAL(x) (((x) & 0x03) << 8)
5794 #define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x03)
5795 #define C_028644_DEFAULT_VAL 0xFFFFFCFF
5796 #define V_028644_X_0_0F 0x00
5797 #define S_028644_FLAT_SHADE(x) (((x) & 0x1) << 10)
5798 #define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1)
5799 #define C_028644_FLAT_SHADE 0xFFFFFBFF
5800 #define S_028644_CYL_WRAP(x) (((x) & 0x0F) << 13)
5801 #define G_028644_CYL_WRAP(x) (((x) >> 13) & 0x0F)
5802 #define C_028644_CYL_WRAP 0xFFFE1FFF
5803 #define S_028644_PT_SPRITE_TEX(x) (((x) & 0x1) << 17)
5804 #define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1)
5805 #define C_028644_PT_SPRITE_TEX 0xFFFDFFFF
5807 #define S_028644_DUP(x) (((x) & 0x1) << 18)
5808 #define G_028644_DUP(x) (((x) >> 18) & 0x1)
5809 #define C_028644_DUP 0xFFFBFFFF
5812 #define S_028644_FP16_INTERP_MODE(x) (((x) & 0x1) << 19)
5813 #define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1)
5814 #define C_028644_FP16_INTERP_MODE 0xFFF7FFFF
5815 #define S_028644_USE_DEFAULT_ATTR1(x) (((x) & 0x1) << 20)
5816 #define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1)
5817 #define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF
5818 #define S_028644_DEFAULT_VAL_ATTR1(x) (((x) & 0x03) << 21)
5819 #define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x03)
5820 #define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF
5821 #define S_028644_PT_SPRITE_TEX_ATTR1(x) (((x) & 0x1) << 23)
5822 #define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1)
5823 #define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF
5824 #define S_028644_ATTR0_VALID(x) (((x) & 0x1) << 24)
5825 #define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1)
5826 #define C_028644_ATTR0_VALID 0xFEFFFFFF
5827 #define S_028644_ATTR1_VALID(x) (((x) & 0x1) << 25)
5828 #define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1)
5829 #define C_028644_ATTR1_VALID 0xFDFFFFFF
5831 #define R_028648_SPI_PS_INPUT_CNTL_1 0x028648
5832 #define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C
5833 #define R_028650_SPI_PS_INPUT_CNTL_3 0x028650
5834 #define R_028654_SPI_PS_INPUT_CNTL_4 0x028654
5835 #define R_028658_SPI_PS_INPUT_CNTL_5 0x028658
5836 #define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C
5837 #define R_028660_SPI_PS_INPUT_CNTL_7 0x028660
5838 #define R_028664_SPI_PS_INPUT_CNTL_8 0x028664
5839 #define R_028668_SPI_PS_INPUT_CNTL_9 0x028668
5840 #define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C
5841 #define R_028670_SPI_PS_INPUT_CNTL_11 0x028670
5842 #define R_028674_SPI_PS_INPUT_CNTL_12 0x028674
5843 #define R_028678_SPI_PS_INPUT_CNTL_13 0x028678
5844 #define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C
5845 #define R_028680_SPI_PS_INPUT_CNTL_15 0x028680
5846 #define R_028684_SPI_PS_INPUT_CNTL_16 0x028684
5847 #define R_028688_SPI_PS_INPUT_CNTL_17 0x028688
5848 #define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C
5849 #define R_028690_SPI_PS_INPUT_CNTL_19 0x028690
5850 #define R_028694_SPI_PS_INPUT_CNTL_20 0x028694
5851 #define R_028698_SPI_PS_INPUT_CNTL_21 0x028698
5852 #define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C
5853 #define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0
5854 #define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4
5855 #define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8
5856 #define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC
5857 #define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0
5858 #define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4
5859 #define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8
5860 #define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC
5861 #define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0
5862 #define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4
5863 #define S_0286C4_VS_EXPORT_COUNT(x) (((x) & 0x1F) << 1)
5864 #define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F)
5865 #define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1
5866 #define S_0286C4_VS_HALF_PACK(x) (((x) & 0x1) << 6)
5867 #define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1)
5868 #define C_0286C4_VS_HALF_PACK 0xFFFFFFBF
5869 #define S_0286C4_VS_EXPORTS_FOG(x) (((x) & 0x1) << 7) /* not on CIK */
5870 #define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 7) & 0x1) /* not on CIK */
5871 #define C_0286C4_VS_EXPORTS_FOG 0xFFFFFF7F /* not on CIK */
5872 #define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) & 0x1F) << 8) /* not on CIK */
5873 #define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 8) & 0x1F) /* not on CIK */
5874 #define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFE0FF /* not on CIK */
5875 #define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
5876 #define S_0286CC_PERSP_SAMPLE_ENA(x) (((x) & 0x1) << 0)
5877 #define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1)
5878 #define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE
5879 #define S_0286CC_PERSP_CENTER_ENA(x) (((x) & 0x1) << 1)
5880 #define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1)
5881 #define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD
5882 #define S_0286CC_PERSP_CENTROID_ENA(x) (((x) & 0x1) << 2)
5883 #define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1)
5884 #define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB
5885 #define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) & 0x1) << 3)
5886 #define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1)
5887 #define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7
5888 #define S_0286CC_LINEAR_SAMPLE_ENA(x) (((x) & 0x1) << 4)
5889 #define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1)
5890 #define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF
5891 #define S_0286CC_LINEAR_CENTER_ENA(x) (((x) & 0x1) << 5)
5892 #define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1)
5893 #define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF
5894 #define S_0286CC_LINEAR_CENTROID_ENA(x) (((x) & 0x1) << 6)
5895 #define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1)
5896 #define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF
5897 #define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) & 0x1) << 7)
5898 #define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1)
5899 #define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F
5900 #define S_0286CC_POS_X_FLOAT_ENA(x) (((x) & 0x1) << 8)
5901 #define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1)
5902 #define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF
5903 #define S_0286CC_POS_Y_FLOAT_ENA(x) (((x) & 0x1) << 9)
5904 #define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1)
5905 #define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF
5906 #define S_0286CC_POS_Z_FLOAT_ENA(x) (((x) & 0x1) << 10)
5907 #define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1)
5908 #define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF
5909 #define S_0286CC_POS_W_FLOAT_ENA(x) (((x) & 0x1) << 11)
5910 #define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1)
5911 #define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF
5912 #define S_0286CC_FRONT_FACE_ENA(x) (((x) & 0x1) << 12)
5913 #define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1)
5914 #define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF
5915 #define S_0286CC_ANCILLARY_ENA(x) (((x) & 0x1) << 13)
5916 #define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1)
5917 #define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF
5918 #define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) & 0x1) << 14)
5919 #define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1)
5920 #define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF
5921 #define S_0286CC_POS_FIXED_PT_ENA(x) (((x) & 0x1) << 15)
5922 #define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1)
5923 #define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF
5924 #define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0
5925 #define S_0286D0_PERSP_SAMPLE_ENA(x) (((x) & 0x1) << 0)
5926 #define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1)
5927 #define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE
5928 #define S_0286D0_PERSP_CENTER_ENA(x) (((x) & 0x1) << 1)
5929 #define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1)
5930 #define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD
5931 #define S_0286D0_PERSP_CENTROID_ENA(x) (((x) & 0x1) << 2)
5932 #define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1)
5933 #define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB
5934 #define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) & 0x1) << 3)
5935 #define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1)
5936 #define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7
5937 #define S_0286D0_LINEAR_SAMPLE_ENA(x) (((x) & 0x1) << 4)
5938 #define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1)
5939 #define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF
5940 #define S_0286D0_LINEAR_CENTER_ENA(x) (((x) & 0x1) << 5)
5941 #define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1)
5942 #define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF
5943 #define S_0286D0_LINEAR_CENTROID_ENA(x) (((x) & 0x1) << 6)
5944 #define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1)
5945 #define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF
5946 #define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) & 0x1) << 7)
5947 #define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1)
5948 #define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F
5949 #define S_0286D0_POS_X_FLOAT_ENA(x) (((x) & 0x1) << 8)
5950 #define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1)
5951 #define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF
5952 #define S_0286D0_POS_Y_FLOAT_ENA(x) (((x) & 0x1) << 9)
5953 #define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1)
5954 #define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF
5955 #define S_0286D0_POS_Z_FLOAT_ENA(x) (((x) & 0x1) << 10)
5956 #define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1)
5957 #define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF
5958 #define S_0286D0_POS_W_FLOAT_ENA(x) (((x) & 0x1) << 11)
5959 #define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1)
5960 #define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF
5961 #define S_0286D0_FRONT_FACE_ENA(x) (((x) & 0x1) << 12)
5962 #define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1)
5963 #define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF
5964 #define S_0286D0_ANCILLARY_ENA(x) (((x) & 0x1) << 13)
5965 #define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1)
5966 #define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF
5967 #define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) & 0x1) << 14)
5968 #define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1)
5969 #define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF
5970 #define S_0286D0_POS_FIXED_PT_ENA(x) (((x) & 0x1) << 15)
5971 #define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1)
5972 #define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF
5973 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4
5974 #define S_0286D4_FLAT_SHADE_ENA(x) (((x) & 0x1) << 0)
5975 #define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1)
5976 #define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE
5977 #define S_0286D4_PNT_SPRITE_ENA(x) (((x) & 0x1) << 1)
5978 #define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1)
5979 #define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD
5980 #define S_0286D4_PNT_SPRITE_OVRD_X(x) (((x) & 0x07) << 2)
5981 #define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x07)
5982 #define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3
5983 #define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00
5984 #define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01
5985 #define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02
5986 #define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03
5987 #define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04
5988 #define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) & 0x07) << 5)
5989 #define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x07)
5990 #define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F
5991 #define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00
5992 #define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01
5993 #define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02
5994 #define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03
5995 #define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04
5996 #define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) & 0x07) << 8)
5997 #define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x07)
5998 #define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF
5999 #define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00
6000 #define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01
6001 #define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02
6002 #define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03
6003 #define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04
6004 #define S_0286D4_PNT_SPRITE_OVRD_W(x) (((x) & 0x07) << 11)
6005 #define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x07)
6006 #define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF
6007 #define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00
6008 #define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01
6009 #define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02
6010 #define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03
6011 #define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04
6012 #define S_0286D4_PNT_SPRITE_TOP_1(x) (((x) & 0x1) << 14)
6013 #define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1)
6014 #define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF
6015 #define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8
6016 #define S_0286D8_NUM_INTERP(x) (((x) & 0x3F) << 0)
6017 #define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F)
6018 #define C_0286D8_NUM_INTERP 0xFFFFFFC0
6019 #define S_0286D8_PARAM_GEN(x) (((x) & 0x1) << 6)
6020 #define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1)
6021 #define C_0286D8_PARAM_GEN 0xFFFFFFBF
6022 #define S_0286D8_FOG_ADDR(x) (((x) & 0x7F) << 7) /* not on CIK */
6023 #define G_0286D8_FOG_ADDR(x) (((x) >> 7) & 0x7F) /* not on CIK */
6024 #define C_0286D8_FOG_ADDR 0xFFFFC07F /* not on CIK */
6025 #define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) & 0x1) << 14)
6026 #define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1)
6027 #define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF
6028 #define S_0286D8_PASS_FOG_THROUGH_PS(x) (((x) & 0x1) << 15) /* not on CIK */
6029 #define G_0286D8_PASS_FOG_THROUGH_PS(x) (((x) >> 15) & 0x1) /* not on CIK */
6030 #define C_0286D8_PASS_FOG_THROUGH_PS 0xFFFF7FFF /* not on CIK */
6031 #define R_0286E0_SPI_BARYC_CNTL 0x0286E0
6032 #define S_0286E0_PERSP_CENTER_CNTL(x) (((x) & 0x1) << 0)
6033 #define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1)
6034 #define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE
6035 #define S_0286E0_PERSP_CENTROID_CNTL(x) (((x) & 0x1) << 4)
6036 #define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1)
6037 #define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF
6038 #define S_0286E0_LINEAR_CENTER_CNTL(x) (((x) & 0x1) << 8)
6039 #define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1)
6040 #define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF
6041 #define S_0286E0_LINEAR_CENTROID_CNTL(x) (((x) & 0x1) << 12)
6042 #define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1)
6043 #define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF
6044 #define S_0286E0_POS_FLOAT_LOCATION(x) (((x) & 0x03) << 16)
6045 #define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x03)
6046 #define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF
6047 #define V_0286E0_X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT 0x00
6048 #define S_0286E0_POS_FLOAT_ULC(x) (((x) & 0x1) << 20)
6049 #define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1)
6050 #define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF
6051 #define S_0286E0_FRONT_FACE_ALL_BITS(x) (((x) & 0x1) << 24)
6052 #define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1)
6053 #define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF
6054 #define R_0286E8_SPI_TMPRING_SIZE 0x0286E8
6055 #define S_0286E8_WAVES(x) (((x) & 0xFFF) << 0)
6056 #define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF)
6057 #define C_0286E8_WAVES 0xFFFFF000
6058 #define S_0286E8_WAVESIZE(x) (((x) & 0x1FFF) << 12)
6059 #define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF)
6060 #define C_0286E8_WAVESIZE 0xFE000FFF
6061 #define R_028704_SPI_WAVE_MGMT_1 0x028704 /* not on CIK */
6062 #define S_028704_NUM_PS_WAVES(x) (((x) & 0x3F) << 0)
6063 #define G_028704_NUM_PS_WAVES(x) (((x) >> 0) & 0x3F)
6064 #define C_028704_NUM_PS_WAVES 0xFFFFFFC0
6065 #define S_028704_NUM_VS_WAVES(x) (((x) & 0x3F) << 6)
6066 #define G_028704_NUM_VS_WAVES(x) (((x) >> 6) & 0x3F)
6067 #define C_028704_NUM_VS_WAVES 0xFFFFF03F
6068 #define S_028704_NUM_GS_WAVES(x) (((x) & 0x3F) << 12)
6069 #define G_028704_NUM_GS_WAVES(x) (((x) >> 12) & 0x3F)
6070 #define C_028704_NUM_GS_WAVES 0xFFFC0FFF
6071 #define S_028704_NUM_ES_WAVES(x) (((x) & 0x3F) << 18)
6072 #define G_028704_NUM_ES_WAVES(x) (((x) >> 18) & 0x3F)
6073 #define C_028704_NUM_ES_WAVES 0xFF03FFFF
6074 #define S_028704_NUM_HS_WAVES(x) (((x) & 0x3F) << 24)
6075 #define G_028704_NUM_HS_WAVES(x) (((x) >> 24) & 0x3F)
6076 #define C_028704_NUM_HS_WAVES 0xC0FFFFFF
6077 #define R_028708_SPI_WAVE_MGMT_2 0x028708 /* not on CIK */
6078 #define S_028708_NUM_LS_WAVES(x) (((x) & 0x3F) << 0)
6079 #define G_028708_NUM_LS_WAVES(x) (((x) >> 0) & 0x3F)
6080 #define C_028708_NUM_LS_WAVES 0xFFFFFFC0
6081 #define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C
6082 #define S_02870C_POS0_EXPORT_FORMAT(x) (((x) & 0x0F) << 0)
6083 #define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F)
6084 #define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0
6085 #define V_02870C_SPI_SHADER_NONE 0x00
6086 #define V_02870C_SPI_SHADER_1COMP 0x01
6087 #define V_02870C_SPI_SHADER_2COMP 0x02
6088 #define V_02870C_SPI_SHADER_4COMPRESS 0x03
6089 #define V_02870C_SPI_SHADER_4COMP 0x04
6090 #define S_02870C_POS1_EXPORT_FORMAT(x) (((x) & 0x0F) << 4)
6091 #define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F)
6092 #define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F
6093 #define V_02870C_SPI_SHADER_NONE 0x00
6094 #define V_02870C_SPI_SHADER_1COMP 0x01
6095 #define V_02870C_SPI_SHADER_2COMP 0x02
6096 #define V_02870C_SPI_SHADER_4COMPRESS 0x03
6097 #define V_02870C_SPI_SHADER_4COMP 0x04
6098 #define S_02870C_POS2_EXPORT_FORMAT(x) (((x) & 0x0F) << 8)
6099 #define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F)
6100 #define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF
6101 #define V_02870C_SPI_SHADER_NONE 0x00
6102 #define V_02870C_SPI_SHADER_1COMP 0x01
6103 #define V_02870C_SPI_SHADER_2COMP 0x02
6104 #define V_02870C_SPI_SHADER_4COMPRESS 0x03
6105 #define V_02870C_SPI_SHADER_4COMP 0x04
6106 #define S_02870C_POS3_EXPORT_FORMAT(x) (((x) & 0x0F) << 12)
6107 #define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F)
6108 #define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF
6109 #define V_02870C_SPI_SHADER_NONE 0x00
6110 #define V_02870C_SPI_SHADER_1COMP 0x01
6111 #define V_02870C_SPI_SHADER_2COMP 0x02
6112 #define V_02870C_SPI_SHADER_4COMPRESS 0x03
6113 #define V_02870C_SPI_SHADER_4COMP 0x04
6114 #define R_028710_SPI_SHADER_Z_FORMAT 0x028710
6115 #define S_028710_Z_EXPORT_FORMAT(x) (((x) & 0x0F) << 0)
6116 #define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F)
6117 #define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0
6118 #define V_028710_SPI_SHADER_ZERO 0x00
6119 #define V_028710_SPI_SHADER_32_R 0x01
6120 #define V_028710_SPI_SHADER_32_GR 0x02
6121 #define V_028710_SPI_SHADER_32_AR 0x03
6122 #define V_028710_SPI_SHADER_FP16_ABGR 0x04
6123 #define V_028710_SPI_SHADER_UNORM16_ABGR 0x05
6124 #define V_028710_SPI_SHADER_SNORM16_ABGR 0x06
6125 #define V_028710_SPI_SHADER_UINT16_ABGR 0x07
6126 #define V_028710_SPI_SHADER_SINT16_ABGR 0x08
6127 #define V_028710_SPI_SHADER_32_ABGR 0x09
6128 #define R_028714_SPI_SHADER_COL_FORMAT 0x028714
6129 #define S_028714_COL0_EXPORT_FORMAT(x) (((x) & 0x0F) << 0)
6130 #define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F)
6131 #define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0
6132 #define V_028714_SPI_SHADER_ZERO 0x00
6133 #define V_028714_SPI_SHADER_32_R 0x01
6134 #define V_028714_SPI_SHADER_32_GR 0x02
6135 #define V_028714_SPI_SHADER_32_AR 0x03
6136 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6137 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6138 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6139 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6140 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6141 #define V_028714_SPI_SHADER_32_ABGR 0x09
6142 #define S_028714_COL1_EXPORT_FORMAT(x) (((x) & 0x0F) << 4)
6143 #define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F)
6144 #define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F
6145 #define V_028714_SPI_SHADER_ZERO 0x00
6146 #define V_028714_SPI_SHADER_32_R 0x01
6147 #define V_028714_SPI_SHADER_32_GR 0x02
6148 #define V_028714_SPI_SHADER_32_AR 0x03
6149 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6150 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6151 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6152 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6153 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6154 #define V_028714_SPI_SHADER_32_ABGR 0x09
6155 #define S_028714_COL2_EXPORT_FORMAT(x) (((x) & 0x0F) << 8)
6156 #define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F)
6157 #define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF
6158 #define V_028714_SPI_SHADER_ZERO 0x00
6159 #define V_028714_SPI_SHADER_32_R 0x01
6160 #define V_028714_SPI_SHADER_32_GR 0x02
6161 #define V_028714_SPI_SHADER_32_AR 0x03
6162 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6163 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6164 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6165 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6166 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6167 #define V_028714_SPI_SHADER_32_ABGR 0x09
6168 #define S_028714_COL3_EXPORT_FORMAT(x) (((x) & 0x0F) << 12)
6169 #define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F)
6170 #define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF
6171 #define V_028714_SPI_SHADER_ZERO 0x00
6172 #define V_028714_SPI_SHADER_32_R 0x01
6173 #define V_028714_SPI_SHADER_32_GR 0x02
6174 #define V_028714_SPI_SHADER_32_AR 0x03
6175 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6176 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6177 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6178 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6179 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6180 #define V_028714_SPI_SHADER_32_ABGR 0x09
6181 #define S_028714_COL4_EXPORT_FORMAT(x) (((x) & 0x0F) << 16)
6182 #define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0x0F)
6183 #define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF
6184 #define V_028714_SPI_SHADER_ZERO 0x00
6185 #define V_028714_SPI_SHADER_32_R 0x01
6186 #define V_028714_SPI_SHADER_32_GR 0x02
6187 #define V_028714_SPI_SHADER_32_AR 0x03
6188 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6189 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6190 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6191 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6192 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6193 #define V_028714_SPI_SHADER_32_ABGR 0x09
6194 #define S_028714_COL5_EXPORT_FORMAT(x) (((x) & 0x0F) << 20)
6195 #define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0x0F)
6196 #define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF
6197 #define V_028714_SPI_SHADER_ZERO 0x00
6198 #define V_028714_SPI_SHADER_32_R 0x01
6199 #define V_028714_SPI_SHADER_32_GR 0x02
6200 #define V_028714_SPI_SHADER_32_AR 0x03
6201 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6202 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6203 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6204 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6205 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6206 #define V_028714_SPI_SHADER_32_ABGR 0x09
6207 #define S_028714_COL6_EXPORT_FORMAT(x) (((x) & 0x0F) << 24)
6208 #define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0x0F)
6209 #define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF
6210 #define V_028714_SPI_SHADER_ZERO 0x00
6211 #define V_028714_SPI_SHADER_32_R 0x01
6212 #define V_028714_SPI_SHADER_32_GR 0x02
6213 #define V_028714_SPI_SHADER_32_AR 0x03
6214 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6215 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6216 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6217 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6218 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6219 #define V_028714_SPI_SHADER_32_ABGR 0x09
6220 #define S_028714_COL7_EXPORT_FORMAT(x) (((x) & 0x0F) << 28)
6221 #define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0x0F)
6222 #define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF
6223 #define V_028714_SPI_SHADER_ZERO 0x00
6224 #define V_028714_SPI_SHADER_32_R 0x01
6225 #define V_028714_SPI_SHADER_32_GR 0x02
6226 #define V_028714_SPI_SHADER_32_AR 0x03
6227 #define V_028714_SPI_SHADER_FP16_ABGR 0x04
6228 #define V_028714_SPI_SHADER_UNORM16_ABGR 0x05
6229 #define V_028714_SPI_SHADER_SNORM16_ABGR 0x06
6230 #define V_028714_SPI_SHADER_UINT16_ABGR 0x07
6231 #define V_028714_SPI_SHADER_SINT16_ABGR 0x08
6232 #define V_028714_SPI_SHADER_32_ABGR 0x09
6234 #define R_028754_SX_PS_DOWNCONVERT 0x028754
6235 #define S_028754_MRT0(x) (((x) & 0x0F) << 0)
6236 #define G_028754_MRT0(x) (((x) >> 0) & 0x0F)
6237 #define C_028754_MRT0 0xFFFFFFF0
6238 #define V_028754_SX_RT_EXPORT_NO_CONVERSION 0
6239 #define V_028754_SX_RT_EXPORT_32_R 1
6240 #define V_028754_SX_RT_EXPORT_32_A 2
6241 #define V_028754_SX_RT_EXPORT_10_11_11 3
6242 #define V_028754_SX_RT_EXPORT_2_10_10_10 4
6243 #define V_028754_SX_RT_EXPORT_8_8_8_8 5
6244 #define V_028754_SX_RT_EXPORT_5_6_5 6
6245 #define V_028754_SX_RT_EXPORT_1_5_5_5 7
6246 #define V_028754_SX_RT_EXPORT_4_4_4_4 8
6247 #define V_028754_SX_RT_EXPORT_16_16_GR 9
6248 #define V_028754_SX_RT_EXPORT_16_16_AR 10
6249 #define S_028754_MRT1(x) (((x) & 0x0F) << 4)
6250 #define G_028754_MRT1(x) (((x) >> 4) & 0x0F)
6251 #define C_028754_MRT1 0xFFFFFF0F
6252 #define S_028754_MRT2(x) (((x) & 0x0F) << 8)
6253 #define G_028754_MRT2(x) (((x) >> 8) & 0x0F)
6254 #define C_028754_MRT2 0xFFFFF0FF
6255 #define S_028754_MRT3(x) (((x) & 0x0F) << 12)
6256 #define G_028754_MRT3(x) (((x) >> 12) & 0x0F)
6257 #define C_028754_MRT3 0xFFFF0FFF
6258 #define S_028754_MRT4(x) (((x) & 0x0F) << 16)
6259 #define G_028754_MRT4(x) (((x) >> 16) & 0x0F)
6260 #define C_028754_MRT4 0xFFF0FFFF
6261 #define S_028754_MRT5(x) (((x) & 0x0F) << 20)
6262 #define G_028754_MRT5(x) (((x) >> 20) & 0x0F)
6263 #define C_028754_MRT5 0xFF0FFFFF
6264 #define S_028754_MRT6(x) (((x) & 0x0F) << 24)
6265 #define G_028754_MRT6(x) (((x) >> 24) & 0x0F)
6266 #define C_028754_MRT6 0xF0FFFFFF
6267 #define S_028754_MRT7(x) (((x) & 0x0F) << 28)
6268 #define G_028754_MRT7(x) (((x) >> 28) & 0x0F)
6269 #define C_028754_MRT7 0x0FFFFFFF
6270 #define R_028758_SX_BLEND_OPT_EPSILON 0x028758
6271 #define S_028758_MRT0_EPSILON(x) (((x) & 0x0F) << 0)
6272 #define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0x0F)
6273 #define C_028758_MRT0_EPSILON 0xFFFFFFF0
6274 #define V_028758_EXACT 0
6275 #define V_028758_11BIT_FORMAT 1
6276 #define V_028758_10BIT_FORMAT 3
6277 #define V_028758_8BIT_FORMAT 7
6278 #define V_028758_6BIT_FORMAT 11
6279 #define V_028758_5BIT_FORMAT 13
6280 #define V_028758_4BIT_FORMAT 15
6281 #define S_028758_MRT1_EPSILON(x) (((x) & 0x0F) << 4)
6282 #define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0x0F)
6283 #define C_028758_MRT1_EPSILON 0xFFFFFF0F
6284 #define S_028758_MRT2_EPSILON(x) (((x) & 0x0F) << 8)
6285 #define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0x0F)
6286 #define C_028758_MRT2_EPSILON 0xFFFFF0FF
6287 #define S_028758_MRT3_EPSILON(x) (((x) & 0x0F) << 12)
6288 #define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0x0F)
6289 #define C_028758_MRT3_EPSILON 0xFFFF0FFF
6290 #define S_028758_MRT4_EPSILON(x) (((x) & 0x0F) << 16)
6291 #define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0x0F)
6292 #define C_028758_MRT4_EPSILON 0xFFF0FFFF
6293 #define S_028758_MRT5_EPSILON(x) (((x) & 0x0F) << 20)
6294 #define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0x0F)
6295 #define C_028758_MRT5_EPSILON 0xFF0FFFFF
6296 #define S_028758_MRT6_EPSILON(x) (((x) & 0x0F) << 24)
6297 #define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0x0F)
6298 #define C_028758_MRT6_EPSILON 0xF0FFFFFF
6299 #define S_028758_MRT7_EPSILON(x) (((x) & 0x0F) << 28)
6300 #define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0x0F)
6301 #define C_028758_MRT7_EPSILON 0x0FFFFFFF
6302 #define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C
6303 #define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 0)
6304 #define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1)
6305 #define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE
6306 #define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 1)
6307 #define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1)
6308 #define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD
6309 #define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 4)
6310 #define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1)
6311 #define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF
6312 #define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 5)
6313 #define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1)
6314 #define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF
6315 #define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 8)
6316 #define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1)
6317 #define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF
6318 #define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 9)
6319 #define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1)
6320 #define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF
6321 #define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 12)
6322 #define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1)
6323 #define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF
6324 #define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 13)
6325 #define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1)
6326 #define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF
6327 #define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 16)
6328 #define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1)
6329 #define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF
6330 #define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 17)
6331 #define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1)
6332 #define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF
6333 #define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 20)
6334 #define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1)
6335 #define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF
6336 #define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 21)
6337 #define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1)
6338 #define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF
6339 #define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 24)
6340 #define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1)
6341 #define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF
6342 #define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 25)
6343 #define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1)
6344 #define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF
6345 #define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) & 0x1) << 28)
6346 #define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1)
6347 #define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF
6348 #define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) & 0x1) << 29)
6349 #define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1)
6350 #define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF
6351 #define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) & 0x1) << 31)
6352 #define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1)
6353 #define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF
6354 #define R_028760_SX_MRT0_BLEND_OPT 0x028760
6355 #define S_028760_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6356 #define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6357 #define C_028760_COLOR_SRC_OPT 0xFFFFFFF8
6358 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0
6359 #define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1
6360 #define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2
6361 #define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3
6362 #define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4
6363 #define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5
6364 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6
6365 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7
6366 #define S_028760_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6367 #define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6368 #define C_028760_COLOR_DST_OPT 0xFFFFFF8F
6369 #define S_028760_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6370 #define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6371 #define C_028760_COLOR_COMB_FCN 0xFFFFF8FF
6372 #define V_028760_OPT_COMB_NONE 0
6373 #define V_028760_OPT_COMB_ADD 1
6374 #define V_028760_OPT_COMB_SUBTRACT 2
6375 #define V_028760_OPT_COMB_MIN 3
6376 #define V_028760_OPT_COMB_MAX 4
6377 #define V_028760_OPT_COMB_REVSUBTRACT 5
6378 #define V_028760_OPT_COMB_BLEND_DISABLED 6
6379 #define V_028760_OPT_COMB_SAFE_ADD 7
6380 #define S_028760_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6381 #define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6382 #define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF
6383 #define S_028760_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6384 #define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6385 #define C_028760_ALPHA_DST_OPT 0xFF8FFFFF
6386 #define S_028760_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6387 #define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6388 #define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF
6389 #define R_028764_SX_MRT1_BLEND_OPT 0x028764
6390 #define S_028764_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6391 #define G_028764_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6392 #define C_028764_COLOR_SRC_OPT 0xFFFFFFF8
6393 #define S_028764_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6394 #define G_028764_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6395 #define C_028764_COLOR_DST_OPT 0xFFFFFF8F
6396 #define S_028764_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6397 #define G_028764_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6398 #define C_028764_COLOR_COMB_FCN 0xFFFFF8FF
6399 #define S_028764_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6400 #define G_028764_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6401 #define C_028764_ALPHA_SRC_OPT 0xFFF8FFFF
6402 #define S_028764_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6403 #define G_028764_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6404 #define C_028764_ALPHA_DST_OPT 0xFF8FFFFF
6405 #define S_028764_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6406 #define G_028764_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6407 #define C_028764_ALPHA_COMB_FCN 0xF8FFFFFF
6408 #define R_028768_SX_MRT2_BLEND_OPT 0x028768
6409 #define S_028768_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6410 #define G_028768_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6411 #define C_028768_COLOR_SRC_OPT 0xFFFFFFF8
6412 #define S_028768_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6413 #define G_028768_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6414 #define C_028768_COLOR_DST_OPT 0xFFFFFF8F
6415 #define S_028768_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6416 #define G_028768_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6417 #define C_028768_COLOR_COMB_FCN 0xFFFFF8FF
6418 #define S_028768_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6419 #define G_028768_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6420 #define C_028768_ALPHA_SRC_OPT 0xFFF8FFFF
6421 #define S_028768_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6422 #define G_028768_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6423 #define C_028768_ALPHA_DST_OPT 0xFF8FFFFF
6424 #define S_028768_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6425 #define G_028768_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6426 #define C_028768_ALPHA_COMB_FCN 0xF8FFFFFF
6427 #define R_02876C_SX_MRT3_BLEND_OPT 0x02876C
6428 #define S_02876C_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6429 #define G_02876C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6430 #define C_02876C_COLOR_SRC_OPT 0xFFFFFFF8
6431 #define S_02876C_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6432 #define G_02876C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6433 #define C_02876C_COLOR_DST_OPT 0xFFFFFF8F
6434 #define S_02876C_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6435 #define G_02876C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6436 #define C_02876C_COLOR_COMB_FCN 0xFFFFF8FF
6437 #define S_02876C_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6438 #define G_02876C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6439 #define C_02876C_ALPHA_SRC_OPT 0xFFF8FFFF
6440 #define S_02876C_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6441 #define G_02876C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6442 #define C_02876C_ALPHA_DST_OPT 0xFF8FFFFF
6443 #define S_02876C_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6444 #define G_02876C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6445 #define C_02876C_ALPHA_COMB_FCN 0xF8FFFFFF
6446 #define R_028770_SX_MRT4_BLEND_OPT 0x028770
6447 #define S_028770_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6448 #define G_028770_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6449 #define C_028770_COLOR_SRC_OPT 0xFFFFFFF8
6450 #define S_028770_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6451 #define G_028770_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6452 #define C_028770_COLOR_DST_OPT 0xFFFFFF8F
6453 #define S_028770_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6454 #define G_028770_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6455 #define C_028770_COLOR_COMB_FCN 0xFFFFF8FF
6456 #define S_028770_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6457 #define G_028770_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6458 #define C_028770_ALPHA_SRC_OPT 0xFFF8FFFF
6459 #define S_028770_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6460 #define G_028770_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6461 #define C_028770_ALPHA_DST_OPT 0xFF8FFFFF
6462 #define S_028770_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6463 #define G_028770_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6464 #define C_028770_ALPHA_COMB_FCN 0xF8FFFFFF
6465 #define R_028774_SX_MRT5_BLEND_OPT 0x028774
6466 #define S_028774_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6467 #define G_028774_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6468 #define C_028774_COLOR_SRC_OPT 0xFFFFFFF8
6469 #define S_028774_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6470 #define G_028774_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6471 #define C_028774_COLOR_DST_OPT 0xFFFFFF8F
6472 #define S_028774_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6473 #define G_028774_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6474 #define C_028774_COLOR_COMB_FCN 0xFFFFF8FF
6475 #define S_028774_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6476 #define G_028774_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6477 #define C_028774_ALPHA_SRC_OPT 0xFFF8FFFF
6478 #define S_028774_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6479 #define G_028774_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6480 #define C_028774_ALPHA_DST_OPT 0xFF8FFFFF
6481 #define S_028774_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6482 #define G_028774_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6483 #define C_028774_ALPHA_COMB_FCN 0xF8FFFFFF
6484 #define R_028778_SX_MRT6_BLEND_OPT 0x028778
6485 #define S_028778_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6486 #define G_028778_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6487 #define C_028778_COLOR_SRC_OPT 0xFFFFFFF8
6488 #define S_028778_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6489 #define G_028778_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6490 #define C_028778_COLOR_DST_OPT 0xFFFFFF8F
6491 #define S_028778_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6492 #define G_028778_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6493 #define C_028778_COLOR_COMB_FCN 0xFFFFF8FF
6494 #define S_028778_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6495 #define G_028778_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6496 #define C_028778_ALPHA_SRC_OPT 0xFFF8FFFF
6497 #define S_028778_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6498 #define G_028778_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6499 #define C_028778_ALPHA_DST_OPT 0xFF8FFFFF
6500 #define S_028778_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6501 #define G_028778_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6502 #define C_028778_ALPHA_COMB_FCN 0xF8FFFFFF
6503 #define R_02877C_SX_MRT7_BLEND_OPT 0x02877C
6504 #define S_02877C_COLOR_SRC_OPT(x) (((x) & 0x07) << 0)
6505 #define G_02877C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07)
6506 #define C_02877C_COLOR_SRC_OPT 0xFFFFFFF8
6507 #define S_02877C_COLOR_DST_OPT(x) (((x) & 0x07) << 4)
6508 #define G_02877C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07)
6509 #define C_02877C_COLOR_DST_OPT 0xFFFFFF8F
6510 #define S_02877C_COLOR_COMB_FCN(x) (((x) & 0x07) << 8)
6511 #define G_02877C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07)
6512 #define C_02877C_COLOR_COMB_FCN 0xFFFFF8FF
6513 #define S_02877C_ALPHA_SRC_OPT(x) (((x) & 0x07) << 16)
6514 #define G_02877C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07)
6515 #define C_02877C_ALPHA_SRC_OPT 0xFFF8FFFF
6516 #define S_02877C_ALPHA_DST_OPT(x) (((x) & 0x07) << 20)
6517 #define G_02877C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07)
6518 #define C_02877C_ALPHA_DST_OPT 0xFF8FFFFF
6519 #define S_02877C_ALPHA_COMB_FCN(x) (((x) & 0x07) << 24)
6520 #define G_02877C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07)
6521 #define C_02877C_ALPHA_COMB_FCN 0xF8FFFFFF
6523 #define R_028780_CB_BLEND0_CONTROL 0x028780
6524 #define S_028780_COLOR_SRCBLEND(x) (((x) & 0x1F) << 0)
6525 #define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F)
6526 #define C_028780_COLOR_SRCBLEND 0xFFFFFFE0
6527 #define V_028780_BLEND_ZERO 0x00
6528 #define V_028780_BLEND_ONE 0x01
6529 #define V_028780_BLEND_SRC_COLOR 0x02
6530 #define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03
6531 #define V_028780_BLEND_SRC_ALPHA 0x04
6532 #define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05
6533 #define V_028780_BLEND_DST_ALPHA 0x06
6534 #define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07
6535 #define V_028780_BLEND_DST_COLOR 0x08
6536 #define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09
6537 #define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A
6538 #define V_028780_BLEND_CONSTANT_COLOR 0x0D
6539 #define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E
6540 #define V_028780_BLEND_SRC1_COLOR 0x0F
6541 #define V_028780_BLEND_INV_SRC1_COLOR 0x10
6542 #define V_028780_BLEND_SRC1_ALPHA 0x11
6543 #define V_028780_BLEND_INV_SRC1_ALPHA 0x12
6544 #define V_028780_BLEND_CONSTANT_ALPHA 0x13
6545 #define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14
6546 #define S_028780_COLOR_COMB_FCN(x) (((x) & 0x07) << 5)
6547 #define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x07)
6548 #define C_028780_COLOR_COMB_FCN 0xFFFFFF1F
6549 #define V_028780_COMB_DST_PLUS_SRC 0x00
6550 #define V_028780_COMB_SRC_MINUS_DST 0x01
6551 #define V_028780_COMB_MIN_DST_SRC 0x02
6552 #define V_028780_COMB_MAX_DST_SRC 0x03
6553 #define V_028780_COMB_DST_MINUS_SRC 0x04
6554 #define S_028780_COLOR_DESTBLEND(x) (((x) & 0x1F) << 8)
6555 #define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F)
6556 #define C_028780_COLOR_DESTBLEND 0xFFFFE0FF
6557 #define V_028780_BLEND_ZERO 0x00
6558 #define V_028780_BLEND_ONE 0x01
6559 #define V_028780_BLEND_SRC_COLOR 0x02
6560 #define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03
6561 #define V_028780_BLEND_SRC_ALPHA 0x04
6562 #define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05
6563 #define V_028780_BLEND_DST_ALPHA 0x06
6564 #define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07
6565 #define V_028780_BLEND_DST_COLOR 0x08
6566 #define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09
6567 #define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A
6568 #define V_028780_BLEND_CONSTANT_COLOR 0x0D
6569 #define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E
6570 #define V_028780_BLEND_SRC1_COLOR 0x0F
6571 #define V_028780_BLEND_INV_SRC1_COLOR 0x10
6572 #define V_028780_BLEND_SRC1_ALPHA 0x11
6573 #define V_028780_BLEND_INV_SRC1_ALPHA 0x12
6574 #define V_028780_BLEND_CONSTANT_ALPHA 0x13
6575 #define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14
6576 #define S_028780_ALPHA_SRCBLEND(x) (((x) & 0x1F) << 16)
6577 #define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F)
6578 #define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF
6579 #define V_028780_BLEND_ZERO 0x00
6580 #define V_028780_BLEND_ONE 0x01
6581 #define V_028780_BLEND_SRC_COLOR 0x02
6582 #define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03
6583 #define V_028780_BLEND_SRC_ALPHA 0x04
6584 #define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05
6585 #define V_028780_BLEND_DST_ALPHA 0x06
6586 #define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07
6587 #define V_028780_BLEND_DST_COLOR 0x08
6588 #define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09
6589 #define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A
6590 #define V_028780_BLEND_CONSTANT_COLOR 0x0D
6591 #define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E
6592 #define V_028780_BLEND_SRC1_COLOR 0x0F
6593 #define V_028780_BLEND_INV_SRC1_COLOR 0x10
6594 #define V_028780_BLEND_SRC1_ALPHA 0x11
6595 #define V_028780_BLEND_INV_SRC1_ALPHA 0x12
6596 #define V_028780_BLEND_CONSTANT_ALPHA 0x13
6597 #define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14
6598 #define S_028780_ALPHA_COMB_FCN(x) (((x) & 0x07) << 21)
6599 #define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x07)
6600 #define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF
6601 #define V_028780_COMB_DST_PLUS_SRC 0x00
6602 #define V_028780_COMB_SRC_MINUS_DST 0x01
6603 #define V_028780_COMB_MIN_DST_SRC 0x02
6604 #define V_028780_COMB_MAX_DST_SRC 0x03
6605 #define V_028780_COMB_DST_MINUS_SRC 0x04
6606 #define S_028780_ALPHA_DESTBLEND(x) (((x) & 0x1F) << 24)
6607 #define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F)
6608 #define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF
6609 #define V_028780_BLEND_ZERO 0x00
6610 #define V_028780_BLEND_ONE 0x01
6611 #define V_028780_BLEND_SRC_COLOR 0x02
6612 #define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03
6613 #define V_028780_BLEND_SRC_ALPHA 0x04
6614 #define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05
6615 #define V_028780_BLEND_DST_ALPHA 0x06
6616 #define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07
6617 #define V_028780_BLEND_DST_COLOR 0x08
6618 #define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09
6619 #define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A
6620 #define V_028780_BLEND_CONSTANT_COLOR 0x0D
6621 #define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E
6622 #define V_028780_BLEND_SRC1_COLOR 0x0F
6623 #define V_028780_BLEND_INV_SRC1_COLOR 0x10
6624 #define V_028780_BLEND_SRC1_ALPHA 0x11
6625 #define V_028780_BLEND_INV_SRC1_ALPHA 0x12
6626 #define V_028780_BLEND_CONSTANT_ALPHA 0x13
6627 #define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14
6628 #define S_028780_SEPARATE_ALPHA_BLEND(x) (((x) & 0x1) << 29)
6629 #define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1)
6630 #define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF
6631 #define S_028780_ENABLE(x) (((x) & 0x1) << 30)
6632 #define G_028780_ENABLE(x) (((x) >> 30) & 0x1)
6633 #define C_028780_ENABLE 0xBFFFFFFF
6634 #define S_028780_DISABLE_ROP3(x) (((x) & 0x1) << 31)
6635 #define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1)
6636 #define C_028780_DISABLE_ROP3 0x7FFFFFFF
6637 #define R_028784_CB_BLEND1_CONTROL 0x028784
6638 #define R_028788_CB_BLEND2_CONTROL 0x028788
6639 #define R_02878C_CB_BLEND3_CONTROL 0x02878C
6640 #define R_028790_CB_BLEND4_CONTROL 0x028790
6641 #define R_028794_CB_BLEND5_CONTROL 0x028794
6642 #define R_028798_CB_BLEND6_CONTROL 0x028798
6643 #define R_02879C_CB_BLEND7_CONTROL 0x02879C
6644 #define R_0287CC_CS_COPY_STATE 0x0287CC
6645 #define S_0287CC_SRC_STATE_ID(x) (((x) & 0x07) << 0)
6646 #define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x07)
6647 #define C_0287CC_SRC_STATE_ID 0xFFFFFFF8
6648 #define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4
6649 #define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8
6650 #define R_0287DC_PA_CL_POINT_SIZE 0x0287DC
6651 #define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0
6652 #define R_0287E4_VGT_DMA_BASE_HI 0x0287E4
6653 #define S_0287E4_BASE_ADDR(x) (((x) & 0xFF) << 0)
6654 #define G_0287E4_BASE_ADDR(x) (((x) >> 0) & 0xFF)
6655 #define C_0287E4_BASE_ADDR 0xFFFFFF00
6656 #define R_0287E8_VGT_DMA_BASE 0x0287E8
6657 #define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0
6658 #define S_0287F0_SOURCE_SELECT(x) (((x) & 0x03) << 0)
6659 #define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x03)
6660 #define C_0287F0_SOURCE_SELECT 0xFFFFFFFC
6661 #define V_0287F0_DI_SRC_SEL_DMA 0x00
6662 #define V_0287F0_DI_SRC_SEL_IMMEDIATE 0x01 /* not on CIK */
6663 #define V_0287F0_DI_SRC_SEL_AUTO_INDEX 0x02
6664 #define V_0287F0_DI_SRC_SEL_RESERVED 0x03
6665 #define S_0287F0_MAJOR_MODE(x) (((x) & 0x03) << 2)
6666 #define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x03)
6667 #define C_0287F0_MAJOR_MODE 0xFFFFFFF3
6668 #define V_0287F0_DI_MAJOR_MODE_0 0x00
6669 #define V_0287F0_DI_MAJOR_MODE_1 0x01
6670 #define S_0287F0_NOT_EOP(x) (((x) & 0x1) << 5)
6671 #define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1)
6672 #define C_0287F0_NOT_EOP 0xFFFFFFDF
6673 #define S_0287F0_USE_OPAQUE(x) (((x) & 0x1) << 6)
6674 #define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1)
6675 #define C_0287F0_USE_OPAQUE 0xFFFFFFBF
6676 #define R_0287F4_VGT_IMMED_DATA 0x0287F4 /* not on CIK */
6677 #define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8
6678 #define S_0287F8_ADDRESS_LOW(x) (((x) & 0xFFFFFFF) << 0)
6679 #define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF)
6680 #define C_0287F8_ADDRESS_LOW 0xF0000000
6681 #define R_028800_DB_DEPTH_CONTROL 0x028800
6682 #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0)
6683 #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1)
6684 #define C_028800_STENCIL_ENABLE 0xFFFFFFFE
6685 #define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1)
6686 #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1)
6687 #define C_028800_Z_ENABLE 0xFFFFFFFD
6688 #define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2)
6689 #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1)
6690 #define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB
6691 #define S_028800_DEPTH_BOUNDS_ENABLE(x) (((x) & 0x1) << 3)
6692 #define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1)
6693 #define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7
6694 #define S_028800_ZFUNC(x) (((x) & 0x07) << 4)
6695 #define G_028800_ZFUNC(x) (((x) >> 4) & 0x07)
6696 #define C_028800_ZFUNC 0xFFFFFF8F
6697 #define V_028800_FRAG_NEVER 0x00
6698 #define V_028800_FRAG_LESS 0x01
6699 #define V_028800_FRAG_EQUAL 0x02
6700 #define V_028800_FRAG_LEQUAL 0x03
6701 #define V_028800_FRAG_GREATER 0x04
6702 #define V_028800_FRAG_NOTEQUAL 0x05
6703 #define V_028800_FRAG_GEQUAL 0x06
6704 #define V_028800_FRAG_ALWAYS 0x07
6705 #define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7)
6706 #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1)
6707 #define C_028800_BACKFACE_ENABLE 0xFFFFFF7F
6708 #define S_028800_STENCILFUNC(x) (((x) & 0x07) << 8)
6709 #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x07)
6710 #define C_028800_STENCILFUNC 0xFFFFF8FF
6711 #define V_028800_REF_NEVER 0x00
6712 #define V_028800_REF_LESS 0x01
6713 #define V_028800_REF_EQUAL 0x02
6714 #define V_028800_REF_LEQUAL 0x03
6715 #define V_028800_REF_GREATER 0x04
6716 #define V_028800_REF_NOTEQUAL 0x05
6717 #define V_028800_REF_GEQUAL 0x06
6718 #define V_028800_REF_ALWAYS 0x07
6719 #define S_028800_STENCILFUNC_BF(x) (((x) & 0x07) << 20)
6720 #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x07)
6721 #define C_028800_STENCILFUNC_BF 0xFF8FFFFF
6722 #define V_028800_REF_NEVER 0x00
6723 #define V_028800_REF_LESS 0x01
6724 #define V_028800_REF_EQUAL 0x02
6725 #define V_028800_REF_LEQUAL 0x03
6726 #define V_028800_REF_GREATER 0x04
6727 #define V_028800_REF_NOTEQUAL 0x05
6728 #define V_028800_REF_GEQUAL 0x06
6729 #define V_028800_REF_ALWAYS 0x07
6730 #define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) & 0x1) << 30)
6731 #define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1)
6732 #define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF
6733 #define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) & 0x1) << 31)
6734 #define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1)
6735 #define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF
6736 #define R_028804_DB_EQAA 0x028804
6737 #define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0)
6738 #define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07)
6739 #define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8
6740 #define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4)
6741 #define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07)
6742 #define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F
6743 #define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8)
6744 #define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07)
6745 #define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF
6746 #define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12)
6747 #define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07)
6748 #define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF
6749 #define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16)
6750 #define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1)
6751 #define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF
6752 #define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17)
6753 #define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1)
6754 #define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF
6755 #define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18)
6756 #define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1)
6757 #define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF
6758 #define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19)
6759 #define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1)
6760 #define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF
6761 #define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20)
6762 #define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1)
6763 #define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF
6764 #define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21)
6765 #define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1)
6766 #define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF
6767 #define S_028804_OVERRASTERIZATION_AMOUNT(x) (((x) & 0x07) << 24)
6768 #define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07)
6769 #define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF
6770 #define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) & 0x1) << 27)
6771 #define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1)
6772 #define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF
6773 #define R_028808_CB_COLOR_CONTROL 0x028808
6774 #define S_028808_DISABLE_DUAL_QUAD(x) (((x) & 0x1) << 0)
6775 #define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1)
6776 #define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE
6777 #define S_028808_DEGAMMA_ENABLE(x) (((x) & 0x1) << 3)
6778 #define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1)
6779 #define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7
6780 #define S_028808_MODE(x) (((x) & 0x07) << 4)
6781 #define G_028808_MODE(x) (((x) >> 4) & 0x07)
6782 #define C_028808_MODE 0xFFFFFF8F
6783 #define V_028808_CB_DISABLE 0x00
6784 #define V_028808_CB_NORMAL 0x01
6785 #define V_028808_CB_ELIMINATE_FAST_CLEAR 0x02
6786 #define V_028808_CB_RESOLVE 0x03
6787 #define V_028808_CB_FMASK_DECOMPRESS 0x05
6788 #define V_028808_CB_DCC_DECOMPRESS 0x06
6789 #define S_028808_ROP3(x) (((x) & 0xFF) << 16)
6790 #define G_028808_ROP3(x) (((x) >> 16) & 0xFF)
6791 #define C_028808_ROP3 0xFF00FFFF
6792 #define V_028808_X_0X00 0x00
6793 #define V_028808_X_0X05 0x05
6794 #define V_028808_X_0X0A 0x0A
6795 #define V_028808_X_0X0F 0x0F
6796 #define V_028808_X_0X11 0x11
6797 #define V_028808_X_0X22 0x22
6798 #define V_028808_X_0X33 0x33
6799 #define V_028808_X_0X44 0x44
6800 #define V_028808_X_0X50 0x50
6801 #define V_028808_X_0X55 0x55
6802 #define V_028808_X_0X5A 0x5A
6803 #define V_028808_X_0X5F 0x5F
6804 #define V_028808_X_0X66 0x66
6805 #define V_028808_X_0X77 0x77
6806 #define V_028808_X_0X88 0x88
6807 #define V_028808_X_0X99 0x99
6808 #define V_028808_X_0XA0 0xA0
6809 #define V_028808_X_0XA5 0xA5
6810 #define V_028808_X_0XAA 0xAA
6811 #define V_028808_X_0XAF 0xAF
6812 #define V_028808_X_0XBB 0xBB
6813 #define V_028808_X_0XCC 0xCC
6814 #define V_028808_X_0XDD 0xDD
6815 #define V_028808_X_0XEE 0xEE
6816 #define V_028808_X_0XF0 0xF0
6817 #define V_028808_X_0XF5 0xF5
6818 #define V_028808_X_0XFA 0xFA
6819 #define V_028808_X_0XFF 0xFF
6820 #define R_02880C_DB_SHADER_CONTROL 0x02880C
6821 #define S_02880C_Z_EXPORT_ENABLE(x) (((x) & 0x1) << 0)
6822 #define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1)
6823 #define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE
6824 #define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) & 0x1) << 1)
6825 #define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1)
6826 #define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD
6827 #define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) & 0x1) << 2)
6828 #define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1)
6829 #define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB
6830 #define S_02880C_Z_ORDER(x) (((x) & 0x03) << 4)
6831 #define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x03)
6832 #define C_02880C_Z_ORDER 0xFFFFFFCF
6833 #define V_02880C_LATE_Z 0x00
6834 #define V_02880C_EARLY_Z_THEN_LATE_Z 0x01
6835 #define V_02880C_RE_Z 0x02
6836 #define V_02880C_EARLY_Z_THEN_RE_Z 0x03
6837 #define S_02880C_KILL_ENABLE(x) (((x) & 0x1) << 6)
6838 #define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1)
6839 #define C_02880C_KILL_ENABLE 0xFFFFFFBF
6840 #define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) & 0x1) << 7)
6841 #define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1)
6842 #define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F
6843 #define S_02880C_MASK_EXPORT_ENABLE(x) (((x) & 0x1) << 8)
6844 #define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1)
6845 #define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF
6846 #define S_02880C_EXEC_ON_HIER_FAIL(x) (((x) & 0x1) << 9)
6847 #define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1)
6848 #define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF
6849 #define S_02880C_EXEC_ON_NOOP(x) (((x) & 0x1) << 10)
6850 #define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1)
6851 #define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF
6852 #define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) & 0x1) << 11)
6853 #define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1)
6854 #define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF
6855 #define S_02880C_DEPTH_BEFORE_SHADER(x) (((x) & 0x1) << 12)
6856 #define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1)
6857 #define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF
6859 #define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) & 0x03) << 13)
6860 #define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03)
6861 #define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF
6862 #define V_02880C_EXPORT_ANY_Z 0
6863 #define V_02880C_EXPORT_LESS_THAN_Z 1
6864 #define V_02880C_EXPORT_GREATER_THAN_Z 2
6865 #define V_02880C_EXPORT_RESERVED 3
6868 #define S_02880C_DUAL_QUAD_DISABLE(x) (((x) & 0x1) << 15)
6869 #define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1)
6870 #define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF
6872 #define R_028810_PA_CL_CLIP_CNTL 0x028810
6873 #define S_028810_UCP_ENA_0(x) (((x) & 0x1) << 0)
6874 #define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1)
6875 #define C_028810_UCP_ENA_0 0xFFFFFFFE
6876 #define S_028810_UCP_ENA_1(x) (((x) & 0x1) << 1)
6877 #define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1)
6878 #define C_028810_UCP_ENA_1 0xFFFFFFFD
6879 #define S_028810_UCP_ENA_2(x) (((x) & 0x1) << 2)
6880 #define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1)
6881 #define C_028810_UCP_ENA_2 0xFFFFFFFB
6882 #define S_028810_UCP_ENA_3(x) (((x) & 0x1) << 3)
6883 #define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1)
6884 #define C_028810_UCP_ENA_3 0xFFFFFFF7
6885 #define S_028810_UCP_ENA_4(x) (((x) & 0x1) << 4)
6886 #define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1)
6887 #define C_028810_UCP_ENA_4 0xFFFFFFEF
6888 #define S_028810_UCP_ENA_5(x) (((x) & 0x1) << 5)
6889 #define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1)
6890 #define C_028810_UCP_ENA_5 0xFFFFFFDF
6891 #define S_028810_PS_UCP_Y_SCALE_NEG(x) (((x) & 0x1) << 13)
6892 #define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1)
6893 #define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF
6894 #define S_028810_PS_UCP_MODE(x) (((x) & 0x03) << 14)
6895 #define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x03)
6896 #define C_028810_PS_UCP_MODE 0xFFFF3FFF
6897 #define S_028810_CLIP_DISABLE(x) (((x) & 0x1) << 16)
6898 #define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1)
6899 #define C_028810_CLIP_DISABLE 0xFFFEFFFF
6900 #define S_028810_UCP_CULL_ONLY_ENA(x) (((x) & 0x1) << 17)
6901 #define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1)
6902 #define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF
6903 #define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) & 0x1) << 18)
6904 #define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1)
6905 #define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF
6906 #define S_028810_DX_CLIP_SPACE_DEF(x) (((x) & 0x1) << 19)
6907 #define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1)
6908 #define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF
6909 #define S_028810_DIS_CLIP_ERR_DETECT(x) (((x) & 0x1) << 20)
6910 #define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1)
6911 #define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF
6912 #define S_028810_VTX_KILL_OR(x) (((x) & 0x1) << 21)
6913 #define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1)
6914 #define C_028810_VTX_KILL_OR 0xFFDFFFFF
6915 #define S_028810_DX_RASTERIZATION_KILL(x) (((x) & 0x1) << 22)
6916 #define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1)
6917 #define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF
6918 #define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) & 0x1) << 24)
6919 #define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1)
6920 #define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF
6921 #define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) & 0x1) << 25)
6922 #define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1)
6923 #define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF
6924 #define S_028810_ZCLIP_NEAR_DISABLE(x) (((x) & 0x1) << 26)
6925 #define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1)
6926 #define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF
6927 #define S_028810_ZCLIP_FAR_DISABLE(x) (((x) & 0x1) << 27)
6928 #define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1)
6929 #define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF
6930 #define R_028814_PA_SU_SC_MODE_CNTL 0x028814
6931 #define S_028814_CULL_FRONT(x) (((x) & 0x1) << 0)
6932 #define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1)
6933 #define C_028814_CULL_FRONT 0xFFFFFFFE
6934 #define S_028814_CULL_BACK(x) (((x) & 0x1) << 1)
6935 #define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1)
6936 #define C_028814_CULL_BACK 0xFFFFFFFD
6937 #define S_028814_FACE(x) (((x) & 0x1) << 2)
6938 #define G_028814_FACE(x) (((x) >> 2) & 0x1)
6939 #define C_028814_FACE 0xFFFFFFFB
6940 #define S_028814_POLY_MODE(x) (((x) & 0x03) << 3)
6941 #define G_028814_POLY_MODE(x) (((x) >> 3) & 0x03)
6942 #define C_028814_POLY_MODE 0xFFFFFFE7
6943 #define V_028814_X_DISABLE_POLY_MODE 0x00
6944 #define V_028814_X_DUAL_MODE 0x01
6945 #define S_028814_POLYMODE_FRONT_PTYPE(x) (((x) & 0x07) << 5)
6946 #define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x07)
6947 #define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F
6948 #define V_028814_X_DRAW_POINTS 0x00
6949 #define V_028814_X_DRAW_LINES 0x01
6950 #define V_028814_X_DRAW_TRIANGLES 0x02
6951 #define S_028814_POLYMODE_BACK_PTYPE(x) (((x) & 0x07) << 8)
6952 #define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x07)
6953 #define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF
6954 #define V_028814_X_DRAW_POINTS 0x00
6955 #define V_028814_X_DRAW_LINES 0x01
6956 #define V_028814_X_DRAW_TRIANGLES 0x02
6957 #define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) & 0x1) << 11)
6958 #define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1)
6959 #define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF
6960 #define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) & 0x1) << 12)
6961 #define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1)
6962 #define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF
6963 #define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) & 0x1) << 13)
6964 #define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1)
6965 #define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF
6966 #define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) & 0x1) << 16)
6967 #define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1)
6968 #define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF
6969 #define S_028814_PROVOKING_VTX_LAST(x) (((x) & 0x1) << 19)
6970 #define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1)
6971 #define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF
6972 #define S_028814_PERSP_CORR_DIS(x) (((x) & 0x1) << 20)
6973 #define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1)
6974 #define C_028814_PERSP_CORR_DIS 0xFFEFFFFF
6975 #define S_028814_MULTI_PRIM_IB_ENA(x) (((x) & 0x1) << 21)
6976 #define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1)
6977 #define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF
6978 #define R_028818_PA_CL_VTE_CNTL 0x028818
6979 #define S_028818_VPORT_X_SCALE_ENA(x) (((x) & 0x1) << 0)
6980 #define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1)
6981 #define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE
6982 #define S_028818_VPORT_X_OFFSET_ENA(x) (((x) & 0x1) << 1)
6983 #define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1)
6984 #define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD
6985 #define S_028818_VPORT_Y_SCALE_ENA(x) (((x) & 0x1) << 2)
6986 #define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1)
6987 #define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB
6988 #define S_028818_VPORT_Y_OFFSET_ENA(x) (((x) & 0x1) << 3)
6989 #define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1)
6990 #define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7
6991 #define S_028818_VPORT_Z_SCALE_ENA(x) (((x) & 0x1) << 4)
6992 #define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1)
6993 #define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF
6994 #define S_028818_VPORT_Z_OFFSET_ENA(x) (((x) & 0x1) << 5)
6995 #define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1)
6996 #define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF
6997 #define S_028818_VTX_XY_FMT(x) (((x) & 0x1) << 8)
6998 #define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1)
6999 #define C_028818_VTX_XY_FMT 0xFFFFFEFF
7000 #define S_028818_VTX_Z_FMT(x) (((x) & 0x1) << 9)
7001 #define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1)
7002 #define C_028818_VTX_Z_FMT 0xFFFFFDFF
7003 #define S_028818_VTX_W0_FMT(x) (((x) & 0x1) << 10)
7004 #define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1)
7005 #define C_028818_VTX_W0_FMT 0xFFFFFBFF
7006 #define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C
7007 #define S_02881C_CLIP_DIST_ENA_0(x) (((x) & 0x1) << 0)
7008 #define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1)
7009 #define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE
7010 #define S_02881C_CLIP_DIST_ENA_1(x) (((x) & 0x1) << 1)
7011 #define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1)
7012 #define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD
7013 #define S_02881C_CLIP_DIST_ENA_2(x) (((x) & 0x1) << 2)
7014 #define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1)
7015 #define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB
7016 #define S_02881C_CLIP_DIST_ENA_3(x) (((x) & 0x1) << 3)
7017 #define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1)
7018 #define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7
7019 #define S_02881C_CLIP_DIST_ENA_4(x) (((x) & 0x1) << 4)
7020 #define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1)
7021 #define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF
7022 #define S_02881C_CLIP_DIST_ENA_5(x) (((x) & 0x1) << 5)
7023 #define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1)
7024 #define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF
7025 #define S_02881C_CLIP_DIST_ENA_6(x) (((x) & 0x1) << 6)
7026 #define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1)
7027 #define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF
7028 #define S_02881C_CLIP_DIST_ENA_7(x) (((x) & 0x1) << 7)
7029 #define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1)
7030 #define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F
7031 #define S_02881C_CULL_DIST_ENA_0(x) (((x) & 0x1) << 8)
7032 #define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1)
7033 #define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF
7034 #define S_02881C_CULL_DIST_ENA_1(x) (((x) & 0x1) << 9)
7035 #define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1)
7036 #define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF
7037 #define S_02881C_CULL_DIST_ENA_2(x) (((x) & 0x1) << 10)
7038 #define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1)
7039 #define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF
7040 #define S_02881C_CULL_DIST_ENA_3(x) (((x) & 0x1) << 11)
7041 #define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1)
7042 #define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF
7043 #define S_02881C_CULL_DIST_ENA_4(x) (((x) & 0x1) << 12)
7044 #define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1)
7045 #define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF
7046 #define S_02881C_CULL_DIST_ENA_5(x) (((x) & 0x1) << 13)
7047 #define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1)
7048 #define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF
7049 #define S_02881C_CULL_DIST_ENA_6(x) (((x) & 0x1) << 14)
7050 #define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1)
7051 #define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF
7052 #define S_02881C_CULL_DIST_ENA_7(x) (((x) & 0x1) << 15)
7053 #define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1)
7054 #define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF
7055 #define S_02881C_USE_VTX_POINT_SIZE(x) (((x) & 0x1) << 16)
7056 #define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1)
7057 #define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF
7058 #define S_02881C_USE_VTX_EDGE_FLAG(x) (((x) & 0x1) << 17)
7059 #define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1)
7060 #define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF
7061 #define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) & 0x1) << 18)
7062 #define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1)
7063 #define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF
7064 #define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) & 0x1) << 19)
7065 #define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1)
7066 #define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF
7067 #define S_02881C_USE_VTX_KILL_FLAG(x) (((x) & 0x1) << 20)
7068 #define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1)
7069 #define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF
7070 #define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) & 0x1) << 21)
7071 #define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1)
7072 #define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF
7073 #define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) & 0x1) << 22)
7074 #define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1)
7075 #define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF
7076 #define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) & 0x1) << 23)
7077 #define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1)
7078 #define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF
7079 #define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) & 0x1) << 24)
7080 #define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1)
7081 #define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF
7082 #define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) & 0x1) << 25)
7083 #define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1)
7084 #define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF
7086 #define S_02881C_USE_VTX_LINE_WIDTH(x) (((x) & 0x1) << 26)
7087 #define G_02881C_USE_VTX_LINE_WIDTH(x) (((x) >> 26) & 0x1)
7088 #define C_02881C_USE_VTX_LINE_WIDTH 0xFBFFFFFF
7090 #define R_028820_PA_CL_NANINF_CNTL 0x028820
7091 #define S_028820_VTE_XY_INF_DISCARD(x) (((x) & 0x1) << 0)
7092 #define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1)
7093 #define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE
7094 #define S_028820_VTE_Z_INF_DISCARD(x) (((x) & 0x1) << 1)
7095 #define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1)
7096 #define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD
7097 #define S_028820_VTE_W_INF_DISCARD(x) (((x) & 0x1) << 2)
7098 #define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1)
7099 #define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB
7100 #define S_028820_VTE_0XNANINF_IS_0(x) (((x) & 0x1) << 3)
7101 #define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1)
7102 #define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7
7103 #define S_028820_VTE_XY_NAN_RETAIN(x) (((x) & 0x1) << 4)
7104 #define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1)
7105 #define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF
7106 #define S_028820_VTE_Z_NAN_RETAIN(x) (((x) & 0x1) << 5)
7107 #define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1)
7108 #define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF
7109 #define S_028820_VTE_W_NAN_RETAIN(x) (((x) & 0x1) << 6)
7110 #define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1)
7111 #define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF
7112 #define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) & 0x1) << 7)
7113 #define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1)
7114 #define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F
7115 #define S_028820_VS_XY_NAN_TO_INF(x) (((x) & 0x1) << 8)
7116 #define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1)
7117 #define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF
7118 #define S_028820_VS_XY_INF_RETAIN(x) (((x) & 0x1) << 9)
7119 #define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1)
7120 #define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF
7121 #define S_028820_VS_Z_NAN_TO_INF(x) (((x) & 0x1) << 10)
7122 #define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1)
7123 #define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF
7124 #define S_028820_VS_Z_INF_RETAIN(x) (((x) & 0x1) << 11)
7125 #define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1)
7126 #define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF
7127 #define S_028820_VS_W_NAN_TO_INF(x) (((x) & 0x1) << 12)
7128 #define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1)
7129 #define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF
7130 #define S_028820_VS_W_INF_RETAIN(x) (((x) & 0x1) << 13)
7131 #define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1)
7132 #define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF
7133 #define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) & 0x1) << 14)
7134 #define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1)
7135 #define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF
7136 #define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) & 0x1) << 20)
7137 #define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1)
7138 #define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF
7139 #define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824
7140 #define S_028824_LINE_STIPPLE_RESET(x) (((x) & 0x03) << 0)
7141 #define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x03)
7142 #define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC
7143 #define S_028824_EXPAND_FULL_LENGTH(x) (((x) & 0x1) << 2)
7144 #define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1)
7145 #define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB
7146 #define S_028824_FRACTIONAL_ACCUM(x) (((x) & 0x1) << 3)
7147 #define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1)
7148 #define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7
7149 #define S_028824_DIAMOND_ADJUST(x) (((x) & 0x1) << 4)
7150 #define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1)
7151 #define C_028824_DIAMOND_ADJUST 0xFFFFFFEF
7152 #define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828
7153 #define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C
7154 #define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 0)
7155 #define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1)
7156 #define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE
7157 #define S_02882C_LINE_FILTER_DISABLE(x) (((x) & 0x1) << 1)
7158 #define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1)
7159 #define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD
7160 #define S_02882C_POINT_FILTER_DISABLE(x) (((x) & 0x1) << 2)
7161 #define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1)
7162 #define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB
7163 #define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 3)
7164 #define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1)
7165 #define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7
7166 #define S_02882C_TRIANGLE_EXPAND_ENA(x) (((x) & 0x1) << 4)
7167 #define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1)
7168 #define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF
7169 #define S_02882C_LINE_EXPAND_ENA(x) (((x) & 0x1) << 5)
7170 #define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1)
7171 #define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF
7172 #define S_02882C_POINT_EXPAND_ENA(x) (((x) & 0x1) << 6)
7173 #define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1)
7174 #define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF
7175 #define S_02882C_RECTANGLE_EXPAND_ENA(x) (((x) & 0x1) << 7)
7176 #define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1)
7177 #define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F
7178 #define S_02882C_PRIM_EXPAND_CONSTANT(x) (((x) & 0xFF) << 8)
7179 #define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF)
7180 #define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF
7182 #define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) & 0x1) << 30)
7183 #define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1)
7184 #define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF
7185 #define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) & 0x1) << 31)
7186 #define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1)
7187 #define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF
7189 #define R_028A00_PA_SU_POINT_SIZE 0x028A00
7190 #define S_028A00_HEIGHT(x) (((x) & 0xFFFF) << 0)
7191 #define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF)
7192 #define C_028A00_HEIGHT 0xFFFF0000
7193 #define S_028A00_WIDTH(x) (((x) & 0xFFFF) << 16)
7194 #define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF)
7195 #define C_028A00_WIDTH 0x0000FFFF
7196 #define R_028A04_PA_SU_POINT_MINMAX 0x028A04
7197 #define S_028A04_MIN_SIZE(x) (((x) & 0xFFFF) << 0)
7198 #define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF)
7199 #define C_028A04_MIN_SIZE 0xFFFF0000
7200 #define S_028A04_MAX_SIZE(x) (((x) & 0xFFFF) << 16)
7201 #define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF)
7202 #define C_028A04_MAX_SIZE 0x0000FFFF
7203 #define R_028A08_PA_SU_LINE_CNTL 0x028A08
7204 #define S_028A08_WIDTH(x) (((x) & 0xFFFF) << 0)
7205 #define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF)
7206 #define C_028A08_WIDTH 0xFFFF0000
7207 #define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C
7208 #define S_028A0C_LINE_PATTERN(x) (((x) & 0xFFFF) << 0)
7209 #define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF)
7210 #define C_028A0C_LINE_PATTERN 0xFFFF0000
7211 #define S_028A0C_REPEAT_COUNT(x) (((x) & 0xFF) << 16)
7212 #define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF)
7213 #define C_028A0C_REPEAT_COUNT 0xFF00FFFF
7214 #define S_028A0C_PATTERN_BIT_ORDER(x) (((x) & 0x1) << 28)
7215 #define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1)
7216 #define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF
7217 #define S_028A0C_AUTO_RESET_CNTL(x) (((x) & 0x03) << 29)
7218 #define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x03)
7219 #define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF
7220 #define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10
7221 #define S_028A10_PATH_SELECT(x) (((x) & 0x07) << 0)
7222 #define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x07)
7223 #define C_028A10_PATH_SELECT 0xFFFFFFF8
7224 #define V_028A10_VGT_OUTPATH_VTX_REUSE 0x00
7225 #define V_028A10_VGT_OUTPATH_TESS_EN 0x01
7226 #define V_028A10_VGT_OUTPATH_PASSTHRU 0x02
7227 #define V_028A10_VGT_OUTPATH_GS_BLOCK 0x03
7228 #define V_028A10_VGT_OUTPATH_HS_BLOCK 0x04
7229 #define R_028A14_VGT_HOS_CNTL 0x028A14
7230 #define S_028A14_TESS_MODE(x) (((x) & 0x03) << 0)
7231 #define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x03)
7232 #define C_028A14_TESS_MODE 0xFFFFFFFC
7233 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18
7234 #define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C
7235 #define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20
7236 #define S_028A20_REUSE_DEPTH(x) (((x) & 0xFF) << 0)
7237 #define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF)
7238 #define C_028A20_REUSE_DEPTH 0xFFFFFF00
7239 #define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24
7240 #define S_028A24_PRIM_TYPE(x) (((x) & 0x1F) << 0)
7241 #define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F)
7242 #define C_028A24_PRIM_TYPE 0xFFFFFFE0
7243 #define V_028A24_VGT_GRP_3D_POINT 0x00
7244 #define V_028A24_VGT_GRP_3D_LINE 0x01
7245 #define V_028A24_VGT_GRP_3D_TRI 0x02
7246 #define V_028A24_VGT_GRP_3D_RECT 0x03
7247 #define V_028A24_VGT_GRP_3D_QUAD 0x04
7248 #define V_028A24_VGT_GRP_2D_COPY_RECT_V0 0x05
7249 #define V_028A24_VGT_GRP_2D_COPY_RECT_V1 0x06
7250 #define V_028A24_VGT_GRP_2D_COPY_RECT_V2 0x07
7251 #define V_028A24_VGT_GRP_2D_COPY_RECT_V3 0x08
7252 #define V_028A24_VGT_GRP_2D_FILL_RECT 0x09
7253 #define V_028A24_VGT_GRP_2D_LINE 0x0A
7254 #define V_028A24_VGT_GRP_2D_TRI 0x0B
7255 #define V_028A24_VGT_GRP_PRIM_INDEX_LINE 0x0C
7256 #define V_028A24_VGT_GRP_PRIM_INDEX_TRI 0x0D
7257 #define V_028A24_VGT_GRP_PRIM_INDEX_QUAD 0x0E
7258 #define V_028A24_VGT_GRP_3D_LINE_ADJ 0x0F
7259 #define V_028A24_VGT_GRP_3D_TRI_ADJ 0x10
7260 #define V_028A24_VGT_GRP_3D_PATCH 0x11
7261 #define S_028A24_RETAIN_ORDER(x) (((x) & 0x1) << 14)
7262 #define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1)
7263 #define C_028A24_RETAIN_ORDER 0xFFFFBFFF
7264 #define S_028A24_RETAIN_QUADS(x) (((x) & 0x1) << 15)
7265 #define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1)
7266 #define C_028A24_RETAIN_QUADS 0xFFFF7FFF
7267 #define S_028A24_PRIM_ORDER(x) (((x) & 0x07) << 16)
7268 #define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x07)
7269 #define C_028A24_PRIM_ORDER 0xFFF8FFFF
7270 #define V_028A24_VGT_GRP_LIST 0x00
7271 #define V_028A24_VGT_GRP_STRIP 0x01
7272 #define V_028A24_VGT_GRP_FAN 0x02
7273 #define V_028A24_VGT_GRP_LOOP 0x03
7274 #define V_028A24_VGT_GRP_POLYGON 0x04
7275 #define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28
7276 #define S_028A28_FIRST_DECR(x) (((x) & 0x0F) << 0)
7277 #define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0x0F)
7278 #define C_028A28_FIRST_DECR 0xFFFFFFF0
7279 #define R_028A2C_VGT_GROUP_DECR 0x028A2C
7280 #define S_028A2C_DECR(x) (((x) & 0x0F) << 0)
7281 #define G_028A2C_DECR(x) (((x) >> 0) & 0x0F)
7282 #define C_028A2C_DECR 0xFFFFFFF0
7283 #define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30
7284 #define S_028A30_COMP_X_EN(x) (((x) & 0x1) << 0)
7285 #define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1)
7286 #define C_028A30_COMP_X_EN 0xFFFFFFFE
7287 #define S_028A30_COMP_Y_EN(x) (((x) & 0x1) << 1)
7288 #define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1)
7289 #define C_028A30_COMP_Y_EN 0xFFFFFFFD
7290 #define S_028A30_COMP_Z_EN(x) (((x) & 0x1) << 2)
7291 #define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1)
7292 #define C_028A30_COMP_Z_EN 0xFFFFFFFB
7293 #define S_028A30_COMP_W_EN(x) (((x) & 0x1) << 3)
7294 #define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1)
7295 #define C_028A30_COMP_W_EN 0xFFFFFFF7
7296 #define S_028A30_STRIDE(x) (((x) & 0xFF) << 8)
7297 #define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF)
7298 #define C_028A30_STRIDE 0xFFFF00FF
7299 #define S_028A30_SHIFT(x) (((x) & 0xFF) << 16)
7300 #define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF)
7301 #define C_028A30_SHIFT 0xFF00FFFF
7302 #define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34
7303 #define S_028A34_COMP_X_EN(x) (((x) & 0x1) << 0)
7304 #define G_028A34_COMP_X_EN(x) (((x) >> 0) & 0x1)
7305 #define C_028A34_COMP_X_EN 0xFFFFFFFE
7306 #define S_028A34_COMP_Y_EN(x) (((x) & 0x1) << 1)
7307 #define G_028A34_COMP_Y_EN(x) (((x) >> 1) & 0x1)
7308 #define C_028A34_COMP_Y_EN 0xFFFFFFFD
7309 #define S_028A34_COMP_Z_EN(x) (((x) & 0x1) << 2)
7310 #define G_028A34_COMP_Z_EN(x) (((x) >> 2) & 0x1)
7311 #define C_028A34_COMP_Z_EN 0xFFFFFFFB
7312 #define S_028A34_COMP_W_EN(x) (((x) & 0x1) << 3)
7313 #define G_028A34_COMP_W_EN(x) (((x) >> 3) & 0x1)
7314 #define C_028A34_COMP_W_EN 0xFFFFFFF7
7315 #define S_028A34_STRIDE(x) (((x) & 0xFF) << 8)
7316 #define G_028A34_STRIDE(x) (((x) >> 8) & 0xFF)
7317 #define C_028A34_STRIDE 0xFFFF00FF
7318 #define S_028A34_SHIFT(x) (((x) & 0xFF) << 16)
7319 #define G_028A34_SHIFT(x) (((x) >> 16) & 0xFF)
7320 #define C_028A34_SHIFT 0xFF00FFFF
7321 #define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38
7322 #define S_028A38_X_CONV(x) (((x) & 0x0F) << 0)
7323 #define G_028A38_X_CONV(x) (((x) >> 0) & 0x0F)
7324 #define C_028A38_X_CONV 0xFFFFFFF0
7325 #define V_028A38_VGT_GRP_INDEX_16 0x00
7326 #define V_028A38_VGT_GRP_INDEX_32 0x01
7327 #define V_028A38_VGT_GRP_UINT_16 0x02
7328 #define V_028A38_VGT_GRP_UINT_32 0x03
7329 #define V_028A38_VGT_GRP_SINT_16 0x04
7330 #define V_028A38_VGT_GRP_SINT_32 0x05
7331 #define V_028A38_VGT_GRP_FLOAT_32 0x06
7332 #define V_028A38_VGT_GRP_AUTO_PRIM 0x07
7333 #define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7334 #define S_028A38_X_OFFSET(x) (((x) & 0x0F) << 4)
7335 #define G_028A38_X_OFFSET(x) (((x) >> 4) & 0x0F)
7336 #define C_028A38_X_OFFSET 0xFFFFFF0F
7337 #define S_028A38_Y_CONV(x) (((x) & 0x0F) << 8)
7338 #define G_028A38_Y_CONV(x) (((x) >> 8) & 0x0F)
7339 #define C_028A38_Y_CONV 0xFFFFF0FF
7340 #define V_028A38_VGT_GRP_INDEX_16 0x00
7341 #define V_028A38_VGT_GRP_INDEX_32 0x01
7342 #define V_028A38_VGT_GRP_UINT_16 0x02
7343 #define V_028A38_VGT_GRP_UINT_32 0x03
7344 #define V_028A38_VGT_GRP_SINT_16 0x04
7345 #define V_028A38_VGT_GRP_SINT_32 0x05
7346 #define V_028A38_VGT_GRP_FLOAT_32 0x06
7347 #define V_028A38_VGT_GRP_AUTO_PRIM 0x07
7348 #define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7349 #define S_028A38_Y_OFFSET(x) (((x) & 0x0F) << 12)
7350 #define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0x0F)
7351 #define C_028A38_Y_OFFSET 0xFFFF0FFF
7352 #define S_028A38_Z_CONV(x) (((x) & 0x0F) << 16)
7353 #define G_028A38_Z_CONV(x) (((x) >> 16) & 0x0F)
7354 #define C_028A38_Z_CONV 0xFFF0FFFF
7355 #define V_028A38_VGT_GRP_INDEX_16 0x00
7356 #define V_028A38_VGT_GRP_INDEX_32 0x01
7357 #define V_028A38_VGT_GRP_UINT_16 0x02
7358 #define V_028A38_VGT_GRP_UINT_32 0x03
7359 #define V_028A38_VGT_GRP_SINT_16 0x04
7360 #define V_028A38_VGT_GRP_SINT_32 0x05
7361 #define V_028A38_VGT_GRP_FLOAT_32 0x06
7362 #define V_028A38_VGT_GRP_AUTO_PRIM 0x07
7363 #define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7364 #define S_028A38_Z_OFFSET(x) (((x) & 0x0F) << 20)
7365 #define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0x0F)
7366 #define C_028A38_Z_OFFSET 0xFF0FFFFF
7367 #define S_028A38_W_CONV(x) (((x) & 0x0F) << 24)
7368 #define G_028A38_W_CONV(x) (((x) >> 24) & 0x0F)
7369 #define C_028A38_W_CONV 0xF0FFFFFF
7370 #define V_028A38_VGT_GRP_INDEX_16 0x00
7371 #define V_028A38_VGT_GRP_INDEX_32 0x01
7372 #define V_028A38_VGT_GRP_UINT_16 0x02
7373 #define V_028A38_VGT_GRP_UINT_32 0x03
7374 #define V_028A38_VGT_GRP_SINT_16 0x04
7375 #define V_028A38_VGT_GRP_SINT_32 0x05
7376 #define V_028A38_VGT_GRP_FLOAT_32 0x06
7377 #define V_028A38_VGT_GRP_AUTO_PRIM 0x07
7378 #define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7379 #define S_028A38_W_OFFSET(x) (((x) & 0x0F) << 28)
7380 #define G_028A38_W_OFFSET(x) (((x) >> 28) & 0x0F)
7381 #define C_028A38_W_OFFSET 0x0FFFFFFF
7382 #define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C
7383 #define S_028A3C_X_CONV(x) (((x) & 0x0F) << 0)
7384 #define G_028A3C_X_CONV(x) (((x) >> 0) & 0x0F)
7385 #define C_028A3C_X_CONV 0xFFFFFFF0
7386 #define V_028A3C_VGT_GRP_INDEX_16 0x00
7387 #define V_028A3C_VGT_GRP_INDEX_32 0x01
7388 #define V_028A3C_VGT_GRP_UINT_16 0x02
7389 #define V_028A3C_VGT_GRP_UINT_32 0x03
7390 #define V_028A3C_VGT_GRP_SINT_16 0x04
7391 #define V_028A3C_VGT_GRP_SINT_32 0x05
7392 #define V_028A3C_VGT_GRP_FLOAT_32 0x06
7393 #define V_028A3C_VGT_GRP_AUTO_PRIM 0x07
7394 #define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7395 #define S_028A3C_X_OFFSET(x) (((x) & 0x0F) << 4)
7396 #define G_028A3C_X_OFFSET(x) (((x) >> 4) & 0x0F)
7397 #define C_028A3C_X_OFFSET 0xFFFFFF0F
7398 #define S_028A3C_Y_CONV(x) (((x) & 0x0F) << 8)
7399 #define G_028A3C_Y_CONV(x) (((x) >> 8) & 0x0F)
7400 #define C_028A3C_Y_CONV 0xFFFFF0FF
7401 #define V_028A3C_VGT_GRP_INDEX_16 0x00
7402 #define V_028A3C_VGT_GRP_INDEX_32 0x01
7403 #define V_028A3C_VGT_GRP_UINT_16 0x02
7404 #define V_028A3C_VGT_GRP_UINT_32 0x03
7405 #define V_028A3C_VGT_GRP_SINT_16 0x04
7406 #define V_028A3C_VGT_GRP_SINT_32 0x05
7407 #define V_028A3C_VGT_GRP_FLOAT_32 0x06
7408 #define V_028A3C_VGT_GRP_AUTO_PRIM 0x07
7409 #define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7410 #define S_028A3C_Y_OFFSET(x) (((x) & 0x0F) << 12)
7411 #define G_028A3C_Y_OFFSET(x) (((x) >> 12) & 0x0F)
7412 #define C_028A3C_Y_OFFSET 0xFFFF0FFF
7413 #define S_028A3C_Z_CONV(x) (((x) & 0x0F) << 16)
7414 #define G_028A3C_Z_CONV(x) (((x) >> 16) & 0x0F)
7415 #define C_028A3C_Z_CONV 0xFFF0FFFF
7416 #define V_028A3C_VGT_GRP_INDEX_16 0x00
7417 #define V_028A3C_VGT_GRP_INDEX_32 0x01
7418 #define V_028A3C_VGT_GRP_UINT_16 0x02
7419 #define V_028A3C_VGT_GRP_UINT_32 0x03
7420 #define V_028A3C_VGT_GRP_SINT_16 0x04
7421 #define V_028A3C_VGT_GRP_SINT_32 0x05
7422 #define V_028A3C_VGT_GRP_FLOAT_32 0x06
7423 #define V_028A3C_VGT_GRP_AUTO_PRIM 0x07
7424 #define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7425 #define S_028A3C_Z_OFFSET(x) (((x) & 0x0F) << 20)
7426 #define G_028A3C_Z_OFFSET(x) (((x) >> 20) & 0x0F)
7427 #define C_028A3C_Z_OFFSET 0xFF0FFFFF
7428 #define S_028A3C_W_CONV(x) (((x) & 0x0F) << 24)
7429 #define G_028A3C_W_CONV(x) (((x) >> 24) & 0x0F)
7430 #define C_028A3C_W_CONV 0xF0FFFFFF
7431 #define V_028A3C_VGT_GRP_INDEX_16 0x00
7432 #define V_028A3C_VGT_GRP_INDEX_32 0x01
7433 #define V_028A3C_VGT_GRP_UINT_16 0x02
7434 #define V_028A3C_VGT_GRP_UINT_32 0x03
7435 #define V_028A3C_VGT_GRP_SINT_16 0x04
7436 #define V_028A3C_VGT_GRP_SINT_32 0x05
7437 #define V_028A3C_VGT_GRP_FLOAT_32 0x06
7438 #define V_028A3C_VGT_GRP_AUTO_PRIM 0x07
7439 #define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08
7440 #define S_028A3C_W_OFFSET(x) (((x) & 0x0F) << 28)
7441 #define G_028A3C_W_OFFSET(x) (((x) >> 28) & 0x0F)
7442 #define C_028A3C_W_OFFSET 0x0FFFFFFF
7443 #define R_028A40_VGT_GS_MODE 0x028A40
7444 #define S_028A40_MODE(x) (((x) & 0x07) << 0)
7445 #define G_028A40_MODE(x) (((x) >> 0) & 0x07)
7446 #define C_028A40_MODE 0xFFFFFFF8
7447 #define V_028A40_GS_OFF 0x00
7448 #define V_028A40_GS_SCENARIO_A 0x01
7449 #define V_028A40_GS_SCENARIO_B 0x02
7450 #define V_028A40_GS_SCENARIO_G 0x03
7451 #define V_028A40_GS_SCENARIO_C 0x04
7452 #define V_028A40_SPRITE_EN 0x05
7453 #define S_028A40_RESERVED_0(x) (((x) & 0x1) << 3)
7454 #define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1)
7455 #define C_028A40_RESERVED_0 0xFFFFFFF7
7456 #define S_028A40_CUT_MODE(x) (((x) & 0x03) << 4)
7457 #define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x03)
7458 #define C_028A40_CUT_MODE 0xFFFFFFCF
7459 #define V_028A40_GS_CUT_1024 0x00
7460 #define V_028A40_GS_CUT_512 0x01
7461 #define V_028A40_GS_CUT_256 0x02
7462 #define V_028A40_GS_CUT_128 0x03
7463 #define S_028A40_RESERVED_1(x) (((x) & 0x1F) << 6)
7464 #define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F)
7465 #define C_028A40_RESERVED_1 0xFFFFF83F
7466 #define S_028A40_GS_C_PACK_EN(x) (((x) & 0x1) << 11)
7467 #define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1)
7468 #define C_028A40_GS_C_PACK_EN 0xFFFFF7FF
7469 #define S_028A40_RESERVED_2(x) (((x) & 0x1) << 12)
7470 #define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1)
7471 #define C_028A40_RESERVED_2 0xFFFFEFFF
7472 #define S_028A40_ES_PASSTHRU(x) (((x) & 0x1) << 13)
7473 #define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1)
7474 #define C_028A40_ES_PASSTHRU 0xFFFFDFFF
7476 #define S_028A40_COMPUTE_MODE(x) (((x) & 0x1) << 14)
7477 #define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1)
7478 #define C_028A40_COMPUTE_MODE 0xFFFFBFFF
7479 #define S_028A40_FAST_COMPUTE_MODE(x) (((x) & 0x1) << 15)
7480 #define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1)
7481 #define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF
7482 #define S_028A40_ELEMENT_INFO_EN(x) (((x) & 0x1) << 16)
7483 #define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1)
7484 #define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF
7486 #define S_028A40_PARTIAL_THD_AT_EOI(x) (((x) & 0x1) << 17)
7487 #define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1)
7488 #define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF
7489 #define S_028A40_SUPPRESS_CUTS(x) (((x) & 0x1) << 18)
7490 #define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1)
7491 #define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF
7492 #define S_028A40_ES_WRITE_OPTIMIZE(x) (((x) & 0x1) << 19)
7493 #define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1)
7494 #define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF
7495 #define S_028A40_GS_WRITE_OPTIMIZE(x) (((x) & 0x1) << 20)
7496 #define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1)
7497 #define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF
7499 #define S_028A40_ONCHIP(x) (((x) & 0x03) << 21)
7500 #define G_028A40_ONCHIP(x) (((x) >> 21) & 0x03)
7501 #define C_028A40_ONCHIP 0xFF9FFFFF
7502 #define V_028A40_X_0_OFFCHIP_GS 0x00
7503 #define V_028A40_X_3_ES_AND_GS_ARE_ONCHIP 0x03
7504 #define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44
7505 #define S_028A44_ES_VERTS_PER_SUBGRP(x) (((x) & 0x7FF) << 0)
7506 #define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF)
7507 #define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800
7508 #define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) & 0x7FF) << 11)
7509 #define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF)
7510 #define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF
7512 #define R_028A48_PA_SC_MODE_CNTL_0 0x028A48
7513 #define S_028A48_MSAA_ENABLE(x) (((x) & 0x1) << 0)
7514 #define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1)
7515 #define C_028A48_MSAA_ENABLE 0xFFFFFFFE
7516 #define S_028A48_VPORT_SCISSOR_ENABLE(x) (((x) & 0x1) << 1)
7517 #define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1)
7518 #define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD
7519 #define S_028A48_LINE_STIPPLE_ENABLE(x) (((x) & 0x1) << 2)
7520 #define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1)
7521 #define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB
7522 #define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) & 0x1) << 3)
7523 #define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1)
7524 #define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7
7525 #define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C
7526 #define S_028A4C_WALK_SIZE(x) (((x) & 0x1) << 0)
7527 #define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1)
7528 #define C_028A4C_WALK_SIZE 0xFFFFFFFE
7529 #define S_028A4C_WALK_ALIGNMENT(x) (((x) & 0x1) << 1)
7530 #define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1)
7531 #define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD
7532 #define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) & 0x1) << 2)
7533 #define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1)
7534 #define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB
7535 #define S_028A4C_WALK_FENCE_ENABLE(x) (((x) & 0x1) << 3)
7536 #define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1)
7537 #define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7
7538 #define S_028A4C_WALK_FENCE_SIZE(x) (((x) & 0x07) << 4)
7539 #define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x07)
7540 #define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F
7541 #define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) & 0x1) << 7)
7542 #define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1)
7543 #define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F
7544 #define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) & 0x1) << 8)
7545 #define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1)
7546 #define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF
7547 #define S_028A4C_TILE_COVER_DISABLE(x) (((x) & 0x1) << 9)
7548 #define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1)
7549 #define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF
7550 #define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) & 0x1) << 10)
7551 #define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1)
7552 #define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF
7553 #define S_028A4C_ZMM_LINE_EXTENT(x) (((x) & 0x1) << 11)
7554 #define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1)
7555 #define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF
7556 #define S_028A4C_ZMM_LINE_OFFSET(x) (((x) & 0x1) << 12)
7557 #define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1)
7558 #define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF
7559 #define S_028A4C_ZMM_RECT_EXTENT(x) (((x) & 0x1) << 13)
7560 #define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1)
7561 #define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF
7562 #define S_028A4C_KILL_PIX_POST_HI_Z(x) (((x) & 0x1) << 14)
7563 #define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1)
7564 #define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF
7565 #define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) & 0x1) << 15)
7566 #define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1)
7567 #define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF
7568 #define S_028A4C_PS_ITER_SAMPLE(x) (((x) & 0x1) << 16)
7569 #define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1)
7570 #define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF
7571 #define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) & 0x1) << 17)
7572 #define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1)
7573 #define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF
7574 #define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) & 0x1) << 18)
7575 #define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1)
7576 #define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF
7577 #define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) & 0x1) << 19)
7578 #define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1)
7579 #define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF
7580 #define S_028A4C_GPU_ID_OVERRIDE(x) (((x) & 0x0F) << 20)
7581 #define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0x0F)
7582 #define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF
7583 #define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) & 0x1) << 24)
7584 #define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1)
7585 #define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF
7586 #define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) & 0x1) << 25)
7587 #define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1)
7588 #define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF
7589 #define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) & 0x1) << 26)
7590 #define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1)
7591 #define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF
7592 #define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) & 0x1) << 27)
7593 #define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1)
7594 #define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF
7595 #define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) & 0x07) << 28)
7596 #define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x07)
7597 #define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF
7598 #define R_028A50_VGT_ENHANCE 0x028A50
7599 #define R_028A54_VGT_GS_PER_ES 0x028A54
7600 #define S_028A54_GS_PER_ES(x) (((x) & 0x7FF) << 0)
7601 #define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF)
7602 #define C_028A54_GS_PER_ES 0xFFFFF800
7603 #define R_028A58_VGT_ES_PER_GS 0x028A58
7604 #define S_028A58_ES_PER_GS(x) (((x) & 0x7FF) << 0)
7605 #define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF)
7606 #define C_028A58_ES_PER_GS 0xFFFFF800
7607 #define R_028A5C_VGT_GS_PER_VS 0x028A5C
7608 #define S_028A5C_GS_PER_VS(x) (((x) & 0x0F) << 0)
7609 #define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0x0F)
7610 #define C_028A5C_GS_PER_VS 0xFFFFFFF0
7611 #define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60
7612 #define S_028A60_OFFSET(x) (((x) & 0x7FFF) << 0)
7613 #define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF)
7614 #define C_028A60_OFFSET 0xFFFF8000
7615 #define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64
7616 #define S_028A64_OFFSET(x) (((x) & 0x7FFF) << 0)
7617 #define G_028A64_OFFSET(x) (((x) >> 0) & 0x7FFF)
7618 #define C_028A64_OFFSET 0xFFFF8000
7619 #define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68
7620 #define S_028A68_OFFSET(x) (((x) & 0x7FFF) << 0)
7621 #define G_028A68_OFFSET(x) (((x) >> 0) & 0x7FFF)
7622 #define C_028A68_OFFSET 0xFFFF8000
7623 #define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C
7624 #define S_028A6C_OUTPRIM_TYPE(x) (((x) & 0x3F) << 0)
7625 #define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F)
7626 #define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0
7627 #define V_028A6C_OUTPRIM_TYPE_POINTLIST 0
7628 #define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1
7629 #define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2
7630 #define S_028A6C_OUTPRIM_TYPE_1(x) (((x) & 0x3F) << 8)
7631 #define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F)
7632 #define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF
7633 #define S_028A6C_OUTPRIM_TYPE_2(x) (((x) & 0x3F) << 16)
7634 #define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F)
7635 #define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF
7636 #define S_028A6C_OUTPRIM_TYPE_3(x) (((x) & 0x3F) << 22)
7637 #define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F)
7638 #define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF
7639 #define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) & 0x1) << 31)
7640 #define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1)
7641 #define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF
7642 #define R_028A70_IA_ENHANCE 0x028A70
7643 #define R_028A74_VGT_DMA_SIZE 0x028A74
7644 #define R_028A78_VGT_DMA_MAX_SIZE 0x028A78
7645 #define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C
7646 #define S_028A7C_INDEX_TYPE(x) (((x) & 0x03) << 0)
7647 #define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x03)
7648 #define C_028A7C_INDEX_TYPE 0xFFFFFFFC
7649 #define V_028A7C_VGT_INDEX_16 0x00
7650 #define V_028A7C_VGT_INDEX_32 0x01
7651 #define V_028A7C_VGT_INDEX_8 0x02 /* VI */
7652 #define S_028A7C_SWAP_MODE(x) (((x) & 0x03) << 2)
7653 #define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x03)
7654 #define C_028A7C_SWAP_MODE 0xFFFFFFF3
7655 #define V_028A7C_VGT_DMA_SWAP_NONE 0x00
7656 #define V_028A7C_VGT_DMA_SWAP_16_BIT 0x01
7657 #define V_028A7C_VGT_DMA_SWAP_32_BIT 0x02
7658 #define V_028A7C_VGT_DMA_SWAP_WORD 0x03
7660 #define S_028A7C_BUF_TYPE(x) (((x) & 0x03) << 4)
7661 #define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x03)
7662 #define C_028A7C_BUF_TYPE 0xFFFFFFCF
7663 #define V_028A7C_VGT_DMA_BUF_MEM 0x00
7664 #define V_028A7C_VGT_DMA_BUF_RING 0x01
7665 #define V_028A7C_VGT_DMA_BUF_SETUP 0x02
7666 #define S_028A7C_RDREQ_POLICY(x) (((x) & 0x03) << 6)
7667 #define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x03)
7668 #define C_028A7C_RDREQ_POLICY 0xFFFFFF3F
7669 #define V_028A7C_VGT_POLICY_LRU 0x00
7670 #define V_028A7C_VGT_POLICY_STREAM 0x01
7671 #define S_028A7C_RDREQ_POLICY_VI(x) (((x) & 0x1) << 6)
7672 #define G_028A7C_RDREQ_POLICY_VI(x) (((x) >> 6) & 0x1)
7673 #define C_028A7C_RDREQ_POLICY_VI 0xFFFFFFBF
7674 #define S_028A7C_ATC(x) (((x) & 0x1) << 8)
7675 #define G_028A7C_ATC(x) (((x) >> 8) & 0x1)
7676 #define C_028A7C_ATC 0xFFFFFEFF
7677 #define S_028A7C_NOT_EOP(x) (((x) & 0x1) << 9)
7678 #define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1)
7679 #define C_028A7C_NOT_EOP 0xFFFFFDFF
7680 #define S_028A7C_REQ_PATH(x) (((x) & 0x1) << 10)
7681 #define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1)
7682 #define C_028A7C_REQ_PATH 0xFFFFFBFF
7685 #define S_028A7C_MTYPE(x) (((x) & 0x03) << 11)
7686 #define G_028A7C_MTYPE(x) (((x) >> 11) & 0x03)
7687 #define C_028A7C_MTYPE 0xFFFFE7FF
7689 #define R_028A80_WD_ENHANCE 0x028A80
7690 #define R_028A84_VGT_PRIMITIVEID_EN 0x028A84
7691 #define S_028A84_PRIMITIVEID_EN(x) (((x) & 0x1) << 0)
7692 #define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1)
7693 #define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE
7694 #define S_028A84_DISABLE_RESET_ON_EOI(x) (((x) & 0x1) << 1) /* not on CIK */
7695 #define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) /* not on CIK */
7696 #define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD /* not on CIK */
7697 #define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88
7698 #define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C
7699 #define R_028A90_VGT_EVENT_INITIATOR 0x028A90
7700 #define S_028A90_EVENT_TYPE(x) (((x) & 0x3F) << 0)
7701 #define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F)
7702 #define C_028A90_EVENT_TYPE 0xFFFFFFC0
7703 #define V_028A90_SAMPLE_STREAMOUTSTATS1 0x01
7704 #define V_028A90_SAMPLE_STREAMOUTSTATS2 0x02
7705 #define V_028A90_SAMPLE_STREAMOUTSTATS3 0x03
7706 #define V_028A90_CACHE_FLUSH_TS 0x04
7707 #define V_028A90_CONTEXT_DONE 0x05
7708 #define V_028A90_CACHE_FLUSH 0x06
7709 #define V_028A90_CS_PARTIAL_FLUSH 0x07
7710 #define V_028A90_VGT_STREAMOUT_SYNC 0x08
7711 #define V_028A90_VGT_STREAMOUT_RESET 0x0A
7712 #define V_028A90_END_OF_PIPE_INCR_DE 0x0B
7713 #define V_028A90_END_OF_PIPE_IB_END 0x0C
7714 #define V_028A90_RST_PIX_CNT 0x0D
7715 #define V_028A90_VS_PARTIAL_FLUSH 0x0F
7716 #define V_028A90_PS_PARTIAL_FLUSH 0x10
7717 #define V_028A90_FLUSH_HS_OUTPUT 0x11
7718 #define V_028A90_FLUSH_LS_OUTPUT 0x12
7719 #define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
7720 #define V_028A90_ZPASS_DONE 0x15 /* not on CIK */
7721 #define V_028A90_CACHE_FLUSH_AND_INV_EVENT 0x16
7722 #define V_028A90_PERFCOUNTER_START 0x17
7723 #define V_028A90_PERFCOUNTER_STOP 0x18
7724 #define V_028A90_PIPELINESTAT_START 0x19
7725 #define V_028A90_PIPELINESTAT_STOP 0x1A
7726 #define V_028A90_PERFCOUNTER_SAMPLE 0x1B
7727 #define V_028A90_FLUSH_ES_OUTPUT 0x1C
7728 #define V_028A90_FLUSH_GS_OUTPUT 0x1D
7729 #define V_028A90_SAMPLE_PIPELINESTAT 0x1E
7730 #define V_028A90_SO_VGTSTREAMOUT_FLUSH 0x1F
7731 #define V_028A90_SAMPLE_STREAMOUTSTATS 0x20
7732 #define V_028A90_RESET_VTX_CNT 0x21
7733 #define V_028A90_BLOCK_CONTEXT_DONE 0x22
7734 #define V_028A90_CS_CONTEXT_DONE 0x23
7735 #define V_028A90_VGT_FLUSH 0x24
7736 #define V_028A90_SC_SEND_DB_VPZ 0x27
7737 #define V_028A90_BOTTOM_OF_PIPE_TS 0x28
7738 #define V_028A90_DB_CACHE_FLUSH_AND_INV 0x2A
7739 #define V_028A90_FLUSH_AND_INV_DB_DATA_TS 0x2B
7740 #define V_028A90_FLUSH_AND_INV_DB_META 0x2C
7741 #define V_028A90_FLUSH_AND_INV_CB_DATA_TS 0x2D
7742 #define V_028A90_FLUSH_AND_INV_CB_META 0x2E
7743 #define V_028A90_CS_DONE 0x2F
7744 #define V_028A90_PS_DONE 0x30
7745 #define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 0x31
7746 #define V_028A90_THREAD_TRACE_START 0x33
7747 #define V_028A90_THREAD_TRACE_STOP 0x34
7748 #define V_028A90_THREAD_TRACE_MARKER 0x35
7749 #define V_028A90_THREAD_TRACE_FLUSH 0x36
7750 #define V_028A90_THREAD_TRACE_FINISH 0x37
7752 #define V_028A90_PIXEL_PIPE_STAT_CONTROL 0x38
7753 #define V_028A90_PIXEL_PIPE_STAT_DUMP 0x39
7754 #define V_028A90_PIXEL_PIPE_STAT_RESET 0x40
7756 #define S_028A90_ADDRESS_HI(x) (((x) & 0x1FF) << 18)
7757 #define G_028A90_ADDRESS_HI(x) (((x) >> 18) & 0x1FF)
7758 #define C_028A90_ADDRESS_HI 0xF803FFFF
7759 #define S_028A90_EXTENDED_EVENT(x) (((x) & 0x1) << 27)
7760 #define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1)
7761 #define C_028A90_EXTENDED_EVENT 0xF7FFFFFF
7762 #define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94
7763 #define S_028A94_RESET_EN(x) (((x) & 0x1) << 0)
7764 #define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1)
7765 #define C_028A94_RESET_EN 0xFFFFFFFE
7766 #define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0
7767 #define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4
7768 #define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8
7769 #define S_028AA8_PRIMGROUP_SIZE(x) (((x) & 0xFFFF) << 0)
7770 #define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF)
7771 #define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000
7772 #define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) & 0x1) << 16)
7773 #define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1)
7774 #define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF
7775 #define S_028AA8_SWITCH_ON_EOP(x) (((x) & 0x1) << 17)
7776 #define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1)
7777 #define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF
7778 #define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) & 0x1) << 18)
7779 #define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1)
7780 #define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF
7781 #define S_028AA8_SWITCH_ON_EOI(x) (((x) & 0x1) << 19)
7782 #define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1)
7783 #define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF
7785 #define S_028AA8_WD_SWITCH_ON_EOP(x) (((x) & 0x1) << 20)
7786 #define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1)
7787 #define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF
7789 #define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) & 0x0F) << 28)
7790 #define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0x0F)
7791 #define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF
7793 #define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC
7794 #define S_028AAC_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
7795 #define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
7796 #define C_028AAC_ITEMSIZE 0xFFFF8000
7797 #define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0
7798 #define S_028AB0_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
7799 #define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
7800 #define C_028AB0_ITEMSIZE 0xFFFF8000
7801 #define R_028AB4_VGT_REUSE_OFF 0x028AB4
7802 #define S_028AB4_REUSE_OFF(x) (((x) & 0x1) << 0)
7803 #define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1)
7804 #define C_028AB4_REUSE_OFF 0xFFFFFFFE
7805 #define R_028AB8_VGT_VTX_CNT_EN 0x028AB8
7806 #define S_028AB8_VTX_CNT_EN(x) (((x) & 0x1) << 0)
7807 #define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1)
7808 #define C_028AB8_VTX_CNT_EN 0xFFFFFFFE
7809 #define R_028ABC_DB_HTILE_SURFACE 0x028ABC
7810 #define S_028ABC_LINEAR(x) (((x) & 0x1) << 0)
7811 #define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1)
7812 #define C_028ABC_LINEAR 0xFFFFFFFE
7813 #define S_028ABC_FULL_CACHE(x) (((x) & 0x1) << 1)
7814 #define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1)
7815 #define C_028ABC_FULL_CACHE 0xFFFFFFFD
7816 #define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) & 0x1) << 2)
7817 #define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1)
7818 #define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB
7819 #define S_028ABC_PRELOAD(x) (((x) & 0x1) << 3)
7820 #define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1)
7821 #define C_028ABC_PRELOAD 0xFFFFFFF7
7822 #define S_028ABC_PREFETCH_WIDTH(x) (((x) & 0x3F) << 4)
7823 #define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F)
7824 #define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F
7825 #define S_028ABC_PREFETCH_HEIGHT(x) (((x) & 0x3F) << 10)
7826 #define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F)
7827 #define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF
7828 #define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) & 0x1) << 16)
7829 #define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1)
7830 #define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF
7832 #define S_028ABC_TC_COMPATIBLE(x) (((x) & 0x1) << 17)
7833 #define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1)
7834 #define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF
7836 #define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0
7837 #define S_028AC0_COMPAREFUNC0(x) (((x) & 0x07) << 0)
7838 #define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x07)
7839 #define C_028AC0_COMPAREFUNC0 0xFFFFFFF8
7840 #define V_028AC0_REF_NEVER 0x00
7841 #define V_028AC0_REF_LESS 0x01
7842 #define V_028AC0_REF_EQUAL 0x02
7843 #define V_028AC0_REF_LEQUAL 0x03
7844 #define V_028AC0_REF_GREATER 0x04
7845 #define V_028AC0_REF_NOTEQUAL 0x05
7846 #define V_028AC0_REF_GEQUAL 0x06
7847 #define V_028AC0_REF_ALWAYS 0x07
7848 #define S_028AC0_COMPAREVALUE0(x) (((x) & 0xFF) << 4)
7849 #define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF)
7850 #define C_028AC0_COMPAREVALUE0 0xFFFFF00F
7851 #define S_028AC0_COMPAREMASK0(x) (((x) & 0xFF) << 12)
7852 #define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF)
7853 #define C_028AC0_COMPAREMASK0 0xFFF00FFF
7854 #define S_028AC0_ENABLE0(x) (((x) & 0x1) << 24)
7855 #define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1)
7856 #define C_028AC0_ENABLE0 0xFEFFFFFF
7857 #define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4
7858 #define S_028AC4_COMPAREFUNC1(x) (((x) & 0x07) << 0)
7859 #define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x07)
7860 #define C_028AC4_COMPAREFUNC1 0xFFFFFFF8
7861 #define V_028AC4_REF_NEVER 0x00
7862 #define V_028AC4_REF_LESS 0x01
7863 #define V_028AC4_REF_EQUAL 0x02
7864 #define V_028AC4_REF_LEQUAL 0x03
7865 #define V_028AC4_REF_GREATER 0x04
7866 #define V_028AC4_REF_NOTEQUAL 0x05
7867 #define V_028AC4_REF_GEQUAL 0x06
7868 #define V_028AC4_REF_ALWAYS 0x07
7869 #define S_028AC4_COMPAREVALUE1(x) (((x) & 0xFF) << 4)
7870 #define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF)
7871 #define C_028AC4_COMPAREVALUE1 0xFFFFF00F
7872 #define S_028AC4_COMPAREMASK1(x) (((x) & 0xFF) << 12)
7873 #define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF)
7874 #define C_028AC4_COMPAREMASK1 0xFFF00FFF
7875 #define S_028AC4_ENABLE1(x) (((x) & 0x1) << 24)
7876 #define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1)
7877 #define C_028AC4_ENABLE1 0xFEFFFFFF
7878 #define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8
7879 #define S_028AC8_START_X(x) (((x) & 0xFF) << 0)
7880 #define G_028AC8_START_X(x) (((x) >> 0) & 0xFF)
7881 #define C_028AC8_START_X 0xFFFFFF00
7882 #define S_028AC8_START_Y(x) (((x) & 0xFF) << 8)
7883 #define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF)
7884 #define C_028AC8_START_Y 0xFFFF00FF
7885 #define S_028AC8_MAX_X(x) (((x) & 0xFF) << 16)
7886 #define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF)
7887 #define C_028AC8_MAX_X 0xFF00FFFF
7888 #define S_028AC8_MAX_Y(x) (((x) & 0xFF) << 24)
7889 #define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF)
7890 #define C_028AC8_MAX_Y 0x00FFFFFF
7891 #define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0
7892 #define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4
7893 #define S_028AD4_STRIDE(x) (((x) & 0x3FF) << 0)
7894 #define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF)
7895 #define C_028AD4_STRIDE 0xFFFFFC00
7896 #define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC
7897 #define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0
7898 #define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4
7899 #define S_028AE4_STRIDE(x) (((x) & 0x3FF) << 0)
7900 #define G_028AE4_STRIDE(x) (((x) >> 0) & 0x3FF)
7901 #define C_028AE4_STRIDE 0xFFFFFC00
7902 #define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC
7903 #define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0
7904 #define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4
7905 #define S_028AF4_STRIDE(x) (((x) & 0x3FF) << 0)
7906 #define G_028AF4_STRIDE(x) (((x) >> 0) & 0x3FF)
7907 #define C_028AF4_STRIDE 0xFFFFFC00
7908 #define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC
7909 #define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00
7910 #define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04
7911 #define S_028B04_STRIDE(x) (((x) & 0x3FF) << 0)
7912 #define G_028B04_STRIDE(x) (((x) >> 0) & 0x3FF)
7913 #define C_028B04_STRIDE 0xFFFFFC00
7914 #define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C
7915 #define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28
7916 #define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C
7917 #define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30
7918 #define S_028B30_VERTEX_STRIDE(x) (((x) & 0x1FF) << 0)
7919 #define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF)
7920 #define C_028B30_VERTEX_STRIDE 0xFFFFFE00
7921 #define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38
7922 #define S_028B38_MAX_VERT_OUT(x) (((x) & 0x7FF) << 0)
7923 #define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF)
7924 #define C_028B38_MAX_VERT_OUT 0xFFFFF800
7926 #define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50
7927 #define S_028B50_ACCUM_ISOLINE(x) (((x) & 0xFF) << 0)
7928 #define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF)
7929 #define C_028B50_ACCUM_ISOLINE 0xFFFFFF00
7930 #define S_028B50_ACCUM_TRI(x) (((x) & 0xFF) << 8)
7931 #define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF)
7932 #define C_028B50_ACCUM_TRI 0xFFFF00FF
7933 #define S_028B50_ACCUM_QUAD(x) (((x) & 0xFF) << 16)
7934 #define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF)
7935 #define C_028B50_ACCUM_QUAD 0xFF00FFFF
7936 #define S_028B50_DONUT_SPLIT(x) (((x) & 0xFF) << 24)
7937 #define G_028B50_DONUT_SPLIT(x) (((x) >> 24) & 0xFF)
7938 #define C_028B50_DONUT_SPLIT 0x00FFFFFF
7940 #define R_028B54_VGT_SHADER_STAGES_EN 0x028B54
7941 #define S_028B54_LS_EN(x) (((x) & 0x03) << 0)
7942 #define G_028B54_LS_EN(x) (((x) >> 0) & 0x03)
7943 #define C_028B54_LS_EN 0xFFFFFFFC
7944 #define V_028B54_LS_STAGE_OFF 0x00
7945 #define V_028B54_LS_STAGE_ON 0x01
7946 #define V_028B54_CS_STAGE_ON 0x02
7947 #define S_028B54_HS_EN(x) (((x) & 0x1) << 2)
7948 #define G_028B54_HS_EN(x) (((x) >> 2) & 0x1)
7949 #define C_028B54_HS_EN 0xFFFFFFFB
7950 #define S_028B54_ES_EN(x) (((x) & 0x03) << 3)
7951 #define G_028B54_ES_EN(x) (((x) >> 3) & 0x03)
7952 #define C_028B54_ES_EN 0xFFFFFFE7
7953 #define V_028B54_ES_STAGE_OFF 0x00
7954 #define V_028B54_ES_STAGE_DS 0x01
7955 #define V_028B54_ES_STAGE_REAL 0x02
7956 #define S_028B54_GS_EN(x) (((x) & 0x1) << 5)
7957 #define G_028B54_GS_EN(x) (((x) >> 5) & 0x1)
7958 #define C_028B54_GS_EN 0xFFFFFFDF
7959 #define S_028B54_VS_EN(x) (((x) & 0x03) << 6)
7960 #define G_028B54_VS_EN(x) (((x) >> 6) & 0x03)
7961 #define C_028B54_VS_EN 0xFFFFFF3F
7962 #define V_028B54_VS_STAGE_REAL 0x00
7963 #define V_028B54_VS_STAGE_DS 0x01
7964 #define V_028B54_VS_STAGE_COPY_SHADER 0x02
7965 #define S_028B54_DYNAMIC_HS(x) (((x) & 0x1) << 8)
7966 #define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1)
7967 #define C_028B54_DYNAMIC_HS 0xFFFFFEFF
7969 #define S_028B54_DISPATCH_DRAW_EN(x) (((x) & 0x1) << 9)
7970 #define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1)
7971 #define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF
7972 #define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) & 0x1) << 10)
7973 #define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1)
7974 #define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF
7975 #define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) & 0x1) << 11)
7976 #define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1)
7977 #define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF
7978 #define S_028B54_VS_WAVE_ID_EN(x) (((x) & 0x1) << 12)
7979 #define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1)
7980 #define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF
7982 #define R_028B58_VGT_LS_HS_CONFIG 0x028B58
7983 #define S_028B58_NUM_PATCHES(x) (((x) & 0xFF) << 0)
7984 #define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF)
7985 #define C_028B58_NUM_PATCHES 0xFFFFFF00
7986 #define S_028B58_HS_NUM_INPUT_CP(x) (((x) & 0x3F) << 8)
7987 #define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F)
7988 #define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF
7989 #define S_028B58_HS_NUM_OUTPUT_CP(x) (((x) & 0x3F) << 14)
7990 #define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F)
7991 #define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF
7992 #define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C
7993 #define S_028B5C_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
7994 #define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
7995 #define C_028B5C_ITEMSIZE 0xFFFF8000
7996 #define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60
7997 #define S_028B60_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
7998 #define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
7999 #define C_028B60_ITEMSIZE 0xFFFF8000
8000 #define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64
8001 #define S_028B64_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
8002 #define G_028B64_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
8003 #define C_028B64_ITEMSIZE 0xFFFF8000
8004 #define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68
8005 #define S_028B68_ITEMSIZE(x) (((x) & 0x7FFF) << 0)
8006 #define G_028B68_ITEMSIZE(x) (((x) >> 0) & 0x7FFF)
8007 #define C_028B68_ITEMSIZE 0xFFFF8000
8008 #define R_028B6C_VGT_TF_PARAM 0x028B6C
8009 #define S_028B6C_TYPE(x) (((x) & 0x03) << 0)
8010 #define G_028B6C_TYPE(x) (((x) >> 0) & 0x03)
8011 #define C_028B6C_TYPE 0xFFFFFFFC
8012 #define V_028B6C_TESS_ISOLINE 0x00
8013 #define V_028B6C_TESS_TRIANGLE 0x01
8014 #define V_028B6C_TESS_QUAD 0x02
8015 #define S_028B6C_PARTITIONING(x) (((x) & 0x07) << 2)
8016 #define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07)
8017 #define C_028B6C_PARTITIONING 0xFFFFFFE3
8018 #define V_028B6C_PART_INTEGER 0x00
8019 #define V_028B6C_PART_POW2 0x01
8020 #define V_028B6C_PART_FRAC_ODD 0x02
8021 #define V_028B6C_PART_FRAC_EVEN 0x03
8022 #define S_028B6C_TOPOLOGY(x) (((x) & 0x07) << 5)
8023 #define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07)
8024 #define C_028B6C_TOPOLOGY 0xFFFFFF1F
8025 #define V_028B6C_OUTPUT_POINT 0x00
8026 #define V_028B6C_OUTPUT_LINE 0x01
8027 #define V_028B6C_OUTPUT_TRIANGLE_CW 0x02
8028 #define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03
8029 #define S_028B6C_RESERVED_REDUC_AXIS(x) (((x) & 0x1) << 8) /* not on CIK */
8030 #define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) /* not on CIK */
8031 #define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF /* not on CIK */
8032 #define S_028B6C_DEPRECATED(x) (((x) & 0x1) << 9)
8033 #define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1)
8034 #define C_028B6C_DEPRECATED 0xFFFFFDFF
8035 #define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) & 0x0F) << 10)
8036 #define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0x0F)
8037 #define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF
8038 #define S_028B6C_DISABLE_DONUTS(x) (((x) & 0x1) << 14)
8039 #define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1)
8040 #define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF
8042 #define S_028B6C_RDREQ_POLICY(x) (((x) & 0x03) << 15)
8043 #define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x03)
8044 #define C_028B6C_RDREQ_POLICY 0xFFFE7FFF
8045 #define V_028B6C_VGT_POLICY_LRU 0x00
8046 #define V_028B6C_VGT_POLICY_STREAM 0x01
8047 #define V_028B6C_VGT_POLICY_BYPASS 0x02
8050 #define S_028B6C_RDREQ_POLICY_VI(x) (((x) & 0x1) << 15)
8051 #define G_028B6C_RDREQ_POLICY_VI(x) (((x) >> 15) & 0x1)
8052 #define C_028B6C_RDREQ_POLICY_VI 0xFFFF7FFF
8053 #define S_028B6C_DISTRIBUTION_MODE(x) (((x) & 0x03) << 17)
8054 #define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x03)
8055 #define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF
8056 #define S_028B6C_MTYPE(x) (((x) & 0x03) << 19)
8057 #define G_028B6C_MTYPE(x) (((x) >> 19) & 0x03)
8058 #define C_028B6C_MTYPE 0xFFE7FFFF
8060 #define R_028B70_DB_ALPHA_TO_MASK 0x028B70
8061 #define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) & 0x1) << 0)
8062 #define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1)
8063 #define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE
8064 #define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) & 0x03) << 8)
8065 #define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x03)
8066 #define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF
8067 #define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) & 0x03) << 10)
8068 #define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x03)
8069 #define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF
8070 #define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) & 0x03) << 12)
8071 #define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x03)
8072 #define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF
8073 #define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) & 0x03) << 14)
8074 #define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x03)
8075 #define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF
8076 #define S_028B70_OFFSET_ROUND(x) (((x) & 0x1) << 16)
8077 #define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1)
8078 #define C_028B70_OFFSET_ROUND 0xFFFEFFFF
8080 #define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74
8082 #define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78
8083 #define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) & 0xFF) << 0)
8084 #define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF)
8085 #define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00
8086 #define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) & 0x1) << 8)
8087 #define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1)
8088 #define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF
8089 #define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C
8090 #define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80
8091 #define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84
8092 #define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88
8093 #define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C
8094 #define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90
8095 #define S_028B90_ENABLE(x) (((x) & 0x1) << 0)
8096 #define G_028B90_ENABLE(x) (((x) >> 0) & 0x1)
8097 #define C_028B90_ENABLE 0xFFFFFFFE
8098 #define S_028B90_CNT(x) (((x) & 0x7F) << 2)
8099 #define G_028B90_CNT(x) (((x) >> 2) & 0x7F)
8100 #define C_028B90_CNT 0xFFFFFE03
8101 #define R_028B94_VGT_STRMOUT_CONFIG 0x028B94
8102 #define S_028B94_STREAMOUT_0_EN(x) (((x) & 0x1) << 0)
8103 #define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1)
8104 #define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE
8105 #define S_028B94_STREAMOUT_1_EN(x) (((x) & 0x1) << 1)
8106 #define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1)
8107 #define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD
8108 #define S_028B94_STREAMOUT_2_EN(x) (((x) & 0x1) << 2)
8109 #define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1)
8110 #define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB
8111 #define S_028B94_STREAMOUT_3_EN(x) (((x) & 0x1) << 3)
8112 #define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1)
8113 #define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7
8114 #define S_028B94_RAST_STREAM(x) (((x) & 0x07) << 4)
8115 #define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07)
8116 #define C_028B94_RAST_STREAM 0xFFFFFF8F
8117 #define S_028B94_RAST_STREAM_MASK(x) (((x) & 0x0F) << 8)
8118 #define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F)
8119 #define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF
8120 #define S_028B94_USE_RAST_STREAM_MASK(x) (((x) & 0x1) << 31)
8121 #define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1)
8122 #define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF
8123 #define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98
8124 #define S_028B98_STREAM_0_BUFFER_EN(x) (((x) & 0x0F) << 0)
8125 #define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F)
8126 #define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0
8127 #define S_028B98_STREAM_1_BUFFER_EN(x) (((x) & 0x0F) << 4)
8128 #define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F)
8129 #define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F
8130 #define S_028B98_STREAM_2_BUFFER_EN(x) (((x) & 0x0F) << 8)
8131 #define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F)
8132 #define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF
8133 #define S_028B98_STREAM_3_BUFFER_EN(x) (((x) & 0x0F) << 12)
8134 #define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F)
8135 #define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF
8136 #define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4
8137 #define S_028BD4_DISTANCE_0(x) (((x) & 0x0F) << 0)
8138 #define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0x0F)
8139 #define C_028BD4_DISTANCE_0 0xFFFFFFF0
8140 #define S_028BD4_DISTANCE_1(x) (((x) & 0x0F) << 4)
8141 #define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0x0F)
8142 #define C_028BD4_DISTANCE_1 0xFFFFFF0F
8143 #define S_028BD4_DISTANCE_2(x) (((x) & 0x0F) << 8)
8144 #define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0x0F)
8145 #define C_028BD4_DISTANCE_2 0xFFFFF0FF
8146 #define S_028BD4_DISTANCE_3(x) (((x) & 0x0F) << 12)
8147 #define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0x0F)
8148 #define C_028BD4_DISTANCE_3 0xFFFF0FFF
8149 #define S_028BD4_DISTANCE_4(x) (((x) & 0x0F) << 16)
8150 #define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0x0F)
8151 #define C_028BD4_DISTANCE_4 0xFFF0FFFF
8152 #define S_028BD4_DISTANCE_5(x) (((x) & 0x0F) << 20)
8153 #define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0x0F)
8154 #define C_028BD4_DISTANCE_5 0xFF0FFFFF
8155 #define S_028BD4_DISTANCE_6(x) (((x) & 0x0F) << 24)
8156 #define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0x0F)
8157 #define C_028BD4_DISTANCE_6 0xF0FFFFFF
8158 #define S_028BD4_DISTANCE_7(x) (((x) & 0x0F) << 28)
8159 #define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0x0F)
8160 #define C_028BD4_DISTANCE_7 0x0FFFFFFF
8161 #define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8
8162 #define S_028BD8_DISTANCE_8(x) (((x) & 0x0F) << 0)
8163 #define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0x0F)
8164 #define C_028BD8_DISTANCE_8 0xFFFFFFF0
8165 #define S_028BD8_DISTANCE_9(x) (((x) & 0x0F) << 4)
8166 #define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0x0F)
8167 #define C_028BD8_DISTANCE_9 0xFFFFFF0F
8168 #define S_028BD8_DISTANCE_10(x) (((x) & 0x0F) << 8)
8169 #define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0x0F)
8170 #define C_028BD8_DISTANCE_10 0xFFFFF0FF
8171 #define S_028BD8_DISTANCE_11(x) (((x) & 0x0F) << 12)
8172 #define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0x0F)
8173 #define C_028BD8_DISTANCE_11 0xFFFF0FFF
8174 #define S_028BD8_DISTANCE_12(x) (((x) & 0x0F) << 16)
8175 #define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0x0F)
8176 #define C_028BD8_DISTANCE_12 0xFFF0FFFF
8177 #define S_028BD8_DISTANCE_13(x) (((x) & 0x0F) << 20)
8178 #define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0x0F)
8179 #define C_028BD8_DISTANCE_13 0xFF0FFFFF
8180 #define S_028BD8_DISTANCE_14(x) (((x) & 0x0F) << 24)
8181 #define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0x0F)
8182 #define C_028BD8_DISTANCE_14 0xF0FFFFFF
8183 #define S_028BD8_DISTANCE_15(x) (((x) & 0x0F) << 28)
8184 #define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0x0F)
8185 #define C_028BD8_DISTANCE_15 0x0FFFFFFF
8186 #define R_028BDC_PA_SC_LINE_CNTL 0x028BDC
8187 #define S_028BDC_EXPAND_LINE_WIDTH(x) (((x) & 0x1) << 9)
8188 #define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1)
8189 #define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF
8190 #define S_028BDC_LAST_PIXEL(x) (((x) & 0x1) << 10)
8191 #define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1)
8192 #define C_028BDC_LAST_PIXEL 0xFFFFFBFF
8193 #define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) & 0x1) << 11)
8194 #define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1)
8195 #define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF
8196 #define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) & 0x1) << 12)
8197 #define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1)
8198 #define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF
8199 #define R_028BE0_PA_SC_AA_CONFIG 0x028BE0
8200 #define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x7) << 0)
8201 #define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07)
8202 #define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8
8203 #define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4)
8204 #define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1)
8205 #define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF
8206 #define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0xf) << 13)
8207 #define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F)
8208 #define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF
8209 #define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x7) << 20)
8210 #define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07)
8211 #define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF
8212 #define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x3) << 24)
8213 #define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03)
8214 #define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF
8215 #define R_028BE4_PA_SU_VTX_CNTL 0x028BE4
8216 #define S_028BE4_PIX_CENTER(x) (((x) & 0x1) << 0)
8217 #define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1)
8218 #define C_028BE4_PIX_CENTER 0xFFFFFFFE
8219 #define S_028BE4_ROUND_MODE(x) (((x) & 0x03) << 1)
8220 #define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x03)
8221 #define C_028BE4_ROUND_MODE 0xFFFFFFF9
8222 #define V_028BE4_X_TRUNCATE 0x00
8223 #define V_028BE4_X_ROUND 0x01
8224 #define V_028BE4_X_ROUND_TO_EVEN 0x02
8225 #define V_028BE4_X_ROUND_TO_ODD 0x03
8226 #define S_028BE4_QUANT_MODE(x) (((x) & 0x07) << 3)
8227 #define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x07)
8228 #define C_028BE4_QUANT_MODE 0xFFFFFFC7
8229 #define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0x00
8230 #define V_028BE4_X_16_8_FIXED_POINT_1_8TH 0x01
8231 #define V_028BE4_X_16_8_FIXED_POINT_1_4TH 0x02
8232 #define V_028BE4_X_16_8_FIXED_POINT_1_2 0x03
8233 #define V_028BE4_X_16_8_FIXED_POINT_1 0x04
8234 #define V_028BE4_X_16_8_FIXED_POINT_1_256TH 0x05
8235 #define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 0x06
8236 #define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 0x07
8237 #define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8
8238 #define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC
8239 #define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0
8240 #define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4
8241 #define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8
8242 #define S_028BF8_S0_X(x) (((x) & 0x0F) << 0)
8243 #define G_028BF8_S0_X(x) (((x) >> 0) & 0x0F)
8244 #define C_028BF8_S0_X 0xFFFFFFF0
8245 #define S_028BF8_S0_Y(x) (((x) & 0x0F) << 4)
8246 #define G_028BF8_S0_Y(x) (((x) >> 4) & 0x0F)
8247 #define C_028BF8_S0_Y 0xFFFFFF0F
8248 #define S_028BF8_S1_X(x) (((x) & 0x0F) << 8)
8249 #define G_028BF8_S1_X(x) (((x) >> 8) & 0x0F)
8250 #define C_028BF8_S1_X 0xFFFFF0FF
8251 #define S_028BF8_S1_Y(x) (((x) & 0x0F) << 12)
8252 #define G_028BF8_S1_Y(x) (((x) >> 12) & 0x0F)
8253 #define C_028BF8_S1_Y 0xFFFF0FFF
8254 #define S_028BF8_S2_X(x) (((x) & 0x0F) << 16)
8255 #define G_028BF8_S2_X(x) (((x) >> 16) & 0x0F)
8256 #define C_028BF8_S2_X 0xFFF0FFFF
8257 #define S_028BF8_S2_Y(x) (((x) & 0x0F) << 20)
8258 #define G_028BF8_S2_Y(x) (((x) >> 20) & 0x0F)
8259 #define C_028BF8_S2_Y 0xFF0FFFFF
8260 #define S_028BF8_S3_X(x) (((x) & 0x0F) << 24)
8261 #define G_028BF8_S3_X(x) (((x) >> 24) & 0x0F)
8262 #define C_028BF8_S3_X 0xF0FFFFFF
8263 #define S_028BF8_S3_Y(x) (((x) & 0x0F) << 28)
8264 #define G_028BF8_S3_Y(x) (((x) >> 28) & 0x0F)
8265 #define C_028BF8_S3_Y 0x0FFFFFFF
8266 #define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC
8267 #define S_028BFC_S4_X(x) (((x) & 0x0F) << 0)
8268 #define G_028BFC_S4_X(x) (((x) >> 0) & 0x0F)
8269 #define C_028BFC_S4_X 0xFFFFFFF0
8270 #define S_028BFC_S4_Y(x) (((x) & 0x0F) << 4)
8271 #define G_028BFC_S4_Y(x) (((x) >> 4) & 0x0F)
8272 #define C_028BFC_S4_Y 0xFFFFFF0F
8273 #define S_028BFC_S5_X(x) (((x) & 0x0F) << 8)
8274 #define G_028BFC_S5_X(x) (((x) >> 8) & 0x0F)
8275 #define C_028BFC_S5_X 0xFFFFF0FF
8276 #define S_028BFC_S5_Y(x) (((x) & 0x0F) << 12)
8277 #define G_028BFC_S5_Y(x) (((x) >> 12) & 0x0F)
8278 #define C_028BFC_S5_Y 0xFFFF0FFF
8279 #define S_028BFC_S6_X(x) (((x) & 0x0F) << 16)
8280 #define G_028BFC_S6_X(x) (((x) >> 16) & 0x0F)
8281 #define C_028BFC_S6_X 0xFFF0FFFF
8282 #define S_028BFC_S6_Y(x) (((x) & 0x0F) << 20)
8283 #define G_028BFC_S6_Y(x) (((x) >> 20) & 0x0F)
8284 #define C_028BFC_S6_Y 0xFF0FFFFF
8285 #define S_028BFC_S7_X(x) (((x) & 0x0F) << 24)
8286 #define G_028BFC_S7_X(x) (((x) >> 24) & 0x0F)
8287 #define C_028BFC_S7_X 0xF0FFFFFF
8288 #define S_028BFC_S7_Y(x) (((x) & 0x0F) << 28)
8289 #define G_028BFC_S7_Y(x) (((x) >> 28) & 0x0F)
8290 #define C_028BFC_S7_Y 0x0FFFFFFF
8291 #define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00
8292 #define S_028C00_S8_X(x) (((x) & 0x0F) << 0)
8293 #define G_028C00_S8_X(x) (((x) >> 0) & 0x0F)
8294 #define C_028C00_S8_X 0xFFFFFFF0
8295 #define S_028C00_S8_Y(x) (((x) & 0x0F) << 4)
8296 #define G_028C00_S8_Y(x) (((x) >> 4) & 0x0F)
8297 #define C_028C00_S8_Y 0xFFFFFF0F
8298 #define S_028C00_S9_X(x) (((x) & 0x0F) << 8)
8299 #define G_028C00_S9_X(x) (((x) >> 8) & 0x0F)
8300 #define C_028C00_S9_X 0xFFFFF0FF
8301 #define S_028C00_S9_Y(x) (((x) & 0x0F) << 12)
8302 #define G_028C00_S9_Y(x) (((x) >> 12) & 0x0F)
8303 #define C_028C00_S9_Y 0xFFFF0FFF
8304 #define S_028C00_S10_X(x) (((x) & 0x0F) << 16)
8305 #define G_028C00_S10_X(x) (((x) >> 16) & 0x0F)
8306 #define C_028C00_S10_X 0xFFF0FFFF
8307 #define S_028C00_S10_Y(x) (((x) & 0x0F) << 20)
8308 #define G_028C00_S10_Y(x) (((x) >> 20) & 0x0F)
8309 #define C_028C00_S10_Y 0xFF0FFFFF
8310 #define S_028C00_S11_X(x) (((x) & 0x0F) << 24)
8311 #define G_028C00_S11_X(x) (((x) >> 24) & 0x0F)
8312 #define C_028C00_S11_X 0xF0FFFFFF
8313 #define S_028C00_S11_Y(x) (((x) & 0x0F) << 28)
8314 #define G_028C00_S11_Y(x) (((x) >> 28) & 0x0F)
8315 #define C_028C00_S11_Y 0x0FFFFFFF
8316 #define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04
8317 #define S_028C04_S12_X(x) (((x) & 0x0F) << 0)
8318 #define G_028C04_S12_X(x) (((x) >> 0) & 0x0F)
8319 #define C_028C04_S12_X 0xFFFFFFF0
8320 #define S_028C04_S12_Y(x) (((x) & 0x0F) << 4)
8321 #define G_028C04_S12_Y(x) (((x) >> 4) & 0x0F)
8322 #define C_028C04_S12_Y 0xFFFFFF0F
8323 #define S_028C04_S13_X(x) (((x) & 0x0F) << 8)
8324 #define G_028C04_S13_X(x) (((x) >> 8) & 0x0F)
8325 #define C_028C04_S13_X 0xFFFFF0FF
8326 #define S_028C04_S13_Y(x) (((x) & 0x0F) << 12)
8327 #define G_028C04_S13_Y(x) (((x) >> 12) & 0x0F)
8328 #define C_028C04_S13_Y 0xFFFF0FFF
8329 #define S_028C04_S14_X(x) (((x) & 0x0F) << 16)
8330 #define G_028C04_S14_X(x) (((x) >> 16) & 0x0F)
8331 #define C_028C04_S14_X 0xFFF0FFFF
8332 #define S_028C04_S14_Y(x) (((x) & 0x0F) << 20)
8333 #define G_028C04_S14_Y(x) (((x) >> 20) & 0x0F)
8334 #define C_028C04_S14_Y 0xFF0FFFFF
8335 #define S_028C04_S15_X(x) (((x) & 0x0F) << 24)
8336 #define G_028C04_S15_X(x) (((x) >> 24) & 0x0F)
8337 #define C_028C04_S15_X 0xF0FFFFFF
8338 #define S_028C04_S15_Y(x) (((x) & 0x0F) << 28)
8339 #define G_028C04_S15_Y(x) (((x) >> 28) & 0x0F)
8340 #define C_028C04_S15_Y 0x0FFFFFFF
8341 #define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08
8342 #define S_028C08_S0_X(x) (((x) & 0x0F) << 0)
8343 #define G_028C08_S0_X(x) (((x) >> 0) & 0x0F)
8344 #define C_028C08_S0_X 0xFFFFFFF0
8345 #define S_028C08_S0_Y(x) (((x) & 0x0F) << 4)
8346 #define G_028C08_S0_Y(x) (((x) >> 4) & 0x0F)
8347 #define C_028C08_S0_Y 0xFFFFFF0F
8348 #define S_028C08_S1_X(x) (((x) & 0x0F) << 8)
8349 #define G_028C08_S1_X(x) (((x) >> 8) & 0x0F)
8350 #define C_028C08_S1_X 0xFFFFF0FF
8351 #define S_028C08_S1_Y(x) (((x) & 0x0F) << 12)
8352 #define G_028C08_S1_Y(x) (((x) >> 12) & 0x0F)
8353 #define C_028C08_S1_Y 0xFFFF0FFF
8354 #define S_028C08_S2_X(x) (((x) & 0x0F) << 16)
8355 #define G_028C08_S2_X(x) (((x) >> 16) & 0x0F)
8356 #define C_028C08_S2_X 0xFFF0FFFF
8357 #define S_028C08_S2_Y(x) (((x) & 0x0F) << 20)
8358 #define G_028C08_S2_Y(x) (((x) >> 20) & 0x0F)
8359 #define C_028C08_S2_Y 0xFF0FFFFF
8360 #define S_028C08_S3_X(x) (((x) & 0x0F) << 24)
8361 #define G_028C08_S3_X(x) (((x) >> 24) & 0x0F)
8362 #define C_028C08_S3_X 0xF0FFFFFF
8363 #define S_028C08_S3_Y(x) (((x) & 0x0F) << 28)
8364 #define G_028C08_S3_Y(x) (((x) >> 28) & 0x0F)
8365 #define C_028C08_S3_Y 0x0FFFFFFF
8366 #define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C
8367 #define S_028C0C_S4_X(x) (((x) & 0x0F) << 0)
8368 #define G_028C0C_S4_X(x) (((x) >> 0) & 0x0F)
8369 #define C_028C0C_S4_X 0xFFFFFFF0
8370 #define S_028C0C_S4_Y(x) (((x) & 0x0F) << 4)
8371 #define G_028C0C_S4_Y(x) (((x) >> 4) & 0x0F)
8372 #define C_028C0C_S4_Y 0xFFFFFF0F
8373 #define S_028C0C_S5_X(x) (((x) & 0x0F) << 8)
8374 #define G_028C0C_S5_X(x) (((x) >> 8) & 0x0F)
8375 #define C_028C0C_S5_X 0xFFFFF0FF
8376 #define S_028C0C_S5_Y(x) (((x) & 0x0F) << 12)
8377 #define G_028C0C_S5_Y(x) (((x) >> 12) & 0x0F)
8378 #define C_028C0C_S5_Y 0xFFFF0FFF
8379 #define S_028C0C_S6_X(x) (((x) & 0x0F) << 16)
8380 #define G_028C0C_S6_X(x) (((x) >> 16) & 0x0F)
8381 #define C_028C0C_S6_X 0xFFF0FFFF
8382 #define S_028C0C_S6_Y(x) (((x) & 0x0F) << 20)
8383 #define G_028C0C_S6_Y(x) (((x) >> 20) & 0x0F)
8384 #define C_028C0C_S6_Y 0xFF0FFFFF
8385 #define S_028C0C_S7_X(x) (((x) & 0x0F) << 24)
8386 #define G_028C0C_S7_X(x) (((x) >> 24) & 0x0F)
8387 #define C_028C0C_S7_X 0xF0FFFFFF
8388 #define S_028C0C_S7_Y(x) (((x) & 0x0F) << 28)
8389 #define G_028C0C_S7_Y(x) (((x) >> 28) & 0x0F)
8390 #define C_028C0C_S7_Y 0x0FFFFFFF
8391 #define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10
8392 #define S_028C10_S8_X(x) (((x) & 0x0F) << 0)
8393 #define G_028C10_S8_X(x) (((x) >> 0) & 0x0F)
8394 #define C_028C10_S8_X 0xFFFFFFF0
8395 #define S_028C10_S8_Y(x) (((x) & 0x0F) << 4)
8396 #define G_028C10_S8_Y(x) (((x) >> 4) & 0x0F)
8397 #define C_028C10_S8_Y 0xFFFFFF0F
8398 #define S_028C10_S9_X(x) (((x) & 0x0F) << 8)
8399 #define G_028C10_S9_X(x) (((x) >> 8) & 0x0F)
8400 #define C_028C10_S9_X 0xFFFFF0FF
8401 #define S_028C10_S9_Y(x) (((x) & 0x0F) << 12)
8402 #define G_028C10_S9_Y(x) (((x) >> 12) & 0x0F)
8403 #define C_028C10_S9_Y 0xFFFF0FFF
8404 #define S_028C10_S10_X(x) (((x) & 0x0F) << 16)
8405 #define G_028C10_S10_X(x) (((x) >> 16) & 0x0F)
8406 #define C_028C10_S10_X 0xFFF0FFFF
8407 #define S_028C10_S10_Y(x) (((x) & 0x0F) << 20)
8408 #define G_028C10_S10_Y(x) (((x) >> 20) & 0x0F)
8409 #define C_028C10_S10_Y 0xFF0FFFFF
8410 #define S_028C10_S11_X(x) (((x) & 0x0F) << 24)
8411 #define G_028C10_S11_X(x) (((x) >> 24) & 0x0F)
8412 #define C_028C10_S11_X 0xF0FFFFFF
8413 #define S_028C10_S11_Y(x) (((x) & 0x0F) << 28)
8414 #define G_028C10_S11_Y(x) (((x) >> 28) & 0x0F)
8415 #define C_028C10_S11_Y 0x0FFFFFFF
8416 #define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14
8417 #define S_028C14_S12_X(x) (((x) & 0x0F) << 0)
8418 #define G_028C14_S12_X(x) (((x) >> 0) & 0x0F)
8419 #define C_028C14_S12_X 0xFFFFFFF0
8420 #define S_028C14_S12_Y(x) (((x) & 0x0F) << 4)
8421 #define G_028C14_S12_Y(x) (((x) >> 4) & 0x0F)
8422 #define C_028C14_S12_Y 0xFFFFFF0F
8423 #define S_028C14_S13_X(x) (((x) & 0x0F) << 8)
8424 #define G_028C14_S13_X(x) (((x) >> 8) & 0x0F)
8425 #define C_028C14_S13_X 0xFFFFF0FF
8426 #define S_028C14_S13_Y(x) (((x) & 0x0F) << 12)
8427 #define G_028C14_S13_Y(x) (((x) >> 12) & 0x0F)
8428 #define C_028C14_S13_Y 0xFFFF0FFF
8429 #define S_028C14_S14_X(x) (((x) & 0x0F) << 16)
8430 #define G_028C14_S14_X(x) (((x) >> 16) & 0x0F)
8431 #define C_028C14_S14_X 0xFFF0FFFF
8432 #define S_028C14_S14_Y(x) (((x) & 0x0F) << 20)
8433 #define G_028C14_S14_Y(x) (((x) >> 20) & 0x0F)
8434 #define C_028C14_S14_Y 0xFF0FFFFF
8435 #define S_028C14_S15_X(x) (((x) & 0x0F) << 24)
8436 #define G_028C14_S15_X(x) (((x) >> 24) & 0x0F)
8437 #define C_028C14_S15_X 0xF0FFFFFF
8438 #define S_028C14_S15_Y(x) (((x) & 0x0F) << 28)
8439 #define G_028C14_S15_Y(x) (((x) >> 28) & 0x0F)
8440 #define C_028C14_S15_Y 0x0FFFFFFF
8441 #define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18
8442 #define S_028C18_S0_X(x) (((x) & 0x0F) << 0)
8443 #define G_028C18_S0_X(x) (((x) >> 0) & 0x0F)
8444 #define C_028C18_S0_X 0xFFFFFFF0
8445 #define S_028C18_S0_Y(x) (((x) & 0x0F) << 4)
8446 #define G_028C18_S0_Y(x) (((x) >> 4) & 0x0F)
8447 #define C_028C18_S0_Y 0xFFFFFF0F
8448 #define S_028C18_S1_X(x) (((x) & 0x0F) << 8)
8449 #define G_028C18_S1_X(x) (((x) >> 8) & 0x0F)
8450 #define C_028C18_S1_X 0xFFFFF0FF
8451 #define S_028C18_S1_Y(x) (((x) & 0x0F) << 12)
8452 #define G_028C18_S1_Y(x) (((x) >> 12) & 0x0F)
8453 #define C_028C18_S1_Y 0xFFFF0FFF
8454 #define S_028C18_S2_X(x) (((x) & 0x0F) << 16)
8455 #define G_028C18_S2_X(x) (((x) >> 16) & 0x0F)
8456 #define C_028C18_S2_X 0xFFF0FFFF
8457 #define S_028C18_S2_Y(x) (((x) & 0x0F) << 20)
8458 #define G_028C18_S2_Y(x) (((x) >> 20) & 0x0F)
8459 #define C_028C18_S2_Y 0xFF0FFFFF
8460 #define S_028C18_S3_X(x) (((x) & 0x0F) << 24)
8461 #define G_028C18_S3_X(x) (((x) >> 24) & 0x0F)
8462 #define C_028C18_S3_X 0xF0FFFFFF
8463 #define S_028C18_S3_Y(x) (((x) & 0x0F) << 28)
8464 #define G_028C18_S3_Y(x) (((x) >> 28) & 0x0F)
8465 #define C_028C18_S3_Y 0x0FFFFFFF
8466 #define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C
8467 #define S_028C1C_S4_X(x) (((x) & 0x0F) << 0)
8468 #define G_028C1C_S4_X(x) (((x) >> 0) & 0x0F)
8469 #define C_028C1C_S4_X 0xFFFFFFF0
8470 #define S_028C1C_S4_Y(x) (((x) & 0x0F) << 4)
8471 #define G_028C1C_S4_Y(x) (((x) >> 4) & 0x0F)
8472 #define C_028C1C_S4_Y 0xFFFFFF0F
8473 #define S_028C1C_S5_X(x) (((x) & 0x0F) << 8)
8474 #define G_028C1C_S5_X(x) (((x) >> 8) & 0x0F)
8475 #define C_028C1C_S5_X 0xFFFFF0FF
8476 #define S_028C1C_S5_Y(x) (((x) & 0x0F) << 12)
8477 #define G_028C1C_S5_Y(x) (((x) >> 12) & 0x0F)
8478 #define C_028C1C_S5_Y 0xFFFF0FFF
8479 #define S_028C1C_S6_X(x) (((x) & 0x0F) << 16)
8480 #define G_028C1C_S6_X(x) (((x) >> 16) & 0x0F)
8481 #define C_028C1C_S6_X 0xFFF0FFFF
8482 #define S_028C1C_S6_Y(x) (((x) & 0x0F) << 20)
8483 #define G_028C1C_S6_Y(x) (((x) >> 20) & 0x0F)
8484 #define C_028C1C_S6_Y 0xFF0FFFFF
8485 #define S_028C1C_S7_X(x) (((x) & 0x0F) << 24)
8486 #define G_028C1C_S7_X(x) (((x) >> 24) & 0x0F)
8487 #define C_028C1C_S7_X 0xF0FFFFFF
8488 #define S_028C1C_S7_Y(x) (((x) & 0x0F) << 28)
8489 #define G_028C1C_S7_Y(x) (((x) >> 28) & 0x0F)
8490 #define C_028C1C_S7_Y 0x0FFFFFFF
8491 #define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20
8492 #define S_028C20_S8_X(x) (((x) & 0x0F) << 0)
8493 #define G_028C20_S8_X(x) (((x) >> 0) & 0x0F)
8494 #define C_028C20_S8_X 0xFFFFFFF0
8495 #define S_028C20_S8_Y(x) (((x) & 0x0F) << 4)
8496 #define G_028C20_S8_Y(x) (((x) >> 4) & 0x0F)
8497 #define C_028C20_S8_Y 0xFFFFFF0F
8498 #define S_028C20_S9_X(x) (((x) & 0x0F) << 8)
8499 #define G_028C20_S9_X(x) (((x) >> 8) & 0x0F)
8500 #define C_028C20_S9_X 0xFFFFF0FF
8501 #define S_028C20_S9_Y(x) (((x) & 0x0F) << 12)
8502 #define G_028C20_S9_Y(x) (((x) >> 12) & 0x0F)
8503 #define C_028C20_S9_Y 0xFFFF0FFF
8504 #define S_028C20_S10_X(x) (((x) & 0x0F) << 16)
8505 #define G_028C20_S10_X(x) (((x) >> 16) & 0x0F)
8506 #define C_028C20_S10_X 0xFFF0FFFF
8507 #define S_028C20_S10_Y(x) (((x) & 0x0F) << 20)
8508 #define G_028C20_S10_Y(x) (((x) >> 20) & 0x0F)
8509 #define C_028C20_S10_Y 0xFF0FFFFF
8510 #define S_028C20_S11_X(x) (((x) & 0x0F) << 24)
8511 #define G_028C20_S11_X(x) (((x) >> 24) & 0x0F)
8512 #define C_028C20_S11_X 0xF0FFFFFF
8513 #define S_028C20_S11_Y(x) (((x) & 0x0F) << 28)
8514 #define G_028C20_S11_Y(x) (((x) >> 28) & 0x0F)
8515 #define C_028C20_S11_Y 0x0FFFFFFF
8516 #define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24
8517 #define S_028C24_S12_X(x) (((x) & 0x0F) << 0)
8518 #define G_028C24_S12_X(x) (((x) >> 0) & 0x0F)
8519 #define C_028C24_S12_X 0xFFFFFFF0
8520 #define S_028C24_S12_Y(x) (((x) & 0x0F) << 4)
8521 #define G_028C24_S12_Y(x) (((x) >> 4) & 0x0F)
8522 #define C_028C24_S12_Y 0xFFFFFF0F
8523 #define S_028C24_S13_X(x) (((x) & 0x0F) << 8)
8524 #define G_028C24_S13_X(x) (((x) >> 8) & 0x0F)
8525 #define C_028C24_S13_X 0xFFFFF0FF
8526 #define S_028C24_S13_Y(x) (((x) & 0x0F) << 12)
8527 #define G_028C24_S13_Y(x) (((x) >> 12) & 0x0F)
8528 #define C_028C24_S13_Y 0xFFFF0FFF
8529 #define S_028C24_S14_X(x) (((x) & 0x0F) << 16)
8530 #define G_028C24_S14_X(x) (((x) >> 16) & 0x0F)
8531 #define C_028C24_S14_X 0xFFF0FFFF
8532 #define S_028C24_S14_Y(x) (((x) & 0x0F) << 20)
8533 #define G_028C24_S14_Y(x) (((x) >> 20) & 0x0F)
8534 #define C_028C24_S14_Y 0xFF0FFFFF
8535 #define S_028C24_S15_X(x) (((x) & 0x0F) << 24)
8536 #define G_028C24_S15_X(x) (((x) >> 24) & 0x0F)
8537 #define C_028C24_S15_X 0xF0FFFFFF
8538 #define S_028C24_S15_Y(x) (((x) & 0x0F) << 28)
8539 #define G_028C24_S15_Y(x) (((x) >> 28) & 0x0F)
8540 #define C_028C24_S15_Y 0x0FFFFFFF
8541 #define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28
8542 #define S_028C28_S0_X(x) (((x) & 0x0F) << 0)
8543 #define G_028C28_S0_X(x) (((x) >> 0) & 0x0F)
8544 #define C_028C28_S0_X 0xFFFFFFF0
8545 #define S_028C28_S0_Y(x) (((x) & 0x0F) << 4)
8546 #define G_028C28_S0_Y(x) (((x) >> 4) & 0x0F)
8547 #define C_028C28_S0_Y 0xFFFFFF0F
8548 #define S_028C28_S1_X(x) (((x) & 0x0F) << 8)
8549 #define G_028C28_S1_X(x) (((x) >> 8) & 0x0F)
8550 #define C_028C28_S1_X 0xFFFFF0FF
8551 #define S_028C28_S1_Y(x) (((x) & 0x0F) << 12)
8552 #define G_028C28_S1_Y(x) (((x) >> 12) & 0x0F)
8553 #define C_028C28_S1_Y 0xFFFF0FFF
8554 #define S_028C28_S2_X(x) (((x) & 0x0F) << 16)
8555 #define G_028C28_S2_X(x) (((x) >> 16) & 0x0F)
8556 #define C_028C28_S2_X 0xFFF0FFFF
8557 #define S_028C28_S2_Y(x) (((x) & 0x0F) << 20)
8558 #define G_028C28_S2_Y(x) (((x) >> 20) & 0x0F)
8559 #define C_028C28_S2_Y 0xFF0FFFFF
8560 #define S_028C28_S3_X(x) (((x) & 0x0F) << 24)
8561 #define G_028C28_S3_X(x) (((x) >> 24) & 0x0F)
8562 #define C_028C28_S3_X 0xF0FFFFFF
8563 #define S_028C28_S3_Y(x) (((x) & 0x0F) << 28)
8564 #define G_028C28_S3_Y(x) (((x) >> 28) & 0x0F)
8565 #define C_028C28_S3_Y 0x0FFFFFFF
8566 #define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C
8567 #define S_028C2C_S4_X(x) (((x) & 0x0F) << 0)
8568 #define G_028C2C_S4_X(x) (((x) >> 0) & 0x0F)
8569 #define C_028C2C_S4_X 0xFFFFFFF0
8570 #define S_028C2C_S4_Y(x) (((x) & 0x0F) << 4)
8571 #define G_028C2C_S4_Y(x) (((x) >> 4) & 0x0F)
8572 #define C_028C2C_S4_Y 0xFFFFFF0F
8573 #define S_028C2C_S5_X(x) (((x) & 0x0F) << 8)
8574 #define G_028C2C_S5_X(x) (((x) >> 8) & 0x0F)
8575 #define C_028C2C_S5_X 0xFFFFF0FF
8576 #define S_028C2C_S5_Y(x) (((x) & 0x0F) << 12)
8577 #define G_028C2C_S5_Y(x) (((x) >> 12) & 0x0F)
8578 #define C_028C2C_S5_Y 0xFFFF0FFF
8579 #define S_028C2C_S6_X(x) (((x) & 0x0F) << 16)
8580 #define G_028C2C_S6_X(x) (((x) >> 16) & 0x0F)
8581 #define C_028C2C_S6_X 0xFFF0FFFF
8582 #define S_028C2C_S6_Y(x) (((x) & 0x0F) << 20)
8583 #define G_028C2C_S6_Y(x) (((x) >> 20) & 0x0F)
8584 #define C_028C2C_S6_Y 0xFF0FFFFF
8585 #define S_028C2C_S7_X(x) (((x) & 0x0F) << 24)
8586 #define G_028C2C_S7_X(x) (((x) >> 24) & 0x0F)
8587 #define C_028C2C_S7_X 0xF0FFFFFF
8588 #define S_028C2C_S7_Y(x) (((x) & 0x0F) << 28)
8589 #define G_028C2C_S7_Y(x) (((x) >> 28) & 0x0F)
8590 #define C_028C2C_S7_Y 0x0FFFFFFF
8591 #define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30
8592 #define S_028C30_S8_X(x) (((x) & 0x0F) << 0)
8593 #define G_028C30_S8_X(x) (((x) >> 0) & 0x0F)
8594 #define C_028C30_S8_X 0xFFFFFFF0
8595 #define S_028C30_S8_Y(x) (((x) & 0x0F) << 4)
8596 #define G_028C30_S8_Y(x) (((x) >> 4) & 0x0F)
8597 #define C_028C30_S8_Y 0xFFFFFF0F
8598 #define S_028C30_S9_X(x) (((x) & 0x0F) << 8)
8599 #define G_028C30_S9_X(x) (((x) >> 8) & 0x0F)
8600 #define C_028C30_S9_X 0xFFFFF0FF
8601 #define S_028C30_S9_Y(x) (((x) & 0x0F) << 12)
8602 #define G_028C30_S9_Y(x) (((x) >> 12) & 0x0F)
8603 #define C_028C30_S9_Y 0xFFFF0FFF
8604 #define S_028C30_S10_X(x) (((x) & 0x0F) << 16)
8605 #define G_028C30_S10_X(x) (((x) >> 16) & 0x0F)
8606 #define C_028C30_S10_X 0xFFF0FFFF
8607 #define S_028C30_S10_Y(x) (((x) & 0x0F) << 20)
8608 #define G_028C30_S10_Y(x) (((x) >> 20) & 0x0F)
8609 #define C_028C30_S10_Y 0xFF0FFFFF
8610 #define S_028C30_S11_X(x) (((x) & 0x0F) << 24)
8611 #define G_028C30_S11_X(x) (((x) >> 24) & 0x0F)
8612 #define C_028C30_S11_X 0xF0FFFFFF
8613 #define S_028C30_S11_Y(x) (((x) & 0x0F) << 28)
8614 #define G_028C30_S11_Y(x) (((x) >> 28) & 0x0F)
8615 #define C_028C30_S11_Y 0x0FFFFFFF
8616 #define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34
8617 #define S_028C34_S12_X(x) (((x) & 0x0F) << 0)
8618 #define G_028C34_S12_X(x) (((x) >> 0) & 0x0F)
8619 #define C_028C34_S12_X 0xFFFFFFF0
8620 #define S_028C34_S12_Y(x) (((x) & 0x0F) << 4)
8621 #define G_028C34_S12_Y(x) (((x) >> 4) & 0x0F)
8622 #define C_028C34_S12_Y 0xFFFFFF0F
8623 #define S_028C34_S13_X(x) (((x) & 0x0F) << 8)
8624 #define G_028C34_S13_X(x) (((x) >> 8) & 0x0F)
8625 #define C_028C34_S13_X 0xFFFFF0FF
8626 #define S_028C34_S13_Y(x) (((x) & 0x0F) << 12)
8627 #define G_028C34_S13_Y(x) (((x) >> 12) & 0x0F)
8628 #define C_028C34_S13_Y 0xFFFF0FFF
8629 #define S_028C34_S14_X(x) (((x) & 0x0F) << 16)
8630 #define G_028C34_S14_X(x) (((x) >> 16) & 0x0F)
8631 #define C_028C34_S14_X 0xFFF0FFFF
8632 #define S_028C34_S14_Y(x) (((x) & 0x0F) << 20)
8633 #define G_028C34_S14_Y(x) (((x) >> 20) & 0x0F)
8634 #define C_028C34_S14_Y 0xFF0FFFFF
8635 #define S_028C34_S15_X(x) (((x) & 0x0F) << 24)
8636 #define G_028C34_S15_X(x) (((x) >> 24) & 0x0F)
8637 #define C_028C34_S15_X 0xF0FFFFFF
8638 #define S_028C34_S15_Y(x) (((x) & 0x0F) << 28)
8639 #define G_028C34_S15_Y(x) (((x) >> 28) & 0x0F)
8640 #define C_028C34_S15_Y 0x0FFFFFFF
8641 #define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38
8642 #define S_028C38_AA_MASK_X0Y0(x) (((x) & 0xFFFF) << 0)
8643 #define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF)
8644 #define C_028C38_AA_MASK_X0Y0 0xFFFF0000
8645 #define S_028C38_AA_MASK_X1Y0(x) (((x) & 0xFFFF) << 16)
8646 #define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF)
8647 #define C_028C38_AA_MASK_X1Y0 0x0000FFFF
8648 #define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C
8649 #define S_028C3C_AA_MASK_X0Y1(x) (((x) & 0xFFFF) << 0)
8650 #define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF)
8651 #define C_028C3C_AA_MASK_X0Y1 0xFFFF0000
8652 #define S_028C3C_AA_MASK_X1Y1(x) (((x) & 0xFFFF) << 16)
8653 #define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF)
8654 #define C_028C3C_AA_MASK_X1Y1 0x0000FFFF
8656 #define R_028C40_PA_SC_SHADER_CONTROL 0x028C40
8657 #define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) & 0x03) << 0)
8658 #define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x03)
8659 #define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC
8661 #define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58
8662 #define S_028C58_VTX_REUSE_DEPTH(x) (((x) & 0xFF) << 0)
8663 #define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF)
8664 #define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00
8665 #define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C
8666 #define S_028C5C_DEALLOC_DIST(x) (((x) & 0x7F) << 0)
8667 #define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F)
8668 #define C_028C5C_DEALLOC_DIST 0xFFFFFF80
8669 #define R_028C60_CB_COLOR0_BASE 0x028C60
8670 #define R_028C64_CB_COLOR0_PITCH 0x028C64
8671 #define S_028C64_TILE_MAX(x) (((x) & 0x7FF) << 0)
8672 #define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF)
8673 #define C_028C64_TILE_MAX 0xFFFFF800
8675 #define S_028C64_FMASK_TILE_MAX(x) (((x) & 0x7FF) << 20)
8676 #define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF)
8677 #define C_028C64_FMASK_TILE_MAX 0x800FFFFF
8679 #define R_028C68_CB_COLOR0_SLICE 0x028C68
8680 #define S_028C68_TILE_MAX(x) (((x) & 0x3FFFFF) << 0)
8681 #define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF)
8682 #define C_028C68_TILE_MAX 0xFFC00000
8683 #define R_028C6C_CB_COLOR0_VIEW 0x028C6C
8684 #define S_028C6C_SLICE_START(x) (((x) & 0x7FF) << 0)
8685 #define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF)
8686 #define C_028C6C_SLICE_START 0xFFFFF800
8687 #define S_028C6C_SLICE_MAX(x) (((x) & 0x7FF) << 13)
8688 #define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
8689 #define C_028C6C_SLICE_MAX 0xFF001FFF
8690 #define R_028C70_CB_COLOR0_INFO 0x028C70
8691 #define S_028C70_ENDIAN(x) (((x) & 0x03) << 0)
8692 #define G_028C70_ENDIAN(x) (((x) >> 0) & 0x03)
8693 #define C_028C70_ENDIAN 0xFFFFFFFC
8694 #define V_028C70_ENDIAN_NONE 0x00
8695 #define V_028C70_ENDIAN_8IN16 0x01
8696 #define V_028C70_ENDIAN_8IN32 0x02
8697 #define V_028C70_ENDIAN_8IN64 0x03
8698 #define S_028C70_FORMAT(x) (((x) & 0x1F) << 2)
8699 #define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F)
8700 #define C_028C70_FORMAT 0xFFFFFF83
8701 #define V_028C70_COLOR_INVALID 0x00
8702 #define V_028C70_COLOR_8 0x01
8703 #define V_028C70_COLOR_16 0x02
8704 #define V_028C70_COLOR_8_8 0x03
8705 #define V_028C70_COLOR_32 0x04
8706 #define V_028C70_COLOR_16_16 0x05
8707 #define V_028C70_COLOR_10_11_11 0x06
8708 #define V_028C70_COLOR_11_11_10 0x07
8709 #define V_028C70_COLOR_10_10_10_2 0x08
8710 #define V_028C70_COLOR_2_10_10_10 0x09
8711 #define V_028C70_COLOR_8_8_8_8 0x0A
8712 #define V_028C70_COLOR_32_32 0x0B
8713 #define V_028C70_COLOR_16_16_16_16 0x0C
8714 #define V_028C70_COLOR_32_32_32_32 0x0E
8715 #define V_028C70_COLOR_5_6_5 0x10
8716 #define V_028C70_COLOR_1_5_5_5 0x11
8717 #define V_028C70_COLOR_5_5_5_1 0x12
8718 #define V_028C70_COLOR_4_4_4_4 0x13
8719 #define V_028C70_COLOR_8_24 0x14
8720 #define V_028C70_COLOR_24_8 0x15
8721 #define V_028C70_COLOR_X24_8_32_FLOAT 0x16
8722 #define S_028C70_LINEAR_GENERAL(x) (((x) & 0x1) << 7)
8723 #define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1)
8724 #define C_028C70_LINEAR_GENERAL 0xFFFFFF7F
8725 #define S_028C70_NUMBER_TYPE(x) (((x) & 0x07) << 8)
8726 #define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x07)
8727 #define C_028C70_NUMBER_TYPE 0xFFFFF8FF
8728 #define V_028C70_NUMBER_UNORM 0x00
8729 #define V_028C70_NUMBER_SNORM 0x01
8730 #define V_028C70_NUMBER_UINT 0x04
8731 #define V_028C70_NUMBER_SINT 0x05
8732 #define V_028C70_NUMBER_SRGB 0x06
8733 #define V_028C70_NUMBER_FLOAT 0x07
8734 #define S_028C70_COMP_SWAP(x) (((x) & 0x03) << 11)
8735 #define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x03)
8736 #define C_028C70_COMP_SWAP 0xFFFFE7FF
8737 #define V_028C70_SWAP_STD 0x00
8738 #define V_028C70_SWAP_ALT 0x01
8739 #define V_028C70_SWAP_STD_REV 0x02
8740 #define V_028C70_SWAP_ALT_REV 0x03
8741 #define S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 13)
8742 #define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1)
8743 #define C_028C70_FAST_CLEAR 0xFFFFDFFF
8744 #define S_028C70_COMPRESSION(x) (((x) & 0x1) << 14)
8745 #define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1)
8746 #define C_028C70_COMPRESSION 0xFFFFBFFF
8747 #define S_028C70_BLEND_CLAMP(x) (((x) & 0x1) << 15)
8748 #define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1)
8749 #define C_028C70_BLEND_CLAMP 0xFFFF7FFF
8750 #define S_028C70_BLEND_BYPASS(x) (((x) & 0x1) << 16)
8751 #define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1)
8752 #define C_028C70_BLEND_BYPASS 0xFFFEFFFF
8753 #define S_028C70_SIMPLE_FLOAT(x) (((x) & 0x1) << 17)
8754 #define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1)
8755 #define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF
8756 #define S_028C70_ROUND_MODE(x) (((x) & 0x1) << 18)
8757 #define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1)
8758 #define C_028C70_ROUND_MODE 0xFFFBFFFF
8759 #define S_028C70_CMASK_IS_LINEAR(x) (((x) & 0x1) << 19)
8760 #define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1)
8761 #define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF
8762 #define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) & 0x07) << 20)
8763 #define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x07)
8764 #define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF
8765 #define V_028C70_FORCE_OPT_AUTO 0x00
8766 #define V_028C70_FORCE_OPT_DISABLE 0x01
8767 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02
8768 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03
8769 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04
8770 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05
8771 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06
8772 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07
8773 #define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) & 0x07) << 23)
8774 #define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x07)
8775 #define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF
8776 #define V_028C70_FORCE_OPT_AUTO 0x00
8777 #define V_028C70_FORCE_OPT_DISABLE 0x01
8778 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02
8779 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03
8780 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04
8781 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05
8782 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06
8783 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07
8785 #define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) & 0x1) << 26)
8786 #define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1)
8787 #define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF
8790 #define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) & 0x1) << 27)
8791 #define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1)
8792 #define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF
8793 #define S_028C70_DCC_ENABLE(x) (((x) & 0x1) << 28)
8794 #define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1)
8795 #define C_028C70_DCC_ENABLE 0xEFFFFFFF
8796 #define S_028C70_CMASK_ADDR_TYPE(x) (((x) & 0x03) << 29)
8797 #define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x03)
8798 #define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF
8800 #define R_028C74_CB_COLOR0_ATTRIB 0x028C74
8801 #define S_028C74_TILE_MODE_INDEX(x) (((x) & 0x1F) << 0)
8802 #define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F)
8803 #define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0
8804 #define S_028C74_FMASK_TILE_MODE_INDEX(x) (((x) & 0x1F) << 5)
8805 #define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F)
8806 #define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F
8807 #define S_028C74_FMASK_BANK_HEIGHT(x) (((x) & 0x03) << 10)
8808 #define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x03)
8809 #define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF
8810 #define S_028C74_NUM_SAMPLES(x) (((x) & 0x07) << 12)
8811 #define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07)
8812 #define C_028C74_NUM_SAMPLES 0xFFFF8FFF
8813 #define S_028C74_NUM_FRAGMENTS(x) (((x) & 0x03) << 15)
8814 #define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x03)
8815 #define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF
8816 #define S_028C74_FORCE_DST_ALPHA_1(x) (((x) & 0x1) << 17)
8817 #define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1)
8818 #define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF
8820 #define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78
8821 #define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) & 0x1) << 0)
8822 #define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1)
8823 #define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE
8824 #define S_028C78_KEY_CLEAR_ENABLE(x) (((x) & 0x1) << 1)
8825 #define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1)
8826 #define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD
8827 #define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) & 0x03) << 2)
8828 #define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03)
8829 #define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3
8830 #define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) & 0x1) << 4)
8831 #define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1)
8832 #define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF
8833 #define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) & 0x03) << 5)
8834 #define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03)
8835 #define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F
8836 #define S_028C78_COLOR_TRANSFORM(x) (((x) & 0x03) << 7)
8837 #define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x03)
8838 #define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F
8839 #define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) & 0x1) << 9)
8840 #define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1)
8841 #define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF
8842 #define S_028C78_LOSSY_RGB_PRECISION(x) (((x) & 0x0F) << 10)
8843 #define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0x0F)
8844 #define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF
8845 #define S_028C78_LOSSY_ALPHA_PRECISION(x) (((x) & 0x0F) << 14)
8846 #define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0x0F)
8847 #define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF
8849 #define R_028C7C_CB_COLOR0_CMASK 0x028C7C
8850 #define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80
8851 #define S_028C80_TILE_MAX(x) (((x) & 0x3FFF) << 0)
8852 #define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF)
8853 #define C_028C80_TILE_MAX 0xFFFFC000
8854 #define R_028C84_CB_COLOR0_FMASK 0x028C84
8855 #define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88
8856 #define S_028C88_TILE_MAX(x) (((x) & 0x3FFFFF) << 0)
8857 #define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF)
8858 #define C_028C88_TILE_MAX 0xFFC00000
8859 #define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C
8860 #define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90
8861 #define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* VI */
8862 #define R_028C9C_CB_COLOR1_BASE 0x028C9C
8863 #define R_028CA0_CB_COLOR1_PITCH 0x028CA0
8864 #define R_028CA4_CB_COLOR1_SLICE 0x028CA4
8865 #define R_028CA8_CB_COLOR1_VIEW 0x028CA8
8866 #define R_028CAC_CB_COLOR1_INFO 0x028CAC
8867 #define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0
8868 #define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* VI */
8869 #define R_028CB8_CB_COLOR1_CMASK 0x028CB8
8870 #define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC
8871 #define R_028CC0_CB_COLOR1_FMASK 0x028CC0
8872 #define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4
8873 #define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8
8874 #define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC
8875 #define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* VI */
8876 #define R_028CD8_CB_COLOR2_BASE 0x028CD8
8877 #define R_028CDC_CB_COLOR2_PITCH 0x028CDC
8878 #define R_028CE0_CB_COLOR2_SLICE 0x028CE0
8879 #define R_028CE4_CB_COLOR2_VIEW 0x028CE4
8880 #define R_028CE8_CB_COLOR2_INFO 0x028CE8
8881 #define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC
8882 #define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* VI */
8883 #define R_028CF4_CB_COLOR2_CMASK 0x028CF4
8884 #define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8
8885 #define R_028CFC_CB_COLOR2_FMASK 0x028CFC
8886 #define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00
8887 #define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04
8888 #define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08
8889 #define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* VI */
8890 #define R_028D14_CB_COLOR3_BASE 0x028D14
8891 #define R_028D18_CB_COLOR3_PITCH 0x028D18
8892 #define R_028D1C_CB_COLOR3_SLICE 0x028D1C
8893 #define R_028D20_CB_COLOR3_VIEW 0x028D20
8894 #define R_028D24_CB_COLOR3_INFO 0x028D24
8895 #define R_028D28_CB_COLOR3_ATTRIB 0x028D28
8896 #define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* VI */
8897 #define R_028D30_CB_COLOR3_CMASK 0x028D30
8898 #define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34
8899 #define R_028D38_CB_COLOR3_FMASK 0x028D38
8900 #define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C
8901 #define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40
8902 #define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44
8903 #define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* VI */
8904 #define R_028D50_CB_COLOR4_BASE 0x028D50
8905 #define R_028D54_CB_COLOR4_PITCH 0x028D54
8906 #define R_028D58_CB_COLOR4_SLICE 0x028D58
8907 #define R_028D5C_CB_COLOR4_VIEW 0x028D5C
8908 #define R_028D60_CB_COLOR4_INFO 0x028D60
8909 #define R_028D64_CB_COLOR4_ATTRIB 0x028D64
8910 #define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* VI */
8911 #define R_028D6C_CB_COLOR4_CMASK 0x028D6C
8912 #define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70
8913 #define R_028D74_CB_COLOR4_FMASK 0x028D74
8914 #define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78
8915 #define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C
8916 #define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80
8917 #define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* VI */
8918 #define R_028D8C_CB_COLOR5_BASE 0x028D8C
8919 #define R_028D90_CB_COLOR5_PITCH 0x028D90
8920 #define R_028D94_CB_COLOR5_SLICE 0x028D94
8921 #define R_028D98_CB_COLOR5_VIEW 0x028D98
8922 #define R_028D9C_CB_COLOR5_INFO 0x028D9C
8923 #define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0
8924 #define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* VI */
8925 #define R_028DA8_CB_COLOR5_CMASK 0x028DA8
8926 #define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC
8927 #define R_028DB0_CB_COLOR5_FMASK 0x028DB0
8928 #define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4
8929 #define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8
8930 #define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC
8931 #define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* VI */
8932 #define R_028DC8_CB_COLOR6_BASE 0x028DC8
8933 #define R_028DCC_CB_COLOR6_PITCH 0x028DCC
8934 #define R_028DD0_CB_COLOR6_SLICE 0x028DD0
8935 #define R_028DD4_CB_COLOR6_VIEW 0x028DD4
8936 #define R_028DD8_CB_COLOR6_INFO 0x028DD8
8937 #define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC
8938 #define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* VI */
8939 #define R_028DE4_CB_COLOR6_CMASK 0x028DE4
8940 #define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8
8941 #define R_028DEC_CB_COLOR6_FMASK 0x028DEC
8942 #define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0
8943 #define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4
8944 #define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8
8945 #define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* VI */
8946 #define R_028E04_CB_COLOR7_BASE 0x028E04
8947 #define R_028E08_CB_COLOR7_PITCH 0x028E08
8948 #define R_028E0C_CB_COLOR7_SLICE 0x028E0C
8949 #define R_028E10_CB_COLOR7_VIEW 0x028E10
8950 #define R_028E14_CB_COLOR7_INFO 0x028E14
8951 #define R_028E18_CB_COLOR7_ATTRIB 0x028E18
8952 #define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* VI */
8953 #define R_028E20_CB_COLOR7_CMASK 0x028E20
8954 #define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24
8955 #define R_028E28_CB_COLOR7_FMASK 0x028E28
8956 #define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C
8957 #define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30
8958 #define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34
8959 #define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* VI */
8961 /* SI async DMA packets */
8962 #define SI_DMA_PACKET(cmd, sub_cmd, n) ((((cmd) & 0xF) << 28) | \
8963 (((sub_cmd) & 0xFF) << 20) |\
8964 (((n) & 0xFFFFF) << 0))
8965 /* SI async DMA Packet types */
8966 #define SI_DMA_PACKET_WRITE 0x2
8967 #define SI_DMA_PACKET_COPY 0x3
8968 #define SI_DMA_COPY_MAX_SIZE 0xfffe0
8969 #define SI_DMA_COPY_MAX_SIZE_DW 0xffff8
8970 #define SI_DMA_COPY_DWORD_ALIGNED 0x00
8971 #define SI_DMA_COPY_BYTE_ALIGNED 0x40
8972 #define SI_DMA_COPY_TILED 0x8
8973 #define SI_DMA_PACKET_INDIRECT_BUFFER 0x4
8974 #define SI_DMA_PACKET_SEMAPHORE 0x5
8975 #define SI_DMA_PACKET_FENCE 0x6
8976 #define SI_DMA_PACKET_TRAP 0x7
8977 #define SI_DMA_PACKET_SRBM_WRITE 0x9
8978 #define SI_DMA_PACKET_CONSTANT_FILL 0xd
8979 #define SI_DMA_PACKET_NOP 0xf
8981 /* CIK async DMA packets */
8982 #define CIK_SDMA_PACKET(op, sub_op, n) ((((n) & 0xFFFF) << 16) | \
8983 (((sub_op) & 0xFF) << 8) | \
8984 (((op) & 0xFF) << 0))
8985 /* CIK async DMA packet types */
8986 #define CIK_SDMA_OPCODE_NOP 0x0
8987 #define CIK_SDMA_OPCODE_COPY 0x1
8988 #define CIK_SDMA_COPY_SUB_OPCODE_LINEAR 0x0
8989 #define CIK_SDMA_COPY_SUB_OPCODE_TILED 0x1
8990 #define CIK_SDMA_COPY_SUB_OPCODE_SOA 0x3
8991 #define CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW 0x4
8992 #define CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW 0x5
8993 #define CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 0x6
8994 #define CIK_SDMA_OPCODE_WRITE 0x2
8995 #define SDMA_WRITE_SUB_OPCODE_LINEAR 0x0
8996 #define SDMA_WRTIE_SUB_OPCODE_TILED 0x1
8997 #define CIK_SDMA_OPCODE_INDIRECT_BUFFER 0x4
8998 #define CIK_SDMA_PACKET_FENCE 0x5
8999 #define CIK_SDMA_PACKET_TRAP 0x6
9000 #define CIK_SDMA_PACKET_SEMAPHORE 0x7
9001 #define CIK_SDMA_PACKET_CONSTANT_FILL 0xb
9002 #define CIK_SDMA_PACKET_SRBM_WRITE 0xe
9003 #define CIK_SDMA_COPY_MAX_SIZE 0x1fffff
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