src/gallium/drivers/softpipe/sp_tile_cache.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /**
  29  * Texture tile caching.
  30  *
  31  * Author:
  32  *    Brian Paul
  33  */
  34
  35 #include "pipe/p_inlines.h"
  36 #include "util/u_memory.h"
  37 #include "util/u_tile.h"
  38 #include "sp_context.h"
  39 #include "sp_surface.h"
  40 #include "sp_texture.h"
  41 #include "sp_tile_cache.h"
  42
  43 #define NUM_ENTRIES 50
  44
  45
  46 /** XXX move these */
  47 #define MAX_WIDTH 2048
  48 #define MAX_HEIGHT 2048
  49
  50
  51 struct softpipe_tile_cache
  52 {
  53    struct pipe_screen *screen;
  54    struct pipe_surface *surface;  /**< the surface we're caching */
  55    struct pipe_transfer *transfer;
  56    void *transfer_map;
  57    struct pipe_texture *texture;  /**< if caching a texture */
  58    struct softpipe_cached_tile entries[NUM_ENTRIES];
  59    uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32];
  60    float clear_color[4];  /**< for color bufs */
  61    uint clear_val;        /**< for z+stencil, or packed color clear value */
  62    boolean depth_stencil; /**< Is the surface a depth/stencil format? */
  63
  64    struct pipe_transfer *tex_trans;
  65    void *tex_trans_map;
  66    int tex_face, tex_level, tex_z;
  67
  68    struct softpipe_cached_tile tile;  /**< scratch tile for clears */
  69 };
  70
  71
  72 /**
  73  * Return the position in the cache for the tile that contains win pos (x,y).
  74  * We currently use a direct mapped cache so this is like a hack key.
  75  * At some point we should investige something more sophisticated, like
  76  * a LRU replacement policy.
  77  */
  78 #define CACHE_POS(x, y) \
  79    (((x) / TILE_SIZE + ((y) / TILE_SIZE) * 5) % NUM_ENTRIES)
  80
  81
  82
  83 /**
  84  * Is the tile at (x,y) in cleared state?
  85  */
  86 static INLINE uint
  87 is_clear_flag_set(const uint *bitvec, int x, int y)
  88 {
  89    int pos, bit;
  90    x /= TILE_SIZE;
  91    y /= TILE_SIZE;
  92    pos = y * (MAX_WIDTH / TILE_SIZE) + x;
  93    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
  94    bit = bitvec[pos / 32] & (1 << (pos & 31));
  95    return bit;
  96 }
  97
  98
  99 /**
 100  * Mark the tile at (x,y) as not cleared.
 101  */
 102 static INLINE void
 103 clear_clear_flag(uint *bitvec, int x, int y)
 104 {
 105    int pos;
 106    x /= TILE_SIZE;
 107    y /= TILE_SIZE;
 108    pos = y * (MAX_WIDTH / TILE_SIZE) + x;
 109    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
 110    bitvec[pos / 32] &= ~(1 << (pos & 31));
 111 }
 112
 113
 114 struct softpipe_tile_cache *
 115 sp_create_tile_cache( struct pipe_screen *screen )
 116 {
 117    struct softpipe_tile_cache *tc;
 118    uint pos;
 119
 120    tc = CALLOC_STRUCT( softpipe_tile_cache );
 121    if (tc) {
 122       tc->screen = screen;
 123       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 124          tc->entries[pos].x =
 125          tc->entries[pos].y = -1;
 126       }
 127    }
 128    return tc;
 129 }
 130
 131
 132 void
 133 sp_destroy_tile_cache(struct softpipe_tile_cache *tc)
 134 {
 135    struct pipe_screen *screen;
 136    uint pos;
 137
 138    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 139       /*assert(tc->entries[pos].x < 0);*/
 140    }
 141    if (tc->transfer) {
 142       screen = tc->transfer->texture->screen;
 143       screen->tex_transfer_destroy(tc->transfer);
 144    }
 145    if (tc->tex_trans) {
 146       screen = tc->tex_trans->texture->screen;
 147       screen->tex_transfer_destroy(tc->tex_trans);
 148    }
 149
 150    FREE( tc );
 151 }
 152
 153
 154 /**
 155  * Specify the surface to cache.
 156  */
 157 void
 158 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
 159                           struct pipe_surface *ps)
 160 {
 161    assert(!tc->texture);
 162
 163    if (tc->transfer) {
 164       struct pipe_screen *screen = tc->transfer->texture->screen;
 165
 166       if (ps == tc->surface)
 167          return;
 168
 169       if (tc->transfer_map) {
 170          screen->transfer_unmap(screen, tc->transfer);
 171          tc->transfer_map = NULL;
 172       }
 173
 174       screen->tex_transfer_destroy(tc->transfer);
 175       tc->transfer = NULL;
 176    }
 177
 178    tc->surface = ps;
 179
 180    if (ps) {
 181       struct pipe_screen *screen = ps->texture->screen;
 182
 183       tc->transfer = screen->get_tex_transfer(screen, ps->texture, ps->face,
 184                                               ps->level, ps->zslice,
 185                                               PIPE_TRANSFER_READ_WRITE,
 186                                               0, 0, ps->width, ps->height);
 187
 188       tc->depth_stencil = (ps->format == PIPE_FORMAT_S8Z24_UNORM ||
 189                            ps->format == PIPE_FORMAT_X8Z24_UNORM ||
 190                            ps->format == PIPE_FORMAT_Z24S8_UNORM ||
 191                            ps->format == PIPE_FORMAT_Z24X8_UNORM ||
 192                            ps->format == PIPE_FORMAT_Z16_UNORM ||
 193                            ps->format == PIPE_FORMAT_Z32_UNORM ||
 194                            ps->format == PIPE_FORMAT_S8_UNORM);
 195    }
 196 }
 197
 198
 199 /**
 200  * Return the transfer being cached.
 201  */
 202 struct pipe_surface *
 203 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc)
 204 {
 205    return tc->surface;
 206 }
 207
 208
 209 void
 210 sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc)
 211 {
 212    if (tc->transfer && !tc->transfer_map)
 213       tc->transfer_map = tc->screen->transfer_map(tc->screen, tc->transfer);
 214
 215    if (tc->tex_trans && !tc->tex_trans_map)
 216       tc->tex_trans_map = tc->screen->transfer_map(tc->screen, tc->tex_trans);
 217 }
 218
 219
 220 void
 221 sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc)
 222 {
 223    if (tc->transfer_map) {
 224       tc->screen->transfer_unmap(tc->screen, tc->transfer);
 225       tc->transfer_map = NULL;
 226    }
 227
 228    if (tc->tex_trans_map) {
 229       tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 230       tc->tex_trans_map = NULL;
 231    }
 232 }
 233
 234
 235 /**
 236  * Specify the texture to cache.
 237  */
 238 void
 239 sp_tile_cache_set_texture(struct softpipe_tile_cache *tc,
 240                           struct pipe_texture *texture)
 241 {
 242    uint i;
 243
 244    assert(!tc->transfer);
 245
 246    pipe_texture_reference(&tc->texture, texture);
 247
 248    if (tc->tex_trans) {
 249       struct pipe_screen *screen = tc->tex_trans->texture->screen;
 250
 251       if (tc->tex_trans_map) {
 252          screen->transfer_unmap(screen, tc->tex_trans);
 253          tc->tex_trans_map = NULL;
 254       }
 255
 256       screen->tex_transfer_destroy(tc->tex_trans);
 257       tc->tex_trans = NULL;
 258    }
 259
 260    /* mark as entries as invalid/empty */
 261    /* XXX we should try to avoid this when the teximage hasn't changed */
 262    for (i = 0; i < NUM_ENTRIES; i++) {
 263       tc->entries[i].x = -1;
 264    }
 265
 266    tc->tex_face = -1; /* any invalid value here */
 267 }
 268
 269
 270 /**
 271  * Set pixels in a tile to the given clear color/value, float.
 272  */
 273 static void
 274 clear_tile_rgba(struct softpipe_cached_tile *tile,
 275                 enum pipe_format format,
 276                 const float clear_value[4])
 277 {
 278    if (clear_value[0] == 0.0 &&
 279        clear_value[1] == 0.0 &&
 280        clear_value[2] == 0.0 &&
 281        clear_value[3] == 0.0) {
 282       memset(tile->data.color, 0, sizeof(tile->data.color));
 283    }
 284    else {
 285       uint i, j;
 286       for (i = 0; i < TILE_SIZE; i++) {
 287          for (j = 0; j < TILE_SIZE; j++) {
 288             tile->data.color[i][j][0] = clear_value[0];
 289             tile->data.color[i][j][1] = clear_value[1];
 290             tile->data.color[i][j][2] = clear_value[2];
 291             tile->data.color[i][j][3] = clear_value[3];
 292          }
 293       }
 294    }
 295 }
 296
 297
 298 /**
 299  * Set a tile to a solid value/color.
 300  */
 301 static void
 302 clear_tile(struct softpipe_cached_tile *tile,
 303            enum pipe_format format,
 304            uint clear_value)
 305 {
 306    uint i, j;
 307
 308    switch (pf_get_size(format)) {
 309    case 1:
 310       memset(tile->data.any, 0, TILE_SIZE * TILE_SIZE);
 311       break;
 312    case 2:
 313       if (clear_value == 0) {
 314          memset(tile->data.any, 0, 2 * TILE_SIZE * TILE_SIZE);
 315       }
 316       else {
 317          for (i = 0; i < TILE_SIZE; i++) {
 318             for (j = 0; j < TILE_SIZE; j++) {
 319                tile->data.depth16[i][j] = (ushort) clear_value;
 320             }
 321          }
 322       }
 323       break;
 324    case 4:
 325       if (clear_value == 0) {
 326          memset(tile->data.any, 0, 4 * TILE_SIZE * TILE_SIZE);
 327       }
 328       else {
 329          for (i = 0; i < TILE_SIZE; i++) {
 330             for (j = 0; j < TILE_SIZE; j++) {
 331                tile->data.color32[i][j] = clear_value;
 332             }
 333          }
 334       }
 335       break;
 336    default:
 337       assert(0);
 338    }
 339 }
 340
 341
 342 /**
 343  * Actually clear the tiles which were flagged as being in a clear state.
 344  */
 345 static void
 346 sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc)
 347 {
 348    struct pipe_transfer *pt = tc->transfer;
 349    const uint w = tc->transfer->width;
 350    const uint h = tc->transfer->height;
 351    uint x, y;
 352    uint numCleared = 0;
 353
 354    /* clear the scratch tile to the clear value */
 355    clear_tile(&tc->tile, pt->format, tc->clear_val);
 356
 357    /* push the tile to all positions marked as clear */
 358    for (y = 0; y < h; y += TILE_SIZE) {
 359       for (x = 0; x < w; x += TILE_SIZE) {
 360          if (is_clear_flag_set(tc->clear_flags, x, y)) {
 361             pipe_put_tile_raw(pt,
 362                               x, y, TILE_SIZE, TILE_SIZE,
 363                               tc->tile.data.color32, 0/*STRIDE*/);
 364
 365             /* do this? */
 366             clear_clear_flag(tc->clear_flags, x, y);
 367
 368             numCleared++;
 369          }
 370       }
 371    }
 372 #if 0
 373    debug_printf("num cleared: %u\n", numCleared);
 374 #endif
 375 }
 376
 377
 378 /**
 379  * Flush the tile cache: write all dirty tiles back to the transfer.
 380  * any tiles "flagged" as cleared will be "really" cleared.
 381  */
 382 void
 383 sp_flush_tile_cache(struct softpipe_tile_cache *tc)
 384 {
 385    struct pipe_transfer *pt = tc->transfer;
 386    int inuse = 0, pos;
 387
 388    if (pt) {
 389       /* caching a drawing transfer */
 390       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 391          struct softpipe_cached_tile *tile = tc->entries + pos;
 392          if (tile->x >= 0) {
 393             if (tc->depth_stencil) {
 394                pipe_put_tile_raw(pt,
 395                                  tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 396                                  tile->data.depth32, 0/*STRIDE*/);
 397             }
 398             else {
 399                pipe_put_tile_rgba(pt,
 400                                   tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 401                                   (float *) tile->data.color);
 402             }
 403             tile->x = tile->y = -1;  /* mark as empty */
 404             inuse++;
 405          }
 406       }
 407
 408 #if TILE_CLEAR_OPTIMIZATION
 409       sp_tile_cache_flush_clear(tc);
 410 #endif
 411    }
 412    else if (tc->texture) {
 413       /* caching a texture, mark all entries as empty */
 414       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 415          tc->entries[pos].x = -1;
 416       }
 417       tc->tex_face = -1;
 418    }
 419
 420 #if 0
 421    debug_printf("flushed tiles in use: %d\n", inuse);
 422 #endif
 423 }
 424
 425
 426 /**
 427  * Get a tile from the cache.
 428  * \param x, y  position of tile, in pixels
 429  */
 430 struct softpipe_cached_tile *
 431 sp_get_cached_tile(struct softpipe_tile_cache *tc, int x, int y)
 432 {
 433    struct pipe_transfer *pt = tc->transfer;
 434
 435    /* tile pos in framebuffer: */
 436    const int tile_x = x & ~(TILE_SIZE - 1);
 437    const int tile_y = y & ~(TILE_SIZE - 1);
 438
 439    /* cache pos/entry: */
 440    const int pos = CACHE_POS(x, y);
 441    struct softpipe_cached_tile *tile = tc->entries + pos;
 442
 443    if (tile_x != tile->x ||
 444        tile_y != tile->y) {
 445
 446       if (tile->x != -1) {
 447          /* put dirty tile back in framebuffer */
 448          if (tc->depth_stencil) {
 449             pipe_put_tile_raw(pt,
 450                               tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 451                               tile->data.depth32, 0/*STRIDE*/);
 452          }
 453          else {
 454             pipe_put_tile_rgba(pt,
 455                                tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 456                                (float *) tile->data.color);
 457          }
 458       }
 459
 460       tile->x = tile_x;
 461       tile->y = tile_y;
 462
 463       if (is_clear_flag_set(tc->clear_flags, x, y)) {
 464          /* don't get tile from framebuffer, just clear it */
 465          if (tc->depth_stencil) {
 466             clear_tile(tile, pt->format, tc->clear_val);
 467          }
 468          else {
 469             clear_tile_rgba(tile, pt->format, tc->clear_color);
 470          }
 471          clear_clear_flag(tc->clear_flags, x, y);
 472       }
 473       else {
 474          /* get new tile data from transfer */
 475          if (tc->depth_stencil) {
 476             pipe_get_tile_raw(pt,
 477                               tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 478                               tile->data.depth32, 0/*STRIDE*/);
 479          }
 480          else {
 481             pipe_get_tile_rgba(pt,
 482                                tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 483                                (float *) tile->data.color);
 484          }
 485       }
 486    }
 487
 488    return tile;
 489 }
 490
 491
 492 /**
 493  * Given the texture face, level, zslice, x and y values, compute
 494  * the cache entry position/index where we'd hope to find the
 495  * cached texture tile.
 496  * This is basically a direct-map cache.
 497  * XXX There's probably lots of ways in which we can improve this.
 498  */
 499 static INLINE uint
 500 tex_cache_pos(int x, int y, int z, int face, int level)
 501 {
 502    uint entry = x + y * 9 + z * 3 + face + level * 7;
 503    return entry % NUM_ENTRIES;
 504 }
 505
 506
 507 /**
 508  * Similar to sp_get_cached_tile() but for textures.
 509  * Tiles are read-only and indexed with more params.
 510  */
 511 const struct softpipe_cached_tile *
 512 sp_get_cached_tile_tex(struct softpipe_tile_cache *tc,
 513                        int x, int y, int z,
 514                        int face, int level)
 515 {
 516    struct pipe_screen *screen = tc->screen;
 517    /* tile pos in framebuffer: */
 518    const int tile_x = x & ~(TILE_SIZE - 1);
 519    const int tile_y = y & ~(TILE_SIZE - 1);
 520    /* cache pos/entry: */
 521    const uint pos = tex_cache_pos(x / TILE_SIZE, y / TILE_SIZE, z,
 522                                   face, level);
 523    struct softpipe_cached_tile *tile = tc->entries + pos;
 524
 525    if (tc->texture) {
 526       struct softpipe_texture *spt = softpipe_texture(tc->texture);
 527       if (spt->modified) {
 528          /* texture was modified, invalidate all cached tiles */
 529          uint p;
 530          for (p = 0; p < NUM_ENTRIES; p++) {
 531             tile = tc->entries + p;
 532             tile->x = -1;
 533          }
 534          spt->modified = FALSE;
 535       }
 536    }
 537
 538    if (tile_x != tile->x ||
 539        tile_y != tile->y ||
 540        z != tile->z ||
 541        face != tile->face ||
 542        level != tile->level) {
 543       /* cache miss */
 544
 545 #if 0
 546       printf("miss at %u  x=%d y=%d z=%d face=%d level=%d\n", pos,
 547              x/TILE_SIZE, y/TILE_SIZE, z, face, level);
 548 #endif
 549       /* check if we need to get a new transfer */
 550       if (!tc->tex_trans ||
 551           tc->tex_face != face ||
 552           tc->tex_level != level ||
 553           tc->tex_z != z) {
 554          /* get new transfer (view into texture) */
 555
 556          if (tc->tex_trans) {
 557             if (tc->tex_trans_map) {
 558                tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 559                tc->tex_trans_map = NULL;
 560             }
 561
 562             screen->tex_transfer_destroy(tc->tex_trans);
 563             tc->tex_trans = NULL;
 564          }
 565
 566          tc->tex_trans = screen->get_tex_transfer(screen, tc->texture, face, level, z,
 567                                                   PIPE_TRANSFER_READ, 0, 0,
 568                                                   tc->texture->width[level],
 569                                                   tc->texture->height[level]);
 570          tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
 571
 572          tc->tex_face = face;
 573          tc->tex_level = level;
 574          tc->tex_z = z;
 575       }
 576
 577       /* get tile from the transfer (view into texture) */
 578       pipe_get_tile_rgba(tc->tex_trans,
 579                          tile_x, tile_y, TILE_SIZE, TILE_SIZE,
 580                          (float *) tile->data.color);
 581       tile->x = tile_x;
 582       tile->y = tile_y;
 583       tile->z = z;
 584       tile->face = face;
 585       tile->level = level;
 586    }
 587
 588    return tile;
 589 }
 590
 591
 592 /**
 593  * When a whole surface is being cleared to a value we can avoid
 594  * fetching tiles above.
 595  * Save the color and set a 'clearflag' for each tile of the screen.
 596  */
 597 void
 598 sp_tile_cache_clear(struct softpipe_tile_cache *tc, const float *rgba,
 599                     uint clearValue)
 600 {
 601    uint pos;
 602
 603    tc->clear_color[0] = rgba[0];
 604    tc->clear_color[1] = rgba[1];
 605    tc->clear_color[2] = rgba[2];
 606    tc->clear_color[3] = rgba[3];
 607
 608    tc->clear_val = clearValue;
 609
 610 #if TILE_CLEAR_OPTIMIZATION
 611    /* set flags to indicate all the tiles are cleared */
 612    memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
 613 #else
 614    /* disable the optimization */
 615    memset(tc->clear_flags, 0, sizeof(tc->clear_flags));
 616 #endif
 617
 618    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 619       struct softpipe_cached_tile *tile = tc->entries + pos;
 620       tile->x = tile->y = -1;
 621    }
 622 }