src/gallium/drivers/softpipe/sp_tile_cache.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /**
  29  * Texture tile caching.
  30  *
  31  * Author:
  32  *    Brian Paul
  33  */
  34
  35 #include "pipe/p_inlines.h"
  36 #include "util/u_memory.h"
  37 #include "util/u_tile.h"
  38 #include "sp_context.h"
  39 #include "sp_surface.h"
  40 #include "sp_texture.h"
  41 #include "sp_tile_cache.h"
  42
  43 #define NUM_ENTRIES 50
  44
  45
  46 /** XXX move these */
  47 #define MAX_WIDTH 2048
  48 #define MAX_HEIGHT 2048
  49
  50
  51 struct softpipe_tile_cache
  52 {
  53    struct pipe_screen *screen;
  54    struct pipe_surface *surface;  /**< the surface we're caching */
  55    struct pipe_transfer *transfer;
  56    void *transfer_map;
  57    struct pipe_texture *texture;  /**< if caching a texture */
  58    struct softpipe_cached_tile entries[NUM_ENTRIES];
  59    uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32];
  60    float clear_color[4];
  61    uint clear_val;
  62    boolean depth_stencil; /** Is the surface a depth/stencil format? */
  63
  64    struct pipe_transfer *tex_trans;
  65    void *tex_trans_map;
  66    int tex_face, tex_level, tex_z;
  67
  68    struct softpipe_cached_tile tile;  /**< scratch tile for clears */
  69 };
  70
  71
  72 /**
  73  * Return the position in the cache for the tile that contains win pos (x,y).
  74  * We currently use a direct mapped cache so this is like a hack key.
  75  * At some point we should investige something more sophisticated, like
  76  * a LRU replacement policy.
  77  */
  78 #define CACHE_POS(x, y) \
  79    (((x) / TILE_SIZE + ((y) / TILE_SIZE) * 5) % NUM_ENTRIES)
  80
  81
  82
  83 /**
  84  * Is the tile at (x,y) in cleared state?
  85  */
  86 static INLINE uint
  87 is_clear_flag_set(const uint *bitvec, int x, int y)
  88 {
  89    int pos, bit;
  90    x /= TILE_SIZE;
  91    y /= TILE_SIZE;
  92    pos = y * (MAX_WIDTH / TILE_SIZE) + x;
  93    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
  94    bit = bitvec[pos / 32] & (1 << (pos & 31));
  95    return bit;
  96 }
  97
  98
  99 /**
 100  * Mark the tile at (x,y) as not cleared.
 101  */
 102 static INLINE void
 103 clear_clear_flag(uint *bitvec, int x, int y)
 104 {
 105    int pos;
 106    x /= TILE_SIZE;
 107    y /= TILE_SIZE;
 108    pos = y * (MAX_WIDTH / TILE_SIZE) + x;
 109    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
 110    bitvec[pos / 32] &= ~(1 << (pos & 31));
 111 }
 112
 113
 114 struct softpipe_tile_cache *
 115 sp_create_tile_cache( struct pipe_screen *screen )
 116 {
 117    struct softpipe_tile_cache *tc;
 118    uint pos;
 119
 120    tc = CALLOC_STRUCT( softpipe_tile_cache );
 121    if (tc) {
 122       tc->screen = screen;
 123       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 124          tc->entries[pos].x =
 125          tc->entries[pos].y = -1;
 126       }
 127    }
 128    return tc;
 129 }
 130
 131
 132 void
 133 sp_destroy_tile_cache(struct softpipe_tile_cache *tc)
 134 {
 135    struct pipe_screen *screen;
 136    uint pos;
 137
 138    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 139       /*assert(tc->entries[pos].x < 0);*/
 140    }
 141    if (tc->transfer) {
 142       screen = tc->transfer->texture->screen;
 143       screen->tex_transfer_destroy(tc->transfer);
 144    }
 145    if (tc->tex_trans) {
 146       screen = tc->tex_trans->texture->screen;
 147       screen->tex_transfer_destroy(tc->tex_trans);
 148    }
 149
 150    FREE( tc );
 151 }
 152
 153
 154 /**
 155  * Specify the surface to cache.
 156  */
 157 void
 158 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
 159                           struct pipe_surface *ps)
 160 {
 161    assert(!tc->texture);
 162
 163    if (tc->transfer) {
 164       struct pipe_screen *screen = tc->transfer->texture->screen;
 165
 166       if (ps == tc->surface)
 167          return;
 168
 169       if (tc->transfer_map) {
 170          screen->transfer_unmap(screen, tc->transfer);
 171          tc->transfer_map = NULL;
 172       }
 173
 174       screen->tex_transfer_destroy(tc->transfer);
 175    }
 176
 177    tc->surface = ps;
 178
 179    if (ps) {
 180       struct pipe_screen *screen = ps->texture->screen;
 181
 182       tc->transfer = screen->get_tex_transfer(screen, ps->texture, ps->face,
 183                                               ps->level, ps->zslice,
 184                                               PIPE_TRANSFER_READ_WRITE,
 185                                               0, 0, ps->width, ps->height);
 186
 187       tc->depth_stencil = (ps->format == PIPE_FORMAT_S8Z24_UNORM ||
 188                            ps->format == PIPE_FORMAT_X8Z24_UNORM ||
 189                            ps->format == PIPE_FORMAT_Z24S8_UNORM ||
 190                            ps->format == PIPE_FORMAT_Z24X8_UNORM ||
 191                            ps->format == PIPE_FORMAT_Z16_UNORM ||
 192                            ps->format == PIPE_FORMAT_Z32_UNORM ||
 193                            ps->format == PIPE_FORMAT_S8_UNORM);
 194    }
 195 }
 196
 197
 198 /**
 199  * Return the transfer being cached.
 200  */
 201 struct pipe_surface *
 202 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc)
 203 {
 204    return tc->surface;
 205 }
 206
 207
 208 void
 209 sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc)
 210 {
 211    if (tc->transfer && !tc->transfer_map)
 212       tc->transfer_map = tc->screen->transfer_map(tc->screen, tc->transfer);
 213
 214    if (tc->tex_trans && !tc->tex_trans_map)
 215       tc->tex_trans_map = tc->screen->transfer_map(tc->screen, tc->tex_trans);
 216 }
 217
 218
 219 void
 220 sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc)
 221 {
 222    if (tc->transfer_map) {
 223       tc->screen->transfer_unmap(tc->screen, tc->transfer);
 224       tc->transfer_map = NULL;
 225    }
 226
 227    if (tc->tex_trans_map) {
 228       tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 229       tc->tex_trans_map = NULL;
 230    }
 231 }
 232
 233
 234 /**
 235  * Specify the texture to cache.
 236  */
 237 void
 238 sp_tile_cache_set_texture(struct pipe_context *pipe,
 239                           struct softpipe_tile_cache *tc,
 240                           struct pipe_texture *texture)
 241 {
 242    uint i;
 243
 244    assert(!tc->transfer);
 245
 246    pipe_texture_reference(&tc->texture, texture);
 247
 248    if (tc->transfer) {
 249       struct pipe_screen *screen = tc->transfer->texture->screen;
 250
 251       if (tc->tex_trans_map) {
 252          screen->transfer_unmap(screen, tc->tex_trans);
 253          tc->tex_trans_map = NULL;
 254       }
 255
 256       screen->tex_transfer_destroy(tc->tex_trans);
 257    }
 258
 259    /* mark as entries as invalid/empty */
 260    /* XXX we should try to avoid this when the teximage hasn't changed */
 261    for (i = 0; i < NUM_ENTRIES; i++) {
 262       tc->entries[i].x = -1;
 263    }
 264
 265    tc->tex_face = -1; /* any invalid value here */
 266 }
 267
 268
 269 /**
 270  * Set pixels in a tile to the given clear color/value, float.
 271  */
 272 static void
 273 clear_tile_rgba(struct softpipe_cached_tile *tile,
 274                 enum pipe_format format,
 275                 const float clear_value[4])
 276 {
 277    if (clear_value[0] == 0.0 &&
 278        clear_value[1] == 0.0 &&
 279        clear_value[2] == 0.0 &&
 280        clear_value[3] == 0.0) {
 281       memset(tile->data.color, 0, sizeof(tile->data.color));
 282    }
 283    else {
 284       uint i, j;
 285       for (i = 0; i < TILE_SIZE; i++) {
 286          for (j = 0; j < TILE_SIZE; j++) {
 287             tile->data.color[i][j][0] = clear_value[0];
 288             tile->data.color[i][j][1] = clear_value[1];
 289             tile->data.color[i][j][2] = clear_value[2];
 290             tile->data.color[i][j][3] = clear_value[3];
 291          }
 292       }
 293    }
 294 }
 295
 296
 297 /**
 298  * Set a tile to a solid value/color.
 299  */
 300 static void
 301 clear_tile(struct softpipe_cached_tile *tile,
 302            enum pipe_format format,
 303            uint clear_value)
 304 {
 305    uint i, j;
 306
 307    switch (pf_get_size(format)) {
 308    case 1:
 309       memset(tile->data.any, 0, TILE_SIZE * TILE_SIZE);
 310       break;
 311    case 2:
 312       if (clear_value == 0) {
 313          memset(tile->data.any, 0, 2 * TILE_SIZE * TILE_SIZE);
 314       }
 315       else {
 316          for (i = 0; i < TILE_SIZE; i++) {
 317             for (j = 0; j < TILE_SIZE; j++) {
 318                tile->data.depth16[i][j] = (ushort) clear_value;
 319             }
 320          }
 321       }
 322       break;
 323    case 4:
 324       if (clear_value == 0) {
 325          memset(tile->data.any, 0, 4 * TILE_SIZE * TILE_SIZE);
 326       }
 327       else {
 328          for (i = 0; i < TILE_SIZE; i++) {
 329             for (j = 0; j < TILE_SIZE; j++) {
 330                tile->data.color32[i][j] = clear_value;
 331             }
 332          }
 333       }
 334       break;
 335    default:
 336       assert(0);
 337    }
 338 }
 339
 340
 341 /**
 342  * Actually clear the tiles which were flagged as being in a clear state.
 343  */
 344 static void
 345 sp_tile_cache_flush_clear(struct pipe_context *pipe,
 346                           struct softpipe_tile_cache *tc)
 347 {
 348    struct pipe_transfer *pt = tc->transfer;
 349    const uint w = tc->transfer->width;
 350    const uint h = tc->transfer->height;
 351    uint x, y;
 352    uint numCleared = 0;
 353
 354    /* clear the scratch tile to the clear value */
 355    clear_tile(&tc->tile, pt->format, tc->clear_val);
 356
 357    /* push the tile to all positions marked as clear */
 358    for (y = 0; y < h; y += TILE_SIZE) {
 359       for (x = 0; x < w; x += TILE_SIZE) {
 360          if (is_clear_flag_set(tc->clear_flags, x, y)) {
 361             pipe_put_tile_raw(pt,
 362                               x, y, TILE_SIZE, TILE_SIZE,
 363                               tc->tile.data.color32, 0/*STRIDE*/);
 364
 365             /* do this? */
 366             clear_clear_flag(tc->clear_flags, x, y);
 367
 368             numCleared++;
 369          }
 370       }
 371    }
 372 #if 0
 373    debug_printf("num cleared: %u\n", numCleared);
 374 #endif
 375 }
 376
 377
 378 /**
 379  * Flush the tile cache: write all dirty tiles back to the transfer.
 380  * any tiles "flagged" as cleared will be "really" cleared.
 381  */
 382 void
 383 sp_flush_tile_cache(struct softpipe_context *softpipe,
 384                     struct softpipe_tile_cache *tc)
 385 {
 386    struct pipe_transfer *pt = tc->transfer;
 387    int inuse = 0, pos;
 388
 389    if (pt) {
 390       /* caching a drawing transfer */
 391       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 392          struct softpipe_cached_tile *tile = tc->entries + pos;
 393          if (tile->x >= 0) {
 394             if (tc->depth_stencil) {
 395                pipe_put_tile_raw(pt,
 396                                  tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 397                                  tile->data.depth32, 0/*STRIDE*/);
 398             }
 399             else {
 400                pipe_put_tile_rgba(pt,
 401                                   tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 402                                   (float *) tile->data.color);
 403             }
 404             tile->x = tile->y = -1;  /* mark as empty */
 405             inuse++;
 406          }
 407       }
 408
 409 #if TILE_CLEAR_OPTIMIZATION
 410       sp_tile_cache_flush_clear(&softpipe->pipe, tc);
 411 #endif
 412    }
 413    else if (tc->texture) {
 414       /* caching a texture, mark all entries as empty */
 415       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 416          tc->entries[pos].x = -1;
 417       }
 418       tc->tex_face = -1;
 419    }
 420
 421 #if 0
 422    debug_printf("flushed tiles in use: %d\n", inuse);
 423 #endif
 424 }
 425
 426
 427 /**
 428  * Get a tile from the cache.
 429  * \param x, y  position of tile, in pixels
 430  */
 431 struct softpipe_cached_tile *
 432 sp_get_cached_tile(struct softpipe_context *softpipe,
 433                    struct softpipe_tile_cache *tc, int x, int y)
 434 {
 435    struct pipe_transfer *pt = tc->transfer;
 436
 437    /* tile pos in framebuffer: */
 438    const int tile_x = x & ~(TILE_SIZE - 1);
 439    const int tile_y = y & ~(TILE_SIZE - 1);
 440
 441    /* cache pos/entry: */
 442    const int pos = CACHE_POS(x, y);
 443    struct softpipe_cached_tile *tile = tc->entries + pos;
 444
 445    if (tile_x != tile->x ||
 446        tile_y != tile->y) {
 447
 448       if (tile->x != -1) {
 449          /* put dirty tile back in framebuffer */
 450          if (tc->depth_stencil) {
 451             pipe_put_tile_raw(pt,
 452                               tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 453                               tile->data.depth32, 0/*STRIDE*/);
 454          }
 455          else {
 456             pipe_put_tile_rgba(pt,
 457                                tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 458                                (float *) tile->data.color);
 459          }
 460       }
 461
 462       tile->x = tile_x;
 463       tile->y = tile_y;
 464
 465       if (is_clear_flag_set(tc->clear_flags, x, y)) {
 466          /* don't get tile from framebuffer, just clear it */
 467          if (tc->depth_stencil) {
 468             clear_tile(tile, pt->format, tc->clear_val);
 469          }
 470          else {
 471             clear_tile_rgba(tile, pt->format, tc->clear_color);
 472          }
 473          clear_clear_flag(tc->clear_flags, x, y);
 474       }
 475       else {
 476          /* get new tile data from transfer */
 477          if (tc->depth_stencil) {
 478             pipe_get_tile_raw(pt,
 479                               tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 480                               tile->data.depth32, 0/*STRIDE*/);
 481          }
 482          else {
 483             pipe_get_tile_rgba(pt,
 484                                tile->x, tile->y, TILE_SIZE, TILE_SIZE,
 485                                (float *) tile->data.color);
 486          }
 487       }
 488    }
 489
 490    return tile;
 491 }
 492
 493
 494 /**
 495  * Given the texture face, level, zslice, x and y values, compute
 496  * the cache entry position/index where we'd hope to find the
 497  * cached texture tile.
 498  * This is basically a direct-map cache.
 499  * XXX There's probably lots of ways in which we can improve this.
 500  */
 501 static INLINE uint
 502 tex_cache_pos(int x, int y, int z, int face, int level)
 503 {
 504    uint entry = x + y * 9 + z * 3 + face + level * 7;
 505    return entry % NUM_ENTRIES;
 506 }
 507
 508
 509 /**
 510  * Similar to sp_get_cached_tile() but for textures.
 511  * Tiles are read-only and indexed with more params.
 512  */
 513 const struct softpipe_cached_tile *
 514 sp_get_cached_tile_tex(struct softpipe_context *sp,
 515                        struct softpipe_tile_cache *tc, int x, int y, int z,
 516                        int face, int level)
 517 {
 518    struct pipe_screen *screen = sp->pipe.screen;
 519    /* tile pos in framebuffer: */
 520    const int tile_x = x & ~(TILE_SIZE - 1);
 521    const int tile_y = y & ~(TILE_SIZE - 1);
 522    /* cache pos/entry: */
 523    const uint pos = tex_cache_pos(x / TILE_SIZE, y / TILE_SIZE, z,
 524                                   face, level);
 525    struct softpipe_cached_tile *tile = tc->entries + pos;
 526
 527    if (tc->texture) {
 528       struct softpipe_texture *spt = softpipe_texture(tc->texture);
 529       if (spt->modified) {
 530          /* texture was modified, invalidate all cached tiles */
 531          uint p;
 532          for (p = 0; p < NUM_ENTRIES; p++) {
 533             tile = tc->entries + p;
 534             tile->x = -1;
 535          }
 536          spt->modified = FALSE;
 537       }
 538    }
 539
 540    if (tile_x != tile->x ||
 541        tile_y != tile->y ||
 542        z != tile->z ||
 543        face != tile->face ||
 544        level != tile->level) {
 545       /* cache miss */
 546
 547 #if 0
 548       printf("miss at %u  x=%d y=%d z=%d face=%d level=%d\n", pos,
 549              x/TILE_SIZE, y/TILE_SIZE, z, face, level);
 550 #endif
 551       /* check if we need to get a new transfer */
 552       if (!tc->tex_trans ||
 553           tc->tex_face != face ||
 554           tc->tex_level != level ||
 555           tc->tex_z != z) {
 556          /* get new transfer (view into texture) */
 557
 558          if (tc->transfer) {
 559             if (tc->tex_trans_map)
 560                tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 561
 562             screen->tex_transfer_destroy(tc->tex_trans);
 563          }
 564
 565          tc->tex_trans = screen->get_tex_transfer(screen, tc->texture, face, level, z,
 566                                                   PIPE_TRANSFER_READ, 0, 0,
 567                                                   tc->texture->width[level],
 568                                                   tc->texture->height[level]);
 569          tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
 570
 571          tc->tex_face = face;
 572          tc->tex_level = level;
 573          tc->tex_z = z;
 574       }
 575
 576       /* get tile from the transfer (view into texture) */
 577       pipe_get_tile_rgba(tc->tex_trans,
 578                          tile_x, tile_y, TILE_SIZE, TILE_SIZE,
 579                          (float *) tile->data.color);
 580       tile->x = tile_x;
 581       tile->y = tile_y;
 582       tile->z = z;
 583       tile->face = face;
 584       tile->level = level;
 585    }
 586
 587    return tile;
 588 }
 589
 590
 591 /**
 592  * When a whole surface is being cleared to a value we can avoid
 593  * fetching tiles above.
 594  * Save the color and set a 'clearflag' for each tile of the screen.
 595  */
 596 void
 597 sp_tile_cache_clear(struct softpipe_tile_cache *tc, uint clearValue)
 598 {
 599    uint r, g, b, a;
 600    uint pos;
 601
 602    tc->clear_val = clearValue;
 603
 604    switch (tc->transfer->format) {
 605    case PIPE_FORMAT_R8G8B8A8_UNORM:
 606       r = (clearValue >> 24) & 0xff;
 607       g = (clearValue >> 16) & 0xff;
 608       b = (clearValue >>  8) & 0xff;
 609       a = (clearValue      ) & 0xff;
 610       break;
 611    case PIPE_FORMAT_A8R8G8B8_UNORM:
 612       r = (clearValue >> 16) & 0xff;
 613       g = (clearValue >>  8) & 0xff;
 614       b = (clearValue      ) & 0xff;
 615       a = (clearValue >> 24) & 0xff;
 616       break;
 617    case PIPE_FORMAT_B8G8R8A8_UNORM:
 618       r = (clearValue >>  8) & 0xff;
 619       g = (clearValue >> 16) & 0xff;
 620       b = (clearValue >> 24) & 0xff;
 621       a = (clearValue      ) & 0xff;
 622       break;
 623    default:
 624       r = g = b = a = 0;
 625    }
 626
 627    tc->clear_color[0] = r / 255.0f;
 628    tc->clear_color[1] = g / 255.0f;
 629    tc->clear_color[2] = b / 255.0f;
 630    tc->clear_color[3] = a / 255.0f;
 631
 632 #if TILE_CLEAR_OPTIMIZATION
 633    /* set flags to indicate all the tiles are cleared */
 634    memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
 635 #else
 636    /* disable the optimization */
 637    memset(tc->clear_flags, 0, sizeof(tc->clear_flags));
 638 #endif
 639
 640    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 641       struct softpipe_cached_tile *tile = tc->entries + pos;
 642       tile->x = tile->y = -1;
 643    }
 644 }