src/gallium/drivers/softpipe/sp_tile_cache.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /**
  29  * Render target tile caching.
  30  *
  31  * Author:
  32  *    Brian Paul
  33  */
  34
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_memory.h"
  38 #include "util/u_tile.h"
  39 #include "sp_tile_cache.h"
  40
  41 static struct softpipe_cached_tile *
  42 sp_alloc_tile(struct softpipe_tile_cache *tc);
  43
  44
  45 /**
  46  * Return the position in the cache for the tile that contains win pos (x,y).
  47  * We currently use a direct mapped cache so this is like a hack key.
  48  * At some point we should investige something more sophisticated, like
  49  * a LRU replacement policy.
  50  */
  51 #define CACHE_POS(x, y) \
  52    (((x) + (y) * 5) % NUM_ENTRIES)
  53
  54
  55
  56 /**
  57  * Is the tile at (x,y) in cleared state?
  58  */
  59 static INLINE uint
  60 is_clear_flag_set(const uint *bitvec, union tile_address addr)
  61 {
  62    int pos, bit;
  63    pos = addr.bits.y * (MAX_WIDTH / TILE_SIZE) + addr.bits.x;
  64    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
  65    bit = bitvec[pos / 32] & (1 << (pos & 31));
  66    return bit;
  67 }
  68
  69
  70 /**
  71  * Mark the tile at (x,y) as not cleared.
  72  */
  73 static INLINE void
  74 clear_clear_flag(uint *bitvec, union tile_address addr)
  75 {
  76    int pos;
  77    pos = addr.bits.y * (MAX_WIDTH / TILE_SIZE) + addr.bits.x;
  78    assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
  79    bitvec[pos / 32] &= ~(1 << (pos & 31));
  80 }
  81
  82
  83 struct softpipe_tile_cache *
  84 sp_create_tile_cache( struct pipe_context *pipe )
  85 {
  86    struct softpipe_tile_cache *tc;
  87    uint pos;
  88    int maxLevels, maxTexSize;
  89
  90    /* sanity checking: max sure MAX_WIDTH/HEIGHT >= largest texture image */
  91    maxLevels = pipe->screen->get_param(pipe->screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS);
  92    maxTexSize = 1 << (maxLevels - 1);
  93    assert(MAX_WIDTH >= maxTexSize);
  94
  95    assert(sizeof(union tile_address) == 4);
  96
  97    assert((TILE_SIZE << TILE_ADDR_BITS) >= MAX_WIDTH);
  98
  99    tc = CALLOC_STRUCT( softpipe_tile_cache );
 100    if (tc) {
 101       tc->pipe = pipe;
 102       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 103          tc->tile_addrs[pos].bits.invalid = 1;
 104       }
 105       tc->last_tile_addr.bits.invalid = 1;
 106
 107       /* this allocation allows us to guarantee that allocation
 108        * failures are never fatal later
 109        */
 110       tc->tile = MALLOC_STRUCT( softpipe_cached_tile );
 111       if (!tc->tile)
 112       {
 113          FREE(tc);
 114          return NULL;
 115       }
 116
 117       /* XXX this code prevents valgrind warnings about use of uninitialized
 118        * memory in programs that don't clear the surface before rendering.
 119        * However, it breaks clearing in other situations (such as in
 120        * progs/tests/drawbuffers, see bug 24402).
 121        */
 122 #if 0
 123       /* set flags to indicate all the tiles are cleared */
 124       memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
 125 #endif
 126    }
 127    return tc;
 128 }
 129
 130
 131 void
 132 sp_destroy_tile_cache(struct softpipe_tile_cache *tc)
 133 {
 134    if (tc) {
 135       uint pos;
 136
 137       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 138          /*assert(tc->entries[pos].x < 0);*/
 139          FREE( tc->entries[pos] );
 140       }
 141       FREE( tc->tile );
 142
 143       if (tc->transfer) {
 144          tc->pipe->transfer_unmap(tc->pipe, tc->transfer);
 145       }
 146
 147       FREE( tc );
 148    }
 149 }
 150
 151
 152 /**
 153  * Specify the surface to cache.
 154  */
 155 void
 156 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
 157                           struct pipe_surface *ps)
 158 {
 159    struct pipe_context *pipe = tc->pipe;
 160
 161    if (tc->transfer_map) {
 162       if (ps == tc->surface)
 163          return;
 164
 165       pipe->transfer_unmap(pipe, tc->transfer);
 166       tc->transfer = NULL;
 167       tc->transfer_map = NULL;
 168    }
 169
 170    tc->surface = ps;
 171
 172    if (ps) {
 173       tc->transfer_map = pipe_transfer_map(pipe, ps->texture,
 174                                            ps->u.tex.level, ps->u.tex.first_layer,
 175                                            PIPE_TRANSFER_READ_WRITE |
 176                                            PIPE_TRANSFER_UNSYNCHRONIZED,
 177                                            0, 0, ps->width, ps->height,
 178                                            &tc->transfer);
 179
 180       tc->depth_stencil = util_format_is_depth_or_stencil(ps->format);
 181    }
 182 }
 183
 184
 185 /**
 186  * Return the transfer being cached.
 187  */
 188 struct pipe_surface *
 189 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc)
 190 {
 191    return tc->surface;
 192 }
 193
 194
 195 /**
 196  * Set pixels in a tile to the given clear color/value, float.
 197  */
 198 static void
 199 clear_tile_rgba(struct softpipe_cached_tile *tile,
 200                 enum pipe_format format,
 201                 const union pipe_color_union *clear_value)
 202 {
 203    if (clear_value->f[0] == 0.0 &&
 204        clear_value->f[1] == 0.0 &&
 205        clear_value->f[2] == 0.0 &&
 206        clear_value->f[3] == 0.0) {
 207       memset(tile->data.color, 0, sizeof(tile->data.color));
 208    }
 209    else {
 210       uint i, j;
 211
 212       if (util_format_is_pure_uint(format)) {
 213          for (i = 0; i < TILE_SIZE; i++) {
 214             for (j = 0; j < TILE_SIZE; j++) {
 215                tile->data.colorui128[i][j][0] = clear_value->ui[0];
 216                tile->data.colorui128[i][j][1] = clear_value->ui[1];
 217                tile->data.colorui128[i][j][2] = clear_value->ui[2];
 218                tile->data.colorui128[i][j][3] = clear_value->ui[3];
 219             }
 220          }
 221       } else if (util_format_is_pure_sint(format)) {
 222          for (i = 0; i < TILE_SIZE; i++) {
 223             for (j = 0; j < TILE_SIZE; j++) {
 224                tile->data.colori128[i][j][0] = clear_value->i[0];
 225                tile->data.colori128[i][j][1] = clear_value->i[1];
 226                tile->data.colori128[i][j][2] = clear_value->i[2];
 227                tile->data.colori128[i][j][3] = clear_value->i[3];
 228             }
 229          }
 230       } else {
 231          for (i = 0; i < TILE_SIZE; i++) {
 232             for (j = 0; j < TILE_SIZE; j++) {
 233                tile->data.color[i][j][0] = clear_value->f[0];
 234                tile->data.color[i][j][1] = clear_value->f[1];
 235                tile->data.color[i][j][2] = clear_value->f[2];
 236                tile->data.color[i][j][3] = clear_value->f[3];
 237             }
 238          }
 239       }
 240    }
 241 }
 242
 243
 244 /**
 245  * Set a tile to a solid value/color.
 246  */
 247 static void
 248 clear_tile(struct softpipe_cached_tile *tile,
 249            enum pipe_format format,
 250            uint64_t clear_value)
 251 {
 252    uint i, j;
 253
 254    switch (util_format_get_blocksize(format)) {
 255    case 1:
 256       memset(tile->data.any, clear_value, TILE_SIZE * TILE_SIZE);
 257       break;
 258    case 2:
 259       if (clear_value == 0) {
 260          memset(tile->data.any, 0, 2 * TILE_SIZE * TILE_SIZE);
 261       }
 262       else {
 263          for (i = 0; i < TILE_SIZE; i++) {
 264             for (j = 0; j < TILE_SIZE; j++) {
 265                tile->data.depth16[i][j] = (ushort) clear_value;
 266             }
 267          }
 268       }
 269       break;
 270    case 4:
 271       if (clear_value == 0) {
 272          memset(tile->data.any, 0, 4 * TILE_SIZE * TILE_SIZE);
 273       }
 274       else {
 275          for (i = 0; i < TILE_SIZE; i++) {
 276             for (j = 0; j < TILE_SIZE; j++) {
 277                tile->data.depth32[i][j] = clear_value;
 278             }
 279          }
 280       }
 281       break;
 282    case 8:
 283       if (clear_value == 0) {
 284          memset(tile->data.any, 0, 8 * TILE_SIZE * TILE_SIZE);
 285       }
 286       else {
 287          for (i = 0; i < TILE_SIZE; i++) {
 288             for (j = 0; j < TILE_SIZE; j++) {
 289                tile->data.depth64[i][j] = clear_value;
 290             }
 291          }
 292       }
 293       break;
 294    default:
 295       assert(0);
 296    }
 297 }
 298
 299
 300 /**
 301  * Actually clear the tiles which were flagged as being in a clear state.
 302  */
 303 static void
 304 sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc)
 305 {
 306    struct pipe_transfer *pt = tc->transfer;
 307    const uint w = tc->transfer->box.width;
 308    const uint h = tc->transfer->box.height;
 309    uint x, y;
 310    uint numCleared = 0;
 311
 312    assert(pt->resource);
 313    if (!tc->tile)
 314       tc->tile = sp_alloc_tile(tc);
 315
 316    /* clear the scratch tile to the clear value */
 317    if (tc->depth_stencil) {
 318       clear_tile(tc->tile, pt->resource->format, tc->clear_val);
 319    } else {
 320       clear_tile_rgba(tc->tile, pt->resource->format, &tc->clear_color);
 321    }
 322
 323    /* push the tile to all positions marked as clear */
 324    for (y = 0; y < h; y += TILE_SIZE) {
 325       for (x = 0; x < w; x += TILE_SIZE) {
 326          union tile_address addr = tile_address(x, y);
 327
 328          if (is_clear_flag_set(tc->clear_flags, addr)) {
 329             /* write the scratch tile to the surface */
 330             if (tc->depth_stencil) {
 331                pipe_put_tile_raw(pt, tc->transfer_map,
 332                                  x, y, TILE_SIZE, TILE_SIZE,
 333                                  tc->tile->data.any, 0/*STRIDE*/);
 334             }
 335             else {
 336                if (util_format_is_pure_uint(tc->surface->format)) {
 337                   pipe_put_tile_ui_format(pt, tc->transfer_map,
 338                                           x, y, TILE_SIZE, TILE_SIZE,
 339                                           pt->resource->format,
 340                                           (unsigned *) tc->tile->data.colorui128);
 341                } else if (util_format_is_pure_sint(tc->surface->format)) {
 342                   pipe_put_tile_i_format(pt, tc->transfer_map,
 343                                          x, y, TILE_SIZE, TILE_SIZE,
 344                                          pt->resource->format,
 345                                          (int *) tc->tile->data.colori128);
 346                } else {
 347                   pipe_put_tile_rgba(pt, tc->transfer_map,
 348                                      x, y, TILE_SIZE, TILE_SIZE,
 349                                      (float *) tc->tile->data.color);
 350                }
 351             }
 352             numCleared++;
 353          }
 354       }
 355    }
 356
 357    /* reset all clear flags to zero */
 358    memset(tc->clear_flags, 0, sizeof(tc->clear_flags));
 359
 360 #if 0
 361    debug_printf("num cleared: %u\n", numCleared);
 362 #endif
 363 }
 364
 365 static void
 366 sp_flush_tile(struct softpipe_tile_cache* tc, unsigned pos)
 367 {
 368    if (!tc->tile_addrs[pos].bits.invalid) {
 369       if (tc->depth_stencil) {
 370          pipe_put_tile_raw(tc->transfer, tc->transfer_map,
 371                            tc->tile_addrs[pos].bits.x * TILE_SIZE,
 372                            tc->tile_addrs[pos].bits.y * TILE_SIZE,
 373                            TILE_SIZE, TILE_SIZE,
 374                            tc->entries[pos]->data.depth32, 0/*STRIDE*/);
 375       }
 376       else {
 377          if (util_format_is_pure_uint(tc->surface->format)) {
 378             pipe_put_tile_ui_format(tc->transfer, tc->transfer_map,
 379                                     tc->tile_addrs[pos].bits.x * TILE_SIZE,
 380                                     tc->tile_addrs[pos].bits.y * TILE_SIZE,
 381                                     TILE_SIZE, TILE_SIZE,
 382                                     tc->surface->format,
 383                                     (unsigned *) tc->entries[pos]->data.colorui128);
 384          } else if (util_format_is_pure_sint(tc->surface->format)) {
 385             pipe_put_tile_i_format(tc->transfer, tc->transfer_map,
 386                                    tc->tile_addrs[pos].bits.x * TILE_SIZE,
 387                                    tc->tile_addrs[pos].bits.y * TILE_SIZE,
 388                                    TILE_SIZE, TILE_SIZE,
 389                                    tc->surface->format,
 390                                    (int *) tc->entries[pos]->data.colori128);
 391          } else {
 392             pipe_put_tile_rgba_format(tc->transfer, tc->transfer_map,
 393                                       tc->tile_addrs[pos].bits.x * TILE_SIZE,
 394                                       tc->tile_addrs[pos].bits.y * TILE_SIZE,
 395                                       TILE_SIZE, TILE_SIZE,
 396                                       tc->surface->format,
 397                                       (float *) tc->entries[pos]->data.color);
 398          }
 399       }
 400       tc->tile_addrs[pos].bits.invalid = 1;  /* mark as empty */
 401    }
 402 }
 403
 404 /**
 405  * Flush the tile cache: write all dirty tiles back to the transfer.
 406  * any tiles "flagged" as cleared will be "really" cleared.
 407  */
 408 void
 409 sp_flush_tile_cache(struct softpipe_tile_cache *tc)
 410 {
 411    struct pipe_transfer *pt = tc->transfer;
 412    int inuse = 0, pos;
 413
 414    if (pt) {
 415       /* caching a drawing transfer */
 416       for (pos = 0; pos < NUM_ENTRIES; pos++) {
 417          struct softpipe_cached_tile *tile = tc->entries[pos];
 418          if (!tile)
 419          {
 420             assert(tc->tile_addrs[pos].bits.invalid);
 421             continue;
 422          }
 423
 424          sp_flush_tile(tc, pos);
 425          ++inuse;
 426       }
 427
 428       sp_tile_cache_flush_clear(tc);
 429
 430
 431       tc->last_tile_addr.bits.invalid = 1;
 432    }
 433
 434 #if 0
 435    debug_printf("flushed tiles in use: %d\n", inuse);
 436 #endif
 437 }
 438
 439 static struct softpipe_cached_tile *
 440 sp_alloc_tile(struct softpipe_tile_cache *tc)
 441 {
 442    struct softpipe_cached_tile * tile = MALLOC_STRUCT(softpipe_cached_tile);
 443    if (!tile)
 444    {
 445       /* in this case, steal an existing tile */
 446       if (!tc->tile)
 447       {
 448          unsigned pos;
 449          for (pos = 0; pos < NUM_ENTRIES; ++pos) {
 450             if (!tc->entries[pos])
 451                continue;
 452
 453             sp_flush_tile(tc, pos);
 454             tc->tile = tc->entries[pos];
 455             tc->entries[pos] = NULL;
 456             break;
 457          }
 458
 459          /* this should never happen */
 460          if (!tc->tile)
 461             abort();
 462       }
 463
 464       tile = tc->tile;
 465       tc->tile = NULL;
 466
 467       tc->last_tile_addr.bits.invalid = 1;
 468    }
 469    return tile;
 470 }
 471
 472 /**
 473  * Get a tile from the cache.
 474  * \param x, y  position of tile, in pixels
 475  */
 476 struct softpipe_cached_tile *
 477 sp_find_cached_tile(struct softpipe_tile_cache *tc,
 478                     union tile_address addr )
 479 {
 480    struct pipe_transfer *pt = tc->transfer;
 481    /* cache pos/entry: */
 482    const int pos = CACHE_POS(addr.bits.x,
 483                              addr.bits.y);
 484    struct softpipe_cached_tile *tile = tc->entries[pos];
 485
 486    if (!tile) {
 487       tile = sp_alloc_tile(tc);
 488       tc->entries[pos] = tile;
 489    }
 490
 491    if (addr.value != tc->tile_addrs[pos].value) {
 492
 493       assert(pt->resource);
 494       if (tc->tile_addrs[pos].bits.invalid == 0) {
 495          /* put dirty tile back in framebuffer */
 496          if (tc->depth_stencil) {
 497             pipe_put_tile_raw(pt, tc->transfer_map,
 498                               tc->tile_addrs[pos].bits.x * TILE_SIZE,
 499                               tc->tile_addrs[pos].bits.y * TILE_SIZE,
 500                               TILE_SIZE, TILE_SIZE,
 501                               tile->data.depth32, 0/*STRIDE*/);
 502          }
 503          else {
 504             if (util_format_is_pure_uint(tc->surface->format)) {
 505                pipe_put_tile_ui_format(pt, tc->transfer_map,
 506                                       tc->tile_addrs[pos].bits.x * TILE_SIZE,
 507                                       tc->tile_addrs[pos].bits.y * TILE_SIZE,
 508                                       TILE_SIZE, TILE_SIZE,
 509                                       tc->surface->format,
 510                                       (unsigned *) tile->data.colorui128);
 511             } else if (util_format_is_pure_sint(tc->surface->format)) {
 512                pipe_put_tile_i_format(pt, tc->transfer_map,
 513                                       tc->tile_addrs[pos].bits.x * TILE_SIZE,
 514                                       tc->tile_addrs[pos].bits.y * TILE_SIZE,
 515                                       TILE_SIZE, TILE_SIZE,
 516                                       tc->surface->format,
 517                                       (int *) tile->data.colori128);
 518             } else {
 519                pipe_put_tile_rgba_format(pt, tc->transfer_map,
 520                                          tc->tile_addrs[pos].bits.x * TILE_SIZE,
 521                                          tc->tile_addrs[pos].bits.y * TILE_SIZE,
 522                                          TILE_SIZE, TILE_SIZE,
 523                                          tc->surface->format,
 524                                          (float *) tile->data.color);
 525             }
 526          }
 527       }
 528
 529       tc->tile_addrs[pos] = addr;
 530
 531       if (is_clear_flag_set(tc->clear_flags, addr)) {
 532          /* don't get tile from framebuffer, just clear it */
 533          if (tc->depth_stencil) {
 534             clear_tile(tile, pt->resource->format, tc->clear_val);
 535          }
 536          else {
 537             clear_tile_rgba(tile, pt->resource->format, &tc->clear_color);
 538          }
 539          clear_clear_flag(tc->clear_flags, addr);
 540       }
 541       else {
 542          /* get new tile data from transfer */
 543          if (tc->depth_stencil) {
 544             pipe_get_tile_raw(pt, tc->transfer_map,
 545                               tc->tile_addrs[pos].bits.x * TILE_SIZE,
 546                               tc->tile_addrs[pos].bits.y * TILE_SIZE,
 547                               TILE_SIZE, TILE_SIZE,
 548                               tile->data.depth32, 0/*STRIDE*/);
 549          }
 550          else {
 551             if (util_format_is_pure_uint(tc->surface->format)) {
 552                pipe_get_tile_ui_format(pt, tc->transfer_map,
 553                                          tc->tile_addrs[pos].bits.x * TILE_SIZE,
 554                                          tc->tile_addrs[pos].bits.y * TILE_SIZE,
 555                                          TILE_SIZE, TILE_SIZE,
 556                                          tc->surface->format,
 557                                          (unsigned *) tile->data.colorui128);
 558             } else if (util_format_is_pure_sint(tc->surface->format)) {
 559                pipe_get_tile_i_format(pt, tc->transfer_map,
 560                                          tc->tile_addrs[pos].bits.x * TILE_SIZE,
 561                                          tc->tile_addrs[pos].bits.y * TILE_SIZE,
 562                                          TILE_SIZE, TILE_SIZE,
 563                                          tc->surface->format,
 564                                          (int *) tile->data.colori128);
 565             } else {
 566                pipe_get_tile_rgba_format(pt, tc->transfer_map,
 567                                          tc->tile_addrs[pos].bits.x * TILE_SIZE,
 568                                          tc->tile_addrs[pos].bits.y * TILE_SIZE,
 569                                          TILE_SIZE, TILE_SIZE,
 570                                          tc->surface->format,
 571                                          (float *) tile->data.color);
 572             }
 573          }
 574       }
 575    }
 576
 577    tc->last_tile = tile;
 578    tc->last_tile_addr = addr;
 579    return tile;
 580 }
 581
 582
 583
 584
 585
 586 /**
 587  * When a whole surface is being cleared to a value we can avoid
 588  * fetching tiles above.
 589  * Save the color and set a 'clearflag' for each tile of the screen.
 590  */
 591 void
 592 sp_tile_cache_clear(struct softpipe_tile_cache *tc,
 593                     const union pipe_color_union *color,
 594                     uint64_t clearValue)
 595 {
 596    uint pos;
 597
 598    tc->clear_color = *color;
 599
 600    tc->clear_val = clearValue;
 601
 602    /* set flags to indicate all the tiles are cleared */
 603    memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
 604
 605    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 606       tc->tile_addrs[pos].bits.invalid = 1;
 607    }
 608    tc->last_tile_addr.bits.invalid = 1;
 609 }