Merge branch 'lp-offset-twoside'
[mesa.git] / src / gallium / drivers / softpipe / sp_tile_cache.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef SP_TILE_CACHE_H
29 #define SP_TILE_CACHE_H
30
31
32 #include "pipe/p_compiler.h"
33
34
35 struct softpipe_tile_cache;
36
37
38 /**
39 * Cache tile size (width and height). This needs to be a power of two.
40 */
41 #define TILE_SIZE 64
42
43
44 /* If we need to support > 4096, just expand this to be a 64 bit
45 * union, or consider tiling in Z as well.
46 */
47 union tile_address {
48 struct {
49 unsigned x:6; /* 4096 / TILE_SIZE */
50 unsigned y:6; /* 4096 / TILE_SIZE */
51 unsigned invalid:1;
52 unsigned pad:19;
53 } bits;
54 unsigned value;
55 };
56
57
58 struct softpipe_cached_tile
59 {
60 union {
61 float color[TILE_SIZE][TILE_SIZE][4];
62 uint color32[TILE_SIZE][TILE_SIZE];
63 uint depth32[TILE_SIZE][TILE_SIZE];
64 ushort depth16[TILE_SIZE][TILE_SIZE];
65 ubyte stencil8[TILE_SIZE][TILE_SIZE];
66 ubyte any[1];
67 } data;
68 };
69
70 #define NUM_ENTRIES 50
71
72
73 /** XXX move these */
74 #define MAX_WIDTH 4096
75 #define MAX_HEIGHT 4096
76
77
78 struct softpipe_tile_cache
79 {
80 struct pipe_context *pipe;
81 struct pipe_surface *surface; /**< the surface we're caching */
82 struct pipe_transfer *transfer;
83 void *transfer_map;
84
85 union tile_address tile_addrs[NUM_ENTRIES];
86 struct softpipe_cached_tile *entries[NUM_ENTRIES];
87 uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32];
88 float clear_color[4]; /**< for color bufs */
89 uint clear_val; /**< for z+stencil */
90 boolean depth_stencil; /**< Is the surface a depth/stencil format? */
91
92 struct softpipe_cached_tile *tile; /**< scratch tile for clears */
93
94 union tile_address last_tile_addr;
95 struct softpipe_cached_tile *last_tile; /**< most recently retrieved tile */
96 };
97
98
99 extern struct softpipe_tile_cache *
100 sp_create_tile_cache( struct pipe_context *pipe );
101
102 extern void
103 sp_destroy_tile_cache(struct softpipe_tile_cache *tc);
104
105 extern void
106 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
107 struct pipe_surface *sps);
108
109 extern struct pipe_surface *
110 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc);
111
112 extern void
113 sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc);
114
115 extern void
116 sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc);
117
118 extern void
119 sp_flush_tile_cache(struct softpipe_tile_cache *tc);
120
121 extern void
122 sp_tile_cache_clear(struct softpipe_tile_cache *tc, const float *rgba,
123 uint clearValue);
124
125 extern struct softpipe_cached_tile *
126 sp_find_cached_tile(struct softpipe_tile_cache *tc,
127 union tile_address addr );
128
129
130 static INLINE union tile_address
131 tile_address( unsigned x,
132 unsigned y )
133 {
134 union tile_address addr;
135
136 addr.value = 0;
137 addr.bits.x = x / TILE_SIZE;
138 addr.bits.y = y / TILE_SIZE;
139
140 return addr;
141 }
142
143 /* Quickly retrieve tile if it matches last lookup.
144 */
145 static INLINE struct softpipe_cached_tile *
146 sp_get_cached_tile(struct softpipe_tile_cache *tc,
147 int x, int y )
148 {
149 union tile_address addr = tile_address( x, y );
150
151 if (tc->last_tile_addr.value == addr.value)
152 return tc->last_tile;
153
154 return sp_find_cached_tile( tc, addr );
155 }
156
157
158
159
160 #endif /* SP_TILE_CACHE_H */
161