svga: update svga_winsys interface for GBS
[mesa.git] / src / gallium / drivers / svga / svga_cmd.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
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8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * svga_cmd.c --
28 *
29 * Command construction utility for the SVGA3D protocol used by
30 * the VMware SVGA device, based on the svgautil library.
31 */
32
33 #include "svga_winsys.h"
34 #include "svga_resource_buffer.h"
35 #include "svga_resource_texture.h"
36 #include "svga_surface.h"
37 #include "svga_cmd.h"
38
39 /*
40 *----------------------------------------------------------------------
41 *
42 * surface_to_surfaceid --
43 *
44 * Utility function for surface ids.
45 * Can handle null surface. Does a surface_reallocation so you need
46 * to have allocated the fifo space before converting.
47 *
48 * Results:
49 * id is filled out.
50 *
51 * Side effects:
52 * One surface relocation is performed for texture handle.
53 *
54 *----------------------------------------------------------------------
55 */
56
57 static INLINE void
58 surface_to_surfaceid(struct svga_winsys_context *swc, // IN
59 struct pipe_surface *surface, // IN
60 SVGA3dSurfaceImageId *id, // OUT
61 unsigned flags) // IN
62 {
63 if (surface) {
64 struct svga_surface *s = svga_surface(surface);
65 swc->surface_relocation(swc, &id->sid, NULL, s->handle, flags);
66 id->face = s->real_face; /* faces have the same order */
67 id->mipmap = s->real_level;
68 }
69 else {
70 swc->surface_relocation(swc, &id->sid, NULL, NULL, flags);
71 id->face = 0;
72 id->mipmap = 0;
73 }
74 }
75
76
77 /*
78 *----------------------------------------------------------------------
79 *
80 * SVGA3D_FIFOReserve --
81 *
82 * Reserve space for an SVGA3D FIFO command.
83 *
84 * The 2D SVGA commands have been around for a while, so they
85 * have a rather asymmetric structure. The SVGA3D protocol is
86 * more uniform: each command begins with a header containing the
87 * command number and the full size.
88 *
89 * This is a convenience wrapper around SVGA_FIFOReserve. We
90 * reserve space for the whole command, and write the header.
91 *
92 * This function must be paired with SVGA_FIFOCommitAll().
93 *
94 * Results:
95 * Returns a pointer to the space reserved for command-specific
96 * data. It must be 'cmdSize' bytes long.
97 *
98 * Side effects:
99 * Begins a FIFO reservation.
100 *
101 *----------------------------------------------------------------------
102 */
103
104 void *
105 SVGA3D_FIFOReserve(struct svga_winsys_context *swc,
106 uint32 cmd, // IN
107 uint32 cmdSize, // IN
108 uint32 nr_relocs) // IN
109 {
110 SVGA3dCmdHeader *header;
111
112 header = swc->reserve(swc, sizeof *header + cmdSize, nr_relocs);
113 if (!header)
114 return NULL;
115
116 header->id = cmd;
117 header->size = cmdSize;
118
119 return &header[1];
120 }
121
122
123 void
124 SVGA_FIFOCommitAll(struct svga_winsys_context *swc)
125 {
126 swc->commit(swc);
127 }
128
129
130 /*
131 *----------------------------------------------------------------------
132 *
133 * SVGA3D_DefineContext --
134 *
135 * Create a new context, to be referred to with the provided ID.
136 *
137 * Context objects encapsulate all render state, and shader
138 * objects are per-context.
139 *
140 * Surfaces are not per-context. The same surface can be shared
141 * between multiple contexts, and surface operations can occur
142 * without a context.
143 *
144 * If the provided context ID already existed, it is redefined.
145 *
146 * Context IDs are arbitrary small non-negative integers,
147 * global to the entire SVGA device.
148 *
149 * Results:
150 * None.
151 *
152 * Side effects:
153 * None.
154 *
155 *----------------------------------------------------------------------
156 */
157
158 enum pipe_error
159 SVGA3D_DefineContext(struct svga_winsys_context *swc) // IN
160 {
161 SVGA3dCmdDefineContext *cmd;
162
163 cmd = SVGA3D_FIFOReserve(swc,
164 SVGA_3D_CMD_CONTEXT_DEFINE, sizeof *cmd, 0);
165 if (!cmd)
166 return PIPE_ERROR_OUT_OF_MEMORY;
167
168 cmd->cid = swc->cid;
169
170 swc->commit(swc);
171
172 return PIPE_OK;
173 }
174
175
176 /*
177 *----------------------------------------------------------------------
178 *
179 * SVGA3D_DestroyContext --
180 *
181 * Delete a context created with SVGA3D_DefineContext.
182 *
183 * Results:
184 * None.
185 *
186 * Side effects:
187 * None.
188 *
189 *----------------------------------------------------------------------
190 */
191
192 enum pipe_error
193 SVGA3D_DestroyContext(struct svga_winsys_context *swc) // IN
194 {
195 SVGA3dCmdDestroyContext *cmd;
196
197 cmd = SVGA3D_FIFOReserve(swc,
198 SVGA_3D_CMD_CONTEXT_DESTROY, sizeof *cmd, 0);
199 if (!cmd)
200 return PIPE_ERROR_OUT_OF_MEMORY;
201
202 cmd->cid = swc->cid;
203
204 swc->commit(swc);
205
206 return PIPE_OK;
207 }
208
209
210 /*
211 *----------------------------------------------------------------------
212 *
213 * SVGA3D_BeginDefineSurface --
214 *
215 * Begin a SURFACE_DEFINE command. This reserves space for it in
216 * the FIFO, and returns pointers to the command's faces and
217 * mipsizes arrays.
218 *
219 * This function must be paired with SVGA_FIFOCommitAll().
220 * The faces and mipSizes arrays are initialized to zero.
221 *
222 * This creates a "surface" object in the SVGA3D device,
223 * with the provided surface ID (sid). Surfaces are generic
224 * containers for host VRAM objects like textures, vertex
225 * buffers, and depth/stencil buffers.
226 *
227 * Surfaces are hierarchical:
228 *
229 * - Surface may have multiple faces (for cube maps)
230 *
231 * - Each face has a list of mipmap levels
232 *
233 * - Each mipmap image may have multiple volume
234 * slices, if the image is three dimensional.
235 *
236 * - Each slice is a 2D array of 'blocks'
237 *
238 * - Each block may be one or more pixels.
239 * (Usually 1, more for DXT or YUV formats.)
240 *
241 * Surfaces are generic host VRAM objects. The SVGA3D device
242 * may optimize surfaces according to the format they were
243 * created with, but this format does not limit the ways in
244 * which the surface may be used. For example, a depth surface
245 * can be used as a texture, or a floating point image may
246 * be used as a vertex buffer. Some surface usages may be
247 * lower performance, due to software emulation, but any
248 * usage should work with any surface.
249 *
250 * If 'sid' is already defined, the old surface is deleted
251 * and this new surface replaces it.
252 *
253 * Surface IDs are arbitrary small non-negative integers,
254 * global to the entire SVGA device.
255 *
256 * Results:
257 * Returns pointers to arrays allocated in the FIFO for 'faces'
258 * and 'mipSizes'.
259 *
260 * Side effects:
261 * Begins a FIFO reservation.
262 *
263 *----------------------------------------------------------------------
264 */
265
266 enum pipe_error
267 SVGA3D_BeginDefineSurface(struct svga_winsys_context *swc,
268 struct svga_winsys_surface *sid, // IN
269 SVGA3dSurfaceFlags flags, // IN
270 SVGA3dSurfaceFormat format, // IN
271 SVGA3dSurfaceFace **faces, // OUT
272 SVGA3dSize **mipSizes, // OUT
273 uint32 numMipSizes) // IN
274 {
275 SVGA3dCmdDefineSurface *cmd;
276
277 cmd = SVGA3D_FIFOReserve(swc,
278 SVGA_3D_CMD_SURFACE_DEFINE, sizeof *cmd +
279 sizeof **mipSizes * numMipSizes, 1);
280 if (!cmd)
281 return PIPE_ERROR_OUT_OF_MEMORY;
282
283 swc->surface_relocation(swc, &cmd->sid, NULL, sid, SVGA_RELOC_WRITE);
284 cmd->surfaceFlags = flags;
285 cmd->format = format;
286
287 *faces = &cmd->face[0];
288 *mipSizes = (SVGA3dSize*) &cmd[1];
289
290 memset(*faces, 0, sizeof **faces * SVGA3D_MAX_SURFACE_FACES);
291 memset(*mipSizes, 0, sizeof **mipSizes * numMipSizes);
292
293 return PIPE_OK;
294 }
295
296
297 /*
298 *----------------------------------------------------------------------
299 *
300 * SVGA3D_DefineSurface2D --
301 *
302 * This is a simplified version of SVGA3D_BeginDefineSurface(),
303 * which does not support cube maps, mipmaps, or volume textures.
304 *
305 * Results:
306 * None.
307 *
308 * Side effects:
309 * None.
310 *
311 *----------------------------------------------------------------------
312 */
313
314 enum pipe_error
315 SVGA3D_DefineSurface2D(struct svga_winsys_context *swc, // IN
316 struct svga_winsys_surface *sid, // IN
317 uint32 width, // IN
318 uint32 height, // IN
319 SVGA3dSurfaceFormat format) // IN
320 {
321 SVGA3dSize *mipSizes;
322 SVGA3dSurfaceFace *faces;
323 enum pipe_error ret;
324
325 ret = SVGA3D_BeginDefineSurface(swc,
326 sid, 0, format, &faces, &mipSizes, 1);
327 if (ret != PIPE_OK)
328 return ret;
329
330 faces[0].numMipLevels = 1;
331
332 mipSizes[0].width = width;
333 mipSizes[0].height = height;
334 mipSizes[0].depth = 1;
335
336 swc->commit(swc);;
337
338 return PIPE_OK;
339 }
340
341
342 /*
343 *----------------------------------------------------------------------
344 *
345 * SVGA3D_DestroySurface --
346 *
347 * Release the host VRAM encapsulated by a particular surface ID.
348 *
349 * Results:
350 * None.
351 *
352 * Side effects:
353 * None.
354 *
355 *----------------------------------------------------------------------
356 */
357
358 enum pipe_error
359 SVGA3D_DestroySurface(struct svga_winsys_context *swc,
360 struct svga_winsys_surface *sid) // IN
361 {
362 SVGA3dCmdDestroySurface *cmd;
363
364 cmd = SVGA3D_FIFOReserve(swc,
365 SVGA_3D_CMD_SURFACE_DESTROY, sizeof *cmd, 1);
366 if (!cmd)
367 return PIPE_ERROR_OUT_OF_MEMORY;
368
369 swc->surface_relocation(swc, &cmd->sid, NULL, sid, SVGA_RELOC_READ);
370 swc->commit(swc);;
371
372 return PIPE_OK;
373 }
374
375
376 /*
377 *----------------------------------------------------------------------
378 *
379 * SVGA3D_SurfaceDMA--
380 *
381 * Emit a SURFACE_DMA command.
382 *
383 * When the SVGA3D device asynchronously processes this FIFO
384 * command, a DMA operation is performed between host VRAM and
385 * a generic SVGAGuestPtr. The guest pointer may refer to guest
386 * VRAM (provided by the SVGA PCI device) or to guest system
387 * memory that has been set up as a Guest Memory Region (GMR)
388 * by the SVGA device.
389 *
390 * The guest's DMA buffer must remain valid (not freed, paged out,
391 * or overwritten) until the host has finished processing this
392 * command. The guest can determine that the host has finished
393 * by using the SVGA device's FIFO Fence mechanism.
394 *
395 * The guest's image buffer can be an arbitrary size and shape.
396 * Guest image data is interpreted according to the SVGA3D surface
397 * format specified when the surface was defined.
398 *
399 * The caller may optionally define the guest image's pitch.
400 * guestImage->pitch can either be zero (assume image is tightly
401 * packed) or it must be the number of bytes between vertically
402 * adjacent image blocks.
403 *
404 * The provided copybox list specifies which regions of the source
405 * image are to be copied, and where they appear on the destination.
406 *
407 * NOTE: srcx/srcy are always on the guest image and x/y are
408 * always on the host image, regardless of the actual transfer
409 * direction!
410 *
411 * For efficiency, the SVGA3D device is free to copy more data
412 * than specified. For example, it may round copy boxes outwards
413 * such that they lie on particular alignment boundaries.
414 *
415 *----------------------------------------------------------------------
416 */
417
418 enum pipe_error
419 SVGA3D_SurfaceDMA(struct svga_winsys_context *swc,
420 struct svga_transfer *st, // IN
421 SVGA3dTransferType transfer, // IN
422 const SVGA3dCopyBox *boxes, // IN
423 uint32 numBoxes, // IN
424 SVGA3dSurfaceDMAFlags flags) // IN
425 {
426 struct svga_texture *texture = svga_texture(st->base.resource);
427 SVGA3dCmdSurfaceDMA *cmd;
428 SVGA3dCmdSurfaceDMASuffix *pSuffix;
429 uint32 boxesSize = sizeof *boxes * numBoxes;
430 unsigned region_flags;
431 unsigned surface_flags;
432
433 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
434 region_flags = SVGA_RELOC_READ;
435 surface_flags = SVGA_RELOC_WRITE;
436 }
437 else if (transfer == SVGA3D_READ_HOST_VRAM) {
438 region_flags = SVGA_RELOC_WRITE;
439 surface_flags = SVGA_RELOC_READ;
440 }
441 else {
442 assert(0);
443 return PIPE_ERROR_BAD_INPUT;
444 }
445
446 cmd = SVGA3D_FIFOReserve(swc,
447 SVGA_3D_CMD_SURFACE_DMA,
448 sizeof *cmd + boxesSize + sizeof *pSuffix,
449 2);
450 if (!cmd)
451 return PIPE_ERROR_OUT_OF_MEMORY;
452
453 swc->region_relocation(swc, &cmd->guest.ptr, st->hwbuf, 0, region_flags);
454 cmd->guest.pitch = st->base.stride;
455
456 swc->surface_relocation(swc, &cmd->host.sid, NULL,
457 texture->handle, surface_flags);
458 cmd->host.face = st->face; /* PIPE_TEX_FACE_* and SVGA3D_CUBEFACE_* match */
459 cmd->host.mipmap = st->base.level;
460
461 cmd->transfer = transfer;
462
463 memcpy(&cmd[1], boxes, boxesSize);
464
465 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + boxesSize);
466 pSuffix->suffixSize = sizeof *pSuffix;
467 pSuffix->maximumOffset = st->hw_nblocksy*st->base.stride;
468 pSuffix->flags = flags;
469
470 swc->commit(swc);
471
472 return PIPE_OK;
473 }
474
475
476 enum pipe_error
477 SVGA3D_BufferDMA(struct svga_winsys_context *swc,
478 struct svga_winsys_buffer *guest,
479 struct svga_winsys_surface *host,
480 SVGA3dTransferType transfer, // IN
481 uint32 size, // IN
482 uint32 guest_offset, // IN
483 uint32 host_offset, // IN
484 SVGA3dSurfaceDMAFlags flags) // IN
485 {
486 SVGA3dCmdSurfaceDMA *cmd;
487 SVGA3dCopyBox *box;
488 SVGA3dCmdSurfaceDMASuffix *pSuffix;
489 unsigned region_flags;
490 unsigned surface_flags;
491
492 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
493 region_flags = SVGA_RELOC_READ;
494 surface_flags = SVGA_RELOC_WRITE;
495 }
496 else if (transfer == SVGA3D_READ_HOST_VRAM) {
497 region_flags = SVGA_RELOC_WRITE;
498 surface_flags = SVGA_RELOC_READ;
499 }
500 else {
501 assert(0);
502 return PIPE_ERROR_BAD_INPUT;
503 }
504
505 cmd = SVGA3D_FIFOReserve(swc,
506 SVGA_3D_CMD_SURFACE_DMA,
507 sizeof *cmd + sizeof *box + sizeof *pSuffix,
508 2);
509 if (!cmd)
510 return PIPE_ERROR_OUT_OF_MEMORY;
511
512 swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
513 cmd->guest.pitch = 0;
514
515 swc->surface_relocation(swc, &cmd->host.sid,
516 NULL, host, surface_flags);
517 cmd->host.face = 0;
518 cmd->host.mipmap = 0;
519
520 cmd->transfer = transfer;
521
522 box = (SVGA3dCopyBox *)&cmd[1];
523 box->x = host_offset;
524 box->y = 0;
525 box->z = 0;
526 box->w = size;
527 box->h = 1;
528 box->d = 1;
529 box->srcx = guest_offset;
530 box->srcy = 0;
531 box->srcz = 0;
532
533 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + sizeof *box);
534 pSuffix->suffixSize = sizeof *pSuffix;
535 pSuffix->maximumOffset = guest_offset + size;
536 pSuffix->flags = flags;
537
538 swc->commit(swc);
539
540 return PIPE_OK;
541 }
542
543
544 /*
545 *----------------------------------------------------------------------
546 *
547 * SVGA3D_SetRenderTarget --
548 *
549 * Bind a surface object to a particular render target attachment
550 * point on the current context. Render target attachment points
551 * exist for color buffers, a depth buffer, and a stencil buffer.
552 *
553 * The SVGA3D device is quite lenient about the types of surfaces
554 * that may be used as render targets. The color buffers must
555 * all be the same size, but the depth and stencil buffers do not
556 * have to be the same size as the color buffer. All attachments
557 * are optional.
558 *
559 * Some combinations of render target formats may require software
560 * emulation, depending on the capabilities of the host graphics
561 * API and graphics hardware.
562 *
563 * Results:
564 * None.
565 *
566 * Side effects:
567 * None.
568 *
569 *----------------------------------------------------------------------
570 */
571
572 enum pipe_error
573 SVGA3D_SetRenderTarget(struct svga_winsys_context *swc,
574 SVGA3dRenderTargetType type, // IN
575 struct pipe_surface *surface) // IN
576 {
577 SVGA3dCmdSetRenderTarget *cmd;
578
579 cmd = SVGA3D_FIFOReserve(swc,
580 SVGA_3D_CMD_SETRENDERTARGET, sizeof *cmd, 1);
581 if (!cmd)
582 return PIPE_ERROR_OUT_OF_MEMORY;
583
584 cmd->cid = swc->cid;
585 cmd->type = type;
586 surface_to_surfaceid(swc, surface, &cmd->target, SVGA_RELOC_WRITE);
587 swc->commit(swc);
588
589 return PIPE_OK;
590 }
591
592
593 /*
594 *----------------------------------------------------------------------
595 *
596 * SVGA3D_DefineShader --
597 *
598 * Upload the bytecode for a new shader. The bytecode is "SVGA3D
599 * format", which is theoretically a binary-compatible superset
600 * of Microsoft's DirectX shader bytecode. In practice, the
601 * SVGA3D bytecode doesn't yet have any extensions to DirectX's
602 * bytecode format.
603 *
604 * The SVGA3D device supports shader models 1.1 through 2.0.
605 *
606 * The caller chooses a shader ID (small positive integer) by
607 * which this shader will be identified in future commands. This
608 * ID is in a namespace which is per-context and per-shader-type.
609 *
610 * 'bytecodeLen' is specified in bytes. It must be a multiple of 4.
611 *
612 * Results:
613 * None.
614 *
615 * Side effects:
616 * None.
617 *
618 *----------------------------------------------------------------------
619 */
620
621 enum pipe_error
622 SVGA3D_DefineShader(struct svga_winsys_context *swc,
623 uint32 shid, // IN
624 SVGA3dShaderType type, // IN
625 const uint32 *bytecode, // IN
626 uint32 bytecodeLen) // IN
627 {
628 SVGA3dCmdDefineShader *cmd;
629
630 assert(bytecodeLen % 4 == 0);
631
632 cmd = SVGA3D_FIFOReserve(swc,
633 SVGA_3D_CMD_SHADER_DEFINE, sizeof *cmd + bytecodeLen,
634 0);
635 if (!cmd)
636 return PIPE_ERROR_OUT_OF_MEMORY;
637
638 cmd->cid = swc->cid;
639 cmd->shid = shid;
640 cmd->type = type;
641 memcpy(&cmd[1], bytecode, bytecodeLen);
642 swc->commit(swc);
643
644 return PIPE_OK;
645 }
646
647
648 /*
649 *----------------------------------------------------------------------
650 *
651 * SVGA3D_DestroyShader --
652 *
653 * Delete a shader that was created by SVGA3D_DefineShader. If
654 * the shader was the current vertex or pixel shader for its
655 * context, rendering results are undefined until a new shader is
656 * bound.
657 *
658 * Results:
659 * None.
660 *
661 * Side effects:
662 * None.
663 *
664 *----------------------------------------------------------------------
665 */
666
667 enum pipe_error
668 SVGA3D_DestroyShader(struct svga_winsys_context *swc,
669 uint32 shid, // IN
670 SVGA3dShaderType type) // IN
671 {
672 SVGA3dCmdDestroyShader *cmd;
673
674 cmd = SVGA3D_FIFOReserve(swc,
675 SVGA_3D_CMD_SHADER_DESTROY, sizeof *cmd,
676 0);
677 if (!cmd)
678 return PIPE_ERROR_OUT_OF_MEMORY;
679
680 cmd->cid = swc->cid;
681 cmd->shid = shid;
682 cmd->type = type;
683 swc->commit(swc);
684
685 return PIPE_OK;
686 }
687
688
689 /*
690 *----------------------------------------------------------------------
691 *
692 * SVGA3D_SetShaderConst --
693 *
694 * Set the value of a shader constant.
695 *
696 * Shader constants are analogous to uniform variables in GLSL,
697 * except that they belong to the render context rather than to
698 * an individual shader.
699 *
700 * Constants may have one of three types: A 4-vector of floats,
701 * a 4-vector of integers, or a single boolean flag.
702 *
703 * Results:
704 * None.
705 *
706 * Side effects:
707 * None.
708 *
709 *----------------------------------------------------------------------
710 */
711
712 enum pipe_error
713 SVGA3D_SetShaderConst(struct svga_winsys_context *swc,
714 uint32 reg, // IN
715 SVGA3dShaderType type, // IN
716 SVGA3dShaderConstType ctype, // IN
717 const void *value) // IN
718 {
719 SVGA3dCmdSetShaderConst *cmd;
720
721 cmd = SVGA3D_FIFOReserve(swc,
722 SVGA_3D_CMD_SET_SHADER_CONST, sizeof *cmd,
723 0);
724 if (!cmd)
725 return PIPE_ERROR_OUT_OF_MEMORY;
726
727 cmd->cid = swc->cid;
728 cmd->reg = reg;
729 cmd->type = type;
730 cmd->ctype = ctype;
731
732 switch (ctype) {
733
734 case SVGA3D_CONST_TYPE_FLOAT:
735 case SVGA3D_CONST_TYPE_INT:
736 memcpy(&cmd->values, value, sizeof cmd->values);
737 break;
738
739 case SVGA3D_CONST_TYPE_BOOL:
740 memset(&cmd->values, 0, sizeof cmd->values);
741 cmd->values[0] = *(uint32*)value;
742 break;
743
744 default:
745 assert(0);
746 break;
747
748 }
749 swc->commit(swc);
750
751 return PIPE_OK;
752 }
753
754
755 /*
756 *----------------------------------------------------------------------
757 *
758 * SVGA3D_SetShaderConsts --
759 *
760 * Set the value of successive shader constants.
761 *
762 * Shader constants are analogous to uniform variables in GLSL,
763 * except that they belong to the render context rather than to
764 * an individual shader.
765 *
766 * Constants may have one of three types: A 4-vector of floats,
767 * a 4-vector of integers, or a single boolean flag.
768 *
769 * Results:
770 * None.
771 *
772 * Side effects:
773 * None.
774 *
775 *----------------------------------------------------------------------
776 */
777
778 enum pipe_error
779 SVGA3D_SetShaderConsts(struct svga_winsys_context *swc,
780 uint32 reg, // IN
781 uint32 numRegs, // IN
782 SVGA3dShaderType type, // IN
783 SVGA3dShaderConstType ctype, // IN
784 const void *values) // IN
785 {
786 SVGA3dCmdSetShaderConst *cmd;
787
788 cmd = SVGA3D_FIFOReserve(swc,
789 SVGA_3D_CMD_SET_SHADER_CONST,
790 sizeof *cmd + (numRegs - 1) * sizeof cmd->values,
791 0);
792 if (!cmd)
793 return PIPE_ERROR_OUT_OF_MEMORY;
794
795 cmd->cid = swc->cid;
796 cmd->reg = reg;
797 cmd->type = type;
798 cmd->ctype = ctype;
799
800 memcpy(&cmd->values, values, numRegs * sizeof cmd->values);
801
802 swc->commit(swc);
803
804 return PIPE_OK;
805 }
806
807
808
809
810
811 /*
812 *----------------------------------------------------------------------
813 *
814 * SVGA3D_SetShader --
815 *
816 * Switch active shaders. This binds a new vertex or pixel shader
817 * to the specified context.
818 *
819 * A shader ID of SVGA3D_INVALID_ID unbinds any shader, switching
820 * back to the fixed function vertex or pixel pipeline.
821 *
822 * Results:
823 * None.
824 *
825 * Side effects:
826 * None.
827 *
828 *----------------------------------------------------------------------
829 */
830
831 enum pipe_error
832 SVGA3D_SetShader(struct svga_winsys_context *swc,
833 SVGA3dShaderType type, // IN
834 uint32 shid) // IN
835 {
836 SVGA3dCmdSetShader *cmd;
837
838 cmd = SVGA3D_FIFOReserve(swc,
839 SVGA_3D_CMD_SET_SHADER, sizeof *cmd,
840 0);
841 if (!cmd)
842 return PIPE_ERROR_OUT_OF_MEMORY;
843
844 cmd->cid = swc->cid;
845 cmd->type = type;
846 cmd->shid = shid;
847 swc->commit(swc);
848
849 return PIPE_OK;
850 }
851
852
853 /*
854 *----------------------------------------------------------------------
855 *
856 * SVGA3D_BeginClear --
857 *
858 * Begin a CLEAR command. This reserves space for it in the FIFO,
859 * and returns a pointer to the command's rectangle array. This
860 * function must be paired with SVGA_FIFOCommitAll().
861 *
862 * Clear is a rendering operation which fills a list of
863 * rectangles with constant values on all render target types
864 * indicated by 'flags'.
865 *
866 * Clear is not affected by clipping, depth test, or other
867 * render state which affects the fragment pipeline.
868 *
869 * Results:
870 * None.
871 *
872 * Side effects:
873 * May write to attached render target surfaces.
874 *
875 *----------------------------------------------------------------------
876 */
877
878 enum pipe_error
879 SVGA3D_BeginClear(struct svga_winsys_context *swc,
880 SVGA3dClearFlag flags, // IN
881 uint32 color, // IN
882 float depth, // IN
883 uint32 stencil, // IN
884 SVGA3dRect **rects, // OUT
885 uint32 numRects) // IN
886 {
887 SVGA3dCmdClear *cmd;
888
889 cmd = SVGA3D_FIFOReserve(swc,
890 SVGA_3D_CMD_CLEAR,
891 sizeof *cmd + sizeof **rects * numRects,
892 0);
893 if (!cmd)
894 return PIPE_ERROR_OUT_OF_MEMORY;
895
896 cmd->cid = swc->cid;
897 cmd->clearFlag = flags;
898 cmd->color = color;
899 cmd->depth = depth;
900 cmd->stencil = stencil;
901 *rects = (SVGA3dRect*) &cmd[1];
902
903 return PIPE_OK;
904 }
905
906
907 /*
908 *----------------------------------------------------------------------
909 *
910 * SVGA3D_ClearRect --
911 *
912 * This is a simplified version of SVGA3D_BeginClear().
913 *
914 * Results:
915 * None.
916 *
917 * Side effects:
918 * None.
919 *
920 *----------------------------------------------------------------------
921 */
922
923 enum pipe_error
924 SVGA3D_ClearRect(struct svga_winsys_context *swc,
925 SVGA3dClearFlag flags, // IN
926 uint32 color, // IN
927 float depth, // IN
928 uint32 stencil, // IN
929 uint32 x, // IN
930 uint32 y, // IN
931 uint32 w, // IN
932 uint32 h) // IN
933 {
934 SVGA3dRect *rect;
935 enum pipe_error ret;
936
937 ret = SVGA3D_BeginClear(swc, flags, color, depth, stencil, &rect, 1);
938 if (ret != PIPE_OK)
939 return PIPE_ERROR_OUT_OF_MEMORY;
940
941 memset(rect, 0, sizeof *rect);
942 rect->x = x;
943 rect->y = y;
944 rect->w = w;
945 rect->h = h;
946 swc->commit(swc);
947
948 return PIPE_OK;
949 }
950
951
952 /*
953 *----------------------------------------------------------------------
954 *
955 * SVGA3D_BeginDrawPrimitives --
956 *
957 * Begin a DRAW_PRIMITIVES command. This reserves space for it in
958 * the FIFO, and returns a pointer to the command's arrays.
959 * This function must be paired with SVGA_FIFOCommitAll().
960 *
961 * Drawing commands consist of two variable-length arrays:
962 * SVGA3dVertexDecl elements declare a set of vertex buffers to
963 * use while rendering, and SVGA3dPrimitiveRange elements specify
964 * groups of primitives each with an optional index buffer.
965 *
966 * The decls and ranges arrays are initialized to zero.
967 *
968 * Results:
969 * None.
970 *
971 * Side effects:
972 * May write to attached render target surfaces.
973 *
974 *----------------------------------------------------------------------
975 */
976
977 enum pipe_error
978 SVGA3D_BeginDrawPrimitives(struct svga_winsys_context *swc,
979 SVGA3dVertexDecl **decls, // OUT
980 uint32 numVertexDecls, // IN
981 SVGA3dPrimitiveRange **ranges, // OUT
982 uint32 numRanges) // IN
983 {
984 SVGA3dCmdDrawPrimitives *cmd;
985 SVGA3dVertexDecl *declArray;
986 SVGA3dPrimitiveRange *rangeArray;
987 uint32 declSize = sizeof **decls * numVertexDecls;
988 uint32 rangeSize = sizeof **ranges * numRanges;
989
990 cmd = SVGA3D_FIFOReserve(swc,
991 SVGA_3D_CMD_DRAW_PRIMITIVES,
992 sizeof *cmd + declSize + rangeSize,
993 numVertexDecls + numRanges);
994 if (!cmd)
995 return PIPE_ERROR_OUT_OF_MEMORY;
996
997 cmd->cid = swc->cid;
998 cmd->numVertexDecls = numVertexDecls;
999 cmd->numRanges = numRanges;
1000
1001 declArray = (SVGA3dVertexDecl*) &cmd[1];
1002 rangeArray = (SVGA3dPrimitiveRange*) &declArray[numVertexDecls];
1003
1004 memset(declArray, 0, declSize);
1005 memset(rangeArray, 0, rangeSize);
1006
1007 *decls = declArray;
1008 *ranges = rangeArray;
1009
1010 return PIPE_OK;
1011 }
1012
1013
1014 /*
1015 *----------------------------------------------------------------------
1016 *
1017 * SVGA3D_BeginSurfaceCopy --
1018 *
1019 * Begin a SURFACE_COPY command. This reserves space for it in
1020 * the FIFO, and returns a pointer to the command's arrays. This
1021 * function must be paired with SVGA_FIFOCommitAll().
1022 *
1023 * The box array is initialized with zeroes.
1024 *
1025 * Results:
1026 * None.
1027 *
1028 * Side effects:
1029 * Asynchronously copies a list of boxes from surface to surface.
1030 *
1031 *----------------------------------------------------------------------
1032 */
1033
1034 enum pipe_error
1035 SVGA3D_BeginSurfaceCopy(struct svga_winsys_context *swc,
1036 struct pipe_surface *src, // IN
1037 struct pipe_surface *dest, // IN
1038 SVGA3dCopyBox **boxes, // OUT
1039 uint32 numBoxes) // IN
1040 {
1041 SVGA3dCmdSurfaceCopy *cmd;
1042 uint32 boxesSize = sizeof **boxes * numBoxes;
1043
1044 cmd = SVGA3D_FIFOReserve(swc,
1045 SVGA_3D_CMD_SURFACE_COPY, sizeof *cmd + boxesSize,
1046 2);
1047 if (!cmd)
1048 return PIPE_ERROR_OUT_OF_MEMORY;
1049
1050 surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ);
1051 surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE);
1052 *boxes = (SVGA3dCopyBox*) &cmd[1];
1053
1054 memset(*boxes, 0, boxesSize);
1055
1056 return PIPE_OK;
1057 }
1058
1059
1060 /*
1061 *----------------------------------------------------------------------
1062 *
1063 * SVGA3D_SurfaceStretchBlt --
1064 *
1065 * Issue a SURFACE_STRETCHBLT command: an asynchronous
1066 * surface-to-surface blit, with scaling.
1067 *
1068 * Results:
1069 * None.
1070 *
1071 * Side effects:
1072 * Asynchronously copies one box from surface to surface.
1073 *
1074 *----------------------------------------------------------------------
1075 */
1076
1077 enum pipe_error
1078 SVGA3D_SurfaceStretchBlt(struct svga_winsys_context *swc,
1079 struct pipe_surface *src, // IN
1080 struct pipe_surface *dest, // IN
1081 SVGA3dBox *boxSrc, // IN
1082 SVGA3dBox *boxDest, // IN
1083 SVGA3dStretchBltMode mode) // IN
1084 {
1085 SVGA3dCmdSurfaceStretchBlt *cmd;
1086
1087 cmd = SVGA3D_FIFOReserve(swc,
1088 SVGA_3D_CMD_SURFACE_STRETCHBLT, sizeof *cmd,
1089 2);
1090 if (!cmd)
1091 return PIPE_ERROR_OUT_OF_MEMORY;
1092
1093 surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ);
1094 surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE);
1095 cmd->boxSrc = *boxSrc;
1096 cmd->boxDest = *boxDest;
1097 cmd->mode = mode;
1098 swc->commit(swc);
1099
1100 return PIPE_OK;
1101 }
1102
1103
1104 /*
1105 *----------------------------------------------------------------------
1106 *
1107 * SVGA3D_SetViewport --
1108 *
1109 * Set the current context's viewport rectangle. The viewport
1110 * is clipped to the dimensions of the current render target,
1111 * then all rendering is clipped to the viewport.
1112 *
1113 * Results:
1114 * None.
1115 *
1116 * Side effects:
1117 * None.
1118 *
1119 *----------------------------------------------------------------------
1120 */
1121
1122 enum pipe_error
1123 SVGA3D_SetViewport(struct svga_winsys_context *swc,
1124 SVGA3dRect *rect) // IN
1125 {
1126 SVGA3dCmdSetViewport *cmd;
1127
1128 cmd = SVGA3D_FIFOReserve(swc,
1129 SVGA_3D_CMD_SETVIEWPORT, sizeof *cmd,
1130 0);
1131 if (!cmd)
1132 return PIPE_ERROR_OUT_OF_MEMORY;
1133
1134 cmd->cid = swc->cid;
1135 cmd->rect = *rect;
1136 swc->commit(swc);
1137
1138 return PIPE_OK;
1139 }
1140
1141
1142
1143
1144 /*
1145 *----------------------------------------------------------------------
1146 *
1147 * SVGA3D_SetScissorRect --
1148 *
1149 * Set the current context's scissor rectangle. If scissoring
1150 * is enabled then all rendering is clipped to the scissor bounds.
1151 *
1152 * Results:
1153 * None.
1154 *
1155 * Side effects:
1156 * None.
1157 *
1158 *----------------------------------------------------------------------
1159 */
1160
1161 enum pipe_error
1162 SVGA3D_SetScissorRect(struct svga_winsys_context *swc,
1163 SVGA3dRect *rect) // IN
1164 {
1165 SVGA3dCmdSetScissorRect *cmd;
1166
1167 cmd = SVGA3D_FIFOReserve(swc,
1168 SVGA_3D_CMD_SETSCISSORRECT, sizeof *cmd,
1169 0);
1170 if (!cmd)
1171 return PIPE_ERROR_OUT_OF_MEMORY;
1172
1173 cmd->cid = swc->cid;
1174 cmd->rect = *rect;
1175 swc->commit(swc);
1176
1177 return PIPE_OK;
1178 }
1179
1180 /*
1181 *----------------------------------------------------------------------
1182 *
1183 * SVGA3D_SetClipPlane --
1184 *
1185 * Set one of the current context's clip planes. If the clip
1186 * plane is enabled then all 3d rendering is clipped against
1187 * the plane.
1188 *
1189 * Results:
1190 * None.
1191 *
1192 * Side effects:
1193 * None.
1194 *
1195 *----------------------------------------------------------------------
1196 */
1197
1198 enum pipe_error
1199 SVGA3D_SetClipPlane(struct svga_winsys_context *swc,
1200 uint32 index, const float *plane)
1201 {
1202 SVGA3dCmdSetClipPlane *cmd;
1203
1204 cmd = SVGA3D_FIFOReserve(swc,
1205 SVGA_3D_CMD_SETCLIPPLANE, sizeof *cmd,
1206 0);
1207 if (!cmd)
1208 return PIPE_ERROR_OUT_OF_MEMORY;
1209
1210 cmd->cid = swc->cid;
1211 cmd->index = index;
1212 cmd->plane[0] = plane[0];
1213 cmd->plane[1] = plane[1];
1214 cmd->plane[2] = plane[2];
1215 cmd->plane[3] = plane[3];
1216 swc->commit(swc);
1217
1218 return PIPE_OK;
1219 }
1220
1221 /*
1222 *----------------------------------------------------------------------
1223 *
1224 * SVGA3D_SetZRange --
1225 *
1226 * Set the range of the depth buffer to use. 'min' and 'max'
1227 * are values between 0.0 and 1.0.
1228 *
1229 * Results:
1230 * None.
1231 *
1232 * Side effects:
1233 * None.
1234 *
1235 *----------------------------------------------------------------------
1236 */
1237
1238 enum pipe_error
1239 SVGA3D_SetZRange(struct svga_winsys_context *swc,
1240 float zMin, // IN
1241 float zMax) // IN
1242 {
1243 SVGA3dCmdSetZRange *cmd;
1244
1245 cmd = SVGA3D_FIFOReserve(swc,
1246 SVGA_3D_CMD_SETZRANGE, sizeof *cmd,
1247 0);
1248 if (!cmd)
1249 return PIPE_ERROR_OUT_OF_MEMORY;
1250
1251 cmd->cid = swc->cid;
1252 cmd->zRange.min = zMin;
1253 cmd->zRange.max = zMax;
1254 swc->commit(swc);
1255
1256 return PIPE_OK;
1257 }
1258
1259
1260 /*
1261 *----------------------------------------------------------------------
1262 *
1263 * SVGA3D_BeginSetTextureState --
1264 *
1265 * Begin a SETTEXTURESTATE command. This reserves space for it in
1266 * the FIFO, and returns a pointer to the command's texture state
1267 * array. This function must be paired with SVGA_FIFOCommitAll().
1268 *
1269 * This command sets rendering state which is per-texture-unit.
1270 *
1271 * XXX: Individual texture states need documentation. However,
1272 * they are very similar to the texture states defined by
1273 * Direct3D. The D3D documentation is a good starting point
1274 * for understanding SVGA3D texture states.
1275 *
1276 * Results:
1277 * None.
1278 *
1279 * Side effects:
1280 * None.
1281 *
1282 *----------------------------------------------------------------------
1283 */
1284
1285 enum pipe_error
1286 SVGA3D_BeginSetTextureState(struct svga_winsys_context *swc,
1287 SVGA3dTextureState **states, // OUT
1288 uint32 numStates) // IN
1289 {
1290 SVGA3dCmdSetTextureState *cmd;
1291
1292 cmd = SVGA3D_FIFOReserve(swc,
1293 SVGA_3D_CMD_SETTEXTURESTATE,
1294 sizeof *cmd + sizeof **states * numStates,
1295 numStates);
1296 if (!cmd)
1297 return PIPE_ERROR_OUT_OF_MEMORY;
1298
1299 cmd->cid = swc->cid;
1300 *states = (SVGA3dTextureState*) &cmd[1];
1301
1302 return PIPE_OK;
1303 }
1304
1305
1306 /*
1307 *----------------------------------------------------------------------
1308 *
1309 * SVGA3D_BeginSetRenderState --
1310 *
1311 * Begin a SETRENDERSTATE command. This reserves space for it in
1312 * the FIFO, and returns a pointer to the command's texture state
1313 * array. This function must be paired with SVGA_FIFOCommitAll().
1314 *
1315 * This command sets rendering state which is global to the context.
1316 *
1317 * XXX: Individual render states need documentation. However,
1318 * they are very similar to the render states defined by
1319 * Direct3D. The D3D documentation is a good starting point
1320 * for understanding SVGA3D render states.
1321 *
1322 * Results:
1323 * None.
1324 *
1325 * Side effects:
1326 * None.
1327 *
1328 *----------------------------------------------------------------------
1329 */
1330
1331 enum pipe_error
1332 SVGA3D_BeginSetRenderState(struct svga_winsys_context *swc,
1333 SVGA3dRenderState **states, // OUT
1334 uint32 numStates) // IN
1335 {
1336 SVGA3dCmdSetRenderState *cmd;
1337
1338 cmd = SVGA3D_FIFOReserve(swc,
1339 SVGA_3D_CMD_SETRENDERSTATE,
1340 sizeof *cmd + sizeof **states * numStates,
1341 0);
1342 if (!cmd)
1343 return PIPE_ERROR_OUT_OF_MEMORY;
1344
1345 cmd->cid = swc->cid;
1346 *states = (SVGA3dRenderState*) &cmd[1];
1347
1348 return PIPE_OK;
1349 }
1350
1351
1352 /*
1353 *----------------------------------------------------------------------
1354 *
1355 * SVGA3D_BeginQuery--
1356 *
1357 * Issues a SVGA_3D_CMD_BEGIN_QUERY command.
1358 *
1359 * Results:
1360 * None.
1361 *
1362 * Side effects:
1363 * Commits space in the FIFO memory.
1364 *
1365 *----------------------------------------------------------------------
1366 */
1367
1368 enum pipe_error
1369 SVGA3D_BeginQuery(struct svga_winsys_context *swc,
1370 SVGA3dQueryType type) // IN
1371 {
1372 SVGA3dCmdBeginQuery *cmd;
1373
1374 cmd = SVGA3D_FIFOReserve(swc,
1375 SVGA_3D_CMD_BEGIN_QUERY,
1376 sizeof *cmd,
1377 0);
1378 if (!cmd)
1379 return PIPE_ERROR_OUT_OF_MEMORY;
1380
1381 cmd->cid = swc->cid;
1382 cmd->type = type;
1383
1384 swc->commit(swc);
1385
1386 return PIPE_OK;
1387 }
1388
1389
1390 /*
1391 *----------------------------------------------------------------------
1392 *
1393 * SVGA3D_EndQuery--
1394 *
1395 * Issues a SVGA_3D_CMD_END_QUERY command.
1396 *
1397 * Results:
1398 * None.
1399 *
1400 * Side effects:
1401 * Commits space in the FIFO memory.
1402 *
1403 *----------------------------------------------------------------------
1404 */
1405
1406 enum pipe_error
1407 SVGA3D_EndQuery(struct svga_winsys_context *swc,
1408 SVGA3dQueryType type, // IN
1409 struct svga_winsys_buffer *buffer) // IN/OUT
1410 {
1411 SVGA3dCmdEndQuery *cmd;
1412
1413 cmd = SVGA3D_FIFOReserve(swc,
1414 SVGA_3D_CMD_END_QUERY,
1415 sizeof *cmd,
1416 1);
1417 if (!cmd)
1418 return PIPE_ERROR_OUT_OF_MEMORY;
1419
1420 cmd->cid = swc->cid;
1421 cmd->type = type;
1422
1423 swc->region_relocation(swc, &cmd->guestResult, buffer, 0,
1424 SVGA_RELOC_WRITE);
1425
1426 swc->commit(swc);
1427
1428 return PIPE_OK;
1429 }
1430
1431
1432 /*
1433 *----------------------------------------------------------------------
1434 *
1435 * SVGA3D_WaitForQuery--
1436 *
1437 * Issues a SVGA_3D_CMD_WAIT_FOR_QUERY command. This reserves space
1438 * for it in the FIFO. This doesn't actually wait for the query to
1439 * finish but instead tells the host to start a wait at the driver
1440 * level. The caller can wait on the status variable in the
1441 * guestPtr memory or send an insert fence instruction after this
1442 * command and wait on the fence.
1443 *
1444 * Results:
1445 * None.
1446 *
1447 * Side effects:
1448 * Commits space in the FIFO memory.
1449 *
1450 *----------------------------------------------------------------------
1451 */
1452
1453 enum pipe_error
1454 SVGA3D_WaitForQuery(struct svga_winsys_context *swc,
1455 SVGA3dQueryType type, // IN
1456 struct svga_winsys_buffer *buffer) // IN/OUT
1457 {
1458 SVGA3dCmdWaitForQuery *cmd;
1459
1460 cmd = SVGA3D_FIFOReserve(swc,
1461 SVGA_3D_CMD_WAIT_FOR_QUERY,
1462 sizeof *cmd,
1463 1);
1464 if (!cmd)
1465 return PIPE_ERROR_OUT_OF_MEMORY;
1466
1467 cmd->cid = swc->cid;
1468 cmd->type = type;
1469
1470 swc->region_relocation(swc, &cmd->guestResult, buffer, 0,
1471 SVGA_RELOC_WRITE);
1472
1473 swc->commit(swc);
1474
1475 return PIPE_OK;
1476 }