Merge branch 'master' of ../mesa into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_cmd_vgpu10.c
1 /**********************************************************
2 * Copyright 2008-2013 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file svga_cmd_vgpu10.c
28 *
29 * Command construction utility for the vgpu10 SVGA3D protocol.
30 *
31 * \author Mingcheng Chen
32 * \author Brian Paul
33 */
34
35
36 #include "svga_winsys.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_texture.h"
39 #include "svga_surface.h"
40 #include "svga_cmd.h"
41
42
43 /**
44 * Emit a surface relocation for RenderTargetViewId
45 */
46 static void
47 view_relocation(struct svga_winsys_context *swc, // IN
48 struct pipe_surface *surface, // IN
49 SVGA3dRenderTargetViewId *id, // OUT
50 unsigned flags)
51 {
52 if (surface) {
53 struct svga_surface *s = svga_surface(surface);
54 assert(s->handle);
55 swc->surface_relocation(swc, id, NULL, s->handle, flags);
56 }
57 else {
58 swc->surface_relocation(swc, id, NULL, NULL, flags);
59 }
60 }
61
62
63 /**
64 * Emit a surface relocation for a ResourceId.
65 */
66 static void
67 surface_to_resourceid(struct svga_winsys_context *swc, // IN
68 struct svga_winsys_surface *surface, // IN
69 SVGA3dSurfaceId *sid, // OUT
70 unsigned flags) // IN
71 {
72 if (surface) {
73 swc->surface_relocation(swc, sid, NULL, surface, flags);
74 }
75 else {
76 swc->surface_relocation(swc, sid, NULL, NULL, flags);
77 }
78 }
79
80
81 #define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \
82 SVGA3dCmdDX##CommandName *cmd; \
83 { \
84 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
85 sizeof(SVGA3dCmdDX##CommandName), 0); \
86 if (!cmd) \
87 return PIPE_ERROR_OUT_OF_MEMORY; \
88 }
89
90 #define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \
91 SVGA3dCmdDX##CommandName *cmd; \
92 { \
93 assert(count > 0); \
94 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
95 sizeof(SVGA3dCmdDX##CommandName) + \
96 count * sizeof(ElementClassName), 0); \
97 if (!cmd) \
98 return PIPE_ERROR_OUT_OF_MEMORY; \
99 }
100
101 #define SVGA3D_COPY_BASIC(VariableName) \
102 { \
103 cmd->VariableName = VariableName; \
104 }
105
106 #define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \
107 { \
108 SVGA3D_COPY_BASIC(VariableName1); \
109 SVGA3D_COPY_BASIC(VariableName2); \
110 }
111
112 #define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \
113 { \
114 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
115 SVGA3D_COPY_BASIC(VariableName3); \
116 }
117
118 #define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
119 VariableName4) \
120 { \
121 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
122 SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \
123 }
124
125 #define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
126 VariableName4, VariableName5) \
127 {\
128 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
129 SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \
130 }
131
132 #define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \
133 VariableName4, VariableName5, VariableName6) \
134 {\
135 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
136 SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \
137 }
138
139 #define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \
140 VariableName4, VariableName5, VariableName6, \
141 VariableName7) \
142 {\
143 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
144 VariableName4); \
145 SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \
146 }
147
148 #define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \
149 VariableName4, VariableName5, VariableName6, \
150 VariableName7, VariableName8) \
151 {\
152 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
153 VariableName4); \
154 SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \
155 VariableName8); \
156 }
157
158 #define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \
159 VariableName4, VariableName5, VariableName6, \
160 VariableName7, VariableName8, VariableName9) \
161 {\
162 SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
163 VariableName4, VariableName5); \
164 SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \
165 VariableName9); \
166 }
167
168
169 enum pipe_error
170 SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,
171 struct svga_winsys_surface *dstSurf,
172 uint32 dstSubResource,
173 struct svga_winsys_surface *srcSurf,
174 uint32 srcSubResource,
175 const SVGA3dCopyBox *box)
176 {
177 SVGA3dCmdDXPredCopyRegion *cmd =
178 SVGA3D_FIFOReserve(swc,
179 SVGA_3D_CMD_DX_PRED_COPY_REGION,
180 sizeof(SVGA3dCmdDXPredCopyRegion),
181 2); /* two relocations */
182 if (!cmd)
183 return PIPE_ERROR_OUT_OF_MEMORY;
184
185 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
186 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
187 cmd->dstSubResource = dstSubResource;
188 cmd->srcSubResource = srcSubResource;
189 cmd->box = *box;
190
191 swc->commit(swc);
192
193 return PIPE_OK;
194 }
195
196
197 enum pipe_error
198 SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,
199 struct svga_winsys_surface *dstSurf,
200 struct svga_winsys_surface *srcSurf)
201 {
202 SVGA3dCmdDXPredCopy *cmd =
203 SVGA3D_FIFOReserve(swc,
204 SVGA_3D_CMD_DX_PRED_COPY,
205 sizeof(SVGA3dCmdDXPredCopy),
206 2); /* two relocations */
207 if (!cmd)
208 return PIPE_ERROR_OUT_OF_MEMORY;
209
210 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
211 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
212
213 swc->commit(swc);
214
215 return PIPE_OK;
216 }
217
218 enum pipe_error
219 SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,
220 unsigned count,
221 const SVGA3dViewport *viewports)
222 {
223 SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
224
225 memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));
226
227 swc->commit(swc);
228 return PIPE_OK;
229 }
230
231
232 enum pipe_error
233 SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,
234 SVGA3dShaderType type,
235 struct svga_winsys_gb_shader *gbshader,
236 SVGA3dShaderId shaderId)
237 {
238 SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,
239 SVGA_3D_CMD_DX_SET_SHADER,
240 sizeof *cmd,
241 1); /* one relocation */
242 if (!cmd)
243 return PIPE_ERROR_OUT_OF_MEMORY;
244
245 swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);
246
247 cmd->type = type;
248 cmd->shaderId = shaderId;
249 swc->commit(swc);
250
251 return PIPE_OK;
252 }
253
254
255 enum pipe_error
256 SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
257 SVGA3dShaderType type,
258 uint32 startView,
259 unsigned count,
260 const SVGA3dShaderResourceViewId ids[],
261 struct svga_winsys_surface **views)
262 {
263 SVGA3dCmdDXSetShaderResources *cmd;
264 SVGA3dShaderResourceViewId *cmd_ids;
265 unsigned i;
266
267 cmd = SVGA3D_FIFOReserve(swc,
268 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
269 sizeof(SVGA3dCmdDXSetShaderResources) +
270 count * sizeof(SVGA3dShaderResourceViewId),
271 count); /* 'count' relocations */
272 if (!cmd)
273 return PIPE_ERROR_OUT_OF_MEMORY;
274
275
276 cmd->type = type;
277 cmd->startView = startView;
278
279 cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
280 for (i = 0; i < count; i++) {
281 swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
282 SVGA_RELOC_READ);
283 cmd_ids[i] = ids[i];
284 }
285
286 swc->commit(swc);
287 return PIPE_OK;
288 }
289
290
291 enum pipe_error
292 SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,
293 unsigned count,
294 uint32 startSampler,
295 SVGA3dShaderType type,
296 const SVGA3dSamplerId *samplerIds)
297 {
298 SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);
299
300 SVGA3D_COPY_BASIC_2(startSampler, type);
301 memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));
302
303 swc->commit(swc);
304 return PIPE_OK;
305 }
306
307
308 enum pipe_error
309 SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,
310 struct pipe_surface *color_surf,
311 const float *rgba)
312 {
313 SVGA3dCmdDXClearRenderTargetView *cmd;
314 struct svga_surface *ss = svga_surface(color_surf);
315
316 cmd = SVGA3D_FIFOReserve(swc,
317 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
318 sizeof(SVGA3dCmdDXClearRenderTargetView),
319 1); /* one relocation */
320 if (!cmd)
321 return PIPE_ERROR_OUT_OF_MEMORY;
322
323
324 /* NOTE: The following is pretty tricky. We need to emit a view/surface
325 * relocation and we have to provide a pointer to an ID which lies in
326 * the bounds of the command space which we just allocated. However,
327 * we then need to overwrite it with the original RenderTargetViewId.
328 */
329 view_relocation(swc, color_surf, &cmd->renderTargetViewId,
330 SVGA_RELOC_WRITE);
331 cmd->renderTargetViewId = ss->view_id;
332
333 COPY_4V(cmd->rgba.value, rgba);
334
335 swc->commit(swc);
336 return PIPE_OK;
337 }
338
339
340 enum pipe_error
341 SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
342 unsigned color_count,
343 struct pipe_surface **color_surfs,
344 struct pipe_surface *depth_stencil_surf)
345 {
346 const unsigned surf_count = color_count + 1;
347 SVGA3dCmdDXSetRenderTargets *cmd;
348 SVGA3dRenderTargetViewId *ctarget;
349 struct svga_surface *ss;
350 unsigned i;
351
352 assert(surf_count > 0);
353
354 cmd = SVGA3D_FIFOReserve(swc,
355 SVGA_3D_CMD_DX_SET_RENDERTARGETS,
356 sizeof(SVGA3dCmdDXSetRenderTargets) +
357 color_count * sizeof(SVGA3dRenderTargetViewId),
358 surf_count); /* 'surf_count' relocations */
359 if (!cmd)
360 return PIPE_ERROR_OUT_OF_MEMORY;
361
362 /* NOTE: See earlier comment about the tricky handling of the ViewIds.
363 */
364
365 /* Depth / Stencil buffer */
366 if (depth_stencil_surf) {
367 ss = svga_surface(depth_stencil_surf);
368 view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
369 SVGA_RELOC_WRITE);
370 cmd->depthStencilViewId = ss->view_id;
371 }
372 else {
373 /* no depth/stencil buffer - still need a relocation */
374 view_relocation(swc, NULL, &cmd->depthStencilViewId,
375 SVGA_RELOC_WRITE);
376 cmd->depthStencilViewId = SVGA3D_INVALID_ID;
377 }
378
379 /* Color buffers */
380 ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
381 for (i = 0; i < color_count; i++) {
382 if (color_surfs[i]) {
383 ss = svga_surface(color_surfs[i]);
384 view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
385 ctarget[i] = ss->view_id;
386 }
387 else {
388 view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
389 ctarget[i] = SVGA3D_INVALID_ID;
390 }
391 }
392
393 swc->commit(swc);
394 return PIPE_OK;
395 }
396
397
398 enum pipe_error
399 SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
400 SVGA3dBlendStateId blendId,
401 const float *blendFactor,
402 uint32 sampleMask)
403 {
404 SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);
405
406 SVGA3D_COPY_BASIC_2(blendId, sampleMask);
407 memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);
408
409 swc->commit(swc);
410 return PIPE_OK;
411 }
412
413 enum pipe_error
414 SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
415 SVGA3dDepthStencilStateId depthStencilId,
416 uint32 stencilRef)
417 {
418 SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);
419
420 SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);
421
422 swc->commit(swc);
423 return PIPE_OK;
424 }
425
426 enum pipe_error
427 SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
428 SVGA3dRasterizerStateId rasterizerId)
429 {
430 SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);
431
432 cmd->rasterizerId = rasterizerId;
433
434 swc->commit(swc);
435 return PIPE_OK;
436 }
437
438 enum pipe_error
439 SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
440 SVGA3dQueryId queryId,
441 uint32 predicateValue)
442 {
443 SVGA3dCmdDXSetPredication *cmd;
444
445 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
446 sizeof *cmd, 0);
447
448 if (!cmd)
449 return PIPE_ERROR_OUT_OF_MEMORY;
450
451 cmd->queryId = queryId;
452 cmd->predicateValue = predicateValue;
453 swc->commit(swc);
454 return PIPE_OK;
455 }
456
457 enum pipe_error
458 SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
459 unsigned count,
460 const SVGA3dSoTarget *targets,
461 struct svga_winsys_surface **surfaces)
462 {
463 SVGA3dCmdDXSetSOTargets *cmd;
464 SVGA3dSoTarget *sot;
465 unsigned i;
466
467 cmd = SVGA3D_FIFOReserve(swc,
468 SVGA_3D_CMD_DX_SET_SOTARGETS,
469 sizeof(SVGA3dCmdDXSetSOTargets) +
470 count * sizeof(SVGA3dSoTarget),
471 count);
472
473 if (!cmd)
474 return PIPE_ERROR_OUT_OF_MEMORY;
475
476 cmd->pad0 = 0;
477 sot = (SVGA3dSoTarget *)(cmd + 1);
478 for (i = 0; i < count; i++, sot++) {
479 if (surfaces[i]) {
480 sot->offset = targets[i].offset;
481 sot->sizeInBytes = targets[i].sizeInBytes;
482 swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
483 SVGA_RELOC_WRITE);
484 }
485 else {
486 sot->offset = 0;
487 sot->sizeInBytes = ~0u;
488 swc->surface_relocation(swc, &sot->sid, NULL, NULL,
489 SVGA_RELOC_WRITE);
490 }
491 }
492 swc->commit(swc);
493 return PIPE_OK;
494 }
495
496 enum pipe_error
497 SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
498 unsigned count,
499 const SVGASignedRect *rects)
500 {
501 SVGA3dCmdDXSetScissorRects *cmd;
502
503 assert(count > 0);
504 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
505 sizeof(SVGA3dCmdDXSetScissorRects) +
506 count * sizeof(SVGASignedRect),
507 0);
508 if (!cmd)
509 return PIPE_ERROR_OUT_OF_MEMORY;
510
511 memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));
512
513 swc->commit(swc);
514 return PIPE_OK;
515 }
516
517 enum pipe_error
518 SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
519 SVGA3dStreamOutputId soid)
520 {
521 SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);
522
523 cmd->soid = soid;
524
525 swc->commit(swc);
526 return PIPE_OK;
527 }
528
529 enum pipe_error
530 SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
531 uint32 vertexCount,
532 uint32 startVertexLocation)
533 {
534 SVGA3D_CREATE_COMMAND(Draw, DRAW);
535
536 SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);
537
538 swc->commit(swc);
539 return PIPE_OK;
540 }
541
542 enum pipe_error
543 SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
544 uint32 indexCount,
545 uint32 startIndexLocation,
546 int32 baseVertexLocation)
547 {
548 SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);
549
550 SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,
551 baseVertexLocation);
552
553 swc->commit(swc);
554 return PIPE_OK;
555 }
556
557 enum pipe_error
558 SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
559 uint32 vertexCountPerInstance,
560 uint32 instanceCount,
561 uint32 startVertexLocation,
562 uint32 startInstanceLocation)
563 {
564 SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);
565
566 SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,
567 startVertexLocation, startInstanceLocation);
568
569 swc->commit(swc);
570 return PIPE_OK;
571 }
572
573 enum pipe_error
574 SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
575 uint32 indexCountPerInstance,
576 uint32 instanceCount,
577 uint32 startIndexLocation,
578 int32 baseVertexLocation,
579 uint32 startInstanceLocation)
580 {
581 SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);
582
583 SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,
584 startIndexLocation, baseVertexLocation,
585 startInstanceLocation);
586
587 swc->commit(swc);
588 return PIPE_OK;
589 }
590
591 enum pipe_error
592 SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
593 {
594 SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);
595
596 swc->commit(swc);
597 return PIPE_OK;
598 }
599
600 enum pipe_error
601 SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
602 SVGA3dQueryId queryId,
603 SVGA3dQueryType type,
604 SVGA3dDXQueryFlags flags)
605 {
606 SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);
607
608 SVGA3D_COPY_BASIC_3(queryId, type, flags);
609
610 swc->commit(swc);
611 return PIPE_OK;
612 }
613
614 enum pipe_error
615 SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
616 SVGA3dQueryId queryId)
617 {
618 SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);
619
620 cmd->queryId = queryId;
621
622 swc->commit(swc);
623 return PIPE_OK;
624 }
625
626 enum pipe_error
627 SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
628 struct svga_winsys_gb_query *gbQuery,
629 SVGA3dQueryId queryId)
630 {
631 SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,
632 SVGA_3D_CMD_DX_BIND_QUERY,
633 sizeof *cmd,
634 1);
635 if (!cmd)
636 return PIPE_ERROR_OUT_OF_MEMORY;
637
638 cmd->queryId = queryId;
639 swc->query_relocation(swc, &cmd->mobid, gbQuery);
640
641 swc->commit(swc);
642 return PIPE_OK;
643 }
644
645 enum pipe_error
646 SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
647 SVGA3dQueryId queryId,
648 uint32 mobOffset)
649 {
650 SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);
651 SVGA3D_COPY_BASIC_2(queryId, mobOffset);
652 swc->commit(swc);
653 return PIPE_OK;
654 }
655
656 enum pipe_error
657 SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
658 SVGA3dQueryId queryId)
659 {
660 SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);
661 cmd->queryId = queryId;
662 swc->commit(swc);
663 return PIPE_OK;
664 }
665
666 enum pipe_error
667 SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
668 SVGA3dQueryId queryId)
669 {
670 SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);
671 cmd->queryId = queryId;
672 swc->commit(swc);
673 return PIPE_OK;
674 }
675
676
677 enum pipe_error
678 SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
679 struct pipe_surface *ds_surf,
680 uint16 flags,
681 uint16 stencil,
682 float depth)
683 {
684 SVGA3dCmdDXClearDepthStencilView *cmd;
685 struct svga_surface *ss = svga_surface(ds_surf);
686
687 cmd = SVGA3D_FIFOReserve(swc,
688 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
689 sizeof(SVGA3dCmdDXClearDepthStencilView),
690 1); /* one relocation */
691 if (!cmd)
692 return PIPE_ERROR_OUT_OF_MEMORY;
693
694 /* NOTE: The following is pretty tricky. We need to emit a view/surface
695 * relocation and we have to provide a pointer to an ID which lies in
696 * the bounds of the command space which we just allocated. However,
697 * we then need to overwrite it with the original DepthStencilViewId.
698 */
699 view_relocation(swc, ds_surf, &cmd->depthStencilViewId,
700 SVGA_RELOC_WRITE);
701 cmd->depthStencilViewId = ss->view_id;
702 cmd->flags = flags;
703 cmd->stencil = stencil;
704 cmd->depth = depth;
705
706 swc->commit(swc);
707 return PIPE_OK;
708 }
709
710 enum pipe_error
711 SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
712 SVGA3dShaderResourceViewId shaderResourceViewId,
713 struct svga_winsys_surface *surface,
714 SVGA3dSurfaceFormat format,
715 SVGA3dResourceType resourceDimension,
716 const SVGA3dShaderResourceViewDesc *desc)
717 {
718 SVGA3dCmdDXDefineShaderResourceView *cmd;
719
720 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
721 sizeof(SVGA3dCmdDXDefineShaderResourceView),
722 1); /* one relocation */
723 if (!cmd)
724 return PIPE_ERROR_OUT_OF_MEMORY;
725
726 SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);
727
728 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
729 SVGA_RELOC_READ);
730
731 cmd->desc = *desc;
732
733 swc->commit(swc);
734 return PIPE_OK;
735 }
736
737 enum pipe_error
738 SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
739 SVGA3dShaderResourceViewId shaderResourceViewId)
740 {
741 SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,
742 DESTROY_SHADERRESOURCE_VIEW);
743
744 cmd->shaderResourceViewId = shaderResourceViewId;
745
746 swc->commit(swc);
747 return PIPE_OK;
748 }
749
750
751 enum pipe_error
752 SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
753 SVGA3dRenderTargetViewId renderTargetViewId,
754 struct svga_winsys_surface *surface,
755 SVGA3dSurfaceFormat format,
756 SVGA3dResourceType resourceDimension,
757 const SVGA3dRenderTargetViewDesc *desc)
758 {
759 SVGA3dCmdDXDefineRenderTargetView *cmd;
760
761 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
762 sizeof(SVGA3dCmdDXDefineRenderTargetView),
763 1); /* one relocation */
764 if (!cmd)
765 return PIPE_ERROR_OUT_OF_MEMORY;
766
767 SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);
768 cmd->desc = *desc;
769
770 surface_to_resourceid(swc, surface,
771 &cmd->sid,
772 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
773
774 swc->commit(swc);
775 return PIPE_OK;
776 }
777
778 enum pipe_error
779 SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
780 SVGA3dRenderTargetViewId renderTargetViewId)
781 {
782 SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);
783
784 cmd->renderTargetViewId = renderTargetViewId;
785
786 swc->commit(swc);
787 return PIPE_OK;
788 }
789
790
791 enum pipe_error
792 SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
793 SVGA3dDepthStencilViewId depthStencilViewId,
794 struct svga_winsys_surface *surface,
795 SVGA3dSurfaceFormat format,
796 SVGA3dResourceType resourceDimension,
797 const SVGA3dRenderTargetViewDesc *desc)
798 {
799 SVGA3dCmdDXDefineDepthStencilView *cmd;
800
801 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
802 sizeof(SVGA3dCmdDXDefineDepthStencilView),
803 1); /* one relocation */
804 if (!cmd)
805 return PIPE_ERROR_OUT_OF_MEMORY;
806
807 SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);
808 cmd->mipSlice = desc->tex.mipSlice;
809 cmd->firstArraySlice = desc->tex.firstArraySlice;
810 cmd->arraySize = desc->tex.arraySize;
811
812 surface_to_resourceid(swc, surface,
813 &cmd->sid,
814 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
815
816 swc->commit(swc);
817 return PIPE_OK;
818 }
819
820 enum pipe_error
821 SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
822 SVGA3dDepthStencilViewId depthStencilViewId)
823 {
824 SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);
825
826 cmd->depthStencilViewId = depthStencilViewId;
827
828 swc->commit(swc);
829 return PIPE_OK;
830 }
831
832 enum pipe_error
833 SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
834 unsigned count,
835 SVGA3dElementLayoutId elementLayoutId,
836 const SVGA3dInputElementDesc *elements)
837 {
838 SVGA3dCmdDXDefineElementLayout *cmd;
839 unsigned i;
840
841 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
842 sizeof(SVGA3dCmdDXDefineElementLayout) +
843 count * sizeof(SVGA3dInputElementDesc), 0);
844 if (!cmd)
845 return PIPE_ERROR_OUT_OF_MEMORY;
846
847 /* check that all offsets are multiples of four */
848 for (i = 0; i < count; i++) {
849 assert(elements[i].alignedByteOffset % 4 == 0);
850 }
851 (void) i; /* silence unused var in release build */
852
853 cmd->elementLayoutId = elementLayoutId;
854 memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));
855
856 swc->commit(swc);
857 return PIPE_OK;
858 }
859
860 enum pipe_error
861 SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
862 SVGA3dElementLayoutId elementLayoutId)
863 {
864 SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);
865
866 cmd->elementLayoutId = elementLayoutId;
867
868 swc->commit(swc);
869 return PIPE_OK;
870 }
871
872 enum pipe_error
873 SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
874 SVGA3dBlendStateId blendId,
875 uint8 alphaToCoverageEnable,
876 uint8 independentBlendEnable,
877 const SVGA3dDXBlendStatePerRT *perRT)
878 {
879 SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
880
881 cmd->blendId = blendId;
882 cmd->alphaToCoverageEnable = alphaToCoverageEnable;
883 cmd->independentBlendEnable = independentBlendEnable;
884 memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));
885 cmd->pad0 = 0;
886
887 swc->commit(swc);
888 return PIPE_OK;
889 }
890
891 enum pipe_error
892 SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
893 SVGA3dBlendStateId blendId)
894 {
895 SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);
896
897 cmd->blendId = blendId;
898
899 swc->commit(swc);
900 return PIPE_OK;
901 }
902
903 enum pipe_error
904 SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
905 SVGA3dDepthStencilStateId depthStencilId,
906 uint8 depthEnable,
907 SVGA3dDepthWriteMask depthWriteMask,
908 SVGA3dComparisonFunc depthFunc,
909 uint8 stencilEnable,
910 uint8 frontEnable,
911 uint8 backEnable,
912 uint8 stencilReadMask,
913 uint8 stencilWriteMask,
914 uint8 frontStencilFailOp,
915 uint8 frontStencilDepthFailOp,
916 uint8 frontStencilPassOp,
917 SVGA3dComparisonFunc frontStencilFunc,
918 uint8 backStencilFailOp,
919 uint8 backStencilDepthFailOp,
920 uint8 backStencilPassOp,
921 SVGA3dComparisonFunc backStencilFunc)
922 {
923 SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);
924
925 SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,
926 depthWriteMask, depthFunc,
927 stencilEnable, frontEnable,
928 backEnable, stencilReadMask,
929 stencilWriteMask);
930 SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,
931 frontStencilPassOp, frontStencilFunc,
932 backStencilFailOp, backStencilDepthFailOp,
933 backStencilPassOp, backStencilFunc);
934
935 swc->commit(swc);
936 return PIPE_OK;
937 }
938
939 enum pipe_error
940 SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
941 SVGA3dDepthStencilStateId depthStencilId)
942 {
943 SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,
944 DESTROY_DEPTHSTENCIL_STATE);
945
946 cmd->depthStencilId = depthStencilId;
947
948 swc->commit(swc);
949 return PIPE_OK;
950 }
951
952 enum pipe_error
953 SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
954 SVGA3dRasterizerStateId rasterizerId,
955 uint8 fillMode,
956 SVGA3dCullMode cullMode,
957 uint8 frontCounterClockwise,
958 int32 depthBias,
959 float depthBiasClamp,
960 float slopeScaledDepthBias,
961 uint8 depthClipEnable,
962 uint8 scissorEnable,
963 uint8 multisampleEnable,
964 uint8 antialiasedLineEnable,
965 float lineWidth,
966 uint8 lineStippleEnable,
967 uint8 lineStippleFactor,
968 uint16 lineStipplePattern,
969 uint8 provokingVertexLast)
970 {
971 SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);
972
973 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
974 cullMode, frontCounterClockwise,
975 depthBias);
976 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
977 depthClipEnable, scissorEnable,
978 multisampleEnable, antialiasedLineEnable);
979 cmd->lineWidth = lineWidth;
980 cmd->lineStippleEnable = lineStippleEnable;
981 cmd->lineStippleFactor = lineStippleFactor;
982 cmd->lineStipplePattern = lineStipplePattern;
983 cmd->provokingVertexLast = provokingVertexLast;
984
985 swc->commit(swc);
986 return PIPE_OK;
987 }
988
989 enum pipe_error
990 SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
991 SVGA3dRasterizerStateId rasterizerId)
992 {
993 SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);
994
995 cmd->rasterizerId = rasterizerId;
996
997 swc->commit(swc);
998 return PIPE_OK;
999 }
1000
1001 enum pipe_error
1002 SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
1003 SVGA3dSamplerId samplerId,
1004 SVGA3dFilter filter,
1005 uint8 addressU,
1006 uint8 addressV,
1007 uint8 addressW,
1008 float mipLODBias,
1009 uint8 maxAnisotropy,
1010 uint8 comparisonFunc,
1011 SVGA3dRGBAFloat borderColor,
1012 float minLOD,
1013 float maxLOD)
1014 {
1015 SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);
1016
1017 SVGA3D_COPY_BASIC_6(samplerId, filter,
1018 addressU, addressV,
1019 addressW, mipLODBias);
1020 SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,
1021 borderColor, minLOD,
1022 maxLOD);
1023
1024 swc->commit(swc);
1025 return PIPE_OK;
1026 }
1027
1028 enum pipe_error
1029 SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
1030 SVGA3dSamplerId samplerId)
1031 {
1032 SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);
1033
1034 cmd->samplerId = samplerId;
1035
1036 swc->commit(swc);
1037 return PIPE_OK;
1038 }
1039
1040
1041 enum pipe_error
1042 SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
1043 struct svga_winsys_gb_shader *gbshader,
1044 SVGA3dShaderId shaderId,
1045 SVGA3dShaderType type,
1046 uint32 sizeInBytes)
1047 {
1048 SVGA3dCmdHeader *header;
1049 SVGA3dCmdDXDefineShader *dcmd;
1050 SVGA3dCmdDXBindShader *bcmd;
1051 unsigned totalSize = 2 * sizeof(*header) +
1052 sizeof(*dcmd) + sizeof(*bcmd);
1053
1054 /* Make sure there is room for both commands */
1055 header = swc->reserve(swc, totalSize, 2);
1056 if (!header)
1057 return PIPE_ERROR_OUT_OF_MEMORY;
1058
1059 /* DXDefineShader command */
1060 header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;
1061 header->size = sizeof(*dcmd);
1062 dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);
1063 dcmd->shaderId = shaderId;
1064 dcmd->type = type;
1065 dcmd->sizeInBytes = sizeInBytes;
1066
1067 /* DXBindShader command */
1068 header = (SVGA3dCmdHeader *)(dcmd + 1);
1069
1070 header->id = SVGA_3D_CMD_DX_BIND_SHADER;
1071 header->size = sizeof(*bcmd);
1072 bcmd = (SVGA3dCmdDXBindShader *)(header + 1);
1073
1074 bcmd->cid = swc->cid;
1075 swc->shader_relocation(swc, NULL, &bcmd->mobid,
1076 &bcmd->offsetInBytes, gbshader, 0);
1077
1078 bcmd->shid = shaderId;
1079
1080 swc->commit(swc);
1081 return PIPE_OK;
1082 }
1083
1084 enum pipe_error
1085 SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
1086 SVGA3dShaderId shaderId)
1087 {
1088 SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);
1089
1090 cmd->shaderId = shaderId;
1091
1092 swc->commit(swc);
1093 return PIPE_OK;
1094 }
1095
1096 enum pipe_error
1097 SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
1098 SVGA3dStreamOutputId soid,
1099 uint32 numOutputStreamEntries,
1100 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1101 const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
1102 {
1103 unsigned i;
1104 SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
1105
1106 cmd->soid = soid;
1107 cmd->numOutputStreamEntries = numOutputStreamEntries;
1108
1109 for (i = 0; i < Elements(cmd->streamOutputStrideInBytes); i++)
1110 cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1111
1112 memcpy(cmd->decl, decl,
1113 sizeof(SVGA3dStreamOutputDeclarationEntry)
1114 * SVGA3D_MAX_STREAMOUT_DECLS);
1115
1116 swc->commit(swc);
1117 return PIPE_OK;
1118 }
1119
1120 enum pipe_error
1121 SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
1122 SVGA3dStreamOutputId soid)
1123 {
1124 SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);
1125
1126 cmd->soid = soid;
1127
1128 swc->commit(swc);
1129 return PIPE_OK;
1130 }
1131
1132 enum pipe_error
1133 SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
1134 SVGA3dElementLayoutId elementLayoutId)
1135 {
1136 SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);
1137
1138 cmd->elementLayoutId = elementLayoutId;
1139
1140 swc->commit(swc);
1141 return PIPE_OK;
1142 }
1143
1144 enum pipe_error
1145 SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
1146 unsigned count,
1147 uint32 startBuffer,
1148 const SVGA3dVertexBuffer *bufferInfo,
1149 struct svga_winsys_surface **surfaces)
1150 {
1151 SVGA3dCmdDXSetVertexBuffers *cmd;
1152 SVGA3dVertexBuffer *bufs;
1153 unsigned i;
1154
1155 assert(count > 0);
1156
1157 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
1158 sizeof(SVGA3dCmdDXSetVertexBuffers) +
1159 count * sizeof(SVGA3dVertexBuffer),
1160 count); /* 'count' relocations */
1161 if (!cmd)
1162 return PIPE_ERROR_OUT_OF_MEMORY;
1163
1164 cmd->startBuffer = startBuffer;
1165
1166 bufs = (SVGA3dVertexBuffer *) &cmd[1];
1167 for (i = 0; i < count; i++) {
1168 bufs[i].stride = bufferInfo[i].stride;
1169 bufs[i].offset = bufferInfo[i].offset;
1170 assert(bufs[i].stride % 4 == 0);
1171 assert(bufs[i].offset % 4 == 0);
1172 swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
1173 SVGA_RELOC_READ);
1174 }
1175
1176 swc->commit(swc);
1177 return PIPE_OK;
1178 }
1179
1180 enum pipe_error
1181 SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
1182 SVGA3dPrimitiveType topology)
1183 {
1184 SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);
1185
1186 cmd->topology = topology;
1187
1188 swc->commit(swc);
1189 return PIPE_OK;
1190 }
1191
1192 enum pipe_error
1193 SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,
1194 struct svga_winsys_surface *indexes,
1195 SVGA3dSurfaceFormat format,
1196 uint32 offset)
1197 {
1198 SVGA3dCmdDXSetIndexBuffer *cmd;
1199
1200 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
1201 sizeof(SVGA3dCmdDXSetIndexBuffer),
1202 1); /* one relocations */
1203 if (!cmd)
1204 return PIPE_ERROR_OUT_OF_MEMORY;
1205
1206 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1207 SVGA3D_COPY_BASIC_2(format, offset);
1208
1209 swc->commit(swc);
1210 return PIPE_OK;
1211 }
1212
1213 enum pipe_error
1214 SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,
1215 unsigned slot,
1216 SVGA3dShaderType type,
1217 struct svga_winsys_surface *surface,
1218 uint32 offsetInBytes,
1219 uint32 sizeInBytes)
1220 {
1221 SVGA3dCmdDXSetSingleConstantBuffer *cmd;
1222
1223 assert(offsetInBytes % 256 == 0);
1224 if (!surface)
1225 assert(sizeInBytes == 0);
1226 else
1227 assert(sizeInBytes > 0);
1228
1229 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
1230 sizeof(SVGA3dCmdDXSetSingleConstantBuffer),
1231 1); /* one relocation */
1232 if (!cmd)
1233 return PIPE_ERROR_OUT_OF_MEMORY;
1234
1235 cmd->slot = slot;
1236 cmd->type = type;
1237 swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);
1238 cmd->offsetInBytes = offsetInBytes;
1239 cmd->sizeInBytes = sizeInBytes;
1240
1241 swc->commit(swc);
1242
1243 return PIPE_OK;
1244 }
1245
1246
1247 enum pipe_error
1248 SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,
1249 struct svga_winsys_surface *surface,
1250 unsigned subResource)
1251 {
1252 SVGA3dCmdDXReadbackSubResource *cmd;
1253
1254 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
1255 sizeof(SVGA3dCmdDXReadbackSubResource),
1256 1);
1257 if (!cmd)
1258 return PIPE_ERROR_OUT_OF_MEMORY;
1259
1260 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1261 SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);
1262 cmd->subResource = subResource;
1263
1264 swc->commit(swc);
1265 return PIPE_OK;
1266 }
1267
1268 enum pipe_error
1269 SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
1270 struct svga_winsys_surface *surface,
1271 const SVGA3dBox *box,
1272 unsigned subResource)
1273 {
1274 SVGA3dCmdDXUpdateSubResource *cmd;
1275
1276 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
1277 sizeof(SVGA3dCmdDXUpdateSubResource),
1278 1);
1279 if (!cmd)
1280 return PIPE_ERROR_OUT_OF_MEMORY;
1281
1282 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1283 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
1284 cmd->subResource = subResource;
1285 cmd->box = *box;
1286
1287 swc->commit(swc);
1288 return PIPE_OK;
1289 }