svga: add new command-buffer-size HUD query
[mesa.git] / src / gallium / drivers / svga / svga_context.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
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25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_blitter.h"
35 #include "util/list.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "svga_screen.h"
40 #include "svga_state.h"
41 #include "svga_winsys.h"
42 #include "svga_hw_reg.h"
43 #include "svga3d_shaderdefs.h"
44
45
46 /** Non-GPU queries for gallium HUD */
47 /* per-frame counters */
48 #define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
49 #define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1)
50 #define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2)
51 #define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3)
52 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
54 #define SVGA_QUERY_NUM_BYTES_UPLOADED (PIPE_QUERY_DRIVER_SPECIFIC + 6)
55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE (PIPE_QUERY_DRIVER_SPECIFIC + 7)
56
57 /* running total counters */
58 #define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 8)
59 #define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 9)
60 #define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 10)
61 #define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 11)
62 #define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
63 #define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 13)
64 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
65 #define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 14)
66
67 /**
68 * Maximum supported number of constant buffers per shader
69 */
70 #define SVGA_MAX_CONST_BUFS 14
71
72 /**
73 * Maximum constant buffer size that can be set in the
74 * DXSetSingleConstantBuffer command is
75 * DX10 constant buffer element count * 4 4-bytes components
76 */
77 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
78
79 #define CONST0_UPLOAD_ALIGNMENT 256
80
81 struct draw_vertex_shader;
82 struct draw_fragment_shader;
83 struct svga_shader_variant;
84 struct SVGACmdMemory;
85 struct util_bitmask;
86
87
88 struct svga_cache_context;
89 struct svga_tracked_state;
90
91 struct svga_blend_state {
92 unsigned need_white_fragments:1;
93 unsigned independent_blend_enable:1;
94 unsigned alpha_to_coverage:1;
95 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
96
97 /** Per-render target state */
98 struct {
99 uint8_t writemask;
100
101 boolean blend_enable;
102 uint8_t srcblend;
103 uint8_t dstblend;
104 uint8_t blendeq;
105
106 boolean separate_alpha_blend_enable;
107 uint8_t srcblend_alpha;
108 uint8_t dstblend_alpha;
109 uint8_t blendeq_alpha;
110 } rt[PIPE_MAX_COLOR_BUFS];
111
112 SVGA3dBlendStateId id; /**< vgpu10 */
113 };
114
115 struct svga_depth_stencil_state {
116 unsigned zfunc:8;
117 unsigned zenable:1;
118 unsigned zwriteenable:1;
119
120 unsigned alphatestenable:1;
121 unsigned alphafunc:8;
122
123 struct {
124 unsigned enabled:1;
125 unsigned func:8;
126 unsigned fail:8;
127 unsigned zfail:8;
128 unsigned pass:8;
129 } stencil[2];
130
131 /* SVGA3D has one ref/mask/writemask triple shared between front &
132 * back face stencil. We really need two:
133 */
134 unsigned stencil_mask:8;
135 unsigned stencil_writemask:8;
136
137 float alpharef;
138
139 SVGA3dDepthStencilStateId id; /**< vgpu10 */
140 };
141
142 #define SVGA_UNFILLED_DISABLE 0
143 #define SVGA_UNFILLED_LINE 1
144 #define SVGA_UNFILLED_POINT 2
145
146 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
147 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
148 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
149
150 struct svga_rasterizer_state {
151 struct pipe_rasterizer_state templ; /* needed for draw module */
152
153 unsigned shademode:8;
154 unsigned cullmode:8;
155 unsigned scissortestenable:1;
156 unsigned multisampleantialias:1;
157 unsigned antialiasedlineenable:1;
158 unsigned lastpixel:1;
159 unsigned pointsprite:1;
160
161 unsigned linepattern;
162
163 float slopescaledepthbias;
164 float depthbias;
165 float pointsize;
166 float linewidth;
167
168 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
169
170 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
171 unsigned need_pipeline:16;
172
173 SVGA3dRasterizerStateId id; /**< vgpu10 */
174
175 /** For debugging: */
176 const char* need_pipeline_tris_str;
177 const char* need_pipeline_lines_str;
178 const char* need_pipeline_points_str;
179 };
180
181 struct svga_sampler_state {
182 unsigned mipfilter;
183 unsigned magfilter;
184 unsigned minfilter;
185 unsigned aniso_level;
186 float lod_bias;
187 unsigned addressu;
188 unsigned addressv;
189 unsigned addressw;
190 unsigned bordercolor;
191 unsigned normalized_coords:1;
192 unsigned compare_mode:1;
193 unsigned compare_func:3;
194
195 unsigned min_lod;
196 unsigned view_min_lod;
197 unsigned view_max_lod;
198
199 SVGA3dSamplerId id;
200 };
201
202
203 struct svga_pipe_sampler_view
204 {
205 struct pipe_sampler_view base;
206
207 SVGA3dShaderResourceViewId id;
208 };
209
210
211 static inline struct svga_pipe_sampler_view *
212 svga_pipe_sampler_view(struct pipe_sampler_view *v)
213 {
214 return (struct svga_pipe_sampler_view *) v;
215 }
216
217
218 struct svga_velems_state {
219 unsigned count;
220 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
221 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
222
223 /** Bitmasks indicating which attributes need format conversion */
224 unsigned adjust_attrib_range; /**< range adjustment */
225 unsigned attrib_is_pure_int; /**< pure int */
226 unsigned adjust_attrib_w_1; /**< set w = 1 */
227 unsigned adjust_attrib_itof; /**< int->float */
228 unsigned adjust_attrib_utof; /**< uint->float */
229 unsigned attrib_is_bgra; /**< R / B swizzling */
230 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
231 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
232 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
233
234 boolean need_swvfetch;
235
236 SVGA3dElementLayoutId id; /**< VGPU10 */
237 };
238
239 /* Use to calculate differences between state emitted to hardware and
240 * current driver-calculated state.
241 */
242 struct svga_state
243 {
244 const struct svga_blend_state *blend;
245 const struct svga_depth_stencil_state *depth;
246 const struct svga_rasterizer_state *rast;
247 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
248 const struct svga_velems_state *velems;
249
250 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
251 struct svga_fragment_shader *fs;
252 struct svga_vertex_shader *vs;
253 struct svga_geometry_shader *user_gs; /* user-specified GS */
254 struct svga_geometry_shader *gs; /* derived GS */
255
256 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
257 struct pipe_index_buffer ib;
258 /** Constant buffers for each shader.
259 * The size should probably always match with that of
260 * svga_shader_emitter_v10.num_shader_consts.
261 */
262 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
263
264 struct pipe_framebuffer_state framebuffer;
265 float depthscale;
266
267 /* Hack to limit the number of different render targets between
268 * flushes. Helps avoid blowing out our surface cache in EXA.
269 */
270 int nr_fbs;
271
272 struct pipe_poly_stipple poly_stipple;
273 struct pipe_scissor_state scissor;
274 struct pipe_blend_color blend_color;
275 struct pipe_stencil_ref stencil_ref;
276 struct pipe_clip_state clip;
277 struct pipe_viewport_state viewport;
278
279 unsigned num_samplers[PIPE_SHADER_TYPES];
280 unsigned num_sampler_views[PIPE_SHADER_TYPES];
281 unsigned num_vertex_buffers;
282 unsigned reduced_prim;
283
284 struct {
285 unsigned flag_1d;
286 unsigned flag_srgb;
287 } tex_flags;
288
289 unsigned sample_mask;
290 };
291
292 struct svga_prescale {
293 float translate[4];
294 float scale[4];
295 boolean enabled;
296 };
297
298
299 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
300 */
301 struct svga_hw_clear_state
302 {
303 SVGA3dRect viewport;
304
305 struct {
306 float zmin, zmax;
307 } depthrange;
308
309 struct pipe_framebuffer_state framebuffer;
310 struct svga_prescale prescale;
311 };
312
313 struct svga_hw_view_state
314 {
315 struct pipe_resource *texture;
316 struct svga_sampler_view *v;
317 unsigned min_lod;
318 unsigned max_lod;
319 boolean dirty;
320 };
321
322 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
323 */
324 struct svga_hw_draw_state
325 {
326 unsigned rs[SVGA3D_RS_MAX];
327 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
328 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
329
330 struct svga_shader_variant *fs;
331 struct svga_shader_variant *vs;
332 struct svga_shader_variant *gs;
333 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
334 unsigned num_views;
335 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
336
337 /* Bitmask of enabled constant bufffers */
338 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
339
340 /* VGPU10 HW state (used to prevent emitting redundant state) */
341 SVGA3dDepthStencilStateId depth_stencil_id;
342 unsigned stencil_ref;
343 SVGA3dBlendStateId blend_id;
344 float blend_factor[4];
345 unsigned blend_sample_mask;
346 SVGA3dRasterizerStateId rasterizer_id;
347 SVGA3dElementLayoutId layout_id;
348 SVGA3dPrimitiveType topology;
349
350 /** Vertex buffer state */
351 SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
352 struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
353 unsigned num_vbuffers;
354
355 struct svga_winsys_surface *ib; /**< index buffer for drawing */
356 SVGA3dSurfaceFormat ib_format;
357 unsigned ib_offset;
358
359 unsigned num_samplers[PIPE_SHADER_TYPES];
360 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
361
362 /* used for rebinding */
363 unsigned num_sampler_views[PIPE_SHADER_TYPES];
364 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
365 };
366
367
368 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
369 */
370 struct svga_sw_state
371 {
372 /* which parts we need */
373 boolean need_swvfetch;
374 boolean need_pipeline;
375 boolean need_swtnl;
376
377 /* Flag to make sure that need sw is on while
378 * updating state within a swtnl call.
379 */
380 boolean in_swtnl_draw;
381 };
382
383
384 /* Queue some state updates (like rss) and submit them to hardware in
385 * a single packet.
386 */
387 struct svga_hw_queue;
388
389 struct svga_query;
390 struct svga_qmem_alloc_entry;
391
392 struct svga_context
393 {
394 struct pipe_context pipe;
395 struct svga_winsys_context *swc;
396 struct blitter_context *blitter;
397 struct u_upload_mgr *const0_upload;
398
399 struct {
400 boolean no_swtnl;
401 boolean force_swtnl;
402 boolean use_min_mipmap;
403
404 /* incremented for each shader */
405 unsigned shader_id;
406
407 unsigned disable_shader;
408
409 boolean no_line_width;
410 boolean force_hw_line_stipple;
411
412 /** To report perf/conformance/etc issues to the state tracker */
413 struct pipe_debug_callback callback;
414 } debug;
415
416 struct {
417 struct draw_context *draw;
418 struct vbuf_render *backend;
419 unsigned hw_prim;
420 boolean new_vbuf;
421 boolean new_vdecl;
422 } swtnl;
423
424 /* Bitmask of blend state objects IDs */
425 struct util_bitmask *blend_object_id_bm;
426
427 /* Bitmask of depth/stencil state objects IDs */
428 struct util_bitmask *ds_object_id_bm;
429
430 /* Bitmaks of input element object IDs */
431 struct util_bitmask *input_element_object_id_bm;
432
433 /* Bitmask of rasterizer object IDs */
434 struct util_bitmask *rast_object_id_bm;
435
436 /* Bitmask of sampler state objects IDs */
437 struct util_bitmask *sampler_object_id_bm;
438
439 /* Bitmask of sampler view IDs */
440 struct util_bitmask *sampler_view_id_bm;
441
442 /* Bitmask of used shader IDs */
443 struct util_bitmask *shader_id_bm;
444
445 /* Bitmask of used surface view IDs */
446 struct util_bitmask *surface_view_id_bm;
447
448 /* Bitmask of used stream output IDs */
449 struct util_bitmask *stream_output_id_bm;
450
451 /* Bitmask of used query IDs */
452 struct util_bitmask *query_id_bm;
453
454 struct {
455 unsigned dirty[SVGA_STATE_MAX];
456
457 /** bitmasks of which const buffers are changed */
458 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
459
460 unsigned texture_timestamp;
461
462 /*
463 */
464 struct svga_sw_state sw;
465 struct svga_hw_draw_state hw_draw;
466 struct svga_hw_clear_state hw_clear;
467 } state;
468
469 struct svga_state curr; /* state from the state tracker */
470 unsigned dirty; /* statechanges since last update_state() */
471
472 union {
473 struct {
474 unsigned rendertargets:1;
475 unsigned texture_samplers:1;
476 unsigned constbufs:1;
477 unsigned vs:1;
478 unsigned fs:1;
479 unsigned gs:1;
480 unsigned query:1;
481 } flags;
482 unsigned val;
483 } rebind;
484
485 struct svga_hwtnl *hwtnl;
486
487 /** Queries states */
488 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
489 unsigned gb_query_len; /**< gb query object size */
490 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
491 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
492 /**< query mem block mapping */
493 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
494
495 /** List of buffers with queued transfers */
496 struct list_head dirty_buffers;
497
498 /** performance / info queries for HUD */
499 struct {
500 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
501 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
502 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
503 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
504 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
505 uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
506 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
507 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
508 uint64_t num_state_objects; /**< SVGA_QUERY_NUM_STATE_OBJECTS */
509 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
510 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
511 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
512 } hud;
513
514 /** The currently bound stream output targets */
515 unsigned num_so_targets;
516 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
517 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
518 struct svga_stream_output *current_so;
519
520 /** A blend state with blending disabled, for falling back to when blending
521 * is illegal (e.g. an integer texture is bound)
522 */
523 struct svga_blend_state *noop_blend;
524
525 struct {
526 struct pipe_resource *texture;
527 struct svga_pipe_sampler_view *sampler_view;
528 void *sampler;
529 } polygon_stipple;
530
531 /** Alternate rasterizer states created for point sprite */
532 struct svga_rasterizer_state *rasterizer_no_cull[2];
533 };
534
535 /* A flag for each state_tracker state object:
536 */
537 #define SVGA_NEW_BLEND 0x1
538 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
539 #define SVGA_NEW_RAST 0x4
540 #define SVGA_NEW_SAMPLER 0x8
541 #define SVGA_NEW_TEXTURE 0x10
542 #define SVGA_NEW_VBUFFER 0x20
543 #define SVGA_NEW_VELEMENT 0x40
544 #define SVGA_NEW_FS 0x80
545 #define SVGA_NEW_VS 0x100
546 #define SVGA_NEW_FS_CONST_BUFFER 0x200
547 #define SVGA_NEW_VS_CONST_BUFFER 0x400
548 #define SVGA_NEW_FRAME_BUFFER 0x800
549 #define SVGA_NEW_STIPPLE 0x1000
550 #define SVGA_NEW_SCISSOR 0x2000
551 #define SVGA_NEW_BLEND_COLOR 0x4000
552 #define SVGA_NEW_CLIP 0x8000
553 #define SVGA_NEW_VIEWPORT 0x10000
554 #define SVGA_NEW_PRESCALE 0x20000
555 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
556 #define SVGA_NEW_TEXTURE_BINDING 0x80000
557 #define SVGA_NEW_NEED_PIPELINE 0x100000
558 #define SVGA_NEW_NEED_SWVFETCH 0x200000
559 #define SVGA_NEW_NEED_SWTNL 0x400000
560 #define SVGA_NEW_FS_VARIANT 0x800000
561 #define SVGA_NEW_VS_VARIANT 0x1000000
562 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
563 #define SVGA_NEW_STENCIL_REF 0x8000000
564 #define SVGA_NEW_GS 0x10000000
565 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
566 #define SVGA_NEW_GS_VARIANT 0x40000000
567
568
569
570
571 /***********************************************************************
572 * svga_clear.c:
573 */
574 void svga_clear(struct pipe_context *pipe,
575 unsigned buffers,
576 const union pipe_color_union *color,
577 double depth,
578 unsigned stencil);
579
580
581 /***********************************************************************
582 * svga_screen_texture.c:
583 */
584 void svga_mark_surfaces_dirty(struct svga_context *svga);
585
586
587
588
589 void svga_init_state_functions( struct svga_context *svga );
590 void svga_init_flush_functions( struct svga_context *svga );
591 void svga_init_string_functions( struct svga_context *svga );
592 void svga_init_blit_functions(struct svga_context *svga);
593
594 void svga_init_blend_functions( struct svga_context *svga );
595 void svga_init_depth_stencil_functions( struct svga_context *svga );
596 void svga_init_misc_functions( struct svga_context *svga );
597 void svga_init_rasterizer_functions( struct svga_context *svga );
598 void svga_init_sampler_functions( struct svga_context *svga );
599 void svga_init_fs_functions( struct svga_context *svga );
600 void svga_init_vs_functions( struct svga_context *svga );
601 void svga_init_gs_functions( struct svga_context *svga );
602 void svga_init_vertex_functions( struct svga_context *svga );
603 void svga_init_constbuffer_functions( struct svga_context *svga );
604 void svga_init_draw_functions( struct svga_context *svga );
605 void svga_init_query_functions( struct svga_context *svga );
606 void svga_init_surface_functions(struct svga_context *svga);
607 void svga_init_stream_output_functions( struct svga_context *svga );
608
609 void svga_cleanup_vertex_state( struct svga_context *svga );
610 void svga_cleanup_tss_binding( struct svga_context *svga );
611 void svga_cleanup_framebuffer( struct svga_context *svga );
612
613 void svga_context_flush( struct svga_context *svga,
614 struct pipe_fence_handle **pfence );
615
616 void svga_context_finish(struct svga_context *svga);
617
618 void svga_hwtnl_flush_retry( struct svga_context *svga );
619 void svga_hwtnl_flush_buffer( struct svga_context *svga,
620 struct pipe_resource *buffer );
621
622 void svga_surfaces_flush(struct svga_context *svga);
623
624 struct pipe_context *
625 svga_context_create(struct pipe_screen *screen,
626 void *priv, unsigned flags);
627
628
629 /***********************************************************************
630 * Inline conversion functions. These are better-typed than the
631 * macros used previously:
632 */
633 static inline struct svga_context *
634 svga_context( struct pipe_context *pipe )
635 {
636 return (struct svga_context *)pipe;
637 }
638
639
640 static inline boolean
641 svga_have_gb_objects(const struct svga_context *svga)
642 {
643 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
644 }
645
646 static inline boolean
647 svga_have_gb_dma(const struct svga_context *svga)
648 {
649 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
650 }
651
652 static inline boolean
653 svga_have_vgpu10(const struct svga_context *svga)
654 {
655 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
656 }
657
658 static inline boolean
659 svga_need_to_rebind_resources(const struct svga_context *svga)
660 {
661 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
662 }
663
664 static inline boolean
665 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
666 {
667 return memcmp(r1, r2, sizeof(*r1)) == 0;
668 }
669
670 #endif