src/gallium/drivers/svga/svga_context.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_CONTEXT_H
  27 #define SVGA_CONTEXT_H
  28
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_blitter.h"
  35 #include "util/list.h"
  36
  37 #include "tgsi/tgsi_scan.h"
  38
  39 #include "svga_screen.h"
  40 #include "svga_state.h"
  41 #include "svga_winsys.h"
  42 #include "svga_hw_reg.h"
  43 #include "svga3d_shaderdefs.h"
  44
  45
  46 /** Non-GPU queries for gallium HUD */
  47 /* per-frame counters */
  48 #define SVGA_QUERY_NUM_DRAW_CALLS          (PIPE_QUERY_DRIVER_SPECIFIC + 0)
  49 #define SVGA_QUERY_NUM_FALLBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 1)
  50 #define SVGA_QUERY_NUM_FLUSHES             (PIPE_QUERY_DRIVER_SPECIFIC + 2)
  51 #define SVGA_QUERY_NUM_VALIDATIONS         (PIPE_QUERY_DRIVER_SPECIFIC + 3)
  52 #define SVGA_QUERY_MAP_BUFFER_TIME         (PIPE_QUERY_DRIVER_SPECIFIC + 4)
  53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED    (PIPE_QUERY_DRIVER_SPECIFIC + 5)
  54 #define SVGA_QUERY_NUM_BYTES_UPLOADED      (PIPE_QUERY_DRIVER_SPECIFIC + 6)
  55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE     (PIPE_QUERY_DRIVER_SPECIFIC + 7)
  56 #define SVGA_QUERY_FLUSH_TIME              (PIPE_QUERY_DRIVER_SPECIFIC + 8)
  57
  58 /* running total counters */
  59 #define SVGA_QUERY_MEMORY_USED             (PIPE_QUERY_DRIVER_SPECIFIC + 9)
  60 #define SVGA_QUERY_NUM_SHADERS             (PIPE_QUERY_DRIVER_SPECIFIC + 10)
  61 #define SVGA_QUERY_NUM_RESOURCES           (PIPE_QUERY_DRIVER_SPECIFIC + 11)
  62 #define SVGA_QUERY_NUM_STATE_OBJECTS       (PIPE_QUERY_DRIVER_SPECIFIC + 12)
  63 #define SVGA_QUERY_NUM_SURFACE_VIEWS       (PIPE_QUERY_DRIVER_SPECIFIC + 13)
  64 #define SVGA_QUERY_NUM_GENERATE_MIPMAP     (PIPE_QUERY_DRIVER_SPECIFIC + 14)
  65 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
  66 #define SVGA_QUERY_MAX                     (PIPE_QUERY_DRIVER_SPECIFIC + 15)
  67
  68 /**
  69  * Maximum supported number of constant buffers per shader
  70  */
  71 #define SVGA_MAX_CONST_BUFS 14
  72
  73 /**
  74  * Maximum constant buffer size that can be set in the
  75  * DXSetSingleConstantBuffer command is
  76  * DX10 constant buffer element count * 4 4-bytes components
  77  */
  78 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
  79
  80 #define CONST0_UPLOAD_ALIGNMENT 256
  81
  82 struct draw_vertex_shader;
  83 struct draw_fragment_shader;
  84 struct svga_shader_variant;
  85 struct SVGACmdMemory;
  86 struct util_bitmask;
  87
  88
  89 struct svga_cache_context;
  90 struct svga_tracked_state;
  91
  92 struct svga_blend_state {
  93    unsigned need_white_fragments:1;
  94    unsigned independent_blend_enable:1;
  95    unsigned alpha_to_coverage:1;
  96    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
  97
  98    /** Per-render target state */
  99    struct {
 100       uint8_t writemask;
 101
 102       boolean blend_enable;
 103       uint8_t srcblend;
 104       uint8_t dstblend;
 105       uint8_t blendeq;
 106
 107       boolean separate_alpha_blend_enable;
 108       uint8_t srcblend_alpha;
 109       uint8_t dstblend_alpha;
 110       uint8_t blendeq_alpha;
 111    } rt[PIPE_MAX_COLOR_BUFS];
 112
 113    SVGA3dBlendStateId id;  /**< vgpu10 */
 114 };
 115
 116 struct svga_depth_stencil_state {
 117    unsigned zfunc:8;
 118    unsigned zenable:1;
 119    unsigned zwriteenable:1;
 120
 121    unsigned alphatestenable:1;
 122    unsigned alphafunc:8;
 123
 124    struct {
 125       unsigned enabled:1;
 126       unsigned func:8;
 127       unsigned fail:8;
 128       unsigned zfail:8;
 129       unsigned pass:8;
 130    } stencil[2];
 131
 132    /* SVGA3D has one ref/mask/writemask triple shared between front &
 133     * back face stencil.  We really need two:
 134     */
 135    unsigned stencil_mask:8;
 136    unsigned stencil_writemask:8;
 137
 138    float    alpharef;
 139
 140    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
 141 };
 142
 143 #define SVGA_UNFILLED_DISABLE 0
 144 #define SVGA_UNFILLED_LINE    1
 145 #define SVGA_UNFILLED_POINT   2
 146
 147 #define SVGA_PIPELINE_FLAG_POINTS   (1<<PIPE_PRIM_POINTS)
 148 #define SVGA_PIPELINE_FLAG_LINES    (1<<PIPE_PRIM_LINES)
 149 #define SVGA_PIPELINE_FLAG_TRIS     (1<<PIPE_PRIM_TRIANGLES)
 150
 151 struct svga_rasterizer_state {
 152    struct pipe_rasterizer_state templ; /* needed for draw module */
 153
 154    unsigned shademode:8;
 155    unsigned cullmode:8;
 156    unsigned scissortestenable:1;
 157    unsigned multisampleantialias:1;
 158    unsigned antialiasedlineenable:1;
 159    unsigned lastpixel:1;
 160    unsigned pointsprite:1;
 161
 162    unsigned linepattern;
 163
 164    float slopescaledepthbias;
 165    float depthbias;
 166    float pointsize;
 167    float linewidth;
 168
 169    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
 170
 171    /** Which prims do we need help for?  Bitmask of (1 << PIPE_PRIM_x) flags */
 172    unsigned need_pipeline:16;
 173
 174    SVGA3dRasterizerStateId id;    /**< vgpu10 */
 175
 176    /** For debugging: */
 177    const char* need_pipeline_tris_str;
 178    const char* need_pipeline_lines_str;
 179    const char* need_pipeline_points_str;
 180 };
 181
 182 struct svga_sampler_state {
 183    unsigned mipfilter;
 184    unsigned magfilter;
 185    unsigned minfilter;
 186    unsigned aniso_level;
 187    float lod_bias;
 188    unsigned addressu;
 189    unsigned addressv;
 190    unsigned addressw;
 191    unsigned bordercolor;
 192    unsigned normalized_coords:1;
 193    unsigned compare_mode:1;
 194    unsigned compare_func:3;
 195
 196    unsigned min_lod;
 197    unsigned view_min_lod;
 198    unsigned view_max_lod;
 199
 200    SVGA3dSamplerId id;
 201 };
 202
 203
 204 struct svga_pipe_sampler_view
 205 {
 206    struct pipe_sampler_view base;
 207
 208    SVGA3dShaderResourceViewId id;
 209 };
 210
 211
 212 static inline struct svga_pipe_sampler_view *
 213 svga_pipe_sampler_view(struct pipe_sampler_view *v)
 214 {
 215    return (struct svga_pipe_sampler_view *) v;
 216 }
 217
 218
 219 struct svga_velems_state {
 220    unsigned count;
 221    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 222    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
 223
 224    /** Bitmasks indicating which attributes need format conversion */
 225    unsigned adjust_attrib_range;     /**< range adjustment */
 226    unsigned attrib_is_pure_int;      /**< pure int */
 227    unsigned adjust_attrib_w_1;       /**< set w = 1 */
 228    unsigned adjust_attrib_itof;      /**< int->float */
 229    unsigned adjust_attrib_utof;      /**< uint->float */
 230    unsigned attrib_is_bgra;          /**< R / B swizzling */
 231    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
 232    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
 233    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
 234
 235    boolean need_swvfetch;
 236
 237    SVGA3dElementLayoutId id; /**< VGPU10 */
 238 };
 239
 240 /* Use to calculate differences between state emitted to hardware and
 241  * current driver-calculated state.
 242  */
 243 struct svga_state
 244 {
 245    const struct svga_blend_state *blend;
 246    const struct svga_depth_stencil_state *depth;
 247    const struct svga_rasterizer_state *rast;
 248    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 249    const struct svga_velems_state *velems;
 250
 251    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
 252    struct svga_fragment_shader *fs;
 253    struct svga_vertex_shader *vs;
 254    struct svga_geometry_shader *user_gs; /* user-specified GS */
 255    struct svga_geometry_shader *gs;      /* derived GS */
 256
 257    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 258    struct pipe_index_buffer ib;
 259    /** Constant buffers for each shader.
 260     * The size should probably always match with that of
 261     * svga_shader_emitter_v10.num_shader_consts.
 262     */
 263    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
 264
 265    struct pipe_framebuffer_state framebuffer;
 266    float depthscale;
 267
 268    /* Hack to limit the number of different render targets between
 269     * flushes.  Helps avoid blowing out our surface cache in EXA.
 270     */
 271    int nr_fbs;
 272
 273    struct pipe_poly_stipple poly_stipple;
 274    struct pipe_scissor_state scissor;
 275    struct pipe_blend_color blend_color;
 276    struct pipe_stencil_ref stencil_ref;
 277    struct pipe_clip_state clip;
 278    struct pipe_viewport_state viewport;
 279
 280    unsigned num_samplers[PIPE_SHADER_TYPES];
 281    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 282    unsigned num_vertex_buffers;
 283    unsigned reduced_prim;
 284
 285    struct {
 286       unsigned flag_1d;
 287       unsigned flag_srgb;
 288    } tex_flags;
 289
 290    unsigned sample_mask;
 291 };
 292
 293 struct svga_prescale {
 294    float translate[4];
 295    float scale[4];
 296    boolean enabled;
 297 };
 298
 299
 300 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
 301  */
 302 struct svga_hw_clear_state
 303 {
 304    SVGA3dRect viewport;
 305
 306    struct {
 307       float zmin, zmax;
 308    } depthrange;
 309
 310    struct pipe_framebuffer_state framebuffer;
 311    struct svga_prescale prescale;
 312 };
 313
 314 struct svga_hw_view_state
 315 {
 316    struct pipe_resource *texture;
 317    struct svga_sampler_view *v;
 318    unsigned min_lod;
 319    unsigned max_lod;
 320    boolean dirty;
 321 };
 322
 323 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
 324  */
 325 struct svga_hw_draw_state
 326 {
 327    unsigned rs[SVGA3D_RS_MAX];
 328    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
 329    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
 330
 331    struct svga_shader_variant *fs;
 332    struct svga_shader_variant *vs;
 333    struct svga_shader_variant *gs;
 334    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
 335    unsigned num_views;
 336    struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
 337
 338    /* Bitmask of enabled constant bufffers */
 339    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
 340
 341    /* VGPU10 HW state (used to prevent emitting redundant state) */
 342    SVGA3dDepthStencilStateId depth_stencil_id;
 343    unsigned stencil_ref;
 344    SVGA3dBlendStateId blend_id;
 345    float blend_factor[4];
 346    unsigned blend_sample_mask;
 347    SVGA3dRasterizerStateId rasterizer_id;
 348    SVGA3dElementLayoutId layout_id;
 349    SVGA3dPrimitiveType topology;
 350
 351    /** Vertex buffer state */
 352    SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
 353    struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
 354    unsigned num_vbuffers;
 355
 356    struct svga_winsys_surface *ib;  /**< index buffer for drawing */
 357    SVGA3dSurfaceFormat ib_format;
 358    unsigned ib_offset;
 359
 360    unsigned num_samplers[PIPE_SHADER_TYPES];
 361    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 362
 363    /* used for rebinding */
 364    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 365    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
 366 };
 367
 368
 369 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
 370  */
 371 struct svga_sw_state
 372 {
 373    /* which parts we need */
 374    boolean need_swvfetch;
 375    boolean need_pipeline;
 376    boolean need_swtnl;
 377
 378    /* Flag to make sure that need sw is on while
 379     * updating state within a swtnl call.
 380     */
 381    boolean in_swtnl_draw;
 382 };
 383
 384
 385 /* Queue some state updates (like rss) and submit them to hardware in
 386  * a single packet.
 387  */
 388 struct svga_hw_queue;
 389
 390 struct svga_query;
 391 struct svga_qmem_alloc_entry;
 392
 393 struct svga_context
 394 {
 395    struct pipe_context pipe;
 396    struct svga_winsys_context *swc;
 397    struct blitter_context *blitter;
 398    struct u_upload_mgr *const0_upload;
 399
 400    struct {
 401       boolean no_swtnl;
 402       boolean force_swtnl;
 403       boolean use_min_mipmap;
 404
 405       /* incremented for each shader */
 406       unsigned shader_id;
 407
 408       unsigned disable_shader;
 409
 410       boolean no_line_width;
 411       boolean force_hw_line_stipple;
 412
 413       /** To report perf/conformance/etc issues to the state tracker */
 414       struct pipe_debug_callback callback;
 415    } debug;
 416
 417    struct {
 418       struct draw_context *draw;
 419       struct vbuf_render *backend;
 420       unsigned hw_prim;
 421       boolean new_vbuf;
 422       boolean new_vdecl;
 423    } swtnl;
 424
 425    /* Bitmask of blend state objects IDs */
 426    struct util_bitmask *blend_object_id_bm;
 427
 428    /* Bitmask of depth/stencil state objects IDs */
 429    struct util_bitmask *ds_object_id_bm;
 430
 431    /* Bitmaks of input element object IDs */
 432    struct util_bitmask *input_element_object_id_bm;
 433
 434    /* Bitmask of rasterizer object IDs */
 435    struct util_bitmask *rast_object_id_bm;
 436
 437    /* Bitmask of sampler state objects IDs */
 438    struct util_bitmask *sampler_object_id_bm;
 439
 440    /* Bitmask of sampler view IDs */
 441    struct util_bitmask *sampler_view_id_bm;
 442
 443    /* Bitmask of used shader IDs */
 444    struct util_bitmask *shader_id_bm;
 445
 446    /* Bitmask of used surface view IDs */
 447    struct util_bitmask *surface_view_id_bm;
 448
 449    /* Bitmask of used stream output IDs */
 450    struct util_bitmask *stream_output_id_bm;
 451
 452    /* Bitmask of used query IDs */
 453    struct util_bitmask *query_id_bm;
 454
 455    struct {
 456       unsigned dirty[SVGA_STATE_MAX];
 457
 458       /** bitmasks of which const buffers are changed */
 459       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
 460
 461       unsigned texture_timestamp;
 462
 463       /*
 464        */
 465       struct svga_sw_state          sw;
 466       struct svga_hw_draw_state     hw_draw;
 467       struct svga_hw_clear_state    hw_clear;
 468    } state;
 469
 470    struct svga_state curr;      /* state from the state tracker */
 471    unsigned dirty;              /* statechanges since last update_state() */
 472
 473    union {
 474       struct {
 475          unsigned rendertargets:1;
 476          unsigned texture_samplers:1;
 477          unsigned constbufs:1;
 478          unsigned vs:1;
 479          unsigned fs:1;
 480          unsigned gs:1;
 481          unsigned query:1;
 482       } flags;
 483       unsigned val;
 484    } rebind;
 485
 486    struct svga_hwtnl *hwtnl;
 487
 488    /** Queries states */
 489    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
 490    unsigned gb_query_len;                     /**< gb query object size */
 491    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
 492    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
 493                                               /**< query mem block mapping */
 494    struct svga_query *sq[SVGA_QUERY_MAX];     /**< queries currently in progress */
 495
 496    /** List of buffers with queued transfers */
 497    struct list_head dirty_buffers;
 498
 499    /** performance / info queries for HUD */
 500    struct {
 501       uint64_t num_draw_calls;       /**< SVGA_QUERY_DRAW_CALLS */
 502       uint64_t num_fallbacks;        /**< SVGA_QUERY_NUM_FALLBACKS */
 503       uint64_t num_flushes;          /**< SVGA_QUERY_NUM_FLUSHES */
 504       uint64_t num_validations;      /**< SVGA_QUERY_NUM_VALIDATIONS */
 505       uint64_t map_buffer_time;      /**< SVGA_QUERY_MAP_BUFFER_TIME */
 506       uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
 507       uint64_t command_buffer_size;  /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
 508       uint64_t flush_time;           /**< SVGA_QUERY_FLUSH_TIME */
 509       uint64_t num_shaders;          /**< SVGA_QUERY_NUM_SHADERS */
 510       uint64_t num_state_objects;    /**< SVGA_QUERY_NUM_STATE_OBJECTS */
 511       uint64_t num_surface_views;    /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
 512       uint64_t num_bytes_uploaded;   /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
 513       uint64_t num_generate_mipmap;  /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
 514    } hud;
 515
 516    /** The currently bound stream output targets */
 517    unsigned num_so_targets;
 518    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
 519    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
 520    struct svga_stream_output *current_so;
 521
 522    /** A blend state with blending disabled, for falling back to when blending
 523     * is illegal (e.g. an integer texture is bound)
 524     */
 525    struct svga_blend_state *noop_blend;
 526
 527    struct {
 528       struct pipe_resource *texture;
 529       struct svga_pipe_sampler_view *sampler_view;
 530       void *sampler;
 531    } polygon_stipple;
 532
 533    /** Alternate rasterizer states created for point sprite */
 534    struct svga_rasterizer_state *rasterizer_no_cull[2];
 535 };
 536
 537 /* A flag for each state_tracker state object:
 538  */
 539 #define SVGA_NEW_BLEND               0x1
 540 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
 541 #define SVGA_NEW_RAST                0x4
 542 #define SVGA_NEW_SAMPLER             0x8
 543 #define SVGA_NEW_TEXTURE             0x10
 544 #define SVGA_NEW_VBUFFER             0x20
 545 #define SVGA_NEW_VELEMENT            0x40
 546 #define SVGA_NEW_FS                  0x80
 547 #define SVGA_NEW_VS                  0x100
 548 #define SVGA_NEW_FS_CONST_BUFFER     0x200
 549 #define SVGA_NEW_VS_CONST_BUFFER     0x400
 550 #define SVGA_NEW_FRAME_BUFFER        0x800
 551 #define SVGA_NEW_STIPPLE             0x1000
 552 #define SVGA_NEW_SCISSOR             0x2000
 553 #define SVGA_NEW_BLEND_COLOR         0x4000
 554 #define SVGA_NEW_CLIP                0x8000
 555 #define SVGA_NEW_VIEWPORT            0x10000
 556 #define SVGA_NEW_PRESCALE            0x20000
 557 #define SVGA_NEW_REDUCED_PRIMITIVE   0x40000
 558 #define SVGA_NEW_TEXTURE_BINDING     0x80000
 559 #define SVGA_NEW_NEED_PIPELINE       0x100000
 560 #define SVGA_NEW_NEED_SWVFETCH       0x200000
 561 #define SVGA_NEW_NEED_SWTNL          0x400000
 562 #define SVGA_NEW_FS_VARIANT          0x800000
 563 #define SVGA_NEW_VS_VARIANT          0x1000000
 564 #define SVGA_NEW_TEXTURE_FLAGS       0x4000000
 565 #define SVGA_NEW_STENCIL_REF         0x8000000
 566 #define SVGA_NEW_GS                  0x10000000
 567 #define SVGA_NEW_GS_CONST_BUFFER     0x20000000
 568 #define SVGA_NEW_GS_VARIANT          0x40000000
 569
 570
 571
 572
 573 /***********************************************************************
 574  * svga_clear.c:
 575  */
 576 void svga_clear(struct pipe_context *pipe,
 577                 unsigned buffers,
 578                 const union pipe_color_union *color,
 579                 double depth,
 580                 unsigned stencil);
 581
 582
 583 /***********************************************************************
 584  * svga_screen_texture.c:
 585  */
 586 void svga_mark_surfaces_dirty(struct svga_context *svga);
 587
 588
 589
 590
 591 void svga_init_state_functions( struct svga_context *svga );
 592 void svga_init_flush_functions( struct svga_context *svga );
 593 void svga_init_string_functions( struct svga_context *svga );
 594 void svga_init_blit_functions(struct svga_context *svga);
 595
 596 void svga_init_blend_functions( struct svga_context *svga );
 597 void svga_init_depth_stencil_functions( struct svga_context *svga );
 598 void svga_init_misc_functions( struct svga_context *svga );
 599 void svga_init_rasterizer_functions( struct svga_context *svga );
 600 void svga_init_sampler_functions( struct svga_context *svga );
 601 void svga_init_fs_functions( struct svga_context *svga );
 602 void svga_init_vs_functions( struct svga_context *svga );
 603 void svga_init_gs_functions( struct svga_context *svga );
 604 void svga_init_vertex_functions( struct svga_context *svga );
 605 void svga_init_constbuffer_functions( struct svga_context *svga );
 606 void svga_init_draw_functions( struct svga_context *svga );
 607 void svga_init_query_functions( struct svga_context *svga );
 608 void svga_init_surface_functions(struct svga_context *svga);
 609 void svga_init_stream_output_functions( struct svga_context *svga );
 610
 611 void svga_cleanup_vertex_state( struct svga_context *svga );
 612 void svga_cleanup_tss_binding( struct svga_context *svga );
 613 void svga_cleanup_framebuffer( struct svga_context *svga );
 614
 615 void svga_context_flush( struct svga_context *svga,
 616                          struct pipe_fence_handle **pfence );
 617
 618 void svga_context_finish(struct svga_context *svga);
 619
 620 void svga_hwtnl_flush_retry( struct svga_context *svga );
 621 void svga_hwtnl_flush_buffer( struct svga_context *svga,
 622                               struct pipe_resource *buffer );
 623
 624 void svga_surfaces_flush(struct svga_context *svga);
 625
 626 struct pipe_context *
 627 svga_context_create(struct pipe_screen *screen,
 628                     void *priv, unsigned flags);
 629
 630
 631 /***********************************************************************
 632  * Inline conversion functions.  These are better-typed than the
 633  * macros used previously:
 634  */
 635 static inline struct svga_context *
 636 svga_context( struct pipe_context *pipe )
 637 {
 638    return (struct svga_context *)pipe;
 639 }
 640
 641
 642 static inline boolean
 643 svga_have_gb_objects(const struct svga_context *svga)
 644 {
 645    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
 646 }
 647
 648 static inline boolean
 649 svga_have_gb_dma(const struct svga_context *svga)
 650 {
 651    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
 652 }
 653
 654 static inline boolean
 655 svga_have_vgpu10(const struct svga_context *svga)
 656 {
 657    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
 658 }
 659
 660 static inline boolean
 661 svga_need_to_rebind_resources(const struct svga_context *svga)
 662 {
 663    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
 664 }
 665
 666 static inline boolean
 667 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
 668 {
 669    return memcmp(r1, r2, sizeof(*r1)) == 0;
 670 }
 671
 672 #endif