src/gallium/drivers/svga/svga_context.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_CONTEXT_H
  27 #define SVGA_CONTEXT_H
  28
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_blitter.h"
  35 #include "util/list.h"
  36
  37 #include "tgsi/tgsi_scan.h"
  38
  39 #include "svga_screen.h"
  40 #include "svga_state.h"
  41 #include "svga_winsys.h"
  42 #include "svga_hw_reg.h"
  43 #include "svga3d_shaderdefs.h"
  44
  45
  46 /** Non-GPU queries for gallium HUD */
  47 /* per-frame counters */
  48 #define SVGA_QUERY_NUM_DRAW_CALLS          (PIPE_QUERY_DRIVER_SPECIFIC + 0)
  49 #define SVGA_QUERY_NUM_FALLBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 1)
  50 #define SVGA_QUERY_NUM_FLUSHES             (PIPE_QUERY_DRIVER_SPECIFIC + 2)
  51 #define SVGA_QUERY_NUM_VALIDATIONS         (PIPE_QUERY_DRIVER_SPECIFIC + 3)
  52 #define SVGA_QUERY_MAP_BUFFER_TIME         (PIPE_QUERY_DRIVER_SPECIFIC + 4)
  53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED    (PIPE_QUERY_DRIVER_SPECIFIC + 5)
  54 #define SVGA_QUERY_NUM_BYTES_UPLOADED      (PIPE_QUERY_DRIVER_SPECIFIC + 6)
  55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE     (PIPE_QUERY_DRIVER_SPECIFIC + 7)
  56 #define SVGA_QUERY_FLUSH_TIME              (PIPE_QUERY_DRIVER_SPECIFIC + 8)
  57 #define SVGA_QUERY_SURFACE_WRITE_FLUSHES   (PIPE_QUERY_DRIVER_SPECIFIC + 9)
  58
  59 /* running total counters */
  60 #define SVGA_QUERY_MEMORY_USED             (PIPE_QUERY_DRIVER_SPECIFIC + 10)
  61 #define SVGA_QUERY_NUM_SHADERS             (PIPE_QUERY_DRIVER_SPECIFIC + 11)
  62 #define SVGA_QUERY_NUM_RESOURCES           (PIPE_QUERY_DRIVER_SPECIFIC + 12)
  63 #define SVGA_QUERY_NUM_STATE_OBJECTS       (PIPE_QUERY_DRIVER_SPECIFIC + 13)
  64 #define SVGA_QUERY_NUM_SURFACE_VIEWS       (PIPE_QUERY_DRIVER_SPECIFIC + 14)
  65 #define SVGA_QUERY_NUM_GENERATE_MIPMAP     (PIPE_QUERY_DRIVER_SPECIFIC + 15)
  66 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
  67 #define SVGA_QUERY_MAX                     (PIPE_QUERY_DRIVER_SPECIFIC + 16)
  68
  69 /**
  70  * Maximum supported number of constant buffers per shader
  71  */
  72 #define SVGA_MAX_CONST_BUFS 14
  73
  74 /**
  75  * Maximum constant buffer size that can be set in the
  76  * DXSetSingleConstantBuffer command is
  77  * DX10 constant buffer element count * 4 4-bytes components
  78  */
  79 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
  80
  81 #define CONST0_UPLOAD_ALIGNMENT 256
  82
  83 struct draw_vertex_shader;
  84 struct draw_fragment_shader;
  85 struct svga_shader_variant;
  86 struct SVGACmdMemory;
  87 struct util_bitmask;
  88
  89
  90 struct svga_cache_context;
  91 struct svga_tracked_state;
  92
  93 struct svga_blend_state {
  94    unsigned need_white_fragments:1;
  95    unsigned independent_blend_enable:1;
  96    unsigned alpha_to_coverage:1;
  97    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
  98
  99    /** Per-render target state */
 100    struct {
 101       uint8_t writemask;
 102
 103       boolean blend_enable;
 104       uint8_t srcblend;
 105       uint8_t dstblend;
 106       uint8_t blendeq;
 107
 108       boolean separate_alpha_blend_enable;
 109       uint8_t srcblend_alpha;
 110       uint8_t dstblend_alpha;
 111       uint8_t blendeq_alpha;
 112    } rt[PIPE_MAX_COLOR_BUFS];
 113
 114    SVGA3dBlendStateId id;  /**< vgpu10 */
 115 };
 116
 117 struct svga_depth_stencil_state {
 118    unsigned zfunc:8;
 119    unsigned zenable:1;
 120    unsigned zwriteenable:1;
 121
 122    unsigned alphatestenable:1;
 123    unsigned alphafunc:8;
 124
 125    struct {
 126       unsigned enabled:1;
 127       unsigned func:8;
 128       unsigned fail:8;
 129       unsigned zfail:8;
 130       unsigned pass:8;
 131    } stencil[2];
 132
 133    /* SVGA3D has one ref/mask/writemask triple shared between front &
 134     * back face stencil.  We really need two:
 135     */
 136    unsigned stencil_mask:8;
 137    unsigned stencil_writemask:8;
 138
 139    float    alpharef;
 140
 141    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
 142 };
 143
 144 #define SVGA_UNFILLED_DISABLE 0
 145 #define SVGA_UNFILLED_LINE    1
 146 #define SVGA_UNFILLED_POINT   2
 147
 148 #define SVGA_PIPELINE_FLAG_POINTS   (1<<PIPE_PRIM_POINTS)
 149 #define SVGA_PIPELINE_FLAG_LINES    (1<<PIPE_PRIM_LINES)
 150 #define SVGA_PIPELINE_FLAG_TRIS     (1<<PIPE_PRIM_TRIANGLES)
 151
 152 struct svga_rasterizer_state {
 153    struct pipe_rasterizer_state templ; /* needed for draw module */
 154
 155    unsigned shademode:8;
 156    unsigned cullmode:8;
 157    unsigned scissortestenable:1;
 158    unsigned multisampleantialias:1;
 159    unsigned antialiasedlineenable:1;
 160    unsigned lastpixel:1;
 161    unsigned pointsprite:1;
 162
 163    unsigned linepattern;
 164
 165    float slopescaledepthbias;
 166    float depthbias;
 167    float pointsize;
 168    float linewidth;
 169
 170    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
 171
 172    /** Which prims do we need help for?  Bitmask of (1 << PIPE_PRIM_x) flags */
 173    unsigned need_pipeline:16;
 174
 175    SVGA3dRasterizerStateId id;    /**< vgpu10 */
 176
 177    /** For debugging: */
 178    const char* need_pipeline_tris_str;
 179    const char* need_pipeline_lines_str;
 180    const char* need_pipeline_points_str;
 181 };
 182
 183 struct svga_sampler_state {
 184    unsigned mipfilter;
 185    unsigned magfilter;
 186    unsigned minfilter;
 187    unsigned aniso_level;
 188    float lod_bias;
 189    unsigned addressu;
 190    unsigned addressv;
 191    unsigned addressw;
 192    unsigned bordercolor;
 193    unsigned normalized_coords:1;
 194    unsigned compare_mode:1;
 195    unsigned compare_func:3;
 196
 197    unsigned min_lod;
 198    unsigned view_min_lod;
 199    unsigned view_max_lod;
 200
 201    SVGA3dSamplerId id;
 202 };
 203
 204
 205 struct svga_pipe_sampler_view
 206 {
 207    struct pipe_sampler_view base;
 208
 209    SVGA3dShaderResourceViewId id;
 210 };
 211
 212
 213 static inline struct svga_pipe_sampler_view *
 214 svga_pipe_sampler_view(struct pipe_sampler_view *v)
 215 {
 216    return (struct svga_pipe_sampler_view *) v;
 217 }
 218
 219
 220 struct svga_velems_state {
 221    unsigned count;
 222    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 223    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
 224
 225    /** Bitmasks indicating which attributes need format conversion */
 226    unsigned adjust_attrib_range;     /**< range adjustment */
 227    unsigned attrib_is_pure_int;      /**< pure int */
 228    unsigned adjust_attrib_w_1;       /**< set w = 1 */
 229    unsigned adjust_attrib_itof;      /**< int->float */
 230    unsigned adjust_attrib_utof;      /**< uint->float */
 231    unsigned attrib_is_bgra;          /**< R / B swizzling */
 232    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
 233    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
 234    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
 235
 236    boolean need_swvfetch;
 237
 238    SVGA3dElementLayoutId id; /**< VGPU10 */
 239 };
 240
 241 /* Use to calculate differences between state emitted to hardware and
 242  * current driver-calculated state.
 243  */
 244 struct svga_state
 245 {
 246    const struct svga_blend_state *blend;
 247    const struct svga_depth_stencil_state *depth;
 248    const struct svga_rasterizer_state *rast;
 249    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 250    const struct svga_velems_state *velems;
 251
 252    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
 253    struct svga_fragment_shader *fs;
 254    struct svga_vertex_shader *vs;
 255    struct svga_geometry_shader *user_gs; /* user-specified GS */
 256    struct svga_geometry_shader *gs;      /* derived GS */
 257
 258    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 259    struct pipe_index_buffer ib;
 260    /** Constant buffers for each shader.
 261     * The size should probably always match with that of
 262     * svga_shader_emitter_v10.num_shader_consts.
 263     */
 264    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
 265
 266    struct pipe_framebuffer_state framebuffer;
 267    float depthscale;
 268
 269    /* Hack to limit the number of different render targets between
 270     * flushes.  Helps avoid blowing out our surface cache in EXA.
 271     */
 272    int nr_fbs;
 273
 274    struct pipe_poly_stipple poly_stipple;
 275    struct pipe_scissor_state scissor;
 276    struct pipe_blend_color blend_color;
 277    struct pipe_stencil_ref stencil_ref;
 278    struct pipe_clip_state clip;
 279    struct pipe_viewport_state viewport;
 280
 281    unsigned num_samplers[PIPE_SHADER_TYPES];
 282    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 283    unsigned num_vertex_buffers;
 284    unsigned reduced_prim;
 285
 286    struct {
 287       unsigned flag_1d;
 288       unsigned flag_srgb;
 289    } tex_flags;
 290
 291    unsigned sample_mask;
 292 };
 293
 294 struct svga_prescale {
 295    float translate[4];
 296    float scale[4];
 297    boolean enabled;
 298 };
 299
 300
 301 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
 302  */
 303 struct svga_hw_clear_state
 304 {
 305    SVGA3dRect viewport;
 306
 307    struct {
 308       float zmin, zmax;
 309    } depthrange;
 310
 311    struct pipe_framebuffer_state framebuffer;
 312    struct svga_prescale prescale;
 313 };
 314
 315 struct svga_hw_view_state
 316 {
 317    struct pipe_resource *texture;
 318    struct svga_sampler_view *v;
 319    unsigned min_lod;
 320    unsigned max_lod;
 321    boolean dirty;
 322 };
 323
 324 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
 325  */
 326 struct svga_hw_draw_state
 327 {
 328    unsigned rs[SVGA3D_RS_MAX];
 329    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
 330    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
 331
 332    struct svga_shader_variant *fs;
 333    struct svga_shader_variant *vs;
 334    struct svga_shader_variant *gs;
 335    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
 336    unsigned num_views;
 337    struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
 338
 339    /* Bitmask of enabled constant bufffers */
 340    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
 341
 342    /* VGPU10 HW state (used to prevent emitting redundant state) */
 343    SVGA3dDepthStencilStateId depth_stencil_id;
 344    unsigned stencil_ref;
 345    SVGA3dBlendStateId blend_id;
 346    float blend_factor[4];
 347    unsigned blend_sample_mask;
 348    SVGA3dRasterizerStateId rasterizer_id;
 349    SVGA3dElementLayoutId layout_id;
 350    SVGA3dPrimitiveType topology;
 351
 352    /** Vertex buffer state */
 353    SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
 354    struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
 355    unsigned num_vbuffers;
 356
 357    struct svga_winsys_surface *ib;  /**< index buffer for drawing */
 358    SVGA3dSurfaceFormat ib_format;
 359    unsigned ib_offset;
 360
 361    unsigned num_samplers[PIPE_SHADER_TYPES];
 362    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 363
 364    /* used for rebinding */
 365    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 366    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
 367 };
 368
 369
 370 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
 371  */
 372 struct svga_sw_state
 373 {
 374    /* which parts we need */
 375    boolean need_swvfetch;
 376    boolean need_pipeline;
 377    boolean need_swtnl;
 378
 379    /* Flag to make sure that need sw is on while
 380     * updating state within a swtnl call.
 381     */
 382    boolean in_swtnl_draw;
 383 };
 384
 385
 386 /* Queue some state updates (like rss) and submit them to hardware in
 387  * a single packet.
 388  */
 389 struct svga_hw_queue;
 390
 391 struct svga_query;
 392 struct svga_qmem_alloc_entry;
 393
 394 struct svga_context
 395 {
 396    struct pipe_context pipe;
 397    struct svga_winsys_context *swc;
 398    struct blitter_context *blitter;
 399    struct u_upload_mgr *const0_upload;
 400
 401    struct {
 402       boolean no_swtnl;
 403       boolean force_swtnl;
 404       boolean use_min_mipmap;
 405
 406       /* incremented for each shader */
 407       unsigned shader_id;
 408
 409       unsigned disable_shader;
 410
 411       boolean no_line_width;
 412       boolean force_hw_line_stipple;
 413
 414       /** To report perf/conformance/etc issues to the state tracker */
 415       struct pipe_debug_callback callback;
 416    } debug;
 417
 418    struct {
 419       struct draw_context *draw;
 420       struct vbuf_render *backend;
 421       unsigned hw_prim;
 422       boolean new_vbuf;
 423       boolean new_vdecl;
 424    } swtnl;
 425
 426    /* Bitmask of blend state objects IDs */
 427    struct util_bitmask *blend_object_id_bm;
 428
 429    /* Bitmask of depth/stencil state objects IDs */
 430    struct util_bitmask *ds_object_id_bm;
 431
 432    /* Bitmaks of input element object IDs */
 433    struct util_bitmask *input_element_object_id_bm;
 434
 435    /* Bitmask of rasterizer object IDs */
 436    struct util_bitmask *rast_object_id_bm;
 437
 438    /* Bitmask of sampler state objects IDs */
 439    struct util_bitmask *sampler_object_id_bm;
 440
 441    /* Bitmask of sampler view IDs */
 442    struct util_bitmask *sampler_view_id_bm;
 443
 444    /* Bitmask of used shader IDs */
 445    struct util_bitmask *shader_id_bm;
 446
 447    /* Bitmask of used surface view IDs */
 448    struct util_bitmask *surface_view_id_bm;
 449
 450    /* Bitmask of used stream output IDs */
 451    struct util_bitmask *stream_output_id_bm;
 452
 453    /* Bitmask of used query IDs */
 454    struct util_bitmask *query_id_bm;
 455
 456    struct {
 457       unsigned dirty[SVGA_STATE_MAX];
 458
 459       /** bitmasks of which const buffers are changed */
 460       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
 461
 462       unsigned texture_timestamp;
 463
 464       /*
 465        */
 466       struct svga_sw_state          sw;
 467       struct svga_hw_draw_state     hw_draw;
 468       struct svga_hw_clear_state    hw_clear;
 469    } state;
 470
 471    struct svga_state curr;      /* state from the state tracker */
 472    unsigned dirty;              /* statechanges since last update_state() */
 473
 474    union {
 475       struct {
 476          unsigned rendertargets:1;
 477          unsigned texture_samplers:1;
 478          unsigned constbufs:1;
 479          unsigned vs:1;
 480          unsigned fs:1;
 481          unsigned gs:1;
 482          unsigned query:1;
 483       } flags;
 484       unsigned val;
 485    } rebind;
 486
 487    struct svga_hwtnl *hwtnl;
 488
 489    /** Queries states */
 490    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
 491    unsigned gb_query_len;                     /**< gb query object size */
 492    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
 493    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
 494                                               /**< query mem block mapping */
 495    struct svga_query *sq[SVGA_QUERY_MAX];     /**< queries currently in progress */
 496
 497    /** List of buffers with queued transfers */
 498    struct list_head dirty_buffers;
 499
 500    /** performance / info queries for HUD */
 501    struct {
 502       uint64_t num_draw_calls;       /**< SVGA_QUERY_DRAW_CALLS */
 503       uint64_t num_fallbacks;        /**< SVGA_QUERY_NUM_FALLBACKS */
 504       uint64_t num_flushes;          /**< SVGA_QUERY_NUM_FLUSHES */
 505       uint64_t num_validations;      /**< SVGA_QUERY_NUM_VALIDATIONS */
 506       uint64_t map_buffer_time;      /**< SVGA_QUERY_MAP_BUFFER_TIME */
 507       uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
 508       uint64_t command_buffer_size;  /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
 509       uint64_t flush_time;           /**< SVGA_QUERY_FLUSH_TIME */
 510       uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
 511       uint64_t num_shaders;          /**< SVGA_QUERY_NUM_SHADERS */
 512       uint64_t num_state_objects;    /**< SVGA_QUERY_NUM_STATE_OBJECTS */
 513       uint64_t num_surface_views;    /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
 514       uint64_t num_bytes_uploaded;   /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
 515       uint64_t num_generate_mipmap;  /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
 516    } hud;
 517
 518    /** The currently bound stream output targets */
 519    unsigned num_so_targets;
 520    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
 521    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
 522    struct svga_stream_output *current_so;
 523
 524    /** A blend state with blending disabled, for falling back to when blending
 525     * is illegal (e.g. an integer texture is bound)
 526     */
 527    struct svga_blend_state *noop_blend;
 528
 529    struct {
 530       struct pipe_resource *texture;
 531       struct svga_pipe_sampler_view *sampler_view;
 532       void *sampler;
 533    } polygon_stipple;
 534
 535    /** Alternate rasterizer states created for point sprite */
 536    struct svga_rasterizer_state *rasterizer_no_cull[2];
 537 };
 538
 539 /* A flag for each state_tracker state object:
 540  */
 541 #define SVGA_NEW_BLEND               0x1
 542 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
 543 #define SVGA_NEW_RAST                0x4
 544 #define SVGA_NEW_SAMPLER             0x8
 545 #define SVGA_NEW_TEXTURE             0x10
 546 #define SVGA_NEW_VBUFFER             0x20
 547 #define SVGA_NEW_VELEMENT            0x40
 548 #define SVGA_NEW_FS                  0x80
 549 #define SVGA_NEW_VS                  0x100
 550 #define SVGA_NEW_FS_CONST_BUFFER     0x200
 551 #define SVGA_NEW_VS_CONST_BUFFER     0x400
 552 #define SVGA_NEW_FRAME_BUFFER        0x800
 553 #define SVGA_NEW_STIPPLE             0x1000
 554 #define SVGA_NEW_SCISSOR             0x2000
 555 #define SVGA_NEW_BLEND_COLOR         0x4000
 556 #define SVGA_NEW_CLIP                0x8000
 557 #define SVGA_NEW_VIEWPORT            0x10000
 558 #define SVGA_NEW_PRESCALE            0x20000
 559 #define SVGA_NEW_REDUCED_PRIMITIVE   0x40000
 560 #define SVGA_NEW_TEXTURE_BINDING     0x80000
 561 #define SVGA_NEW_NEED_PIPELINE       0x100000
 562 #define SVGA_NEW_NEED_SWVFETCH       0x200000
 563 #define SVGA_NEW_NEED_SWTNL          0x400000
 564 #define SVGA_NEW_FS_VARIANT          0x800000
 565 #define SVGA_NEW_VS_VARIANT          0x1000000
 566 #define SVGA_NEW_TEXTURE_FLAGS       0x4000000
 567 #define SVGA_NEW_STENCIL_REF         0x8000000
 568 #define SVGA_NEW_GS                  0x10000000
 569 #define SVGA_NEW_GS_CONST_BUFFER     0x20000000
 570 #define SVGA_NEW_GS_VARIANT          0x40000000
 571
 572
 573
 574
 575 /***********************************************************************
 576  * svga_clear.c:
 577  */
 578 void svga_clear(struct pipe_context *pipe,
 579                 unsigned buffers,
 580                 const union pipe_color_union *color,
 581                 double depth,
 582                 unsigned stencil);
 583
 584
 585 /***********************************************************************
 586  * svga_screen_texture.c:
 587  */
 588 void svga_mark_surfaces_dirty(struct svga_context *svga);
 589
 590
 591
 592
 593 void svga_init_state_functions( struct svga_context *svga );
 594 void svga_init_flush_functions( struct svga_context *svga );
 595 void svga_init_string_functions( struct svga_context *svga );
 596 void svga_init_blit_functions(struct svga_context *svga);
 597
 598 void svga_init_blend_functions( struct svga_context *svga );
 599 void svga_init_depth_stencil_functions( struct svga_context *svga );
 600 void svga_init_misc_functions( struct svga_context *svga );
 601 void svga_init_rasterizer_functions( struct svga_context *svga );
 602 void svga_init_sampler_functions( struct svga_context *svga );
 603 void svga_init_fs_functions( struct svga_context *svga );
 604 void svga_init_vs_functions( struct svga_context *svga );
 605 void svga_init_gs_functions( struct svga_context *svga );
 606 void svga_init_vertex_functions( struct svga_context *svga );
 607 void svga_init_constbuffer_functions( struct svga_context *svga );
 608 void svga_init_draw_functions( struct svga_context *svga );
 609 void svga_init_query_functions( struct svga_context *svga );
 610 void svga_init_surface_functions(struct svga_context *svga);
 611 void svga_init_stream_output_functions( struct svga_context *svga );
 612
 613 void svga_cleanup_vertex_state( struct svga_context *svga );
 614 void svga_cleanup_tss_binding( struct svga_context *svga );
 615 void svga_cleanup_framebuffer( struct svga_context *svga );
 616
 617 void svga_context_flush( struct svga_context *svga,
 618                          struct pipe_fence_handle **pfence );
 619
 620 void svga_context_finish(struct svga_context *svga);
 621
 622 void svga_hwtnl_flush_retry( struct svga_context *svga );
 623 void svga_hwtnl_flush_buffer( struct svga_context *svga,
 624                               struct pipe_resource *buffer );
 625
 626 void svga_surfaces_flush(struct svga_context *svga);
 627
 628 struct pipe_context *
 629 svga_context_create(struct pipe_screen *screen,
 630                     void *priv, unsigned flags);
 631
 632
 633 /***********************************************************************
 634  * Inline conversion functions.  These are better-typed than the
 635  * macros used previously:
 636  */
 637 static inline struct svga_context *
 638 svga_context( struct pipe_context *pipe )
 639 {
 640    return (struct svga_context *)pipe;
 641 }
 642
 643
 644 static inline boolean
 645 svga_have_gb_objects(const struct svga_context *svga)
 646 {
 647    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
 648 }
 649
 650 static inline boolean
 651 svga_have_gb_dma(const struct svga_context *svga)
 652 {
 653    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
 654 }
 655
 656 static inline boolean
 657 svga_have_vgpu10(const struct svga_context *svga)
 658 {
 659    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
 660 }
 661
 662 static inline boolean
 663 svga_need_to_rebind_resources(const struct svga_context *svga)
 664 {
 665    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
 666 }
 667
 668 static inline boolean
 669 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
 670 {
 671    return memcmp(r1, r2, sizeof(*r1)) == 0;
 672 }
 673
 674 #endif