Merge ../mesa into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_context.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_blitter.h"
35 #include "util/list.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "svga_screen.h"
40 #include "svga_state.h"
41 #include "svga_winsys.h"
42 #include "svga_hw_reg.h"
43 #include "svga3d_shaderdefs.h"
44
45
46 /** Non-GPU queries for gallium HUD */
47 /* per-frame counters */
48 #define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
49 #define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1)
50 #define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2)
51 #define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3)
52 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
54 #define SVGA_QUERY_NUM_BYTES_UPLOADED (PIPE_QUERY_DRIVER_SPECIFIC + 6)
55
56 /* running total counters */
57 #define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 7)
58 #define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 8)
59 #define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 9)
60 #define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 10)
61 #define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 11)
62 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
63 #define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 12)
64
65 /**
66 * Maximum supported number of constant buffers per shader
67 */
68 #define SVGA_MAX_CONST_BUFS 14
69
70 /**
71 * Maximum constant buffer size that can be set in the
72 * DXSetSingleConstantBuffer command is
73 * DX10 constant buffer element count * 4 4-bytes components
74 */
75 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
76
77 #define CONST0_UPLOAD_ALIGNMENT 256
78
79 struct draw_vertex_shader;
80 struct draw_fragment_shader;
81 struct svga_shader_variant;
82 struct SVGACmdMemory;
83 struct util_bitmask;
84
85
86 struct svga_cache_context;
87 struct svga_tracked_state;
88
89 struct svga_blend_state {
90 unsigned need_white_fragments:1;
91 unsigned independent_blend_enable:1;
92 unsigned alpha_to_coverage:1;
93 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
94
95 /** Per-render target state */
96 struct {
97 uint8_t writemask;
98
99 boolean blend_enable;
100 uint8_t srcblend;
101 uint8_t dstblend;
102 uint8_t blendeq;
103
104 boolean separate_alpha_blend_enable;
105 uint8_t srcblend_alpha;
106 uint8_t dstblend_alpha;
107 uint8_t blendeq_alpha;
108 } rt[PIPE_MAX_COLOR_BUFS];
109
110 SVGA3dBlendStateId id; /**< vgpu10 */
111 };
112
113 struct svga_depth_stencil_state {
114 unsigned zfunc:8;
115 unsigned zenable:1;
116 unsigned zwriteenable:1;
117
118 unsigned alphatestenable:1;
119 unsigned alphafunc:8;
120
121 struct {
122 unsigned enabled:1;
123 unsigned func:8;
124 unsigned fail:8;
125 unsigned zfail:8;
126 unsigned pass:8;
127 } stencil[2];
128
129 /* SVGA3D has one ref/mask/writemask triple shared between front &
130 * back face stencil. We really need two:
131 */
132 unsigned stencil_mask:8;
133 unsigned stencil_writemask:8;
134
135 float alpharef;
136
137 SVGA3dDepthStencilStateId id; /**< vgpu10 */
138 };
139
140 #define SVGA_UNFILLED_DISABLE 0
141 #define SVGA_UNFILLED_LINE 1
142 #define SVGA_UNFILLED_POINT 2
143
144 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
145 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
146 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
147
148 struct svga_rasterizer_state {
149 struct pipe_rasterizer_state templ; /* needed for draw module */
150
151 unsigned shademode:8;
152 unsigned cullmode:8;
153 unsigned scissortestenable:1;
154 unsigned multisampleantialias:1;
155 unsigned antialiasedlineenable:1;
156 unsigned lastpixel:1;
157 unsigned pointsprite:1;
158
159 unsigned linepattern;
160
161 float slopescaledepthbias;
162 float depthbias;
163 float pointsize;
164 float linewidth;
165
166 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
167
168 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
169 unsigned need_pipeline:16;
170
171 SVGA3dRasterizerStateId id; /**< vgpu10 */
172
173 /** For debugging: */
174 const char* need_pipeline_tris_str;
175 const char* need_pipeline_lines_str;
176 const char* need_pipeline_points_str;
177 };
178
179 struct svga_sampler_state {
180 unsigned mipfilter;
181 unsigned magfilter;
182 unsigned minfilter;
183 unsigned aniso_level;
184 float lod_bias;
185 unsigned addressu;
186 unsigned addressv;
187 unsigned addressw;
188 unsigned bordercolor;
189 unsigned normalized_coords:1;
190 unsigned compare_mode:1;
191 unsigned compare_func:3;
192
193 unsigned min_lod;
194 unsigned view_min_lod;
195 unsigned view_max_lod;
196
197 SVGA3dSamplerId id;
198 };
199
200
201 struct svga_pipe_sampler_view
202 {
203 struct pipe_sampler_view base;
204
205 SVGA3dShaderResourceViewId id;
206 };
207
208
209 static inline struct svga_pipe_sampler_view *
210 svga_pipe_sampler_view(struct pipe_sampler_view *v)
211 {
212 return (struct svga_pipe_sampler_view *) v;
213 }
214
215
216 struct svga_velems_state {
217 unsigned count;
218 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
219 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
220
221 /** Bitmasks indicating which attributes need format conversion */
222 unsigned adjust_attrib_range; /**< range adjustment */
223 unsigned attrib_is_pure_int; /**< pure int */
224 unsigned adjust_attrib_w_1; /**< set w = 1 */
225 unsigned adjust_attrib_itof; /**< int->float */
226 unsigned adjust_attrib_utof; /**< uint->float */
227 unsigned attrib_is_bgra; /**< R / B swizzling */
228 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
229 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
230 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
231
232 boolean need_swvfetch;
233
234 SVGA3dElementLayoutId id; /**< VGPU10 */
235 };
236
237 /* Use to calculate differences between state emitted to hardware and
238 * current driver-calculated state.
239 */
240 struct svga_state
241 {
242 const struct svga_blend_state *blend;
243 const struct svga_depth_stencil_state *depth;
244 const struct svga_rasterizer_state *rast;
245 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
246 const struct svga_velems_state *velems;
247
248 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
249 struct svga_fragment_shader *fs;
250 struct svga_vertex_shader *vs;
251 struct svga_geometry_shader *user_gs; /* user-specified GS */
252 struct svga_geometry_shader *gs; /* derived GS */
253
254 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
255 struct pipe_index_buffer ib;
256 /** Constant buffers for each shader.
257 * The size should probably always match with that of
258 * svga_shader_emitter_v10.num_shader_consts.
259 */
260 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
261
262 struct pipe_framebuffer_state framebuffer;
263 float depthscale;
264
265 /* Hack to limit the number of different render targets between
266 * flushes. Helps avoid blowing out our surface cache in EXA.
267 */
268 int nr_fbs;
269
270 struct pipe_poly_stipple poly_stipple;
271 struct pipe_scissor_state scissor;
272 struct pipe_blend_color blend_color;
273 struct pipe_stencil_ref stencil_ref;
274 struct pipe_clip_state clip;
275 struct pipe_viewport_state viewport;
276
277 unsigned num_samplers[PIPE_SHADER_TYPES];
278 unsigned num_sampler_views[PIPE_SHADER_TYPES];
279 unsigned num_vertex_buffers;
280 unsigned reduced_prim;
281
282 struct {
283 unsigned flag_1d;
284 unsigned flag_srgb;
285 } tex_flags;
286
287 unsigned sample_mask;
288 };
289
290 struct svga_prescale {
291 float translate[4];
292 float scale[4];
293 boolean enabled;
294 };
295
296
297 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
298 */
299 struct svga_hw_clear_state
300 {
301 SVGA3dRect viewport;
302
303 struct {
304 float zmin, zmax;
305 } depthrange;
306
307 struct pipe_framebuffer_state framebuffer;
308 struct svga_prescale prescale;
309 };
310
311 struct svga_hw_view_state
312 {
313 struct pipe_resource *texture;
314 struct svga_sampler_view *v;
315 unsigned min_lod;
316 unsigned max_lod;
317 boolean dirty;
318 };
319
320 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
321 */
322 struct svga_hw_draw_state
323 {
324 unsigned rs[SVGA3D_RS_MAX];
325 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
326 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
327
328 struct svga_shader_variant *fs;
329 struct svga_shader_variant *vs;
330 struct svga_shader_variant *gs;
331 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
332 unsigned num_views;
333 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
334
335 /* Bitmask of enabled constant bufffers */
336 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
337
338 /* VGPU10 HW state (used to prevent emitting redundant state) */
339 SVGA3dDepthStencilStateId depth_stencil_id;
340 unsigned stencil_ref;
341 SVGA3dBlendStateId blend_id;
342 float blend_factor[4];
343 unsigned blend_sample_mask;
344 SVGA3dRasterizerStateId rasterizer_id;
345 SVGA3dElementLayoutId layout_id;
346 SVGA3dPrimitiveType topology;
347
348 /** Vertex buffer state */
349 SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
350 struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
351 unsigned num_vbuffers;
352
353 struct svga_winsys_surface *ib; /**< index buffer for drawing */
354 SVGA3dSurfaceFormat ib_format;
355 unsigned ib_offset;
356
357 unsigned num_samplers[PIPE_SHADER_TYPES];
358 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
359
360 /* used for rebinding */
361 unsigned num_sampler_views[PIPE_SHADER_TYPES];
362 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
363 };
364
365
366 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
367 */
368 struct svga_sw_state
369 {
370 /* which parts we need */
371 boolean need_swvfetch;
372 boolean need_pipeline;
373 boolean need_swtnl;
374
375 /* Flag to make sure that need sw is on while
376 * updating state within a swtnl call.
377 */
378 boolean in_swtnl_draw;
379 };
380
381
382 /* Queue some state updates (like rss) and submit them to hardware in
383 * a single packet.
384 */
385 struct svga_hw_queue;
386
387 struct svga_query;
388 struct svga_qmem_alloc_entry;
389
390 struct svga_context
391 {
392 struct pipe_context pipe;
393 struct svga_winsys_context *swc;
394 struct blitter_context *blitter;
395 struct u_upload_mgr *const0_upload;
396
397 struct {
398 boolean no_swtnl;
399 boolean force_swtnl;
400 boolean use_min_mipmap;
401
402 /* incremented for each shader */
403 unsigned shader_id;
404
405 unsigned disable_shader;
406
407 boolean no_line_width;
408 boolean force_hw_line_stipple;
409
410 /** To report perf/conformance/etc issues to the state tracker */
411 struct pipe_debug_callback callback;
412 } debug;
413
414 struct {
415 struct draw_context *draw;
416 struct vbuf_render *backend;
417 unsigned hw_prim;
418 boolean new_vbuf;
419 boolean new_vdecl;
420 } swtnl;
421
422 /* Bitmask of blend state objects IDs */
423 struct util_bitmask *blend_object_id_bm;
424
425 /* Bitmask of depth/stencil state objects IDs */
426 struct util_bitmask *ds_object_id_bm;
427
428 /* Bitmaks of input element object IDs */
429 struct util_bitmask *input_element_object_id_bm;
430
431 /* Bitmask of rasterizer object IDs */
432 struct util_bitmask *rast_object_id_bm;
433
434 /* Bitmask of sampler state objects IDs */
435 struct util_bitmask *sampler_object_id_bm;
436
437 /* Bitmask of sampler view IDs */
438 struct util_bitmask *sampler_view_id_bm;
439
440 /* Bitmask of used shader IDs */
441 struct util_bitmask *shader_id_bm;
442
443 /* Bitmask of used surface view IDs */
444 struct util_bitmask *surface_view_id_bm;
445
446 /* Bitmask of used stream output IDs */
447 struct util_bitmask *stream_output_id_bm;
448
449 /* Bitmask of used query IDs */
450 struct util_bitmask *query_id_bm;
451
452 struct {
453 unsigned dirty[SVGA_STATE_MAX];
454
455 /** bitmasks of which const buffers are changed */
456 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
457
458 unsigned texture_timestamp;
459
460 /*
461 */
462 struct svga_sw_state sw;
463 struct svga_hw_draw_state hw_draw;
464 struct svga_hw_clear_state hw_clear;
465 } state;
466
467 struct svga_state curr; /* state from the state tracker */
468 unsigned dirty; /* statechanges since last update_state() */
469
470 union {
471 struct {
472 unsigned rendertargets:1;
473 unsigned texture_samplers:1;
474 unsigned constbufs:1;
475 unsigned vs:1;
476 unsigned fs:1;
477 unsigned gs:1;
478 unsigned query:1;
479 } flags;
480 unsigned val;
481 } rebind;
482
483 struct svga_hwtnl *hwtnl;
484
485 /** Queries states */
486 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
487 unsigned gb_query_len; /**< gb query object size */
488 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
489 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
490 /**< query mem block mapping */
491 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
492
493 /** List of buffers with queued transfers */
494 struct list_head dirty_buffers;
495
496 /** performance / info queries for HUD */
497 struct {
498 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
499 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
500 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
501 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
502 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
503 uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
504 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
505 uint64_t num_state_objects; /**< SVGA_QUERY_NUM_STATE_OBJECTS */
506 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
507 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
508 } hud;
509
510 /** The currently bound stream output targets */
511 unsigned num_so_targets;
512 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
513 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
514 struct svga_stream_output *current_so;
515
516 /** A blend state with blending disabled, for falling back to when blending
517 * is illegal (e.g. an integer texture is bound)
518 */
519 struct svga_blend_state *noop_blend;
520
521 struct {
522 struct pipe_resource *texture;
523 struct svga_pipe_sampler_view *sampler_view;
524 void *sampler;
525 } polygon_stipple;
526
527 /** Alternate rasterizer states created for point sprite */
528 struct svga_rasterizer_state *rasterizer_no_cull[2];
529 };
530
531 /* A flag for each state_tracker state object:
532 */
533 #define SVGA_NEW_BLEND 0x1
534 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
535 #define SVGA_NEW_RAST 0x4
536 #define SVGA_NEW_SAMPLER 0x8
537 #define SVGA_NEW_TEXTURE 0x10
538 #define SVGA_NEW_VBUFFER 0x20
539 #define SVGA_NEW_VELEMENT 0x40
540 #define SVGA_NEW_FS 0x80
541 #define SVGA_NEW_VS 0x100
542 #define SVGA_NEW_FS_CONST_BUFFER 0x200
543 #define SVGA_NEW_VS_CONST_BUFFER 0x400
544 #define SVGA_NEW_FRAME_BUFFER 0x800
545 #define SVGA_NEW_STIPPLE 0x1000
546 #define SVGA_NEW_SCISSOR 0x2000
547 #define SVGA_NEW_BLEND_COLOR 0x4000
548 #define SVGA_NEW_CLIP 0x8000
549 #define SVGA_NEW_VIEWPORT 0x10000
550 #define SVGA_NEW_PRESCALE 0x20000
551 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
552 #define SVGA_NEW_TEXTURE_BINDING 0x80000
553 #define SVGA_NEW_NEED_PIPELINE 0x100000
554 #define SVGA_NEW_NEED_SWVFETCH 0x200000
555 #define SVGA_NEW_NEED_SWTNL 0x400000
556 #define SVGA_NEW_FS_VARIANT 0x800000
557 #define SVGA_NEW_VS_VARIANT 0x1000000
558 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
559 #define SVGA_NEW_STENCIL_REF 0x8000000
560 #define SVGA_NEW_GS 0x10000000
561 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
562 #define SVGA_NEW_GS_VARIANT 0x40000000
563
564
565
566
567 /***********************************************************************
568 * svga_clear.c:
569 */
570 void svga_clear(struct pipe_context *pipe,
571 unsigned buffers,
572 const union pipe_color_union *color,
573 double depth,
574 unsigned stencil);
575
576
577 /***********************************************************************
578 * svga_screen_texture.c:
579 */
580 void svga_mark_surfaces_dirty(struct svga_context *svga);
581
582
583
584
585 void svga_init_state_functions( struct svga_context *svga );
586 void svga_init_flush_functions( struct svga_context *svga );
587 void svga_init_string_functions( struct svga_context *svga );
588 void svga_init_blit_functions(struct svga_context *svga);
589
590 void svga_init_blend_functions( struct svga_context *svga );
591 void svga_init_depth_stencil_functions( struct svga_context *svga );
592 void svga_init_misc_functions( struct svga_context *svga );
593 void svga_init_rasterizer_functions( struct svga_context *svga );
594 void svga_init_sampler_functions( struct svga_context *svga );
595 void svga_init_fs_functions( struct svga_context *svga );
596 void svga_init_vs_functions( struct svga_context *svga );
597 void svga_init_gs_functions( struct svga_context *svga );
598 void svga_init_vertex_functions( struct svga_context *svga );
599 void svga_init_constbuffer_functions( struct svga_context *svga );
600 void svga_init_draw_functions( struct svga_context *svga );
601 void svga_init_query_functions( struct svga_context *svga );
602 void svga_init_surface_functions(struct svga_context *svga);
603 void svga_init_stream_output_functions( struct svga_context *svga );
604
605 void svga_cleanup_vertex_state( struct svga_context *svga );
606 void svga_cleanup_tss_binding( struct svga_context *svga );
607 void svga_cleanup_framebuffer( struct svga_context *svga );
608
609 void svga_context_flush( struct svga_context *svga,
610 struct pipe_fence_handle **pfence );
611
612 void svga_context_finish(struct svga_context *svga);
613
614 void svga_hwtnl_flush_retry( struct svga_context *svga );
615 void svga_hwtnl_flush_buffer( struct svga_context *svga,
616 struct pipe_resource *buffer );
617
618 void svga_surfaces_flush(struct svga_context *svga);
619
620 struct pipe_context *
621 svga_context_create(struct pipe_screen *screen,
622 void *priv, unsigned flags);
623
624
625 /***********************************************************************
626 * Inline conversion functions. These are better-typed than the
627 * macros used previously:
628 */
629 static inline struct svga_context *
630 svga_context( struct pipe_context *pipe )
631 {
632 return (struct svga_context *)pipe;
633 }
634
635
636 static inline boolean
637 svga_have_gb_objects(const struct svga_context *svga)
638 {
639 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
640 }
641
642 static inline boolean
643 svga_have_gb_dma(const struct svga_context *svga)
644 {
645 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
646 }
647
648 static inline boolean
649 svga_have_vgpu10(const struct svga_context *svga)
650 {
651 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
652 }
653
654 static inline boolean
655 svga_need_to_rebind_resources(const struct svga_context *svga)
656 {
657 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
658 }
659
660 static inline boolean
661 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
662 {
663 return memcmp(r1, r2, sizeof(*r1)) == 0;
664 }
665
666 #endif