1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "pipe/p_compiler.h"
27 #include "util/u_inlines.h"
28 #include "pipe/p_defines.h"
29 #include "util/u_helpers.h"
30 #include "util/u_memory.h"
31 #include "util/u_math.h"
33 #include "svga_context.h"
34 #include "svga_draw.h"
35 #include "svga_draw_private.h"
36 #include "svga_debug.h"
37 #include "svga_screen.h"
38 #include "svga_resource.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_resource_texture.h"
41 #include "svga_shader.h"
42 #include "svga_surface.h"
43 #include "svga_winsys.h"
48 svga_hwtnl_create(struct svga_context
*svga
)
50 struct svga_hwtnl
*hwtnl
= CALLOC_STRUCT(svga_hwtnl
);
56 hwtnl
->cmd
.swc
= svga
->swc
;
66 svga_hwtnl_destroy(struct svga_hwtnl
*hwtnl
)
70 for (i
= 0; i
< PIPE_PRIM_MAX
; i
++) {
71 for (j
= 0; j
< IDX_CACHE_MAX
; j
++) {
72 pipe_resource_reference(&hwtnl
->index_cache
[i
][j
].buffer
, NULL
);
76 for (i
= 0; i
< hwtnl
->cmd
.vbuf_count
; i
++)
77 pipe_resource_reference(&hwtnl
->cmd
.vbufs
[i
].buffer
, NULL
);
79 for (i
= 0; i
< hwtnl
->cmd
.prim_count
; i
++)
80 pipe_resource_reference(&hwtnl
->cmd
.prim_ib
[i
], NULL
);
87 svga_hwtnl_set_flatshade(struct svga_hwtnl
*hwtnl
,
88 boolean flatshade
, boolean flatshade_first
)
90 struct svga_screen
*svgascreen
= svga_screen(hwtnl
->svga
->pipe
.screen
);
92 /* User-specified PV */
93 hwtnl
->api_pv
= (flatshade
&& !flatshade_first
) ? PV_LAST
: PV_FIRST
;
95 /* Device supported PV */
96 if (svgascreen
->haveProvokingVertex
) {
97 /* use the mode specified by the user */
98 hwtnl
->hw_pv
= hwtnl
->api_pv
;
101 /* the device only support first provoking vertex */
102 hwtnl
->hw_pv
= PV_FIRST
;
108 svga_hwtnl_set_fillmode(struct svga_hwtnl
*hwtnl
, unsigned mode
)
110 hwtnl
->api_fillmode
= mode
;
115 svga_hwtnl_vertex_decls(struct svga_hwtnl
*hwtnl
,
117 const SVGA3dVertexDecl
* decls
,
118 const unsigned *buffer_indexes
,
119 SVGA3dElementLayoutId layout_id
)
121 assert(hwtnl
->cmd
.prim_count
== 0);
122 hwtnl
->cmd
.vdecl_count
= count
;
123 hwtnl
->cmd
.vdecl_layout_id
= layout_id
;
124 memcpy(hwtnl
->cmd
.vdecl
, decls
, count
* sizeof(*decls
));
125 memcpy(hwtnl
->cmd
.vdecl_buffer_index
, buffer_indexes
,
126 count
* sizeof(unsigned));
131 * Specify vertex buffers for hardware drawing.
134 svga_hwtnl_vertex_buffers(struct svga_hwtnl
*hwtnl
,
135 unsigned count
, struct pipe_vertex_buffer
*buffers
)
137 util_set_vertex_buffers_count(hwtnl
->cmd
.vbufs
,
138 &hwtnl
->cmd
.vbuf_count
, buffers
, 0, count
);
143 * Determine whether the specified buffer is referred in the primitive queue,
144 * for which no commands have been written yet.
147 svga_hwtnl_is_buffer_referred(struct svga_hwtnl
*hwtnl
,
148 struct pipe_resource
*buffer
)
152 if (svga_buffer_is_user_buffer(buffer
)) {
156 if (!hwtnl
->cmd
.prim_count
) {
160 for (i
= 0; i
< hwtnl
->cmd
.vbuf_count
; ++i
) {
161 if (hwtnl
->cmd
.vbufs
[i
].buffer
== buffer
) {
166 for (i
= 0; i
< hwtnl
->cmd
.prim_count
; ++i
) {
167 if (hwtnl
->cmd
.prim_ib
[i
] == buffer
) {
176 static enum pipe_error
177 draw_vgpu9(struct svga_hwtnl
*hwtnl
)
179 struct svga_winsys_context
*swc
= hwtnl
->cmd
.swc
;
180 struct svga_context
*svga
= hwtnl
->svga
;
182 struct svga_winsys_surface
*vb_handle
[SVGA3D_INPUTREG_MAX
];
183 struct svga_winsys_surface
*ib_handle
[QSZ
];
184 struct svga_winsys_surface
*handle
;
185 SVGA3dVertexDecl
*vdecl
;
186 SVGA3dPrimitiveRange
*prim
;
189 for (i
= 0; i
< hwtnl
->cmd
.vdecl_count
; i
++) {
190 unsigned j
= hwtnl
->cmd
.vdecl_buffer_index
[i
];
191 handle
= svga_buffer_handle(svga
, hwtnl
->cmd
.vbufs
[j
].buffer
);
193 return PIPE_ERROR_OUT_OF_MEMORY
;
195 vb_handle
[i
] = handle
;
198 for (i
= 0; i
< hwtnl
->cmd
.prim_count
; i
++) {
199 if (hwtnl
->cmd
.prim_ib
[i
]) {
200 handle
= svga_buffer_handle(svga
, hwtnl
->cmd
.prim_ib
[i
]);
202 return PIPE_ERROR_OUT_OF_MEMORY
;
207 ib_handle
[i
] = handle
;
210 if (svga
->rebind
.flags
.rendertargets
) {
211 ret
= svga_reemit_framebuffer_bindings(svga
);
212 if (ret
!= PIPE_OK
) {
217 if (svga
->rebind
.flags
.texture_samplers
) {
218 ret
= svga_reemit_tss_bindings(svga
);
219 if (ret
!= PIPE_OK
) {
224 if (svga
->rebind
.flags
.vs
) {
225 ret
= svga_reemit_vs_bindings(svga
);
226 if (ret
!= PIPE_OK
) {
231 if (svga
->rebind
.flags
.fs
) {
232 ret
= svga_reemit_fs_bindings(svga
);
233 if (ret
!= PIPE_OK
) {
238 SVGA_DBG(DEBUG_DMA
, "draw to sid %p, %d prims\n",
239 svga
->curr
.framebuffer
.cbufs
[0] ?
240 svga_surface(svga
->curr
.framebuffer
.cbufs
[0])->handle
: NULL
,
241 hwtnl
->cmd
.prim_count
);
243 ret
= SVGA3D_BeginDrawPrimitives(swc
,
245 hwtnl
->cmd
.vdecl_count
,
246 &prim
, hwtnl
->cmd
.prim_count
);
252 hwtnl
->cmd
.vdecl_count
* sizeof hwtnl
->cmd
.vdecl
[0]);
254 for (i
= 0; i
< hwtnl
->cmd
.vdecl_count
; i
++) {
255 /* check for 4-byte alignment */
256 assert(vdecl
[i
].array
.offset
% 4 == 0);
257 assert(vdecl
[i
].array
.stride
% 4 == 0);
259 /* Given rangeHint is considered to be relative to indexBias, and
260 * indexBias varies per primitive, we cannot accurately supply an
261 * rangeHint when emitting more than one primitive per draw command.
263 if (hwtnl
->cmd
.prim_count
== 1) {
264 vdecl
[i
].rangeHint
.first
= hwtnl
->cmd
.min_index
[0];
265 vdecl
[i
].rangeHint
.last
= hwtnl
->cmd
.max_index
[0] + 1;
268 vdecl
[i
].rangeHint
.first
= 0;
269 vdecl
[i
].rangeHint
.last
= 0;
272 swc
->surface_relocation(swc
,
273 &vdecl
[i
].array
.surfaceId
,
274 NULL
, vb_handle
[i
], SVGA_RELOC_READ
);
278 hwtnl
->cmd
.prim
, hwtnl
->cmd
.prim_count
* sizeof hwtnl
->cmd
.prim
[0]);
280 for (i
= 0; i
< hwtnl
->cmd
.prim_count
; i
++) {
281 swc
->surface_relocation(swc
,
282 &prim
[i
].indexArray
.surfaceId
,
283 NULL
, ib_handle
[i
], SVGA_RELOC_READ
);
284 pipe_resource_reference(&hwtnl
->cmd
.prim_ib
[i
], NULL
);
287 SVGA_FIFOCommitAll(swc
);
289 hwtnl
->cmd
.prim_count
= 0;
295 static SVGA3dSurfaceFormat
296 xlate_index_format(unsigned indexWidth
)
298 if (indexWidth
== 2) {
299 return SVGA3D_R16_UINT
;
301 else if (indexWidth
== 4) {
302 return SVGA3D_R32_UINT
;
305 assert(!"Bad indexWidth");
306 return SVGA3D_R32_UINT
;
311 static enum pipe_error
312 validate_sampler_resources(struct svga_context
*svga
)
316 assert(svga_have_vgpu10(svga
));
318 for (shader
= PIPE_SHADER_VERTEX
; shader
<= PIPE_SHADER_GEOMETRY
; shader
++) {
319 unsigned count
= svga
->curr
.num_sampler_views
[shader
];
321 struct svga_winsys_surface
*surfaces
[PIPE_MAX_SAMPLERS
];
325 * Reference bound sampler resources to ensure pending updates are
326 * noticed by the device.
328 for (i
= 0; i
< count
; i
++) {
329 struct svga_pipe_sampler_view
*sv
=
330 svga_pipe_sampler_view(svga
->curr
.sampler_views
[shader
][i
]);
333 if (sv
->base
.texture
->target
== PIPE_BUFFER
) {
334 surfaces
[i
] = svga_buffer_handle(svga
, sv
->base
.texture
);
337 surfaces
[i
] = svga_texture(sv
->base
.texture
)->handle
;
345 if (shader
== PIPE_SHADER_FRAGMENT
&&
346 svga
->curr
.rast
->templ
.poly_stipple_enable
) {
347 const unsigned unit
= svga
->state
.hw_draw
.fs
->pstipple_sampler_unit
;
348 struct svga_pipe_sampler_view
*sv
=
349 svga
->polygon_stipple
.sampler_view
;
352 surfaces
[unit
] = svga_texture(sv
->base
.texture
)->handle
;
353 count
= MAX2(count
, unit
+1);
356 /* rebind the shader resources if needed */
357 if (svga
->rebind
.flags
.texture_samplers
) {
358 for (i
= 0; i
< count
; i
++) {
360 ret
= svga
->swc
->resource_rebind(svga
->swc
,
370 svga
->rebind
.flags
.texture_samplers
= FALSE
;
376 static enum pipe_error
377 validate_constant_buffers(struct svga_context
*svga
)
381 assert(svga_have_vgpu10(svga
));
383 for (shader
= PIPE_SHADER_VERTEX
; shader
<= PIPE_SHADER_GEOMETRY
; shader
++) {
385 struct svga_buffer
*buffer
;
386 struct svga_winsys_surface
*handle
;
387 unsigned enabled_constbufs
;
389 /* Rebind the default constant buffer if needed */
390 if (svga
->rebind
.flags
.constbufs
) {
391 buffer
= svga_buffer(svga
->state
.hw_draw
.constbuf
[shader
]);
393 ret
= svga
->swc
->resource_rebind(svga
->swc
,
403 * Reference other bound constant buffers to ensure pending updates are
404 * noticed by the device.
406 enabled_constbufs
= svga
->state
.hw_draw
.enabled_constbufs
[shader
] & ~1u;
407 while (enabled_constbufs
) {
408 unsigned i
= u_bit_scan(&enabled_constbufs
);
409 buffer
= svga_buffer(svga
->curr
.constbufs
[shader
][i
].buffer
);
411 handle
= svga_buffer_handle(svga
, &buffer
->b
.b
);
413 if (svga
->rebind
.flags
.constbufs
) {
414 ret
= svga
->swc
->resource_rebind(svga
->swc
,
424 svga
->rebind
.flags
.constbufs
= FALSE
;
430 static enum pipe_error
431 draw_vgpu10(struct svga_hwtnl
*hwtnl
,
432 const SVGA3dPrimitiveRange
*range
,
435 unsigned max_index
, struct pipe_resource
*ib
,
436 unsigned start_instance
, unsigned instance_count
)
438 struct svga_context
*svga
= hwtnl
->svga
;
439 struct svga_winsys_surface
*vb_handle
[SVGA3D_INPUTREG_MAX
];
440 struct svga_winsys_surface
*ib_handle
;
441 const unsigned vbuf_count
= hwtnl
->cmd
.vbuf_count
;
445 assert(svga_have_vgpu10(svga
));
446 assert(hwtnl
->cmd
.prim_count
== 0);
448 /* We need to reemit all the current resource bindings along with the Draw
449 * command to be sure that the referenced resources are available for the
450 * Draw command, just in case the surfaces associated with the resources
453 if (svga
->rebind
.val
) {
454 ret
= svga_rebind_framebuffer_bindings(svga
);
458 ret
= svga_rebind_shaders(svga
);
463 ret
= validate_sampler_resources(svga
);
467 ret
= validate_constant_buffers(svga
);
471 /* Get handle for each referenced vertex buffer */
472 for (i
= 0; i
< vbuf_count
; i
++) {
473 struct svga_buffer
*sbuf
= svga_buffer(hwtnl
->cmd
.vbufs
[i
].buffer
);
476 assert(sbuf
->key
.flags
& SVGA3D_SURFACE_BIND_VERTEX_BUFFER
);
477 vb_handle
[i
] = svga_buffer_handle(svga
, &sbuf
->b
.b
);
478 if (vb_handle
[i
] == NULL
)
479 return PIPE_ERROR_OUT_OF_MEMORY
;
486 /* Get handles for the index buffers */
488 struct svga_buffer
*sbuf
= svga_buffer(ib
);
490 assert(sbuf
->key
.flags
& SVGA3D_SURFACE_BIND_INDEX_BUFFER
);
491 (void) sbuf
; /* silence unused var warning */
493 ib_handle
= svga_buffer_handle(svga
, ib
);
495 return PIPE_ERROR_OUT_OF_MEMORY
;
501 /* setup vertex attribute input layout */
502 if (svga
->state
.hw_draw
.layout_id
!= hwtnl
->cmd
.vdecl_layout_id
) {
503 ret
= SVGA3D_vgpu10_SetInputLayout(svga
->swc
,
504 hwtnl
->cmd
.vdecl_layout_id
);
508 svga
->state
.hw_draw
.layout_id
= hwtnl
->cmd
.vdecl_layout_id
;
511 /* setup vertex buffers */
513 SVGA3dVertexBuffer buffers
[PIPE_MAX_ATTRIBS
];
515 for (i
= 0; i
< vbuf_count
; i
++) {
516 buffers
[i
].stride
= hwtnl
->cmd
.vbufs
[i
].stride
;
517 buffers
[i
].offset
= hwtnl
->cmd
.vbufs
[i
].buffer_offset
;
519 if (vbuf_count
> 0) {
520 /* If we haven't yet emitted a drawing command or if any
521 * vertex buffer state is changing, issue that state now.
523 if (((hwtnl
->cmd
.swc
->hints
& SVGA_HINT_FLAG_DRAW_EMITTED
) == 0) ||
524 vbuf_count
!= svga
->state
.hw_draw
.num_vbuffers
||
525 memcmp(buffers
, svga
->state
.hw_draw
.vbuffers
,
526 vbuf_count
* sizeof(buffers
[0])) ||
527 memcmp(vb_handle
, svga
->state
.hw_draw
.vbuffer_handles
,
528 vbuf_count
* sizeof(vb_handle
[0]))) {
529 ret
= SVGA3D_vgpu10_SetVertexBuffers(svga
->swc
, vbuf_count
,
535 svga
->state
.hw_draw
.num_vbuffers
= vbuf_count
;
536 memcpy(svga
->state
.hw_draw
.vbuffers
, buffers
,
537 vbuf_count
* sizeof(buffers
[0]));
538 memcpy(svga
->state
.hw_draw
.vbuffer_handles
, vb_handle
,
539 vbuf_count
* sizeof(vb_handle
[0]));
544 /* Set primitive type (line, tri, etc) */
545 if (svga
->state
.hw_draw
.topology
!= range
->primType
) {
546 ret
= SVGA3D_vgpu10_SetTopology(svga
->swc
, range
->primType
);
550 svga
->state
.hw_draw
.topology
= range
->primType
;
554 /* indexed drawing */
555 SVGA3dSurfaceFormat indexFormat
= xlate_index_format(range
->indexWidth
);
557 /* setup index buffer */
558 if (ib_handle
!= svga
->state
.hw_draw
.ib
||
559 indexFormat
!= svga
->state
.hw_draw
.ib_format
||
560 range
->indexArray
.offset
!= svga
->state
.hw_draw
.ib_offset
) {
561 ret
= SVGA3D_vgpu10_SetIndexBuffer(svga
->swc
, ib_handle
,
563 range
->indexArray
.offset
);
566 svga
->state
.hw_draw
.ib
= ib_handle
;
567 svga
->state
.hw_draw
.ib_format
= indexFormat
;
568 svga
->state
.hw_draw
.ib_offset
= range
->indexArray
.offset
;
571 if (instance_count
> 1) {
572 ret
= SVGA3D_vgpu10_DrawIndexedInstanced(svga
->swc
,
575 0, /* startIndexLocation */
582 /* non-instanced drawing */
583 ret
= SVGA3D_vgpu10_DrawIndexed(svga
->swc
,
585 0, /* startIndexLocation */
592 /* non-indexed drawing */
593 if (instance_count
> 1) {
594 ret
= SVGA3D_vgpu10_DrawInstanced(svga
->swc
,
604 ret
= SVGA3D_vgpu10_Draw(svga
->swc
,
612 hwtnl
->cmd
.prim_count
= 0;
620 * Emit any pending drawing commands to the command buffer.
621 * When we receive VGPU9 drawing commands we accumulate them and don't
622 * immediately emit them into the command buffer.
623 * This function needs to be called before we change state that could
624 * effect those pending draws.
627 svga_hwtnl_flush(struct svga_hwtnl
*hwtnl
)
629 if (!svga_have_vgpu10(hwtnl
->svga
) && hwtnl
->cmd
.prim_count
) {
630 /* we only queue up primitive for VGPU9 */
631 return draw_vgpu9(hwtnl
);
638 svga_hwtnl_set_index_bias(struct svga_hwtnl
*hwtnl
, int index_bias
)
640 hwtnl
->index_bias
= index_bias
;
645 /***********************************************************************
646 * Internal functions:
650 * For debugging only.
653 check_draw_params(struct svga_hwtnl
*hwtnl
,
654 const SVGA3dPrimitiveRange
*range
,
655 unsigned min_index
, unsigned max_index
,
656 struct pipe_resource
*ib
)
660 assert(!svga_have_vgpu10(hwtnl
->svga
));
662 for (i
= 0; i
< hwtnl
->cmd
.vdecl_count
; i
++) {
663 unsigned j
= hwtnl
->cmd
.vdecl_buffer_index
[i
];
664 const struct pipe_vertex_buffer
*vb
= &hwtnl
->cmd
.vbufs
[j
];
665 unsigned size
= vb
->buffer
? vb
->buffer
->width0
: 0;
666 unsigned offset
= hwtnl
->cmd
.vdecl
[i
].array
.offset
;
667 unsigned stride
= hwtnl
->cmd
.vdecl
[i
].array
.stride
;
668 int index_bias
= (int) range
->indexBias
+ hwtnl
->index_bias
;
676 assert(offset
< size
);
677 assert(min_index
<= max_index
);
683 switch (hwtnl
->cmd
.vdecl
[i
].identity
.type
) {
684 case SVGA3D_DECLTYPE_FLOAT1
:
687 case SVGA3D_DECLTYPE_FLOAT2
:
690 case SVGA3D_DECLTYPE_FLOAT3
:
693 case SVGA3D_DECLTYPE_FLOAT4
:
696 case SVGA3D_DECLTYPE_D3DCOLOR
:
699 case SVGA3D_DECLTYPE_UBYTE4
:
702 case SVGA3D_DECLTYPE_SHORT2
:
705 case SVGA3D_DECLTYPE_SHORT4
:
708 case SVGA3D_DECLTYPE_UBYTE4N
:
711 case SVGA3D_DECLTYPE_SHORT2N
:
714 case SVGA3D_DECLTYPE_SHORT4N
:
717 case SVGA3D_DECLTYPE_USHORT2N
:
720 case SVGA3D_DECLTYPE_USHORT4N
:
723 case SVGA3D_DECLTYPE_UDEC3
:
726 case SVGA3D_DECLTYPE_DEC3N
:
729 case SVGA3D_DECLTYPE_FLOAT16_2
:
732 case SVGA3D_DECLTYPE_FLOAT16_4
:
741 if (index_bias
>= 0) {
742 assert(offset
+ index_bias
* stride
+ width
<= size
);
746 * min_index/max_index are merely conservative guesses, so we can't
747 * make buffer overflow detection based on their values.
751 assert(range
->indexWidth
== range
->indexArray
.stride
);
754 unsigned size
= ib
->width0
;
755 unsigned offset
= range
->indexArray
.offset
;
756 unsigned stride
= range
->indexArray
.stride
;
760 assert(offset
< size
);
766 switch (range
->primType
) {
767 case SVGA3D_PRIMITIVE_POINTLIST
:
768 count
= range
->primitiveCount
;
770 case SVGA3D_PRIMITIVE_LINELIST
:
771 count
= range
->primitiveCount
* 2;
773 case SVGA3D_PRIMITIVE_LINESTRIP
:
774 count
= range
->primitiveCount
+ 1;
776 case SVGA3D_PRIMITIVE_TRIANGLELIST
:
777 count
= range
->primitiveCount
* 3;
779 case SVGA3D_PRIMITIVE_TRIANGLESTRIP
:
780 count
= range
->primitiveCount
+ 2;
782 case SVGA3D_PRIMITIVE_TRIANGLEFAN
:
783 count
= range
->primitiveCount
+ 2;
791 assert(offset
+ count
* stride
<= size
);
797 * All drawing filters down into this function, either directly
798 * on the hardware path or after doing software vertex processing.
801 svga_hwtnl_prim(struct svga_hwtnl
*hwtnl
,
802 const SVGA3dPrimitiveRange
* range
,
805 unsigned max_index
, struct pipe_resource
*ib
,
806 unsigned start_instance
, unsigned instance_count
)
808 enum pipe_error ret
= PIPE_OK
;
810 if (svga_have_vgpu10(hwtnl
->svga
)) {
811 /* draw immediately */
812 ret
= draw_vgpu10(hwtnl
, range
, vcount
, min_index
, max_index
, ib
,
813 start_instance
, instance_count
);
814 if (ret
!= PIPE_OK
) {
815 svga_context_flush(hwtnl
->svga
, NULL
);
816 ret
= draw_vgpu10(hwtnl
, range
, vcount
, min_index
, max_index
, ib
,
817 start_instance
, instance_count
);
818 assert(ret
== PIPE_OK
);
822 /* batch up drawing commands */
824 check_draw_params(hwtnl
, range
, min_index
, max_index
, ib
);
825 assert(start_instance
== 0);
826 assert(instance_count
<= 1);
828 (void) check_draw_params
;
831 if (hwtnl
->cmd
.prim_count
+ 1 >= QSZ
) {
832 ret
= svga_hwtnl_flush(hwtnl
);
837 /* min/max indices are relative to bias */
838 hwtnl
->cmd
.min_index
[hwtnl
->cmd
.prim_count
] = min_index
;
839 hwtnl
->cmd
.max_index
[hwtnl
->cmd
.prim_count
] = max_index
;
841 hwtnl
->cmd
.prim
[hwtnl
->cmd
.prim_count
] = *range
;
842 hwtnl
->cmd
.prim
[hwtnl
->cmd
.prim_count
].indexBias
+= hwtnl
->index_bias
;
844 pipe_resource_reference(&hwtnl
->cmd
.prim_ib
[hwtnl
->cmd
.prim_count
], ib
);
845 hwtnl
->cmd
.prim_count
++;