src/gallium/drivers/svga/svga_draw.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "pipe/p_compiler.h"
  27 #include "util/u_inlines.h"
  28 #include "pipe/p_defines.h"
  29 #include "util/u_helpers.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_math.h"
  32
  33 #include "svga_context.h"
  34 #include "svga_draw.h"
  35 #include "svga_draw_private.h"
  36 #include "svga_debug.h"
  37 #include "svga_screen.h"
  38 #include "svga_resource.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_resource_texture.h"
  41 #include "svga_sampler_view.h"
  42 #include "svga_shader.h"
  43 #include "svga_surface.h"
  44 #include "svga_winsys.h"
  45 #include "svga_cmd.h"
  46
  47
  48 struct svga_hwtnl *
  49 svga_hwtnl_create(struct svga_context *svga)
  50 {
  51    struct svga_hwtnl *hwtnl = CALLOC_STRUCT(svga_hwtnl);
  52    if (!hwtnl)
  53       goto fail;
  54
  55    hwtnl->svga = svga;
  56
  57    hwtnl->cmd.swc = svga->swc;
  58
  59    return hwtnl;
  60
  61 fail:
  62    return NULL;
  63 }
  64
  65
  66 void
  67 svga_hwtnl_destroy(struct svga_hwtnl *hwtnl)
  68 {
  69    unsigned i, j;
  70
  71    for (i = 0; i < PIPE_PRIM_MAX; i++) {
  72       for (j = 0; j < IDX_CACHE_MAX; j++) {
  73          pipe_resource_reference(&hwtnl->index_cache[i][j].buffer, NULL);
  74       }
  75    }
  76
  77    for (i = 0; i < hwtnl->cmd.vbuf_count; i++)
  78       pipe_vertex_buffer_unreference(&hwtnl->cmd.vbufs[i]);
  79
  80    for (i = 0; i < hwtnl->cmd.prim_count; i++)
  81       pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
  82
  83    FREE(hwtnl);
  84 }
  85
  86
  87 void
  88 svga_hwtnl_set_flatshade(struct svga_hwtnl *hwtnl,
  89                          boolean flatshade, boolean flatshade_first)
  90 {
  91    struct svga_screen *svgascreen = svga_screen(hwtnl->svga->pipe.screen);
  92
  93    /* User-specified PV */
  94    hwtnl->api_pv = (flatshade && !flatshade_first) ? PV_LAST : PV_FIRST;
  95
  96    /* Device supported PV */
  97    if (svgascreen->haveProvokingVertex) {
  98       /* use the mode specified by the user */
  99       hwtnl->hw_pv = hwtnl->api_pv;
 100    }
 101    else {
 102       /* the device only support first provoking vertex */
 103       hwtnl->hw_pv = PV_FIRST;
 104    }
 105 }
 106
 107
 108 void
 109 svga_hwtnl_set_fillmode(struct svga_hwtnl *hwtnl, unsigned mode)
 110 {
 111    hwtnl->api_fillmode = mode;
 112 }
 113
 114
 115 void
 116 svga_hwtnl_vertex_decls(struct svga_hwtnl *hwtnl,
 117                         unsigned count,
 118                         const SVGA3dVertexDecl * decls,
 119                         const unsigned *buffer_indexes,
 120                         SVGA3dElementLayoutId layout_id)
 121 {
 122    assert(hwtnl->cmd.prim_count == 0);
 123    hwtnl->cmd.vdecl_count = count;
 124    hwtnl->cmd.vdecl_layout_id = layout_id;
 125    memcpy(hwtnl->cmd.vdecl, decls, count * sizeof(*decls));
 126    memcpy(hwtnl->cmd.vdecl_buffer_index, buffer_indexes,
 127           count * sizeof(unsigned));
 128 }
 129
 130
 131 /**
 132  * Specify vertex buffers for hardware drawing.
 133  */
 134 void
 135 svga_hwtnl_vertex_buffers(struct svga_hwtnl *hwtnl,
 136                           unsigned count, struct pipe_vertex_buffer *buffers)
 137 {
 138    struct pipe_vertex_buffer *dst = hwtnl->cmd.vbufs;
 139    const struct pipe_vertex_buffer *src = buffers;
 140    unsigned i;
 141
 142    for (i = 0; i < count; i++) {
 143       pipe_vertex_buffer_reference(&dst[i], &src[i]);
 144    }
 145
 146    /* release old buffer references */
 147    for ( ; i < hwtnl->cmd.vbuf_count; i++) {
 148       pipe_vertex_buffer_unreference(&dst[i]);
 149       /* don't bother zeroing stride/offset fields */
 150    }
 151
 152    hwtnl->cmd.vbuf_count = count;
 153 }
 154
 155
 156 /**
 157  * Determine whether the specified buffer is referred in the primitive queue,
 158  * for which no commands have been written yet.
 159  */
 160 boolean
 161 svga_hwtnl_is_buffer_referred(struct svga_hwtnl *hwtnl,
 162                               struct pipe_resource *buffer)
 163 {
 164    unsigned i;
 165
 166    if (svga_buffer_is_user_buffer(buffer)) {
 167       return FALSE;
 168    }
 169
 170    if (!hwtnl->cmd.prim_count) {
 171       return FALSE;
 172    }
 173
 174    for (i = 0; i < hwtnl->cmd.vbuf_count; ++i) {
 175       if (hwtnl->cmd.vbufs[i].buffer.resource == buffer) {
 176          return TRUE;
 177       }
 178    }
 179
 180    for (i = 0; i < hwtnl->cmd.prim_count; ++i) {
 181       if (hwtnl->cmd.prim_ib[i] == buffer) {
 182          return TRUE;
 183       }
 184    }
 185
 186    return FALSE;
 187 }
 188
 189
 190 static enum pipe_error
 191 draw_vgpu9(struct svga_hwtnl *hwtnl)
 192 {
 193    struct svga_winsys_context *swc = hwtnl->cmd.swc;
 194    struct svga_context *svga = hwtnl->svga;
 195    enum pipe_error ret;
 196    struct svga_winsys_surface *vb_handle[SVGA3D_INPUTREG_MAX];
 197    struct svga_winsys_surface *ib_handle[QSZ];
 198    struct svga_winsys_surface *handle;
 199    SVGA3dVertexDecl *vdecl;
 200    SVGA3dPrimitiveRange *prim;
 201    unsigned i;
 202
 203    /* Re-validate those sampler views with backing copy
 204     * of texture whose original copy has been updated.
 205     * This is done here at draw time because the texture binding might not
 206     * have modified, hence validation is not triggered at state update time,
 207     * and yet the texture might have been updated in another context, so
 208     * we need to re-validate the sampler view in order to update the backing
 209     * copy of the updated texture.
 210     */
 211    if (svga->state.hw_draw.num_backed_views) {
 212       for (i = 0; i < svga->state.hw_draw.num_views; i++) {
 213          struct svga_hw_view_state *view = &svga->state.hw_draw.views[i];
 214          struct svga_texture *tex = svga_texture(view->texture);
 215          struct svga_sampler_view *sv = view->v;
 216          if (sv && tex && sv->handle != tex->handle && sv->age < tex->age)
 217             svga_validate_sampler_view(svga, view->v);
 218       }
 219    }
 220
 221    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
 222       unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
 223       handle = svga_buffer_handle(svga, hwtnl->cmd.vbufs[j].buffer.resource,
 224                                   PIPE_BIND_VERTEX_BUFFER);
 225       if (!handle)
 226          return PIPE_ERROR_OUT_OF_MEMORY;
 227
 228       vb_handle[i] = handle;
 229    }
 230
 231    for (i = 0; i < hwtnl->cmd.prim_count; i++) {
 232       if (hwtnl->cmd.prim_ib[i]) {
 233          handle = svga_buffer_handle(svga, hwtnl->cmd.prim_ib[i],
 234                                      PIPE_BIND_INDEX_BUFFER);
 235          if (!handle)
 236             return PIPE_ERROR_OUT_OF_MEMORY;
 237       }
 238       else
 239          handle = NULL;
 240
 241       ib_handle[i] = handle;
 242    }
 243
 244    if (svga->rebind.flags.rendertargets) {
 245       ret = svga_reemit_framebuffer_bindings(svga);
 246       if (ret != PIPE_OK) {
 247          return ret;
 248       }
 249    }
 250
 251    if (svga->rebind.flags.texture_samplers) {
 252       ret = svga_reemit_tss_bindings(svga);
 253       if (ret != PIPE_OK) {
 254          return ret;
 255       }
 256    }
 257
 258    if (svga->rebind.flags.vs) {
 259       ret = svga_reemit_vs_bindings(svga);
 260       if (ret != PIPE_OK) {
 261          return ret;
 262       }
 263    }
 264
 265    if (svga->rebind.flags.fs) {
 266       ret = svga_reemit_fs_bindings(svga);
 267       if (ret != PIPE_OK) {
 268          return ret;
 269       }
 270    }
 271
 272    SVGA_DBG(DEBUG_DMA, "draw to sid %p, %d prims\n",
 273             svga->curr.framebuffer.cbufs[0] ?
 274             svga_surface(svga->curr.framebuffer.cbufs[0])->handle : NULL,
 275             hwtnl->cmd.prim_count);
 276
 277    ret = SVGA3D_BeginDrawPrimitives(swc,
 278                                     &vdecl,
 279                                     hwtnl->cmd.vdecl_count,
 280                                     &prim, hwtnl->cmd.prim_count);
 281    if (ret != PIPE_OK)
 282       return ret;
 283
 284    memcpy(vdecl,
 285           hwtnl->cmd.vdecl,
 286           hwtnl->cmd.vdecl_count * sizeof hwtnl->cmd.vdecl[0]);
 287
 288    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
 289       /* check for 4-byte alignment */
 290       assert(vdecl[i].array.offset % 4 == 0);
 291       assert(vdecl[i].array.stride % 4 == 0);
 292
 293       /* Given rangeHint is considered to be relative to indexBias, and
 294        * indexBias varies per primitive, we cannot accurately supply an
 295        * rangeHint when emitting more than one primitive per draw command.
 296        */
 297       if (hwtnl->cmd.prim_count == 1) {
 298          vdecl[i].rangeHint.first = hwtnl->cmd.min_index[0];
 299          vdecl[i].rangeHint.last = hwtnl->cmd.max_index[0] + 1;
 300       }
 301       else {
 302          vdecl[i].rangeHint.first = 0;
 303          vdecl[i].rangeHint.last = 0;
 304       }
 305
 306       swc->surface_relocation(swc,
 307                               &vdecl[i].array.surfaceId,
 308                               NULL, vb_handle[i], SVGA_RELOC_READ);
 309    }
 310
 311    memcpy(prim,
 312           hwtnl->cmd.prim, hwtnl->cmd.prim_count * sizeof hwtnl->cmd.prim[0]);
 313
 314    for (i = 0; i < hwtnl->cmd.prim_count; i++) {
 315       swc->surface_relocation(swc,
 316                               &prim[i].indexArray.surfaceId,
 317                               NULL, ib_handle[i], SVGA_RELOC_READ);
 318       pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
 319    }
 320
 321    SVGA_FIFOCommitAll(swc);
 322
 323    hwtnl->cmd.prim_count = 0;
 324
 325    return PIPE_OK;
 326 }
 327
 328
 329 static SVGA3dSurfaceFormat
 330 xlate_index_format(unsigned indexWidth)
 331 {
 332    if (indexWidth == 2) {
 333       return SVGA3D_R16_UINT;
 334    }
 335    else if (indexWidth == 4) {
 336       return SVGA3D_R32_UINT;
 337    }
 338    else {
 339       assert(!"Bad indexWidth");
 340       return SVGA3D_R32_UINT;
 341    }
 342 }
 343
 344
 345 static enum pipe_error
 346 validate_sampler_resources(struct svga_context *svga)
 347 {
 348    enum pipe_shader_type shader;
 349
 350    assert(svga_have_vgpu10(svga));
 351
 352    for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_COMPUTE; shader++) {
 353       unsigned count = svga->curr.num_sampler_views[shader];
 354       unsigned i;
 355       struct svga_winsys_surface *surfaces[PIPE_MAX_SAMPLERS];
 356       enum pipe_error ret;
 357
 358       /*
 359        * Reference bound sampler resources to ensure pending updates are
 360        * noticed by the device.
 361        */
 362       for (i = 0; i < count; i++) {
 363          struct svga_pipe_sampler_view *sv =
 364             svga_pipe_sampler_view(svga->curr.sampler_views[shader][i]);
 365
 366          if (sv) {
 367             if (sv->base.texture->target == PIPE_BUFFER) {
 368                surfaces[i] = svga_buffer_handle(svga, sv->base.texture,
 369                                                 PIPE_BIND_SAMPLER_VIEW);
 370             }
 371             else {
 372                surfaces[i] = svga_texture(sv->base.texture)->handle;
 373             }
 374          }
 375          else {
 376             surfaces[i] = NULL;
 377          }
 378       }
 379
 380       if (shader == PIPE_SHADER_FRAGMENT &&
 381           svga->curr.rast->templ.poly_stipple_enable) {
 382          const unsigned unit =
 383             svga_fs_variant(svga->state.hw_draw.fs)->pstipple_sampler_unit;
 384          struct svga_pipe_sampler_view *sv =
 385             svga->polygon_stipple.sampler_view;
 386
 387          assert(sv);
 388          surfaces[unit] = svga_texture(sv->base.texture)->handle;
 389          count = MAX2(count, unit+1);
 390       }
 391
 392       /* rebind the shader resources if needed */
 393       if (svga->rebind.flags.texture_samplers) {
 394          for (i = 0; i < count; i++) {
 395             if (surfaces[i]) {
 396                ret = svga->swc->resource_rebind(svga->swc,
 397                                                 surfaces[i],
 398                                                 NULL,
 399                                                 SVGA_RELOC_READ);
 400                if (ret != PIPE_OK)
 401                   return ret;
 402             }
 403          }
 404       }
 405    }
 406    svga->rebind.flags.texture_samplers = FALSE;
 407
 408    return PIPE_OK;
 409 }
 410
 411
 412 static enum pipe_error
 413 validate_constant_buffers(struct svga_context *svga)
 414 {
 415    enum pipe_shader_type shader;
 416
 417    assert(svga_have_vgpu10(svga));
 418
 419    for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_COMPUTE; shader++) {
 420       enum pipe_error ret;
 421       struct svga_buffer *buffer;
 422       struct svga_winsys_surface *handle;
 423       unsigned enabled_constbufs;
 424
 425       /* Rebind the default constant buffer if needed */
 426       if (svga->rebind.flags.constbufs) {
 427          buffer = svga_buffer(svga->state.hw_draw.constbuf[shader]);
 428          if (buffer) {
 429             ret = svga->swc->resource_rebind(svga->swc,
 430                                              buffer->handle,
 431                                              NULL,
 432                                              SVGA_RELOC_READ);
 433             if (ret != PIPE_OK)
 434                return ret;
 435          }
 436       }
 437
 438       /*
 439        * Reference other bound constant buffers to ensure pending updates are
 440        * noticed by the device.
 441        */
 442       enabled_constbufs = svga->state.hw_draw.enabled_constbufs[shader] & ~1u;
 443       while (enabled_constbufs) {
 444          unsigned i = u_bit_scan(&enabled_constbufs);
 445          buffer = svga_buffer(svga->curr.constbufs[shader][i].buffer);
 446          if (buffer) {
 447             handle = svga_buffer_handle(svga, &buffer->b.b,
 448                                         PIPE_BIND_CONSTANT_BUFFER);
 449
 450             if (svga->rebind.flags.constbufs) {
 451                ret = svga->swc->resource_rebind(svga->swc,
 452                                                 handle,
 453                                                 NULL,
 454                                                 SVGA_RELOC_READ);
 455                if (ret != PIPE_OK)
 456                   return ret;
 457             }
 458          }
 459       }
 460    }
 461    svga->rebind.flags.constbufs = FALSE;
 462
 463    return PIPE_OK;
 464 }
 465
 466
 467 /**
 468  * Was the last command put into the command buffer a drawing command?
 469  * We use this to determine if we can skip emitting buffer re-bind
 470  * commands when we have a sequence of drawing commands that use the
 471  * same vertex/index buffers with no intervening commands.
 472  *
 473  * The first drawing command will bind the vertex/index buffers.  If
 474  * the immediately following command is also a drawing command using the
 475  * same buffers, we shouldn't have to rebind them.
 476  */
 477 static bool
 478 last_command_was_draw(const struct svga_context *svga)
 479 {
 480    switch (SVGA3D_GetLastCommand(svga->swc)) {
 481    case SVGA_3D_CMD_DX_DRAW:
 482    case SVGA_3D_CMD_DX_DRAW_INDEXED:
 483    case SVGA_3D_CMD_DX_DRAW_INSTANCED:
 484    case SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED:
 485    case SVGA_3D_CMD_DX_DRAW_AUTO:
 486    case SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT:
 487    case SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT:
 488       return true;
 489    default:
 490       return false;
 491    }
 492 }
 493
 494
 495 /**
 496  * A helper function to compare vertex buffers.
 497  * They are equal if the vertex buffer attributes and the vertex buffer
 498  * resources are identical.
 499  */
 500 static boolean
 501 vertex_buffers_equal(unsigned count,
 502                      SVGA3dVertexBuffer *pVBufAttr1,
 503                      struct pipe_resource **pVBuf1,
 504                      SVGA3dVertexBuffer *pVBufAttr2,
 505                      struct pipe_resource **pVBuf2)
 506 {
 507    return (memcmp(pVBufAttr1, pVBufAttr2,
 508                   count * sizeof(*pVBufAttr1)) == 0) &&
 509           (memcmp(pVBuf1, pVBuf2, count * sizeof(*pVBuf1)) == 0);
 510 }
 511
 512
 513 /*
 514  * Prepare the vertex buffers for a drawing command.
 515  */
 516 static enum pipe_error
 517 validate_vertex_buffers(struct svga_hwtnl *hwtnl,
 518                    const struct pipe_stream_output_target *so_vertex_count)
 519 {
 520    struct svga_context *svga = hwtnl->svga;
 521    struct pipe_resource *vbuffers[SVGA3D_INPUTREG_MAX];
 522    struct svga_winsys_surface *vbuffer_handles[SVGA3D_INPUTREG_MAX];
 523    struct svga_winsys_surface *so_vertex_count_handle;
 524    const unsigned vbuf_count = so_vertex_count ? 1 : hwtnl->cmd.vbuf_count;
 525    int last_vbuf = -1;
 526    unsigned i;
 527
 528    assert(svga_have_vgpu10(svga));
 529
 530    /* Get handle for each referenced vertex buffer, unless we're using a
 531     * stream-out buffer to specify the drawing information (DrawAuto).
 532     */
 533    if (so_vertex_count) {
 534       i = 0;
 535    }
 536    else {
 537       for (i = 0; i < vbuf_count; i++) {
 538          struct svga_buffer *sbuf =
 539             svga_buffer(hwtnl->cmd.vbufs[i].buffer.resource);
 540
 541          if (sbuf) {
 542             vbuffer_handles[i] = svga_buffer_handle(svga, &sbuf->b.b,
 543                                                     PIPE_BIND_VERTEX_BUFFER);
 544             assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER);
 545             if (vbuffer_handles[i] == NULL)
 546                return PIPE_ERROR_OUT_OF_MEMORY;
 547             vbuffers[i] = &sbuf->b.b;
 548             last_vbuf = i;
 549          }
 550          else {
 551             vbuffers[i] = NULL;
 552             vbuffer_handles[i] = NULL;
 553          }
 554       }
 555    }
 556
 557    for (; i < svga->state.hw_draw.num_vbuffers; i++) {
 558       vbuffers[i] = NULL;
 559       vbuffer_handles[i] = NULL;
 560    }
 561
 562    /* Get handle for each referenced vertex buffer */
 563    for (i = 0; i < vbuf_count; i++) {
 564       struct svga_buffer *sbuf =
 565          svga_buffer(hwtnl->cmd.vbufs[i].buffer.resource);
 566
 567       if (sbuf) {
 568          vbuffer_handles[i] = svga_buffer_handle(svga, &sbuf->b.b,
 569                                                  PIPE_BIND_VERTEX_BUFFER);
 570          assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER);
 571          if (vbuffer_handles[i] == NULL)
 572             return PIPE_ERROR_OUT_OF_MEMORY;
 573          vbuffers[i] = &sbuf->b.b;
 574          last_vbuf = i;
 575       }
 576       else {
 577          vbuffers[i] = NULL;
 578          vbuffer_handles[i] = NULL;
 579       }
 580    }
 581
 582    for (; i < svga->state.hw_draw.num_vbuffers; i++) {
 583       vbuffers[i] = NULL;
 584       vbuffer_handles[i] = NULL;
 585    }
 586
 587    /* setup vertex attribute input layout */
 588    if (svga->state.hw_draw.layout_id != hwtnl->cmd.vdecl_layout_id) {
 589       enum pipe_error ret =
 590          SVGA3D_vgpu10_SetInputLayout(svga->swc,
 591                                       hwtnl->cmd.vdecl_layout_id);
 592       if (ret != PIPE_OK)
 593          return ret;
 594
 595       svga->state.hw_draw.layout_id = hwtnl->cmd.vdecl_layout_id;
 596    }
 597
 598    /* Get handle for the stream out buffer */
 599    if (so_vertex_count) {
 600       so_vertex_count_handle = svga_buffer_handle(svga,
 601                                                   so_vertex_count->buffer,
 602                                                   (PIPE_BIND_VERTEX_BUFFER |
 603                                                    PIPE_BIND_STREAM_OUTPUT));
 604       if (!so_vertex_count_handle)
 605          return PIPE_ERROR_OUT_OF_MEMORY;
 606    }
 607    else {
 608       so_vertex_count_handle = NULL;
 609    }
 610
 611    /* setup vertex buffers */
 612    {
 613       SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
 614
 615       if (so_vertex_count) {
 616          /* Set IA slot0 input buffer to the SO buffer */
 617          assert(vbuf_count == 1);
 618          vbuffer_attrs[0].stride = hwtnl->cmd.vbufs[0].stride;
 619          vbuffer_attrs[0].offset = hwtnl->cmd.vbufs[0].buffer_offset;
 620          vbuffer_attrs[0].sid = 0;
 621          vbuffers[0] = so_vertex_count->buffer;
 622          vbuffer_handles[0] = so_vertex_count_handle;
 623       }
 624       else {
 625          for (i = 0; i < vbuf_count; i++) {
 626             vbuffer_attrs[i].stride = hwtnl->cmd.vbufs[i].stride;
 627             vbuffer_attrs[i].offset = hwtnl->cmd.vbufs[i].buffer_offset;
 628             vbuffer_attrs[i].sid = 0;
 629          }
 630       }
 631
 632       /* If any of the vertex buffer state has changed, issue
 633        * the SetVertexBuffers command. Otherwise, we will just
 634        * need to rebind the resources.
 635        */
 636       if (vbuf_count != svga->state.hw_draw.num_vbuffers ||
 637           !vertex_buffers_equal(vbuf_count,
 638                                 vbuffer_attrs,
 639                                 vbuffers,
 640                                 svga->state.hw_draw.vbuffer_attrs,
 641                                 svga->state.hw_draw.vbuffers)) {
 642
 643          unsigned num_vbuffers;
 644
 645          /* get the max of the current bound vertex buffers count and
 646           * the to-be-bound vertex buffers count, so as to unbind
 647           * the unused vertex buffers.
 648           */
 649          num_vbuffers = MAX2(vbuf_count, svga->state.hw_draw.num_vbuffers);
 650
 651          /* Zero-out the old buffers we want to unbind (the number of loop
 652           * iterations here is typically very small, and often zero.)
 653           */
 654          for (i = vbuf_count; i < num_vbuffers; i++) {
 655             vbuffer_attrs[i].sid = 0;
 656             vbuffer_attrs[i].stride = 0;
 657             vbuffer_attrs[i].offset = 0;
 658             vbuffer_handles[i] = NULL;
 659          }
 660
 661          if (num_vbuffers > 0) {
 662             SVGA3dVertexBuffer *pbufAttrs = vbuffer_attrs;
 663             struct svga_winsys_surface **pbufHandles = vbuffer_handles;
 664             unsigned numVBuf = 0;
 665
 666             /* Loop through the vertex buffer lists to only emit
 667              * those vertex buffers that are not already in the
 668              * corresponding entries in the device's vertex buffer list.
 669              */
 670             for (i = 0; i < num_vbuffers; i++) {
 671                boolean emit =
 672                   vertex_buffers_equal(1,
 673                                        &vbuffer_attrs[i],
 674                                        &vbuffers[i],
 675                                        &svga->state.hw_draw.vbuffer_attrs[i],
 676                                        &svga->state.hw_draw.vbuffers[i]);
 677
 678                if (!emit && i == num_vbuffers-1) {
 679                   /* Include the last vertex buffer in the next emit
 680                    * if it is different.
 681                    */
 682                   emit = TRUE;
 683                   numVBuf++;
 684                   i++;
 685                }
 686
 687                if (emit) {
 688                   /* numVBuf can only be 0 if the first vertex buffer
 689                    * is the same as the one in the device's list.
 690                    * In this case, there is nothing to send yet.
 691                    */
 692                   if (numVBuf) {
 693                      enum pipe_error ret =
 694                         SVGA3D_vgpu10_SetVertexBuffers(svga->swc,
 695                                                        numVBuf,
 696                                                        i - numVBuf,
 697                                                        pbufAttrs, pbufHandles);
 698                      if (ret != PIPE_OK)
 699                         return ret;
 700                   }
 701                   pbufAttrs += (numVBuf + 1);
 702                   pbufHandles += (numVBuf + 1);
 703                   numVBuf = 0;
 704                }
 705                else
 706                   numVBuf++;
 707             }
 708
 709             /* save the number of vertex buffers sent to the device, not
 710              * including trailing unbound vertex buffers.
 711              */
 712             svga->state.hw_draw.num_vbuffers = last_vbuf + 1;
 713             memcpy(svga->state.hw_draw.vbuffer_attrs, vbuffer_attrs,
 714                    num_vbuffers * sizeof(vbuffer_attrs[0]));
 715             for (i = 0; i < num_vbuffers; i++) {
 716                pipe_resource_reference(&svga->state.hw_draw.vbuffers[i],
 717                                        vbuffers[i]);
 718             }
 719          }
 720       }
 721       else {
 722          /* Even though we can avoid emitting the redundant SetVertexBuffers
 723           * command, we still need to reference the vertex buffers surfaces.
 724           */
 725          for (i = 0; i < vbuf_count; i++) {
 726             if (vbuffer_handles[i] && !last_command_was_draw(svga)) {
 727                enum pipe_error ret =
 728                   svga->swc->resource_rebind(svga->swc, vbuffer_handles[i],
 729                                              NULL, SVGA_RELOC_READ);
 730                if (ret != PIPE_OK)
 731                   return ret;
 732             }
 733          }
 734       }
 735    }
 736
 737    return PIPE_OK;
 738 }
 739
 740
 741 /*
 742  * Prepare the index buffer for a drawing command.
 743  */
 744 static enum pipe_error
 745 validate_index_buffer(struct svga_hwtnl *hwtnl,
 746                       const SVGA3dPrimitiveRange *range,
 747                       struct pipe_resource *ib)
 748 {
 749    struct svga_context *svga = hwtnl->svga;
 750    struct svga_winsys_surface *ib_handle =
 751       svga_buffer_handle(svga, ib, PIPE_BIND_INDEX_BUFFER);
 752
 753    if (!ib_handle)
 754       return PIPE_ERROR_OUT_OF_MEMORY;
 755
 756    struct svga_buffer *sbuf = svga_buffer(ib);
 757    assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_INDEX_BUFFER);
 758    (void) sbuf; /* silence unused var warning */
 759
 760    SVGA3dSurfaceFormat indexFormat = xlate_index_format(range->indexWidth);
 761
 762    if (ib != svga->state.hw_draw.ib ||
 763        indexFormat != svga->state.hw_draw.ib_format ||
 764        range->indexArray.offset != svga->state.hw_draw.ib_offset) {
 765
 766       assert(indexFormat != SVGA3D_FORMAT_INVALID);
 767       enum pipe_error ret =
 768          SVGA3D_vgpu10_SetIndexBuffer(svga->swc, ib_handle,
 769                                       indexFormat,
 770                                       range->indexArray.offset);
 771       if (ret != PIPE_OK)
 772          return ret;
 773
 774       pipe_resource_reference(&svga->state.hw_draw.ib, ib);
 775       svga->state.hw_draw.ib_format = indexFormat;
 776       svga->state.hw_draw.ib_offset = range->indexArray.offset;
 777    }
 778    else {
 779       /* Even though we can avoid emitting the redundant SetIndexBuffer
 780        * command, we still need to reference the index buffer surface.
 781        */
 782       if (!last_command_was_draw(svga)) {
 783          enum pipe_error ret = svga->swc->resource_rebind(svga->swc,
 784                                                           ib_handle,
 785                                                           NULL,
 786                                                           SVGA_RELOC_READ);
 787          if (ret != PIPE_OK)
 788             return ret;
 789       }
 790    }
 791
 792    return PIPE_OK;
 793 }
 794
 795
 796 static enum pipe_error
 797 draw_vgpu10(struct svga_hwtnl *hwtnl,
 798             const SVGA3dPrimitiveRange *range,
 799             unsigned vcount,
 800             unsigned min_index, unsigned max_index,
 801             struct pipe_resource *ib,
 802             unsigned start_instance, unsigned instance_count,
 803             const struct pipe_draw_indirect_info *indirect,
 804             const struct pipe_stream_output_target *so_vertex_count)
 805 {
 806    struct svga_context *svga = hwtnl->svga;
 807    struct svga_winsys_surface *indirect_handle;
 808    enum pipe_error ret;
 809
 810    assert(svga_have_vgpu10(svga));
 811    assert(hwtnl->cmd.prim_count == 0);
 812
 813    /* We need to reemit all the current resource bindings along with the Draw
 814     * command to be sure that the referenced resources are available for the
 815     * Draw command, just in case the surfaces associated with the resources
 816     * are paged out.
 817     */
 818    if (svga->rebind.val) {
 819       ret = svga_rebind_framebuffer_bindings(svga);
 820       if (ret != PIPE_OK)
 821          return ret;
 822
 823       ret = svga_rebind_shaders(svga);
 824       if (ret != PIPE_OK)
 825          return ret;
 826
 827       /* Rebind stream output targets */
 828       ret = svga_rebind_stream_output_targets(svga);
 829       if (ret != PIPE_OK)
 830          return ret;
 831
 832       /* No need to explicitly rebind index buffer and vertex buffers here.
 833        * Even if the same index buffer or vertex buffers are referenced for this
 834        * draw and we skip emitting the redundant set command, we will still
 835        * reference the associated resources.
 836        */
 837    }
 838
 839    ret = validate_sampler_resources(svga);
 840    if (ret != PIPE_OK)
 841       return ret;
 842
 843    ret = validate_constant_buffers(svga);
 844    if (ret != PIPE_OK)
 845       return ret;
 846
 847    ret = validate_vertex_buffers(hwtnl, so_vertex_count);
 848    if (ret != PIPE_OK)
 849       return ret;
 850
 851    if (ib) {
 852       ret = validate_index_buffer(hwtnl, range, ib);
 853       if (ret != PIPE_OK)
 854          return ret;
 855    }
 856
 857    if (indirect) {
 858       indirect_handle = svga_buffer_handle(svga, indirect->buffer,
 859                                            PIPE_BIND_COMMAND_ARGS_BUFFER);
 860       if (!indirect_handle)
 861          return PIPE_ERROR_OUT_OF_MEMORY;
 862    }
 863    else {
 864       indirect_handle = NULL;
 865    }
 866
 867    /* Set primitive type (line, tri, etc) */
 868    if (svga->state.hw_draw.topology != range->primType) {
 869       ret = SVGA3D_vgpu10_SetTopology(svga->swc, range->primType);
 870       if (ret != PIPE_OK)
 871          return ret;
 872
 873       svga->state.hw_draw.topology = range->primType;
 874    }
 875
 876    if (ib) {
 877       /* indexed drawing */
 878       if (indirect) {
 879          ret = SVGA3D_sm5_DrawIndexedInstancedIndirect(svga->swc,
 880                                                        indirect_handle,
 881                                                        indirect->offset);
 882       }
 883       else if (instance_count > 1) {
 884          ret = SVGA3D_vgpu10_DrawIndexedInstanced(svga->swc,
 885                                                   vcount,
 886                                                   instance_count,
 887                                                   0, /* startIndexLocation */
 888                                                   range->indexBias,
 889                                                   start_instance);
 890       }
 891       else {
 892          /* non-instanced drawing */
 893          ret = SVGA3D_vgpu10_DrawIndexed(svga->swc,
 894                                          vcount,
 895                                          0,      /* startIndexLocation */
 896                                          range->indexBias);
 897       }
 898       if (ret != PIPE_OK) {
 899          return ret;
 900       }
 901    }
 902    else {
 903       /* non-indexed drawing */
 904       if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID ||
 905           svga->state.hw_draw.ib != NULL) {
 906          /* Unbind previously bound index buffer */
 907          ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, NULL,
 908                                             SVGA3D_FORMAT_INVALID, 0);
 909          if (ret != PIPE_OK)
 910             return ret;
 911          pipe_resource_reference(&svga->state.hw_draw.ib, NULL);
 912          svga->state.hw_draw.ib_format = SVGA3D_FORMAT_INVALID;
 913       }
 914
 915       assert(svga->state.hw_draw.ib == NULL);
 916
 917       if (so_vertex_count) {
 918          /* Stream-output drawing */
 919          ret = SVGA3D_vgpu10_DrawAuto(svga->swc);
 920       }
 921       else if (indirect) {
 922          ret = SVGA3D_sm5_DrawInstancedIndirect(svga->swc,
 923                                                 indirect_handle,
 924                                                 indirect->offset);
 925       }
 926       else if (instance_count > 1) {
 927          ret = SVGA3D_vgpu10_DrawInstanced(svga->swc,
 928                                            vcount,
 929                                            instance_count,
 930                                            range->indexBias,
 931                                            start_instance);
 932       }
 933       else {
 934          /* non-instanced */
 935          ret = SVGA3D_vgpu10_Draw(svga->swc,
 936                                   vcount,
 937                                   range->indexBias);
 938       }
 939       if (ret != PIPE_OK) {
 940          return ret;
 941       }
 942    }
 943
 944    hwtnl->cmd.prim_count = 0;
 945
 946    return PIPE_OK;
 947 }
 948
 949
 950
 951 /**
 952  * Emit any pending drawing commands to the command buffer.
 953  * When we receive VGPU9 drawing commands we accumulate them and don't
 954  * immediately emit them into the command buffer.
 955  * This function needs to be called before we change state that could
 956  * effect those pending draws.
 957  */
 958 enum pipe_error
 959 svga_hwtnl_flush(struct svga_hwtnl *hwtnl)
 960 {
 961    enum pipe_error ret = PIPE_OK;
 962
 963    SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLFLUSH);
 964
 965    if (!svga_have_vgpu10(hwtnl->svga) && hwtnl->cmd.prim_count) {
 966       /* we only queue up primitive for VGPU9 */
 967       ret = draw_vgpu9(hwtnl);
 968    }
 969
 970    SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws);
 971    return ret;
 972 }
 973
 974
 975 void
 976 svga_hwtnl_set_index_bias(struct svga_hwtnl *hwtnl, int index_bias)
 977 {
 978    hwtnl->index_bias = index_bias;
 979 }
 980
 981
 982
 983 /***********************************************************************
 984  * Internal functions:
 985  */
 986
 987 /**
 988  * For debugging only.
 989  */
 990 static void
 991 check_draw_params(struct svga_hwtnl *hwtnl,
 992                   const SVGA3dPrimitiveRange *range,
 993                   unsigned min_index, unsigned max_index,
 994                   struct pipe_resource *ib)
 995 {
 996    unsigned i;
 997
 998    assert(!svga_have_vgpu10(hwtnl->svga));
 999
1000    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
1001       unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
1002       const struct pipe_vertex_buffer *vb = &hwtnl->cmd.vbufs[j];
1003       unsigned size = vb->buffer.resource ? vb->buffer.resource->width0 : 0;
1004       unsigned offset = hwtnl->cmd.vdecl[i].array.offset;
1005       unsigned stride = hwtnl->cmd.vdecl[i].array.stride;
1006       int index_bias = (int) range->indexBias + hwtnl->index_bias;
1007       unsigned width;
1008
1009       if (size == 0)
1010          continue;
1011
1012       assert(vb);
1013       assert(size);
1014       assert(offset < size);
1015       assert(min_index <= max_index);
1016       (void) width;
1017       (void) stride;
1018       (void) offset;
1019       (void) size;
1020
1021       switch (hwtnl->cmd.vdecl[i].identity.type) {
1022       case SVGA3D_DECLTYPE_FLOAT1:
1023          width = 4;
1024          break;
1025       case SVGA3D_DECLTYPE_FLOAT2:
1026          width = 4 * 2;
1027          break;
1028       case SVGA3D_DECLTYPE_FLOAT3:
1029          width = 4 * 3;
1030          break;
1031       case SVGA3D_DECLTYPE_FLOAT4:
1032          width = 4 * 4;
1033          break;
1034       case SVGA3D_DECLTYPE_D3DCOLOR:
1035          width = 4;
1036          break;
1037       case SVGA3D_DECLTYPE_UBYTE4:
1038          width = 1 * 4;
1039          break;
1040       case SVGA3D_DECLTYPE_SHORT2:
1041          width = 2 * 2;
1042          break;
1043       case SVGA3D_DECLTYPE_SHORT4:
1044          width = 2 * 4;
1045          break;
1046       case SVGA3D_DECLTYPE_UBYTE4N:
1047          width = 1 * 4;
1048          break;
1049       case SVGA3D_DECLTYPE_SHORT2N:
1050          width = 2 * 2;
1051          break;
1052       case SVGA3D_DECLTYPE_SHORT4N:
1053          width = 2 * 4;
1054          break;
1055       case SVGA3D_DECLTYPE_USHORT2N:
1056          width = 2 * 2;
1057          break;
1058       case SVGA3D_DECLTYPE_USHORT4N:
1059          width = 2 * 4;
1060          break;
1061       case SVGA3D_DECLTYPE_UDEC3:
1062          width = 4;
1063          break;
1064       case SVGA3D_DECLTYPE_DEC3N:
1065          width = 4;
1066          break;
1067       case SVGA3D_DECLTYPE_FLOAT16_2:
1068          width = 2 * 2;
1069          break;
1070       case SVGA3D_DECLTYPE_FLOAT16_4:
1071          width = 2 * 4;
1072          break;
1073       default:
1074          assert(0);
1075          width = 0;
1076          break;
1077       }
1078
1079       if (index_bias >= 0) {
1080          assert(offset + index_bias * stride + width <= size);
1081       }
1082
1083       /*
1084        * min_index/max_index are merely conservative guesses, so we can't
1085        * make buffer overflow detection based on their values.
1086        */
1087    }
1088
1089    assert(range->indexWidth == range->indexArray.stride);
1090
1091    if (ib) {
1092       ASSERTED unsigned size = ib->width0;
1093       ASSERTED unsigned offset = range->indexArray.offset;
1094       ASSERTED unsigned stride = range->indexArray.stride;
1095       ASSERTED unsigned count;
1096
1097       assert(size);
1098       assert(offset < size);
1099       assert(stride);
1100
1101       switch (range->primType) {
1102       case SVGA3D_PRIMITIVE_POINTLIST:
1103          count = range->primitiveCount;
1104          break;
1105       case SVGA3D_PRIMITIVE_LINELIST:
1106          count = range->primitiveCount * 2;
1107          break;
1108       case SVGA3D_PRIMITIVE_LINESTRIP:
1109          count = range->primitiveCount + 1;
1110          break;
1111       case SVGA3D_PRIMITIVE_TRIANGLELIST:
1112          count = range->primitiveCount * 3;
1113          break;
1114       case SVGA3D_PRIMITIVE_TRIANGLESTRIP:
1115          count = range->primitiveCount + 2;
1116          break;
1117       case SVGA3D_PRIMITIVE_TRIANGLEFAN:
1118          count = range->primitiveCount + 2;
1119          break;
1120       default:
1121          assert(0);
1122          count = 0;
1123          break;
1124       }
1125
1126       assert(offset + count * stride <= size);
1127    }
1128 }
1129
1130
1131 /**
1132  * All drawing filters down into this function, either directly
1133  * on the hardware path or after doing software vertex processing.
1134  * \param indirect  if non-null, get the vertex count, first vertex, etc.
1135  *                  from a buffer.
1136  * \param so_vertex_count  if non-null, get the vertex count from a
1137  *                         stream-output target.
1138  */
1139 enum pipe_error
1140 svga_hwtnl_prim(struct svga_hwtnl *hwtnl,
1141                 const SVGA3dPrimitiveRange *range,
1142                 unsigned vcount,
1143                 unsigned min_index, unsigned max_index,
1144                 struct pipe_resource *ib,
1145                 unsigned start_instance, unsigned instance_count,
1146                 const struct pipe_draw_indirect_info *indirect,
1147                 const struct pipe_stream_output_target *so_vertex_count)
1148 {
1149    enum pipe_error ret = PIPE_OK;
1150
1151    SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLPRIM);
1152
1153    if (svga_have_vgpu10(hwtnl->svga)) {
1154       /* draw immediately */
1155       SVGA_RETRY(hwtnl->svga, draw_vgpu10(hwtnl, range, vcount, min_index,
1156                                           max_index, ib, start_instance,
1157                                           instance_count, indirect,
1158                                           so_vertex_count));
1159    }
1160    else {
1161       /* batch up drawing commands */
1162       assert(indirect == NULL);
1163 #ifdef DEBUG
1164       check_draw_params(hwtnl, range, min_index, max_index, ib);
1165       assert(start_instance == 0);
1166       assert(instance_count <= 1);
1167 #else
1168       (void) check_draw_params;
1169 #endif
1170
1171       if (hwtnl->cmd.prim_count + 1 >= QSZ) {
1172          ret = svga_hwtnl_flush(hwtnl);
1173          if (ret != PIPE_OK)
1174             goto done;
1175       }
1176
1177       /* min/max indices are relative to bias */
1178       hwtnl->cmd.min_index[hwtnl->cmd.prim_count] = min_index;
1179       hwtnl->cmd.max_index[hwtnl->cmd.prim_count] = max_index;
1180
1181       hwtnl->cmd.prim[hwtnl->cmd.prim_count] = *range;
1182       hwtnl->cmd.prim[hwtnl->cmd.prim_count].indexBias += hwtnl->index_bias;
1183
1184       pipe_resource_reference(&hwtnl->cmd.prim_ib[hwtnl->cmd.prim_count], ib);
1185       hwtnl->cmd.prim_count++;
1186    }
1187
1188 done:
1189    SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws);
1190    return ret;
1191 }