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u_blitter: add a msaa parameter to util_blitter_clear
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
44 unsigned flags;
45 };
46
47 struct format_compat_entry
48 {
49 enum pipe_format pformat;
50 const SVGA3dSurfaceFormat *compat_format;
51 };
52
53
54 /**
55 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
56 * Note: the table is ordered according to PIPE_FORMAT_x order.
57 */
58 static const struct vgpu10_format_entry format_conversion_table[] =
59 {
60 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
61 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
66 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
67 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
69 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
70 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
71 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X},
72 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
73 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
74 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
75 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
77 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
78 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
80 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
81 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
83 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
84 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
85 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
86 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
87 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
90 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
91 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
92 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
93 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
94 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
95 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
98 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
99 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
100 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
101 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
102 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
103 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
104 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
105 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
106 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
107 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
108 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
109 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
110 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
111 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
112 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
113 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
114 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
115 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
116 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
117 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
118 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
119 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
120 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
121 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
122 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
123 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
124 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
125 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
126 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
127 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
128 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
129 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
130 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
131 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
132 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
133 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
134 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
136 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
137 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
138 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
139 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
140 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
141 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
144 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
145 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
146 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
147 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
148 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
149 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
150 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
153 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
154 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
156 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
157 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
160 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
161 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
162 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
163 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
164 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
165 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
166 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
167 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
168 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
169 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
170 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
171 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
172 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
179 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
180 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
181 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
182 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
185 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
186 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
187 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
193 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
202 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
203 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
204 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
217 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
218 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
219 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
220 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
221 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
222 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
223 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
224 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
228 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
229 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
230 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
231 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
232 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
233 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
234 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
235 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
236 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
237 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
238 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
239 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
240 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
241 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
242 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
243 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
244 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
245 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
246 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
247 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
248 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
249 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
250 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
251 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
252 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
253 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
254 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
255 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
256 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
258 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
259 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
260 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
262 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
263 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
264 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
265 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
266 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
267 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
268 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
269 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
270 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
271 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
272 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
273 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
274 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
275 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
276 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
277 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
278 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
279 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
280 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
281 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
282 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
283 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
284 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
285 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
286 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
309 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
315 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
364 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
365 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
366 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
367 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
368 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
369 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
370 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
371 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
372 { PIPE_FORMAT_A4B4G4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
373 { PIPE_FORMAT_R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
374 { PIPE_FORMAT_A8L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
375 { PIPE_FORMAT_G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
376 { PIPE_FORMAT_A8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
377 { PIPE_FORMAT_X8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
378 { PIPE_FORMAT_ATC_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
379 { PIPE_FORMAT_ATC_RGBA_EXPLICIT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
380 { PIPE_FORMAT_ATC_RGBA_INTERPOLATED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
381 { PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
382 };
383
384
385 /**
386 * Translate a gallium vertex format to a vgpu10 vertex format.
387 * Also, return any special vertex format flags.
388 */
389 void
390 svga_translate_vertex_format_vgpu10(enum pipe_format format,
391 SVGA3dSurfaceFormat *svga_format,
392 unsigned *vf_flags)
393 {
394 assert(format < ARRAY_SIZE(format_conversion_table));
395 if (format >= ARRAY_SIZE(format_conversion_table)) {
396 format = PIPE_FORMAT_NONE;
397 }
398 *svga_format = format_conversion_table[format].vertex_format;
399 *vf_flags = format_conversion_table[format].flags;
400 }
401
402
403 /**
404 * Translate a gallium pixel format to a vgpu10 format
405 * to be used in a shader resource view for a texture buffer.
406 * Also return any special texture format flags such as
407 * any special swizzle mask.
408 */
409 void
410 svga_translate_texture_buffer_view_format(enum pipe_format format,
411 SVGA3dSurfaceFormat *svga_format,
412 unsigned *tf_flags)
413 {
414 assert(format < ARRAY_SIZE(format_conversion_table));
415 if (format >= ARRAY_SIZE(format_conversion_table)) {
416 format = PIPE_FORMAT_NONE;
417 }
418 *svga_format = format_conversion_table[format].view_format;
419 *tf_flags = format_conversion_table[format].flags;
420 }
421
422
423 /**
424 * Translate a gallium scanout format to a svga format valid
425 * for screen target surface.
426 */
427 static SVGA3dSurfaceFormat
428 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
429 {
430 switch (format) {
431 case PIPE_FORMAT_B8G8R8A8_UNORM:
432 return SVGA3D_B8G8R8A8_UNORM;
433 case PIPE_FORMAT_B8G8R8X8_UNORM:
434 return SVGA3D_B8G8R8X8_UNORM;
435 case PIPE_FORMAT_B5G6R5_UNORM:
436 return SVGA3D_R5G6B5;
437 case PIPE_FORMAT_B5G5R5A1_UNORM:
438 return SVGA3D_A1R5G5B5;
439 default:
440 debug_printf("Invalid format %s specified for screen target\n",
441 svga_format_name(format));
442 return SVGA3D_FORMAT_INVALID;
443 }
444 }
445
446 /*
447 * Translate from gallium format to SVGA3D format.
448 */
449 SVGA3dSurfaceFormat
450 svga_translate_format(const struct svga_screen *ss,
451 enum pipe_format format,
452 unsigned bind)
453 {
454 if (ss->sws->have_vgpu10) {
455 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
456 return format_conversion_table[format].vertex_format;
457 }
458 else if (bind & PIPE_BIND_SCANOUT) {
459 return svga_translate_screen_target_format_vgpu10(format);
460 }
461 else {
462 return format_conversion_table[format].pixel_format;
463 }
464 }
465
466 switch(format) {
467 case PIPE_FORMAT_B8G8R8A8_UNORM:
468 return SVGA3D_A8R8G8B8;
469 case PIPE_FORMAT_B8G8R8X8_UNORM:
470 return SVGA3D_X8R8G8B8;
471
472 /* sRGB required for GL2.1 */
473 case PIPE_FORMAT_B8G8R8A8_SRGB:
474 return SVGA3D_A8R8G8B8;
475 case PIPE_FORMAT_DXT1_SRGB:
476 case PIPE_FORMAT_DXT1_SRGBA:
477 return SVGA3D_DXT1;
478 case PIPE_FORMAT_DXT3_SRGBA:
479 return SVGA3D_DXT3;
480 case PIPE_FORMAT_DXT5_SRGBA:
481 return SVGA3D_DXT5;
482
483 case PIPE_FORMAT_B5G6R5_UNORM:
484 return SVGA3D_R5G6B5;
485 case PIPE_FORMAT_B5G5R5A1_UNORM:
486 return SVGA3D_A1R5G5B5;
487 case PIPE_FORMAT_B4G4R4A4_UNORM:
488 return SVGA3D_A4R4G4B4;
489
490 case PIPE_FORMAT_R16G16B16A16_UNORM:
491 return SVGA3D_A16B16G16R16;
492
493 case PIPE_FORMAT_Z16_UNORM:
494 assert(!ss->sws->have_vgpu10);
495 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
496 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
497 assert(!ss->sws->have_vgpu10);
498 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
499 case PIPE_FORMAT_X8Z24_UNORM:
500 assert(!ss->sws->have_vgpu10);
501 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
502
503 case PIPE_FORMAT_A8_UNORM:
504 return SVGA3D_ALPHA8;
505 case PIPE_FORMAT_L8_UNORM:
506 return SVGA3D_LUMINANCE8;
507
508 case PIPE_FORMAT_DXT1_RGB:
509 case PIPE_FORMAT_DXT1_RGBA:
510 return SVGA3D_DXT1;
511 case PIPE_FORMAT_DXT3_RGBA:
512 return SVGA3D_DXT3;
513 case PIPE_FORMAT_DXT5_RGBA:
514 return SVGA3D_DXT5;
515
516 /* Float formats (only 1, 2 and 4-component formats supported) */
517 case PIPE_FORMAT_R32_FLOAT:
518 return SVGA3D_R_S23E8;
519 case PIPE_FORMAT_R32G32_FLOAT:
520 return SVGA3D_RG_S23E8;
521 case PIPE_FORMAT_R32G32B32A32_FLOAT:
522 return SVGA3D_ARGB_S23E8;
523 case PIPE_FORMAT_R16_FLOAT:
524 return SVGA3D_R_S10E5;
525 case PIPE_FORMAT_R16G16_FLOAT:
526 return SVGA3D_RG_S10E5;
527 case PIPE_FORMAT_R16G16B16A16_FLOAT:
528 return SVGA3D_ARGB_S10E5;
529
530 case PIPE_FORMAT_Z32_UNORM:
531 /* SVGA3D_Z_D32 is not yet unsupported */
532 /* fall-through */
533 default:
534 return SVGA3D_FORMAT_INVALID;
535 }
536 }
537
538
539 /*
540 * Format capability description entry.
541 */
542 struct format_cap {
543 const char *name;
544
545 SVGA3dSurfaceFormat format;
546
547 /*
548 * Capability index corresponding to the format.
549 */
550 SVGA3dDevCapIndex devcap;
551
552 /* size of each pixel/block */
553 unsigned block_width, block_height, block_bytes;
554
555 /*
556 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
557 * capability is not explicitly present.
558 */
559 uint32 defaultOperations;
560 };
561
562
563 /*
564 * Format capability description table.
565 *
566 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
567 */
568 static const struct format_cap format_cap_table[] = {
569 {
570 "SVGA3D_FORMAT_INVALID",
571 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
572 },
573 {
574 "SVGA3D_X8R8G8B8",
575 SVGA3D_X8R8G8B8,
576 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
577 1, 1, 4,
578 SVGA3DFORMAT_OP_TEXTURE |
579 SVGA3DFORMAT_OP_CUBETEXTURE |
580 SVGA3DFORMAT_OP_VOLUMETEXTURE |
581 SVGA3DFORMAT_OP_DISPLAYMODE |
582 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
583 },
584 {
585 "SVGA3D_A8R8G8B8",
586 SVGA3D_A8R8G8B8,
587 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
588 1, 1, 4,
589 SVGA3DFORMAT_OP_TEXTURE |
590 SVGA3DFORMAT_OP_CUBETEXTURE |
591 SVGA3DFORMAT_OP_VOLUMETEXTURE |
592 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
593 },
594 {
595 "SVGA3D_R5G6B5",
596 SVGA3D_R5G6B5,
597 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
598 1, 1, 2,
599 SVGA3DFORMAT_OP_TEXTURE |
600 SVGA3DFORMAT_OP_CUBETEXTURE |
601 SVGA3DFORMAT_OP_VOLUMETEXTURE |
602 SVGA3DFORMAT_OP_DISPLAYMODE |
603 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
604 },
605 {
606 "SVGA3D_X1R5G5B5",
607 SVGA3D_X1R5G5B5,
608 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
609 1, 1, 2,
610 SVGA3DFORMAT_OP_TEXTURE |
611 SVGA3DFORMAT_OP_CUBETEXTURE |
612 SVGA3DFORMAT_OP_VOLUMETEXTURE |
613 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
614 },
615 {
616 "SVGA3D_A1R5G5B5",
617 SVGA3D_A1R5G5B5,
618 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
619 1, 1, 2,
620 SVGA3DFORMAT_OP_TEXTURE |
621 SVGA3DFORMAT_OP_CUBETEXTURE |
622 SVGA3DFORMAT_OP_VOLUMETEXTURE |
623 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
624 },
625 {
626 "SVGA3D_A4R4G4B4",
627 SVGA3D_A4R4G4B4,
628 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
629 1, 1, 2,
630 SVGA3DFORMAT_OP_TEXTURE |
631 SVGA3DFORMAT_OP_CUBETEXTURE |
632 SVGA3DFORMAT_OP_VOLUMETEXTURE |
633 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
634 },
635 {
636 /*
637 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
638 * SVGA3D_DEVCAP_xxx.
639 */
640 "SVGA3D_Z_D32",
641 SVGA3D_Z_D32, 0, 0, 0, 0, 0
642 },
643 {
644 "SVGA3D_Z_D16",
645 SVGA3D_Z_D16,
646 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
647 1, 1, 2,
648 SVGA3DFORMAT_OP_ZSTENCIL
649 },
650 {
651 "SVGA3D_Z_D24S8",
652 SVGA3D_Z_D24S8,
653 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
654 1, 1, 4,
655 SVGA3DFORMAT_OP_ZSTENCIL
656 },
657 {
658 "SVGA3D_Z_D15S1",
659 SVGA3D_Z_D15S1,
660 SVGA3D_DEVCAP_MAX,
661 1, 1, 2,
662 SVGA3DFORMAT_OP_ZSTENCIL
663 },
664 {
665 "SVGA3D_LUMINANCE8",
666 SVGA3D_LUMINANCE8,
667 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
668 1, 1, 1,
669 SVGA3DFORMAT_OP_TEXTURE |
670 SVGA3DFORMAT_OP_CUBETEXTURE |
671 SVGA3DFORMAT_OP_VOLUMETEXTURE
672 },
673 {
674 /*
675 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
676 * SVGA3D_DEVCAP_xxx.
677 */
678 "SVGA3D_LUMINANCE4_ALPHA4",
679 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
680 },
681 {
682 "SVGA3D_LUMINANCE16",
683 SVGA3D_LUMINANCE16,
684 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
685 1, 1, 2,
686 SVGA3DFORMAT_OP_TEXTURE |
687 SVGA3DFORMAT_OP_CUBETEXTURE |
688 SVGA3DFORMAT_OP_VOLUMETEXTURE
689 },
690 {
691 "SVGA3D_LUMINANCE8_ALPHA8",
692 SVGA3D_LUMINANCE8_ALPHA8,
693 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
694 1, 1, 2,
695 SVGA3DFORMAT_OP_TEXTURE |
696 SVGA3DFORMAT_OP_CUBETEXTURE |
697 SVGA3DFORMAT_OP_VOLUMETEXTURE
698 },
699 {
700 "SVGA3D_DXT1",
701 SVGA3D_DXT1,
702 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
703 4, 4, 8,
704 SVGA3DFORMAT_OP_TEXTURE |
705 SVGA3DFORMAT_OP_CUBETEXTURE
706 },
707 {
708 "SVGA3D_DXT2",
709 SVGA3D_DXT2,
710 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
711 4, 4, 8,
712 SVGA3DFORMAT_OP_TEXTURE |
713 SVGA3DFORMAT_OP_CUBETEXTURE
714 },
715 {
716 "SVGA3D_DXT3",
717 SVGA3D_DXT3,
718 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
719 4, 4, 16,
720 SVGA3DFORMAT_OP_TEXTURE |
721 SVGA3DFORMAT_OP_CUBETEXTURE
722 },
723 {
724 "SVGA3D_DXT4",
725 SVGA3D_DXT4,
726 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
727 4, 4, 16,
728 SVGA3DFORMAT_OP_TEXTURE |
729 SVGA3DFORMAT_OP_CUBETEXTURE
730 },
731 {
732 "SVGA3D_DXT5",
733 SVGA3D_DXT5,
734 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
735 4, 4, 8,
736 SVGA3DFORMAT_OP_TEXTURE |
737 SVGA3DFORMAT_OP_CUBETEXTURE
738 },
739 {
740 "SVGA3D_BUMPU8V8",
741 SVGA3D_BUMPU8V8,
742 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
743 1, 1, 2,
744 SVGA3DFORMAT_OP_TEXTURE |
745 SVGA3DFORMAT_OP_CUBETEXTURE |
746 SVGA3DFORMAT_OP_VOLUMETEXTURE
747 },
748 {
749 /*
750 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
751 * SVGA3D_DEVCAP_xxx.
752 */
753 "SVGA3D_BUMPL6V5U5",
754 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
755 },
756 {
757 "SVGA3D_BUMPX8L8V8U8",
758 SVGA3D_BUMPX8L8V8U8,
759 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
760 1, 1, 4,
761 SVGA3DFORMAT_OP_TEXTURE |
762 SVGA3DFORMAT_OP_CUBETEXTURE
763 },
764 {
765 "SVGA3D_FORMAT_DEAD1",
766 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
767 },
768 {
769 "SVGA3D_ARGB_S10E5",
770 SVGA3D_ARGB_S10E5,
771 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
772 1, 1, 2,
773 SVGA3DFORMAT_OP_TEXTURE |
774 SVGA3DFORMAT_OP_CUBETEXTURE |
775 SVGA3DFORMAT_OP_VOLUMETEXTURE |
776 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
777 },
778 {
779 "SVGA3D_ARGB_S23E8",
780 SVGA3D_ARGB_S23E8,
781 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
782 1, 1, 4,
783 SVGA3DFORMAT_OP_TEXTURE |
784 SVGA3DFORMAT_OP_CUBETEXTURE |
785 SVGA3DFORMAT_OP_VOLUMETEXTURE |
786 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
787 },
788 {
789 "SVGA3D_A2R10G10B10",
790 SVGA3D_A2R10G10B10,
791 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
792 1, 1, 4,
793 SVGA3DFORMAT_OP_TEXTURE |
794 SVGA3DFORMAT_OP_CUBETEXTURE |
795 SVGA3DFORMAT_OP_VOLUMETEXTURE |
796 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
797 },
798 {
799 /*
800 * SVGA3D_V8U8 is unsupported; it has no corresponding
801 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
802 */
803 "SVGA3D_V8U8",
804 SVGA3D_V8U8, 0, 0, 0, 0, 0
805 },
806 {
807 "SVGA3D_Q8W8V8U8",
808 SVGA3D_Q8W8V8U8,
809 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
810 1, 1, 4,
811 SVGA3DFORMAT_OP_TEXTURE |
812 SVGA3DFORMAT_OP_CUBETEXTURE
813 },
814 {
815 "SVGA3D_CxV8U8",
816 SVGA3D_CxV8U8,
817 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
818 1, 1, 2,
819 SVGA3DFORMAT_OP_TEXTURE
820 },
821 {
822 /*
823 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
824 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
825 */
826 "SVGA3D_X8L8V8U8",
827 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
828 },
829 {
830 "SVGA3D_A2W10V10U10",
831 SVGA3D_A2W10V10U10,
832 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
833 1, 1, 4,
834 SVGA3DFORMAT_OP_TEXTURE
835 },
836 {
837 "SVGA3D_ALPHA8",
838 SVGA3D_ALPHA8,
839 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
840 1, 1, 1,
841 SVGA3DFORMAT_OP_TEXTURE |
842 SVGA3DFORMAT_OP_CUBETEXTURE |
843 SVGA3DFORMAT_OP_VOLUMETEXTURE
844 },
845 {
846 "SVGA3D_R_S10E5",
847 SVGA3D_R_S10E5,
848 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
849 1, 1, 2,
850 SVGA3DFORMAT_OP_TEXTURE |
851 SVGA3DFORMAT_OP_VOLUMETEXTURE |
852 SVGA3DFORMAT_OP_CUBETEXTURE |
853 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
854 },
855 {
856 "SVGA3D_R_S23E8",
857 SVGA3D_R_S23E8,
858 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
859 1, 1, 4,
860 SVGA3DFORMAT_OP_TEXTURE |
861 SVGA3DFORMAT_OP_VOLUMETEXTURE |
862 SVGA3DFORMAT_OP_CUBETEXTURE |
863 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
864 },
865 {
866 "SVGA3D_RG_S10E5",
867 SVGA3D_RG_S10E5,
868 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
869 1, 1, 2,
870 SVGA3DFORMAT_OP_TEXTURE |
871 SVGA3DFORMAT_OP_VOLUMETEXTURE |
872 SVGA3DFORMAT_OP_CUBETEXTURE |
873 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
874 },
875 {
876 "SVGA3D_RG_S23E8",
877 SVGA3D_RG_S23E8,
878 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
879 1, 1, 4,
880 SVGA3DFORMAT_OP_TEXTURE |
881 SVGA3DFORMAT_OP_VOLUMETEXTURE |
882 SVGA3DFORMAT_OP_CUBETEXTURE |
883 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
884 },
885 {
886 /*
887 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
888 */
889 "SVGA3D_BUFFER",
890 SVGA3D_BUFFER, 0, 1, 1, 1, 0
891 },
892 {
893 "SVGA3D_Z_D24X8",
894 SVGA3D_Z_D24X8,
895 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
896 1, 1, 4,
897 SVGA3DFORMAT_OP_ZSTENCIL
898 },
899 {
900 "SVGA3D_V16U16",
901 SVGA3D_V16U16,
902 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
903 1, 1, 4,
904 SVGA3DFORMAT_OP_TEXTURE |
905 SVGA3DFORMAT_OP_CUBETEXTURE |
906 SVGA3DFORMAT_OP_VOLUMETEXTURE
907 },
908 {
909 "SVGA3D_G16R16",
910 SVGA3D_G16R16,
911 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
912 1, 1, 4,
913 SVGA3DFORMAT_OP_TEXTURE |
914 SVGA3DFORMAT_OP_CUBETEXTURE |
915 SVGA3DFORMAT_OP_VOLUMETEXTURE |
916 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
917 },
918 {
919 "SVGA3D_A16B16G16R16",
920 SVGA3D_A16B16G16R16,
921 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
922 1, 1, 8,
923 SVGA3DFORMAT_OP_TEXTURE |
924 SVGA3DFORMAT_OP_CUBETEXTURE |
925 SVGA3DFORMAT_OP_VOLUMETEXTURE |
926 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
927 },
928 {
929 "SVGA3D_UYVY",
930 SVGA3D_UYVY,
931 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
932 0, 0, 0, 0
933 },
934 {
935 "SVGA3D_YUY2",
936 SVGA3D_YUY2,
937 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
938 0, 0, 0, 0
939 },
940 {
941 "SVGA3D_NV12",
942 SVGA3D_NV12,
943 SVGA3D_DEVCAP_SURFACEFMT_NV12,
944 0, 0, 0, 0
945 },
946 {
947 "SVGA3D_AYUV",
948 SVGA3D_AYUV,
949 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
950 0, 0, 0, 0
951 },
952 {
953 "SVGA3D_R32G32B32A32_TYPELESS",
954 SVGA3D_R32G32B32A32_TYPELESS,
955 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
956 1, 1, 16, 0
957 },
958 {
959 "SVGA3D_R32G32B32A32_UINT",
960 SVGA3D_R32G32B32A32_UINT,
961 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
962 1, 1, 16, 0
963 },
964 {
965 "SVGA3D_R32G32B32A32_SINT",
966 SVGA3D_R32G32B32A32_SINT,
967 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
968 1, 1, 16, 0
969 },
970 {
971 "SVGA3D_R32G32B32_TYPELESS",
972 SVGA3D_R32G32B32_TYPELESS,
973 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
974 1, 1, 12, 0
975 },
976 {
977 "SVGA3D_R32G32B32_FLOAT",
978 SVGA3D_R32G32B32_FLOAT,
979 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
980 1, 1, 12, 0
981 },
982 {
983 "SVGA3D_R32G32B32_UINT",
984 SVGA3D_R32G32B32_UINT,
985 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
986 1, 1, 12, 0
987 },
988 {
989 "SVGA3D_R32G32B32_SINT",
990 SVGA3D_R32G32B32_SINT,
991 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
992 1, 1, 12, 0
993 },
994 {
995 "SVGA3D_R16G16B16A16_TYPELESS",
996 SVGA3D_R16G16B16A16_TYPELESS,
997 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
998 1, 1, 8, 0
999 },
1000 {
1001 "SVGA3D_R16G16B16A16_UINT",
1002 SVGA3D_R16G16B16A16_UINT,
1003 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
1004 1, 1, 8, 0
1005 },
1006 {
1007 "SVGA3D_R16G16B16A16_SNORM",
1008 SVGA3D_R16G16B16A16_SNORM,
1009 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
1010 1, 1, 8, 0
1011 },
1012 {
1013 "SVGA3D_R16G16B16A16_SINT",
1014 SVGA3D_R16G16B16A16_SINT,
1015 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
1016 1, 1, 8, 0
1017 },
1018 {
1019 "SVGA3D_R32G32_TYPELESS",
1020 SVGA3D_R32G32_TYPELESS,
1021 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
1022 1, 1, 8, 0
1023 },
1024 {
1025 "SVGA3D_R32G32_UINT",
1026 SVGA3D_R32G32_UINT,
1027 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
1028 1, 1, 8, 0
1029 },
1030 {
1031 "SVGA3D_R32G32_SINT",
1032 SVGA3D_R32G32_SINT,
1033 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1034 1, 1, 8,
1035 0
1036 },
1037 {
1038 "SVGA3D_R32G8X24_TYPELESS",
1039 SVGA3D_R32G8X24_TYPELESS,
1040 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1041 1, 1, 8, 0
1042 },
1043 {
1044 "SVGA3D_D32_FLOAT_S8X24_UINT",
1045 SVGA3D_D32_FLOAT_S8X24_UINT,
1046 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
1047 1, 1, 8, 0
1048 },
1049 {
1050 "SVGA3D_R32_FLOAT_X8X24",
1051 SVGA3D_R32_FLOAT_X8X24,
1052 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
1053 1, 1, 8, 0
1054 },
1055 {
1056 "SVGA3D_X32_G8X24_UINT",
1057 SVGA3D_X32_G8X24_UINT,
1058 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
1059 1, 1, 4, 0
1060 },
1061 {
1062 "SVGA3D_R10G10B10A2_TYPELESS",
1063 SVGA3D_R10G10B10A2_TYPELESS,
1064 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1065 1, 1, 4, 0
1066 },
1067 {
1068 "SVGA3D_R10G10B10A2_UINT",
1069 SVGA3D_R10G10B10A2_UINT,
1070 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1071 1, 1, 4, 0
1072 },
1073 {
1074 "SVGA3D_R11G11B10_FLOAT",
1075 SVGA3D_R11G11B10_FLOAT,
1076 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1077 1, 1, 4, 0
1078 },
1079 {
1080 "SVGA3D_R8G8B8A8_TYPELESS",
1081 SVGA3D_R8G8B8A8_TYPELESS,
1082 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1083 1, 1, 4, 0
1084 },
1085 {
1086 "SVGA3D_R8G8B8A8_UNORM",
1087 SVGA3D_R8G8B8A8_UNORM,
1088 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1089 1, 1, 4, 0
1090 },
1091 {
1092 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1093 SVGA3D_R8G8B8A8_UNORM_SRGB,
1094 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1095 1, 1, 4, 0
1096 },
1097 {
1098 "SVGA3D_R8G8B8A8_UINT",
1099 SVGA3D_R8G8B8A8_UINT,
1100 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1101 1, 1, 4, 0
1102 },
1103 {
1104 "SVGA3D_R8G8B8A8_SINT",
1105 SVGA3D_R8G8B8A8_SINT,
1106 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1107 1, 1, 4, 0
1108 },
1109 {
1110 "SVGA3D_R16G16_TYPELESS",
1111 SVGA3D_R16G16_TYPELESS,
1112 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1113 1, 1, 4, 0
1114 },
1115 {
1116 "SVGA3D_R16G16_UINT",
1117 SVGA3D_R16G16_UINT,
1118 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1119 1, 1, 4, 0
1120 },
1121 {
1122 "SVGA3D_R16G16_SINT",
1123 SVGA3D_R16G16_SINT,
1124 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1125 1, 1, 4, 0
1126 },
1127 {
1128 "SVGA3D_R32_TYPELESS",
1129 SVGA3D_R32_TYPELESS,
1130 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1131 1, 1, 4, 0
1132 },
1133 {
1134 "SVGA3D_D32_FLOAT",
1135 SVGA3D_D32_FLOAT,
1136 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
1137 1, 1, 4, 0
1138 },
1139 {
1140 "SVGA3D_R32_UINT",
1141 SVGA3D_R32_UINT,
1142 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1143 1, 1, 4, 0
1144 },
1145 {
1146 "SVGA3D_R32_SINT",
1147 SVGA3D_R32_SINT,
1148 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1149 1, 1, 4, 0
1150 },
1151 {
1152 "SVGA3D_R24G8_TYPELESS",
1153 SVGA3D_R24G8_TYPELESS,
1154 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1155 1, 1, 4, 0
1156 },
1157 {
1158 "SVGA3D_D24_UNORM_S8_UINT",
1159 SVGA3D_D24_UNORM_S8_UINT,
1160 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1161 1, 1, 4, 0
1162 },
1163 {
1164 "SVGA3D_R24_UNORM_X8",
1165 SVGA3D_R24_UNORM_X8,
1166 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1167 1, 1, 4, 0
1168 },
1169 {
1170 "SVGA3D_X24_G8_UINT",
1171 SVGA3D_X24_G8_UINT,
1172 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1173 1, 1, 4, 0
1174 },
1175 {
1176 "SVGA3D_R8G8_TYPELESS",
1177 SVGA3D_R8G8_TYPELESS,
1178 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1179 1, 1, 2, 0
1180 },
1181 {
1182 "SVGA3D_R8G8_UNORM",
1183 SVGA3D_R8G8_UNORM,
1184 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1185 1, 1, 2, 0
1186 },
1187 {
1188 "SVGA3D_R8G8_UINT",
1189 SVGA3D_R8G8_UINT,
1190 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1191 1, 1, 2, 0
1192 },
1193 {
1194 "SVGA3D_R8G8_SINT",
1195 SVGA3D_R8G8_SINT,
1196 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1197 1, 1, 2, 0
1198 },
1199 {
1200 "SVGA3D_R16_TYPELESS",
1201 SVGA3D_R16_TYPELESS,
1202 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1203 1, 1, 2, 0
1204 },
1205 {
1206 "SVGA3D_R16_UNORM",
1207 SVGA3D_R16_UNORM,
1208 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1209 1, 1, 2, 0
1210 },
1211 {
1212 "SVGA3D_R16_UINT",
1213 SVGA3D_R16_UINT,
1214 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1215 1, 1, 2, 0
1216 },
1217 {
1218 "SVGA3D_R16_SNORM",
1219 SVGA3D_R16_SNORM,
1220 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1221 1, 1, 2, 0
1222 },
1223 {
1224 "SVGA3D_R16_SINT",
1225 SVGA3D_R16_SINT,
1226 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1227 1, 1, 2, 0
1228 },
1229 {
1230 "SVGA3D_R8_TYPELESS",
1231 SVGA3D_R8_TYPELESS,
1232 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1233 1, 1, 1, 0
1234 },
1235 {
1236 "SVGA3D_R8_UNORM",
1237 SVGA3D_R8_UNORM,
1238 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1239 1, 1, 1, 0
1240 },
1241 {
1242 "SVGA3D_R8_UINT",
1243 SVGA3D_R8_UINT,
1244 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1245 1, 1, 1, 0
1246 },
1247 {
1248 "SVGA3D_R8_SNORM",
1249 SVGA3D_R8_SNORM,
1250 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1251 1, 1, 1, 0
1252 },
1253 {
1254 "SVGA3D_R8_SINT",
1255 SVGA3D_R8_SINT,
1256 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1257 1, 1, 1, 0
1258 },
1259 {
1260 "SVGA3D_P8",
1261 SVGA3D_P8, 0, 0, 0, 0, 0
1262 },
1263 {
1264 "SVGA3D_R9G9B9E5_SHAREDEXP",
1265 SVGA3D_R9G9B9E5_SHAREDEXP,
1266 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1267 1, 1, 4, 0
1268 },
1269 {
1270 "SVGA3D_R8G8_B8G8_UNORM",
1271 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1272 },
1273 {
1274 "SVGA3D_G8R8_G8B8_UNORM",
1275 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1276 },
1277 {
1278 "SVGA3D_BC1_TYPELESS",
1279 SVGA3D_BC1_TYPELESS,
1280 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1281 4, 4, 8, 0
1282 },
1283 {
1284 "SVGA3D_BC1_UNORM_SRGB",
1285 SVGA3D_BC1_UNORM_SRGB,
1286 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1287 4, 4, 8, 0
1288 },
1289 {
1290 "SVGA3D_BC2_TYPELESS",
1291 SVGA3D_BC2_TYPELESS,
1292 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1293 4, 4, 16, 0
1294 },
1295 {
1296 "SVGA3D_BC2_UNORM_SRGB",
1297 SVGA3D_BC2_UNORM_SRGB,
1298 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1299 4, 4, 16, 0
1300 },
1301 {
1302 "SVGA3D_BC3_TYPELESS",
1303 SVGA3D_BC3_TYPELESS,
1304 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1305 4, 4, 16, 0
1306 },
1307 {
1308 "SVGA3D_BC3_UNORM_SRGB",
1309 SVGA3D_BC3_UNORM_SRGB,
1310 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1311 4, 4, 16, 0
1312 },
1313 {
1314 "SVGA3D_BC4_TYPELESS",
1315 SVGA3D_BC4_TYPELESS,
1316 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1317 4, 4, 8, 0
1318 },
1319 {
1320 "SVGA3D_ATI1",
1321 SVGA3D_ATI1, 0, 0, 0, 0, 0
1322 },
1323 {
1324 "SVGA3D_BC4_SNORM",
1325 SVGA3D_BC4_SNORM,
1326 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1327 4, 4, 8, 0
1328 },
1329 {
1330 "SVGA3D_BC5_TYPELESS",
1331 SVGA3D_BC5_TYPELESS,
1332 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1333 4, 4, 16, 0
1334 },
1335 {
1336 "SVGA3D_ATI2",
1337 SVGA3D_ATI2, 0, 0, 0, 0, 0
1338 },
1339 {
1340 "SVGA3D_BC5_SNORM",
1341 SVGA3D_BC5_SNORM,
1342 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1343 4, 4, 16, 0
1344 },
1345 {
1346 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1347 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1348 },
1349 {
1350 "SVGA3D_B8G8R8A8_TYPELESS",
1351 SVGA3D_B8G8R8A8_TYPELESS,
1352 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1353 1, 1, 4, 0
1354 },
1355 {
1356 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1357 SVGA3D_B8G8R8A8_UNORM_SRGB,
1358 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1359 1, 1, 4, 0
1360 },
1361 {
1362 "SVGA3D_B8G8R8X8_TYPELESS",
1363 SVGA3D_B8G8R8X8_TYPELESS,
1364 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1365 1, 1, 4, 0
1366 },
1367 {
1368 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1369 SVGA3D_B8G8R8X8_UNORM_SRGB,
1370 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1371 1, 1, 4, 0
1372 },
1373 {
1374 "SVGA3D_Z_DF16",
1375 SVGA3D_Z_DF16,
1376 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1377 1, 1, 2, 0
1378 },
1379 {
1380 "SVGA3D_Z_DF24",
1381 SVGA3D_Z_DF24,
1382 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1383 1, 1, 4, 0
1384 },
1385 {
1386 "SVGA3D_Z_D24S8_INT",
1387 SVGA3D_Z_D24S8_INT,
1388 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1389 1, 1, 4, 0
1390 },
1391 {
1392 "SVGA3D_YV12",
1393 SVGA3D_YV12, 0, 0, 0, 0, 0
1394 },
1395 {
1396 "SVGA3D_R32G32B32A32_FLOAT",
1397 SVGA3D_R32G32B32A32_FLOAT,
1398 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1399 1, 1, 16, 0
1400 },
1401 {
1402 "SVGA3D_R16G16B16A16_FLOAT",
1403 SVGA3D_R16G16B16A16_FLOAT,
1404 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1405 1, 1, 8, 0
1406 },
1407 {
1408 "SVGA3D_R16G16B16A16_UNORM",
1409 SVGA3D_R16G16B16A16_UNORM,
1410 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1411 1, 1, 8, 0
1412 },
1413 {
1414 "SVGA3D_R32G32_FLOAT",
1415 SVGA3D_R32G32_FLOAT,
1416 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1417 1, 1, 8, 0
1418 },
1419 {
1420 "SVGA3D_R10G10B10A2_UNORM",
1421 SVGA3D_R10G10B10A2_UNORM,
1422 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1423 1, 1, 4, 0
1424 },
1425 {
1426 "SVGA3D_R8G8B8A8_SNORM",
1427 SVGA3D_R8G8B8A8_SNORM,
1428 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1429 1, 1, 4, 0
1430 },
1431 {
1432 "SVGA3D_R16G16_FLOAT",
1433 SVGA3D_R16G16_FLOAT,
1434 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1435 1, 1, 4, 0
1436 },
1437 {
1438 "SVGA3D_R16G16_UNORM",
1439 SVGA3D_R16G16_UNORM,
1440 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1441 1, 1, 4, 0
1442 },
1443 {
1444 "SVGA3D_R16G16_SNORM",
1445 SVGA3D_R16G16_SNORM,
1446 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1447 1, 1, 4, 0
1448 },
1449 {
1450 "SVGA3D_R32_FLOAT",
1451 SVGA3D_R32_FLOAT,
1452 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1453 1, 1, 4, 0
1454 },
1455 {
1456 "SVGA3D_R8G8_SNORM",
1457 SVGA3D_R8G8_SNORM,
1458 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1459 1, 1, 2, 0
1460 },
1461 {
1462 "SVGA3D_R16_FLOAT",
1463 SVGA3D_R16_FLOAT,
1464 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1465 1, 1, 2, 0
1466 },
1467 {
1468 "SVGA3D_D16_UNORM",
1469 SVGA3D_D16_UNORM,
1470 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1471 1, 1, 2, 0
1472 },
1473 {
1474 "SVGA3D_A8_UNORM",
1475 SVGA3D_A8_UNORM,
1476 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1477 1, 1, 1, 0
1478 },
1479 {
1480 "SVGA3D_BC1_UNORM",
1481 SVGA3D_BC1_UNORM,
1482 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1483 4, 4, 8, 0
1484 },
1485 {
1486 "SVGA3D_BC2_UNORM",
1487 SVGA3D_BC2_UNORM,
1488 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1489 4, 4, 16, 0
1490 },
1491 {
1492 "SVGA3D_BC3_UNORM",
1493 SVGA3D_BC3_UNORM,
1494 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1495 4, 4, 16, 0
1496 },
1497 {
1498 "SVGA3D_B5G6R5_UNORM",
1499 SVGA3D_B5G6R5_UNORM,
1500 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1501 1, 1, 2, 0
1502 },
1503 {
1504 "SVGA3D_B5G5R5A1_UNORM",
1505 SVGA3D_B5G5R5A1_UNORM,
1506 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1507 1, 1, 2, 0
1508 },
1509 {
1510 "SVGA3D_B8G8R8A8_UNORM",
1511 SVGA3D_B8G8R8A8_UNORM,
1512 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1513 1, 1, 4, 0
1514 },
1515 {
1516 "SVGA3D_B8G8R8X8_UNORM",
1517 SVGA3D_B8G8R8X8_UNORM,
1518 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1519 1, 1, 4, 0
1520 },
1521 {
1522 "SVGA3D_BC4_UNORM",
1523 SVGA3D_BC4_UNORM,
1524 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1525 4, 4, 8, 0
1526 },
1527 {
1528 "SVGA3D_BC5_UNORM",
1529 SVGA3D_BC5_UNORM,
1530 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1531 4, 4, 16, 0
1532 }
1533 };
1534
1535 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1536 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1537 SVGA3D_B8G8R8A8_UNORM, 0
1538 };
1539 static const SVGA3dSurfaceFormat compat_r8[] = {
1540 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1541 };
1542 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1543 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1544 };
1545 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1546 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1547 };
1548
1549 static const struct format_compat_entry format_compats[] = {
1550 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1551 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1552 {PIPE_FORMAT_R8_UNORM, compat_r8},
1553 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1554 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1555 };
1556
1557 /**
1558 * Debug only:
1559 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1560 * 2. check that format_conversion_table[i].pformat == i.
1561 */
1562 static void
1563 check_format_tables(void)
1564 {
1565 static boolean first_call = TRUE;
1566
1567 if (first_call) {
1568 unsigned i;
1569
1570 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1571 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1572 assert(format_cap_table[i].format == i);
1573 }
1574
1575 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1576 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1577 assert(format_conversion_table[i].pformat == i);
1578 }
1579
1580 first_call = FALSE;
1581 }
1582 }
1583
1584
1585 /**
1586 * Return string name of an SVGA3dDevCapIndex value.
1587 * For debugging.
1588 */
1589 static const char *
1590 svga_devcap_name(SVGA3dDevCapIndex cap)
1591 {
1592 static const struct debug_named_value devcap_names[] = {
1593 /* Note, we only list the DXFMT devcaps so far */
1594 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1595 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1622 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1623 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1624 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1625 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1626 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1627 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1628 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1629 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1630 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1631 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1632 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1633 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1634 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1635 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1636 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1637 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1638 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1639 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1640 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1641 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1642 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1643 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1644 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1645 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1646 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1647 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1648 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1649 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1650 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1651 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1652 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1653 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1654 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1655 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1656 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1657 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1658 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1659 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1660 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1661 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1662 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1663 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1664 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1665 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1666 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1667 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1668 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1669 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1670 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1671 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1672 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1673 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1674 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1675 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1676 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1677 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1678 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1679 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1680 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1681 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1682 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1683 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1684 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1685 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1686 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1687 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1688 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1689 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1690 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1691 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1692 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1693 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1694 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1695 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1696 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1697 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1698 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1699 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1700 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1701 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1702 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1703 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1704 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1705 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1706 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1707 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1708 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1709 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1710 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1711 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1712 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1713 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1714 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1715 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1716 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1717 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1718 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1719 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1720 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1721 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1722 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1723 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1724 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1725 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1726 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1727 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1728 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1729 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1730 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1731 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1732 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1733 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1734 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1735 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1736 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1737 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1738 DEBUG_NAMED_VALUE_END,
1739 };
1740 return debug_dump_enum(devcap_names, cap);
1741 }
1742
1743
1744 /**
1745 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1746 * For debugging.
1747 */
1748 static const char *
1749 svga_devcap_format_flags(unsigned flags)
1750 {
1751 static const struct debug_named_value devcap_flags[] = {
1752 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1753 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1754 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1755 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1756 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1757 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1758 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1759 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1760 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1761 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1762 DEBUG_NAMED_VALUE_END
1763 };
1764
1765 return debug_dump_flags(devcap_flags, flags);
1766 }
1767
1768
1769 /*
1770 * Get format capabilities from the host. It takes in consideration
1771 * deprecated/unsupported formats, and formats which are implicitely assumed to
1772 * be supported when the host does not provide an explicit capability entry.
1773 */
1774 void
1775 svga_get_format_cap(struct svga_screen *ss,
1776 SVGA3dSurfaceFormat format,
1777 SVGA3dSurfaceFormatCaps *caps)
1778 {
1779 struct svga_winsys_screen *sws = ss->sws;
1780 SVGA3dDevCapResult result;
1781 const struct format_cap *entry;
1782
1783 #ifdef DEBUG
1784 check_format_tables();
1785 #else
1786 (void) check_format_tables;
1787 #endif
1788
1789 assert(format < ARRAY_SIZE(format_cap_table));
1790 entry = &format_cap_table[format];
1791 assert(entry->format == format);
1792
1793 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1794 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1795 caps->value = result.u;
1796 } else {
1797 /* Implicitly advertised format -- use default caps */
1798 caps->value = entry->defaultOperations;
1799 }
1800 }
1801
1802
1803 /*
1804 * Get DX format capabilities from VGPU10 device.
1805 */
1806 static void
1807 svga_get_dx_format_cap(struct svga_screen *ss,
1808 SVGA3dSurfaceFormat format,
1809 SVGA3dDevCapResult *caps)
1810 {
1811 struct svga_winsys_screen *sws = ss->sws;
1812 const struct format_cap *entry;
1813
1814 #ifdef DEBUG
1815 check_format_tables();
1816 #else
1817 (void) check_format_tables;
1818 #endif
1819
1820 assert(sws->have_vgpu10);
1821 assert(format < ARRAY_SIZE(format_cap_table));
1822 entry = &format_cap_table[format];
1823 assert(entry->format == format);
1824 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1825
1826 caps->u = 0;
1827 if (entry->devcap) {
1828 sws->get_cap(sws, entry->devcap, caps);
1829
1830 /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1831 * these formats but does not advertise the devcap.
1832 * So enable this bit here.
1833 */
1834 if (!sws->have_sm4_1 &&
1835 (format == SVGA3D_R32_FLOAT_X8X24 ||
1836 format == SVGA3D_R24_UNORM_X8)) {
1837 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1838 }
1839 }
1840
1841 if (0) {
1842 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1843 svga_format_name(format),
1844 svga_devcap_name(entry->devcap),
1845 caps->u,
1846 svga_devcap_format_flags(caps->u));
1847 }
1848 }
1849
1850
1851 void
1852 svga_format_size(SVGA3dSurfaceFormat format,
1853 unsigned *block_width,
1854 unsigned *block_height,
1855 unsigned *bytes_per_block)
1856 {
1857 assert(format < ARRAY_SIZE(format_cap_table));
1858 *block_width = format_cap_table[format].block_width;
1859 *block_height = format_cap_table[format].block_height;
1860 *bytes_per_block = format_cap_table[format].block_bytes;
1861 /* Make sure the table entry was valid */
1862 if (*block_width == 0)
1863 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1864 assert(*block_width);
1865 assert(*block_height);
1866 assert(*bytes_per_block);
1867 }
1868
1869
1870 const char *
1871 svga_format_name(SVGA3dSurfaceFormat format)
1872 {
1873 assert(format < ARRAY_SIZE(format_cap_table));
1874 return format_cap_table[format].name;
1875 }
1876
1877
1878 /**
1879 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1880 */
1881 boolean
1882 svga_format_is_integer(SVGA3dSurfaceFormat format)
1883 {
1884 switch (format) {
1885 case SVGA3D_R32G32B32A32_SINT:
1886 case SVGA3D_R32G32B32_SINT:
1887 case SVGA3D_R32G32_SINT:
1888 case SVGA3D_R32_SINT:
1889 case SVGA3D_R16G16B16A16_SINT:
1890 case SVGA3D_R16G16_SINT:
1891 case SVGA3D_R16_SINT:
1892 case SVGA3D_R8G8B8A8_SINT:
1893 case SVGA3D_R8G8_SINT:
1894 case SVGA3D_R8_SINT:
1895 case SVGA3D_R32G32B32A32_UINT:
1896 case SVGA3D_R32G32B32_UINT:
1897 case SVGA3D_R32G32_UINT:
1898 case SVGA3D_R32_UINT:
1899 case SVGA3D_R16G16B16A16_UINT:
1900 case SVGA3D_R16G16_UINT:
1901 case SVGA3D_R16_UINT:
1902 case SVGA3D_R8G8B8A8_UINT:
1903 case SVGA3D_R8G8_UINT:
1904 case SVGA3D_R8_UINT:
1905 case SVGA3D_R10G10B10A2_UINT:
1906 return TRUE;
1907 default:
1908 return FALSE;
1909 }
1910 }
1911
1912 boolean
1913 svga_format_support_gen_mips(enum pipe_format format)
1914 {
1915 assert(format < ARRAY_SIZE(format_conversion_table));
1916 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1917 }
1918
1919
1920 /**
1921 * Given a texture format, return the expected data type returned from
1922 * the texture sampler. For example, UNORM8 formats return floating point
1923 * values while SINT formats returned signed integer values.
1924 * Note: this function could be moved into the gallum u_format.[ch] code
1925 * if it's useful to anyone else.
1926 */
1927 enum tgsi_return_type
1928 svga_get_texture_datatype(enum pipe_format format)
1929 {
1930 const struct util_format_description *desc = util_format_description(format);
1931 enum tgsi_return_type t;
1932
1933 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1934 if (util_format_is_depth_or_stencil(format)) {
1935 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1936 }
1937 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1938 t = TGSI_RETURN_TYPE_FLOAT;
1939 }
1940 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1941 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1942 }
1943 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1944 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1945 }
1946 else {
1947 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1948 t = TGSI_RETURN_TYPE_FLOAT;
1949 }
1950 }
1951 else {
1952 /* compressed format, shared exponent format, etc. */
1953 switch (format) {
1954 case PIPE_FORMAT_DXT1_RGB:
1955 case PIPE_FORMAT_DXT1_RGBA:
1956 case PIPE_FORMAT_DXT3_RGBA:
1957 case PIPE_FORMAT_DXT5_RGBA:
1958 case PIPE_FORMAT_DXT1_SRGB:
1959 case PIPE_FORMAT_DXT1_SRGBA:
1960 case PIPE_FORMAT_DXT3_SRGBA:
1961 case PIPE_FORMAT_DXT5_SRGBA:
1962 case PIPE_FORMAT_RGTC1_UNORM:
1963 case PIPE_FORMAT_RGTC2_UNORM:
1964 case PIPE_FORMAT_LATC1_UNORM:
1965 case PIPE_FORMAT_LATC2_UNORM:
1966 case PIPE_FORMAT_ETC1_RGB8:
1967 t = TGSI_RETURN_TYPE_UNORM;
1968 break;
1969 case PIPE_FORMAT_RGTC1_SNORM:
1970 case PIPE_FORMAT_RGTC2_SNORM:
1971 case PIPE_FORMAT_LATC1_SNORM:
1972 case PIPE_FORMAT_LATC2_SNORM:
1973 case PIPE_FORMAT_R10G10B10X2_SNORM:
1974 t = TGSI_RETURN_TYPE_SNORM;
1975 break;
1976 case PIPE_FORMAT_R11G11B10_FLOAT:
1977 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1978 t = TGSI_RETURN_TYPE_FLOAT;
1979 break;
1980 default:
1981 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1982 t = TGSI_RETURN_TYPE_FLOAT;
1983 }
1984 }
1985
1986 return t;
1987 }
1988
1989
1990 /**
1991 * Given an svga context, return true iff there are currently any integer color
1992 * buffers attached to the framebuffer.
1993 */
1994 boolean
1995 svga_has_any_integer_cbufs(const struct svga_context *svga)
1996 {
1997 unsigned i;
1998 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1999 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
2000
2001 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
2002 return TRUE;
2003 }
2004 }
2005 return FALSE;
2006 }
2007
2008
2009 /**
2010 * Given an SVGA format, return the corresponding typeless format.
2011 * If there is no typeless format, return the format unchanged.
2012 */
2013 SVGA3dSurfaceFormat
2014 svga_typeless_format(SVGA3dSurfaceFormat format)
2015 {
2016 switch (format) {
2017 case SVGA3D_R32G32B32A32_UINT:
2018 case SVGA3D_R32G32B32A32_SINT:
2019 case SVGA3D_R32G32B32A32_FLOAT:
2020 return SVGA3D_R32G32B32A32_TYPELESS;
2021 case SVGA3D_R32G32B32_FLOAT:
2022 case SVGA3D_R32G32B32_UINT:
2023 case SVGA3D_R32G32B32_SINT:
2024 return SVGA3D_R32G32B32_TYPELESS;
2025 case SVGA3D_R16G16B16A16_UINT:
2026 case SVGA3D_R16G16B16A16_UNORM:
2027 case SVGA3D_R16G16B16A16_SNORM:
2028 case SVGA3D_R16G16B16A16_SINT:
2029 case SVGA3D_R16G16B16A16_FLOAT:
2030 return SVGA3D_R16G16B16A16_TYPELESS;
2031 case SVGA3D_R32G32_UINT:
2032 case SVGA3D_R32G32_SINT:
2033 case SVGA3D_R32G32_FLOAT:
2034 return SVGA3D_R32G32_TYPELESS;
2035 case SVGA3D_D32_FLOAT_S8X24_UINT:
2036 case SVGA3D_X32_G8X24_UINT:
2037 case SVGA3D_R32G8X24_TYPELESS:
2038 return SVGA3D_R32G8X24_TYPELESS;
2039 case SVGA3D_R10G10B10A2_UINT:
2040 case SVGA3D_R10G10B10A2_UNORM:
2041 return SVGA3D_R10G10B10A2_TYPELESS;
2042 case SVGA3D_R8G8B8A8_UNORM:
2043 case SVGA3D_R8G8B8A8_SNORM:
2044 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2045 case SVGA3D_R8G8B8A8_UINT:
2046 case SVGA3D_R8G8B8A8_SINT:
2047 case SVGA3D_R8G8B8A8_TYPELESS:
2048 return SVGA3D_R8G8B8A8_TYPELESS;
2049 case SVGA3D_R16G16_UINT:
2050 case SVGA3D_R16G16_SINT:
2051 case SVGA3D_R16G16_UNORM:
2052 case SVGA3D_R16G16_SNORM:
2053 case SVGA3D_R16G16_FLOAT:
2054 return SVGA3D_R16G16_TYPELESS;
2055 case SVGA3D_D32_FLOAT:
2056 case SVGA3D_R32_FLOAT:
2057 case SVGA3D_R32_UINT:
2058 case SVGA3D_R32_SINT:
2059 case SVGA3D_R32_TYPELESS:
2060 return SVGA3D_R32_TYPELESS;
2061 case SVGA3D_D24_UNORM_S8_UINT:
2062 case SVGA3D_R24G8_TYPELESS:
2063 return SVGA3D_R24G8_TYPELESS;
2064 case SVGA3D_X24_G8_UINT:
2065 return SVGA3D_R24_UNORM_X8;
2066 case SVGA3D_R8G8_UNORM:
2067 case SVGA3D_R8G8_SNORM:
2068 case SVGA3D_R8G8_UINT:
2069 case SVGA3D_R8G8_SINT:
2070 return SVGA3D_R8G8_TYPELESS;
2071 case SVGA3D_D16_UNORM:
2072 case SVGA3D_R16_UNORM:
2073 case SVGA3D_R16_UINT:
2074 case SVGA3D_R16_SNORM:
2075 case SVGA3D_R16_SINT:
2076 case SVGA3D_R16_FLOAT:
2077 case SVGA3D_R16_TYPELESS:
2078 return SVGA3D_R16_TYPELESS;
2079 case SVGA3D_R8_UNORM:
2080 case SVGA3D_R8_UINT:
2081 case SVGA3D_R8_SNORM:
2082 case SVGA3D_R8_SINT:
2083 return SVGA3D_R8_TYPELESS;
2084 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2085 case SVGA3D_B8G8R8A8_UNORM:
2086 case SVGA3D_B8G8R8A8_TYPELESS:
2087 return SVGA3D_B8G8R8A8_TYPELESS;
2088 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2089 case SVGA3D_B8G8R8X8_UNORM:
2090 case SVGA3D_B8G8R8X8_TYPELESS:
2091 return SVGA3D_B8G8R8X8_TYPELESS;
2092 case SVGA3D_BC1_UNORM:
2093 case SVGA3D_BC1_UNORM_SRGB:
2094 case SVGA3D_BC1_TYPELESS:
2095 return SVGA3D_BC1_TYPELESS;
2096 case SVGA3D_BC2_UNORM:
2097 case SVGA3D_BC2_UNORM_SRGB:
2098 case SVGA3D_BC2_TYPELESS:
2099 return SVGA3D_BC2_TYPELESS;
2100 case SVGA3D_BC3_UNORM:
2101 case SVGA3D_BC3_UNORM_SRGB:
2102 case SVGA3D_BC3_TYPELESS:
2103 return SVGA3D_BC3_TYPELESS;
2104 case SVGA3D_BC4_UNORM:
2105 case SVGA3D_BC4_SNORM:
2106 return SVGA3D_BC4_TYPELESS;
2107 case SVGA3D_BC5_UNORM:
2108 case SVGA3D_BC5_SNORM:
2109 return SVGA3D_BC5_TYPELESS;
2110
2111 /* Special cases (no corresponding _TYPELESS formats) */
2112 case SVGA3D_A8_UNORM:
2113 case SVGA3D_B5G5R5A1_UNORM:
2114 case SVGA3D_B5G6R5_UNORM:
2115 case SVGA3D_R11G11B10_FLOAT:
2116 case SVGA3D_R9G9B9E5_SHAREDEXP:
2117 return format;
2118 default:
2119 debug_printf("Unexpected format %s in %s\n",
2120 svga_format_name(format), __FUNCTION__);
2121 return format;
2122 }
2123 }
2124
2125
2126 /**
2127 * Given a surface format, return the corresponding format to use for
2128 * a texture sampler. In most cases, it's the format unchanged, but there
2129 * are some special cases.
2130 */
2131 SVGA3dSurfaceFormat
2132 svga_sampler_format(SVGA3dSurfaceFormat format)
2133 {
2134 switch (format) {
2135 case SVGA3D_D16_UNORM:
2136 return SVGA3D_R16_UNORM;
2137 case SVGA3D_D24_UNORM_S8_UINT:
2138 return SVGA3D_R24_UNORM_X8;
2139 case SVGA3D_D32_FLOAT:
2140 return SVGA3D_R32_FLOAT;
2141 case SVGA3D_D32_FLOAT_S8X24_UINT:
2142 return SVGA3D_R32_FLOAT_X8X24;
2143 default:
2144 return format;
2145 }
2146 }
2147
2148
2149 /**
2150 * Is the given format an uncompressed snorm format?
2151 */
2152 bool
2153 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2154 {
2155 switch (format) {
2156 case SVGA3D_R8G8B8A8_SNORM:
2157 case SVGA3D_R8G8_SNORM:
2158 case SVGA3D_R8_SNORM:
2159 case SVGA3D_R16G16B16A16_SNORM:
2160 case SVGA3D_R16G16_SNORM:
2161 case SVGA3D_R16_SNORM:
2162 return true;
2163 default:
2164 return false;
2165 }
2166 }
2167
2168
2169 bool
2170 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2171 {
2172 switch (format) {
2173 case SVGA3D_R32G32B32A32_TYPELESS:
2174 case SVGA3D_R32G32B32_TYPELESS:
2175 case SVGA3D_R16G16B16A16_TYPELESS:
2176 case SVGA3D_R32G32_TYPELESS:
2177 case SVGA3D_R32G8X24_TYPELESS:
2178 case SVGA3D_R10G10B10A2_TYPELESS:
2179 case SVGA3D_R8G8B8A8_TYPELESS:
2180 case SVGA3D_R16G16_TYPELESS:
2181 case SVGA3D_R32_TYPELESS:
2182 case SVGA3D_R24G8_TYPELESS:
2183 case SVGA3D_R8G8_TYPELESS:
2184 case SVGA3D_R16_TYPELESS:
2185 case SVGA3D_R8_TYPELESS:
2186 case SVGA3D_BC1_TYPELESS:
2187 case SVGA3D_BC2_TYPELESS:
2188 case SVGA3D_BC3_TYPELESS:
2189 case SVGA3D_BC4_TYPELESS:
2190 case SVGA3D_BC5_TYPELESS:
2191 case SVGA3D_B8G8R8A8_TYPELESS:
2192 case SVGA3D_B8G8R8X8_TYPELESS:
2193 return true;
2194 default:
2195 return false;
2196 }
2197 }
2198
2199
2200 /**
2201 * \brief Can we import a surface with a given SVGA3D format as a texture?
2202 *
2203 * \param ss[in] pointer to the svga screen.
2204 * \param pformat[in] pipe format of the local texture.
2205 * \param sformat[in] svga3d format of the imported surface.
2206 * \param bind[in] bind flags of the imported texture.
2207 * \param verbose[in] Print out incompatibilities in debug mode.
2208 */
2209 bool
2210 svga_format_is_shareable(const struct svga_screen *ss,
2211 enum pipe_format pformat,
2212 SVGA3dSurfaceFormat sformat,
2213 unsigned bind,
2214 bool verbose)
2215 {
2216 SVGA3dSurfaceFormat default_format =
2217 svga_translate_format(ss, pformat, bind);
2218 int i;
2219
2220 if (default_format == SVGA3D_FORMAT_INVALID)
2221 return false;
2222 if (default_format == sformat)
2223 return true;
2224
2225 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2226 if (format_compats[i].pformat == pformat) {
2227 const SVGA3dSurfaceFormat *compat_format =
2228 format_compats[i].compat_format;
2229 while (*compat_format != 0) {
2230 if (*compat_format == sformat)
2231 return true;
2232 compat_format++;
2233 }
2234 }
2235 }
2236
2237 if (verbose) {
2238 debug_printf("Incompatible imported surface format.\n");
2239 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2240 svga_format_name(default_format),
2241 svga_format_name(sformat));
2242 }
2243
2244 return false;
2245 }
2246
2247
2248 /**
2249 * Return the sRGB format which corresponds to the given (linear) format.
2250 * If there's no such sRGB format, return the format as-is.
2251 */
2252 SVGA3dSurfaceFormat
2253 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2254 {
2255 switch (format) {
2256 case SVGA3D_R8G8B8A8_UNORM:
2257 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2258 case SVGA3D_BC1_UNORM:
2259 return SVGA3D_BC1_UNORM_SRGB;
2260 case SVGA3D_BC2_UNORM:
2261 return SVGA3D_BC2_UNORM_SRGB;
2262 case SVGA3D_BC3_UNORM:
2263 return SVGA3D_BC3_UNORM_SRGB;
2264 case SVGA3D_B8G8R8A8_UNORM:
2265 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2266 case SVGA3D_B8G8R8X8_UNORM:
2267 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2268 default:
2269 return format;
2270 }
2271 }
2272
2273
2274 /**
2275 * Implement pipe_screen::is_format_supported().
2276 * \param bindings bitmask of PIPE_BIND_x flags
2277 */
2278 bool
2279 svga_is_format_supported(struct pipe_screen *screen,
2280 enum pipe_format format,
2281 enum pipe_texture_target target,
2282 unsigned sample_count,
2283 unsigned storage_sample_count,
2284 unsigned bindings)
2285 {
2286 struct svga_screen *ss = svga_screen(screen);
2287 SVGA3dSurfaceFormat svga_format;
2288 SVGA3dSurfaceFormatCaps caps;
2289 SVGA3dSurfaceFormatCaps mask;
2290
2291 assert(bindings);
2292 assert(!ss->sws->have_vgpu10);
2293
2294 /* Multisamples is not supported in VGPU9 device */
2295 if (sample_count > 1)
2296 return false;
2297
2298 svga_format = svga_translate_format(ss, format, bindings);
2299 if (svga_format == SVGA3D_FORMAT_INVALID) {
2300 return false;
2301 }
2302
2303 if (util_format_is_srgb(format) &&
2304 (bindings & PIPE_BIND_DISPLAY_TARGET)) {
2305 /* We only support sRGB rendering with vgpu10 */
2306 return false;
2307 }
2308
2309 /*
2310 * Override host capabilities, so that we end up with the same
2311 * visuals for all virtual hardware implementations.
2312 */
2313 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2314 switch (svga_format) {
2315 case SVGA3D_A8R8G8B8:
2316 case SVGA3D_X8R8G8B8:
2317 case SVGA3D_R5G6B5:
2318 break;
2319
2320 /* VGPU10 formats */
2321 case SVGA3D_B8G8R8A8_UNORM:
2322 case SVGA3D_B8G8R8X8_UNORM:
2323 case SVGA3D_B5G6R5_UNORM:
2324 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2325 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2326 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2327 break;
2328
2329 /* Often unsupported/problematic. This means we end up with the same
2330 * visuals for all virtual hardware implementations.
2331 */
2332 case SVGA3D_A4R4G4B4:
2333 case SVGA3D_A1R5G5B5:
2334 return false;
2335
2336 default:
2337 return false;
2338 }
2339 }
2340
2341 /*
2342 * Query the host capabilities.
2343 */
2344 svga_get_format_cap(ss, svga_format, &caps);
2345
2346 if (bindings & PIPE_BIND_RENDER_TARGET) {
2347 /* Check that the color surface is blendable, unless it's an
2348 * integer format.
2349 */
2350 if (!svga_format_is_integer(svga_format) &&
2351 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2352 return false;
2353 }
2354 }
2355
2356 mask.value = 0;
2357 if (bindings & PIPE_BIND_RENDER_TARGET)
2358 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2359
2360 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2361 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2362
2363 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2364 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2365
2366 if (target == PIPE_TEXTURE_CUBE)
2367 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2368 else if (target == PIPE_TEXTURE_3D)
2369 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2370
2371 return (caps.value & mask.value) == mask.value;
2372 }
2373
2374
2375 /**
2376 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2377 * \param bindings bitmask of PIPE_BIND_x flags
2378 */
2379 bool
2380 svga_is_dx_format_supported(struct pipe_screen *screen,
2381 enum pipe_format format,
2382 enum pipe_texture_target target,
2383 unsigned sample_count,
2384 unsigned storage_sample_count,
2385 unsigned bindings)
2386 {
2387 struct svga_screen *ss = svga_screen(screen);
2388 SVGA3dSurfaceFormat svga_format;
2389 SVGA3dDevCapResult caps;
2390 unsigned int mask = 0;
2391
2392 assert(bindings);
2393 assert(ss->sws->have_vgpu10);
2394
2395 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2396 return false;
2397
2398 if (sample_count > 1) {
2399 /* In ms_samples, if bit N is set it means that we support
2400 * multisample with N+1 samples per pixel.
2401 */
2402 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2403 return false;
2404 }
2405 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2406 }
2407
2408 /*
2409 * For VGPU10 vertex formats, skip querying host capabilities
2410 */
2411
2412 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2413 SVGA3dSurfaceFormat svga_format;
2414 unsigned flags;
2415 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2416 return svga_format != SVGA3D_FORMAT_INVALID;
2417 }
2418
2419 svga_format = svga_translate_format(ss, format, bindings);
2420 if (svga_format == SVGA3D_FORMAT_INVALID) {
2421 return false;
2422 }
2423
2424 /*
2425 * Override host capabilities, so that we end up with the same
2426 * visuals for all virtual hardware implementations.
2427 */
2428 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2429 switch (svga_format) {
2430 case SVGA3D_A8R8G8B8:
2431 case SVGA3D_X8R8G8B8:
2432 case SVGA3D_R5G6B5:
2433 break;
2434
2435 /* VGPU10 formats */
2436 case SVGA3D_B8G8R8A8_UNORM:
2437 case SVGA3D_B8G8R8X8_UNORM:
2438 case SVGA3D_B5G6R5_UNORM:
2439 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2440 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2441 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2442 break;
2443
2444 /* Often unsupported/problematic. This means we end up with the same
2445 * visuals for all virtual hardware implementations.
2446 */
2447 case SVGA3D_A4R4G4B4:
2448 case SVGA3D_A1R5G5B5:
2449 return false;
2450
2451 default:
2452 return false;
2453 }
2454 }
2455
2456 /*
2457 * Query the host capabilities.
2458 */
2459 svga_get_dx_format_cap(ss, svga_format, &caps);
2460
2461 if (bindings & PIPE_BIND_RENDER_TARGET) {
2462 /* Check that the color surface is blendable, unless it's an
2463 * integer format.
2464 */
2465 if (!(svga_format_is_integer(svga_format) ||
2466 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2467 return false;
2468 }
2469 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2470 }
2471
2472 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2473 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2474
2475 switch (target) {
2476 case PIPE_TEXTURE_3D:
2477 mask |= SVGA3D_DXFMT_VOLUME;
2478 break;
2479 case PIPE_TEXTURE_1D_ARRAY:
2480 case PIPE_TEXTURE_2D_ARRAY:
2481 case PIPE_TEXTURE_CUBE_ARRAY:
2482 mask |= SVGA3D_DXFMT_ARRAY;
2483 break;
2484 default:
2485 break;
2486 }
2487
2488 /* Is the format supported for rendering */
2489 if ((caps.u & mask) != mask)
2490 return false;
2491
2492 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2493 SVGA3dSurfaceFormat sampler_format;
2494
2495 /* Get the sampler view format */
2496 sampler_format = svga_sampler_format(svga_format);
2497 if (sampler_format != svga_format) {
2498 caps.u = 0;
2499 svga_get_dx_format_cap(ss, sampler_format, &caps);
2500 mask &= SVGA3D_DXFMT_VOLUME;
2501 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2502 if ((caps.u & mask) != mask)
2503 return false;
2504 }
2505 }
2506
2507 return true;
2508 }