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svga: add SVGA_NO_LOGGING env var (v2)
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
44 unsigned flags;
45 };
46
47 struct format_compat_entry
48 {
49 enum pipe_format pformat;
50 const SVGA3dSurfaceFormat *compat_format;
51 };
52
53
54 /**
55 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
56 * Note: the table is ordered according to PIPE_FORMAT_x order.
57 */
58 static const struct vgpu10_format_entry format_conversion_table[] =
59 {
60 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
61 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
66 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
67 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
69 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
70 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
71 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X},
72 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
73 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
74 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
75 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
77 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
78 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
80 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
81 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
83 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
84 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
85 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
86 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
87 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
90 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
91 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
92 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
93 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
94 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
95 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
98 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
99 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
100 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
101 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
102 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
103 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
104 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
105 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
106 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
107 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
108 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
109 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
110 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
111 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
112 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
113 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
114 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
115 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
116 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
117 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
118 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
119 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
120 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
121 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
122 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
123 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
124 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
125 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
126 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
127 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
128 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
129 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
130 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
131 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
132 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
133 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
134 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
136 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
137 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
138 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
139 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
140 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
141 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
144 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
145 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
146 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
147 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
148 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
149 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
150 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
153 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
154 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
156 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
157 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
160 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
161 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
162 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
163 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
164 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
165 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
166 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
167 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
168 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
169 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
170 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
171 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
172 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
179 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
180 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
181 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
182 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
185 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
186 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
187 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
193 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
202 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
203 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
204 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
217 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
218 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
219 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
220 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
221 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
222 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
223 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
224 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
228 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
229 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
230 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
231 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
232 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
233 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
234 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
235 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
236 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
237 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
238 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
239 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
240 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
241 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
242 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
243 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
244 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
245 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
246 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
247 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
248 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
249 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
250 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
251 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
252 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
253 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
254 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
255 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
256 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
258 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
259 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
260 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
262 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
263 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
264 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
265 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
266 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
267 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
268 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
269 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
270 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
271 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
272 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
273 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
274 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
275 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
276 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
277 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
278 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
279 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
280 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
281 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
282 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
283 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
284 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
285 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
286 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
309 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
315 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
364 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
365 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
366 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
367 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
368 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
369 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
370 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
371 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
372 { PIPE_FORMAT_A4B4G4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
373 { PIPE_FORMAT_R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
374 { PIPE_FORMAT_A8L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
375 { PIPE_FORMAT_G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
376 { PIPE_FORMAT_A8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
377 { PIPE_FORMAT_X8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
378 { PIPE_FORMAT_ATC_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
379 { PIPE_FORMAT_ATC_RGBA_EXPLICIT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
380 { PIPE_FORMAT_ATC_RGBA_INTERPOLATED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
381 };
382
383
384 /**
385 * Translate a gallium vertex format to a vgpu10 vertex format.
386 * Also, return any special vertex format flags.
387 */
388 void
389 svga_translate_vertex_format_vgpu10(enum pipe_format format,
390 SVGA3dSurfaceFormat *svga_format,
391 unsigned *vf_flags)
392 {
393 assert(format < ARRAY_SIZE(format_conversion_table));
394 if (format >= ARRAY_SIZE(format_conversion_table)) {
395 format = PIPE_FORMAT_NONE;
396 }
397 *svga_format = format_conversion_table[format].vertex_format;
398 *vf_flags = format_conversion_table[format].flags;
399 }
400
401
402 /**
403 * Translate a gallium pixel format to a vgpu10 format
404 * to be used in a shader resource view for a texture buffer.
405 * Also return any special texture format flags such as
406 * any special swizzle mask.
407 */
408 void
409 svga_translate_texture_buffer_view_format(enum pipe_format format,
410 SVGA3dSurfaceFormat *svga_format,
411 unsigned *tf_flags)
412 {
413 assert(format < ARRAY_SIZE(format_conversion_table));
414 if (format >= ARRAY_SIZE(format_conversion_table)) {
415 format = PIPE_FORMAT_NONE;
416 }
417 *svga_format = format_conversion_table[format].view_format;
418 *tf_flags = format_conversion_table[format].flags;
419 }
420
421
422 /**
423 * Translate a gallium scanout format to a svga format valid
424 * for screen target surface.
425 */
426 static SVGA3dSurfaceFormat
427 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
428 {
429 switch (format) {
430 case PIPE_FORMAT_B8G8R8A8_UNORM:
431 return SVGA3D_B8G8R8A8_UNORM;
432 case PIPE_FORMAT_B8G8R8X8_UNORM:
433 return SVGA3D_B8G8R8X8_UNORM;
434 case PIPE_FORMAT_B5G6R5_UNORM:
435 return SVGA3D_R5G6B5;
436 case PIPE_FORMAT_B5G5R5A1_UNORM:
437 return SVGA3D_A1R5G5B5;
438 default:
439 debug_printf("Invalid format %s specified for screen target\n",
440 svga_format_name(format));
441 return SVGA3D_FORMAT_INVALID;
442 }
443 }
444
445 /*
446 * Translate from gallium format to SVGA3D format.
447 */
448 SVGA3dSurfaceFormat
449 svga_translate_format(const struct svga_screen *ss,
450 enum pipe_format format,
451 unsigned bind)
452 {
453 if (ss->sws->have_vgpu10) {
454 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
455 return format_conversion_table[format].vertex_format;
456 }
457 else if (bind & PIPE_BIND_SCANOUT) {
458 return svga_translate_screen_target_format_vgpu10(format);
459 }
460 else {
461 return format_conversion_table[format].pixel_format;
462 }
463 }
464
465 switch(format) {
466 case PIPE_FORMAT_B8G8R8A8_UNORM:
467 return SVGA3D_A8R8G8B8;
468 case PIPE_FORMAT_B8G8R8X8_UNORM:
469 return SVGA3D_X8R8G8B8;
470
471 /* sRGB required for GL2.1 */
472 case PIPE_FORMAT_B8G8R8A8_SRGB:
473 return SVGA3D_A8R8G8B8;
474 case PIPE_FORMAT_DXT1_SRGB:
475 case PIPE_FORMAT_DXT1_SRGBA:
476 return SVGA3D_DXT1;
477 case PIPE_FORMAT_DXT3_SRGBA:
478 return SVGA3D_DXT3;
479 case PIPE_FORMAT_DXT5_SRGBA:
480 return SVGA3D_DXT5;
481
482 case PIPE_FORMAT_B5G6R5_UNORM:
483 return SVGA3D_R5G6B5;
484 case PIPE_FORMAT_B5G5R5A1_UNORM:
485 return SVGA3D_A1R5G5B5;
486 case PIPE_FORMAT_B4G4R4A4_UNORM:
487 return SVGA3D_A4R4G4B4;
488
489 case PIPE_FORMAT_R16G16B16A16_UNORM:
490 return SVGA3D_A16B16G16R16;
491
492 case PIPE_FORMAT_Z16_UNORM:
493 assert(!ss->sws->have_vgpu10);
494 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
495 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
496 assert(!ss->sws->have_vgpu10);
497 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
498 case PIPE_FORMAT_X8Z24_UNORM:
499 assert(!ss->sws->have_vgpu10);
500 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
501
502 case PIPE_FORMAT_A8_UNORM:
503 return SVGA3D_ALPHA8;
504 case PIPE_FORMAT_L8_UNORM:
505 return SVGA3D_LUMINANCE8;
506
507 case PIPE_FORMAT_DXT1_RGB:
508 case PIPE_FORMAT_DXT1_RGBA:
509 return SVGA3D_DXT1;
510 case PIPE_FORMAT_DXT3_RGBA:
511 return SVGA3D_DXT3;
512 case PIPE_FORMAT_DXT5_RGBA:
513 return SVGA3D_DXT5;
514
515 /* Float formats (only 1, 2 and 4-component formats supported) */
516 case PIPE_FORMAT_R32_FLOAT:
517 return SVGA3D_R_S23E8;
518 case PIPE_FORMAT_R32G32_FLOAT:
519 return SVGA3D_RG_S23E8;
520 case PIPE_FORMAT_R32G32B32A32_FLOAT:
521 return SVGA3D_ARGB_S23E8;
522 case PIPE_FORMAT_R16_FLOAT:
523 return SVGA3D_R_S10E5;
524 case PIPE_FORMAT_R16G16_FLOAT:
525 return SVGA3D_RG_S10E5;
526 case PIPE_FORMAT_R16G16B16A16_FLOAT:
527 return SVGA3D_ARGB_S10E5;
528
529 case PIPE_FORMAT_Z32_UNORM:
530 /* SVGA3D_Z_D32 is not yet unsupported */
531 /* fall-through */
532 default:
533 return SVGA3D_FORMAT_INVALID;
534 }
535 }
536
537
538 /*
539 * Format capability description entry.
540 */
541 struct format_cap {
542 const char *name;
543
544 SVGA3dSurfaceFormat format;
545
546 /*
547 * Capability index corresponding to the format.
548 */
549 SVGA3dDevCapIndex devcap;
550
551 /* size of each pixel/block */
552 unsigned block_width, block_height, block_bytes;
553
554 /*
555 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
556 * capability is not explicitly present.
557 */
558 uint32 defaultOperations;
559 };
560
561
562 /*
563 * Format capability description table.
564 *
565 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
566 */
567 static const struct format_cap format_cap_table[] = {
568 {
569 "SVGA3D_FORMAT_INVALID",
570 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
571 },
572 {
573 "SVGA3D_X8R8G8B8",
574 SVGA3D_X8R8G8B8,
575 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
576 1, 1, 4,
577 SVGA3DFORMAT_OP_TEXTURE |
578 SVGA3DFORMAT_OP_CUBETEXTURE |
579 SVGA3DFORMAT_OP_VOLUMETEXTURE |
580 SVGA3DFORMAT_OP_DISPLAYMODE |
581 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
582 },
583 {
584 "SVGA3D_A8R8G8B8",
585 SVGA3D_A8R8G8B8,
586 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
587 1, 1, 4,
588 SVGA3DFORMAT_OP_TEXTURE |
589 SVGA3DFORMAT_OP_CUBETEXTURE |
590 SVGA3DFORMAT_OP_VOLUMETEXTURE |
591 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
592 },
593 {
594 "SVGA3D_R5G6B5",
595 SVGA3D_R5G6B5,
596 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
597 1, 1, 2,
598 SVGA3DFORMAT_OP_TEXTURE |
599 SVGA3DFORMAT_OP_CUBETEXTURE |
600 SVGA3DFORMAT_OP_VOLUMETEXTURE |
601 SVGA3DFORMAT_OP_DISPLAYMODE |
602 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
603 },
604 {
605 "SVGA3D_X1R5G5B5",
606 SVGA3D_X1R5G5B5,
607 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
608 1, 1, 2,
609 SVGA3DFORMAT_OP_TEXTURE |
610 SVGA3DFORMAT_OP_CUBETEXTURE |
611 SVGA3DFORMAT_OP_VOLUMETEXTURE |
612 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
613 },
614 {
615 "SVGA3D_A1R5G5B5",
616 SVGA3D_A1R5G5B5,
617 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
618 1, 1, 2,
619 SVGA3DFORMAT_OP_TEXTURE |
620 SVGA3DFORMAT_OP_CUBETEXTURE |
621 SVGA3DFORMAT_OP_VOLUMETEXTURE |
622 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
623 },
624 {
625 "SVGA3D_A4R4G4B4",
626 SVGA3D_A4R4G4B4,
627 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
628 1, 1, 2,
629 SVGA3DFORMAT_OP_TEXTURE |
630 SVGA3DFORMAT_OP_CUBETEXTURE |
631 SVGA3DFORMAT_OP_VOLUMETEXTURE |
632 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
633 },
634 {
635 /*
636 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
637 * SVGA3D_DEVCAP_xxx.
638 */
639 "SVGA3D_Z_D32",
640 SVGA3D_Z_D32, 0, 0, 0, 0, 0
641 },
642 {
643 "SVGA3D_Z_D16",
644 SVGA3D_Z_D16,
645 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
646 1, 1, 2,
647 SVGA3DFORMAT_OP_ZSTENCIL
648 },
649 {
650 "SVGA3D_Z_D24S8",
651 SVGA3D_Z_D24S8,
652 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
653 1, 1, 4,
654 SVGA3DFORMAT_OP_ZSTENCIL
655 },
656 {
657 "SVGA3D_Z_D15S1",
658 SVGA3D_Z_D15S1,
659 SVGA3D_DEVCAP_MAX,
660 1, 1, 2,
661 SVGA3DFORMAT_OP_ZSTENCIL
662 },
663 {
664 "SVGA3D_LUMINANCE8",
665 SVGA3D_LUMINANCE8,
666 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
667 1, 1, 1,
668 SVGA3DFORMAT_OP_TEXTURE |
669 SVGA3DFORMAT_OP_CUBETEXTURE |
670 SVGA3DFORMAT_OP_VOLUMETEXTURE
671 },
672 {
673 /*
674 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
675 * SVGA3D_DEVCAP_xxx.
676 */
677 "SVGA3D_LUMINANCE4_ALPHA4",
678 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
679 },
680 {
681 "SVGA3D_LUMINANCE16",
682 SVGA3D_LUMINANCE16,
683 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
684 1, 1, 2,
685 SVGA3DFORMAT_OP_TEXTURE |
686 SVGA3DFORMAT_OP_CUBETEXTURE |
687 SVGA3DFORMAT_OP_VOLUMETEXTURE
688 },
689 {
690 "SVGA3D_LUMINANCE8_ALPHA8",
691 SVGA3D_LUMINANCE8_ALPHA8,
692 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
693 1, 1, 2,
694 SVGA3DFORMAT_OP_TEXTURE |
695 SVGA3DFORMAT_OP_CUBETEXTURE |
696 SVGA3DFORMAT_OP_VOLUMETEXTURE
697 },
698 {
699 "SVGA3D_DXT1",
700 SVGA3D_DXT1,
701 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
702 4, 4, 8,
703 SVGA3DFORMAT_OP_TEXTURE |
704 SVGA3DFORMAT_OP_CUBETEXTURE
705 },
706 {
707 "SVGA3D_DXT2",
708 SVGA3D_DXT2,
709 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
710 4, 4, 8,
711 SVGA3DFORMAT_OP_TEXTURE |
712 SVGA3DFORMAT_OP_CUBETEXTURE
713 },
714 {
715 "SVGA3D_DXT3",
716 SVGA3D_DXT3,
717 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
718 4, 4, 16,
719 SVGA3DFORMAT_OP_TEXTURE |
720 SVGA3DFORMAT_OP_CUBETEXTURE
721 },
722 {
723 "SVGA3D_DXT4",
724 SVGA3D_DXT4,
725 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
726 4, 4, 16,
727 SVGA3DFORMAT_OP_TEXTURE |
728 SVGA3DFORMAT_OP_CUBETEXTURE
729 },
730 {
731 "SVGA3D_DXT5",
732 SVGA3D_DXT5,
733 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
734 4, 4, 8,
735 SVGA3DFORMAT_OP_TEXTURE |
736 SVGA3DFORMAT_OP_CUBETEXTURE
737 },
738 {
739 "SVGA3D_BUMPU8V8",
740 SVGA3D_BUMPU8V8,
741 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
742 1, 1, 2,
743 SVGA3DFORMAT_OP_TEXTURE |
744 SVGA3DFORMAT_OP_CUBETEXTURE |
745 SVGA3DFORMAT_OP_VOLUMETEXTURE
746 },
747 {
748 /*
749 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
750 * SVGA3D_DEVCAP_xxx.
751 */
752 "SVGA3D_BUMPL6V5U5",
753 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
754 },
755 {
756 "SVGA3D_BUMPX8L8V8U8",
757 SVGA3D_BUMPX8L8V8U8,
758 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
759 1, 1, 4,
760 SVGA3DFORMAT_OP_TEXTURE |
761 SVGA3DFORMAT_OP_CUBETEXTURE
762 },
763 {
764 "SVGA3D_FORMAT_DEAD1",
765 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
766 },
767 {
768 "SVGA3D_ARGB_S10E5",
769 SVGA3D_ARGB_S10E5,
770 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
771 1, 1, 2,
772 SVGA3DFORMAT_OP_TEXTURE |
773 SVGA3DFORMAT_OP_CUBETEXTURE |
774 SVGA3DFORMAT_OP_VOLUMETEXTURE |
775 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
776 },
777 {
778 "SVGA3D_ARGB_S23E8",
779 SVGA3D_ARGB_S23E8,
780 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
781 1, 1, 4,
782 SVGA3DFORMAT_OP_TEXTURE |
783 SVGA3DFORMAT_OP_CUBETEXTURE |
784 SVGA3DFORMAT_OP_VOLUMETEXTURE |
785 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
786 },
787 {
788 "SVGA3D_A2R10G10B10",
789 SVGA3D_A2R10G10B10,
790 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
791 1, 1, 4,
792 SVGA3DFORMAT_OP_TEXTURE |
793 SVGA3DFORMAT_OP_CUBETEXTURE |
794 SVGA3DFORMAT_OP_VOLUMETEXTURE |
795 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
796 },
797 {
798 /*
799 * SVGA3D_V8U8 is unsupported; it has no corresponding
800 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
801 */
802 "SVGA3D_V8U8",
803 SVGA3D_V8U8, 0, 0, 0, 0, 0
804 },
805 {
806 "SVGA3D_Q8W8V8U8",
807 SVGA3D_Q8W8V8U8,
808 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
809 1, 1, 4,
810 SVGA3DFORMAT_OP_TEXTURE |
811 SVGA3DFORMAT_OP_CUBETEXTURE
812 },
813 {
814 "SVGA3D_CxV8U8",
815 SVGA3D_CxV8U8,
816 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
817 1, 1, 2,
818 SVGA3DFORMAT_OP_TEXTURE
819 },
820 {
821 /*
822 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
823 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
824 */
825 "SVGA3D_X8L8V8U8",
826 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
827 },
828 {
829 "SVGA3D_A2W10V10U10",
830 SVGA3D_A2W10V10U10,
831 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
832 1, 1, 4,
833 SVGA3DFORMAT_OP_TEXTURE
834 },
835 {
836 "SVGA3D_ALPHA8",
837 SVGA3D_ALPHA8,
838 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
839 1, 1, 1,
840 SVGA3DFORMAT_OP_TEXTURE |
841 SVGA3DFORMAT_OP_CUBETEXTURE |
842 SVGA3DFORMAT_OP_VOLUMETEXTURE
843 },
844 {
845 "SVGA3D_R_S10E5",
846 SVGA3D_R_S10E5,
847 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
848 1, 1, 2,
849 SVGA3DFORMAT_OP_TEXTURE |
850 SVGA3DFORMAT_OP_VOLUMETEXTURE |
851 SVGA3DFORMAT_OP_CUBETEXTURE |
852 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
853 },
854 {
855 "SVGA3D_R_S23E8",
856 SVGA3D_R_S23E8,
857 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
858 1, 1, 4,
859 SVGA3DFORMAT_OP_TEXTURE |
860 SVGA3DFORMAT_OP_VOLUMETEXTURE |
861 SVGA3DFORMAT_OP_CUBETEXTURE |
862 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
863 },
864 {
865 "SVGA3D_RG_S10E5",
866 SVGA3D_RG_S10E5,
867 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
868 1, 1, 2,
869 SVGA3DFORMAT_OP_TEXTURE |
870 SVGA3DFORMAT_OP_VOLUMETEXTURE |
871 SVGA3DFORMAT_OP_CUBETEXTURE |
872 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
873 },
874 {
875 "SVGA3D_RG_S23E8",
876 SVGA3D_RG_S23E8,
877 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
878 1, 1, 4,
879 SVGA3DFORMAT_OP_TEXTURE |
880 SVGA3DFORMAT_OP_VOLUMETEXTURE |
881 SVGA3DFORMAT_OP_CUBETEXTURE |
882 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
883 },
884 {
885 /*
886 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
887 */
888 "SVGA3D_BUFFER",
889 SVGA3D_BUFFER, 0, 1, 1, 1, 0
890 },
891 {
892 "SVGA3D_Z_D24X8",
893 SVGA3D_Z_D24X8,
894 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
895 1, 1, 4,
896 SVGA3DFORMAT_OP_ZSTENCIL
897 },
898 {
899 "SVGA3D_V16U16",
900 SVGA3D_V16U16,
901 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
902 1, 1, 4,
903 SVGA3DFORMAT_OP_TEXTURE |
904 SVGA3DFORMAT_OP_CUBETEXTURE |
905 SVGA3DFORMAT_OP_VOLUMETEXTURE
906 },
907 {
908 "SVGA3D_G16R16",
909 SVGA3D_G16R16,
910 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
911 1, 1, 4,
912 SVGA3DFORMAT_OP_TEXTURE |
913 SVGA3DFORMAT_OP_CUBETEXTURE |
914 SVGA3DFORMAT_OP_VOLUMETEXTURE |
915 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
916 },
917 {
918 "SVGA3D_A16B16G16R16",
919 SVGA3D_A16B16G16R16,
920 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
921 1, 1, 8,
922 SVGA3DFORMAT_OP_TEXTURE |
923 SVGA3DFORMAT_OP_CUBETEXTURE |
924 SVGA3DFORMAT_OP_VOLUMETEXTURE |
925 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
926 },
927 {
928 "SVGA3D_UYVY",
929 SVGA3D_UYVY,
930 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
931 0, 0, 0, 0
932 },
933 {
934 "SVGA3D_YUY2",
935 SVGA3D_YUY2,
936 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
937 0, 0, 0, 0
938 },
939 {
940 "SVGA3D_NV12",
941 SVGA3D_NV12,
942 SVGA3D_DEVCAP_SURFACEFMT_NV12,
943 0, 0, 0, 0
944 },
945 {
946 "SVGA3D_AYUV",
947 SVGA3D_AYUV,
948 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
949 0, 0, 0, 0
950 },
951 {
952 "SVGA3D_R32G32B32A32_TYPELESS",
953 SVGA3D_R32G32B32A32_TYPELESS,
954 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
955 1, 1, 16, 0
956 },
957 {
958 "SVGA3D_R32G32B32A32_UINT",
959 SVGA3D_R32G32B32A32_UINT,
960 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
961 1, 1, 16, 0
962 },
963 {
964 "SVGA3D_R32G32B32A32_SINT",
965 SVGA3D_R32G32B32A32_SINT,
966 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
967 1, 1, 16, 0
968 },
969 {
970 "SVGA3D_R32G32B32_TYPELESS",
971 SVGA3D_R32G32B32_TYPELESS,
972 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
973 1, 1, 12, 0
974 },
975 {
976 "SVGA3D_R32G32B32_FLOAT",
977 SVGA3D_R32G32B32_FLOAT,
978 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
979 1, 1, 12, 0
980 },
981 {
982 "SVGA3D_R32G32B32_UINT",
983 SVGA3D_R32G32B32_UINT,
984 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
985 1, 1, 12, 0
986 },
987 {
988 "SVGA3D_R32G32B32_SINT",
989 SVGA3D_R32G32B32_SINT,
990 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
991 1, 1, 12, 0
992 },
993 {
994 "SVGA3D_R16G16B16A16_TYPELESS",
995 SVGA3D_R16G16B16A16_TYPELESS,
996 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
997 1, 1, 8, 0
998 },
999 {
1000 "SVGA3D_R16G16B16A16_UINT",
1001 SVGA3D_R16G16B16A16_UINT,
1002 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
1003 1, 1, 8, 0
1004 },
1005 {
1006 "SVGA3D_R16G16B16A16_SNORM",
1007 SVGA3D_R16G16B16A16_SNORM,
1008 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
1009 1, 1, 8, 0
1010 },
1011 {
1012 "SVGA3D_R16G16B16A16_SINT",
1013 SVGA3D_R16G16B16A16_SINT,
1014 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
1015 1, 1, 8, 0
1016 },
1017 {
1018 "SVGA3D_R32G32_TYPELESS",
1019 SVGA3D_R32G32_TYPELESS,
1020 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
1021 1, 1, 8, 0
1022 },
1023 {
1024 "SVGA3D_R32G32_UINT",
1025 SVGA3D_R32G32_UINT,
1026 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
1027 1, 1, 8, 0
1028 },
1029 {
1030 "SVGA3D_R32G32_SINT",
1031 SVGA3D_R32G32_SINT,
1032 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1033 1, 1, 8,
1034 0
1035 },
1036 {
1037 "SVGA3D_R32G8X24_TYPELESS",
1038 SVGA3D_R32G8X24_TYPELESS,
1039 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1040 1, 1, 8, 0
1041 },
1042 {
1043 "SVGA3D_D32_FLOAT_S8X24_UINT",
1044 SVGA3D_D32_FLOAT_S8X24_UINT,
1045 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
1046 1, 1, 8, 0
1047 },
1048 {
1049 "SVGA3D_R32_FLOAT_X8X24",
1050 SVGA3D_R32_FLOAT_X8X24,
1051 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
1052 1, 1, 8, 0
1053 },
1054 {
1055 "SVGA3D_X32_G8X24_UINT",
1056 SVGA3D_X32_G8X24_UINT,
1057 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
1058 1, 1, 4, 0
1059 },
1060 {
1061 "SVGA3D_R10G10B10A2_TYPELESS",
1062 SVGA3D_R10G10B10A2_TYPELESS,
1063 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1064 1, 1, 4, 0
1065 },
1066 {
1067 "SVGA3D_R10G10B10A2_UINT",
1068 SVGA3D_R10G10B10A2_UINT,
1069 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1070 1, 1, 4, 0
1071 },
1072 {
1073 "SVGA3D_R11G11B10_FLOAT",
1074 SVGA3D_R11G11B10_FLOAT,
1075 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1076 1, 1, 4, 0
1077 },
1078 {
1079 "SVGA3D_R8G8B8A8_TYPELESS",
1080 SVGA3D_R8G8B8A8_TYPELESS,
1081 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1082 1, 1, 4, 0
1083 },
1084 {
1085 "SVGA3D_R8G8B8A8_UNORM",
1086 SVGA3D_R8G8B8A8_UNORM,
1087 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1088 1, 1, 4, 0
1089 },
1090 {
1091 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1092 SVGA3D_R8G8B8A8_UNORM_SRGB,
1093 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1094 1, 1, 4, 0
1095 },
1096 {
1097 "SVGA3D_R8G8B8A8_UINT",
1098 SVGA3D_R8G8B8A8_UINT,
1099 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1100 1, 1, 4, 0
1101 },
1102 {
1103 "SVGA3D_R8G8B8A8_SINT",
1104 SVGA3D_R8G8B8A8_SINT,
1105 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1106 1, 1, 4, 0
1107 },
1108 {
1109 "SVGA3D_R16G16_TYPELESS",
1110 SVGA3D_R16G16_TYPELESS,
1111 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1112 1, 1, 4, 0
1113 },
1114 {
1115 "SVGA3D_R16G16_UINT",
1116 SVGA3D_R16G16_UINT,
1117 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1118 1, 1, 4, 0
1119 },
1120 {
1121 "SVGA3D_R16G16_SINT",
1122 SVGA3D_R16G16_SINT,
1123 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1124 1, 1, 4, 0
1125 },
1126 {
1127 "SVGA3D_R32_TYPELESS",
1128 SVGA3D_R32_TYPELESS,
1129 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1130 1, 1, 4, 0
1131 },
1132 {
1133 "SVGA3D_D32_FLOAT",
1134 SVGA3D_D32_FLOAT,
1135 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
1136 1, 1, 4, 0
1137 },
1138 {
1139 "SVGA3D_R32_UINT",
1140 SVGA3D_R32_UINT,
1141 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1142 1, 1, 4, 0
1143 },
1144 {
1145 "SVGA3D_R32_SINT",
1146 SVGA3D_R32_SINT,
1147 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1148 1, 1, 4, 0
1149 },
1150 {
1151 "SVGA3D_R24G8_TYPELESS",
1152 SVGA3D_R24G8_TYPELESS,
1153 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1154 1, 1, 4, 0
1155 },
1156 {
1157 "SVGA3D_D24_UNORM_S8_UINT",
1158 SVGA3D_D24_UNORM_S8_UINT,
1159 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1160 1, 1, 4, 0
1161 },
1162 {
1163 "SVGA3D_R24_UNORM_X8",
1164 SVGA3D_R24_UNORM_X8,
1165 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1166 1, 1, 4, 0
1167 },
1168 {
1169 "SVGA3D_X24_G8_UINT",
1170 SVGA3D_X24_G8_UINT,
1171 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1172 1, 1, 4, 0
1173 },
1174 {
1175 "SVGA3D_R8G8_TYPELESS",
1176 SVGA3D_R8G8_TYPELESS,
1177 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1178 1, 1, 2, 0
1179 },
1180 {
1181 "SVGA3D_R8G8_UNORM",
1182 SVGA3D_R8G8_UNORM,
1183 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1184 1, 1, 2, 0
1185 },
1186 {
1187 "SVGA3D_R8G8_UINT",
1188 SVGA3D_R8G8_UINT,
1189 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1190 1, 1, 2, 0
1191 },
1192 {
1193 "SVGA3D_R8G8_SINT",
1194 SVGA3D_R8G8_SINT,
1195 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1196 1, 1, 2, 0
1197 },
1198 {
1199 "SVGA3D_R16_TYPELESS",
1200 SVGA3D_R16_TYPELESS,
1201 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1202 1, 1, 2, 0
1203 },
1204 {
1205 "SVGA3D_R16_UNORM",
1206 SVGA3D_R16_UNORM,
1207 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1208 1, 1, 2, 0
1209 },
1210 {
1211 "SVGA3D_R16_UINT",
1212 SVGA3D_R16_UINT,
1213 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1214 1, 1, 2, 0
1215 },
1216 {
1217 "SVGA3D_R16_SNORM",
1218 SVGA3D_R16_SNORM,
1219 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1220 1, 1, 2, 0
1221 },
1222 {
1223 "SVGA3D_R16_SINT",
1224 SVGA3D_R16_SINT,
1225 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1226 1, 1, 2, 0
1227 },
1228 {
1229 "SVGA3D_R8_TYPELESS",
1230 SVGA3D_R8_TYPELESS,
1231 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1232 1, 1, 1, 0
1233 },
1234 {
1235 "SVGA3D_R8_UNORM",
1236 SVGA3D_R8_UNORM,
1237 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1238 1, 1, 1, 0
1239 },
1240 {
1241 "SVGA3D_R8_UINT",
1242 SVGA3D_R8_UINT,
1243 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1244 1, 1, 1, 0
1245 },
1246 {
1247 "SVGA3D_R8_SNORM",
1248 SVGA3D_R8_SNORM,
1249 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1250 1, 1, 1, 0
1251 },
1252 {
1253 "SVGA3D_R8_SINT",
1254 SVGA3D_R8_SINT,
1255 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1256 1, 1, 1, 0
1257 },
1258 {
1259 "SVGA3D_P8",
1260 SVGA3D_P8, 0, 0, 0, 0, 0
1261 },
1262 {
1263 "SVGA3D_R9G9B9E5_SHAREDEXP",
1264 SVGA3D_R9G9B9E5_SHAREDEXP,
1265 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1266 1, 1, 4, 0
1267 },
1268 {
1269 "SVGA3D_R8G8_B8G8_UNORM",
1270 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1271 },
1272 {
1273 "SVGA3D_G8R8_G8B8_UNORM",
1274 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1275 },
1276 {
1277 "SVGA3D_BC1_TYPELESS",
1278 SVGA3D_BC1_TYPELESS,
1279 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1280 4, 4, 8, 0
1281 },
1282 {
1283 "SVGA3D_BC1_UNORM_SRGB",
1284 SVGA3D_BC1_UNORM_SRGB,
1285 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1286 4, 4, 8, 0
1287 },
1288 {
1289 "SVGA3D_BC2_TYPELESS",
1290 SVGA3D_BC2_TYPELESS,
1291 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1292 4, 4, 16, 0
1293 },
1294 {
1295 "SVGA3D_BC2_UNORM_SRGB",
1296 SVGA3D_BC2_UNORM_SRGB,
1297 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1298 4, 4, 16, 0
1299 },
1300 {
1301 "SVGA3D_BC3_TYPELESS",
1302 SVGA3D_BC3_TYPELESS,
1303 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1304 4, 4, 16, 0
1305 },
1306 {
1307 "SVGA3D_BC3_UNORM_SRGB",
1308 SVGA3D_BC3_UNORM_SRGB,
1309 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1310 4, 4, 16, 0
1311 },
1312 {
1313 "SVGA3D_BC4_TYPELESS",
1314 SVGA3D_BC4_TYPELESS,
1315 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1316 4, 4, 8, 0
1317 },
1318 {
1319 "SVGA3D_ATI1",
1320 SVGA3D_ATI1, 0, 0, 0, 0, 0
1321 },
1322 {
1323 "SVGA3D_BC4_SNORM",
1324 SVGA3D_BC4_SNORM,
1325 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1326 4, 4, 8, 0
1327 },
1328 {
1329 "SVGA3D_BC5_TYPELESS",
1330 SVGA3D_BC5_TYPELESS,
1331 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1332 4, 4, 16, 0
1333 },
1334 {
1335 "SVGA3D_ATI2",
1336 SVGA3D_ATI2, 0, 0, 0, 0, 0
1337 },
1338 {
1339 "SVGA3D_BC5_SNORM",
1340 SVGA3D_BC5_SNORM,
1341 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1342 4, 4, 16, 0
1343 },
1344 {
1345 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1346 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1347 },
1348 {
1349 "SVGA3D_B8G8R8A8_TYPELESS",
1350 SVGA3D_B8G8R8A8_TYPELESS,
1351 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1352 1, 1, 4, 0
1353 },
1354 {
1355 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1356 SVGA3D_B8G8R8A8_UNORM_SRGB,
1357 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1358 1, 1, 4, 0
1359 },
1360 {
1361 "SVGA3D_B8G8R8X8_TYPELESS",
1362 SVGA3D_B8G8R8X8_TYPELESS,
1363 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1364 1, 1, 4, 0
1365 },
1366 {
1367 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1368 SVGA3D_B8G8R8X8_UNORM_SRGB,
1369 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1370 1, 1, 4, 0
1371 },
1372 {
1373 "SVGA3D_Z_DF16",
1374 SVGA3D_Z_DF16,
1375 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1376 1, 1, 2, 0
1377 },
1378 {
1379 "SVGA3D_Z_DF24",
1380 SVGA3D_Z_DF24,
1381 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1382 1, 1, 4, 0
1383 },
1384 {
1385 "SVGA3D_Z_D24S8_INT",
1386 SVGA3D_Z_D24S8_INT,
1387 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1388 1, 1, 4, 0
1389 },
1390 {
1391 "SVGA3D_YV12",
1392 SVGA3D_YV12, 0, 0, 0, 0, 0
1393 },
1394 {
1395 "SVGA3D_R32G32B32A32_FLOAT",
1396 SVGA3D_R32G32B32A32_FLOAT,
1397 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1398 1, 1, 16, 0
1399 },
1400 {
1401 "SVGA3D_R16G16B16A16_FLOAT",
1402 SVGA3D_R16G16B16A16_FLOAT,
1403 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1404 1, 1, 8, 0
1405 },
1406 {
1407 "SVGA3D_R16G16B16A16_UNORM",
1408 SVGA3D_R16G16B16A16_UNORM,
1409 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1410 1, 1, 8, 0
1411 },
1412 {
1413 "SVGA3D_R32G32_FLOAT",
1414 SVGA3D_R32G32_FLOAT,
1415 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1416 1, 1, 8, 0
1417 },
1418 {
1419 "SVGA3D_R10G10B10A2_UNORM",
1420 SVGA3D_R10G10B10A2_UNORM,
1421 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1422 1, 1, 4, 0
1423 },
1424 {
1425 "SVGA3D_R8G8B8A8_SNORM",
1426 SVGA3D_R8G8B8A8_SNORM,
1427 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1428 1, 1, 4, 0
1429 },
1430 {
1431 "SVGA3D_R16G16_FLOAT",
1432 SVGA3D_R16G16_FLOAT,
1433 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1434 1, 1, 4, 0
1435 },
1436 {
1437 "SVGA3D_R16G16_UNORM",
1438 SVGA3D_R16G16_UNORM,
1439 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1440 1, 1, 4, 0
1441 },
1442 {
1443 "SVGA3D_R16G16_SNORM",
1444 SVGA3D_R16G16_SNORM,
1445 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1446 1, 1, 4, 0
1447 },
1448 {
1449 "SVGA3D_R32_FLOAT",
1450 SVGA3D_R32_FLOAT,
1451 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1452 1, 1, 4, 0
1453 },
1454 {
1455 "SVGA3D_R8G8_SNORM",
1456 SVGA3D_R8G8_SNORM,
1457 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1458 1, 1, 2, 0
1459 },
1460 {
1461 "SVGA3D_R16_FLOAT",
1462 SVGA3D_R16_FLOAT,
1463 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1464 1, 1, 2, 0
1465 },
1466 {
1467 "SVGA3D_D16_UNORM",
1468 SVGA3D_D16_UNORM,
1469 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1470 1, 1, 2, 0
1471 },
1472 {
1473 "SVGA3D_A8_UNORM",
1474 SVGA3D_A8_UNORM,
1475 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1476 1, 1, 1, 0
1477 },
1478 {
1479 "SVGA3D_BC1_UNORM",
1480 SVGA3D_BC1_UNORM,
1481 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1482 4, 4, 8, 0
1483 },
1484 {
1485 "SVGA3D_BC2_UNORM",
1486 SVGA3D_BC2_UNORM,
1487 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1488 4, 4, 16, 0
1489 },
1490 {
1491 "SVGA3D_BC3_UNORM",
1492 SVGA3D_BC3_UNORM,
1493 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1494 4, 4, 16, 0
1495 },
1496 {
1497 "SVGA3D_B5G6R5_UNORM",
1498 SVGA3D_B5G6R5_UNORM,
1499 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1500 1, 1, 2, 0
1501 },
1502 {
1503 "SVGA3D_B5G5R5A1_UNORM",
1504 SVGA3D_B5G5R5A1_UNORM,
1505 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1506 1, 1, 2, 0
1507 },
1508 {
1509 "SVGA3D_B8G8R8A8_UNORM",
1510 SVGA3D_B8G8R8A8_UNORM,
1511 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1512 1, 1, 4, 0
1513 },
1514 {
1515 "SVGA3D_B8G8R8X8_UNORM",
1516 SVGA3D_B8G8R8X8_UNORM,
1517 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1518 1, 1, 4, 0
1519 },
1520 {
1521 "SVGA3D_BC4_UNORM",
1522 SVGA3D_BC4_UNORM,
1523 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1524 4, 4, 8, 0
1525 },
1526 {
1527 "SVGA3D_BC5_UNORM",
1528 SVGA3D_BC5_UNORM,
1529 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1530 4, 4, 16, 0
1531 }
1532 };
1533
1534 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1535 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1536 SVGA3D_B8G8R8A8_UNORM, 0
1537 };
1538 static const SVGA3dSurfaceFormat compat_r8[] = {
1539 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1540 };
1541 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1542 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1543 };
1544 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1545 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1546 };
1547
1548 static const struct format_compat_entry format_compats[] = {
1549 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1550 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1551 {PIPE_FORMAT_R8_UNORM, compat_r8},
1552 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1553 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1554 };
1555
1556 /**
1557 * Debug only:
1558 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1559 * 2. check that format_conversion_table[i].pformat == i.
1560 */
1561 static void
1562 check_format_tables(void)
1563 {
1564 static boolean first_call = TRUE;
1565
1566 if (first_call) {
1567 unsigned i;
1568
1569 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1570 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1571 assert(format_cap_table[i].format == i);
1572 }
1573
1574 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1575 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1576 assert(format_conversion_table[i].pformat == i);
1577 }
1578
1579 first_call = FALSE;
1580 }
1581 }
1582
1583
1584 /**
1585 * Return string name of an SVGA3dDevCapIndex value.
1586 * For debugging.
1587 */
1588 static const char *
1589 svga_devcap_name(SVGA3dDevCapIndex cap)
1590 {
1591 static const struct debug_named_value devcap_names[] = {
1592 /* Note, we only list the DXFMT devcaps so far */
1593 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1594 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1595 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1622 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1623 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1624 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1625 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1626 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1627 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1628 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1629 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1630 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1631 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1632 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1633 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1634 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1635 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1636 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1637 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1638 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1639 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1640 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1641 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1642 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1643 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1644 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1645 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1646 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1647 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1648 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1649 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1650 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1651 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1652 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1653 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1654 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1655 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1656 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1657 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1658 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1659 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1660 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1661 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1662 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1663 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1664 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1665 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1666 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1667 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1668 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1669 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1670 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1671 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1672 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1673 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1674 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1675 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1676 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1677 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1678 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1679 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1680 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1681 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1682 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1683 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1684 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1685 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1686 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1687 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1688 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1689 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1690 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1691 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1692 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1693 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1694 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1695 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1696 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1697 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1698 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1699 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1700 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1701 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1702 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1703 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1704 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1705 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1706 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1707 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1708 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1709 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1710 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1711 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1712 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1713 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1714 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1715 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1716 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1717 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1718 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1719 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1720 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1721 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1722 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1723 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1724 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1725 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1726 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1727 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1728 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1729 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1730 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1731 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1732 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1733 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1734 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1735 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1736 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1737 DEBUG_NAMED_VALUE_END,
1738 };
1739 return debug_dump_enum(devcap_names, cap);
1740 }
1741
1742
1743 /**
1744 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1745 * For debugging.
1746 */
1747 static const char *
1748 svga_devcap_format_flags(unsigned flags)
1749 {
1750 static const struct debug_named_value devcap_flags[] = {
1751 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1752 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1753 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1754 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1755 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1756 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1757 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1758 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1759 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1760 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1761 DEBUG_NAMED_VALUE_END
1762 };
1763
1764 return debug_dump_flags(devcap_flags, flags);
1765 }
1766
1767
1768 /*
1769 * Get format capabilities from the host. It takes in consideration
1770 * deprecated/unsupported formats, and formats which are implicitely assumed to
1771 * be supported when the host does not provide an explicit capability entry.
1772 */
1773 void
1774 svga_get_format_cap(struct svga_screen *ss,
1775 SVGA3dSurfaceFormat format,
1776 SVGA3dSurfaceFormatCaps *caps)
1777 {
1778 struct svga_winsys_screen *sws = ss->sws;
1779 SVGA3dDevCapResult result;
1780 const struct format_cap *entry;
1781
1782 #ifdef DEBUG
1783 check_format_tables();
1784 #else
1785 (void) check_format_tables;
1786 #endif
1787
1788 assert(format < ARRAY_SIZE(format_cap_table));
1789 entry = &format_cap_table[format];
1790 assert(entry->format == format);
1791
1792 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1793 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1794 caps->value = result.u;
1795 } else {
1796 /* Implicitly advertised format -- use default caps */
1797 caps->value = entry->defaultOperations;
1798 }
1799 }
1800
1801
1802 /*
1803 * Get DX format capabilities from VGPU10 device.
1804 */
1805 static void
1806 svga_get_dx_format_cap(struct svga_screen *ss,
1807 SVGA3dSurfaceFormat format,
1808 SVGA3dDevCapResult *caps)
1809 {
1810 struct svga_winsys_screen *sws = ss->sws;
1811 const struct format_cap *entry;
1812
1813 #ifdef DEBUG
1814 check_format_tables();
1815 #else
1816 (void) check_format_tables;
1817 #endif
1818
1819 assert(sws->have_vgpu10);
1820 assert(format < ARRAY_SIZE(format_cap_table));
1821 entry = &format_cap_table[format];
1822 assert(entry->format == format);
1823 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1824
1825 caps->u = 0;
1826 if (entry->devcap) {
1827 sws->get_cap(sws, entry->devcap, caps);
1828
1829 /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1830 * these formats but does not advertise the devcap.
1831 * So enable this bit here.
1832 */
1833 if (!sws->have_sm4_1 &&
1834 (format == SVGA3D_R32_FLOAT_X8X24 ||
1835 format == SVGA3D_R24_UNORM_X8)) {
1836 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1837 }
1838 }
1839
1840 if (0) {
1841 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1842 svga_format_name(format),
1843 svga_devcap_name(entry->devcap),
1844 caps->u,
1845 svga_devcap_format_flags(caps->u));
1846 }
1847 }
1848
1849
1850 void
1851 svga_format_size(SVGA3dSurfaceFormat format,
1852 unsigned *block_width,
1853 unsigned *block_height,
1854 unsigned *bytes_per_block)
1855 {
1856 assert(format < ARRAY_SIZE(format_cap_table));
1857 *block_width = format_cap_table[format].block_width;
1858 *block_height = format_cap_table[format].block_height;
1859 *bytes_per_block = format_cap_table[format].block_bytes;
1860 /* Make sure the table entry was valid */
1861 if (*block_width == 0)
1862 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1863 assert(*block_width);
1864 assert(*block_height);
1865 assert(*bytes_per_block);
1866 }
1867
1868
1869 const char *
1870 svga_format_name(SVGA3dSurfaceFormat format)
1871 {
1872 assert(format < ARRAY_SIZE(format_cap_table));
1873 return format_cap_table[format].name;
1874 }
1875
1876
1877 /**
1878 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1879 */
1880 boolean
1881 svga_format_is_integer(SVGA3dSurfaceFormat format)
1882 {
1883 switch (format) {
1884 case SVGA3D_R32G32B32A32_SINT:
1885 case SVGA3D_R32G32B32_SINT:
1886 case SVGA3D_R32G32_SINT:
1887 case SVGA3D_R32_SINT:
1888 case SVGA3D_R16G16B16A16_SINT:
1889 case SVGA3D_R16G16_SINT:
1890 case SVGA3D_R16_SINT:
1891 case SVGA3D_R8G8B8A8_SINT:
1892 case SVGA3D_R8G8_SINT:
1893 case SVGA3D_R8_SINT:
1894 case SVGA3D_R32G32B32A32_UINT:
1895 case SVGA3D_R32G32B32_UINT:
1896 case SVGA3D_R32G32_UINT:
1897 case SVGA3D_R32_UINT:
1898 case SVGA3D_R16G16B16A16_UINT:
1899 case SVGA3D_R16G16_UINT:
1900 case SVGA3D_R16_UINT:
1901 case SVGA3D_R8G8B8A8_UINT:
1902 case SVGA3D_R8G8_UINT:
1903 case SVGA3D_R8_UINT:
1904 case SVGA3D_R10G10B10A2_UINT:
1905 return TRUE;
1906 default:
1907 return FALSE;
1908 }
1909 }
1910
1911 boolean
1912 svga_format_support_gen_mips(enum pipe_format format)
1913 {
1914 assert(format < ARRAY_SIZE(format_conversion_table));
1915 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1916 }
1917
1918
1919 /**
1920 * Given a texture format, return the expected data type returned from
1921 * the texture sampler. For example, UNORM8 formats return floating point
1922 * values while SINT formats returned signed integer values.
1923 * Note: this function could be moved into the gallum u_format.[ch] code
1924 * if it's useful to anyone else.
1925 */
1926 enum tgsi_return_type
1927 svga_get_texture_datatype(enum pipe_format format)
1928 {
1929 const struct util_format_description *desc = util_format_description(format);
1930 enum tgsi_return_type t;
1931
1932 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1933 if (util_format_is_depth_or_stencil(format)) {
1934 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1935 }
1936 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1937 t = TGSI_RETURN_TYPE_FLOAT;
1938 }
1939 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1940 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1941 }
1942 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1943 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1944 }
1945 else {
1946 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1947 t = TGSI_RETURN_TYPE_FLOAT;
1948 }
1949 }
1950 else {
1951 /* compressed format, shared exponent format, etc. */
1952 switch (format) {
1953 case PIPE_FORMAT_DXT1_RGB:
1954 case PIPE_FORMAT_DXT1_RGBA:
1955 case PIPE_FORMAT_DXT3_RGBA:
1956 case PIPE_FORMAT_DXT5_RGBA:
1957 case PIPE_FORMAT_DXT1_SRGB:
1958 case PIPE_FORMAT_DXT1_SRGBA:
1959 case PIPE_FORMAT_DXT3_SRGBA:
1960 case PIPE_FORMAT_DXT5_SRGBA:
1961 case PIPE_FORMAT_RGTC1_UNORM:
1962 case PIPE_FORMAT_RGTC2_UNORM:
1963 case PIPE_FORMAT_LATC1_UNORM:
1964 case PIPE_FORMAT_LATC2_UNORM:
1965 case PIPE_FORMAT_ETC1_RGB8:
1966 t = TGSI_RETURN_TYPE_UNORM;
1967 break;
1968 case PIPE_FORMAT_RGTC1_SNORM:
1969 case PIPE_FORMAT_RGTC2_SNORM:
1970 case PIPE_FORMAT_LATC1_SNORM:
1971 case PIPE_FORMAT_LATC2_SNORM:
1972 case PIPE_FORMAT_R10G10B10X2_SNORM:
1973 t = TGSI_RETURN_TYPE_SNORM;
1974 break;
1975 case PIPE_FORMAT_R11G11B10_FLOAT:
1976 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1977 t = TGSI_RETURN_TYPE_FLOAT;
1978 break;
1979 default:
1980 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1981 t = TGSI_RETURN_TYPE_FLOAT;
1982 }
1983 }
1984
1985 return t;
1986 }
1987
1988
1989 /**
1990 * Given an svga context, return true iff there are currently any integer color
1991 * buffers attached to the framebuffer.
1992 */
1993 boolean
1994 svga_has_any_integer_cbufs(const struct svga_context *svga)
1995 {
1996 unsigned i;
1997 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1998 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1999
2000 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
2001 return TRUE;
2002 }
2003 }
2004 return FALSE;
2005 }
2006
2007
2008 /**
2009 * Given an SVGA format, return the corresponding typeless format.
2010 * If there is no typeless format, return the format unchanged.
2011 */
2012 SVGA3dSurfaceFormat
2013 svga_typeless_format(SVGA3dSurfaceFormat format)
2014 {
2015 switch (format) {
2016 case SVGA3D_R32G32B32A32_UINT:
2017 case SVGA3D_R32G32B32A32_SINT:
2018 case SVGA3D_R32G32B32A32_FLOAT:
2019 return SVGA3D_R32G32B32A32_TYPELESS;
2020 case SVGA3D_R32G32B32_FLOAT:
2021 case SVGA3D_R32G32B32_UINT:
2022 case SVGA3D_R32G32B32_SINT:
2023 return SVGA3D_R32G32B32_TYPELESS;
2024 case SVGA3D_R16G16B16A16_UINT:
2025 case SVGA3D_R16G16B16A16_UNORM:
2026 case SVGA3D_R16G16B16A16_SNORM:
2027 case SVGA3D_R16G16B16A16_SINT:
2028 case SVGA3D_R16G16B16A16_FLOAT:
2029 return SVGA3D_R16G16B16A16_TYPELESS;
2030 case SVGA3D_R32G32_UINT:
2031 case SVGA3D_R32G32_SINT:
2032 case SVGA3D_R32G32_FLOAT:
2033 return SVGA3D_R32G32_TYPELESS;
2034 case SVGA3D_D32_FLOAT_S8X24_UINT:
2035 case SVGA3D_X32_G8X24_UINT:
2036 case SVGA3D_R32G8X24_TYPELESS:
2037 return SVGA3D_R32G8X24_TYPELESS;
2038 case SVGA3D_R10G10B10A2_UINT:
2039 case SVGA3D_R10G10B10A2_UNORM:
2040 return SVGA3D_R10G10B10A2_TYPELESS;
2041 case SVGA3D_R8G8B8A8_UNORM:
2042 case SVGA3D_R8G8B8A8_SNORM:
2043 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2044 case SVGA3D_R8G8B8A8_UINT:
2045 case SVGA3D_R8G8B8A8_SINT:
2046 case SVGA3D_R8G8B8A8_TYPELESS:
2047 return SVGA3D_R8G8B8A8_TYPELESS;
2048 case SVGA3D_R16G16_UINT:
2049 case SVGA3D_R16G16_SINT:
2050 case SVGA3D_R16G16_UNORM:
2051 case SVGA3D_R16G16_SNORM:
2052 case SVGA3D_R16G16_FLOAT:
2053 return SVGA3D_R16G16_TYPELESS;
2054 case SVGA3D_D32_FLOAT:
2055 case SVGA3D_R32_FLOAT:
2056 case SVGA3D_R32_UINT:
2057 case SVGA3D_R32_SINT:
2058 case SVGA3D_R32_TYPELESS:
2059 return SVGA3D_R32_TYPELESS;
2060 case SVGA3D_D24_UNORM_S8_UINT:
2061 case SVGA3D_R24G8_TYPELESS:
2062 return SVGA3D_R24G8_TYPELESS;
2063 case SVGA3D_X24_G8_UINT:
2064 return SVGA3D_R24_UNORM_X8;
2065 case SVGA3D_R8G8_UNORM:
2066 case SVGA3D_R8G8_SNORM:
2067 case SVGA3D_R8G8_UINT:
2068 case SVGA3D_R8G8_SINT:
2069 return SVGA3D_R8G8_TYPELESS;
2070 case SVGA3D_D16_UNORM:
2071 case SVGA3D_R16_UNORM:
2072 case SVGA3D_R16_UINT:
2073 case SVGA3D_R16_SNORM:
2074 case SVGA3D_R16_SINT:
2075 case SVGA3D_R16_FLOAT:
2076 case SVGA3D_R16_TYPELESS:
2077 return SVGA3D_R16_TYPELESS;
2078 case SVGA3D_R8_UNORM:
2079 case SVGA3D_R8_UINT:
2080 case SVGA3D_R8_SNORM:
2081 case SVGA3D_R8_SINT:
2082 return SVGA3D_R8_TYPELESS;
2083 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2084 case SVGA3D_B8G8R8A8_UNORM:
2085 case SVGA3D_B8G8R8A8_TYPELESS:
2086 return SVGA3D_B8G8R8A8_TYPELESS;
2087 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2088 case SVGA3D_B8G8R8X8_UNORM:
2089 case SVGA3D_B8G8R8X8_TYPELESS:
2090 return SVGA3D_B8G8R8X8_TYPELESS;
2091 case SVGA3D_BC1_UNORM:
2092 case SVGA3D_BC1_UNORM_SRGB:
2093 case SVGA3D_BC1_TYPELESS:
2094 return SVGA3D_BC1_TYPELESS;
2095 case SVGA3D_BC2_UNORM:
2096 case SVGA3D_BC2_UNORM_SRGB:
2097 case SVGA3D_BC2_TYPELESS:
2098 return SVGA3D_BC2_TYPELESS;
2099 case SVGA3D_BC3_UNORM:
2100 case SVGA3D_BC3_UNORM_SRGB:
2101 case SVGA3D_BC3_TYPELESS:
2102 return SVGA3D_BC3_TYPELESS;
2103 case SVGA3D_BC4_UNORM:
2104 case SVGA3D_BC4_SNORM:
2105 return SVGA3D_BC4_TYPELESS;
2106 case SVGA3D_BC5_UNORM:
2107 case SVGA3D_BC5_SNORM:
2108 return SVGA3D_BC5_TYPELESS;
2109
2110 /* Special cases (no corresponding _TYPELESS formats) */
2111 case SVGA3D_A8_UNORM:
2112 case SVGA3D_B5G5R5A1_UNORM:
2113 case SVGA3D_B5G6R5_UNORM:
2114 case SVGA3D_R11G11B10_FLOAT:
2115 case SVGA3D_R9G9B9E5_SHAREDEXP:
2116 return format;
2117 default:
2118 debug_printf("Unexpected format %s in %s\n",
2119 svga_format_name(format), __FUNCTION__);
2120 return format;
2121 }
2122 }
2123
2124
2125 /**
2126 * Given a surface format, return the corresponding format to use for
2127 * a texture sampler. In most cases, it's the format unchanged, but there
2128 * are some special cases.
2129 */
2130 SVGA3dSurfaceFormat
2131 svga_sampler_format(SVGA3dSurfaceFormat format)
2132 {
2133 switch (format) {
2134 case SVGA3D_D16_UNORM:
2135 return SVGA3D_R16_UNORM;
2136 case SVGA3D_D24_UNORM_S8_UINT:
2137 return SVGA3D_R24_UNORM_X8;
2138 case SVGA3D_D32_FLOAT:
2139 return SVGA3D_R32_FLOAT;
2140 case SVGA3D_D32_FLOAT_S8X24_UINT:
2141 return SVGA3D_R32_FLOAT_X8X24;
2142 default:
2143 return format;
2144 }
2145 }
2146
2147
2148 /**
2149 * Is the given format an uncompressed snorm format?
2150 */
2151 bool
2152 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2153 {
2154 switch (format) {
2155 case SVGA3D_R8G8B8A8_SNORM:
2156 case SVGA3D_R8G8_SNORM:
2157 case SVGA3D_R8_SNORM:
2158 case SVGA3D_R16G16B16A16_SNORM:
2159 case SVGA3D_R16G16_SNORM:
2160 case SVGA3D_R16_SNORM:
2161 return true;
2162 default:
2163 return false;
2164 }
2165 }
2166
2167
2168 bool
2169 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2170 {
2171 switch (format) {
2172 case SVGA3D_R32G32B32A32_TYPELESS:
2173 case SVGA3D_R32G32B32_TYPELESS:
2174 case SVGA3D_R16G16B16A16_TYPELESS:
2175 case SVGA3D_R32G32_TYPELESS:
2176 case SVGA3D_R32G8X24_TYPELESS:
2177 case SVGA3D_R10G10B10A2_TYPELESS:
2178 case SVGA3D_R8G8B8A8_TYPELESS:
2179 case SVGA3D_R16G16_TYPELESS:
2180 case SVGA3D_R32_TYPELESS:
2181 case SVGA3D_R24G8_TYPELESS:
2182 case SVGA3D_R8G8_TYPELESS:
2183 case SVGA3D_R16_TYPELESS:
2184 case SVGA3D_R8_TYPELESS:
2185 case SVGA3D_BC1_TYPELESS:
2186 case SVGA3D_BC2_TYPELESS:
2187 case SVGA3D_BC3_TYPELESS:
2188 case SVGA3D_BC4_TYPELESS:
2189 case SVGA3D_BC5_TYPELESS:
2190 case SVGA3D_B8G8R8A8_TYPELESS:
2191 case SVGA3D_B8G8R8X8_TYPELESS:
2192 return true;
2193 default:
2194 return false;
2195 }
2196 }
2197
2198
2199 /**
2200 * \brief Can we import a surface with a given SVGA3D format as a texture?
2201 *
2202 * \param ss[in] pointer to the svga screen.
2203 * \param pformat[in] pipe format of the local texture.
2204 * \param sformat[in] svga3d format of the imported surface.
2205 * \param bind[in] bind flags of the imported texture.
2206 * \param verbose[in] Print out incompatibilities in debug mode.
2207 */
2208 bool
2209 svga_format_is_shareable(const struct svga_screen *ss,
2210 enum pipe_format pformat,
2211 SVGA3dSurfaceFormat sformat,
2212 unsigned bind,
2213 bool verbose)
2214 {
2215 SVGA3dSurfaceFormat default_format =
2216 svga_translate_format(ss, pformat, bind);
2217 int i;
2218
2219 if (default_format == SVGA3D_FORMAT_INVALID)
2220 return false;
2221 if (default_format == sformat)
2222 return true;
2223
2224 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2225 if (format_compats[i].pformat == pformat) {
2226 const SVGA3dSurfaceFormat *compat_format =
2227 format_compats[i].compat_format;
2228 while (*compat_format != 0) {
2229 if (*compat_format == sformat)
2230 return true;
2231 compat_format++;
2232 }
2233 }
2234 }
2235
2236 if (verbose) {
2237 debug_printf("Incompatible imported surface format.\n");
2238 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2239 svga_format_name(default_format),
2240 svga_format_name(sformat));
2241 }
2242
2243 return false;
2244 }
2245
2246
2247 /**
2248 * Return the sRGB format which corresponds to the given (linear) format.
2249 * If there's no such sRGB format, return the format as-is.
2250 */
2251 SVGA3dSurfaceFormat
2252 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2253 {
2254 switch (format) {
2255 case SVGA3D_R8G8B8A8_UNORM:
2256 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2257 case SVGA3D_BC1_UNORM:
2258 return SVGA3D_BC1_UNORM_SRGB;
2259 case SVGA3D_BC2_UNORM:
2260 return SVGA3D_BC2_UNORM_SRGB;
2261 case SVGA3D_BC3_UNORM:
2262 return SVGA3D_BC3_UNORM_SRGB;
2263 case SVGA3D_B8G8R8A8_UNORM:
2264 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2265 case SVGA3D_B8G8R8X8_UNORM:
2266 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2267 default:
2268 return format;
2269 }
2270 }
2271
2272
2273 /**
2274 * Implement pipe_screen::is_format_supported().
2275 * \param bindings bitmask of PIPE_BIND_x flags
2276 */
2277 boolean
2278 svga_is_format_supported(struct pipe_screen *screen,
2279 enum pipe_format format,
2280 enum pipe_texture_target target,
2281 unsigned sample_count,
2282 unsigned storage_sample_count,
2283 unsigned bindings)
2284 {
2285 struct svga_screen *ss = svga_screen(screen);
2286 SVGA3dSurfaceFormat svga_format;
2287 SVGA3dSurfaceFormatCaps caps;
2288 SVGA3dSurfaceFormatCaps mask;
2289
2290 assert(bindings);
2291 assert(!ss->sws->have_vgpu10);
2292
2293 /* Multisamples is not supported in VGPU9 device */
2294 if (sample_count > 1)
2295 return FALSE;
2296
2297 svga_format = svga_translate_format(ss, format, bindings);
2298 if (svga_format == SVGA3D_FORMAT_INVALID) {
2299 return FALSE;
2300 }
2301
2302 if (util_format_is_srgb(format) &&
2303 (bindings & PIPE_BIND_DISPLAY_TARGET)) {
2304 /* We only support sRGB rendering with vgpu10 */
2305 return FALSE;
2306 }
2307
2308 /*
2309 * Override host capabilities, so that we end up with the same
2310 * visuals for all virtual hardware implementations.
2311 */
2312 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2313 switch (svga_format) {
2314 case SVGA3D_A8R8G8B8:
2315 case SVGA3D_X8R8G8B8:
2316 case SVGA3D_R5G6B5:
2317 break;
2318
2319 /* VGPU10 formats */
2320 case SVGA3D_B8G8R8A8_UNORM:
2321 case SVGA3D_B8G8R8X8_UNORM:
2322 case SVGA3D_B5G6R5_UNORM:
2323 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2324 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2325 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2326 break;
2327
2328 /* Often unsupported/problematic. This means we end up with the same
2329 * visuals for all virtual hardware implementations.
2330 */
2331 case SVGA3D_A4R4G4B4:
2332 case SVGA3D_A1R5G5B5:
2333 return FALSE;
2334
2335 default:
2336 return FALSE;
2337 }
2338 }
2339
2340 /*
2341 * Query the host capabilities.
2342 */
2343 svga_get_format_cap(ss, svga_format, &caps);
2344
2345 if (bindings & PIPE_BIND_RENDER_TARGET) {
2346 /* Check that the color surface is blendable, unless it's an
2347 * integer format.
2348 */
2349 if (!svga_format_is_integer(svga_format) &&
2350 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2351 return FALSE;
2352 }
2353 }
2354
2355 mask.value = 0;
2356 if (bindings & PIPE_BIND_RENDER_TARGET)
2357 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2358
2359 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2360 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2361
2362 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2363 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2364
2365 if (target == PIPE_TEXTURE_CUBE)
2366 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2367 else if (target == PIPE_TEXTURE_3D)
2368 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2369
2370 return (caps.value & mask.value) == mask.value;
2371 }
2372
2373
2374 /**
2375 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2376 * \param bindings bitmask of PIPE_BIND_x flags
2377 */
2378 boolean
2379 svga_is_dx_format_supported(struct pipe_screen *screen,
2380 enum pipe_format format,
2381 enum pipe_texture_target target,
2382 unsigned sample_count,
2383 unsigned storage_sample_count,
2384 unsigned bindings)
2385 {
2386 struct svga_screen *ss = svga_screen(screen);
2387 SVGA3dSurfaceFormat svga_format;
2388 SVGA3dDevCapResult caps;
2389 unsigned int mask = 0;
2390
2391 assert(bindings);
2392 assert(ss->sws->have_vgpu10);
2393
2394 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2395 return false;
2396
2397 if (sample_count > 1) {
2398 /* In ms_samples, if bit N is set it means that we support
2399 * multisample with N+1 samples per pixel.
2400 */
2401 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2402 return FALSE;
2403 }
2404 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2405 }
2406
2407 /*
2408 * For VGPU10 vertex formats, skip querying host capabilities
2409 */
2410
2411 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2412 SVGA3dSurfaceFormat svga_format;
2413 unsigned flags;
2414 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2415 return svga_format != SVGA3D_FORMAT_INVALID;
2416 }
2417
2418 svga_format = svga_translate_format(ss, format, bindings);
2419 if (svga_format == SVGA3D_FORMAT_INVALID) {
2420 return FALSE;
2421 }
2422
2423 /*
2424 * Override host capabilities, so that we end up with the same
2425 * visuals for all virtual hardware implementations.
2426 */
2427 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2428 switch (svga_format) {
2429 case SVGA3D_A8R8G8B8:
2430 case SVGA3D_X8R8G8B8:
2431 case SVGA3D_R5G6B5:
2432 break;
2433
2434 /* VGPU10 formats */
2435 case SVGA3D_B8G8R8A8_UNORM:
2436 case SVGA3D_B8G8R8X8_UNORM:
2437 case SVGA3D_B5G6R5_UNORM:
2438 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2439 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2440 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2441 break;
2442
2443 /* Often unsupported/problematic. This means we end up with the same
2444 * visuals for all virtual hardware implementations.
2445 */
2446 case SVGA3D_A4R4G4B4:
2447 case SVGA3D_A1R5G5B5:
2448 return FALSE;
2449
2450 default:
2451 return FALSE;
2452 }
2453 }
2454
2455 /*
2456 * Query the host capabilities.
2457 */
2458 svga_get_dx_format_cap(ss, svga_format, &caps);
2459
2460 if (bindings & PIPE_BIND_RENDER_TARGET) {
2461 /* Check that the color surface is blendable, unless it's an
2462 * integer format.
2463 */
2464 if (!(svga_format_is_integer(svga_format) ||
2465 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2466 return FALSE;
2467 }
2468 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2469 }
2470
2471 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2472 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2473
2474 switch (target) {
2475 case PIPE_TEXTURE_3D:
2476 mask |= SVGA3D_DXFMT_VOLUME;
2477 break;
2478 case PIPE_TEXTURE_1D_ARRAY:
2479 case PIPE_TEXTURE_2D_ARRAY:
2480 case PIPE_TEXTURE_CUBE_ARRAY:
2481 mask |= SVGA3D_DXFMT_ARRAY;
2482 break;
2483 default:
2484 break;
2485 }
2486
2487 /* Is the format supported for rendering */
2488 if ((caps.u & mask) != mask)
2489 return FALSE;
2490
2491 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2492 SVGA3dSurfaceFormat sampler_format;
2493
2494 /* Get the sampler view format */
2495 sampler_format = svga_sampler_format(svga_format);
2496 if (sampler_format != svga_format) {
2497 caps.u = 0;
2498 svga_get_dx_format_cap(ss, sampler_format, &caps);
2499 mask &= SVGA3D_DXFMT_VOLUME;
2500 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2501 if ((caps.u & mask) != mask)
2502 return FALSE;
2503 }
2504 }
2505
2506 return TRUE;
2507 }