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svga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutput
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
44 unsigned flags;
45 };
46
47 struct format_compat_entry
48 {
49 enum pipe_format pformat;
50 const SVGA3dSurfaceFormat *compat_format;
51 };
52
53
54 /**
55 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
56 * Note: the table is ordered according to PIPE_FORMAT_x order.
57 */
58 static const struct vgpu10_format_entry format_conversion_table[] =
59 {
60 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
61 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
66 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
67 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
69 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
70 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
71 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X},
72 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
73 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
74 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
75 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
77 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
78 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
80 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
81 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
83 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
84 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
85 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
86 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
87 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
90 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
91 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
92 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
93 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
94 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
95 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
98 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
99 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
100 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
101 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
102 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
103 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
104 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
105 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
106 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
107 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
108 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
109 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
110 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
111 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
112 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
113 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
114 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
115 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
116 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
117 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
118 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
119 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
120 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
121 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
122 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
123 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
124 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
125 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
126 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
127 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
128 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
129 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
130 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
131 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
132 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
133 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
134 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
136 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
137 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
138 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
139 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
140 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
141 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
144 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
145 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
146 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
147 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
148 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
149 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
150 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
153 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
154 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
156 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
157 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
160 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
161 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
162 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
163 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
164 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
165 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
166 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
167 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
168 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
169 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
170 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
171 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
172 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
179 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
180 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
181 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
182 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
185 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
186 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
187 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
193 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
202 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
203 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
204 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
217 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
218 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
219 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
220 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
221 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
222 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
223 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
224 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
228 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
229 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
230 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
231 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
232 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
233 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
234 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
235 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
236 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
237 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
238 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
239 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
240 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
241 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
242 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
243 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
244 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
245 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
246 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
247 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
248 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
249 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
250 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
251 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
252 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
253 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
254 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
255 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
256 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
258 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
259 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
260 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
262 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
263 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
264 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
265 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
266 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
267 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
268 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
269 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
270 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
271 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
272 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
273 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
274 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
275 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
276 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
277 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
278 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
279 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
280 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
281 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
282 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
283 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
284 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
285 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
286 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
309 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
315 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
364 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
365 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
366 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
367 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
368 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
369 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
370 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
371 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
372 { PIPE_FORMAT_A4B4G4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
373 };
374
375
376 /**
377 * Translate a gallium vertex format to a vgpu10 vertex format.
378 * Also, return any special vertex format flags.
379 */
380 void
381 svga_translate_vertex_format_vgpu10(enum pipe_format format,
382 SVGA3dSurfaceFormat *svga_format,
383 unsigned *vf_flags)
384 {
385 assert(format < ARRAY_SIZE(format_conversion_table));
386 if (format >= ARRAY_SIZE(format_conversion_table)) {
387 format = PIPE_FORMAT_NONE;
388 }
389 *svga_format = format_conversion_table[format].vertex_format;
390 *vf_flags = format_conversion_table[format].flags;
391 }
392
393
394 /**
395 * Translate a gallium pixel format to a vgpu10 format
396 * to be used in a shader resource view for a texture buffer.
397 * Also return any special texture format flags such as
398 * any special swizzle mask.
399 */
400 void
401 svga_translate_texture_buffer_view_format(enum pipe_format format,
402 SVGA3dSurfaceFormat *svga_format,
403 unsigned *tf_flags)
404 {
405 assert(format < ARRAY_SIZE(format_conversion_table));
406 if (format >= ARRAY_SIZE(format_conversion_table)) {
407 format = PIPE_FORMAT_NONE;
408 }
409 *svga_format = format_conversion_table[format].view_format;
410 *tf_flags = format_conversion_table[format].flags;
411 }
412
413
414 /**
415 * Translate a gallium scanout format to a svga format valid
416 * for screen target surface.
417 */
418 static SVGA3dSurfaceFormat
419 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
420 {
421 switch (format) {
422 case PIPE_FORMAT_B8G8R8A8_UNORM:
423 return SVGA3D_B8G8R8A8_UNORM;
424 case PIPE_FORMAT_B8G8R8X8_UNORM:
425 return SVGA3D_B8G8R8X8_UNORM;
426 case PIPE_FORMAT_B5G6R5_UNORM:
427 return SVGA3D_R5G6B5;
428 case PIPE_FORMAT_B5G5R5A1_UNORM:
429 return SVGA3D_A1R5G5B5;
430 default:
431 debug_printf("Invalid format %s specified for screen target\n",
432 svga_format_name(format));
433 return SVGA3D_FORMAT_INVALID;
434 }
435 }
436
437 /*
438 * Translate from gallium format to SVGA3D format.
439 */
440 SVGA3dSurfaceFormat
441 svga_translate_format(const struct svga_screen *ss,
442 enum pipe_format format,
443 unsigned bind)
444 {
445 if (ss->sws->have_vgpu10) {
446 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
447 return format_conversion_table[format].vertex_format;
448 }
449 else if (bind & PIPE_BIND_SCANOUT) {
450 return svga_translate_screen_target_format_vgpu10(format);
451 }
452 else {
453 return format_conversion_table[format].pixel_format;
454 }
455 }
456
457 switch(format) {
458 case PIPE_FORMAT_B8G8R8A8_UNORM:
459 return SVGA3D_A8R8G8B8;
460 case PIPE_FORMAT_B8G8R8X8_UNORM:
461 return SVGA3D_X8R8G8B8;
462
463 /* sRGB required for GL2.1 */
464 case PIPE_FORMAT_B8G8R8A8_SRGB:
465 return SVGA3D_A8R8G8B8;
466 case PIPE_FORMAT_DXT1_SRGB:
467 case PIPE_FORMAT_DXT1_SRGBA:
468 return SVGA3D_DXT1;
469 case PIPE_FORMAT_DXT3_SRGBA:
470 return SVGA3D_DXT3;
471 case PIPE_FORMAT_DXT5_SRGBA:
472 return SVGA3D_DXT5;
473
474 case PIPE_FORMAT_B5G6R5_UNORM:
475 return SVGA3D_R5G6B5;
476 case PIPE_FORMAT_B5G5R5A1_UNORM:
477 return SVGA3D_A1R5G5B5;
478 case PIPE_FORMAT_B4G4R4A4_UNORM:
479 return SVGA3D_A4R4G4B4;
480
481 case PIPE_FORMAT_R16G16B16A16_UNORM:
482 return SVGA3D_A16B16G16R16;
483
484 case PIPE_FORMAT_Z16_UNORM:
485 assert(!ss->sws->have_vgpu10);
486 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
487 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
488 assert(!ss->sws->have_vgpu10);
489 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
490 case PIPE_FORMAT_X8Z24_UNORM:
491 assert(!ss->sws->have_vgpu10);
492 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
493
494 case PIPE_FORMAT_A8_UNORM:
495 return SVGA3D_ALPHA8;
496 case PIPE_FORMAT_L8_UNORM:
497 return SVGA3D_LUMINANCE8;
498
499 case PIPE_FORMAT_DXT1_RGB:
500 case PIPE_FORMAT_DXT1_RGBA:
501 return SVGA3D_DXT1;
502 case PIPE_FORMAT_DXT3_RGBA:
503 return SVGA3D_DXT3;
504 case PIPE_FORMAT_DXT5_RGBA:
505 return SVGA3D_DXT5;
506
507 /* Float formats (only 1, 2 and 4-component formats supported) */
508 case PIPE_FORMAT_R32_FLOAT:
509 return SVGA3D_R_S23E8;
510 case PIPE_FORMAT_R32G32_FLOAT:
511 return SVGA3D_RG_S23E8;
512 case PIPE_FORMAT_R32G32B32A32_FLOAT:
513 return SVGA3D_ARGB_S23E8;
514 case PIPE_FORMAT_R16_FLOAT:
515 return SVGA3D_R_S10E5;
516 case PIPE_FORMAT_R16G16_FLOAT:
517 return SVGA3D_RG_S10E5;
518 case PIPE_FORMAT_R16G16B16A16_FLOAT:
519 return SVGA3D_ARGB_S10E5;
520
521 case PIPE_FORMAT_Z32_UNORM:
522 /* SVGA3D_Z_D32 is not yet unsupported */
523 /* fall-through */
524 default:
525 return SVGA3D_FORMAT_INVALID;
526 }
527 }
528
529
530 /*
531 * Format capability description entry.
532 */
533 struct format_cap {
534 const char *name;
535
536 SVGA3dSurfaceFormat format;
537
538 /*
539 * Capability index corresponding to the format.
540 */
541 SVGA3dDevCapIndex devcap;
542
543 /* size of each pixel/block */
544 unsigned block_width, block_height, block_bytes;
545
546 /*
547 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
548 * capability is not explicitly present.
549 */
550 uint32 defaultOperations;
551 };
552
553
554 /*
555 * Format capability description table.
556 *
557 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
558 */
559 static const struct format_cap format_cap_table[] = {
560 {
561 "SVGA3D_FORMAT_INVALID",
562 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
563 },
564 {
565 "SVGA3D_X8R8G8B8",
566 SVGA3D_X8R8G8B8,
567 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
568 1, 1, 4,
569 SVGA3DFORMAT_OP_TEXTURE |
570 SVGA3DFORMAT_OP_CUBETEXTURE |
571 SVGA3DFORMAT_OP_VOLUMETEXTURE |
572 SVGA3DFORMAT_OP_DISPLAYMODE |
573 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
574 },
575 {
576 "SVGA3D_A8R8G8B8",
577 SVGA3D_A8R8G8B8,
578 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
579 1, 1, 4,
580 SVGA3DFORMAT_OP_TEXTURE |
581 SVGA3DFORMAT_OP_CUBETEXTURE |
582 SVGA3DFORMAT_OP_VOLUMETEXTURE |
583 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
584 },
585 {
586 "SVGA3D_R5G6B5",
587 SVGA3D_R5G6B5,
588 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
589 1, 1, 2,
590 SVGA3DFORMAT_OP_TEXTURE |
591 SVGA3DFORMAT_OP_CUBETEXTURE |
592 SVGA3DFORMAT_OP_VOLUMETEXTURE |
593 SVGA3DFORMAT_OP_DISPLAYMODE |
594 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
595 },
596 {
597 "SVGA3D_X1R5G5B5",
598 SVGA3D_X1R5G5B5,
599 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
600 1, 1, 2,
601 SVGA3DFORMAT_OP_TEXTURE |
602 SVGA3DFORMAT_OP_CUBETEXTURE |
603 SVGA3DFORMAT_OP_VOLUMETEXTURE |
604 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
605 },
606 {
607 "SVGA3D_A1R5G5B5",
608 SVGA3D_A1R5G5B5,
609 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
610 1, 1, 2,
611 SVGA3DFORMAT_OP_TEXTURE |
612 SVGA3DFORMAT_OP_CUBETEXTURE |
613 SVGA3DFORMAT_OP_VOLUMETEXTURE |
614 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
615 },
616 {
617 "SVGA3D_A4R4G4B4",
618 SVGA3D_A4R4G4B4,
619 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
620 1, 1, 2,
621 SVGA3DFORMAT_OP_TEXTURE |
622 SVGA3DFORMAT_OP_CUBETEXTURE |
623 SVGA3DFORMAT_OP_VOLUMETEXTURE |
624 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
625 },
626 {
627 /*
628 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
629 * SVGA3D_DEVCAP_xxx.
630 */
631 "SVGA3D_Z_D32",
632 SVGA3D_Z_D32, 0, 0, 0, 0, 0
633 },
634 {
635 "SVGA3D_Z_D16",
636 SVGA3D_Z_D16,
637 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
638 1, 1, 2,
639 SVGA3DFORMAT_OP_ZSTENCIL
640 },
641 {
642 "SVGA3D_Z_D24S8",
643 SVGA3D_Z_D24S8,
644 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
645 1, 1, 4,
646 SVGA3DFORMAT_OP_ZSTENCIL
647 },
648 {
649 "SVGA3D_Z_D15S1",
650 SVGA3D_Z_D15S1,
651 SVGA3D_DEVCAP_MAX,
652 1, 1, 2,
653 SVGA3DFORMAT_OP_ZSTENCIL
654 },
655 {
656 "SVGA3D_LUMINANCE8",
657 SVGA3D_LUMINANCE8,
658 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
659 1, 1, 1,
660 SVGA3DFORMAT_OP_TEXTURE |
661 SVGA3DFORMAT_OP_CUBETEXTURE |
662 SVGA3DFORMAT_OP_VOLUMETEXTURE
663 },
664 {
665 /*
666 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
667 * SVGA3D_DEVCAP_xxx.
668 */
669 "SVGA3D_LUMINANCE4_ALPHA4",
670 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
671 },
672 {
673 "SVGA3D_LUMINANCE16",
674 SVGA3D_LUMINANCE16,
675 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
676 1, 1, 2,
677 SVGA3DFORMAT_OP_TEXTURE |
678 SVGA3DFORMAT_OP_CUBETEXTURE |
679 SVGA3DFORMAT_OP_VOLUMETEXTURE
680 },
681 {
682 "SVGA3D_LUMINANCE8_ALPHA8",
683 SVGA3D_LUMINANCE8_ALPHA8,
684 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
685 1, 1, 2,
686 SVGA3DFORMAT_OP_TEXTURE |
687 SVGA3DFORMAT_OP_CUBETEXTURE |
688 SVGA3DFORMAT_OP_VOLUMETEXTURE
689 },
690 {
691 "SVGA3D_DXT1",
692 SVGA3D_DXT1,
693 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
694 4, 4, 8,
695 SVGA3DFORMAT_OP_TEXTURE |
696 SVGA3DFORMAT_OP_CUBETEXTURE
697 },
698 {
699 "SVGA3D_DXT2",
700 SVGA3D_DXT2,
701 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
702 4, 4, 8,
703 SVGA3DFORMAT_OP_TEXTURE |
704 SVGA3DFORMAT_OP_CUBETEXTURE
705 },
706 {
707 "SVGA3D_DXT3",
708 SVGA3D_DXT3,
709 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
710 4, 4, 16,
711 SVGA3DFORMAT_OP_TEXTURE |
712 SVGA3DFORMAT_OP_CUBETEXTURE
713 },
714 {
715 "SVGA3D_DXT4",
716 SVGA3D_DXT4,
717 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
718 4, 4, 16,
719 SVGA3DFORMAT_OP_TEXTURE |
720 SVGA3DFORMAT_OP_CUBETEXTURE
721 },
722 {
723 "SVGA3D_DXT5",
724 SVGA3D_DXT5,
725 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
726 4, 4, 8,
727 SVGA3DFORMAT_OP_TEXTURE |
728 SVGA3DFORMAT_OP_CUBETEXTURE
729 },
730 {
731 "SVGA3D_BUMPU8V8",
732 SVGA3D_BUMPU8V8,
733 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
734 1, 1, 2,
735 SVGA3DFORMAT_OP_TEXTURE |
736 SVGA3DFORMAT_OP_CUBETEXTURE |
737 SVGA3DFORMAT_OP_VOLUMETEXTURE
738 },
739 {
740 /*
741 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
742 * SVGA3D_DEVCAP_xxx.
743 */
744 "SVGA3D_BUMPL6V5U5",
745 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
746 },
747 {
748 "SVGA3D_BUMPX8L8V8U8",
749 SVGA3D_BUMPX8L8V8U8,
750 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
751 1, 1, 4,
752 SVGA3DFORMAT_OP_TEXTURE |
753 SVGA3DFORMAT_OP_CUBETEXTURE
754 },
755 {
756 "SVGA3D_FORMAT_DEAD1",
757 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
758 },
759 {
760 "SVGA3D_ARGB_S10E5",
761 SVGA3D_ARGB_S10E5,
762 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
763 1, 1, 2,
764 SVGA3DFORMAT_OP_TEXTURE |
765 SVGA3DFORMAT_OP_CUBETEXTURE |
766 SVGA3DFORMAT_OP_VOLUMETEXTURE |
767 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
768 },
769 {
770 "SVGA3D_ARGB_S23E8",
771 SVGA3D_ARGB_S23E8,
772 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
773 1, 1, 4,
774 SVGA3DFORMAT_OP_TEXTURE |
775 SVGA3DFORMAT_OP_CUBETEXTURE |
776 SVGA3DFORMAT_OP_VOLUMETEXTURE |
777 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
778 },
779 {
780 "SVGA3D_A2R10G10B10",
781 SVGA3D_A2R10G10B10,
782 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
783 1, 1, 4,
784 SVGA3DFORMAT_OP_TEXTURE |
785 SVGA3DFORMAT_OP_CUBETEXTURE |
786 SVGA3DFORMAT_OP_VOLUMETEXTURE |
787 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
788 },
789 {
790 /*
791 * SVGA3D_V8U8 is unsupported; it has no corresponding
792 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
793 */
794 "SVGA3D_V8U8",
795 SVGA3D_V8U8, 0, 0, 0, 0, 0
796 },
797 {
798 "SVGA3D_Q8W8V8U8",
799 SVGA3D_Q8W8V8U8,
800 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
801 1, 1, 4,
802 SVGA3DFORMAT_OP_TEXTURE |
803 SVGA3DFORMAT_OP_CUBETEXTURE
804 },
805 {
806 "SVGA3D_CxV8U8",
807 SVGA3D_CxV8U8,
808 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
809 1, 1, 2,
810 SVGA3DFORMAT_OP_TEXTURE
811 },
812 {
813 /*
814 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
815 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
816 */
817 "SVGA3D_X8L8V8U8",
818 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
819 },
820 {
821 "SVGA3D_A2W10V10U10",
822 SVGA3D_A2W10V10U10,
823 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
824 1, 1, 4,
825 SVGA3DFORMAT_OP_TEXTURE
826 },
827 {
828 "SVGA3D_ALPHA8",
829 SVGA3D_ALPHA8,
830 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
831 1, 1, 1,
832 SVGA3DFORMAT_OP_TEXTURE |
833 SVGA3DFORMAT_OP_CUBETEXTURE |
834 SVGA3DFORMAT_OP_VOLUMETEXTURE
835 },
836 {
837 "SVGA3D_R_S10E5",
838 SVGA3D_R_S10E5,
839 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
840 1, 1, 2,
841 SVGA3DFORMAT_OP_TEXTURE |
842 SVGA3DFORMAT_OP_VOLUMETEXTURE |
843 SVGA3DFORMAT_OP_CUBETEXTURE |
844 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
845 },
846 {
847 "SVGA3D_R_S23E8",
848 SVGA3D_R_S23E8,
849 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
850 1, 1, 4,
851 SVGA3DFORMAT_OP_TEXTURE |
852 SVGA3DFORMAT_OP_VOLUMETEXTURE |
853 SVGA3DFORMAT_OP_CUBETEXTURE |
854 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
855 },
856 {
857 "SVGA3D_RG_S10E5",
858 SVGA3D_RG_S10E5,
859 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
860 1, 1, 2,
861 SVGA3DFORMAT_OP_TEXTURE |
862 SVGA3DFORMAT_OP_VOLUMETEXTURE |
863 SVGA3DFORMAT_OP_CUBETEXTURE |
864 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
865 },
866 {
867 "SVGA3D_RG_S23E8",
868 SVGA3D_RG_S23E8,
869 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
870 1, 1, 4,
871 SVGA3DFORMAT_OP_TEXTURE |
872 SVGA3DFORMAT_OP_VOLUMETEXTURE |
873 SVGA3DFORMAT_OP_CUBETEXTURE |
874 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
875 },
876 {
877 /*
878 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
879 */
880 "SVGA3D_BUFFER",
881 SVGA3D_BUFFER, 0, 1, 1, 1, 0
882 },
883 {
884 "SVGA3D_Z_D24X8",
885 SVGA3D_Z_D24X8,
886 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
887 1, 1, 4,
888 SVGA3DFORMAT_OP_ZSTENCIL
889 },
890 {
891 "SVGA3D_V16U16",
892 SVGA3D_V16U16,
893 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
894 1, 1, 4,
895 SVGA3DFORMAT_OP_TEXTURE |
896 SVGA3DFORMAT_OP_CUBETEXTURE |
897 SVGA3DFORMAT_OP_VOLUMETEXTURE
898 },
899 {
900 "SVGA3D_G16R16",
901 SVGA3D_G16R16,
902 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
903 1, 1, 4,
904 SVGA3DFORMAT_OP_TEXTURE |
905 SVGA3DFORMAT_OP_CUBETEXTURE |
906 SVGA3DFORMAT_OP_VOLUMETEXTURE |
907 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
908 },
909 {
910 "SVGA3D_A16B16G16R16",
911 SVGA3D_A16B16G16R16,
912 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
913 1, 1, 8,
914 SVGA3DFORMAT_OP_TEXTURE |
915 SVGA3DFORMAT_OP_CUBETEXTURE |
916 SVGA3DFORMAT_OP_VOLUMETEXTURE |
917 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
918 },
919 {
920 "SVGA3D_UYVY",
921 SVGA3D_UYVY,
922 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
923 0, 0, 0, 0
924 },
925 {
926 "SVGA3D_YUY2",
927 SVGA3D_YUY2,
928 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
929 0, 0, 0, 0
930 },
931 {
932 "SVGA3D_NV12",
933 SVGA3D_NV12,
934 SVGA3D_DEVCAP_SURFACEFMT_NV12,
935 0, 0, 0, 0
936 },
937 {
938 "SVGA3D_AYUV",
939 SVGA3D_AYUV,
940 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
941 0, 0, 0, 0
942 },
943 {
944 "SVGA3D_R32G32B32A32_TYPELESS",
945 SVGA3D_R32G32B32A32_TYPELESS,
946 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
947 1, 1, 16, 0
948 },
949 {
950 "SVGA3D_R32G32B32A32_UINT",
951 SVGA3D_R32G32B32A32_UINT,
952 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
953 1, 1, 16, 0
954 },
955 {
956 "SVGA3D_R32G32B32A32_SINT",
957 SVGA3D_R32G32B32A32_SINT,
958 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
959 1, 1, 16, 0
960 },
961 {
962 "SVGA3D_R32G32B32_TYPELESS",
963 SVGA3D_R32G32B32_TYPELESS,
964 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
965 1, 1, 12, 0
966 },
967 {
968 "SVGA3D_R32G32B32_FLOAT",
969 SVGA3D_R32G32B32_FLOAT,
970 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
971 1, 1, 12, 0
972 },
973 {
974 "SVGA3D_R32G32B32_UINT",
975 SVGA3D_R32G32B32_UINT,
976 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
977 1, 1, 12, 0
978 },
979 {
980 "SVGA3D_R32G32B32_SINT",
981 SVGA3D_R32G32B32_SINT,
982 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
983 1, 1, 12, 0
984 },
985 {
986 "SVGA3D_R16G16B16A16_TYPELESS",
987 SVGA3D_R16G16B16A16_TYPELESS,
988 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
989 1, 1, 8, 0
990 },
991 {
992 "SVGA3D_R16G16B16A16_UINT",
993 SVGA3D_R16G16B16A16_UINT,
994 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
995 1, 1, 8, 0
996 },
997 {
998 "SVGA3D_R16G16B16A16_SNORM",
999 SVGA3D_R16G16B16A16_SNORM,
1000 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
1001 1, 1, 8, 0
1002 },
1003 {
1004 "SVGA3D_R16G16B16A16_SINT",
1005 SVGA3D_R16G16B16A16_SINT,
1006 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
1007 1, 1, 8, 0
1008 },
1009 {
1010 "SVGA3D_R32G32_TYPELESS",
1011 SVGA3D_R32G32_TYPELESS,
1012 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
1013 1, 1, 8, 0
1014 },
1015 {
1016 "SVGA3D_R32G32_UINT",
1017 SVGA3D_R32G32_UINT,
1018 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
1019 1, 1, 8, 0
1020 },
1021 {
1022 "SVGA3D_R32G32_SINT",
1023 SVGA3D_R32G32_SINT,
1024 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1025 1, 1, 8,
1026 0
1027 },
1028 {
1029 "SVGA3D_R32G8X24_TYPELESS",
1030 SVGA3D_R32G8X24_TYPELESS,
1031 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1032 1, 1, 8, 0
1033 },
1034 {
1035 "SVGA3D_D32_FLOAT_S8X24_UINT",
1036 SVGA3D_D32_FLOAT_S8X24_UINT,
1037 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
1038 1, 1, 8, 0
1039 },
1040 {
1041 "SVGA3D_R32_FLOAT_X8X24",
1042 SVGA3D_R32_FLOAT_X8X24,
1043 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
1044 1, 1, 8, 0
1045 },
1046 {
1047 "SVGA3D_X32_G8X24_UINT",
1048 SVGA3D_X32_G8X24_UINT,
1049 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
1050 1, 1, 4, 0
1051 },
1052 {
1053 "SVGA3D_R10G10B10A2_TYPELESS",
1054 SVGA3D_R10G10B10A2_TYPELESS,
1055 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1056 1, 1, 4, 0
1057 },
1058 {
1059 "SVGA3D_R10G10B10A2_UINT",
1060 SVGA3D_R10G10B10A2_UINT,
1061 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1062 1, 1, 4, 0
1063 },
1064 {
1065 "SVGA3D_R11G11B10_FLOAT",
1066 SVGA3D_R11G11B10_FLOAT,
1067 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1068 1, 1, 4, 0
1069 },
1070 {
1071 "SVGA3D_R8G8B8A8_TYPELESS",
1072 SVGA3D_R8G8B8A8_TYPELESS,
1073 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1074 1, 1, 4, 0
1075 },
1076 {
1077 "SVGA3D_R8G8B8A8_UNORM",
1078 SVGA3D_R8G8B8A8_UNORM,
1079 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1080 1, 1, 4, 0
1081 },
1082 {
1083 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1084 SVGA3D_R8G8B8A8_UNORM_SRGB,
1085 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1086 1, 1, 4, 0
1087 },
1088 {
1089 "SVGA3D_R8G8B8A8_UINT",
1090 SVGA3D_R8G8B8A8_UINT,
1091 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1092 1, 1, 4, 0
1093 },
1094 {
1095 "SVGA3D_R8G8B8A8_SINT",
1096 SVGA3D_R8G8B8A8_SINT,
1097 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1098 1, 1, 4, 0
1099 },
1100 {
1101 "SVGA3D_R16G16_TYPELESS",
1102 SVGA3D_R16G16_TYPELESS,
1103 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1104 1, 1, 4, 0
1105 },
1106 {
1107 "SVGA3D_R16G16_UINT",
1108 SVGA3D_R16G16_UINT,
1109 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1110 1, 1, 4, 0
1111 },
1112 {
1113 "SVGA3D_R16G16_SINT",
1114 SVGA3D_R16G16_SINT,
1115 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1116 1, 1, 4, 0
1117 },
1118 {
1119 "SVGA3D_R32_TYPELESS",
1120 SVGA3D_R32_TYPELESS,
1121 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1122 1, 1, 4, 0
1123 },
1124 {
1125 "SVGA3D_D32_FLOAT",
1126 SVGA3D_D32_FLOAT,
1127 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
1128 1, 1, 4, 0
1129 },
1130 {
1131 "SVGA3D_R32_UINT",
1132 SVGA3D_R32_UINT,
1133 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1134 1, 1, 4, 0
1135 },
1136 {
1137 "SVGA3D_R32_SINT",
1138 SVGA3D_R32_SINT,
1139 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1140 1, 1, 4, 0
1141 },
1142 {
1143 "SVGA3D_R24G8_TYPELESS",
1144 SVGA3D_R24G8_TYPELESS,
1145 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1146 1, 1, 4, 0
1147 },
1148 {
1149 "SVGA3D_D24_UNORM_S8_UINT",
1150 SVGA3D_D24_UNORM_S8_UINT,
1151 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1152 1, 1, 4, 0
1153 },
1154 {
1155 "SVGA3D_R24_UNORM_X8",
1156 SVGA3D_R24_UNORM_X8,
1157 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1158 1, 1, 4, 0
1159 },
1160 {
1161 "SVGA3D_X24_G8_UINT",
1162 SVGA3D_X24_G8_UINT,
1163 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1164 1, 1, 4, 0
1165 },
1166 {
1167 "SVGA3D_R8G8_TYPELESS",
1168 SVGA3D_R8G8_TYPELESS,
1169 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1170 1, 1, 2, 0
1171 },
1172 {
1173 "SVGA3D_R8G8_UNORM",
1174 SVGA3D_R8G8_UNORM,
1175 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1176 1, 1, 2, 0
1177 },
1178 {
1179 "SVGA3D_R8G8_UINT",
1180 SVGA3D_R8G8_UINT,
1181 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1182 1, 1, 2, 0
1183 },
1184 {
1185 "SVGA3D_R8G8_SINT",
1186 SVGA3D_R8G8_SINT,
1187 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1188 1, 1, 2, 0
1189 },
1190 {
1191 "SVGA3D_R16_TYPELESS",
1192 SVGA3D_R16_TYPELESS,
1193 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1194 1, 1, 2, 0
1195 },
1196 {
1197 "SVGA3D_R16_UNORM",
1198 SVGA3D_R16_UNORM,
1199 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1200 1, 1, 2, 0
1201 },
1202 {
1203 "SVGA3D_R16_UINT",
1204 SVGA3D_R16_UINT,
1205 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1206 1, 1, 2, 0
1207 },
1208 {
1209 "SVGA3D_R16_SNORM",
1210 SVGA3D_R16_SNORM,
1211 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1212 1, 1, 2, 0
1213 },
1214 {
1215 "SVGA3D_R16_SINT",
1216 SVGA3D_R16_SINT,
1217 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1218 1, 1, 2, 0
1219 },
1220 {
1221 "SVGA3D_R8_TYPELESS",
1222 SVGA3D_R8_TYPELESS,
1223 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1224 1, 1, 1, 0
1225 },
1226 {
1227 "SVGA3D_R8_UNORM",
1228 SVGA3D_R8_UNORM,
1229 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1230 1, 1, 1, 0
1231 },
1232 {
1233 "SVGA3D_R8_UINT",
1234 SVGA3D_R8_UINT,
1235 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1236 1, 1, 1, 0
1237 },
1238 {
1239 "SVGA3D_R8_SNORM",
1240 SVGA3D_R8_SNORM,
1241 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1242 1, 1, 1, 0
1243 },
1244 {
1245 "SVGA3D_R8_SINT",
1246 SVGA3D_R8_SINT,
1247 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1248 1, 1, 1, 0
1249 },
1250 {
1251 "SVGA3D_P8",
1252 SVGA3D_P8, 0, 0, 0, 0, 0
1253 },
1254 {
1255 "SVGA3D_R9G9B9E5_SHAREDEXP",
1256 SVGA3D_R9G9B9E5_SHAREDEXP,
1257 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1258 1, 1, 4, 0
1259 },
1260 {
1261 "SVGA3D_R8G8_B8G8_UNORM",
1262 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1263 },
1264 {
1265 "SVGA3D_G8R8_G8B8_UNORM",
1266 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1267 },
1268 {
1269 "SVGA3D_BC1_TYPELESS",
1270 SVGA3D_BC1_TYPELESS,
1271 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1272 4, 4, 8, 0
1273 },
1274 {
1275 "SVGA3D_BC1_UNORM_SRGB",
1276 SVGA3D_BC1_UNORM_SRGB,
1277 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1278 4, 4, 8, 0
1279 },
1280 {
1281 "SVGA3D_BC2_TYPELESS",
1282 SVGA3D_BC2_TYPELESS,
1283 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1284 4, 4, 16, 0
1285 },
1286 {
1287 "SVGA3D_BC2_UNORM_SRGB",
1288 SVGA3D_BC2_UNORM_SRGB,
1289 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1290 4, 4, 16, 0
1291 },
1292 {
1293 "SVGA3D_BC3_TYPELESS",
1294 SVGA3D_BC3_TYPELESS,
1295 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1296 4, 4, 16, 0
1297 },
1298 {
1299 "SVGA3D_BC3_UNORM_SRGB",
1300 SVGA3D_BC3_UNORM_SRGB,
1301 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1302 4, 4, 16, 0
1303 },
1304 {
1305 "SVGA3D_BC4_TYPELESS",
1306 SVGA3D_BC4_TYPELESS,
1307 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1308 4, 4, 8, 0
1309 },
1310 {
1311 "SVGA3D_ATI1",
1312 SVGA3D_ATI1, 0, 0, 0, 0, 0
1313 },
1314 {
1315 "SVGA3D_BC4_SNORM",
1316 SVGA3D_BC4_SNORM,
1317 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1318 4, 4, 8, 0
1319 },
1320 {
1321 "SVGA3D_BC5_TYPELESS",
1322 SVGA3D_BC5_TYPELESS,
1323 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1324 4, 4, 16, 0
1325 },
1326 {
1327 "SVGA3D_ATI2",
1328 SVGA3D_ATI2, 0, 0, 0, 0, 0
1329 },
1330 {
1331 "SVGA3D_BC5_SNORM",
1332 SVGA3D_BC5_SNORM,
1333 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1334 4, 4, 16, 0
1335 },
1336 {
1337 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1338 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1339 },
1340 {
1341 "SVGA3D_B8G8R8A8_TYPELESS",
1342 SVGA3D_B8G8R8A8_TYPELESS,
1343 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1344 1, 1, 4, 0
1345 },
1346 {
1347 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1348 SVGA3D_B8G8R8A8_UNORM_SRGB,
1349 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1350 1, 1, 4, 0
1351 },
1352 {
1353 "SVGA3D_B8G8R8X8_TYPELESS",
1354 SVGA3D_B8G8R8X8_TYPELESS,
1355 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1356 1, 1, 4, 0
1357 },
1358 {
1359 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1360 SVGA3D_B8G8R8X8_UNORM_SRGB,
1361 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1362 1, 1, 4, 0
1363 },
1364 {
1365 "SVGA3D_Z_DF16",
1366 SVGA3D_Z_DF16,
1367 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1368 1, 1, 2, 0
1369 },
1370 {
1371 "SVGA3D_Z_DF24",
1372 SVGA3D_Z_DF24,
1373 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1374 1, 1, 4, 0
1375 },
1376 {
1377 "SVGA3D_Z_D24S8_INT",
1378 SVGA3D_Z_D24S8_INT,
1379 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1380 1, 1, 4, 0
1381 },
1382 {
1383 "SVGA3D_YV12",
1384 SVGA3D_YV12, 0, 0, 0, 0, 0
1385 },
1386 {
1387 "SVGA3D_R32G32B32A32_FLOAT",
1388 SVGA3D_R32G32B32A32_FLOAT,
1389 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1390 1, 1, 16, 0
1391 },
1392 {
1393 "SVGA3D_R16G16B16A16_FLOAT",
1394 SVGA3D_R16G16B16A16_FLOAT,
1395 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1396 1, 1, 8, 0
1397 },
1398 {
1399 "SVGA3D_R16G16B16A16_UNORM",
1400 SVGA3D_R16G16B16A16_UNORM,
1401 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1402 1, 1, 8, 0
1403 },
1404 {
1405 "SVGA3D_R32G32_FLOAT",
1406 SVGA3D_R32G32_FLOAT,
1407 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1408 1, 1, 8, 0
1409 },
1410 {
1411 "SVGA3D_R10G10B10A2_UNORM",
1412 SVGA3D_R10G10B10A2_UNORM,
1413 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1414 1, 1, 4, 0
1415 },
1416 {
1417 "SVGA3D_R8G8B8A8_SNORM",
1418 SVGA3D_R8G8B8A8_SNORM,
1419 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1420 1, 1, 4, 0
1421 },
1422 {
1423 "SVGA3D_R16G16_FLOAT",
1424 SVGA3D_R16G16_FLOAT,
1425 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1426 1, 1, 4, 0
1427 },
1428 {
1429 "SVGA3D_R16G16_UNORM",
1430 SVGA3D_R16G16_UNORM,
1431 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1432 1, 1, 4, 0
1433 },
1434 {
1435 "SVGA3D_R16G16_SNORM",
1436 SVGA3D_R16G16_SNORM,
1437 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1438 1, 1, 4, 0
1439 },
1440 {
1441 "SVGA3D_R32_FLOAT",
1442 SVGA3D_R32_FLOAT,
1443 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1444 1, 1, 4, 0
1445 },
1446 {
1447 "SVGA3D_R8G8_SNORM",
1448 SVGA3D_R8G8_SNORM,
1449 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1450 1, 1, 2, 0
1451 },
1452 {
1453 "SVGA3D_R16_FLOAT",
1454 SVGA3D_R16_FLOAT,
1455 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1456 1, 1, 2, 0
1457 },
1458 {
1459 "SVGA3D_D16_UNORM",
1460 SVGA3D_D16_UNORM,
1461 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1462 1, 1, 2, 0
1463 },
1464 {
1465 "SVGA3D_A8_UNORM",
1466 SVGA3D_A8_UNORM,
1467 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1468 1, 1, 1, 0
1469 },
1470 {
1471 "SVGA3D_BC1_UNORM",
1472 SVGA3D_BC1_UNORM,
1473 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1474 4, 4, 8, 0
1475 },
1476 {
1477 "SVGA3D_BC2_UNORM",
1478 SVGA3D_BC2_UNORM,
1479 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1480 4, 4, 16, 0
1481 },
1482 {
1483 "SVGA3D_BC3_UNORM",
1484 SVGA3D_BC3_UNORM,
1485 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1486 4, 4, 16, 0
1487 },
1488 {
1489 "SVGA3D_B5G6R5_UNORM",
1490 SVGA3D_B5G6R5_UNORM,
1491 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1492 1, 1, 2, 0
1493 },
1494 {
1495 "SVGA3D_B5G5R5A1_UNORM",
1496 SVGA3D_B5G5R5A1_UNORM,
1497 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1498 1, 1, 2, 0
1499 },
1500 {
1501 "SVGA3D_B8G8R8A8_UNORM",
1502 SVGA3D_B8G8R8A8_UNORM,
1503 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1504 1, 1, 4, 0
1505 },
1506 {
1507 "SVGA3D_B8G8R8X8_UNORM",
1508 SVGA3D_B8G8R8X8_UNORM,
1509 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1510 1, 1, 4, 0
1511 },
1512 {
1513 "SVGA3D_BC4_UNORM",
1514 SVGA3D_BC4_UNORM,
1515 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1516 4, 4, 8, 0
1517 },
1518 {
1519 "SVGA3D_BC5_UNORM",
1520 SVGA3D_BC5_UNORM,
1521 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1522 4, 4, 16, 0
1523 }
1524 };
1525
1526 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1527 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1528 SVGA3D_B8G8R8A8_UNORM, 0
1529 };
1530 static const SVGA3dSurfaceFormat compat_r8[] = {
1531 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1532 };
1533 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1534 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1535 };
1536 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1537 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1538 };
1539
1540 static const struct format_compat_entry format_compats[] = {
1541 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1542 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1543 {PIPE_FORMAT_R8_UNORM, compat_r8},
1544 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1545 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1546 };
1547
1548 /**
1549 * Debug only:
1550 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1551 * 2. check that format_conversion_table[i].pformat == i.
1552 */
1553 static void
1554 check_format_tables(void)
1555 {
1556 static boolean first_call = TRUE;
1557
1558 if (first_call) {
1559 unsigned i;
1560
1561 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1562 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1563 assert(format_cap_table[i].format == i);
1564 }
1565
1566 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1567 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1568 assert(format_conversion_table[i].pformat == i);
1569 }
1570
1571 first_call = FALSE;
1572 }
1573 }
1574
1575
1576 /**
1577 * Return string name of an SVGA3dDevCapIndex value.
1578 * For debugging.
1579 */
1580 static const char *
1581 svga_devcap_name(SVGA3dDevCapIndex cap)
1582 {
1583 static const struct debug_named_value devcap_names[] = {
1584 /* Note, we only list the DXFMT devcaps so far */
1585 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1586 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1587 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1588 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1589 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1590 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1591 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1592 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1593 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1594 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1595 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1622 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1623 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1624 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1625 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1626 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1627 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1628 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1629 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1630 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1631 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1632 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1633 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1634 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1635 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1636 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1637 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1638 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1639 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1640 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1641 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1642 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1643 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1644 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1645 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1646 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1647 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1648 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1649 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1650 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1651 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1652 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1653 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1654 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1655 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1656 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1657 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1658 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1659 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1660 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1661 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1662 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1663 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1664 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1665 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1666 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1667 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1668 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1669 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1670 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1671 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1672 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1673 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1674 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1675 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1676 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1677 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1678 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1679 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1680 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1681 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1682 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1683 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1684 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1685 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1686 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1687 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1688 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1689 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1690 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1691 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1692 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1693 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1694 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1695 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1696 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1697 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1698 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1699 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1700 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1701 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1702 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1703 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1704 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1705 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1706 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1707 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1708 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1709 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1710 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1711 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1712 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1713 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1714 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1715 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1716 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1717 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1718 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1719 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1720 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1721 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1722 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1723 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1724 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1725 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1726 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1727 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1728 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1729 DEBUG_NAMED_VALUE_END,
1730 };
1731 return debug_dump_enum(devcap_names, cap);
1732 }
1733
1734
1735 /**
1736 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1737 * For debugging.
1738 */
1739 static const char *
1740 svga_devcap_format_flags(unsigned flags)
1741 {
1742 static const struct debug_named_value devcap_flags[] = {
1743 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1744 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1745 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1746 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1747 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1748 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1749 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1750 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1751 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1752 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1753 DEBUG_NAMED_VALUE_END
1754 };
1755
1756 return debug_dump_flags(devcap_flags, flags);
1757 }
1758
1759
1760 /*
1761 * Get format capabilities from the host. It takes in consideration
1762 * deprecated/unsupported formats, and formats which are implicitely assumed to
1763 * be supported when the host does not provide an explicit capability entry.
1764 */
1765 void
1766 svga_get_format_cap(struct svga_screen *ss,
1767 SVGA3dSurfaceFormat format,
1768 SVGA3dSurfaceFormatCaps *caps)
1769 {
1770 struct svga_winsys_screen *sws = ss->sws;
1771 SVGA3dDevCapResult result;
1772 const struct format_cap *entry;
1773
1774 #ifdef DEBUG
1775 check_format_tables();
1776 #else
1777 (void) check_format_tables;
1778 #endif
1779
1780 assert(format < ARRAY_SIZE(format_cap_table));
1781 entry = &format_cap_table[format];
1782 assert(entry->format == format);
1783
1784 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1785 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1786 caps->value = result.u;
1787 } else {
1788 /* Implicitly advertised format -- use default caps */
1789 caps->value = entry->defaultOperations;
1790 }
1791 }
1792
1793
1794 /*
1795 * Get DX format capabilities from VGPU10 device.
1796 */
1797 static void
1798 svga_get_dx_format_cap(struct svga_screen *ss,
1799 SVGA3dSurfaceFormat format,
1800 SVGA3dDevCapResult *caps)
1801 {
1802 struct svga_winsys_screen *sws = ss->sws;
1803 const struct format_cap *entry;
1804
1805 #ifdef DEBUG
1806 check_format_tables();
1807 #else
1808 (void) check_format_tables;
1809 #endif
1810
1811 assert(sws->have_vgpu10);
1812 assert(format < ARRAY_SIZE(format_cap_table));
1813 entry = &format_cap_table[format];
1814 assert(entry->format == format);
1815 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1816
1817 caps->u = 0;
1818 if (entry->devcap) {
1819 sws->get_cap(sws, entry->devcap, caps);
1820
1821 /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1822 * these formats but does not advertise the devcap.
1823 * So enable this bit here.
1824 */
1825 if (!sws->have_sm4_1 &&
1826 (format == SVGA3D_R32_FLOAT_X8X24 ||
1827 format == SVGA3D_R24_UNORM_X8)) {
1828 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1829 }
1830 }
1831
1832 if (0) {
1833 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1834 svga_format_name(format),
1835 svga_devcap_name(entry->devcap),
1836 caps->u,
1837 svga_devcap_format_flags(caps->u));
1838 }
1839 }
1840
1841
1842 void
1843 svga_format_size(SVGA3dSurfaceFormat format,
1844 unsigned *block_width,
1845 unsigned *block_height,
1846 unsigned *bytes_per_block)
1847 {
1848 assert(format < ARRAY_SIZE(format_cap_table));
1849 *block_width = format_cap_table[format].block_width;
1850 *block_height = format_cap_table[format].block_height;
1851 *bytes_per_block = format_cap_table[format].block_bytes;
1852 /* Make sure the table entry was valid */
1853 if (*block_width == 0)
1854 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1855 assert(*block_width);
1856 assert(*block_height);
1857 assert(*bytes_per_block);
1858 }
1859
1860
1861 const char *
1862 svga_format_name(SVGA3dSurfaceFormat format)
1863 {
1864 assert(format < ARRAY_SIZE(format_cap_table));
1865 return format_cap_table[format].name;
1866 }
1867
1868
1869 /**
1870 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1871 */
1872 boolean
1873 svga_format_is_integer(SVGA3dSurfaceFormat format)
1874 {
1875 switch (format) {
1876 case SVGA3D_R32G32B32A32_SINT:
1877 case SVGA3D_R32G32B32_SINT:
1878 case SVGA3D_R32G32_SINT:
1879 case SVGA3D_R32_SINT:
1880 case SVGA3D_R16G16B16A16_SINT:
1881 case SVGA3D_R16G16_SINT:
1882 case SVGA3D_R16_SINT:
1883 case SVGA3D_R8G8B8A8_SINT:
1884 case SVGA3D_R8G8_SINT:
1885 case SVGA3D_R8_SINT:
1886 case SVGA3D_R32G32B32A32_UINT:
1887 case SVGA3D_R32G32B32_UINT:
1888 case SVGA3D_R32G32_UINT:
1889 case SVGA3D_R32_UINT:
1890 case SVGA3D_R16G16B16A16_UINT:
1891 case SVGA3D_R16G16_UINT:
1892 case SVGA3D_R16_UINT:
1893 case SVGA3D_R8G8B8A8_UINT:
1894 case SVGA3D_R8G8_UINT:
1895 case SVGA3D_R8_UINT:
1896 case SVGA3D_R10G10B10A2_UINT:
1897 return TRUE;
1898 default:
1899 return FALSE;
1900 }
1901 }
1902
1903 boolean
1904 svga_format_support_gen_mips(enum pipe_format format)
1905 {
1906 assert(format < ARRAY_SIZE(format_conversion_table));
1907 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1908 }
1909
1910
1911 /**
1912 * Given a texture format, return the expected data type returned from
1913 * the texture sampler. For example, UNORM8 formats return floating point
1914 * values while SINT formats returned signed integer values.
1915 * Note: this function could be moved into the gallum u_format.[ch] code
1916 * if it's useful to anyone else.
1917 */
1918 enum tgsi_return_type
1919 svga_get_texture_datatype(enum pipe_format format)
1920 {
1921 const struct util_format_description *desc = util_format_description(format);
1922 enum tgsi_return_type t;
1923
1924 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1925 if (util_format_is_depth_or_stencil(format)) {
1926 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1927 }
1928 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1929 t = TGSI_RETURN_TYPE_FLOAT;
1930 }
1931 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1932 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1933 }
1934 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1935 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1936 }
1937 else {
1938 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1939 t = TGSI_RETURN_TYPE_FLOAT;
1940 }
1941 }
1942 else {
1943 /* compressed format, shared exponent format, etc. */
1944 switch (format) {
1945 case PIPE_FORMAT_DXT1_RGB:
1946 case PIPE_FORMAT_DXT1_RGBA:
1947 case PIPE_FORMAT_DXT3_RGBA:
1948 case PIPE_FORMAT_DXT5_RGBA:
1949 case PIPE_FORMAT_DXT1_SRGB:
1950 case PIPE_FORMAT_DXT1_SRGBA:
1951 case PIPE_FORMAT_DXT3_SRGBA:
1952 case PIPE_FORMAT_DXT5_SRGBA:
1953 case PIPE_FORMAT_RGTC1_UNORM:
1954 case PIPE_FORMAT_RGTC2_UNORM:
1955 case PIPE_FORMAT_LATC1_UNORM:
1956 case PIPE_FORMAT_LATC2_UNORM:
1957 case PIPE_FORMAT_ETC1_RGB8:
1958 t = TGSI_RETURN_TYPE_UNORM;
1959 break;
1960 case PIPE_FORMAT_RGTC1_SNORM:
1961 case PIPE_FORMAT_RGTC2_SNORM:
1962 case PIPE_FORMAT_LATC1_SNORM:
1963 case PIPE_FORMAT_LATC2_SNORM:
1964 case PIPE_FORMAT_R10G10B10X2_SNORM:
1965 t = TGSI_RETURN_TYPE_SNORM;
1966 break;
1967 case PIPE_FORMAT_R11G11B10_FLOAT:
1968 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1969 t = TGSI_RETURN_TYPE_FLOAT;
1970 break;
1971 default:
1972 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1973 t = TGSI_RETURN_TYPE_FLOAT;
1974 }
1975 }
1976
1977 return t;
1978 }
1979
1980
1981 /**
1982 * Given an svga context, return true iff there are currently any integer color
1983 * buffers attached to the framebuffer.
1984 */
1985 boolean
1986 svga_has_any_integer_cbufs(const struct svga_context *svga)
1987 {
1988 unsigned i;
1989 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1990 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1991
1992 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
1993 return TRUE;
1994 }
1995 }
1996 return FALSE;
1997 }
1998
1999
2000 /**
2001 * Given an SVGA format, return the corresponding typeless format.
2002 * If there is no typeless format, return the format unchanged.
2003 */
2004 SVGA3dSurfaceFormat
2005 svga_typeless_format(SVGA3dSurfaceFormat format)
2006 {
2007 switch (format) {
2008 case SVGA3D_R32G32B32A32_UINT:
2009 case SVGA3D_R32G32B32A32_SINT:
2010 case SVGA3D_R32G32B32A32_FLOAT:
2011 return SVGA3D_R32G32B32A32_TYPELESS;
2012 case SVGA3D_R32G32B32_FLOAT:
2013 case SVGA3D_R32G32B32_UINT:
2014 case SVGA3D_R32G32B32_SINT:
2015 return SVGA3D_R32G32B32_TYPELESS;
2016 case SVGA3D_R16G16B16A16_UINT:
2017 case SVGA3D_R16G16B16A16_UNORM:
2018 case SVGA3D_R16G16B16A16_SNORM:
2019 case SVGA3D_R16G16B16A16_SINT:
2020 case SVGA3D_R16G16B16A16_FLOAT:
2021 return SVGA3D_R16G16B16A16_TYPELESS;
2022 case SVGA3D_R32G32_UINT:
2023 case SVGA3D_R32G32_SINT:
2024 case SVGA3D_R32G32_FLOAT:
2025 return SVGA3D_R32G32_TYPELESS;
2026 case SVGA3D_D32_FLOAT_S8X24_UINT:
2027 case SVGA3D_X32_G8X24_UINT:
2028 case SVGA3D_R32G8X24_TYPELESS:
2029 return SVGA3D_R32G8X24_TYPELESS;
2030 case SVGA3D_R10G10B10A2_UINT:
2031 case SVGA3D_R10G10B10A2_UNORM:
2032 return SVGA3D_R10G10B10A2_TYPELESS;
2033 case SVGA3D_R8G8B8A8_UNORM:
2034 case SVGA3D_R8G8B8A8_SNORM:
2035 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2036 case SVGA3D_R8G8B8A8_UINT:
2037 case SVGA3D_R8G8B8A8_SINT:
2038 case SVGA3D_R8G8B8A8_TYPELESS:
2039 return SVGA3D_R8G8B8A8_TYPELESS;
2040 case SVGA3D_R16G16_UINT:
2041 case SVGA3D_R16G16_SINT:
2042 case SVGA3D_R16G16_UNORM:
2043 case SVGA3D_R16G16_SNORM:
2044 case SVGA3D_R16G16_FLOAT:
2045 return SVGA3D_R16G16_TYPELESS;
2046 case SVGA3D_D32_FLOAT:
2047 case SVGA3D_R32_FLOAT:
2048 case SVGA3D_R32_UINT:
2049 case SVGA3D_R32_SINT:
2050 case SVGA3D_R32_TYPELESS:
2051 return SVGA3D_R32_TYPELESS;
2052 case SVGA3D_D24_UNORM_S8_UINT:
2053 case SVGA3D_R24G8_TYPELESS:
2054 return SVGA3D_R24G8_TYPELESS;
2055 case SVGA3D_X24_G8_UINT:
2056 return SVGA3D_R24_UNORM_X8;
2057 case SVGA3D_R8G8_UNORM:
2058 case SVGA3D_R8G8_SNORM:
2059 case SVGA3D_R8G8_UINT:
2060 case SVGA3D_R8G8_SINT:
2061 return SVGA3D_R8G8_TYPELESS;
2062 case SVGA3D_D16_UNORM:
2063 case SVGA3D_R16_UNORM:
2064 case SVGA3D_R16_UINT:
2065 case SVGA3D_R16_SNORM:
2066 case SVGA3D_R16_SINT:
2067 case SVGA3D_R16_FLOAT:
2068 case SVGA3D_R16_TYPELESS:
2069 return SVGA3D_R16_TYPELESS;
2070 case SVGA3D_R8_UNORM:
2071 case SVGA3D_R8_UINT:
2072 case SVGA3D_R8_SNORM:
2073 case SVGA3D_R8_SINT:
2074 return SVGA3D_R8_TYPELESS;
2075 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2076 case SVGA3D_B8G8R8A8_UNORM:
2077 case SVGA3D_B8G8R8A8_TYPELESS:
2078 return SVGA3D_B8G8R8A8_TYPELESS;
2079 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2080 case SVGA3D_B8G8R8X8_UNORM:
2081 case SVGA3D_B8G8R8X8_TYPELESS:
2082 return SVGA3D_B8G8R8X8_TYPELESS;
2083 case SVGA3D_BC1_UNORM:
2084 case SVGA3D_BC1_UNORM_SRGB:
2085 case SVGA3D_BC1_TYPELESS:
2086 return SVGA3D_BC1_TYPELESS;
2087 case SVGA3D_BC2_UNORM:
2088 case SVGA3D_BC2_UNORM_SRGB:
2089 case SVGA3D_BC2_TYPELESS:
2090 return SVGA3D_BC2_TYPELESS;
2091 case SVGA3D_BC3_UNORM:
2092 case SVGA3D_BC3_UNORM_SRGB:
2093 case SVGA3D_BC3_TYPELESS:
2094 return SVGA3D_BC3_TYPELESS;
2095 case SVGA3D_BC4_UNORM:
2096 case SVGA3D_BC4_SNORM:
2097 return SVGA3D_BC4_TYPELESS;
2098 case SVGA3D_BC5_UNORM:
2099 case SVGA3D_BC5_SNORM:
2100 return SVGA3D_BC5_TYPELESS;
2101
2102 /* Special cases (no corresponding _TYPELESS formats) */
2103 case SVGA3D_A8_UNORM:
2104 case SVGA3D_B5G5R5A1_UNORM:
2105 case SVGA3D_B5G6R5_UNORM:
2106 case SVGA3D_R11G11B10_FLOAT:
2107 case SVGA3D_R9G9B9E5_SHAREDEXP:
2108 return format;
2109 default:
2110 debug_printf("Unexpected format %s in %s\n",
2111 svga_format_name(format), __FUNCTION__);
2112 return format;
2113 }
2114 }
2115
2116
2117 /**
2118 * Given a surface format, return the corresponding format to use for
2119 * a texture sampler. In most cases, it's the format unchanged, but there
2120 * are some special cases.
2121 */
2122 SVGA3dSurfaceFormat
2123 svga_sampler_format(SVGA3dSurfaceFormat format)
2124 {
2125 switch (format) {
2126 case SVGA3D_D16_UNORM:
2127 return SVGA3D_R16_UNORM;
2128 case SVGA3D_D24_UNORM_S8_UINT:
2129 return SVGA3D_R24_UNORM_X8;
2130 case SVGA3D_D32_FLOAT:
2131 return SVGA3D_R32_FLOAT;
2132 case SVGA3D_D32_FLOAT_S8X24_UINT:
2133 return SVGA3D_R32_FLOAT_X8X24;
2134 default:
2135 return format;
2136 }
2137 }
2138
2139
2140 /**
2141 * Is the given format an uncompressed snorm format?
2142 */
2143 bool
2144 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2145 {
2146 switch (format) {
2147 case SVGA3D_R8G8B8A8_SNORM:
2148 case SVGA3D_R8G8_SNORM:
2149 case SVGA3D_R8_SNORM:
2150 case SVGA3D_R16G16B16A16_SNORM:
2151 case SVGA3D_R16G16_SNORM:
2152 case SVGA3D_R16_SNORM:
2153 return true;
2154 default:
2155 return false;
2156 }
2157 }
2158
2159
2160 bool
2161 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2162 {
2163 switch (format) {
2164 case SVGA3D_R32G32B32A32_TYPELESS:
2165 case SVGA3D_R32G32B32_TYPELESS:
2166 case SVGA3D_R16G16B16A16_TYPELESS:
2167 case SVGA3D_R32G32_TYPELESS:
2168 case SVGA3D_R32G8X24_TYPELESS:
2169 case SVGA3D_R10G10B10A2_TYPELESS:
2170 case SVGA3D_R8G8B8A8_TYPELESS:
2171 case SVGA3D_R16G16_TYPELESS:
2172 case SVGA3D_R32_TYPELESS:
2173 case SVGA3D_R24G8_TYPELESS:
2174 case SVGA3D_R8G8_TYPELESS:
2175 case SVGA3D_R16_TYPELESS:
2176 case SVGA3D_R8_TYPELESS:
2177 case SVGA3D_BC1_TYPELESS:
2178 case SVGA3D_BC2_TYPELESS:
2179 case SVGA3D_BC3_TYPELESS:
2180 case SVGA3D_BC4_TYPELESS:
2181 case SVGA3D_BC5_TYPELESS:
2182 case SVGA3D_B8G8R8A8_TYPELESS:
2183 case SVGA3D_B8G8R8X8_TYPELESS:
2184 return true;
2185 default:
2186 return false;
2187 }
2188 }
2189
2190
2191 /**
2192 * \brief Can we import a surface with a given SVGA3D format as a texture?
2193 *
2194 * \param ss[in] pointer to the svga screen.
2195 * \param pformat[in] pipe format of the local texture.
2196 * \param sformat[in] svga3d format of the imported surface.
2197 * \param bind[in] bind flags of the imported texture.
2198 * \param verbose[in] Print out incompatibilities in debug mode.
2199 */
2200 bool
2201 svga_format_is_shareable(const struct svga_screen *ss,
2202 enum pipe_format pformat,
2203 SVGA3dSurfaceFormat sformat,
2204 unsigned bind,
2205 bool verbose)
2206 {
2207 SVGA3dSurfaceFormat default_format =
2208 svga_translate_format(ss, pformat, bind);
2209 int i;
2210
2211 if (default_format == SVGA3D_FORMAT_INVALID)
2212 return false;
2213 if (default_format == sformat)
2214 return true;
2215
2216 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2217 if (format_compats[i].pformat == pformat) {
2218 const SVGA3dSurfaceFormat *compat_format =
2219 format_compats[i].compat_format;
2220 while (*compat_format != 0) {
2221 if (*compat_format == sformat)
2222 return true;
2223 compat_format++;
2224 }
2225 }
2226 }
2227
2228 if (verbose) {
2229 debug_printf("Incompatible imported surface format.\n");
2230 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2231 svga_format_name(default_format),
2232 svga_format_name(sformat));
2233 }
2234
2235 return false;
2236 }
2237
2238
2239 /**
2240 * Return the sRGB format which corresponds to the given (linear) format.
2241 * If there's no such sRGB format, return the format as-is.
2242 */
2243 SVGA3dSurfaceFormat
2244 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2245 {
2246 switch (format) {
2247 case SVGA3D_R8G8B8A8_UNORM:
2248 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2249 case SVGA3D_BC1_UNORM:
2250 return SVGA3D_BC1_UNORM_SRGB;
2251 case SVGA3D_BC2_UNORM:
2252 return SVGA3D_BC2_UNORM_SRGB;
2253 case SVGA3D_BC3_UNORM:
2254 return SVGA3D_BC3_UNORM_SRGB;
2255 case SVGA3D_B8G8R8A8_UNORM:
2256 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2257 case SVGA3D_B8G8R8X8_UNORM:
2258 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2259 default:
2260 return format;
2261 }
2262 }
2263
2264
2265 /**
2266 * Implement pipe_screen::is_format_supported().
2267 * \param bindings bitmask of PIPE_BIND_x flags
2268 */
2269 boolean
2270 svga_is_format_supported(struct pipe_screen *screen,
2271 enum pipe_format format,
2272 enum pipe_texture_target target,
2273 unsigned sample_count,
2274 unsigned storage_sample_count,
2275 unsigned bindings)
2276 {
2277 struct svga_screen *ss = svga_screen(screen);
2278 SVGA3dSurfaceFormat svga_format;
2279 SVGA3dSurfaceFormatCaps caps;
2280 SVGA3dSurfaceFormatCaps mask;
2281
2282 assert(bindings);
2283 assert(!ss->sws->have_vgpu10);
2284
2285 /* Multisamples is not supported in VGPU9 device */
2286 if (sample_count > 1)
2287 return FALSE;
2288
2289 svga_format = svga_translate_format(ss, format, bindings);
2290 if (svga_format == SVGA3D_FORMAT_INVALID) {
2291 return FALSE;
2292 }
2293
2294 if (util_format_is_srgb(format) &&
2295 (bindings & PIPE_BIND_DISPLAY_TARGET)) {
2296 /* We only support sRGB rendering with vgpu10 */
2297 return FALSE;
2298 }
2299
2300 /*
2301 * Override host capabilities, so that we end up with the same
2302 * visuals for all virtual hardware implementations.
2303 */
2304 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2305 switch (svga_format) {
2306 case SVGA3D_A8R8G8B8:
2307 case SVGA3D_X8R8G8B8:
2308 case SVGA3D_R5G6B5:
2309 break;
2310
2311 /* VGPU10 formats */
2312 case SVGA3D_B8G8R8A8_UNORM:
2313 case SVGA3D_B8G8R8X8_UNORM:
2314 case SVGA3D_B5G6R5_UNORM:
2315 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2316 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2317 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2318 break;
2319
2320 /* Often unsupported/problematic. This means we end up with the same
2321 * visuals for all virtual hardware implementations.
2322 */
2323 case SVGA3D_A4R4G4B4:
2324 case SVGA3D_A1R5G5B5:
2325 return FALSE;
2326
2327 default:
2328 return FALSE;
2329 }
2330 }
2331
2332 /*
2333 * Query the host capabilities.
2334 */
2335 svga_get_format_cap(ss, svga_format, &caps);
2336
2337 if (bindings & PIPE_BIND_RENDER_TARGET) {
2338 /* Check that the color surface is blendable, unless it's an
2339 * integer format.
2340 */
2341 if (!svga_format_is_integer(svga_format) &&
2342 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2343 return FALSE;
2344 }
2345 }
2346
2347 mask.value = 0;
2348 if (bindings & PIPE_BIND_RENDER_TARGET)
2349 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2350
2351 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2352 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2353
2354 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2355 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2356
2357 if (target == PIPE_TEXTURE_CUBE)
2358 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2359 else if (target == PIPE_TEXTURE_3D)
2360 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2361
2362 return (caps.value & mask.value) == mask.value;
2363 }
2364
2365
2366 /**
2367 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2368 * \param bindings bitmask of PIPE_BIND_x flags
2369 */
2370 boolean
2371 svga_is_dx_format_supported(struct pipe_screen *screen,
2372 enum pipe_format format,
2373 enum pipe_texture_target target,
2374 unsigned sample_count,
2375 unsigned storage_sample_count,
2376 unsigned bindings)
2377 {
2378 struct svga_screen *ss = svga_screen(screen);
2379 SVGA3dSurfaceFormat svga_format;
2380 SVGA3dDevCapResult caps;
2381 unsigned int mask = 0;
2382
2383 assert(bindings);
2384 assert(ss->sws->have_vgpu10);
2385
2386 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2387 return false;
2388
2389 if (sample_count > 1) {
2390 /* In ms_samples, if bit N is set it means that we support
2391 * multisample with N+1 samples per pixel.
2392 */
2393 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2394 return FALSE;
2395 }
2396 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2397 }
2398
2399 /*
2400 * For VGPU10 vertex formats, skip querying host capabilities
2401 */
2402
2403 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2404 SVGA3dSurfaceFormat svga_format;
2405 unsigned flags;
2406 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2407 return svga_format != SVGA3D_FORMAT_INVALID;
2408 }
2409
2410 svga_format = svga_translate_format(ss, format, bindings);
2411 if (svga_format == SVGA3D_FORMAT_INVALID) {
2412 return FALSE;
2413 }
2414
2415 /*
2416 * Override host capabilities, so that we end up with the same
2417 * visuals for all virtual hardware implementations.
2418 */
2419 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2420 switch (svga_format) {
2421 case SVGA3D_A8R8G8B8:
2422 case SVGA3D_X8R8G8B8:
2423 case SVGA3D_R5G6B5:
2424 break;
2425
2426 /* VGPU10 formats */
2427 case SVGA3D_B8G8R8A8_UNORM:
2428 case SVGA3D_B8G8R8X8_UNORM:
2429 case SVGA3D_B5G6R5_UNORM:
2430 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2431 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2432 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2433 break;
2434
2435 /* Often unsupported/problematic. This means we end up with the same
2436 * visuals for all virtual hardware implementations.
2437 */
2438 case SVGA3D_A4R4G4B4:
2439 case SVGA3D_A1R5G5B5:
2440 return FALSE;
2441
2442 default:
2443 return FALSE;
2444 }
2445 }
2446
2447 /*
2448 * Query the host capabilities.
2449 */
2450 svga_get_dx_format_cap(ss, svga_format, &caps);
2451
2452 if (bindings & PIPE_BIND_RENDER_TARGET) {
2453 /* Check that the color surface is blendable, unless it's an
2454 * integer format.
2455 */
2456 if (!(svga_format_is_integer(svga_format) ||
2457 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2458 return FALSE;
2459 }
2460 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2461 }
2462
2463 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2464 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2465
2466 switch (target) {
2467 case PIPE_TEXTURE_3D:
2468 mask |= SVGA3D_DXFMT_VOLUME;
2469 break;
2470 case PIPE_TEXTURE_1D_ARRAY:
2471 case PIPE_TEXTURE_2D_ARRAY:
2472 case PIPE_TEXTURE_CUBE_ARRAY:
2473 mask |= SVGA3D_DXFMT_ARRAY;
2474 break;
2475 default:
2476 break;
2477 }
2478
2479 /* Is the format supported for rendering */
2480 if ((caps.u & mask) != mask)
2481 return FALSE;
2482
2483 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2484 SVGA3dSurfaceFormat sampler_format;
2485
2486 /* Get the sampler view format */
2487 sampler_format = svga_sampler_format(svga_format);
2488 if (sampler_format != svga_format) {
2489 caps.u = 0;
2490 svga_get_dx_format_cap(ss, sampler_format, &caps);
2491 mask &= SVGA3D_DXFMT_VOLUME;
2492 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2493 if ((caps.u & mask) != mask)
2494 return FALSE;
2495 }
2496 }
2497
2498 return TRUE;
2499 }