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radeonsi: add an si_set_rw_shader_buffer convenience function
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
44 unsigned flags;
45 };
46
47 struct format_compat_entry
48 {
49 enum pipe_format pformat;
50 const SVGA3dSurfaceFormat *compat_format;
51 };
52
53
54 /**
55 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
56 * Note: the table is ordered according to PIPE_FORMAT_x order.
57 */
58 static const struct vgpu10_format_entry format_conversion_table[] =
59 {
60 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
61 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
66 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
67 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
69 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
70 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
71 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X},
72 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
73 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
74 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
75 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
77 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
78 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
80 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
81 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
83 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
84 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
85 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
86 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
87 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
90 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
91 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
92 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
93 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
94 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
95 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
98 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
99 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
100 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
101 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
102 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
103 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
104 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
105 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
106 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
107 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
108 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
109 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
110 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
111 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
112 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
113 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
114 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
115 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
116 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
117 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
118 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
119 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
120 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
121 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
122 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
123 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
124 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
125 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
126 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
127 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
128 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
129 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
130 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
131 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
132 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
133 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
134 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
136 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
137 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
138 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
139 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
140 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
141 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
144 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
145 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
146 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
147 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
148 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
149 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
150 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
153 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
154 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
156 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
157 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
160 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
161 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
162 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
163 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
164 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
165 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
166 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
167 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
168 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
169 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
170 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
171 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
172 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
179 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
180 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
181 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
182 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
185 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
186 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
187 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
193 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
202 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
203 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
204 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
217 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
218 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
219 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
220 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
221 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
222 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
223 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
224 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
228 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
229 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
230 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
231 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
232 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
233 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
234 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
235 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
236 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
237 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
238 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
239 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
240 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
241 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
242 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
243 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
244 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
245 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
246 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
247 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
248 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
249 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
250 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
251 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
252 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
253 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
254 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
255 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
256 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
258 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
259 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
260 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
262 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
263 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
264 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
265 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
266 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
267 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
268 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
269 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
270 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
271 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
272 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
273 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
274 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
275 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
276 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
277 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
278 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
279 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
280 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
281 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
282 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
283 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
284 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
285 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
286 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
309 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
315 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
364 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
365 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
366 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
367 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
368 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
369 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
370 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
371 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
372 { PIPE_FORMAT_A4B4G4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
373 { PIPE_FORMAT_R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
374 };
375
376
377 /**
378 * Translate a gallium vertex format to a vgpu10 vertex format.
379 * Also, return any special vertex format flags.
380 */
381 void
382 svga_translate_vertex_format_vgpu10(enum pipe_format format,
383 SVGA3dSurfaceFormat *svga_format,
384 unsigned *vf_flags)
385 {
386 assert(format < ARRAY_SIZE(format_conversion_table));
387 if (format >= ARRAY_SIZE(format_conversion_table)) {
388 format = PIPE_FORMAT_NONE;
389 }
390 *svga_format = format_conversion_table[format].vertex_format;
391 *vf_flags = format_conversion_table[format].flags;
392 }
393
394
395 /**
396 * Translate a gallium pixel format to a vgpu10 format
397 * to be used in a shader resource view for a texture buffer.
398 * Also return any special texture format flags such as
399 * any special swizzle mask.
400 */
401 void
402 svga_translate_texture_buffer_view_format(enum pipe_format format,
403 SVGA3dSurfaceFormat *svga_format,
404 unsigned *tf_flags)
405 {
406 assert(format < ARRAY_SIZE(format_conversion_table));
407 if (format >= ARRAY_SIZE(format_conversion_table)) {
408 format = PIPE_FORMAT_NONE;
409 }
410 *svga_format = format_conversion_table[format].view_format;
411 *tf_flags = format_conversion_table[format].flags;
412 }
413
414
415 /**
416 * Translate a gallium scanout format to a svga format valid
417 * for screen target surface.
418 */
419 static SVGA3dSurfaceFormat
420 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
421 {
422 switch (format) {
423 case PIPE_FORMAT_B8G8R8A8_UNORM:
424 return SVGA3D_B8G8R8A8_UNORM;
425 case PIPE_FORMAT_B8G8R8X8_UNORM:
426 return SVGA3D_B8G8R8X8_UNORM;
427 case PIPE_FORMAT_B5G6R5_UNORM:
428 return SVGA3D_R5G6B5;
429 case PIPE_FORMAT_B5G5R5A1_UNORM:
430 return SVGA3D_A1R5G5B5;
431 default:
432 debug_printf("Invalid format %s specified for screen target\n",
433 svga_format_name(format));
434 return SVGA3D_FORMAT_INVALID;
435 }
436 }
437
438 /*
439 * Translate from gallium format to SVGA3D format.
440 */
441 SVGA3dSurfaceFormat
442 svga_translate_format(const struct svga_screen *ss,
443 enum pipe_format format,
444 unsigned bind)
445 {
446 if (ss->sws->have_vgpu10) {
447 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
448 return format_conversion_table[format].vertex_format;
449 }
450 else if (bind & PIPE_BIND_SCANOUT) {
451 return svga_translate_screen_target_format_vgpu10(format);
452 }
453 else {
454 return format_conversion_table[format].pixel_format;
455 }
456 }
457
458 switch(format) {
459 case PIPE_FORMAT_B8G8R8A8_UNORM:
460 return SVGA3D_A8R8G8B8;
461 case PIPE_FORMAT_B8G8R8X8_UNORM:
462 return SVGA3D_X8R8G8B8;
463
464 /* sRGB required for GL2.1 */
465 case PIPE_FORMAT_B8G8R8A8_SRGB:
466 return SVGA3D_A8R8G8B8;
467 case PIPE_FORMAT_DXT1_SRGB:
468 case PIPE_FORMAT_DXT1_SRGBA:
469 return SVGA3D_DXT1;
470 case PIPE_FORMAT_DXT3_SRGBA:
471 return SVGA3D_DXT3;
472 case PIPE_FORMAT_DXT5_SRGBA:
473 return SVGA3D_DXT5;
474
475 case PIPE_FORMAT_B5G6R5_UNORM:
476 return SVGA3D_R5G6B5;
477 case PIPE_FORMAT_B5G5R5A1_UNORM:
478 return SVGA3D_A1R5G5B5;
479 case PIPE_FORMAT_B4G4R4A4_UNORM:
480 return SVGA3D_A4R4G4B4;
481
482 case PIPE_FORMAT_R16G16B16A16_UNORM:
483 return SVGA3D_A16B16G16R16;
484
485 case PIPE_FORMAT_Z16_UNORM:
486 assert(!ss->sws->have_vgpu10);
487 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
488 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
489 assert(!ss->sws->have_vgpu10);
490 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
491 case PIPE_FORMAT_X8Z24_UNORM:
492 assert(!ss->sws->have_vgpu10);
493 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
494
495 case PIPE_FORMAT_A8_UNORM:
496 return SVGA3D_ALPHA8;
497 case PIPE_FORMAT_L8_UNORM:
498 return SVGA3D_LUMINANCE8;
499
500 case PIPE_FORMAT_DXT1_RGB:
501 case PIPE_FORMAT_DXT1_RGBA:
502 return SVGA3D_DXT1;
503 case PIPE_FORMAT_DXT3_RGBA:
504 return SVGA3D_DXT3;
505 case PIPE_FORMAT_DXT5_RGBA:
506 return SVGA3D_DXT5;
507
508 /* Float formats (only 1, 2 and 4-component formats supported) */
509 case PIPE_FORMAT_R32_FLOAT:
510 return SVGA3D_R_S23E8;
511 case PIPE_FORMAT_R32G32_FLOAT:
512 return SVGA3D_RG_S23E8;
513 case PIPE_FORMAT_R32G32B32A32_FLOAT:
514 return SVGA3D_ARGB_S23E8;
515 case PIPE_FORMAT_R16_FLOAT:
516 return SVGA3D_R_S10E5;
517 case PIPE_FORMAT_R16G16_FLOAT:
518 return SVGA3D_RG_S10E5;
519 case PIPE_FORMAT_R16G16B16A16_FLOAT:
520 return SVGA3D_ARGB_S10E5;
521
522 case PIPE_FORMAT_Z32_UNORM:
523 /* SVGA3D_Z_D32 is not yet unsupported */
524 /* fall-through */
525 default:
526 return SVGA3D_FORMAT_INVALID;
527 }
528 }
529
530
531 /*
532 * Format capability description entry.
533 */
534 struct format_cap {
535 const char *name;
536
537 SVGA3dSurfaceFormat format;
538
539 /*
540 * Capability index corresponding to the format.
541 */
542 SVGA3dDevCapIndex devcap;
543
544 /* size of each pixel/block */
545 unsigned block_width, block_height, block_bytes;
546
547 /*
548 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
549 * capability is not explicitly present.
550 */
551 uint32 defaultOperations;
552 };
553
554
555 /*
556 * Format capability description table.
557 *
558 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
559 */
560 static const struct format_cap format_cap_table[] = {
561 {
562 "SVGA3D_FORMAT_INVALID",
563 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
564 },
565 {
566 "SVGA3D_X8R8G8B8",
567 SVGA3D_X8R8G8B8,
568 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
569 1, 1, 4,
570 SVGA3DFORMAT_OP_TEXTURE |
571 SVGA3DFORMAT_OP_CUBETEXTURE |
572 SVGA3DFORMAT_OP_VOLUMETEXTURE |
573 SVGA3DFORMAT_OP_DISPLAYMODE |
574 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
575 },
576 {
577 "SVGA3D_A8R8G8B8",
578 SVGA3D_A8R8G8B8,
579 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
580 1, 1, 4,
581 SVGA3DFORMAT_OP_TEXTURE |
582 SVGA3DFORMAT_OP_CUBETEXTURE |
583 SVGA3DFORMAT_OP_VOLUMETEXTURE |
584 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
585 },
586 {
587 "SVGA3D_R5G6B5",
588 SVGA3D_R5G6B5,
589 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
590 1, 1, 2,
591 SVGA3DFORMAT_OP_TEXTURE |
592 SVGA3DFORMAT_OP_CUBETEXTURE |
593 SVGA3DFORMAT_OP_VOLUMETEXTURE |
594 SVGA3DFORMAT_OP_DISPLAYMODE |
595 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
596 },
597 {
598 "SVGA3D_X1R5G5B5",
599 SVGA3D_X1R5G5B5,
600 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
601 1, 1, 2,
602 SVGA3DFORMAT_OP_TEXTURE |
603 SVGA3DFORMAT_OP_CUBETEXTURE |
604 SVGA3DFORMAT_OP_VOLUMETEXTURE |
605 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
606 },
607 {
608 "SVGA3D_A1R5G5B5",
609 SVGA3D_A1R5G5B5,
610 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
611 1, 1, 2,
612 SVGA3DFORMAT_OP_TEXTURE |
613 SVGA3DFORMAT_OP_CUBETEXTURE |
614 SVGA3DFORMAT_OP_VOLUMETEXTURE |
615 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
616 },
617 {
618 "SVGA3D_A4R4G4B4",
619 SVGA3D_A4R4G4B4,
620 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
621 1, 1, 2,
622 SVGA3DFORMAT_OP_TEXTURE |
623 SVGA3DFORMAT_OP_CUBETEXTURE |
624 SVGA3DFORMAT_OP_VOLUMETEXTURE |
625 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
626 },
627 {
628 /*
629 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
630 * SVGA3D_DEVCAP_xxx.
631 */
632 "SVGA3D_Z_D32",
633 SVGA3D_Z_D32, 0, 0, 0, 0, 0
634 },
635 {
636 "SVGA3D_Z_D16",
637 SVGA3D_Z_D16,
638 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
639 1, 1, 2,
640 SVGA3DFORMAT_OP_ZSTENCIL
641 },
642 {
643 "SVGA3D_Z_D24S8",
644 SVGA3D_Z_D24S8,
645 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
646 1, 1, 4,
647 SVGA3DFORMAT_OP_ZSTENCIL
648 },
649 {
650 "SVGA3D_Z_D15S1",
651 SVGA3D_Z_D15S1,
652 SVGA3D_DEVCAP_MAX,
653 1, 1, 2,
654 SVGA3DFORMAT_OP_ZSTENCIL
655 },
656 {
657 "SVGA3D_LUMINANCE8",
658 SVGA3D_LUMINANCE8,
659 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
660 1, 1, 1,
661 SVGA3DFORMAT_OP_TEXTURE |
662 SVGA3DFORMAT_OP_CUBETEXTURE |
663 SVGA3DFORMAT_OP_VOLUMETEXTURE
664 },
665 {
666 /*
667 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
668 * SVGA3D_DEVCAP_xxx.
669 */
670 "SVGA3D_LUMINANCE4_ALPHA4",
671 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
672 },
673 {
674 "SVGA3D_LUMINANCE16",
675 SVGA3D_LUMINANCE16,
676 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
677 1, 1, 2,
678 SVGA3DFORMAT_OP_TEXTURE |
679 SVGA3DFORMAT_OP_CUBETEXTURE |
680 SVGA3DFORMAT_OP_VOLUMETEXTURE
681 },
682 {
683 "SVGA3D_LUMINANCE8_ALPHA8",
684 SVGA3D_LUMINANCE8_ALPHA8,
685 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
686 1, 1, 2,
687 SVGA3DFORMAT_OP_TEXTURE |
688 SVGA3DFORMAT_OP_CUBETEXTURE |
689 SVGA3DFORMAT_OP_VOLUMETEXTURE
690 },
691 {
692 "SVGA3D_DXT1",
693 SVGA3D_DXT1,
694 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
695 4, 4, 8,
696 SVGA3DFORMAT_OP_TEXTURE |
697 SVGA3DFORMAT_OP_CUBETEXTURE
698 },
699 {
700 "SVGA3D_DXT2",
701 SVGA3D_DXT2,
702 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
703 4, 4, 8,
704 SVGA3DFORMAT_OP_TEXTURE |
705 SVGA3DFORMAT_OP_CUBETEXTURE
706 },
707 {
708 "SVGA3D_DXT3",
709 SVGA3D_DXT3,
710 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
711 4, 4, 16,
712 SVGA3DFORMAT_OP_TEXTURE |
713 SVGA3DFORMAT_OP_CUBETEXTURE
714 },
715 {
716 "SVGA3D_DXT4",
717 SVGA3D_DXT4,
718 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
719 4, 4, 16,
720 SVGA3DFORMAT_OP_TEXTURE |
721 SVGA3DFORMAT_OP_CUBETEXTURE
722 },
723 {
724 "SVGA3D_DXT5",
725 SVGA3D_DXT5,
726 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
727 4, 4, 8,
728 SVGA3DFORMAT_OP_TEXTURE |
729 SVGA3DFORMAT_OP_CUBETEXTURE
730 },
731 {
732 "SVGA3D_BUMPU8V8",
733 SVGA3D_BUMPU8V8,
734 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
735 1, 1, 2,
736 SVGA3DFORMAT_OP_TEXTURE |
737 SVGA3DFORMAT_OP_CUBETEXTURE |
738 SVGA3DFORMAT_OP_VOLUMETEXTURE
739 },
740 {
741 /*
742 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
743 * SVGA3D_DEVCAP_xxx.
744 */
745 "SVGA3D_BUMPL6V5U5",
746 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
747 },
748 {
749 "SVGA3D_BUMPX8L8V8U8",
750 SVGA3D_BUMPX8L8V8U8,
751 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
752 1, 1, 4,
753 SVGA3DFORMAT_OP_TEXTURE |
754 SVGA3DFORMAT_OP_CUBETEXTURE
755 },
756 {
757 "SVGA3D_FORMAT_DEAD1",
758 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
759 },
760 {
761 "SVGA3D_ARGB_S10E5",
762 SVGA3D_ARGB_S10E5,
763 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
764 1, 1, 2,
765 SVGA3DFORMAT_OP_TEXTURE |
766 SVGA3DFORMAT_OP_CUBETEXTURE |
767 SVGA3DFORMAT_OP_VOLUMETEXTURE |
768 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
769 },
770 {
771 "SVGA3D_ARGB_S23E8",
772 SVGA3D_ARGB_S23E8,
773 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
774 1, 1, 4,
775 SVGA3DFORMAT_OP_TEXTURE |
776 SVGA3DFORMAT_OP_CUBETEXTURE |
777 SVGA3DFORMAT_OP_VOLUMETEXTURE |
778 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
779 },
780 {
781 "SVGA3D_A2R10G10B10",
782 SVGA3D_A2R10G10B10,
783 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
784 1, 1, 4,
785 SVGA3DFORMAT_OP_TEXTURE |
786 SVGA3DFORMAT_OP_CUBETEXTURE |
787 SVGA3DFORMAT_OP_VOLUMETEXTURE |
788 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
789 },
790 {
791 /*
792 * SVGA3D_V8U8 is unsupported; it has no corresponding
793 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
794 */
795 "SVGA3D_V8U8",
796 SVGA3D_V8U8, 0, 0, 0, 0, 0
797 },
798 {
799 "SVGA3D_Q8W8V8U8",
800 SVGA3D_Q8W8V8U8,
801 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
802 1, 1, 4,
803 SVGA3DFORMAT_OP_TEXTURE |
804 SVGA3DFORMAT_OP_CUBETEXTURE
805 },
806 {
807 "SVGA3D_CxV8U8",
808 SVGA3D_CxV8U8,
809 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
810 1, 1, 2,
811 SVGA3DFORMAT_OP_TEXTURE
812 },
813 {
814 /*
815 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
816 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
817 */
818 "SVGA3D_X8L8V8U8",
819 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
820 },
821 {
822 "SVGA3D_A2W10V10U10",
823 SVGA3D_A2W10V10U10,
824 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
825 1, 1, 4,
826 SVGA3DFORMAT_OP_TEXTURE
827 },
828 {
829 "SVGA3D_ALPHA8",
830 SVGA3D_ALPHA8,
831 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
832 1, 1, 1,
833 SVGA3DFORMAT_OP_TEXTURE |
834 SVGA3DFORMAT_OP_CUBETEXTURE |
835 SVGA3DFORMAT_OP_VOLUMETEXTURE
836 },
837 {
838 "SVGA3D_R_S10E5",
839 SVGA3D_R_S10E5,
840 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
841 1, 1, 2,
842 SVGA3DFORMAT_OP_TEXTURE |
843 SVGA3DFORMAT_OP_VOLUMETEXTURE |
844 SVGA3DFORMAT_OP_CUBETEXTURE |
845 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
846 },
847 {
848 "SVGA3D_R_S23E8",
849 SVGA3D_R_S23E8,
850 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
851 1, 1, 4,
852 SVGA3DFORMAT_OP_TEXTURE |
853 SVGA3DFORMAT_OP_VOLUMETEXTURE |
854 SVGA3DFORMAT_OP_CUBETEXTURE |
855 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
856 },
857 {
858 "SVGA3D_RG_S10E5",
859 SVGA3D_RG_S10E5,
860 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
861 1, 1, 2,
862 SVGA3DFORMAT_OP_TEXTURE |
863 SVGA3DFORMAT_OP_VOLUMETEXTURE |
864 SVGA3DFORMAT_OP_CUBETEXTURE |
865 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
866 },
867 {
868 "SVGA3D_RG_S23E8",
869 SVGA3D_RG_S23E8,
870 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
871 1, 1, 4,
872 SVGA3DFORMAT_OP_TEXTURE |
873 SVGA3DFORMAT_OP_VOLUMETEXTURE |
874 SVGA3DFORMAT_OP_CUBETEXTURE |
875 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
876 },
877 {
878 /*
879 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
880 */
881 "SVGA3D_BUFFER",
882 SVGA3D_BUFFER, 0, 1, 1, 1, 0
883 },
884 {
885 "SVGA3D_Z_D24X8",
886 SVGA3D_Z_D24X8,
887 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
888 1, 1, 4,
889 SVGA3DFORMAT_OP_ZSTENCIL
890 },
891 {
892 "SVGA3D_V16U16",
893 SVGA3D_V16U16,
894 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
895 1, 1, 4,
896 SVGA3DFORMAT_OP_TEXTURE |
897 SVGA3DFORMAT_OP_CUBETEXTURE |
898 SVGA3DFORMAT_OP_VOLUMETEXTURE
899 },
900 {
901 "SVGA3D_G16R16",
902 SVGA3D_G16R16,
903 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
904 1, 1, 4,
905 SVGA3DFORMAT_OP_TEXTURE |
906 SVGA3DFORMAT_OP_CUBETEXTURE |
907 SVGA3DFORMAT_OP_VOLUMETEXTURE |
908 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
909 },
910 {
911 "SVGA3D_A16B16G16R16",
912 SVGA3D_A16B16G16R16,
913 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
914 1, 1, 8,
915 SVGA3DFORMAT_OP_TEXTURE |
916 SVGA3DFORMAT_OP_CUBETEXTURE |
917 SVGA3DFORMAT_OP_VOLUMETEXTURE |
918 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
919 },
920 {
921 "SVGA3D_UYVY",
922 SVGA3D_UYVY,
923 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
924 0, 0, 0, 0
925 },
926 {
927 "SVGA3D_YUY2",
928 SVGA3D_YUY2,
929 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
930 0, 0, 0, 0
931 },
932 {
933 "SVGA3D_NV12",
934 SVGA3D_NV12,
935 SVGA3D_DEVCAP_SURFACEFMT_NV12,
936 0, 0, 0, 0
937 },
938 {
939 "SVGA3D_AYUV",
940 SVGA3D_AYUV,
941 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
942 0, 0, 0, 0
943 },
944 {
945 "SVGA3D_R32G32B32A32_TYPELESS",
946 SVGA3D_R32G32B32A32_TYPELESS,
947 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
948 1, 1, 16, 0
949 },
950 {
951 "SVGA3D_R32G32B32A32_UINT",
952 SVGA3D_R32G32B32A32_UINT,
953 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
954 1, 1, 16, 0
955 },
956 {
957 "SVGA3D_R32G32B32A32_SINT",
958 SVGA3D_R32G32B32A32_SINT,
959 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
960 1, 1, 16, 0
961 },
962 {
963 "SVGA3D_R32G32B32_TYPELESS",
964 SVGA3D_R32G32B32_TYPELESS,
965 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
966 1, 1, 12, 0
967 },
968 {
969 "SVGA3D_R32G32B32_FLOAT",
970 SVGA3D_R32G32B32_FLOAT,
971 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
972 1, 1, 12, 0
973 },
974 {
975 "SVGA3D_R32G32B32_UINT",
976 SVGA3D_R32G32B32_UINT,
977 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
978 1, 1, 12, 0
979 },
980 {
981 "SVGA3D_R32G32B32_SINT",
982 SVGA3D_R32G32B32_SINT,
983 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
984 1, 1, 12, 0
985 },
986 {
987 "SVGA3D_R16G16B16A16_TYPELESS",
988 SVGA3D_R16G16B16A16_TYPELESS,
989 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
990 1, 1, 8, 0
991 },
992 {
993 "SVGA3D_R16G16B16A16_UINT",
994 SVGA3D_R16G16B16A16_UINT,
995 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
996 1, 1, 8, 0
997 },
998 {
999 "SVGA3D_R16G16B16A16_SNORM",
1000 SVGA3D_R16G16B16A16_SNORM,
1001 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
1002 1, 1, 8, 0
1003 },
1004 {
1005 "SVGA3D_R16G16B16A16_SINT",
1006 SVGA3D_R16G16B16A16_SINT,
1007 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
1008 1, 1, 8, 0
1009 },
1010 {
1011 "SVGA3D_R32G32_TYPELESS",
1012 SVGA3D_R32G32_TYPELESS,
1013 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
1014 1, 1, 8, 0
1015 },
1016 {
1017 "SVGA3D_R32G32_UINT",
1018 SVGA3D_R32G32_UINT,
1019 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
1020 1, 1, 8, 0
1021 },
1022 {
1023 "SVGA3D_R32G32_SINT",
1024 SVGA3D_R32G32_SINT,
1025 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1026 1, 1, 8,
1027 0
1028 },
1029 {
1030 "SVGA3D_R32G8X24_TYPELESS",
1031 SVGA3D_R32G8X24_TYPELESS,
1032 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1033 1, 1, 8, 0
1034 },
1035 {
1036 "SVGA3D_D32_FLOAT_S8X24_UINT",
1037 SVGA3D_D32_FLOAT_S8X24_UINT,
1038 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
1039 1, 1, 8, 0
1040 },
1041 {
1042 "SVGA3D_R32_FLOAT_X8X24",
1043 SVGA3D_R32_FLOAT_X8X24,
1044 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
1045 1, 1, 8, 0
1046 },
1047 {
1048 "SVGA3D_X32_G8X24_UINT",
1049 SVGA3D_X32_G8X24_UINT,
1050 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
1051 1, 1, 4, 0
1052 },
1053 {
1054 "SVGA3D_R10G10B10A2_TYPELESS",
1055 SVGA3D_R10G10B10A2_TYPELESS,
1056 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1057 1, 1, 4, 0
1058 },
1059 {
1060 "SVGA3D_R10G10B10A2_UINT",
1061 SVGA3D_R10G10B10A2_UINT,
1062 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1063 1, 1, 4, 0
1064 },
1065 {
1066 "SVGA3D_R11G11B10_FLOAT",
1067 SVGA3D_R11G11B10_FLOAT,
1068 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1069 1, 1, 4, 0
1070 },
1071 {
1072 "SVGA3D_R8G8B8A8_TYPELESS",
1073 SVGA3D_R8G8B8A8_TYPELESS,
1074 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1075 1, 1, 4, 0
1076 },
1077 {
1078 "SVGA3D_R8G8B8A8_UNORM",
1079 SVGA3D_R8G8B8A8_UNORM,
1080 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1081 1, 1, 4, 0
1082 },
1083 {
1084 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1085 SVGA3D_R8G8B8A8_UNORM_SRGB,
1086 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1087 1, 1, 4, 0
1088 },
1089 {
1090 "SVGA3D_R8G8B8A8_UINT",
1091 SVGA3D_R8G8B8A8_UINT,
1092 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1093 1, 1, 4, 0
1094 },
1095 {
1096 "SVGA3D_R8G8B8A8_SINT",
1097 SVGA3D_R8G8B8A8_SINT,
1098 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1099 1, 1, 4, 0
1100 },
1101 {
1102 "SVGA3D_R16G16_TYPELESS",
1103 SVGA3D_R16G16_TYPELESS,
1104 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1105 1, 1, 4, 0
1106 },
1107 {
1108 "SVGA3D_R16G16_UINT",
1109 SVGA3D_R16G16_UINT,
1110 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1111 1, 1, 4, 0
1112 },
1113 {
1114 "SVGA3D_R16G16_SINT",
1115 SVGA3D_R16G16_SINT,
1116 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1117 1, 1, 4, 0
1118 },
1119 {
1120 "SVGA3D_R32_TYPELESS",
1121 SVGA3D_R32_TYPELESS,
1122 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1123 1, 1, 4, 0
1124 },
1125 {
1126 "SVGA3D_D32_FLOAT",
1127 SVGA3D_D32_FLOAT,
1128 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
1129 1, 1, 4, 0
1130 },
1131 {
1132 "SVGA3D_R32_UINT",
1133 SVGA3D_R32_UINT,
1134 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1135 1, 1, 4, 0
1136 },
1137 {
1138 "SVGA3D_R32_SINT",
1139 SVGA3D_R32_SINT,
1140 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1141 1, 1, 4, 0
1142 },
1143 {
1144 "SVGA3D_R24G8_TYPELESS",
1145 SVGA3D_R24G8_TYPELESS,
1146 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1147 1, 1, 4, 0
1148 },
1149 {
1150 "SVGA3D_D24_UNORM_S8_UINT",
1151 SVGA3D_D24_UNORM_S8_UINT,
1152 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1153 1, 1, 4, 0
1154 },
1155 {
1156 "SVGA3D_R24_UNORM_X8",
1157 SVGA3D_R24_UNORM_X8,
1158 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1159 1, 1, 4, 0
1160 },
1161 {
1162 "SVGA3D_X24_G8_UINT",
1163 SVGA3D_X24_G8_UINT,
1164 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1165 1, 1, 4, 0
1166 },
1167 {
1168 "SVGA3D_R8G8_TYPELESS",
1169 SVGA3D_R8G8_TYPELESS,
1170 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1171 1, 1, 2, 0
1172 },
1173 {
1174 "SVGA3D_R8G8_UNORM",
1175 SVGA3D_R8G8_UNORM,
1176 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1177 1, 1, 2, 0
1178 },
1179 {
1180 "SVGA3D_R8G8_UINT",
1181 SVGA3D_R8G8_UINT,
1182 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1183 1, 1, 2, 0
1184 },
1185 {
1186 "SVGA3D_R8G8_SINT",
1187 SVGA3D_R8G8_SINT,
1188 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1189 1, 1, 2, 0
1190 },
1191 {
1192 "SVGA3D_R16_TYPELESS",
1193 SVGA3D_R16_TYPELESS,
1194 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1195 1, 1, 2, 0
1196 },
1197 {
1198 "SVGA3D_R16_UNORM",
1199 SVGA3D_R16_UNORM,
1200 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1201 1, 1, 2, 0
1202 },
1203 {
1204 "SVGA3D_R16_UINT",
1205 SVGA3D_R16_UINT,
1206 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1207 1, 1, 2, 0
1208 },
1209 {
1210 "SVGA3D_R16_SNORM",
1211 SVGA3D_R16_SNORM,
1212 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1213 1, 1, 2, 0
1214 },
1215 {
1216 "SVGA3D_R16_SINT",
1217 SVGA3D_R16_SINT,
1218 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1219 1, 1, 2, 0
1220 },
1221 {
1222 "SVGA3D_R8_TYPELESS",
1223 SVGA3D_R8_TYPELESS,
1224 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1225 1, 1, 1, 0
1226 },
1227 {
1228 "SVGA3D_R8_UNORM",
1229 SVGA3D_R8_UNORM,
1230 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1231 1, 1, 1, 0
1232 },
1233 {
1234 "SVGA3D_R8_UINT",
1235 SVGA3D_R8_UINT,
1236 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1237 1, 1, 1, 0
1238 },
1239 {
1240 "SVGA3D_R8_SNORM",
1241 SVGA3D_R8_SNORM,
1242 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1243 1, 1, 1, 0
1244 },
1245 {
1246 "SVGA3D_R8_SINT",
1247 SVGA3D_R8_SINT,
1248 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1249 1, 1, 1, 0
1250 },
1251 {
1252 "SVGA3D_P8",
1253 SVGA3D_P8, 0, 0, 0, 0, 0
1254 },
1255 {
1256 "SVGA3D_R9G9B9E5_SHAREDEXP",
1257 SVGA3D_R9G9B9E5_SHAREDEXP,
1258 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1259 1, 1, 4, 0
1260 },
1261 {
1262 "SVGA3D_R8G8_B8G8_UNORM",
1263 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1264 },
1265 {
1266 "SVGA3D_G8R8_G8B8_UNORM",
1267 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1268 },
1269 {
1270 "SVGA3D_BC1_TYPELESS",
1271 SVGA3D_BC1_TYPELESS,
1272 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1273 4, 4, 8, 0
1274 },
1275 {
1276 "SVGA3D_BC1_UNORM_SRGB",
1277 SVGA3D_BC1_UNORM_SRGB,
1278 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1279 4, 4, 8, 0
1280 },
1281 {
1282 "SVGA3D_BC2_TYPELESS",
1283 SVGA3D_BC2_TYPELESS,
1284 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1285 4, 4, 16, 0
1286 },
1287 {
1288 "SVGA3D_BC2_UNORM_SRGB",
1289 SVGA3D_BC2_UNORM_SRGB,
1290 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1291 4, 4, 16, 0
1292 },
1293 {
1294 "SVGA3D_BC3_TYPELESS",
1295 SVGA3D_BC3_TYPELESS,
1296 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1297 4, 4, 16, 0
1298 },
1299 {
1300 "SVGA3D_BC3_UNORM_SRGB",
1301 SVGA3D_BC3_UNORM_SRGB,
1302 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1303 4, 4, 16, 0
1304 },
1305 {
1306 "SVGA3D_BC4_TYPELESS",
1307 SVGA3D_BC4_TYPELESS,
1308 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1309 4, 4, 8, 0
1310 },
1311 {
1312 "SVGA3D_ATI1",
1313 SVGA3D_ATI1, 0, 0, 0, 0, 0
1314 },
1315 {
1316 "SVGA3D_BC4_SNORM",
1317 SVGA3D_BC4_SNORM,
1318 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1319 4, 4, 8, 0
1320 },
1321 {
1322 "SVGA3D_BC5_TYPELESS",
1323 SVGA3D_BC5_TYPELESS,
1324 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1325 4, 4, 16, 0
1326 },
1327 {
1328 "SVGA3D_ATI2",
1329 SVGA3D_ATI2, 0, 0, 0, 0, 0
1330 },
1331 {
1332 "SVGA3D_BC5_SNORM",
1333 SVGA3D_BC5_SNORM,
1334 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1335 4, 4, 16, 0
1336 },
1337 {
1338 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1339 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1340 },
1341 {
1342 "SVGA3D_B8G8R8A8_TYPELESS",
1343 SVGA3D_B8G8R8A8_TYPELESS,
1344 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1345 1, 1, 4, 0
1346 },
1347 {
1348 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1349 SVGA3D_B8G8R8A8_UNORM_SRGB,
1350 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1351 1, 1, 4, 0
1352 },
1353 {
1354 "SVGA3D_B8G8R8X8_TYPELESS",
1355 SVGA3D_B8G8R8X8_TYPELESS,
1356 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1357 1, 1, 4, 0
1358 },
1359 {
1360 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1361 SVGA3D_B8G8R8X8_UNORM_SRGB,
1362 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1363 1, 1, 4, 0
1364 },
1365 {
1366 "SVGA3D_Z_DF16",
1367 SVGA3D_Z_DF16,
1368 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1369 1, 1, 2, 0
1370 },
1371 {
1372 "SVGA3D_Z_DF24",
1373 SVGA3D_Z_DF24,
1374 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1375 1, 1, 4, 0
1376 },
1377 {
1378 "SVGA3D_Z_D24S8_INT",
1379 SVGA3D_Z_D24S8_INT,
1380 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1381 1, 1, 4, 0
1382 },
1383 {
1384 "SVGA3D_YV12",
1385 SVGA3D_YV12, 0, 0, 0, 0, 0
1386 },
1387 {
1388 "SVGA3D_R32G32B32A32_FLOAT",
1389 SVGA3D_R32G32B32A32_FLOAT,
1390 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1391 1, 1, 16, 0
1392 },
1393 {
1394 "SVGA3D_R16G16B16A16_FLOAT",
1395 SVGA3D_R16G16B16A16_FLOAT,
1396 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1397 1, 1, 8, 0
1398 },
1399 {
1400 "SVGA3D_R16G16B16A16_UNORM",
1401 SVGA3D_R16G16B16A16_UNORM,
1402 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1403 1, 1, 8, 0
1404 },
1405 {
1406 "SVGA3D_R32G32_FLOAT",
1407 SVGA3D_R32G32_FLOAT,
1408 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1409 1, 1, 8, 0
1410 },
1411 {
1412 "SVGA3D_R10G10B10A2_UNORM",
1413 SVGA3D_R10G10B10A2_UNORM,
1414 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1415 1, 1, 4, 0
1416 },
1417 {
1418 "SVGA3D_R8G8B8A8_SNORM",
1419 SVGA3D_R8G8B8A8_SNORM,
1420 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1421 1, 1, 4, 0
1422 },
1423 {
1424 "SVGA3D_R16G16_FLOAT",
1425 SVGA3D_R16G16_FLOAT,
1426 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1427 1, 1, 4, 0
1428 },
1429 {
1430 "SVGA3D_R16G16_UNORM",
1431 SVGA3D_R16G16_UNORM,
1432 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1433 1, 1, 4, 0
1434 },
1435 {
1436 "SVGA3D_R16G16_SNORM",
1437 SVGA3D_R16G16_SNORM,
1438 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1439 1, 1, 4, 0
1440 },
1441 {
1442 "SVGA3D_R32_FLOAT",
1443 SVGA3D_R32_FLOAT,
1444 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1445 1, 1, 4, 0
1446 },
1447 {
1448 "SVGA3D_R8G8_SNORM",
1449 SVGA3D_R8G8_SNORM,
1450 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1451 1, 1, 2, 0
1452 },
1453 {
1454 "SVGA3D_R16_FLOAT",
1455 SVGA3D_R16_FLOAT,
1456 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1457 1, 1, 2, 0
1458 },
1459 {
1460 "SVGA3D_D16_UNORM",
1461 SVGA3D_D16_UNORM,
1462 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1463 1, 1, 2, 0
1464 },
1465 {
1466 "SVGA3D_A8_UNORM",
1467 SVGA3D_A8_UNORM,
1468 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1469 1, 1, 1, 0
1470 },
1471 {
1472 "SVGA3D_BC1_UNORM",
1473 SVGA3D_BC1_UNORM,
1474 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1475 4, 4, 8, 0
1476 },
1477 {
1478 "SVGA3D_BC2_UNORM",
1479 SVGA3D_BC2_UNORM,
1480 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1481 4, 4, 16, 0
1482 },
1483 {
1484 "SVGA3D_BC3_UNORM",
1485 SVGA3D_BC3_UNORM,
1486 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1487 4, 4, 16, 0
1488 },
1489 {
1490 "SVGA3D_B5G6R5_UNORM",
1491 SVGA3D_B5G6R5_UNORM,
1492 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1493 1, 1, 2, 0
1494 },
1495 {
1496 "SVGA3D_B5G5R5A1_UNORM",
1497 SVGA3D_B5G5R5A1_UNORM,
1498 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1499 1, 1, 2, 0
1500 },
1501 {
1502 "SVGA3D_B8G8R8A8_UNORM",
1503 SVGA3D_B8G8R8A8_UNORM,
1504 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1505 1, 1, 4, 0
1506 },
1507 {
1508 "SVGA3D_B8G8R8X8_UNORM",
1509 SVGA3D_B8G8R8X8_UNORM,
1510 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1511 1, 1, 4, 0
1512 },
1513 {
1514 "SVGA3D_BC4_UNORM",
1515 SVGA3D_BC4_UNORM,
1516 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1517 4, 4, 8, 0
1518 },
1519 {
1520 "SVGA3D_BC5_UNORM",
1521 SVGA3D_BC5_UNORM,
1522 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1523 4, 4, 16, 0
1524 }
1525 };
1526
1527 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1528 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1529 SVGA3D_B8G8R8A8_UNORM, 0
1530 };
1531 static const SVGA3dSurfaceFormat compat_r8[] = {
1532 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1533 };
1534 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1535 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1536 };
1537 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1538 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1539 };
1540
1541 static const struct format_compat_entry format_compats[] = {
1542 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1543 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1544 {PIPE_FORMAT_R8_UNORM, compat_r8},
1545 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1546 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1547 };
1548
1549 /**
1550 * Debug only:
1551 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1552 * 2. check that format_conversion_table[i].pformat == i.
1553 */
1554 static void
1555 check_format_tables(void)
1556 {
1557 static boolean first_call = TRUE;
1558
1559 if (first_call) {
1560 unsigned i;
1561
1562 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1563 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1564 assert(format_cap_table[i].format == i);
1565 }
1566
1567 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1568 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1569 assert(format_conversion_table[i].pformat == i);
1570 }
1571
1572 first_call = FALSE;
1573 }
1574 }
1575
1576
1577 /**
1578 * Return string name of an SVGA3dDevCapIndex value.
1579 * For debugging.
1580 */
1581 static const char *
1582 svga_devcap_name(SVGA3dDevCapIndex cap)
1583 {
1584 static const struct debug_named_value devcap_names[] = {
1585 /* Note, we only list the DXFMT devcaps so far */
1586 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1587 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1588 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1589 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1590 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1591 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1592 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1593 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1594 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1595 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1622 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1623 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1624 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1625 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1626 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1627 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1628 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1629 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1630 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1631 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1632 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1633 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1634 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1635 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1636 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1637 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1638 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1639 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1640 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1641 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1642 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1643 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1644 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1645 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1646 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1647 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1648 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1649 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1650 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1651 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1652 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1653 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1654 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1655 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1656 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1657 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1658 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1659 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1660 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1661 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1662 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1663 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1664 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1665 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1666 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1667 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1668 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1669 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1670 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1671 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1672 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1673 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1674 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1675 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1676 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1677 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1678 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1679 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1680 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1681 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1682 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1683 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1684 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1685 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1686 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1687 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1688 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1689 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1690 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1691 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1692 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1693 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1694 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1695 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1696 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1697 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1698 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1699 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1700 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1701 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1702 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1703 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1704 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1705 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1706 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1707 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1708 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1709 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1710 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1711 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1712 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1713 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1714 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1715 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1716 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1717 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1718 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1719 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1720 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1721 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1722 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1723 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1724 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1725 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1726 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1727 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1728 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1729 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1730 DEBUG_NAMED_VALUE_END,
1731 };
1732 return debug_dump_enum(devcap_names, cap);
1733 }
1734
1735
1736 /**
1737 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1738 * For debugging.
1739 */
1740 static const char *
1741 svga_devcap_format_flags(unsigned flags)
1742 {
1743 static const struct debug_named_value devcap_flags[] = {
1744 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1745 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1746 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1747 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1748 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1749 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1750 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1751 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1752 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1753 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1754 DEBUG_NAMED_VALUE_END
1755 };
1756
1757 return debug_dump_flags(devcap_flags, flags);
1758 }
1759
1760
1761 /*
1762 * Get format capabilities from the host. It takes in consideration
1763 * deprecated/unsupported formats, and formats which are implicitely assumed to
1764 * be supported when the host does not provide an explicit capability entry.
1765 */
1766 void
1767 svga_get_format_cap(struct svga_screen *ss,
1768 SVGA3dSurfaceFormat format,
1769 SVGA3dSurfaceFormatCaps *caps)
1770 {
1771 struct svga_winsys_screen *sws = ss->sws;
1772 SVGA3dDevCapResult result;
1773 const struct format_cap *entry;
1774
1775 #ifdef DEBUG
1776 check_format_tables();
1777 #else
1778 (void) check_format_tables;
1779 #endif
1780
1781 assert(format < ARRAY_SIZE(format_cap_table));
1782 entry = &format_cap_table[format];
1783 assert(entry->format == format);
1784
1785 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1786 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1787 caps->value = result.u;
1788 } else {
1789 /* Implicitly advertised format -- use default caps */
1790 caps->value = entry->defaultOperations;
1791 }
1792 }
1793
1794
1795 /*
1796 * Get DX format capabilities from VGPU10 device.
1797 */
1798 static void
1799 svga_get_dx_format_cap(struct svga_screen *ss,
1800 SVGA3dSurfaceFormat format,
1801 SVGA3dDevCapResult *caps)
1802 {
1803 struct svga_winsys_screen *sws = ss->sws;
1804 const struct format_cap *entry;
1805
1806 #ifdef DEBUG
1807 check_format_tables();
1808 #else
1809 (void) check_format_tables;
1810 #endif
1811
1812 assert(sws->have_vgpu10);
1813 assert(format < ARRAY_SIZE(format_cap_table));
1814 entry = &format_cap_table[format];
1815 assert(entry->format == format);
1816 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1817
1818 caps->u = 0;
1819 if (entry->devcap) {
1820 sws->get_cap(sws, entry->devcap, caps);
1821
1822 /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1823 * these formats but does not advertise the devcap.
1824 * So enable this bit here.
1825 */
1826 if (!sws->have_sm4_1 &&
1827 (format == SVGA3D_R32_FLOAT_X8X24 ||
1828 format == SVGA3D_R24_UNORM_X8)) {
1829 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1830 }
1831 }
1832
1833 if (0) {
1834 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1835 svga_format_name(format),
1836 svga_devcap_name(entry->devcap),
1837 caps->u,
1838 svga_devcap_format_flags(caps->u));
1839 }
1840 }
1841
1842
1843 void
1844 svga_format_size(SVGA3dSurfaceFormat format,
1845 unsigned *block_width,
1846 unsigned *block_height,
1847 unsigned *bytes_per_block)
1848 {
1849 assert(format < ARRAY_SIZE(format_cap_table));
1850 *block_width = format_cap_table[format].block_width;
1851 *block_height = format_cap_table[format].block_height;
1852 *bytes_per_block = format_cap_table[format].block_bytes;
1853 /* Make sure the table entry was valid */
1854 if (*block_width == 0)
1855 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1856 assert(*block_width);
1857 assert(*block_height);
1858 assert(*bytes_per_block);
1859 }
1860
1861
1862 const char *
1863 svga_format_name(SVGA3dSurfaceFormat format)
1864 {
1865 assert(format < ARRAY_SIZE(format_cap_table));
1866 return format_cap_table[format].name;
1867 }
1868
1869
1870 /**
1871 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1872 */
1873 boolean
1874 svga_format_is_integer(SVGA3dSurfaceFormat format)
1875 {
1876 switch (format) {
1877 case SVGA3D_R32G32B32A32_SINT:
1878 case SVGA3D_R32G32B32_SINT:
1879 case SVGA3D_R32G32_SINT:
1880 case SVGA3D_R32_SINT:
1881 case SVGA3D_R16G16B16A16_SINT:
1882 case SVGA3D_R16G16_SINT:
1883 case SVGA3D_R16_SINT:
1884 case SVGA3D_R8G8B8A8_SINT:
1885 case SVGA3D_R8G8_SINT:
1886 case SVGA3D_R8_SINT:
1887 case SVGA3D_R32G32B32A32_UINT:
1888 case SVGA3D_R32G32B32_UINT:
1889 case SVGA3D_R32G32_UINT:
1890 case SVGA3D_R32_UINT:
1891 case SVGA3D_R16G16B16A16_UINT:
1892 case SVGA3D_R16G16_UINT:
1893 case SVGA3D_R16_UINT:
1894 case SVGA3D_R8G8B8A8_UINT:
1895 case SVGA3D_R8G8_UINT:
1896 case SVGA3D_R8_UINT:
1897 case SVGA3D_R10G10B10A2_UINT:
1898 return TRUE;
1899 default:
1900 return FALSE;
1901 }
1902 }
1903
1904 boolean
1905 svga_format_support_gen_mips(enum pipe_format format)
1906 {
1907 assert(format < ARRAY_SIZE(format_conversion_table));
1908 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1909 }
1910
1911
1912 /**
1913 * Given a texture format, return the expected data type returned from
1914 * the texture sampler. For example, UNORM8 formats return floating point
1915 * values while SINT formats returned signed integer values.
1916 * Note: this function could be moved into the gallum u_format.[ch] code
1917 * if it's useful to anyone else.
1918 */
1919 enum tgsi_return_type
1920 svga_get_texture_datatype(enum pipe_format format)
1921 {
1922 const struct util_format_description *desc = util_format_description(format);
1923 enum tgsi_return_type t;
1924
1925 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1926 if (util_format_is_depth_or_stencil(format)) {
1927 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1928 }
1929 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1930 t = TGSI_RETURN_TYPE_FLOAT;
1931 }
1932 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1933 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1934 }
1935 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1936 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1937 }
1938 else {
1939 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1940 t = TGSI_RETURN_TYPE_FLOAT;
1941 }
1942 }
1943 else {
1944 /* compressed format, shared exponent format, etc. */
1945 switch (format) {
1946 case PIPE_FORMAT_DXT1_RGB:
1947 case PIPE_FORMAT_DXT1_RGBA:
1948 case PIPE_FORMAT_DXT3_RGBA:
1949 case PIPE_FORMAT_DXT5_RGBA:
1950 case PIPE_FORMAT_DXT1_SRGB:
1951 case PIPE_FORMAT_DXT1_SRGBA:
1952 case PIPE_FORMAT_DXT3_SRGBA:
1953 case PIPE_FORMAT_DXT5_SRGBA:
1954 case PIPE_FORMAT_RGTC1_UNORM:
1955 case PIPE_FORMAT_RGTC2_UNORM:
1956 case PIPE_FORMAT_LATC1_UNORM:
1957 case PIPE_FORMAT_LATC2_UNORM:
1958 case PIPE_FORMAT_ETC1_RGB8:
1959 t = TGSI_RETURN_TYPE_UNORM;
1960 break;
1961 case PIPE_FORMAT_RGTC1_SNORM:
1962 case PIPE_FORMAT_RGTC2_SNORM:
1963 case PIPE_FORMAT_LATC1_SNORM:
1964 case PIPE_FORMAT_LATC2_SNORM:
1965 case PIPE_FORMAT_R10G10B10X2_SNORM:
1966 t = TGSI_RETURN_TYPE_SNORM;
1967 break;
1968 case PIPE_FORMAT_R11G11B10_FLOAT:
1969 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1970 t = TGSI_RETURN_TYPE_FLOAT;
1971 break;
1972 default:
1973 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1974 t = TGSI_RETURN_TYPE_FLOAT;
1975 }
1976 }
1977
1978 return t;
1979 }
1980
1981
1982 /**
1983 * Given an svga context, return true iff there are currently any integer color
1984 * buffers attached to the framebuffer.
1985 */
1986 boolean
1987 svga_has_any_integer_cbufs(const struct svga_context *svga)
1988 {
1989 unsigned i;
1990 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1991 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1992
1993 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
1994 return TRUE;
1995 }
1996 }
1997 return FALSE;
1998 }
1999
2000
2001 /**
2002 * Given an SVGA format, return the corresponding typeless format.
2003 * If there is no typeless format, return the format unchanged.
2004 */
2005 SVGA3dSurfaceFormat
2006 svga_typeless_format(SVGA3dSurfaceFormat format)
2007 {
2008 switch (format) {
2009 case SVGA3D_R32G32B32A32_UINT:
2010 case SVGA3D_R32G32B32A32_SINT:
2011 case SVGA3D_R32G32B32A32_FLOAT:
2012 return SVGA3D_R32G32B32A32_TYPELESS;
2013 case SVGA3D_R32G32B32_FLOAT:
2014 case SVGA3D_R32G32B32_UINT:
2015 case SVGA3D_R32G32B32_SINT:
2016 return SVGA3D_R32G32B32_TYPELESS;
2017 case SVGA3D_R16G16B16A16_UINT:
2018 case SVGA3D_R16G16B16A16_UNORM:
2019 case SVGA3D_R16G16B16A16_SNORM:
2020 case SVGA3D_R16G16B16A16_SINT:
2021 case SVGA3D_R16G16B16A16_FLOAT:
2022 return SVGA3D_R16G16B16A16_TYPELESS;
2023 case SVGA3D_R32G32_UINT:
2024 case SVGA3D_R32G32_SINT:
2025 case SVGA3D_R32G32_FLOAT:
2026 return SVGA3D_R32G32_TYPELESS;
2027 case SVGA3D_D32_FLOAT_S8X24_UINT:
2028 case SVGA3D_X32_G8X24_UINT:
2029 case SVGA3D_R32G8X24_TYPELESS:
2030 return SVGA3D_R32G8X24_TYPELESS;
2031 case SVGA3D_R10G10B10A2_UINT:
2032 case SVGA3D_R10G10B10A2_UNORM:
2033 return SVGA3D_R10G10B10A2_TYPELESS;
2034 case SVGA3D_R8G8B8A8_UNORM:
2035 case SVGA3D_R8G8B8A8_SNORM:
2036 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2037 case SVGA3D_R8G8B8A8_UINT:
2038 case SVGA3D_R8G8B8A8_SINT:
2039 case SVGA3D_R8G8B8A8_TYPELESS:
2040 return SVGA3D_R8G8B8A8_TYPELESS;
2041 case SVGA3D_R16G16_UINT:
2042 case SVGA3D_R16G16_SINT:
2043 case SVGA3D_R16G16_UNORM:
2044 case SVGA3D_R16G16_SNORM:
2045 case SVGA3D_R16G16_FLOAT:
2046 return SVGA3D_R16G16_TYPELESS;
2047 case SVGA3D_D32_FLOAT:
2048 case SVGA3D_R32_FLOAT:
2049 case SVGA3D_R32_UINT:
2050 case SVGA3D_R32_SINT:
2051 case SVGA3D_R32_TYPELESS:
2052 return SVGA3D_R32_TYPELESS;
2053 case SVGA3D_D24_UNORM_S8_UINT:
2054 case SVGA3D_R24G8_TYPELESS:
2055 return SVGA3D_R24G8_TYPELESS;
2056 case SVGA3D_X24_G8_UINT:
2057 return SVGA3D_R24_UNORM_X8;
2058 case SVGA3D_R8G8_UNORM:
2059 case SVGA3D_R8G8_SNORM:
2060 case SVGA3D_R8G8_UINT:
2061 case SVGA3D_R8G8_SINT:
2062 return SVGA3D_R8G8_TYPELESS;
2063 case SVGA3D_D16_UNORM:
2064 case SVGA3D_R16_UNORM:
2065 case SVGA3D_R16_UINT:
2066 case SVGA3D_R16_SNORM:
2067 case SVGA3D_R16_SINT:
2068 case SVGA3D_R16_FLOAT:
2069 case SVGA3D_R16_TYPELESS:
2070 return SVGA3D_R16_TYPELESS;
2071 case SVGA3D_R8_UNORM:
2072 case SVGA3D_R8_UINT:
2073 case SVGA3D_R8_SNORM:
2074 case SVGA3D_R8_SINT:
2075 return SVGA3D_R8_TYPELESS;
2076 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2077 case SVGA3D_B8G8R8A8_UNORM:
2078 case SVGA3D_B8G8R8A8_TYPELESS:
2079 return SVGA3D_B8G8R8A8_TYPELESS;
2080 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2081 case SVGA3D_B8G8R8X8_UNORM:
2082 case SVGA3D_B8G8R8X8_TYPELESS:
2083 return SVGA3D_B8G8R8X8_TYPELESS;
2084 case SVGA3D_BC1_UNORM:
2085 case SVGA3D_BC1_UNORM_SRGB:
2086 case SVGA3D_BC1_TYPELESS:
2087 return SVGA3D_BC1_TYPELESS;
2088 case SVGA3D_BC2_UNORM:
2089 case SVGA3D_BC2_UNORM_SRGB:
2090 case SVGA3D_BC2_TYPELESS:
2091 return SVGA3D_BC2_TYPELESS;
2092 case SVGA3D_BC3_UNORM:
2093 case SVGA3D_BC3_UNORM_SRGB:
2094 case SVGA3D_BC3_TYPELESS:
2095 return SVGA3D_BC3_TYPELESS;
2096 case SVGA3D_BC4_UNORM:
2097 case SVGA3D_BC4_SNORM:
2098 return SVGA3D_BC4_TYPELESS;
2099 case SVGA3D_BC5_UNORM:
2100 case SVGA3D_BC5_SNORM:
2101 return SVGA3D_BC5_TYPELESS;
2102
2103 /* Special cases (no corresponding _TYPELESS formats) */
2104 case SVGA3D_A8_UNORM:
2105 case SVGA3D_B5G5R5A1_UNORM:
2106 case SVGA3D_B5G6R5_UNORM:
2107 case SVGA3D_R11G11B10_FLOAT:
2108 case SVGA3D_R9G9B9E5_SHAREDEXP:
2109 return format;
2110 default:
2111 debug_printf("Unexpected format %s in %s\n",
2112 svga_format_name(format), __FUNCTION__);
2113 return format;
2114 }
2115 }
2116
2117
2118 /**
2119 * Given a surface format, return the corresponding format to use for
2120 * a texture sampler. In most cases, it's the format unchanged, but there
2121 * are some special cases.
2122 */
2123 SVGA3dSurfaceFormat
2124 svga_sampler_format(SVGA3dSurfaceFormat format)
2125 {
2126 switch (format) {
2127 case SVGA3D_D16_UNORM:
2128 return SVGA3D_R16_UNORM;
2129 case SVGA3D_D24_UNORM_S8_UINT:
2130 return SVGA3D_R24_UNORM_X8;
2131 case SVGA3D_D32_FLOAT:
2132 return SVGA3D_R32_FLOAT;
2133 case SVGA3D_D32_FLOAT_S8X24_UINT:
2134 return SVGA3D_R32_FLOAT_X8X24;
2135 default:
2136 return format;
2137 }
2138 }
2139
2140
2141 /**
2142 * Is the given format an uncompressed snorm format?
2143 */
2144 bool
2145 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2146 {
2147 switch (format) {
2148 case SVGA3D_R8G8B8A8_SNORM:
2149 case SVGA3D_R8G8_SNORM:
2150 case SVGA3D_R8_SNORM:
2151 case SVGA3D_R16G16B16A16_SNORM:
2152 case SVGA3D_R16G16_SNORM:
2153 case SVGA3D_R16_SNORM:
2154 return true;
2155 default:
2156 return false;
2157 }
2158 }
2159
2160
2161 bool
2162 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2163 {
2164 switch (format) {
2165 case SVGA3D_R32G32B32A32_TYPELESS:
2166 case SVGA3D_R32G32B32_TYPELESS:
2167 case SVGA3D_R16G16B16A16_TYPELESS:
2168 case SVGA3D_R32G32_TYPELESS:
2169 case SVGA3D_R32G8X24_TYPELESS:
2170 case SVGA3D_R10G10B10A2_TYPELESS:
2171 case SVGA3D_R8G8B8A8_TYPELESS:
2172 case SVGA3D_R16G16_TYPELESS:
2173 case SVGA3D_R32_TYPELESS:
2174 case SVGA3D_R24G8_TYPELESS:
2175 case SVGA3D_R8G8_TYPELESS:
2176 case SVGA3D_R16_TYPELESS:
2177 case SVGA3D_R8_TYPELESS:
2178 case SVGA3D_BC1_TYPELESS:
2179 case SVGA3D_BC2_TYPELESS:
2180 case SVGA3D_BC3_TYPELESS:
2181 case SVGA3D_BC4_TYPELESS:
2182 case SVGA3D_BC5_TYPELESS:
2183 case SVGA3D_B8G8R8A8_TYPELESS:
2184 case SVGA3D_B8G8R8X8_TYPELESS:
2185 return true;
2186 default:
2187 return false;
2188 }
2189 }
2190
2191
2192 /**
2193 * \brief Can we import a surface with a given SVGA3D format as a texture?
2194 *
2195 * \param ss[in] pointer to the svga screen.
2196 * \param pformat[in] pipe format of the local texture.
2197 * \param sformat[in] svga3d format of the imported surface.
2198 * \param bind[in] bind flags of the imported texture.
2199 * \param verbose[in] Print out incompatibilities in debug mode.
2200 */
2201 bool
2202 svga_format_is_shareable(const struct svga_screen *ss,
2203 enum pipe_format pformat,
2204 SVGA3dSurfaceFormat sformat,
2205 unsigned bind,
2206 bool verbose)
2207 {
2208 SVGA3dSurfaceFormat default_format =
2209 svga_translate_format(ss, pformat, bind);
2210 int i;
2211
2212 if (default_format == SVGA3D_FORMAT_INVALID)
2213 return false;
2214 if (default_format == sformat)
2215 return true;
2216
2217 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2218 if (format_compats[i].pformat == pformat) {
2219 const SVGA3dSurfaceFormat *compat_format =
2220 format_compats[i].compat_format;
2221 while (*compat_format != 0) {
2222 if (*compat_format == sformat)
2223 return true;
2224 compat_format++;
2225 }
2226 }
2227 }
2228
2229 if (verbose) {
2230 debug_printf("Incompatible imported surface format.\n");
2231 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2232 svga_format_name(default_format),
2233 svga_format_name(sformat));
2234 }
2235
2236 return false;
2237 }
2238
2239
2240 /**
2241 * Return the sRGB format which corresponds to the given (linear) format.
2242 * If there's no such sRGB format, return the format as-is.
2243 */
2244 SVGA3dSurfaceFormat
2245 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2246 {
2247 switch (format) {
2248 case SVGA3D_R8G8B8A8_UNORM:
2249 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2250 case SVGA3D_BC1_UNORM:
2251 return SVGA3D_BC1_UNORM_SRGB;
2252 case SVGA3D_BC2_UNORM:
2253 return SVGA3D_BC2_UNORM_SRGB;
2254 case SVGA3D_BC3_UNORM:
2255 return SVGA3D_BC3_UNORM_SRGB;
2256 case SVGA3D_B8G8R8A8_UNORM:
2257 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2258 case SVGA3D_B8G8R8X8_UNORM:
2259 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2260 default:
2261 return format;
2262 }
2263 }
2264
2265
2266 /**
2267 * Implement pipe_screen::is_format_supported().
2268 * \param bindings bitmask of PIPE_BIND_x flags
2269 */
2270 boolean
2271 svga_is_format_supported(struct pipe_screen *screen,
2272 enum pipe_format format,
2273 enum pipe_texture_target target,
2274 unsigned sample_count,
2275 unsigned storage_sample_count,
2276 unsigned bindings)
2277 {
2278 struct svga_screen *ss = svga_screen(screen);
2279 SVGA3dSurfaceFormat svga_format;
2280 SVGA3dSurfaceFormatCaps caps;
2281 SVGA3dSurfaceFormatCaps mask;
2282
2283 assert(bindings);
2284 assert(!ss->sws->have_vgpu10);
2285
2286 /* Multisamples is not supported in VGPU9 device */
2287 if (sample_count > 1)
2288 return FALSE;
2289
2290 svga_format = svga_translate_format(ss, format, bindings);
2291 if (svga_format == SVGA3D_FORMAT_INVALID) {
2292 return FALSE;
2293 }
2294
2295 if (util_format_is_srgb(format) &&
2296 (bindings & PIPE_BIND_DISPLAY_TARGET)) {
2297 /* We only support sRGB rendering with vgpu10 */
2298 return FALSE;
2299 }
2300
2301 /*
2302 * Override host capabilities, so that we end up with the same
2303 * visuals for all virtual hardware implementations.
2304 */
2305 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2306 switch (svga_format) {
2307 case SVGA3D_A8R8G8B8:
2308 case SVGA3D_X8R8G8B8:
2309 case SVGA3D_R5G6B5:
2310 break;
2311
2312 /* VGPU10 formats */
2313 case SVGA3D_B8G8R8A8_UNORM:
2314 case SVGA3D_B8G8R8X8_UNORM:
2315 case SVGA3D_B5G6R5_UNORM:
2316 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2317 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2318 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2319 break;
2320
2321 /* Often unsupported/problematic. This means we end up with the same
2322 * visuals for all virtual hardware implementations.
2323 */
2324 case SVGA3D_A4R4G4B4:
2325 case SVGA3D_A1R5G5B5:
2326 return FALSE;
2327
2328 default:
2329 return FALSE;
2330 }
2331 }
2332
2333 /*
2334 * Query the host capabilities.
2335 */
2336 svga_get_format_cap(ss, svga_format, &caps);
2337
2338 if (bindings & PIPE_BIND_RENDER_TARGET) {
2339 /* Check that the color surface is blendable, unless it's an
2340 * integer format.
2341 */
2342 if (!svga_format_is_integer(svga_format) &&
2343 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2344 return FALSE;
2345 }
2346 }
2347
2348 mask.value = 0;
2349 if (bindings & PIPE_BIND_RENDER_TARGET)
2350 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2351
2352 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2353 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2354
2355 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2356 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2357
2358 if (target == PIPE_TEXTURE_CUBE)
2359 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2360 else if (target == PIPE_TEXTURE_3D)
2361 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2362
2363 return (caps.value & mask.value) == mask.value;
2364 }
2365
2366
2367 /**
2368 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2369 * \param bindings bitmask of PIPE_BIND_x flags
2370 */
2371 boolean
2372 svga_is_dx_format_supported(struct pipe_screen *screen,
2373 enum pipe_format format,
2374 enum pipe_texture_target target,
2375 unsigned sample_count,
2376 unsigned storage_sample_count,
2377 unsigned bindings)
2378 {
2379 struct svga_screen *ss = svga_screen(screen);
2380 SVGA3dSurfaceFormat svga_format;
2381 SVGA3dDevCapResult caps;
2382 unsigned int mask = 0;
2383
2384 assert(bindings);
2385 assert(ss->sws->have_vgpu10);
2386
2387 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2388 return false;
2389
2390 if (sample_count > 1) {
2391 /* In ms_samples, if bit N is set it means that we support
2392 * multisample with N+1 samples per pixel.
2393 */
2394 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2395 return FALSE;
2396 }
2397 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2398 }
2399
2400 /*
2401 * For VGPU10 vertex formats, skip querying host capabilities
2402 */
2403
2404 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2405 SVGA3dSurfaceFormat svga_format;
2406 unsigned flags;
2407 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2408 return svga_format != SVGA3D_FORMAT_INVALID;
2409 }
2410
2411 svga_format = svga_translate_format(ss, format, bindings);
2412 if (svga_format == SVGA3D_FORMAT_INVALID) {
2413 return FALSE;
2414 }
2415
2416 /*
2417 * Override host capabilities, so that we end up with the same
2418 * visuals for all virtual hardware implementations.
2419 */
2420 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2421 switch (svga_format) {
2422 case SVGA3D_A8R8G8B8:
2423 case SVGA3D_X8R8G8B8:
2424 case SVGA3D_R5G6B5:
2425 break;
2426
2427 /* VGPU10 formats */
2428 case SVGA3D_B8G8R8A8_UNORM:
2429 case SVGA3D_B8G8R8X8_UNORM:
2430 case SVGA3D_B5G6R5_UNORM:
2431 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2432 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2433 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2434 break;
2435
2436 /* Often unsupported/problematic. This means we end up with the same
2437 * visuals for all virtual hardware implementations.
2438 */
2439 case SVGA3D_A4R4G4B4:
2440 case SVGA3D_A1R5G5B5:
2441 return FALSE;
2442
2443 default:
2444 return FALSE;
2445 }
2446 }
2447
2448 /*
2449 * Query the host capabilities.
2450 */
2451 svga_get_dx_format_cap(ss, svga_format, &caps);
2452
2453 if (bindings & PIPE_BIND_RENDER_TARGET) {
2454 /* Check that the color surface is blendable, unless it's an
2455 * integer format.
2456 */
2457 if (!(svga_format_is_integer(svga_format) ||
2458 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2459 return FALSE;
2460 }
2461 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2462 }
2463
2464 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2465 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2466
2467 switch (target) {
2468 case PIPE_TEXTURE_3D:
2469 mask |= SVGA3D_DXFMT_VOLUME;
2470 break;
2471 case PIPE_TEXTURE_1D_ARRAY:
2472 case PIPE_TEXTURE_2D_ARRAY:
2473 case PIPE_TEXTURE_CUBE_ARRAY:
2474 mask |= SVGA3D_DXFMT_ARRAY;
2475 break;
2476 default:
2477 break;
2478 }
2479
2480 /* Is the format supported for rendering */
2481 if ((caps.u & mask) != mask)
2482 return FALSE;
2483
2484 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2485 SVGA3dSurfaceFormat sampler_format;
2486
2487 /* Get the sampler view format */
2488 sampler_format = svga_sampler_format(svga_format);
2489 if (sampler_format != svga_format) {
2490 caps.u = 0;
2491 svga_get_dx_format_cap(ss, sampler_format, &caps);
2492 mask &= SVGA3D_DXFMT_VOLUME;
2493 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2494 if ((caps.u & mask) != mask)
2495 return FALSE;
2496 }
2497 }
2498
2499 return TRUE;
2500 }